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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
37#include "libvex_guest_s390x.h" /* VexGuestS390XState */
38#include "libvex.h" /* needed for bb_to_IR.h */
39#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */
florian933065d2011-07-11 01:48:02 +000040#include "libvex_s390x_common.h"
sewardj2019a972011-03-07 16:04:07 +000041#include "main_util.h" /* vassert */
42#include "main_globals.h" /* vex_traceflags */
43#include "guest_generic_bb_to_IR.h" /* DisResult */
44#include "guest_s390_defs.h" /* prototypes for this file's functions */
45#include "host_s390_disasm.h"
46#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
47
sewardj2019a972011-03-07 16:04:07 +000048
49/*------------------------------------------------------------*/
florianb4df7682011-07-05 02:09:01 +000050/*--- Forward declarations ---*/
51/*------------------------------------------------------------*/
52static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
53
54
55/*------------------------------------------------------------*/
sewardj2019a972011-03-07 16:04:07 +000056/*--- Globals ---*/
57/*------------------------------------------------------------*/
58
59/* The IRSB* into which we're generating code. */
60static IRSB *irsb;
61
62/* The guest address for the instruction currently being
63 translated. */
64static Addr64 guest_IA_curr_instr;
65
66/* The guest address for the instruction following the current instruction. */
67static Addr64 guest_IA_next_instr;
68
69/* Result of disassembly step. */
70static DisResult *dis_res;
71
floriana64c2432011-07-16 02:11:50 +000072/* Resteer function and callback data */
73static Bool (*resteer_fn)(void *, Addr64);
74static void *resteer_data;
75
sewardj2019a972011-03-07 16:04:07 +000076/* The last seen execute target instruction */
77ULong last_execute_target;
78
79/* The possible outcomes of a decoding operation */
80typedef enum {
81 S390_DECODE_OK,
82 S390_DECODE_UNKNOWN_INSN,
83 S390_DECODE_UNIMPLEMENTED_INSN,
84 S390_DECODE_UNKNOWN_SPECIAL_INSN,
85 S390_DECODE_ERROR
86} s390_decode_t;
87
88/*------------------------------------------------------------*/
89/*--- Helpers for constructing IR. ---*/
90/*------------------------------------------------------------*/
91
92/* Sign extend a value with the given number of bits. This is a
93 macro because it allows us to overload the type of the value.
94 Note that VALUE must have a signed type! */
95#undef sign_extend
96#define sign_extend(value,num_bits) \
97(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
98 (sizeof(__typeof__(value)) * 8 - (num_bits)))
99
100
101/* Add a statement to the current irsb. */
102static __inline__ void
103stmt(IRStmt *st)
104{
105 addStmtToIRSB(irsb, st);
106}
107
108/* Allocate a new temporary of the given type. */
109static __inline__ IRTemp
110newTemp(IRType type)
111{
112 vassert(isPlausibleIRType(type));
113
114 return newIRTemp(irsb->tyenv, type);
115}
116
117/* Create an expression node for a temporary */
118static __inline__ IRExpr *
119mkexpr(IRTemp tmp)
120{
121 return IRExpr_RdTmp(tmp);
122}
123
124/* Add a statement that assigns to a temporary */
125static __inline__ void
126assign(IRTemp dst, IRExpr *expr)
127{
128 stmt(IRStmt_WrTmp(dst, expr));
129}
130
131/* Create a temporary of the given type and assign the expression to it */
132static __inline__ IRTemp
133mktemp(IRType type, IRExpr *expr)
134{
135 IRTemp temp = newTemp(type);
136
137 assign(temp, expr);
138
139 return temp;
140}
141
142/* Create a unary expression */
143static __inline__ IRExpr *
144unop(IROp kind, IRExpr *op)
145{
146 return IRExpr_Unop(kind, op);
147}
148
149/* Create a binary expression */
150static __inline__ IRExpr *
151binop(IROp kind, IRExpr *op1, IRExpr *op2)
152{
153 return IRExpr_Binop(kind, op1, op2);
154}
155
156/* Create a ternary expression */
157static __inline__ IRExpr *
158triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
159{
160 return IRExpr_Triop(kind, op1, op2, op3);
161}
162
163/* Create a quaternary expression */
164static __inline__ IRExpr *
165qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
166{
167 return IRExpr_Qop(kind, op1, op2, op3, op4);
168}
169
170/* Create an expression node for an 8-bit integer constant */
171static __inline__ IRExpr *
172mkU8(UInt value)
173{
174 vassert(value < 256);
175
176 return IRExpr_Const(IRConst_U8((UChar)value));
177}
178
179/* Create an expression node for a 16-bit integer constant */
180static __inline__ IRExpr *
181mkU16(UInt value)
182{
183 vassert(value < 65536);
184
185 return IRExpr_Const(IRConst_U16((UShort)value));
186}
187
188/* Create an expression node for a 32-bit integer constant */
189static __inline__ IRExpr *
190mkU32(UInt value)
191{
192 return IRExpr_Const(IRConst_U32(value));
193}
194
195/* Create an expression node for a 64-bit integer constant */
196static __inline__ IRExpr *
197mkU64(ULong value)
198{
199 return IRExpr_Const(IRConst_U64(value));
200}
201
202/* Create an expression node for a 32-bit floating point constant
203 whose value is given by a bit pattern. */
204static __inline__ IRExpr *
205mkF32i(UInt value)
206{
207 return IRExpr_Const(IRConst_F32i(value));
208}
209
210/* Create an expression node for a 32-bit floating point constant
211 whose value is given by a bit pattern. */
212static __inline__ IRExpr *
213mkF64i(ULong value)
214{
215 return IRExpr_Const(IRConst_F64i(value));
216}
217
218/* Little helper function for my sanity. ITE = if-then-else */
219static IRExpr *
220mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
221{
222 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
223
224 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
225}
226
227/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
228static void __inline__
229store(IRExpr *addr, IRExpr *data)
230{
231 stmt(IRStmt_Store(Iend_BE, addr, data));
232}
233
234/* Create an expression that loads a TYPE sized value from ADDR.
235 This is a big-endian machine. */
236static __inline__ IRExpr *
237load(IRType type, IRExpr *addr)
238{
239 return IRExpr_Load(Iend_BE, type, addr);
240}
241
242/* Function call */
243static void
244call_function(IRExpr *callee_address)
245{
246 irsb->next = callee_address;
247 irsb->jumpkind = Ijk_Call;
248
249 dis_res->whatNext = Dis_StopHere;
250}
251
floriana64c2432011-07-16 02:11:50 +0000252/* Function call with known target. */
253static void
254call_function_and_chase(Addr64 callee_address)
255{
256 if (resteer_fn(resteer_data, callee_address)) {
257 dis_res->whatNext = Dis_ResteerU;
258 dis_res->continueAt = callee_address;
259 } else {
260 irsb->next = mkU64(callee_address);
261 irsb->jumpkind = Ijk_Call;
262 dis_res->whatNext = Dis_StopHere;
263 }
264}
265
sewardj2019a972011-03-07 16:04:07 +0000266/* Function return sequence */
267static void
268return_from_function(IRExpr *return_address)
269{
270 irsb->next = return_address;
271 irsb->jumpkind = Ijk_Ret;
272
273 dis_res->whatNext = Dis_StopHere;
274}
275
276/* A conditional branch whose target is not known at instrumentation time.
277
278 if (condition) goto computed_target;
279
280 Needs to be represented as:
281
282 if (! condition) goto next_instruction;
283 goto computed_target;
284
285 This inversion is being handled at code generation time. So we just
286 take the condition here as is.
287*/
288static void
289if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
290{
291 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
292
293 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
294
295 irsb->next = target;
296 irsb->jumpkind = Ijk_Boring;
297
298 dis_res->whatNext = Dis_StopHere;
299}
300
301/* A conditional branch whose target is known at instrumentation time. */
302static void
303if_condition_goto(IRExpr *condition, Addr64 target)
304{
305 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
306
307 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
308 dis_res->whatNext = Dis_Continue;
309}
310
311/* An unconditional branch. Target may or may not be known at instrumentation
312 time. */
313static void
314always_goto(IRExpr *target)
315{
316 irsb->next = target;
317 irsb->jumpkind = Ijk_Boring;
318
319 dis_res->whatNext = Dis_StopHere;
320}
321
floriana64c2432011-07-16 02:11:50 +0000322/* An unconditional branch to a known target. */
323static void
324always_goto_and_chase(Addr64 target)
325{
326 if (resteer_fn(resteer_data, target)) {
327 dis_res->whatNext = Dis_ResteerU;
328 dis_res->continueAt = target;
329 } else {
330 irsb->next = mkU64(target);
331 irsb->jumpkind = Ijk_Boring;
332 dis_res->whatNext = Dis_StopHere;
333 }
334}
335
sewardj2019a972011-03-07 16:04:07 +0000336/* A system call */
337static void
338system_call(IRExpr *sysno)
339{
340 /* Store the system call number in the pseudo register. */
341 stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
342
sewardj69007022011-04-28 20:13:45 +0000343 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
sewardj2019a972011-03-07 16:04:07 +0000344 stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
345
346 /* It's important that all ArchRegs carry their up-to-date value
347 at this point. So we declare an end-of-block here, which
348 forces any TempRegs caching ArchRegs to be flushed. */
349 irsb->next = mkU64(guest_IA_next_instr);
350
351 irsb->jumpkind = Ijk_Sys_syscall;
352
353 dis_res->whatNext = Dis_StopHere;
354}
355
356/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
357 instructions to VEX's IRRoundingMode. */
358static IRRoundingMode
359encode_rounding_mode(UChar mode)
360{
361 switch (mode) {
362 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
363 case S390_ROUND_ZERO: return Irrm_ZERO;
364 case S390_ROUND_POSINF: return Irrm_PosINF;
365 case S390_ROUND_NEGINF: return Irrm_NegINF;
366 }
367 vpanic("encode_rounding_mode");
368}
369
370static __inline__ IRExpr *get_fpr_dw0(UInt);
371static __inline__ void put_fpr_dw0(UInt, IRExpr *);
372
373/* Read a floating point register pair and combine their contents into a
374 128-bit value */
375static IRExpr *
376get_fpr_pair(UInt archreg)
377{
378 IRExpr *high = get_fpr_dw0(archreg);
379 IRExpr *low = get_fpr_dw0(archreg + 2);
380
381 return binop(Iop_F64HLtoF128, high, low);
382}
383
384/* Write a 128-bit floating point value into a register pair. */
385static void
386put_fpr_pair(UInt archreg, IRExpr *expr)
387{
388 IRExpr *high = unop(Iop_F128HItoF64, expr);
389 IRExpr *low = unop(Iop_F128LOtoF64, expr);
390
391 put_fpr_dw0(archreg, high);
392 put_fpr_dw0(archreg + 2, low);
393}
394
395
396/* Flags thunk offsets */
floriane88b3c92011-07-05 02:48:39 +0000397#define S390X_GUEST_OFFSET_CC_OP S390X_GUEST_OFFSET(guest_CC_OP)
398#define S390X_GUEST_OFFSET_CC_DEP1 S390X_GUEST_OFFSET(guest_CC_DEP1)
399#define S390X_GUEST_OFFSET_CC_DEP2 S390X_GUEST_OFFSET(guest_CC_DEP2)
400#define S390X_GUEST_OFFSET_CC_NDEP S390X_GUEST_OFFSET(guest_CC_NDEP)
sewardj2019a972011-03-07 16:04:07 +0000401
402/*------------------------------------------------------------*/
403/*--- Build the flags thunk. ---*/
404/*------------------------------------------------------------*/
405
406/* Completely fill the flags thunk. We're always filling all fields.
407 Apparently, that is better for redundant PUT elimination. */
408static void
409s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
410{
411 UInt op_off, dep1_off, dep2_off, ndep_off;
412
413 op_off = S390X_GUEST_OFFSET_CC_OP;
414 dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
415 dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
416 ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
417
418 stmt(IRStmt_Put(op_off, op));
419 stmt(IRStmt_Put(dep1_off, dep1));
420 stmt(IRStmt_Put(dep2_off, dep2));
421 stmt(IRStmt_Put(ndep_off, ndep));
422}
423
424
425/* Create an expression for V and widen the result to 64 bit. */
426static IRExpr *
427s390_cc_widen(IRTemp v, Bool sign_extend)
428{
429 IRExpr *expr;
430
431 expr = mkexpr(v);
432
433 switch (typeOfIRTemp(irsb->tyenv, v)) {
434 case Ity_I64:
435 break;
436 case Ity_I32:
437 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
438 break;
439 case Ity_I16:
440 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
441 break;
442 case Ity_I8:
443 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
444 break;
445 default:
446 vpanic("s390_cc_widen");
447 }
448
449 return expr;
450}
451
452static void
453s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
454{
455 IRExpr *op, *dep1, *dep2, *ndep;
456
457 op = mkU64(opc);
458 dep1 = s390_cc_widen(d1, sign_extend);
459 dep2 = mkU64(0);
460 ndep = mkU64(0);
461
462 s390_cc_thunk_fill(op, dep1, dep2, ndep);
463}
464
465
466static void
467s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
468{
469 IRExpr *op, *dep1, *dep2, *ndep;
470
471 op = mkU64(opc);
472 dep1 = s390_cc_widen(d1, sign_extend);
473 dep2 = s390_cc_widen(d2, sign_extend);
474 ndep = mkU64(0);
475
476 s390_cc_thunk_fill(op, dep1, dep2, ndep);
477}
478
479
480/* memcheck believes that the NDEP field in the flags thunk is always
481 defined. But for some flag computations (e.g. add with carry) that is
482 just not true. We therefore need to convey to memcheck that the value
483 of the ndep field does matter and therefore we make the DEP2 field
484 depend on it:
485
486 DEP2 = original_DEP2 ^ NDEP
487
488 In s390_calculate_cc we exploit that (a^b)^b == a
489 I.e. we xor the DEP2 value with the NDEP value to recover the
490 original_DEP2 value. */
491static void
492s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
493{
494 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
495
496 op = mkU64(opc);
497 dep1 = s390_cc_widen(d1, sign_extend);
498 dep2 = s390_cc_widen(d2, sign_extend);
499 ndep = s390_cc_widen(nd, sign_extend);
500
501 dep2x = binop(Iop_Xor64, dep2, ndep);
502
503 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
504}
505
506
507/* Write one floating point value into the flags thunk */
508static void
509s390_cc_thunk_put1f(UInt opc, IRTemp d1)
510{
511 IRExpr *op, *dep1, *dep2, *ndep;
512
513 op = mkU64(opc);
514 dep1 = mkexpr(d1);
515 dep2 = mkU64(0);
516 ndep = mkU64(0);
517
518 s390_cc_thunk_fill(op, dep1, dep2, ndep);
519}
520
521
522/* Write a floating point value and an integer into the flags thunk. The
523 integer value is zero-extended first. */
524static void
525s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
526{
527 IRExpr *op, *dep1, *dep2, *ndep;
528
529 op = mkU64(opc);
530 dep1 = mkexpr(d1);
531 dep2 = s390_cc_widen(d2, False);
532 ndep = mkU64(0);
533
534 s390_cc_thunk_fill(op, dep1, dep2, ndep);
535}
536
537
538/* Write a 128-bit floating point value into the flags thunk. This is
539 done by splitting the value into two 64-bits values. */
540static void
541s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
542{
543 IRExpr *op, *hi, *lo, *ndep;
544
545 op = mkU64(opc);
546 hi = unop(Iop_F128HItoF64, mkexpr(d1));
547 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
548 ndep = mkU64(0);
549
550 s390_cc_thunk_fill(op, hi, lo, ndep);
551}
552
553
554/* Write a 128-bit floating point value and an integer into the flags thunk.
555 The integer value is zero-extended first. */
556static void
557s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
558{
559 IRExpr *op, *hi, *lo, *lox, *ndep;
560
561 op = mkU64(opc);
562 hi = unop(Iop_F128HItoF64, mkexpr(d1));
563 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
564 ndep = s390_cc_widen(nd, False);
565
566 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
567
568 s390_cc_thunk_fill(op, hi, lox, ndep);
569}
570
571
572static void
573s390_cc_set(UInt val)
574{
575 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
576 mkU64(val), mkU64(0), mkU64(0));
577}
578
579/* Build IR to calculate the condition code from flags thunk.
580 Returns an expression of type Ity_I32 */
581static IRExpr *
582s390_call_calculate_cc(void)
583{
584 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
585
586 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
587 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
588 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
589 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
590
591 args = mkIRExprVec_4(op, dep1, dep2, ndep);
592 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
593 "s390_calculate_cc", &s390_calculate_cc, args);
594
595 /* Exclude OP and NDEP from definedness checking. We're only
596 interested in DEP1 and DEP2. */
597 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
598
599 return call;
600}
601
602/* Build IR to calculate the internal condition code for a "compare and branch"
603 insn. Returns an expression of type Ity_I32 */
604static IRExpr *
605s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
606{
607 IRExpr **args, *call, *op, *dep1, *dep2;
608
609 op = mkU64(opc);
610 dep1 = s390_cc_widen(op1, sign_extend);
611 dep2 = s390_cc_widen(op2, sign_extend);
612
613 args = mkIRExprVec_3(op, dep1, dep2);
614 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
615 "s390_calculate_icc", &s390_calculate_icc, args);
616
617 /* Exclude OP from definedness checking. We're only
618 interested in DEP1 and DEP2. */
619 call->Iex.CCall.cee->mcx_mask = (1<<0);
620
621 return call;
622}
623
624/* Build IR to calculate the condition code from flags thunk.
625 Returns an expression of type Ity_I32 */
626static IRExpr *
627s390_call_calculate_cond(UInt m)
628{
629 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
630
631 mask = mkU64(m);
632 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
633 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
634 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
635 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
636
637 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
638 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
639 "s390_calculate_cond", &s390_calculate_cond, args);
640
641 /* Exclude the requested condition, OP and NDEP from definedness
642 checking. We're only interested in DEP1 and DEP2. */
643 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
644
645 return call;
646}
647
648#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
649#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
650#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
651#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
652#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
653#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
654#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
655 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
656#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
657 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
658#define s390_call_calculate_iccZZ(op,dep1,dep2) \
659 s390_call_calculate_icc(op,dep1,dep2,False)
660#define s390_call_calculate_iccSS(op,dep1,dep2) \
661 s390_call_calculate_icc(op,dep1,dep2,True)
662
663
floriane88b3c92011-07-05 02:48:39 +0000664#define OFFB_TISTART S390X_GUEST_OFFSET(guest_TISTART)
665#define OFFB_TILEN S390X_GUEST_OFFSET(guest_TILEN)
sewardj2019a972011-03-07 16:04:07 +0000666
667
668/*------------------------------------------------------------*/
669/*--- Guest register access ---*/
670/*------------------------------------------------------------*/
671
672
673/*------------------------------------------------------------*/
674/*--- ar registers ---*/
675/*------------------------------------------------------------*/
676
677/* Return the guest state offset of a ar register. */
678static UInt
679ar_offset(UInt archreg)
680{
681 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000682 S390X_GUEST_OFFSET(guest_a0),
683 S390X_GUEST_OFFSET(guest_a1),
684 S390X_GUEST_OFFSET(guest_a2),
685 S390X_GUEST_OFFSET(guest_a3),
686 S390X_GUEST_OFFSET(guest_a4),
687 S390X_GUEST_OFFSET(guest_a5),
688 S390X_GUEST_OFFSET(guest_a6),
689 S390X_GUEST_OFFSET(guest_a7),
690 S390X_GUEST_OFFSET(guest_a8),
691 S390X_GUEST_OFFSET(guest_a9),
692 S390X_GUEST_OFFSET(guest_a10),
693 S390X_GUEST_OFFSET(guest_a11),
694 S390X_GUEST_OFFSET(guest_a12),
695 S390X_GUEST_OFFSET(guest_a13),
696 S390X_GUEST_OFFSET(guest_a14),
697 S390X_GUEST_OFFSET(guest_a15),
sewardj2019a972011-03-07 16:04:07 +0000698 };
699
700 vassert(archreg < 16);
701
702 return offset[archreg];
703}
704
705
706/* Return the guest state offset of word #0 of a ar register. */
707static __inline__ UInt
708ar_w0_offset(UInt archreg)
709{
710 return ar_offset(archreg) + 0;
711}
712
713/* Write word #0 of a ar to the guest state. */
714static __inline__ void
715put_ar_w0(UInt archreg, IRExpr *expr)
716{
717 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
718
719 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
720}
721
722/* Read word #0 of a ar register. */
723static __inline__ IRExpr *
724get_ar_w0(UInt archreg)
725{
726 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
727}
728
729
730/*------------------------------------------------------------*/
731/*--- fpr registers ---*/
732/*------------------------------------------------------------*/
733
734/* Return the guest state offset of a fpr register. */
735static UInt
736fpr_offset(UInt archreg)
737{
738 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000739 S390X_GUEST_OFFSET(guest_f0),
740 S390X_GUEST_OFFSET(guest_f1),
741 S390X_GUEST_OFFSET(guest_f2),
742 S390X_GUEST_OFFSET(guest_f3),
743 S390X_GUEST_OFFSET(guest_f4),
744 S390X_GUEST_OFFSET(guest_f5),
745 S390X_GUEST_OFFSET(guest_f6),
746 S390X_GUEST_OFFSET(guest_f7),
747 S390X_GUEST_OFFSET(guest_f8),
748 S390X_GUEST_OFFSET(guest_f9),
749 S390X_GUEST_OFFSET(guest_f10),
750 S390X_GUEST_OFFSET(guest_f11),
751 S390X_GUEST_OFFSET(guest_f12),
752 S390X_GUEST_OFFSET(guest_f13),
753 S390X_GUEST_OFFSET(guest_f14),
754 S390X_GUEST_OFFSET(guest_f15),
sewardj2019a972011-03-07 16:04:07 +0000755 };
756
757 vassert(archreg < 16);
758
759 return offset[archreg];
760}
761
762
763/* Return the guest state offset of word #0 of a fpr register. */
764static __inline__ UInt
765fpr_w0_offset(UInt archreg)
766{
767 return fpr_offset(archreg) + 0;
768}
769
770/* Write word #0 of a fpr to the guest state. */
771static __inline__ void
772put_fpr_w0(UInt archreg, IRExpr *expr)
773{
774 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
775
776 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
777}
778
779/* Read word #0 of a fpr register. */
780static __inline__ IRExpr *
781get_fpr_w0(UInt archreg)
782{
783 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
784}
785
786/* Return the guest state offset of double word #0 of a fpr register. */
787static __inline__ UInt
788fpr_dw0_offset(UInt archreg)
789{
790 return fpr_offset(archreg) + 0;
791}
792
793/* Write double word #0 of a fpr to the guest state. */
794static __inline__ void
795put_fpr_dw0(UInt archreg, IRExpr *expr)
796{
797 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
798
799 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
800}
801
802/* Read double word #0 of a fpr register. */
803static __inline__ IRExpr *
804get_fpr_dw0(UInt archreg)
805{
806 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
807}
808
809
810/*------------------------------------------------------------*/
811/*--- gpr registers ---*/
812/*------------------------------------------------------------*/
813
814/* Return the guest state offset of a gpr register. */
815static UInt
816gpr_offset(UInt archreg)
817{
818 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000819 S390X_GUEST_OFFSET(guest_r0),
820 S390X_GUEST_OFFSET(guest_r1),
821 S390X_GUEST_OFFSET(guest_r2),
822 S390X_GUEST_OFFSET(guest_r3),
823 S390X_GUEST_OFFSET(guest_r4),
824 S390X_GUEST_OFFSET(guest_r5),
825 S390X_GUEST_OFFSET(guest_r6),
826 S390X_GUEST_OFFSET(guest_r7),
827 S390X_GUEST_OFFSET(guest_r8),
828 S390X_GUEST_OFFSET(guest_r9),
829 S390X_GUEST_OFFSET(guest_r10),
830 S390X_GUEST_OFFSET(guest_r11),
831 S390X_GUEST_OFFSET(guest_r12),
832 S390X_GUEST_OFFSET(guest_r13),
833 S390X_GUEST_OFFSET(guest_r14),
834 S390X_GUEST_OFFSET(guest_r15),
sewardj2019a972011-03-07 16:04:07 +0000835 };
836
837 vassert(archreg < 16);
838
839 return offset[archreg];
840}
841
842
843/* Return the guest state offset of word #0 of a gpr register. */
844static __inline__ UInt
845gpr_w0_offset(UInt archreg)
846{
847 return gpr_offset(archreg) + 0;
848}
849
850/* Write word #0 of a gpr to the guest state. */
851static __inline__ void
852put_gpr_w0(UInt archreg, IRExpr *expr)
853{
854 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
855
856 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
857}
858
859/* Read word #0 of a gpr register. */
860static __inline__ IRExpr *
861get_gpr_w0(UInt archreg)
862{
863 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
864}
865
866/* Return the guest state offset of double word #0 of a gpr register. */
867static __inline__ UInt
868gpr_dw0_offset(UInt archreg)
869{
870 return gpr_offset(archreg) + 0;
871}
872
873/* Write double word #0 of a gpr to the guest state. */
874static __inline__ void
875put_gpr_dw0(UInt archreg, IRExpr *expr)
876{
877 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
878
879 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
880}
881
882/* Read double word #0 of a gpr register. */
883static __inline__ IRExpr *
884get_gpr_dw0(UInt archreg)
885{
886 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
887}
888
889/* Return the guest state offset of half word #1 of a gpr register. */
890static __inline__ UInt
891gpr_hw1_offset(UInt archreg)
892{
893 return gpr_offset(archreg) + 2;
894}
895
896/* Write half word #1 of a gpr to the guest state. */
897static __inline__ void
898put_gpr_hw1(UInt archreg, IRExpr *expr)
899{
900 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
901
902 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
903}
904
905/* Read half word #1 of a gpr register. */
906static __inline__ IRExpr *
907get_gpr_hw1(UInt archreg)
908{
909 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
910}
911
912/* Return the guest state offset of byte #6 of a gpr register. */
913static __inline__ UInt
914gpr_b6_offset(UInt archreg)
915{
916 return gpr_offset(archreg) + 6;
917}
918
919/* Write byte #6 of a gpr to the guest state. */
920static __inline__ void
921put_gpr_b6(UInt archreg, IRExpr *expr)
922{
923 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
924
925 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
926}
927
928/* Read byte #6 of a gpr register. */
929static __inline__ IRExpr *
930get_gpr_b6(UInt archreg)
931{
932 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
933}
934
935/* Return the guest state offset of byte #3 of a gpr register. */
936static __inline__ UInt
937gpr_b3_offset(UInt archreg)
938{
939 return gpr_offset(archreg) + 3;
940}
941
942/* Write byte #3 of a gpr to the guest state. */
943static __inline__ void
944put_gpr_b3(UInt archreg, IRExpr *expr)
945{
946 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
947
948 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
949}
950
951/* Read byte #3 of a gpr register. */
952static __inline__ IRExpr *
953get_gpr_b3(UInt archreg)
954{
955 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
956}
957
958/* Return the guest state offset of byte #0 of a gpr register. */
959static __inline__ UInt
960gpr_b0_offset(UInt archreg)
961{
962 return gpr_offset(archreg) + 0;
963}
964
965/* Write byte #0 of a gpr to the guest state. */
966static __inline__ void
967put_gpr_b0(UInt archreg, IRExpr *expr)
968{
969 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
970
971 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
972}
973
974/* Read byte #0 of a gpr register. */
975static __inline__ IRExpr *
976get_gpr_b0(UInt archreg)
977{
978 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
979}
980
981/* Return the guest state offset of word #1 of a gpr register. */
982static __inline__ UInt
983gpr_w1_offset(UInt archreg)
984{
985 return gpr_offset(archreg) + 4;
986}
987
988/* Write word #1 of a gpr to the guest state. */
989static __inline__ void
990put_gpr_w1(UInt archreg, IRExpr *expr)
991{
992 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
993
994 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
995}
996
997/* Read word #1 of a gpr register. */
998static __inline__ IRExpr *
999get_gpr_w1(UInt archreg)
1000{
1001 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
1002}
1003
1004/* Return the guest state offset of half word #3 of a gpr register. */
1005static __inline__ UInt
1006gpr_hw3_offset(UInt archreg)
1007{
1008 return gpr_offset(archreg) + 6;
1009}
1010
1011/* Write half word #3 of a gpr to the guest state. */
1012static __inline__ void
1013put_gpr_hw3(UInt archreg, IRExpr *expr)
1014{
1015 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1016
1017 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
1018}
1019
1020/* Read half word #3 of a gpr register. */
1021static __inline__ IRExpr *
1022get_gpr_hw3(UInt archreg)
1023{
1024 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
1025}
1026
1027/* Return the guest state offset of byte #7 of a gpr register. */
1028static __inline__ UInt
1029gpr_b7_offset(UInt archreg)
1030{
1031 return gpr_offset(archreg) + 7;
1032}
1033
1034/* Write byte #7 of a gpr to the guest state. */
1035static __inline__ void
1036put_gpr_b7(UInt archreg, IRExpr *expr)
1037{
1038 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1039
1040 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1041}
1042
1043/* Read byte #7 of a gpr register. */
1044static __inline__ IRExpr *
1045get_gpr_b7(UInt archreg)
1046{
1047 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1048}
1049
1050/* Return the guest state offset of half word #0 of a gpr register. */
1051static __inline__ UInt
1052gpr_hw0_offset(UInt archreg)
1053{
1054 return gpr_offset(archreg) + 0;
1055}
1056
1057/* Write half word #0 of a gpr to the guest state. */
1058static __inline__ void
1059put_gpr_hw0(UInt archreg, IRExpr *expr)
1060{
1061 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1062
1063 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1064}
1065
1066/* Read half word #0 of a gpr register. */
1067static __inline__ IRExpr *
1068get_gpr_hw0(UInt archreg)
1069{
1070 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1071}
1072
1073/* Return the guest state offset of byte #4 of a gpr register. */
1074static __inline__ UInt
1075gpr_b4_offset(UInt archreg)
1076{
1077 return gpr_offset(archreg) + 4;
1078}
1079
1080/* Write byte #4 of a gpr to the guest state. */
1081static __inline__ void
1082put_gpr_b4(UInt archreg, IRExpr *expr)
1083{
1084 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1085
1086 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1087}
1088
1089/* Read byte #4 of a gpr register. */
1090static __inline__ IRExpr *
1091get_gpr_b4(UInt archreg)
1092{
1093 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1094}
1095
1096/* Return the guest state offset of byte #1 of a gpr register. */
1097static __inline__ UInt
1098gpr_b1_offset(UInt archreg)
1099{
1100 return gpr_offset(archreg) + 1;
1101}
1102
1103/* Write byte #1 of a gpr to the guest state. */
1104static __inline__ void
1105put_gpr_b1(UInt archreg, IRExpr *expr)
1106{
1107 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1108
1109 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1110}
1111
1112/* Read byte #1 of a gpr register. */
1113static __inline__ IRExpr *
1114get_gpr_b1(UInt archreg)
1115{
1116 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1117}
1118
1119/* Return the guest state offset of half word #2 of a gpr register. */
1120static __inline__ UInt
1121gpr_hw2_offset(UInt archreg)
1122{
1123 return gpr_offset(archreg) + 4;
1124}
1125
1126/* Write half word #2 of a gpr to the guest state. */
1127static __inline__ void
1128put_gpr_hw2(UInt archreg, IRExpr *expr)
1129{
1130 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1131
1132 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1133}
1134
1135/* Read half word #2 of a gpr register. */
1136static __inline__ IRExpr *
1137get_gpr_hw2(UInt archreg)
1138{
1139 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1140}
1141
1142/* Return the guest state offset of byte #5 of a gpr register. */
1143static __inline__ UInt
1144gpr_b5_offset(UInt archreg)
1145{
1146 return gpr_offset(archreg) + 5;
1147}
1148
1149/* Write byte #5 of a gpr to the guest state. */
1150static __inline__ void
1151put_gpr_b5(UInt archreg, IRExpr *expr)
1152{
1153 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1154
1155 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1156}
1157
1158/* Read byte #5 of a gpr register. */
1159static __inline__ IRExpr *
1160get_gpr_b5(UInt archreg)
1161{
1162 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1163}
1164
1165/* Return the guest state offset of byte #2 of a gpr register. */
1166static __inline__ UInt
1167gpr_b2_offset(UInt archreg)
1168{
1169 return gpr_offset(archreg) + 2;
1170}
1171
1172/* Write byte #2 of a gpr to the guest state. */
1173static __inline__ void
1174put_gpr_b2(UInt archreg, IRExpr *expr)
1175{
1176 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1177
1178 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1179}
1180
1181/* Read byte #2 of a gpr register. */
1182static __inline__ IRExpr *
1183get_gpr_b2(UInt archreg)
1184{
1185 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1186}
1187
1188/* Return the guest state offset of the counter register. */
1189static UInt
1190counter_offset(void)
1191{
floriane88b3c92011-07-05 02:48:39 +00001192 return S390X_GUEST_OFFSET(guest_counter);
sewardj2019a972011-03-07 16:04:07 +00001193}
1194
1195/* Return the guest state offset of double word #0 of the counter register. */
1196static __inline__ UInt
1197counter_dw0_offset(void)
1198{
1199 return counter_offset() + 0;
1200}
1201
1202/* Write double word #0 of the counter to the guest state. */
1203static __inline__ void
1204put_counter_dw0(IRExpr *expr)
1205{
1206 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1207
1208 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1209}
1210
1211/* Read double word #0 of the counter register. */
1212static __inline__ IRExpr *
1213get_counter_dw0(void)
1214{
1215 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1216}
1217
1218/* Return the guest state offset of word #0 of the counter register. */
1219static __inline__ UInt
1220counter_w0_offset(void)
1221{
1222 return counter_offset() + 0;
1223}
1224
1225/* Return the guest state offset of word #1 of the counter register. */
1226static __inline__ UInt
1227counter_w1_offset(void)
1228{
1229 return counter_offset() + 4;
1230}
1231
1232/* Write word #0 of the counter to the guest state. */
1233static __inline__ void
1234put_counter_w0(IRExpr *expr)
1235{
1236 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1237
1238 stmt(IRStmt_Put(counter_w0_offset(), expr));
1239}
1240
1241/* Read word #0 of the counter register. */
1242static __inline__ IRExpr *
1243get_counter_w0(void)
1244{
1245 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1246}
1247
1248/* Write word #1 of the counter to the guest state. */
1249static __inline__ void
1250put_counter_w1(IRExpr *expr)
1251{
1252 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1253
1254 stmt(IRStmt_Put(counter_w1_offset(), expr));
1255}
1256
1257/* Read word #1 of the counter register. */
1258static __inline__ IRExpr *
1259get_counter_w1(void)
1260{
1261 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1262}
1263
1264/* Return the guest state offset of the fpc register. */
1265static UInt
1266fpc_offset(void)
1267{
floriane88b3c92011-07-05 02:48:39 +00001268 return S390X_GUEST_OFFSET(guest_fpc);
sewardj2019a972011-03-07 16:04:07 +00001269}
1270
1271/* Return the guest state offset of word #0 of the fpc register. */
1272static __inline__ UInt
1273fpc_w0_offset(void)
1274{
1275 return fpc_offset() + 0;
1276}
1277
1278/* Write word #0 of the fpc to the guest state. */
1279static __inline__ void
1280put_fpc_w0(IRExpr *expr)
1281{
1282 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1283
1284 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1285}
1286
1287/* Read word #0 of the fpc register. */
1288static __inline__ IRExpr *
1289get_fpc_w0(void)
1290{
1291 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1292}
1293
1294
1295/*------------------------------------------------------------*/
1296/*--- Build IR for formats ---*/
1297/*------------------------------------------------------------*/
1298static void
1299s390_format_I(HChar *(*irgen)(UChar i),
1300 UChar i)
1301{
1302 HChar *mnm = irgen(i);
1303
sewardj7ee97522011-05-09 21:45:04 +00001304 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001305 s390_disasm(ENC2(MNM, UINT), mnm, i);
1306}
1307
1308static void
1309s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1310 UChar r1, UShort i2)
1311{
1312 irgen(r1, i2);
1313}
1314
1315static void
1316s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1317 UChar r1, UShort i2)
1318{
1319 HChar *mnm = irgen(r1, i2);
1320
sewardj7ee97522011-05-09 21:45:04 +00001321 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001322 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1323}
1324
1325static void
1326s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1327 UChar r1, UShort i2)
1328{
1329 HChar *mnm = irgen(r1, i2);
1330
sewardj7ee97522011-05-09 21:45:04 +00001331 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001332 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1333}
1334
1335static void
1336s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1337 UChar r1, UShort i2)
1338{
1339 HChar *mnm = irgen(r1, i2);
1340
sewardj7ee97522011-05-09 21:45:04 +00001341 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001342 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1343}
1344
1345static void
1346s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1347 UChar r1, UChar r3, UShort i2)
1348{
1349 HChar *mnm = irgen(r1, r3, i2);
1350
sewardj7ee97522011-05-09 21:45:04 +00001351 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001352 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1353}
1354
1355static void
1356s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1357 UChar r1, UChar r3, UShort i2)
1358{
1359 HChar *mnm = irgen(r1, r3, i2);
1360
sewardj7ee97522011-05-09 21:45:04 +00001361 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001362 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1363}
1364
1365static void
1366s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1367 UChar i5),
1368 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1369{
1370 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1371
sewardj7ee97522011-05-09 21:45:04 +00001372 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001373 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1374 i5);
1375}
1376
1377static void
1378s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1379 UChar r1, UChar r2, UShort i4, UChar m3)
1380{
1381 HChar *mnm = irgen(r1, r2, i4, m3);
1382
sewardj7ee97522011-05-09 21:45:04 +00001383 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001384 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1385 r2, m3, (Int)(Short)i4);
1386}
1387
1388static void
1389s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1390 UChar r1, UChar m3, UShort i4, UChar i2)
1391{
1392 HChar *mnm = irgen(r1, m3, i4, i2);
1393
sewardj7ee97522011-05-09 21:45:04 +00001394 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001395 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1396 r1, i2, m3, (Int)(Short)i4);
1397}
1398
1399static void
1400s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1401 UChar r1, UChar m3, UShort i4, UChar i2)
1402{
1403 HChar *mnm = irgen(r1, m3, i4, i2);
1404
sewardj7ee97522011-05-09 21:45:04 +00001405 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001406 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1407 (Int)(Char)i2, m3, (Int)(Short)i4);
1408}
1409
1410static void
1411s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1412 UChar r1, UInt i2)
1413{
1414 irgen(r1, i2);
1415}
1416
1417static void
1418s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1419 UChar r1, UInt i2)
1420{
1421 HChar *mnm = irgen(r1, i2);
1422
sewardj7ee97522011-05-09 21:45:04 +00001423 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001424 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1425}
1426
1427static void
1428s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1429 UChar r1, UInt i2)
1430{
1431 HChar *mnm = irgen(r1, i2);
1432
sewardj7ee97522011-05-09 21:45:04 +00001433 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001434 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1435}
1436
1437static void
1438s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1439 UChar r1, UInt i2)
1440{
1441 HChar *mnm = irgen(r1, i2);
1442
sewardj7ee97522011-05-09 21:45:04 +00001443 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001444 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1445}
1446
1447static void
1448s390_format_RIL_UP(HChar *(*irgen)(void),
1449 UChar r1, UInt i2)
1450{
1451 HChar *mnm = irgen();
1452
sewardj7ee97522011-05-09 21:45:04 +00001453 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001454 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1455}
1456
1457static void
1458s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1459 IRTemp op4addr),
1460 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1461{
1462 HChar *mnm;
1463 IRTemp op4addr = newTemp(Ity_I64);
1464
1465 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1466 mkU64(0)));
1467
1468 mnm = irgen(r1, m3, i2, op4addr);
1469
sewardj7ee97522011-05-09 21:45:04 +00001470 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001471 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1472 (Int)(Char)i2, m3, d4, 0, b4);
1473}
1474
1475static void
1476s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1477 IRTemp op4addr),
1478 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1479{
1480 HChar *mnm;
1481 IRTemp op4addr = newTemp(Ity_I64);
1482
1483 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1484 mkU64(0)));
1485
1486 mnm = irgen(r1, m3, i2, op4addr);
1487
sewardj7ee97522011-05-09 21:45:04 +00001488 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001489 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1490 i2, m3, d4, 0, b4);
1491}
1492
1493static void
1494s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1495 UChar r1, UChar r2)
1496{
1497 irgen(r1, r2);
1498}
1499
1500static void
1501s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1502 UChar r1, UChar r2)
1503{
1504 HChar *mnm = irgen(r1, r2);
1505
sewardj7ee97522011-05-09 21:45:04 +00001506 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001507 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1508}
1509
1510static void
1511s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1512 UChar r1, UChar r2)
1513{
1514 HChar *mnm = irgen(r1, r2);
1515
sewardj7ee97522011-05-09 21:45:04 +00001516 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001517 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1518}
1519
1520static void
1521s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1522 UChar r1, UChar r2)
1523{
1524 irgen(r1, r2);
1525}
1526
1527static void
1528s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1529 UChar r1, UChar r2)
1530{
1531 HChar *mnm = irgen(r1, r2);
1532
sewardj7ee97522011-05-09 21:45:04 +00001533 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001534 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1535}
1536
1537static void
1538s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1539 UChar r1, UChar r2)
1540{
1541 HChar *mnm = irgen(r1, r2);
1542
sewardj7ee97522011-05-09 21:45:04 +00001543 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001544 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1545}
1546
1547static void
1548s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1549 UChar r1, UChar r2)
1550{
1551 HChar *mnm = irgen(r1, r2);
1552
sewardj7ee97522011-05-09 21:45:04 +00001553 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001554 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1555}
1556
1557static void
1558s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1559 UChar r1, UChar r2)
1560{
1561 HChar *mnm = irgen(r1, r2);
1562
sewardj7ee97522011-05-09 21:45:04 +00001563 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001564 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1565}
1566
1567static void
1568s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1569 UChar r1)
1570{
1571 HChar *mnm = irgen(r1);
1572
sewardj7ee97522011-05-09 21:45:04 +00001573 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001574 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1575}
1576
1577static void
1578s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1579 UChar r1)
1580{
1581 HChar *mnm = irgen(r1);
1582
sewardj7ee97522011-05-09 21:45:04 +00001583 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001584 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1585}
1586
1587static void
1588s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1589 UChar r1, UChar r3, UChar r2)
1590{
1591 HChar *mnm = irgen(r1, r3, r2);
1592
sewardj7ee97522011-05-09 21:45:04 +00001593 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001594 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1595}
1596
1597static void
sewardjd7bde722011-04-05 13:19:33 +00001598s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1599 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1600{
1601 irgen(m3, r1, r2);
1602
sewardj7ee97522011-05-09 21:45:04 +00001603 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001604 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1605}
1606
1607static void
sewardj2019a972011-03-07 16:04:07 +00001608s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1609 UChar r3, UChar r1, UChar r2)
1610{
1611 HChar *mnm = irgen(r3, r1, r2);
1612
sewardj7ee97522011-05-09 21:45:04 +00001613 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001614 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1615}
1616
1617static void
1618s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1619 UChar r3, UChar r1, UChar r2)
1620{
1621 HChar *mnm = irgen(r3, r1, r2);
1622
sewardj7ee97522011-05-09 21:45:04 +00001623 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001624 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1625}
1626
1627static void
1628s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1629 UChar r3, UChar r1, UChar r2)
1630{
1631 HChar *mnm = irgen(r3, r1, r2);
1632
sewardj7ee97522011-05-09 21:45:04 +00001633 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001634 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1635}
1636
1637static void
1638s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1639 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1640{
1641 HChar *mnm;
1642 IRTemp op4addr = newTemp(Ity_I64);
1643
1644 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1645 mkU64(0)));
1646
1647 mnm = irgen(r1, r2, m3, op4addr);
1648
sewardj7ee97522011-05-09 21:45:04 +00001649 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001650 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1651 r2, m3, d4, 0, b4);
1652}
1653
1654static void
1655s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1656 UChar r1, UChar b2, UShort d2)
1657{
1658 HChar *mnm;
1659 IRTemp op2addr = newTemp(Ity_I64);
1660
1661 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1662 mkU64(0)));
1663
1664 mnm = irgen(r1, op2addr);
1665
sewardj7ee97522011-05-09 21:45:04 +00001666 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001667 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1668}
1669
1670static void
1671s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1672 UChar r1, UChar r3, UChar b2, UShort d2)
1673{
1674 HChar *mnm;
1675 IRTemp op2addr = newTemp(Ity_I64);
1676
1677 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1678 mkU64(0)));
1679
1680 mnm = irgen(r1, r3, op2addr);
1681
sewardj7ee97522011-05-09 21:45:04 +00001682 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001683 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1684}
1685
1686static void
1687s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1688 UChar r1, UChar r3, UChar b2, UShort d2)
1689{
1690 HChar *mnm;
1691 IRTemp op2addr = newTemp(Ity_I64);
1692
1693 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1694 mkU64(0)));
1695
1696 mnm = irgen(r1, r3, op2addr);
1697
sewardj7ee97522011-05-09 21:45:04 +00001698 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001699 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1700}
1701
1702static void
1703s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1704 UChar r1, UChar r3, UChar b2, UShort d2)
1705{
1706 HChar *mnm;
1707 IRTemp op2addr = newTemp(Ity_I64);
1708
1709 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1710 mkU64(0)));
1711
1712 mnm = irgen(r1, r3, op2addr);
1713
sewardj7ee97522011-05-09 21:45:04 +00001714 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001715 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1716}
1717
1718static void
1719s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1720 UChar r1, UChar r3, UShort i2)
1721{
1722 HChar *mnm = irgen(r1, r3, i2);
1723
sewardj7ee97522011-05-09 21:45:04 +00001724 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001725 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1726}
1727
1728static void
1729s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1730 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1731{
1732 HChar *mnm;
1733 IRTemp op2addr = newTemp(Ity_I64);
1734 IRTemp d2 = newTemp(Ity_I64);
1735
1736 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1737 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1738 mkU64(0)));
1739
1740 mnm = irgen(r1, r3, op2addr);
1741
sewardj7ee97522011-05-09 21:45:04 +00001742 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001743 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1744}
1745
1746static void
1747s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1748 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1749{
1750 HChar *mnm;
1751 IRTemp op2addr = newTemp(Ity_I64);
1752 IRTemp d2 = newTemp(Ity_I64);
1753
1754 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1755 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1756 mkU64(0)));
1757
1758 mnm = irgen(r1, r3, op2addr);
1759
sewardj7ee97522011-05-09 21:45:04 +00001760 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001761 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1762}
1763
1764static void
1765s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1766 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1767{
1768 HChar *mnm;
1769 IRTemp op2addr = newTemp(Ity_I64);
1770 IRTemp d2 = newTemp(Ity_I64);
1771
1772 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1773 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1774 mkU64(0)));
1775
1776 mnm = irgen(r1, r3, op2addr);
1777
sewardj7ee97522011-05-09 21:45:04 +00001778 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001779 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1780}
1781
1782static void
sewardjd7bde722011-04-05 13:19:33 +00001783s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1784 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1785 Int xmnm_kind)
1786{
1787 IRTemp op2addr = newTemp(Ity_I64);
1788 IRTemp d2 = newTemp(Ity_I64);
1789
1790 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1791 guest_IA_next_instr);
1792 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1793 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1794 mkU64(0)));
1795
1796 irgen(r1, op2addr);
1797
sewardj7ee97522011-05-09 21:45:04 +00001798 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001799 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1800}
1801
1802static void
sewardj2019a972011-03-07 16:04:07 +00001803s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1804 IRTemp op2addr),
1805 UChar r1, UChar x2, UChar b2, UShort d2)
1806{
1807 IRTemp op2addr = newTemp(Ity_I64);
1808
1809 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1810 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1811 mkU64(0)));
1812
1813 irgen(r1, x2, b2, d2, op2addr);
1814}
1815
1816static void
1817s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1818 UChar r1, UChar x2, UChar b2, UShort d2)
1819{
1820 HChar *mnm;
1821 IRTemp op2addr = newTemp(Ity_I64);
1822
1823 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1824 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1825 mkU64(0)));
1826
1827 mnm = irgen(r1, op2addr);
1828
sewardj7ee97522011-05-09 21:45:04 +00001829 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001830 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1831}
1832
1833static void
1834s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1835 UChar r1, UChar x2, UChar b2, UShort d2)
1836{
1837 HChar *mnm;
1838 IRTemp op2addr = newTemp(Ity_I64);
1839
1840 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1841 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1842 mkU64(0)));
1843
1844 mnm = irgen(r1, op2addr);
1845
sewardj7ee97522011-05-09 21:45:04 +00001846 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001847 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1848}
1849
1850static void
1851s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1852 UChar r1, UChar x2, UChar b2, UShort d2)
1853{
1854 HChar *mnm;
1855 IRTemp op2addr = newTemp(Ity_I64);
1856
1857 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1858 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1859 mkU64(0)));
1860
1861 mnm = irgen(r1, op2addr);
1862
sewardj7ee97522011-05-09 21:45:04 +00001863 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001864 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1865}
1866
1867static void
1868s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1869 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1870{
1871 HChar *mnm;
1872 IRTemp op2addr = newTemp(Ity_I64);
1873
1874 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1875 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1876 mkU64(0)));
1877
1878 mnm = irgen(r3, op2addr, r1);
1879
sewardj7ee97522011-05-09 21:45:04 +00001880 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001881 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1882}
1883
1884static void
1885s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1886 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1887{
1888 HChar *mnm;
1889 IRTemp op2addr = newTemp(Ity_I64);
1890 IRTemp d2 = newTemp(Ity_I64);
1891
1892 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1893 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1894 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1895 mkU64(0)));
1896
1897 mnm = irgen(r1, op2addr);
1898
sewardj7ee97522011-05-09 21:45:04 +00001899 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001900 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1901}
1902
1903static void
1904s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1905 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1906{
1907 HChar *mnm;
1908 IRTemp op2addr = newTemp(Ity_I64);
1909 IRTemp d2 = newTemp(Ity_I64);
1910
1911 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1912 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1913 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1914 mkU64(0)));
1915
1916 mnm = irgen(r1, op2addr);
1917
sewardj7ee97522011-05-09 21:45:04 +00001918 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001919 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1920}
1921
1922static void
1923s390_format_RXY_URRD(HChar *(*irgen)(void),
1924 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1925{
1926 HChar *mnm;
1927 IRTemp op2addr = newTemp(Ity_I64);
1928 IRTemp d2 = newTemp(Ity_I64);
1929
1930 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1931 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1932 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1933 mkU64(0)));
1934
1935 mnm = irgen();
1936
sewardj7ee97522011-05-09 21:45:04 +00001937 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001938 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1939}
1940
1941static void
1942s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1943 UChar b2, UShort d2)
1944{
1945 HChar *mnm;
1946 IRTemp op2addr = newTemp(Ity_I64);
1947
1948 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1949 mkU64(0)));
1950
1951 mnm = irgen(op2addr);
1952
sewardj7ee97522011-05-09 21:45:04 +00001953 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001954 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1955}
1956
1957static void
1958s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1959 UChar i2, UChar b1, UShort d1)
1960{
1961 HChar *mnm;
1962 IRTemp op1addr = newTemp(Ity_I64);
1963
1964 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1965 mkU64(0)));
1966
1967 mnm = irgen(i2, op1addr);
1968
sewardj7ee97522011-05-09 21:45:04 +00001969 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001970 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
1971}
1972
1973static void
1974s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1975 UChar i2, UChar b1, UShort dl1, UChar dh1)
1976{
1977 HChar *mnm;
1978 IRTemp op1addr = newTemp(Ity_I64);
1979 IRTemp d1 = newTemp(Ity_I64);
1980
1981 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1982 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1983 mkU64(0)));
1984
1985 mnm = irgen(i2, op1addr);
1986
sewardj7ee97522011-05-09 21:45:04 +00001987 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001988 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
1989}
1990
1991static void
1992s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1993 UChar i2, UChar b1, UShort dl1, UChar dh1)
1994{
1995 HChar *mnm;
1996 IRTemp op1addr = newTemp(Ity_I64);
1997 IRTemp d1 = newTemp(Ity_I64);
1998
1999 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2000 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2001 mkU64(0)));
2002
2003 mnm = irgen(i2, op1addr);
2004
sewardj7ee97522011-05-09 21:45:04 +00002005 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002006 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
2007}
2008
2009static void
2010s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
2011 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
2012{
2013 HChar *mnm;
2014 IRTemp op1addr = newTemp(Ity_I64);
2015 IRTemp op2addr = newTemp(Ity_I64);
2016
2017 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2018 mkU64(0)));
2019 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
2020 mkU64(0)));
2021
2022 mnm = irgen(l, op1addr, op2addr);
2023
sewardj7ee97522011-05-09 21:45:04 +00002024 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002025 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
2026}
2027
2028static void
2029s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2030 UChar b1, UShort d1, UShort i2)
2031{
2032 HChar *mnm;
2033 IRTemp op1addr = newTemp(Ity_I64);
2034
2035 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2036 mkU64(0)));
2037
2038 mnm = irgen(i2, op1addr);
2039
sewardj7ee97522011-05-09 21:45:04 +00002040 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002041 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2042}
2043
2044static void
2045s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2046 UChar b1, UShort d1, UShort i2)
2047{
2048 HChar *mnm;
2049 IRTemp op1addr = newTemp(Ity_I64);
2050
2051 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2052 mkU64(0)));
2053
2054 mnm = irgen(i2, op1addr);
2055
sewardj7ee97522011-05-09 21:45:04 +00002056 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002057 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2058}
2059
2060
2061
2062/*------------------------------------------------------------*/
2063/*--- Build IR for opcodes ---*/
2064/*------------------------------------------------------------*/
2065
2066static HChar *
2067s390_irgen_AR(UChar r1, UChar r2)
2068{
2069 IRTemp op1 = newTemp(Ity_I32);
2070 IRTemp op2 = newTemp(Ity_I32);
2071 IRTemp result = newTemp(Ity_I32);
2072
2073 assign(op1, get_gpr_w1(r1));
2074 assign(op2, get_gpr_w1(r2));
2075 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2076 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2077 put_gpr_w1(r1, mkexpr(result));
2078
2079 return "ar";
2080}
2081
2082static HChar *
2083s390_irgen_AGR(UChar r1, UChar r2)
2084{
2085 IRTemp op1 = newTemp(Ity_I64);
2086 IRTemp op2 = newTemp(Ity_I64);
2087 IRTemp result = newTemp(Ity_I64);
2088
2089 assign(op1, get_gpr_dw0(r1));
2090 assign(op2, get_gpr_dw0(r2));
2091 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2092 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2093 put_gpr_dw0(r1, mkexpr(result));
2094
2095 return "agr";
2096}
2097
2098static HChar *
2099s390_irgen_AGFR(UChar r1, UChar r2)
2100{
2101 IRTemp op1 = newTemp(Ity_I64);
2102 IRTemp op2 = newTemp(Ity_I64);
2103 IRTemp result = newTemp(Ity_I64);
2104
2105 assign(op1, get_gpr_dw0(r1));
2106 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2107 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2108 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2109 put_gpr_dw0(r1, mkexpr(result));
2110
2111 return "agfr";
2112}
2113
2114static HChar *
2115s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2116{
2117 IRTemp op2 = newTemp(Ity_I32);
2118 IRTemp op3 = newTemp(Ity_I32);
2119 IRTemp result = newTemp(Ity_I32);
2120
2121 assign(op2, get_gpr_w1(r2));
2122 assign(op3, get_gpr_w1(r3));
2123 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2124 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2125 put_gpr_w1(r1, mkexpr(result));
2126
2127 return "ark";
2128}
2129
2130static HChar *
2131s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2132{
2133 IRTemp op2 = newTemp(Ity_I64);
2134 IRTemp op3 = newTemp(Ity_I64);
2135 IRTemp result = newTemp(Ity_I64);
2136
2137 assign(op2, get_gpr_dw0(r2));
2138 assign(op3, get_gpr_dw0(r3));
2139 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2140 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2141 put_gpr_dw0(r1, mkexpr(result));
2142
2143 return "agrk";
2144}
2145
2146static HChar *
2147s390_irgen_A(UChar r1, IRTemp op2addr)
2148{
2149 IRTemp op1 = newTemp(Ity_I32);
2150 IRTemp op2 = newTemp(Ity_I32);
2151 IRTemp result = newTemp(Ity_I32);
2152
2153 assign(op1, get_gpr_w1(r1));
2154 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2155 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2156 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2157 put_gpr_w1(r1, mkexpr(result));
2158
2159 return "a";
2160}
2161
2162static HChar *
2163s390_irgen_AY(UChar r1, IRTemp op2addr)
2164{
2165 IRTemp op1 = newTemp(Ity_I32);
2166 IRTemp op2 = newTemp(Ity_I32);
2167 IRTemp result = newTemp(Ity_I32);
2168
2169 assign(op1, get_gpr_w1(r1));
2170 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2171 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2172 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2173 put_gpr_w1(r1, mkexpr(result));
2174
2175 return "ay";
2176}
2177
2178static HChar *
2179s390_irgen_AG(UChar r1, IRTemp op2addr)
2180{
2181 IRTemp op1 = newTemp(Ity_I64);
2182 IRTemp op2 = newTemp(Ity_I64);
2183 IRTemp result = newTemp(Ity_I64);
2184
2185 assign(op1, get_gpr_dw0(r1));
2186 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2187 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2188 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2189 put_gpr_dw0(r1, mkexpr(result));
2190
2191 return "ag";
2192}
2193
2194static HChar *
2195s390_irgen_AGF(UChar r1, IRTemp op2addr)
2196{
2197 IRTemp op1 = newTemp(Ity_I64);
2198 IRTemp op2 = newTemp(Ity_I64);
2199 IRTemp result = newTemp(Ity_I64);
2200
2201 assign(op1, get_gpr_dw0(r1));
2202 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2203 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2204 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2205 put_gpr_dw0(r1, mkexpr(result));
2206
2207 return "agf";
2208}
2209
2210static HChar *
2211s390_irgen_AFI(UChar r1, UInt i2)
2212{
2213 IRTemp op1 = newTemp(Ity_I32);
2214 Int op2;
2215 IRTemp result = newTemp(Ity_I32);
2216
2217 assign(op1, get_gpr_w1(r1));
2218 op2 = (Int)i2;
2219 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2220 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2221 mkU32((UInt)op2)));
2222 put_gpr_w1(r1, mkexpr(result));
2223
2224 return "afi";
2225}
2226
2227static HChar *
2228s390_irgen_AGFI(UChar r1, UInt i2)
2229{
2230 IRTemp op1 = newTemp(Ity_I64);
2231 Long op2;
2232 IRTemp result = newTemp(Ity_I64);
2233
2234 assign(op1, get_gpr_dw0(r1));
2235 op2 = (Long)(Int)i2;
2236 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2237 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2238 mkU64((ULong)op2)));
2239 put_gpr_dw0(r1, mkexpr(result));
2240
2241 return "agfi";
2242}
2243
2244static HChar *
2245s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2246{
2247 Int op2;
2248 IRTemp op3 = newTemp(Ity_I32);
2249 IRTemp result = newTemp(Ity_I32);
2250
2251 op2 = (Int)(Short)i2;
2252 assign(op3, get_gpr_w1(r3));
2253 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2254 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2255 op2)), op3);
2256 put_gpr_w1(r1, mkexpr(result));
2257
2258 return "ahik";
2259}
2260
2261static HChar *
2262s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2263{
2264 Long op2;
2265 IRTemp op3 = newTemp(Ity_I64);
2266 IRTemp result = newTemp(Ity_I64);
2267
2268 op2 = (Long)(Short)i2;
2269 assign(op3, get_gpr_dw0(r3));
2270 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2271 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2272 op2)), op3);
2273 put_gpr_dw0(r1, mkexpr(result));
2274
2275 return "aghik";
2276}
2277
2278static HChar *
2279s390_irgen_ASI(UChar i2, IRTemp op1addr)
2280{
2281 IRTemp op1 = newTemp(Ity_I32);
2282 Int op2;
2283 IRTemp result = newTemp(Ity_I32);
2284
2285 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2286 op2 = (Int)(Char)i2;
2287 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2288 store(mkexpr(op1addr), mkexpr(result));
2289 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2290 mkU32((UInt)op2)));
2291
2292 return "asi";
2293}
2294
2295static HChar *
2296s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2297{
2298 IRTemp op1 = newTemp(Ity_I64);
2299 Long op2;
2300 IRTemp result = newTemp(Ity_I64);
2301
2302 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2303 op2 = (Long)(Char)i2;
2304 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2305 store(mkexpr(op1addr), mkexpr(result));
2306 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2307 mkU64((ULong)op2)));
2308
2309 return "agsi";
2310}
2311
2312static HChar *
2313s390_irgen_AH(UChar r1, IRTemp op2addr)
2314{
2315 IRTemp op1 = newTemp(Ity_I32);
2316 IRTemp op2 = newTemp(Ity_I32);
2317 IRTemp result = newTemp(Ity_I32);
2318
2319 assign(op1, get_gpr_w1(r1));
2320 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2321 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2322 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2323 put_gpr_w1(r1, mkexpr(result));
2324
2325 return "ah";
2326}
2327
2328static HChar *
2329s390_irgen_AHY(UChar r1, IRTemp op2addr)
2330{
2331 IRTemp op1 = newTemp(Ity_I32);
2332 IRTemp op2 = newTemp(Ity_I32);
2333 IRTemp result = newTemp(Ity_I32);
2334
2335 assign(op1, get_gpr_w1(r1));
2336 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2337 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2338 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2339 put_gpr_w1(r1, mkexpr(result));
2340
2341 return "ahy";
2342}
2343
2344static HChar *
2345s390_irgen_AHI(UChar r1, UShort i2)
2346{
2347 IRTemp op1 = newTemp(Ity_I32);
2348 Int op2;
2349 IRTemp result = newTemp(Ity_I32);
2350
2351 assign(op1, get_gpr_w1(r1));
2352 op2 = (Int)(Short)i2;
2353 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2354 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2355 mkU32((UInt)op2)));
2356 put_gpr_w1(r1, mkexpr(result));
2357
2358 return "ahi";
2359}
2360
2361static HChar *
2362s390_irgen_AGHI(UChar r1, UShort i2)
2363{
2364 IRTemp op1 = newTemp(Ity_I64);
2365 Long op2;
2366 IRTemp result = newTemp(Ity_I64);
2367
2368 assign(op1, get_gpr_dw0(r1));
2369 op2 = (Long)(Short)i2;
2370 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2371 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2372 mkU64((ULong)op2)));
2373 put_gpr_dw0(r1, mkexpr(result));
2374
2375 return "aghi";
2376}
2377
2378static HChar *
2379s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2380{
2381 IRTemp op2 = newTemp(Ity_I32);
2382 IRTemp op3 = newTemp(Ity_I32);
2383 IRTemp result = newTemp(Ity_I32);
2384
2385 assign(op2, get_gpr_w0(r2));
2386 assign(op3, get_gpr_w0(r3));
2387 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2388 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2389 put_gpr_w0(r1, mkexpr(result));
2390
2391 return "ahhhr";
2392}
2393
2394static HChar *
2395s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2396{
2397 IRTemp op2 = newTemp(Ity_I32);
2398 IRTemp op3 = newTemp(Ity_I32);
2399 IRTemp result = newTemp(Ity_I32);
2400
2401 assign(op2, get_gpr_w0(r2));
2402 assign(op3, get_gpr_w1(r3));
2403 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2404 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2405 put_gpr_w0(r1, mkexpr(result));
2406
2407 return "ahhlr";
2408}
2409
2410static HChar *
2411s390_irgen_AIH(UChar r1, UInt i2)
2412{
2413 IRTemp op1 = newTemp(Ity_I32);
2414 Int op2;
2415 IRTemp result = newTemp(Ity_I32);
2416
2417 assign(op1, get_gpr_w0(r1));
2418 op2 = (Int)i2;
2419 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2420 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2421 mkU32((UInt)op2)));
2422 put_gpr_w0(r1, mkexpr(result));
2423
2424 return "aih";
2425}
2426
2427static HChar *
2428s390_irgen_ALR(UChar r1, UChar r2)
2429{
2430 IRTemp op1 = newTemp(Ity_I32);
2431 IRTemp op2 = newTemp(Ity_I32);
2432 IRTemp result = newTemp(Ity_I32);
2433
2434 assign(op1, get_gpr_w1(r1));
2435 assign(op2, get_gpr_w1(r2));
2436 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2437 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2438 put_gpr_w1(r1, mkexpr(result));
2439
2440 return "alr";
2441}
2442
2443static HChar *
2444s390_irgen_ALGR(UChar r1, UChar r2)
2445{
2446 IRTemp op1 = newTemp(Ity_I64);
2447 IRTemp op2 = newTemp(Ity_I64);
2448 IRTemp result = newTemp(Ity_I64);
2449
2450 assign(op1, get_gpr_dw0(r1));
2451 assign(op2, get_gpr_dw0(r2));
2452 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2453 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2454 put_gpr_dw0(r1, mkexpr(result));
2455
2456 return "algr";
2457}
2458
2459static HChar *
2460s390_irgen_ALGFR(UChar r1, UChar r2)
2461{
2462 IRTemp op1 = newTemp(Ity_I64);
2463 IRTemp op2 = newTemp(Ity_I64);
2464 IRTemp result = newTemp(Ity_I64);
2465
2466 assign(op1, get_gpr_dw0(r1));
2467 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2468 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2469 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2470 put_gpr_dw0(r1, mkexpr(result));
2471
2472 return "algfr";
2473}
2474
2475static HChar *
2476s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2477{
2478 IRTemp op2 = newTemp(Ity_I32);
2479 IRTemp op3 = newTemp(Ity_I32);
2480 IRTemp result = newTemp(Ity_I32);
2481
2482 assign(op2, get_gpr_w1(r2));
2483 assign(op3, get_gpr_w1(r3));
2484 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2485 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2486 put_gpr_w1(r1, mkexpr(result));
2487
2488 return "alrk";
2489}
2490
2491static HChar *
2492s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2493{
2494 IRTemp op2 = newTemp(Ity_I64);
2495 IRTemp op3 = newTemp(Ity_I64);
2496 IRTemp result = newTemp(Ity_I64);
2497
2498 assign(op2, get_gpr_dw0(r2));
2499 assign(op3, get_gpr_dw0(r3));
2500 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2501 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2502 put_gpr_dw0(r1, mkexpr(result));
2503
2504 return "algrk";
2505}
2506
2507static HChar *
2508s390_irgen_AL(UChar r1, IRTemp op2addr)
2509{
2510 IRTemp op1 = newTemp(Ity_I32);
2511 IRTemp op2 = newTemp(Ity_I32);
2512 IRTemp result = newTemp(Ity_I32);
2513
2514 assign(op1, get_gpr_w1(r1));
2515 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2516 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2517 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2518 put_gpr_w1(r1, mkexpr(result));
2519
2520 return "al";
2521}
2522
2523static HChar *
2524s390_irgen_ALY(UChar r1, IRTemp op2addr)
2525{
2526 IRTemp op1 = newTemp(Ity_I32);
2527 IRTemp op2 = newTemp(Ity_I32);
2528 IRTemp result = newTemp(Ity_I32);
2529
2530 assign(op1, get_gpr_w1(r1));
2531 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2532 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2533 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2534 put_gpr_w1(r1, mkexpr(result));
2535
2536 return "aly";
2537}
2538
2539static HChar *
2540s390_irgen_ALG(UChar r1, IRTemp op2addr)
2541{
2542 IRTemp op1 = newTemp(Ity_I64);
2543 IRTemp op2 = newTemp(Ity_I64);
2544 IRTemp result = newTemp(Ity_I64);
2545
2546 assign(op1, get_gpr_dw0(r1));
2547 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2548 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2549 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2550 put_gpr_dw0(r1, mkexpr(result));
2551
2552 return "alg";
2553}
2554
2555static HChar *
2556s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2557{
2558 IRTemp op1 = newTemp(Ity_I64);
2559 IRTemp op2 = newTemp(Ity_I64);
2560 IRTemp result = newTemp(Ity_I64);
2561
2562 assign(op1, get_gpr_dw0(r1));
2563 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2564 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2565 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2566 put_gpr_dw0(r1, mkexpr(result));
2567
2568 return "algf";
2569}
2570
2571static HChar *
2572s390_irgen_ALFI(UChar r1, UInt i2)
2573{
2574 IRTemp op1 = newTemp(Ity_I32);
2575 UInt op2;
2576 IRTemp result = newTemp(Ity_I32);
2577
2578 assign(op1, get_gpr_w1(r1));
2579 op2 = i2;
2580 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2581 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2582 mkU32(op2)));
2583 put_gpr_w1(r1, mkexpr(result));
2584
2585 return "alfi";
2586}
2587
2588static HChar *
2589s390_irgen_ALGFI(UChar r1, UInt i2)
2590{
2591 IRTemp op1 = newTemp(Ity_I64);
2592 ULong op2;
2593 IRTemp result = newTemp(Ity_I64);
2594
2595 assign(op1, get_gpr_dw0(r1));
2596 op2 = (ULong)i2;
2597 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2598 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2599 mkU64(op2)));
2600 put_gpr_dw0(r1, mkexpr(result));
2601
2602 return "algfi";
2603}
2604
2605static HChar *
2606s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2607{
2608 IRTemp op2 = newTemp(Ity_I32);
2609 IRTemp op3 = newTemp(Ity_I32);
2610 IRTemp result = newTemp(Ity_I32);
2611
2612 assign(op2, get_gpr_w0(r2));
2613 assign(op3, get_gpr_w0(r3));
2614 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2615 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2616 put_gpr_w0(r1, mkexpr(result));
2617
2618 return "alhhhr";
2619}
2620
2621static HChar *
2622s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2623{
2624 IRTemp op2 = newTemp(Ity_I32);
2625 IRTemp op3 = newTemp(Ity_I32);
2626 IRTemp result = newTemp(Ity_I32);
2627
2628 assign(op2, get_gpr_w0(r2));
2629 assign(op3, get_gpr_w1(r3));
2630 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2631 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2632 put_gpr_w0(r1, mkexpr(result));
2633
2634 return "alhhlr";
2635}
2636
2637static HChar *
2638s390_irgen_ALCR(UChar r1, UChar r2)
2639{
2640 IRTemp op1 = newTemp(Ity_I32);
2641 IRTemp op2 = newTemp(Ity_I32);
2642 IRTemp result = newTemp(Ity_I32);
2643 IRTemp carry_in = newTemp(Ity_I32);
2644
2645 assign(op1, get_gpr_w1(r1));
2646 assign(op2, get_gpr_w1(r2));
2647 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2648 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2649 mkexpr(carry_in)));
2650 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2651 put_gpr_w1(r1, mkexpr(result));
2652
2653 return "alcr";
2654}
2655
2656static HChar *
2657s390_irgen_ALCGR(UChar r1, UChar r2)
2658{
2659 IRTemp op1 = newTemp(Ity_I64);
2660 IRTemp op2 = newTemp(Ity_I64);
2661 IRTemp result = newTemp(Ity_I64);
2662 IRTemp carry_in = newTemp(Ity_I64);
2663
2664 assign(op1, get_gpr_dw0(r1));
2665 assign(op2, get_gpr_dw0(r2));
2666 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2667 mkU8(1))));
2668 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2669 mkexpr(carry_in)));
2670 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2671 put_gpr_dw0(r1, mkexpr(result));
2672
2673 return "alcgr";
2674}
2675
2676static HChar *
2677s390_irgen_ALC(UChar r1, IRTemp op2addr)
2678{
2679 IRTemp op1 = newTemp(Ity_I32);
2680 IRTemp op2 = newTemp(Ity_I32);
2681 IRTemp result = newTemp(Ity_I32);
2682 IRTemp carry_in = newTemp(Ity_I32);
2683
2684 assign(op1, get_gpr_w1(r1));
2685 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2686 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2687 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2688 mkexpr(carry_in)));
2689 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2690 put_gpr_w1(r1, mkexpr(result));
2691
2692 return "alc";
2693}
2694
2695static HChar *
2696s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2697{
2698 IRTemp op1 = newTemp(Ity_I64);
2699 IRTemp op2 = newTemp(Ity_I64);
2700 IRTemp result = newTemp(Ity_I64);
2701 IRTemp carry_in = newTemp(Ity_I64);
2702
2703 assign(op1, get_gpr_dw0(r1));
2704 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2705 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2706 mkU8(1))));
2707 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2708 mkexpr(carry_in)));
2709 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2710 put_gpr_dw0(r1, mkexpr(result));
2711
2712 return "alcg";
2713}
2714
2715static HChar *
2716s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2717{
2718 IRTemp op1 = newTemp(Ity_I32);
2719 UInt op2;
2720 IRTemp result = newTemp(Ity_I32);
2721
2722 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2723 op2 = (UInt)(Int)(Char)i2;
2724 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2725 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2726 mkU32(op2)));
2727 store(mkexpr(op1addr), mkexpr(result));
2728
2729 return "alsi";
2730}
2731
2732static HChar *
2733s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2734{
2735 IRTemp op1 = newTemp(Ity_I64);
2736 ULong op2;
2737 IRTemp result = newTemp(Ity_I64);
2738
2739 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2740 op2 = (ULong)(Long)(Char)i2;
2741 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2742 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2743 mkU64(op2)));
2744 store(mkexpr(op1addr), mkexpr(result));
2745
2746 return "algsi";
2747}
2748
2749static HChar *
2750s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2751{
2752 UInt op2;
2753 IRTemp op3 = newTemp(Ity_I32);
2754 IRTemp result = newTemp(Ity_I32);
2755
2756 op2 = (UInt)(Int)(Short)i2;
2757 assign(op3, get_gpr_w1(r3));
2758 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2759 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2760 op3);
2761 put_gpr_w1(r1, mkexpr(result));
2762
2763 return "alhsik";
2764}
2765
2766static HChar *
2767s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2768{
2769 ULong op2;
2770 IRTemp op3 = newTemp(Ity_I64);
2771 IRTemp result = newTemp(Ity_I64);
2772
2773 op2 = (ULong)(Long)(Short)i2;
2774 assign(op3, get_gpr_dw0(r3));
2775 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2776 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2777 op3);
2778 put_gpr_dw0(r1, mkexpr(result));
2779
2780 return "alghsik";
2781}
2782
2783static HChar *
2784s390_irgen_ALSIH(UChar r1, UInt i2)
2785{
2786 IRTemp op1 = newTemp(Ity_I32);
2787 UInt op2;
2788 IRTemp result = newTemp(Ity_I32);
2789
2790 assign(op1, get_gpr_w0(r1));
2791 op2 = i2;
2792 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2793 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2794 mkU32(op2)));
2795 put_gpr_w0(r1, mkexpr(result));
2796
2797 return "alsih";
2798}
2799
2800static HChar *
2801s390_irgen_ALSIHN(UChar r1, UInt i2)
2802{
2803 IRTemp op1 = newTemp(Ity_I32);
2804 UInt op2;
2805 IRTemp result = newTemp(Ity_I32);
2806
2807 assign(op1, get_gpr_w0(r1));
2808 op2 = i2;
2809 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2810 put_gpr_w0(r1, mkexpr(result));
2811
2812 return "alsihn";
2813}
2814
2815static HChar *
2816s390_irgen_NR(UChar r1, UChar r2)
2817{
2818 IRTemp op1 = newTemp(Ity_I32);
2819 IRTemp op2 = newTemp(Ity_I32);
2820 IRTemp result = newTemp(Ity_I32);
2821
2822 assign(op1, get_gpr_w1(r1));
2823 assign(op2, get_gpr_w1(r2));
2824 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2825 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2826 put_gpr_w1(r1, mkexpr(result));
2827
2828 return "nr";
2829}
2830
2831static HChar *
2832s390_irgen_NGR(UChar r1, UChar r2)
2833{
2834 IRTemp op1 = newTemp(Ity_I64);
2835 IRTemp op2 = newTemp(Ity_I64);
2836 IRTemp result = newTemp(Ity_I64);
2837
2838 assign(op1, get_gpr_dw0(r1));
2839 assign(op2, get_gpr_dw0(r2));
2840 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2841 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2842 put_gpr_dw0(r1, mkexpr(result));
2843
2844 return "ngr";
2845}
2846
2847static HChar *
2848s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2849{
2850 IRTemp op2 = newTemp(Ity_I32);
2851 IRTemp op3 = newTemp(Ity_I32);
2852 IRTemp result = newTemp(Ity_I32);
2853
2854 assign(op2, get_gpr_w1(r2));
2855 assign(op3, get_gpr_w1(r3));
2856 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2857 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2858 put_gpr_w1(r1, mkexpr(result));
2859
2860 return "nrk";
2861}
2862
2863static HChar *
2864s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2865{
2866 IRTemp op2 = newTemp(Ity_I64);
2867 IRTemp op3 = newTemp(Ity_I64);
2868 IRTemp result = newTemp(Ity_I64);
2869
2870 assign(op2, get_gpr_dw0(r2));
2871 assign(op3, get_gpr_dw0(r3));
2872 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2873 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2874 put_gpr_dw0(r1, mkexpr(result));
2875
2876 return "ngrk";
2877}
2878
2879static HChar *
2880s390_irgen_N(UChar r1, IRTemp op2addr)
2881{
2882 IRTemp op1 = newTemp(Ity_I32);
2883 IRTemp op2 = newTemp(Ity_I32);
2884 IRTemp result = newTemp(Ity_I32);
2885
2886 assign(op1, get_gpr_w1(r1));
2887 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2888 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2889 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2890 put_gpr_w1(r1, mkexpr(result));
2891
2892 return "n";
2893}
2894
2895static HChar *
2896s390_irgen_NY(UChar r1, IRTemp op2addr)
2897{
2898 IRTemp op1 = newTemp(Ity_I32);
2899 IRTemp op2 = newTemp(Ity_I32);
2900 IRTemp result = newTemp(Ity_I32);
2901
2902 assign(op1, get_gpr_w1(r1));
2903 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2904 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2905 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2906 put_gpr_w1(r1, mkexpr(result));
2907
2908 return "ny";
2909}
2910
2911static HChar *
2912s390_irgen_NG(UChar r1, IRTemp op2addr)
2913{
2914 IRTemp op1 = newTemp(Ity_I64);
2915 IRTemp op2 = newTemp(Ity_I64);
2916 IRTemp result = newTemp(Ity_I64);
2917
2918 assign(op1, get_gpr_dw0(r1));
2919 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2920 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2921 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2922 put_gpr_dw0(r1, mkexpr(result));
2923
2924 return "ng";
2925}
2926
2927static HChar *
2928s390_irgen_NI(UChar i2, IRTemp op1addr)
2929{
2930 IRTemp op1 = newTemp(Ity_I8);
2931 UChar op2;
2932 IRTemp result = newTemp(Ity_I8);
2933
2934 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2935 op2 = i2;
2936 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2937 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2938 store(mkexpr(op1addr), mkexpr(result));
2939
2940 return "ni";
2941}
2942
2943static HChar *
2944s390_irgen_NIY(UChar i2, IRTemp op1addr)
2945{
2946 IRTemp op1 = newTemp(Ity_I8);
2947 UChar op2;
2948 IRTemp result = newTemp(Ity_I8);
2949
2950 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2951 op2 = i2;
2952 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2953 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2954 store(mkexpr(op1addr), mkexpr(result));
2955
2956 return "niy";
2957}
2958
2959static HChar *
2960s390_irgen_NIHF(UChar r1, UInt i2)
2961{
2962 IRTemp op1 = newTemp(Ity_I32);
2963 UInt op2;
2964 IRTemp result = newTemp(Ity_I32);
2965
2966 assign(op1, get_gpr_w0(r1));
2967 op2 = i2;
2968 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2969 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2970 put_gpr_w0(r1, mkexpr(result));
2971
2972 return "nihf";
2973}
2974
2975static HChar *
2976s390_irgen_NIHH(UChar r1, UShort i2)
2977{
2978 IRTemp op1 = newTemp(Ity_I16);
2979 UShort op2;
2980 IRTemp result = newTemp(Ity_I16);
2981
2982 assign(op1, get_gpr_hw0(r1));
2983 op2 = i2;
2984 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2985 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2986 put_gpr_hw0(r1, mkexpr(result));
2987
2988 return "nihh";
2989}
2990
2991static HChar *
2992s390_irgen_NIHL(UChar r1, UShort i2)
2993{
2994 IRTemp op1 = newTemp(Ity_I16);
2995 UShort op2;
2996 IRTemp result = newTemp(Ity_I16);
2997
2998 assign(op1, get_gpr_hw1(r1));
2999 op2 = i2;
3000 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3001 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3002 put_gpr_hw1(r1, mkexpr(result));
3003
3004 return "nihl";
3005}
3006
3007static HChar *
3008s390_irgen_NILF(UChar r1, UInt i2)
3009{
3010 IRTemp op1 = newTemp(Ity_I32);
3011 UInt op2;
3012 IRTemp result = newTemp(Ity_I32);
3013
3014 assign(op1, get_gpr_w1(r1));
3015 op2 = i2;
3016 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3017 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3018 put_gpr_w1(r1, mkexpr(result));
3019
3020 return "nilf";
3021}
3022
3023static HChar *
3024s390_irgen_NILH(UChar r1, UShort i2)
3025{
3026 IRTemp op1 = newTemp(Ity_I16);
3027 UShort op2;
3028 IRTemp result = newTemp(Ity_I16);
3029
3030 assign(op1, get_gpr_hw2(r1));
3031 op2 = i2;
3032 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3033 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3034 put_gpr_hw2(r1, mkexpr(result));
3035
3036 return "nilh";
3037}
3038
3039static HChar *
3040s390_irgen_NILL(UChar r1, UShort i2)
3041{
3042 IRTemp op1 = newTemp(Ity_I16);
3043 UShort op2;
3044 IRTemp result = newTemp(Ity_I16);
3045
3046 assign(op1, get_gpr_hw3(r1));
3047 op2 = i2;
3048 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3049 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3050 put_gpr_hw3(r1, mkexpr(result));
3051
3052 return "nill";
3053}
3054
3055static HChar *
3056s390_irgen_BASR(UChar r1, UChar r2)
3057{
3058 IRTemp target = newTemp(Ity_I64);
3059
3060 if (r2 == 0) {
3061 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3062 } else {
3063 if (r1 != r2) {
3064 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3065 call_function(get_gpr_dw0(r2));
3066 } else {
3067 assign(target, get_gpr_dw0(r2));
3068 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3069 call_function(mkexpr(target));
3070 }
3071 }
3072
3073 return "basr";
3074}
3075
3076static HChar *
3077s390_irgen_BAS(UChar r1, IRTemp op2addr)
3078{
3079 IRTemp target = newTemp(Ity_I64);
3080
3081 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3082 assign(target, mkexpr(op2addr));
3083 call_function(mkexpr(target));
3084
3085 return "bas";
3086}
3087
3088static HChar *
3089s390_irgen_BCR(UChar r1, UChar r2)
3090{
3091 IRTemp cond = newTemp(Ity_I32);
3092
sewardja52e37e2011-04-28 18:48:06 +00003093 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3094 stmt(IRStmt_MBE(Imbe_Fence));
3095 }
3096
sewardj2019a972011-03-07 16:04:07 +00003097 if ((r2 == 0) || (r1 == 0)) {
3098 } else {
3099 if (r1 == 15) {
3100 return_from_function(get_gpr_dw0(r2));
3101 } else {
3102 assign(cond, s390_call_calculate_cond(r1));
3103 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3104 mkU32(0)), get_gpr_dw0(r2));
3105 }
3106 }
sewardj7ee97522011-05-09 21:45:04 +00003107 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003108 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3109
3110 return "bcr";
3111}
3112
3113static HChar *
3114s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3115{
3116 IRTemp cond = newTemp(Ity_I32);
3117
3118 if (r1 == 0) {
3119 } else {
3120 if (r1 == 15) {
3121 always_goto(mkexpr(op2addr));
3122 } else {
3123 assign(cond, s390_call_calculate_cond(r1));
3124 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3125 mkU32(0)), mkexpr(op2addr));
3126 }
3127 }
sewardj7ee97522011-05-09 21:45:04 +00003128 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003129 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3130
3131 return "bc";
3132}
3133
3134static HChar *
3135s390_irgen_BCTR(UChar r1, UChar r2)
3136{
3137 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3138 if (r2 != 0) {
3139 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3140 ), get_gpr_dw0(r2));
3141 }
3142
3143 return "bctr";
3144}
3145
3146static HChar *
3147s390_irgen_BCTGR(UChar r1, UChar r2)
3148{
3149 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3150 if (r2 != 0) {
3151 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3152 mkU64(0)), get_gpr_dw0(r2));
3153 }
3154
3155 return "bctgr";
3156}
3157
3158static HChar *
3159s390_irgen_BCT(UChar r1, IRTemp op2addr)
3160{
3161 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3162 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3163 mkexpr(op2addr));
3164
3165 return "bct";
3166}
3167
3168static HChar *
3169s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3170{
3171 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3172 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3173 mkexpr(op2addr));
3174
3175 return "bctg";
3176}
3177
3178static HChar *
3179s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3180{
3181 IRTemp value = newTemp(Ity_I32);
3182
3183 assign(value, get_gpr_w1(r3 | 1));
3184 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3185 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3186 mkexpr(value)), mkexpr(op2addr));
3187
3188 return "bxh";
3189}
3190
3191static HChar *
3192s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3193{
3194 IRTemp value = newTemp(Ity_I64);
3195
3196 assign(value, get_gpr_dw0(r3 | 1));
3197 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3198 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3199 mkexpr(value)), mkexpr(op2addr));
3200
3201 return "bxhg";
3202}
3203
3204static HChar *
3205s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3206{
3207 IRTemp value = newTemp(Ity_I32);
3208
3209 assign(value, get_gpr_w1(r3 | 1));
3210 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3211 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3212 get_gpr_w1(r1)), mkexpr(op2addr));
3213
3214 return "bxle";
3215}
3216
3217static HChar *
3218s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3219{
3220 IRTemp value = newTemp(Ity_I64);
3221
3222 assign(value, get_gpr_dw0(r3 | 1));
3223 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3224 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3225 get_gpr_dw0(r1)), mkexpr(op2addr));
3226
3227 return "bxleg";
3228}
3229
3230static HChar *
3231s390_irgen_BRAS(UChar r1, UShort i2)
3232{
3233 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
floriana64c2432011-07-16 02:11:50 +00003234 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003235
3236 return "bras";
3237}
3238
3239static HChar *
3240s390_irgen_BRASL(UChar r1, UInt i2)
3241{
3242 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
floriana64c2432011-07-16 02:11:50 +00003243 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003244
3245 return "brasl";
3246}
3247
3248static HChar *
3249s390_irgen_BRC(UChar r1, UShort i2)
3250{
3251 IRTemp cond = newTemp(Ity_I32);
3252
3253 if (r1 == 0) {
3254 } else {
3255 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003256 always_goto_and_chase(
3257 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003258 } else {
3259 assign(cond, s390_call_calculate_cond(r1));
3260 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3261 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3262
3263 }
3264 }
sewardj7ee97522011-05-09 21:45:04 +00003265 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003266 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3267
3268 return "brc";
3269}
3270
3271static HChar *
3272s390_irgen_BRCL(UChar r1, UInt i2)
3273{
3274 IRTemp cond = newTemp(Ity_I32);
3275
3276 if (r1 == 0) {
3277 } else {
3278 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003279 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003280 } else {
3281 assign(cond, s390_call_calculate_cond(r1));
3282 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3283 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3284 }
3285 }
sewardj7ee97522011-05-09 21:45:04 +00003286 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003287 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3288
3289 return "brcl";
3290}
3291
3292static HChar *
3293s390_irgen_BRCT(UChar r1, UShort i2)
3294{
3295 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3296 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3297 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3298
3299 return "brct";
3300}
3301
3302static HChar *
3303s390_irgen_BRCTG(UChar r1, UShort i2)
3304{
3305 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3306 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3307 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3308
3309 return "brctg";
3310}
3311
3312static HChar *
3313s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3314{
3315 IRTemp value = newTemp(Ity_I32);
3316
3317 assign(value, get_gpr_w1(r3 | 1));
3318 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3319 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3320 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3321
3322 return "brxh";
3323}
3324
3325static HChar *
3326s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3327{
3328 IRTemp value = newTemp(Ity_I64);
3329
3330 assign(value, get_gpr_dw0(r3 | 1));
3331 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3332 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3333 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3334
3335 return "brxhg";
3336}
3337
3338static HChar *
3339s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3340{
3341 IRTemp value = newTemp(Ity_I32);
3342
3343 assign(value, get_gpr_w1(r3 | 1));
3344 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3345 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3346 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3347
3348 return "brxle";
3349}
3350
3351static HChar *
3352s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3353{
3354 IRTemp value = newTemp(Ity_I64);
3355
3356 assign(value, get_gpr_dw0(r3 | 1));
3357 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3358 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3359 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3360
3361 return "brxlg";
3362}
3363
3364static HChar *
3365s390_irgen_CR(UChar r1, UChar r2)
3366{
3367 IRTemp op1 = newTemp(Ity_I32);
3368 IRTemp op2 = newTemp(Ity_I32);
3369
3370 assign(op1, get_gpr_w1(r1));
3371 assign(op2, get_gpr_w1(r2));
3372 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3373
3374 return "cr";
3375}
3376
3377static HChar *
3378s390_irgen_CGR(UChar r1, UChar r2)
3379{
3380 IRTemp op1 = newTemp(Ity_I64);
3381 IRTemp op2 = newTemp(Ity_I64);
3382
3383 assign(op1, get_gpr_dw0(r1));
3384 assign(op2, get_gpr_dw0(r2));
3385 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3386
3387 return "cgr";
3388}
3389
3390static HChar *
3391s390_irgen_CGFR(UChar r1, UChar r2)
3392{
3393 IRTemp op1 = newTemp(Ity_I64);
3394 IRTemp op2 = newTemp(Ity_I64);
3395
3396 assign(op1, get_gpr_dw0(r1));
3397 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3398 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3399
3400 return "cgfr";
3401}
3402
3403static HChar *
3404s390_irgen_C(UChar r1, IRTemp op2addr)
3405{
3406 IRTemp op1 = newTemp(Ity_I32);
3407 IRTemp op2 = newTemp(Ity_I32);
3408
3409 assign(op1, get_gpr_w1(r1));
3410 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3411 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3412
3413 return "c";
3414}
3415
3416static HChar *
3417s390_irgen_CY(UChar r1, IRTemp op2addr)
3418{
3419 IRTemp op1 = newTemp(Ity_I32);
3420 IRTemp op2 = newTemp(Ity_I32);
3421
3422 assign(op1, get_gpr_w1(r1));
3423 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3424 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3425
3426 return "cy";
3427}
3428
3429static HChar *
3430s390_irgen_CG(UChar r1, IRTemp op2addr)
3431{
3432 IRTemp op1 = newTemp(Ity_I64);
3433 IRTemp op2 = newTemp(Ity_I64);
3434
3435 assign(op1, get_gpr_dw0(r1));
3436 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3437 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3438
3439 return "cg";
3440}
3441
3442static HChar *
3443s390_irgen_CGF(UChar r1, IRTemp op2addr)
3444{
3445 IRTemp op1 = newTemp(Ity_I64);
3446 IRTemp op2 = newTemp(Ity_I64);
3447
3448 assign(op1, get_gpr_dw0(r1));
3449 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3450 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3451
3452 return "cgf";
3453}
3454
3455static HChar *
3456s390_irgen_CFI(UChar r1, UInt i2)
3457{
3458 IRTemp op1 = newTemp(Ity_I32);
3459 Int op2;
3460
3461 assign(op1, get_gpr_w1(r1));
3462 op2 = (Int)i2;
3463 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3464 mkU32((UInt)op2)));
3465
3466 return "cfi";
3467}
3468
3469static HChar *
3470s390_irgen_CGFI(UChar r1, UInt i2)
3471{
3472 IRTemp op1 = newTemp(Ity_I64);
3473 Long op2;
3474
3475 assign(op1, get_gpr_dw0(r1));
3476 op2 = (Long)(Int)i2;
3477 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3478 mkU64((ULong)op2)));
3479
3480 return "cgfi";
3481}
3482
3483static HChar *
3484s390_irgen_CRL(UChar r1, UInt i2)
3485{
3486 IRTemp op1 = newTemp(Ity_I32);
3487 IRTemp op2 = newTemp(Ity_I32);
3488
3489 assign(op1, get_gpr_w1(r1));
3490 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3491 i2 << 1))));
3492 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3493
3494 return "crl";
3495}
3496
3497static HChar *
3498s390_irgen_CGRL(UChar r1, UInt i2)
3499{
3500 IRTemp op1 = newTemp(Ity_I64);
3501 IRTemp op2 = newTemp(Ity_I64);
3502
3503 assign(op1, get_gpr_dw0(r1));
3504 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3505 i2 << 1))));
3506 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3507
3508 return "cgrl";
3509}
3510
3511static HChar *
3512s390_irgen_CGFRL(UChar r1, UInt i2)
3513{
3514 IRTemp op1 = newTemp(Ity_I64);
3515 IRTemp op2 = newTemp(Ity_I64);
3516
3517 assign(op1, get_gpr_dw0(r1));
3518 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3519 ((ULong)(Long)(Int)i2 << 1)))));
3520 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3521
3522 return "cgfrl";
3523}
3524
3525static HChar *
3526s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3527{
3528 IRTemp op1 = newTemp(Ity_I32);
3529 IRTemp op2 = newTemp(Ity_I32);
3530 IRTemp icc = newTemp(Ity_I32);
3531 IRTemp cond = newTemp(Ity_I32);
3532
3533 if (m3 == 0) {
3534 } else {
3535 if (m3 == 14) {
3536 always_goto(mkexpr(op4addr));
3537 } else {
3538 assign(op1, get_gpr_w1(r1));
3539 assign(op2, get_gpr_w1(r2));
3540 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3541 op2));
3542 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3543 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3544 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3545 mkU32(0)), mkexpr(op4addr));
3546 }
3547 }
3548
3549 return "crb";
3550}
3551
3552static HChar *
3553s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3554{
3555 IRTemp op1 = newTemp(Ity_I64);
3556 IRTemp op2 = newTemp(Ity_I64);
3557 IRTemp icc = newTemp(Ity_I32);
3558 IRTemp cond = newTemp(Ity_I32);
3559
3560 if (m3 == 0) {
3561 } else {
3562 if (m3 == 14) {
3563 always_goto(mkexpr(op4addr));
3564 } else {
3565 assign(op1, get_gpr_dw0(r1));
3566 assign(op2, get_gpr_dw0(r2));
3567 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3568 op2));
3569 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3570 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3571 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3572 mkU32(0)), mkexpr(op4addr));
3573 }
3574 }
3575
3576 return "cgrb";
3577}
3578
3579static HChar *
3580s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3581{
3582 IRTemp op1 = newTemp(Ity_I32);
3583 IRTemp op2 = newTemp(Ity_I32);
3584 IRTemp icc = newTemp(Ity_I32);
3585 IRTemp cond = newTemp(Ity_I32);
3586
3587 if (m3 == 0) {
3588 } else {
3589 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003590 always_goto_and_chase(
3591 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003592 } else {
3593 assign(op1, get_gpr_w1(r1));
3594 assign(op2, get_gpr_w1(r2));
3595 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3596 op2));
3597 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3598 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3599 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3600 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3601
3602 }
3603 }
3604
3605 return "crj";
3606}
3607
3608static HChar *
3609s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3610{
3611 IRTemp op1 = newTemp(Ity_I64);
3612 IRTemp op2 = newTemp(Ity_I64);
3613 IRTemp icc = newTemp(Ity_I32);
3614 IRTemp cond = newTemp(Ity_I32);
3615
3616 if (m3 == 0) {
3617 } else {
3618 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003619 always_goto_and_chase(
3620 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003621 } else {
3622 assign(op1, get_gpr_dw0(r1));
3623 assign(op2, get_gpr_dw0(r2));
3624 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3625 op2));
3626 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3627 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3628 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3629 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3630
3631 }
3632 }
3633
3634 return "cgrj";
3635}
3636
3637static HChar *
3638s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3639{
3640 IRTemp op1 = newTemp(Ity_I32);
3641 Int op2;
3642 IRTemp icc = newTemp(Ity_I32);
3643 IRTemp cond = newTemp(Ity_I32);
3644
3645 if (m3 == 0) {
3646 } else {
3647 if (m3 == 14) {
3648 always_goto(mkexpr(op4addr));
3649 } else {
3650 assign(op1, get_gpr_w1(r1));
3651 op2 = (Int)(Char)i2;
3652 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3653 mktemp(Ity_I32, mkU32((UInt)op2))));
3654 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3655 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3656 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3657 mkU32(0)), mkexpr(op4addr));
3658 }
3659 }
3660
3661 return "cib";
3662}
3663
3664static HChar *
3665s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3666{
3667 IRTemp op1 = newTemp(Ity_I64);
3668 Long op2;
3669 IRTemp icc = newTemp(Ity_I32);
3670 IRTemp cond = newTemp(Ity_I32);
3671
3672 if (m3 == 0) {
3673 } else {
3674 if (m3 == 14) {
3675 always_goto(mkexpr(op4addr));
3676 } else {
3677 assign(op1, get_gpr_dw0(r1));
3678 op2 = (Long)(Char)i2;
3679 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3680 mktemp(Ity_I64, mkU64((ULong)op2))));
3681 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3682 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3683 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3684 mkU32(0)), mkexpr(op4addr));
3685 }
3686 }
3687
3688 return "cgib";
3689}
3690
3691static HChar *
3692s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3693{
3694 IRTemp op1 = newTemp(Ity_I32);
3695 Int op2;
3696 IRTemp icc = newTemp(Ity_I32);
3697 IRTemp cond = newTemp(Ity_I32);
3698
3699 if (m3 == 0) {
3700 } else {
3701 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003702 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003703 } else {
3704 assign(op1, get_gpr_w1(r1));
3705 op2 = (Int)(Char)i2;
3706 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3707 mktemp(Ity_I32, mkU32((UInt)op2))));
3708 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3709 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3710 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3711 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3712
3713 }
3714 }
3715
3716 return "cij";
3717}
3718
3719static HChar *
3720s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3721{
3722 IRTemp op1 = newTemp(Ity_I64);
3723 Long op2;
3724 IRTemp icc = newTemp(Ity_I32);
3725 IRTemp cond = newTemp(Ity_I32);
3726
3727 if (m3 == 0) {
3728 } else {
3729 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003730 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003731 } else {
3732 assign(op1, get_gpr_dw0(r1));
3733 op2 = (Long)(Char)i2;
3734 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3735 mktemp(Ity_I64, mkU64((ULong)op2))));
3736 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3737 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3738 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3739 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3740
3741 }
3742 }
3743
3744 return "cgij";
3745}
3746
3747static HChar *
3748s390_irgen_CH(UChar r1, IRTemp op2addr)
3749{
3750 IRTemp op1 = newTemp(Ity_I32);
3751 IRTemp op2 = newTemp(Ity_I32);
3752
3753 assign(op1, get_gpr_w1(r1));
3754 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3755 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3756
3757 return "ch";
3758}
3759
3760static HChar *
3761s390_irgen_CHY(UChar r1, IRTemp op2addr)
3762{
3763 IRTemp op1 = newTemp(Ity_I32);
3764 IRTemp op2 = newTemp(Ity_I32);
3765
3766 assign(op1, get_gpr_w1(r1));
3767 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3768 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3769
3770 return "chy";
3771}
3772
3773static HChar *
3774s390_irgen_CGH(UChar r1, IRTemp op2addr)
3775{
3776 IRTemp op1 = newTemp(Ity_I64);
3777 IRTemp op2 = newTemp(Ity_I64);
3778
3779 assign(op1, get_gpr_dw0(r1));
3780 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3781 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3782
3783 return "cgh";
3784}
3785
3786static HChar *
3787s390_irgen_CHI(UChar r1, UShort i2)
3788{
3789 IRTemp op1 = newTemp(Ity_I32);
3790 Int op2;
3791
3792 assign(op1, get_gpr_w1(r1));
3793 op2 = (Int)(Short)i2;
3794 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3795 mkU32((UInt)op2)));
3796
3797 return "chi";
3798}
3799
3800static HChar *
3801s390_irgen_CGHI(UChar r1, UShort i2)
3802{
3803 IRTemp op1 = newTemp(Ity_I64);
3804 Long op2;
3805
3806 assign(op1, get_gpr_dw0(r1));
3807 op2 = (Long)(Short)i2;
3808 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3809 mkU64((ULong)op2)));
3810
3811 return "cghi";
3812}
3813
3814static HChar *
3815s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3816{
3817 IRTemp op1 = newTemp(Ity_I16);
3818 Short op2;
3819
3820 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3821 op2 = (Short)i2;
3822 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3823 mkU16((UShort)op2)));
3824
3825 return "chhsi";
3826}
3827
3828static HChar *
3829s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3830{
3831 IRTemp op1 = newTemp(Ity_I32);
3832 Int op2;
3833
3834 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3835 op2 = (Int)(Short)i2;
3836 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3837 mkU32((UInt)op2)));
3838
3839 return "chsi";
3840}
3841
3842static HChar *
3843s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3844{
3845 IRTemp op1 = newTemp(Ity_I64);
3846 Long op2;
3847
3848 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3849 op2 = (Long)(Short)i2;
3850 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3851 mkU64((ULong)op2)));
3852
3853 return "cghsi";
3854}
3855
3856static HChar *
3857s390_irgen_CHRL(UChar r1, UInt i2)
3858{
3859 IRTemp op1 = newTemp(Ity_I32);
3860 IRTemp op2 = newTemp(Ity_I32);
3861
3862 assign(op1, get_gpr_w1(r1));
3863 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3864 ((ULong)(Long)(Int)i2 << 1)))));
3865 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3866
3867 return "chrl";
3868}
3869
3870static HChar *
3871s390_irgen_CGHRL(UChar r1, UInt i2)
3872{
3873 IRTemp op1 = newTemp(Ity_I64);
3874 IRTemp op2 = newTemp(Ity_I64);
3875
3876 assign(op1, get_gpr_dw0(r1));
3877 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3878 ((ULong)(Long)(Int)i2 << 1)))));
3879 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3880
3881 return "cghrl";
3882}
3883
3884static HChar *
3885s390_irgen_CHHR(UChar r1, UChar r2)
3886{
3887 IRTemp op1 = newTemp(Ity_I32);
3888 IRTemp op2 = newTemp(Ity_I32);
3889
3890 assign(op1, get_gpr_w0(r1));
3891 assign(op2, get_gpr_w0(r2));
3892 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3893
3894 return "chhr";
3895}
3896
3897static HChar *
3898s390_irgen_CHLR(UChar r1, UChar r2)
3899{
3900 IRTemp op1 = newTemp(Ity_I32);
3901 IRTemp op2 = newTemp(Ity_I32);
3902
3903 assign(op1, get_gpr_w0(r1));
3904 assign(op2, get_gpr_w1(r2));
3905 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3906
3907 return "chlr";
3908}
3909
3910static HChar *
3911s390_irgen_CHF(UChar r1, IRTemp op2addr)
3912{
3913 IRTemp op1 = newTemp(Ity_I32);
3914 IRTemp op2 = newTemp(Ity_I32);
3915
3916 assign(op1, get_gpr_w0(r1));
3917 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3918 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3919
3920 return "chf";
3921}
3922
3923static HChar *
3924s390_irgen_CIH(UChar r1, UInt i2)
3925{
3926 IRTemp op1 = newTemp(Ity_I32);
3927 Int op2;
3928
3929 assign(op1, get_gpr_w0(r1));
3930 op2 = (Int)i2;
3931 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3932 mkU32((UInt)op2)));
3933
3934 return "cih";
3935}
3936
3937static HChar *
3938s390_irgen_CLR(UChar r1, UChar r2)
3939{
3940 IRTemp op1 = newTemp(Ity_I32);
3941 IRTemp op2 = newTemp(Ity_I32);
3942
3943 assign(op1, get_gpr_w1(r1));
3944 assign(op2, get_gpr_w1(r2));
3945 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3946
3947 return "clr";
3948}
3949
3950static HChar *
3951s390_irgen_CLGR(UChar r1, UChar r2)
3952{
3953 IRTemp op1 = newTemp(Ity_I64);
3954 IRTemp op2 = newTemp(Ity_I64);
3955
3956 assign(op1, get_gpr_dw0(r1));
3957 assign(op2, get_gpr_dw0(r2));
3958 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3959
3960 return "clgr";
3961}
3962
3963static HChar *
3964s390_irgen_CLGFR(UChar r1, UChar r2)
3965{
3966 IRTemp op1 = newTemp(Ity_I64);
3967 IRTemp op2 = newTemp(Ity_I64);
3968
3969 assign(op1, get_gpr_dw0(r1));
3970 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
3971 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3972
3973 return "clgfr";
3974}
3975
3976static HChar *
3977s390_irgen_CL(UChar r1, IRTemp op2addr)
3978{
3979 IRTemp op1 = newTemp(Ity_I32);
3980 IRTemp op2 = newTemp(Ity_I32);
3981
3982 assign(op1, get_gpr_w1(r1));
3983 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3984 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3985
3986 return "cl";
3987}
3988
3989static HChar *
3990s390_irgen_CLY(UChar r1, IRTemp op2addr)
3991{
3992 IRTemp op1 = newTemp(Ity_I32);
3993 IRTemp op2 = newTemp(Ity_I32);
3994
3995 assign(op1, get_gpr_w1(r1));
3996 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3997 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3998
3999 return "cly";
4000}
4001
4002static HChar *
4003s390_irgen_CLG(UChar r1, IRTemp op2addr)
4004{
4005 IRTemp op1 = newTemp(Ity_I64);
4006 IRTemp op2 = newTemp(Ity_I64);
4007
4008 assign(op1, get_gpr_dw0(r1));
4009 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4010 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4011
4012 return "clg";
4013}
4014
4015static HChar *
4016s390_irgen_CLGF(UChar r1, IRTemp op2addr)
4017{
4018 IRTemp op1 = newTemp(Ity_I64);
4019 IRTemp op2 = newTemp(Ity_I64);
4020
4021 assign(op1, get_gpr_dw0(r1));
4022 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
4023 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4024
4025 return "clgf";
4026}
4027
4028static HChar *
4029s390_irgen_CLFI(UChar r1, UInt i2)
4030{
4031 IRTemp op1 = newTemp(Ity_I32);
4032 UInt op2;
4033
4034 assign(op1, get_gpr_w1(r1));
4035 op2 = i2;
4036 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4037 mkU32(op2)));
4038
4039 return "clfi";
4040}
4041
4042static HChar *
4043s390_irgen_CLGFI(UChar r1, UInt i2)
4044{
4045 IRTemp op1 = newTemp(Ity_I64);
4046 ULong op2;
4047
4048 assign(op1, get_gpr_dw0(r1));
4049 op2 = (ULong)i2;
4050 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4051 mkU64(op2)));
4052
4053 return "clgfi";
4054}
4055
4056static HChar *
4057s390_irgen_CLI(UChar i2, IRTemp op1addr)
4058{
4059 IRTemp op1 = newTemp(Ity_I8);
4060 UChar op2;
4061
4062 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4063 op2 = i2;
4064 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4065 mkU8(op2)));
4066
4067 return "cli";
4068}
4069
4070static HChar *
4071s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4072{
4073 IRTemp op1 = newTemp(Ity_I8);
4074 UChar op2;
4075
4076 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4077 op2 = i2;
4078 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4079 mkU8(op2)));
4080
4081 return "cliy";
4082}
4083
4084static HChar *
4085s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4086{
4087 IRTemp op1 = newTemp(Ity_I32);
4088 UInt op2;
4089
4090 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4091 op2 = (UInt)i2;
4092 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4093 mkU32(op2)));
4094
4095 return "clfhsi";
4096}
4097
4098static HChar *
4099s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4100{
4101 IRTemp op1 = newTemp(Ity_I64);
4102 ULong op2;
4103
4104 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4105 op2 = (ULong)i2;
4106 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4107 mkU64(op2)));
4108
4109 return "clghsi";
4110}
4111
4112static HChar *
4113s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4114{
4115 IRTemp op1 = newTemp(Ity_I16);
4116 UShort op2;
4117
4118 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4119 op2 = i2;
4120 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4121 mkU16(op2)));
4122
4123 return "clhhsi";
4124}
4125
4126static HChar *
4127s390_irgen_CLRL(UChar r1, UInt i2)
4128{
4129 IRTemp op1 = newTemp(Ity_I32);
4130 IRTemp op2 = newTemp(Ity_I32);
4131
4132 assign(op1, get_gpr_w1(r1));
4133 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4134 i2 << 1))));
4135 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4136
4137 return "clrl";
4138}
4139
4140static HChar *
4141s390_irgen_CLGRL(UChar r1, UInt i2)
4142{
4143 IRTemp op1 = newTemp(Ity_I64);
4144 IRTemp op2 = newTemp(Ity_I64);
4145
4146 assign(op1, get_gpr_dw0(r1));
4147 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4148 i2 << 1))));
4149 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4150
4151 return "clgrl";
4152}
4153
4154static HChar *
4155s390_irgen_CLGFRL(UChar r1, UInt i2)
4156{
4157 IRTemp op1 = newTemp(Ity_I64);
4158 IRTemp op2 = newTemp(Ity_I64);
4159
4160 assign(op1, get_gpr_dw0(r1));
4161 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4162 ((ULong)(Long)(Int)i2 << 1)))));
4163 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4164
4165 return "clgfrl";
4166}
4167
4168static HChar *
4169s390_irgen_CLHRL(UChar r1, UInt i2)
4170{
4171 IRTemp op1 = newTemp(Ity_I32);
4172 IRTemp op2 = newTemp(Ity_I32);
4173
4174 assign(op1, get_gpr_w1(r1));
4175 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4176 ((ULong)(Long)(Int)i2 << 1)))));
4177 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4178
4179 return "clhrl";
4180}
4181
4182static HChar *
4183s390_irgen_CLGHRL(UChar r1, UInt i2)
4184{
4185 IRTemp op1 = newTemp(Ity_I64);
4186 IRTemp op2 = newTemp(Ity_I64);
4187
4188 assign(op1, get_gpr_dw0(r1));
4189 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4190 ((ULong)(Long)(Int)i2 << 1)))));
4191 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4192
4193 return "clghrl";
4194}
4195
4196static HChar *
4197s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4198{
4199 IRTemp op1 = newTemp(Ity_I32);
4200 IRTemp op2 = newTemp(Ity_I32);
4201 IRTemp icc = newTemp(Ity_I32);
4202 IRTemp cond = newTemp(Ity_I32);
4203
4204 if (m3 == 0) {
4205 } else {
4206 if (m3 == 14) {
4207 always_goto(mkexpr(op4addr));
4208 } else {
4209 assign(op1, get_gpr_w1(r1));
4210 assign(op2, get_gpr_w1(r2));
4211 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4212 op2));
4213 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4214 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4215 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4216 mkU32(0)), mkexpr(op4addr));
4217 }
4218 }
4219
4220 return "clrb";
4221}
4222
4223static HChar *
4224s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4225{
4226 IRTemp op1 = newTemp(Ity_I64);
4227 IRTemp op2 = newTemp(Ity_I64);
4228 IRTemp icc = newTemp(Ity_I32);
4229 IRTemp cond = newTemp(Ity_I32);
4230
4231 if (m3 == 0) {
4232 } else {
4233 if (m3 == 14) {
4234 always_goto(mkexpr(op4addr));
4235 } else {
4236 assign(op1, get_gpr_dw0(r1));
4237 assign(op2, get_gpr_dw0(r2));
4238 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4239 op2));
4240 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4241 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4242 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4243 mkU32(0)), mkexpr(op4addr));
4244 }
4245 }
4246
4247 return "clgrb";
4248}
4249
4250static HChar *
4251s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4252{
4253 IRTemp op1 = newTemp(Ity_I32);
4254 IRTemp op2 = newTemp(Ity_I32);
4255 IRTemp icc = newTemp(Ity_I32);
4256 IRTemp cond = newTemp(Ity_I32);
4257
4258 if (m3 == 0) {
4259 } else {
4260 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004261 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004262 } else {
4263 assign(op1, get_gpr_w1(r1));
4264 assign(op2, get_gpr_w1(r2));
4265 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4266 op2));
4267 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4268 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4269 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4270 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4271
4272 }
4273 }
4274
4275 return "clrj";
4276}
4277
4278static HChar *
4279s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4280{
4281 IRTemp op1 = newTemp(Ity_I64);
4282 IRTemp op2 = newTemp(Ity_I64);
4283 IRTemp icc = newTemp(Ity_I32);
4284 IRTemp cond = newTemp(Ity_I32);
4285
4286 if (m3 == 0) {
4287 } else {
4288 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004289 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004290 } else {
4291 assign(op1, get_gpr_dw0(r1));
4292 assign(op2, get_gpr_dw0(r2));
4293 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4294 op2));
4295 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4296 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4297 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4298 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4299
4300 }
4301 }
4302
4303 return "clgrj";
4304}
4305
4306static HChar *
4307s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4308{
4309 IRTemp op1 = newTemp(Ity_I32);
4310 UInt op2;
4311 IRTemp icc = newTemp(Ity_I32);
4312 IRTemp cond = newTemp(Ity_I32);
4313
4314 if (m3 == 0) {
4315 } else {
4316 if (m3 == 14) {
4317 always_goto(mkexpr(op4addr));
4318 } else {
4319 assign(op1, get_gpr_w1(r1));
4320 op2 = (UInt)i2;
4321 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4322 mktemp(Ity_I32, mkU32(op2))));
4323 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4324 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4325 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4326 mkU32(0)), mkexpr(op4addr));
4327 }
4328 }
4329
4330 return "clib";
4331}
4332
4333static HChar *
4334s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4335{
4336 IRTemp op1 = newTemp(Ity_I64);
4337 ULong op2;
4338 IRTemp icc = newTemp(Ity_I32);
4339 IRTemp cond = newTemp(Ity_I32);
4340
4341 if (m3 == 0) {
4342 } else {
4343 if (m3 == 14) {
4344 always_goto(mkexpr(op4addr));
4345 } else {
4346 assign(op1, get_gpr_dw0(r1));
4347 op2 = (ULong)i2;
4348 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4349 mktemp(Ity_I64, mkU64(op2))));
4350 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4351 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4352 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4353 mkU32(0)), mkexpr(op4addr));
4354 }
4355 }
4356
4357 return "clgib";
4358}
4359
4360static HChar *
4361s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4362{
4363 IRTemp op1 = newTemp(Ity_I32);
4364 UInt op2;
4365 IRTemp icc = newTemp(Ity_I32);
4366 IRTemp cond = newTemp(Ity_I32);
4367
4368 if (m3 == 0) {
4369 } else {
4370 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004371 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004372 } else {
4373 assign(op1, get_gpr_w1(r1));
4374 op2 = (UInt)i2;
4375 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4376 mktemp(Ity_I32, mkU32(op2))));
4377 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4378 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4379 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4380 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4381
4382 }
4383 }
4384
4385 return "clij";
4386}
4387
4388static HChar *
4389s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4390{
4391 IRTemp op1 = newTemp(Ity_I64);
4392 ULong op2;
4393 IRTemp icc = newTemp(Ity_I32);
4394 IRTemp cond = newTemp(Ity_I32);
4395
4396 if (m3 == 0) {
4397 } else {
4398 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004399 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004400 } else {
4401 assign(op1, get_gpr_dw0(r1));
4402 op2 = (ULong)i2;
4403 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4404 mktemp(Ity_I64, mkU64(op2))));
4405 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4406 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4407 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4408 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4409
4410 }
4411 }
4412
4413 return "clgij";
4414}
4415
4416static HChar *
4417s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4418{
4419 IRTemp op1 = newTemp(Ity_I32);
4420 IRTemp op2 = newTemp(Ity_I32);
4421 IRTemp b0 = newTemp(Ity_I32);
4422 IRTemp b1 = newTemp(Ity_I32);
4423 IRTemp b2 = newTemp(Ity_I32);
4424 IRTemp b3 = newTemp(Ity_I32);
4425 IRTemp c0 = newTemp(Ity_I32);
4426 IRTemp c1 = newTemp(Ity_I32);
4427 IRTemp c2 = newTemp(Ity_I32);
4428 IRTemp c3 = newTemp(Ity_I32);
4429 UChar n;
4430
4431 n = 0;
4432 if ((r3 & 8) != 0) {
4433 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4434 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4435 n = n + 1;
4436 } else {
4437 assign(b0, mkU32(0));
4438 assign(c0, mkU32(0));
4439 }
4440 if ((r3 & 4) != 0) {
4441 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4442 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4443 mkU64(n)))));
4444 n = n + 1;
4445 } else {
4446 assign(b1, mkU32(0));
4447 assign(c1, mkU32(0));
4448 }
4449 if ((r3 & 2) != 0) {
4450 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4451 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4452 mkU64(n)))));
4453 n = n + 1;
4454 } else {
4455 assign(b2, mkU32(0));
4456 assign(c2, mkU32(0));
4457 }
4458 if ((r3 & 1) != 0) {
4459 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4460 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4461 mkU64(n)))));
4462 n = n + 1;
4463 } else {
4464 assign(b3, mkU32(0));
4465 assign(c3, mkU32(0));
4466 }
4467 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4468 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4469 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4470 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4471 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4472 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4473 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4474
4475 return "clm";
4476}
4477
4478static HChar *
4479s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4480{
4481 IRTemp op1 = newTemp(Ity_I32);
4482 IRTemp op2 = newTemp(Ity_I32);
4483 IRTemp b0 = newTemp(Ity_I32);
4484 IRTemp b1 = newTemp(Ity_I32);
4485 IRTemp b2 = newTemp(Ity_I32);
4486 IRTemp b3 = newTemp(Ity_I32);
4487 IRTemp c0 = newTemp(Ity_I32);
4488 IRTemp c1 = newTemp(Ity_I32);
4489 IRTemp c2 = newTemp(Ity_I32);
4490 IRTemp c3 = newTemp(Ity_I32);
4491 UChar n;
4492
4493 n = 0;
4494 if ((r3 & 8) != 0) {
4495 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4496 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4497 n = n + 1;
4498 } else {
4499 assign(b0, mkU32(0));
4500 assign(c0, mkU32(0));
4501 }
4502 if ((r3 & 4) != 0) {
4503 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4504 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4505 mkU64(n)))));
4506 n = n + 1;
4507 } else {
4508 assign(b1, mkU32(0));
4509 assign(c1, mkU32(0));
4510 }
4511 if ((r3 & 2) != 0) {
4512 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4513 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4514 mkU64(n)))));
4515 n = n + 1;
4516 } else {
4517 assign(b2, mkU32(0));
4518 assign(c2, mkU32(0));
4519 }
4520 if ((r3 & 1) != 0) {
4521 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4522 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4523 mkU64(n)))));
4524 n = n + 1;
4525 } else {
4526 assign(b3, mkU32(0));
4527 assign(c3, mkU32(0));
4528 }
4529 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4530 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4531 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4532 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4533 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4534 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4535 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4536
4537 return "clmy";
4538}
4539
4540static HChar *
4541s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4542{
4543 IRTemp op1 = newTemp(Ity_I32);
4544 IRTemp op2 = newTemp(Ity_I32);
4545 IRTemp b0 = newTemp(Ity_I32);
4546 IRTemp b1 = newTemp(Ity_I32);
4547 IRTemp b2 = newTemp(Ity_I32);
4548 IRTemp b3 = newTemp(Ity_I32);
4549 IRTemp c0 = newTemp(Ity_I32);
4550 IRTemp c1 = newTemp(Ity_I32);
4551 IRTemp c2 = newTemp(Ity_I32);
4552 IRTemp c3 = newTemp(Ity_I32);
4553 UChar n;
4554
4555 n = 0;
4556 if ((r3 & 8) != 0) {
4557 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4558 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4559 n = n + 1;
4560 } else {
4561 assign(b0, mkU32(0));
4562 assign(c0, mkU32(0));
4563 }
4564 if ((r3 & 4) != 0) {
4565 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4566 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4567 mkU64(n)))));
4568 n = n + 1;
4569 } else {
4570 assign(b1, mkU32(0));
4571 assign(c1, mkU32(0));
4572 }
4573 if ((r3 & 2) != 0) {
4574 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4575 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4576 mkU64(n)))));
4577 n = n + 1;
4578 } else {
4579 assign(b2, mkU32(0));
4580 assign(c2, mkU32(0));
4581 }
4582 if ((r3 & 1) != 0) {
4583 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4584 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4585 mkU64(n)))));
4586 n = n + 1;
4587 } else {
4588 assign(b3, mkU32(0));
4589 assign(c3, mkU32(0));
4590 }
4591 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4592 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4593 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4594 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4595 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4596 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4597 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4598
4599 return "clmh";
4600}
4601
4602static HChar *
4603s390_irgen_CLHHR(UChar r1, UChar r2)
4604{
4605 IRTemp op1 = newTemp(Ity_I32);
4606 IRTemp op2 = newTemp(Ity_I32);
4607
4608 assign(op1, get_gpr_w0(r1));
4609 assign(op2, get_gpr_w0(r2));
4610 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4611
4612 return "clhhr";
4613}
4614
4615static HChar *
4616s390_irgen_CLHLR(UChar r1, UChar r2)
4617{
4618 IRTemp op1 = newTemp(Ity_I32);
4619 IRTemp op2 = newTemp(Ity_I32);
4620
4621 assign(op1, get_gpr_w0(r1));
4622 assign(op2, get_gpr_w1(r2));
4623 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4624
4625 return "clhlr";
4626}
4627
4628static HChar *
4629s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4630{
4631 IRTemp op1 = newTemp(Ity_I32);
4632 IRTemp op2 = newTemp(Ity_I32);
4633
4634 assign(op1, get_gpr_w0(r1));
4635 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4636 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4637
4638 return "clhf";
4639}
4640
4641static HChar *
4642s390_irgen_CLIH(UChar r1, UInt i2)
4643{
4644 IRTemp op1 = newTemp(Ity_I32);
4645 UInt op2;
4646
4647 assign(op1, get_gpr_w0(r1));
4648 op2 = i2;
4649 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4650 mkU32(op2)));
4651
4652 return "clih";
4653}
4654
4655static HChar *
4656s390_irgen_CPYA(UChar r1, UChar r2)
4657{
4658 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004659 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004660 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4661
4662 return "cpya";
4663}
4664
4665static HChar *
4666s390_irgen_XR(UChar r1, UChar r2)
4667{
4668 IRTemp op1 = newTemp(Ity_I32);
4669 IRTemp op2 = newTemp(Ity_I32);
4670 IRTemp result = newTemp(Ity_I32);
4671
4672 if (r1 == r2) {
4673 assign(result, mkU32(0));
4674 } else {
4675 assign(op1, get_gpr_w1(r1));
4676 assign(op2, get_gpr_w1(r2));
4677 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4678 }
4679 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4680 put_gpr_w1(r1, mkexpr(result));
4681
4682 return "xr";
4683}
4684
4685static HChar *
4686s390_irgen_XGR(UChar r1, UChar r2)
4687{
4688 IRTemp op1 = newTemp(Ity_I64);
4689 IRTemp op2 = newTemp(Ity_I64);
4690 IRTemp result = newTemp(Ity_I64);
4691
4692 if (r1 == r2) {
4693 assign(result, mkU64(0));
4694 } else {
4695 assign(op1, get_gpr_dw0(r1));
4696 assign(op2, get_gpr_dw0(r2));
4697 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4698 }
4699 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4700 put_gpr_dw0(r1, mkexpr(result));
4701
4702 return "xgr";
4703}
4704
4705static HChar *
4706s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4707{
4708 IRTemp op2 = newTemp(Ity_I32);
4709 IRTemp op3 = newTemp(Ity_I32);
4710 IRTemp result = newTemp(Ity_I32);
4711
4712 assign(op2, get_gpr_w1(r2));
4713 assign(op3, get_gpr_w1(r3));
4714 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4715 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4716 put_gpr_w1(r1, mkexpr(result));
4717
4718 return "xrk";
4719}
4720
4721static HChar *
4722s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4723{
4724 IRTemp op2 = newTemp(Ity_I64);
4725 IRTemp op3 = newTemp(Ity_I64);
4726 IRTemp result = newTemp(Ity_I64);
4727
4728 assign(op2, get_gpr_dw0(r2));
4729 assign(op3, get_gpr_dw0(r3));
4730 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4731 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4732 put_gpr_dw0(r1, mkexpr(result));
4733
4734 return "xgrk";
4735}
4736
4737static HChar *
4738s390_irgen_X(UChar r1, IRTemp op2addr)
4739{
4740 IRTemp op1 = newTemp(Ity_I32);
4741 IRTemp op2 = newTemp(Ity_I32);
4742 IRTemp result = newTemp(Ity_I32);
4743
4744 assign(op1, get_gpr_w1(r1));
4745 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4746 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4747 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4748 put_gpr_w1(r1, mkexpr(result));
4749
4750 return "x";
4751}
4752
4753static HChar *
4754s390_irgen_XY(UChar r1, IRTemp op2addr)
4755{
4756 IRTemp op1 = newTemp(Ity_I32);
4757 IRTemp op2 = newTemp(Ity_I32);
4758 IRTemp result = newTemp(Ity_I32);
4759
4760 assign(op1, get_gpr_w1(r1));
4761 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4762 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4763 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4764 put_gpr_w1(r1, mkexpr(result));
4765
4766 return "xy";
4767}
4768
4769static HChar *
4770s390_irgen_XG(UChar r1, IRTemp op2addr)
4771{
4772 IRTemp op1 = newTemp(Ity_I64);
4773 IRTemp op2 = newTemp(Ity_I64);
4774 IRTemp result = newTemp(Ity_I64);
4775
4776 assign(op1, get_gpr_dw0(r1));
4777 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4778 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4779 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4780 put_gpr_dw0(r1, mkexpr(result));
4781
4782 return "xg";
4783}
4784
4785static HChar *
4786s390_irgen_XI(UChar i2, IRTemp op1addr)
4787{
4788 IRTemp op1 = newTemp(Ity_I8);
4789 UChar op2;
4790 IRTemp result = newTemp(Ity_I8);
4791
4792 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4793 op2 = i2;
4794 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4795 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4796 store(mkexpr(op1addr), mkexpr(result));
4797
4798 return "xi";
4799}
4800
4801static HChar *
4802s390_irgen_XIY(UChar i2, IRTemp op1addr)
4803{
4804 IRTemp op1 = newTemp(Ity_I8);
4805 UChar op2;
4806 IRTemp result = newTemp(Ity_I8);
4807
4808 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4809 op2 = i2;
4810 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4811 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4812 store(mkexpr(op1addr), mkexpr(result));
4813
4814 return "xiy";
4815}
4816
4817static HChar *
4818s390_irgen_XIHF(UChar r1, UInt i2)
4819{
4820 IRTemp op1 = newTemp(Ity_I32);
4821 UInt op2;
4822 IRTemp result = newTemp(Ity_I32);
4823
4824 assign(op1, get_gpr_w0(r1));
4825 op2 = i2;
4826 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4827 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4828 put_gpr_w0(r1, mkexpr(result));
4829
4830 return "xihf";
4831}
4832
4833static HChar *
4834s390_irgen_XILF(UChar r1, UInt i2)
4835{
4836 IRTemp op1 = newTemp(Ity_I32);
4837 UInt op2;
4838 IRTemp result = newTemp(Ity_I32);
4839
4840 assign(op1, get_gpr_w1(r1));
4841 op2 = i2;
4842 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4843 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4844 put_gpr_w1(r1, mkexpr(result));
4845
4846 return "xilf";
4847}
4848
4849static HChar *
4850s390_irgen_EAR(UChar r1, UChar r2)
4851{
4852 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004853 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004854 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4855
4856 return "ear";
4857}
4858
4859static HChar *
4860s390_irgen_IC(UChar r1, IRTemp op2addr)
4861{
4862 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4863
4864 return "ic";
4865}
4866
4867static HChar *
4868s390_irgen_ICY(UChar r1, IRTemp op2addr)
4869{
4870 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4871
4872 return "icy";
4873}
4874
4875static HChar *
4876s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4877{
4878 UChar n;
4879 IRTemp result = newTemp(Ity_I32);
4880 UInt mask;
4881
4882 n = 0;
4883 mask = (UInt)r3;
4884 if ((mask & 8) != 0) {
4885 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4886 n = n + 1;
4887 }
4888 if ((mask & 4) != 0) {
4889 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4890
4891 n = n + 1;
4892 }
4893 if ((mask & 2) != 0) {
4894 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4895
4896 n = n + 1;
4897 }
4898 if ((mask & 1) != 0) {
4899 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4900
4901 n = n + 1;
4902 }
4903 assign(result, get_gpr_w1(r1));
4904 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4905 mkU32(mask)));
4906
4907 return "icm";
4908}
4909
4910static HChar *
4911s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4912{
4913 UChar n;
4914 IRTemp result = newTemp(Ity_I32);
4915 UInt mask;
4916
4917 n = 0;
4918 mask = (UInt)r3;
4919 if ((mask & 8) != 0) {
4920 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4921 n = n + 1;
4922 }
4923 if ((mask & 4) != 0) {
4924 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4925
4926 n = n + 1;
4927 }
4928 if ((mask & 2) != 0) {
4929 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4930
4931 n = n + 1;
4932 }
4933 if ((mask & 1) != 0) {
4934 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4935
4936 n = n + 1;
4937 }
4938 assign(result, get_gpr_w1(r1));
4939 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4940 mkU32(mask)));
4941
4942 return "icmy";
4943}
4944
4945static HChar *
4946s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
4947{
4948 UChar n;
4949 IRTemp result = newTemp(Ity_I32);
4950 UInt mask;
4951
4952 n = 0;
4953 mask = (UInt)r3;
4954 if ((mask & 8) != 0) {
4955 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
4956 n = n + 1;
4957 }
4958 if ((mask & 4) != 0) {
4959 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4960
4961 n = n + 1;
4962 }
4963 if ((mask & 2) != 0) {
4964 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4965
4966 n = n + 1;
4967 }
4968 if ((mask & 1) != 0) {
4969 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4970
4971 n = n + 1;
4972 }
4973 assign(result, get_gpr_w0(r1));
4974 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4975 mkU32(mask)));
4976
4977 return "icmh";
4978}
4979
4980static HChar *
4981s390_irgen_IIHF(UChar r1, UInt i2)
4982{
4983 put_gpr_w0(r1, mkU32(i2));
4984
4985 return "iihf";
4986}
4987
4988static HChar *
4989s390_irgen_IIHH(UChar r1, UShort i2)
4990{
4991 put_gpr_hw0(r1, mkU16(i2));
4992
4993 return "iihh";
4994}
4995
4996static HChar *
4997s390_irgen_IIHL(UChar r1, UShort i2)
4998{
4999 put_gpr_hw1(r1, mkU16(i2));
5000
5001 return "iihl";
5002}
5003
5004static HChar *
5005s390_irgen_IILF(UChar r1, UInt i2)
5006{
5007 put_gpr_w1(r1, mkU32(i2));
5008
5009 return "iilf";
5010}
5011
5012static HChar *
5013s390_irgen_IILH(UChar r1, UShort i2)
5014{
5015 put_gpr_hw2(r1, mkU16(i2));
5016
5017 return "iilh";
5018}
5019
5020static HChar *
5021s390_irgen_IILL(UChar r1, UShort i2)
5022{
5023 put_gpr_hw3(r1, mkU16(i2));
5024
5025 return "iill";
5026}
5027
5028static HChar *
5029s390_irgen_LR(UChar r1, UChar r2)
5030{
5031 put_gpr_w1(r1, get_gpr_w1(r2));
5032
5033 return "lr";
5034}
5035
5036static HChar *
5037s390_irgen_LGR(UChar r1, UChar r2)
5038{
5039 put_gpr_dw0(r1, get_gpr_dw0(r2));
5040
5041 return "lgr";
5042}
5043
5044static HChar *
5045s390_irgen_LGFR(UChar r1, UChar r2)
5046{
5047 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5048
5049 return "lgfr";
5050}
5051
5052static HChar *
5053s390_irgen_L(UChar r1, IRTemp op2addr)
5054{
5055 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5056
5057 return "l";
5058}
5059
5060static HChar *
5061s390_irgen_LY(UChar r1, IRTemp op2addr)
5062{
5063 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5064
5065 return "ly";
5066}
5067
5068static HChar *
5069s390_irgen_LG(UChar r1, IRTemp op2addr)
5070{
5071 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5072
5073 return "lg";
5074}
5075
5076static HChar *
5077s390_irgen_LGF(UChar r1, IRTemp op2addr)
5078{
5079 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5080
5081 return "lgf";
5082}
5083
5084static HChar *
5085s390_irgen_LGFI(UChar r1, UInt i2)
5086{
5087 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5088
5089 return "lgfi";
5090}
5091
5092static HChar *
5093s390_irgen_LRL(UChar r1, UInt i2)
5094{
5095 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5096 i2 << 1))));
5097
5098 return "lrl";
5099}
5100
5101static HChar *
5102s390_irgen_LGRL(UChar r1, UInt i2)
5103{
5104 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5105 i2 << 1))));
5106
5107 return "lgrl";
5108}
5109
5110static HChar *
5111s390_irgen_LGFRL(UChar r1, UInt i2)
5112{
5113 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5114 ((ULong)(Long)(Int)i2 << 1)))));
5115
5116 return "lgfrl";
5117}
5118
5119static HChar *
5120s390_irgen_LA(UChar r1, IRTemp op2addr)
5121{
5122 put_gpr_dw0(r1, mkexpr(op2addr));
5123
5124 return "la";
5125}
5126
5127static HChar *
5128s390_irgen_LAY(UChar r1, IRTemp op2addr)
5129{
5130 put_gpr_dw0(r1, mkexpr(op2addr));
5131
5132 return "lay";
5133}
5134
5135static HChar *
5136s390_irgen_LAE(UChar r1, IRTemp op2addr)
5137{
5138 put_gpr_dw0(r1, mkexpr(op2addr));
5139
5140 return "lae";
5141}
5142
5143static HChar *
5144s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5145{
5146 put_gpr_dw0(r1, mkexpr(op2addr));
5147
5148 return "laey";
5149}
5150
5151static HChar *
5152s390_irgen_LARL(UChar r1, UInt i2)
5153{
5154 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5155
5156 return "larl";
5157}
5158
5159static HChar *
5160s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5161{
5162 IRTemp op2 = newTemp(Ity_I32);
5163 IRTemp op3 = newTemp(Ity_I32);
5164 IRTemp result = newTemp(Ity_I32);
5165
5166 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5167 assign(op3, get_gpr_w1(r3));
5168 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5169 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5170 store(mkexpr(op2addr), mkexpr(result));
5171 put_gpr_w1(r1, mkexpr(op2));
5172
5173 return "laa";
5174}
5175
5176static HChar *
5177s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5178{
5179 IRTemp op2 = newTemp(Ity_I64);
5180 IRTemp op3 = newTemp(Ity_I64);
5181 IRTemp result = newTemp(Ity_I64);
5182
5183 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5184 assign(op3, get_gpr_dw0(r3));
5185 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5186 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5187 store(mkexpr(op2addr), mkexpr(result));
5188 put_gpr_dw0(r1, mkexpr(op2));
5189
5190 return "laag";
5191}
5192
5193static HChar *
5194s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5195{
5196 IRTemp op2 = newTemp(Ity_I32);
5197 IRTemp op3 = newTemp(Ity_I32);
5198 IRTemp result = newTemp(Ity_I32);
5199
5200 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5201 assign(op3, get_gpr_w1(r3));
5202 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5203 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5204 store(mkexpr(op2addr), mkexpr(result));
5205 put_gpr_w1(r1, mkexpr(op2));
5206
5207 return "laal";
5208}
5209
5210static HChar *
5211s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5212{
5213 IRTemp op2 = newTemp(Ity_I64);
5214 IRTemp op3 = newTemp(Ity_I64);
5215 IRTemp result = newTemp(Ity_I64);
5216
5217 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5218 assign(op3, get_gpr_dw0(r3));
5219 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5220 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5221 store(mkexpr(op2addr), mkexpr(result));
5222 put_gpr_dw0(r1, mkexpr(op2));
5223
5224 return "laalg";
5225}
5226
5227static HChar *
5228s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5229{
5230 IRTemp op2 = newTemp(Ity_I32);
5231 IRTemp op3 = newTemp(Ity_I32);
5232 IRTemp result = newTemp(Ity_I32);
5233
5234 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5235 assign(op3, get_gpr_w1(r3));
5236 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5237 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5238 store(mkexpr(op2addr), mkexpr(result));
5239 put_gpr_w1(r1, mkexpr(op2));
5240
5241 return "lan";
5242}
5243
5244static HChar *
5245s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5246{
5247 IRTemp op2 = newTemp(Ity_I64);
5248 IRTemp op3 = newTemp(Ity_I64);
5249 IRTemp result = newTemp(Ity_I64);
5250
5251 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5252 assign(op3, get_gpr_dw0(r3));
5253 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5254 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5255 store(mkexpr(op2addr), mkexpr(result));
5256 put_gpr_dw0(r1, mkexpr(op2));
5257
5258 return "lang";
5259}
5260
5261static HChar *
5262s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5263{
5264 IRTemp op2 = newTemp(Ity_I32);
5265 IRTemp op3 = newTemp(Ity_I32);
5266 IRTemp result = newTemp(Ity_I32);
5267
5268 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5269 assign(op3, get_gpr_w1(r3));
5270 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5271 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5272 store(mkexpr(op2addr), mkexpr(result));
5273 put_gpr_w1(r1, mkexpr(op2));
5274
5275 return "lax";
5276}
5277
5278static HChar *
5279s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5280{
5281 IRTemp op2 = newTemp(Ity_I64);
5282 IRTemp op3 = newTemp(Ity_I64);
5283 IRTemp result = newTemp(Ity_I64);
5284
5285 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5286 assign(op3, get_gpr_dw0(r3));
5287 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5288 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5289 store(mkexpr(op2addr), mkexpr(result));
5290 put_gpr_dw0(r1, mkexpr(op2));
5291
5292 return "laxg";
5293}
5294
5295static HChar *
5296s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5297{
5298 IRTemp op2 = newTemp(Ity_I32);
5299 IRTemp op3 = newTemp(Ity_I32);
5300 IRTemp result = newTemp(Ity_I32);
5301
5302 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5303 assign(op3, get_gpr_w1(r3));
5304 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5305 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5306 store(mkexpr(op2addr), mkexpr(result));
5307 put_gpr_w1(r1, mkexpr(op2));
5308
5309 return "lao";
5310}
5311
5312static HChar *
5313s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5314{
5315 IRTemp op2 = newTemp(Ity_I64);
5316 IRTemp op3 = newTemp(Ity_I64);
5317 IRTemp result = newTemp(Ity_I64);
5318
5319 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5320 assign(op3, get_gpr_dw0(r3));
5321 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5322 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5323 store(mkexpr(op2addr), mkexpr(result));
5324 put_gpr_dw0(r1, mkexpr(op2));
5325
5326 return "laog";
5327}
5328
5329static HChar *
5330s390_irgen_LTR(UChar r1, UChar r2)
5331{
5332 IRTemp op2 = newTemp(Ity_I32);
5333
5334 assign(op2, get_gpr_w1(r2));
5335 put_gpr_w1(r1, mkexpr(op2));
5336 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5337
5338 return "ltr";
5339}
5340
5341static HChar *
5342s390_irgen_LTGR(UChar r1, UChar r2)
5343{
5344 IRTemp op2 = newTemp(Ity_I64);
5345
5346 assign(op2, get_gpr_dw0(r2));
5347 put_gpr_dw0(r1, mkexpr(op2));
5348 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5349
5350 return "ltgr";
5351}
5352
5353static HChar *
5354s390_irgen_LTGFR(UChar r1, UChar r2)
5355{
5356 IRTemp op2 = newTemp(Ity_I64);
5357
5358 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5359 put_gpr_dw0(r1, mkexpr(op2));
5360 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5361
5362 return "ltgfr";
5363}
5364
5365static HChar *
5366s390_irgen_LT(UChar r1, IRTemp op2addr)
5367{
5368 IRTemp op2 = newTemp(Ity_I32);
5369
5370 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5371 put_gpr_w1(r1, mkexpr(op2));
5372 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5373
5374 return "lt";
5375}
5376
5377static HChar *
5378s390_irgen_LTG(UChar r1, IRTemp op2addr)
5379{
5380 IRTemp op2 = newTemp(Ity_I64);
5381
5382 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5383 put_gpr_dw0(r1, mkexpr(op2));
5384 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5385
5386 return "ltg";
5387}
5388
5389static HChar *
5390s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5391{
5392 IRTemp op2 = newTemp(Ity_I64);
5393
5394 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5395 put_gpr_dw0(r1, mkexpr(op2));
5396 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5397
5398 return "ltgf";
5399}
5400
5401static HChar *
5402s390_irgen_LBR(UChar r1, UChar r2)
5403{
5404 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5405
5406 return "lbr";
5407}
5408
5409static HChar *
5410s390_irgen_LGBR(UChar r1, UChar r2)
5411{
5412 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5413
5414 return "lgbr";
5415}
5416
5417static HChar *
5418s390_irgen_LB(UChar r1, IRTemp op2addr)
5419{
5420 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5421
5422 return "lb";
5423}
5424
5425static HChar *
5426s390_irgen_LGB(UChar r1, IRTemp op2addr)
5427{
5428 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5429
5430 return "lgb";
5431}
5432
5433static HChar *
5434s390_irgen_LBH(UChar r1, IRTemp op2addr)
5435{
5436 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5437
5438 return "lbh";
5439}
5440
5441static HChar *
5442s390_irgen_LCR(UChar r1, UChar r2)
5443{
5444 Int op1;
5445 IRTemp op2 = newTemp(Ity_I32);
5446 IRTemp result = newTemp(Ity_I32);
5447
5448 op1 = 0;
5449 assign(op2, get_gpr_w1(r2));
5450 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5451 put_gpr_w1(r1, mkexpr(result));
5452 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5453 op1)), op2);
5454
5455 return "lcr";
5456}
5457
5458static HChar *
5459s390_irgen_LCGR(UChar r1, UChar r2)
5460{
5461 Long op1;
5462 IRTemp op2 = newTemp(Ity_I64);
5463 IRTemp result = newTemp(Ity_I64);
5464
5465 op1 = 0ULL;
5466 assign(op2, get_gpr_dw0(r2));
5467 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5468 put_gpr_dw0(r1, mkexpr(result));
5469 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5470 op1)), op2);
5471
5472 return "lcgr";
5473}
5474
5475static HChar *
5476s390_irgen_LCGFR(UChar r1, UChar r2)
5477{
5478 Long op1;
5479 IRTemp op2 = newTemp(Ity_I64);
5480 IRTemp result = newTemp(Ity_I64);
5481
5482 op1 = 0ULL;
5483 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5484 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5485 put_gpr_dw0(r1, mkexpr(result));
5486 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5487 op1)), op2);
5488
5489 return "lcgfr";
5490}
5491
5492static HChar *
5493s390_irgen_LHR(UChar r1, UChar r2)
5494{
5495 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5496
5497 return "lhr";
5498}
5499
5500static HChar *
5501s390_irgen_LGHR(UChar r1, UChar r2)
5502{
5503 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5504
5505 return "lghr";
5506}
5507
5508static HChar *
5509s390_irgen_LH(UChar r1, IRTemp op2addr)
5510{
5511 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5512
5513 return "lh";
5514}
5515
5516static HChar *
5517s390_irgen_LHY(UChar r1, IRTemp op2addr)
5518{
5519 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5520
5521 return "lhy";
5522}
5523
5524static HChar *
5525s390_irgen_LGH(UChar r1, IRTemp op2addr)
5526{
5527 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5528
5529 return "lgh";
5530}
5531
5532static HChar *
5533s390_irgen_LHI(UChar r1, UShort i2)
5534{
5535 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5536
5537 return "lhi";
5538}
5539
5540static HChar *
5541s390_irgen_LGHI(UChar r1, UShort i2)
5542{
5543 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5544
5545 return "lghi";
5546}
5547
5548static HChar *
5549s390_irgen_LHRL(UChar r1, UInt i2)
5550{
5551 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5552 ((ULong)(Long)(Int)i2 << 1)))));
5553
5554 return "lhrl";
5555}
5556
5557static HChar *
5558s390_irgen_LGHRL(UChar r1, UInt i2)
5559{
5560 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5561 ((ULong)(Long)(Int)i2 << 1)))));
5562
5563 return "lghrl";
5564}
5565
5566static HChar *
5567s390_irgen_LHH(UChar r1, IRTemp op2addr)
5568{
5569 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5570
5571 return "lhh";
5572}
5573
5574static HChar *
5575s390_irgen_LFH(UChar r1, IRTemp op2addr)
5576{
5577 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5578
5579 return "lfh";
5580}
5581
5582static HChar *
5583s390_irgen_LLGFR(UChar r1, UChar r2)
5584{
5585 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5586
5587 return "llgfr";
5588}
5589
5590static HChar *
5591s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5592{
5593 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5594
5595 return "llgf";
5596}
5597
5598static HChar *
5599s390_irgen_LLGFRL(UChar r1, UInt i2)
5600{
5601 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5602 ((ULong)(Long)(Int)i2 << 1)))));
5603
5604 return "llgfrl";
5605}
5606
5607static HChar *
5608s390_irgen_LLCR(UChar r1, UChar r2)
5609{
5610 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5611
5612 return "llcr";
5613}
5614
5615static HChar *
5616s390_irgen_LLGCR(UChar r1, UChar r2)
5617{
5618 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5619
5620 return "llgcr";
5621}
5622
5623static HChar *
5624s390_irgen_LLC(UChar r1, IRTemp op2addr)
5625{
5626 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5627
5628 return "llc";
5629}
5630
5631static HChar *
5632s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5633{
5634 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5635
5636 return "llgc";
5637}
5638
5639static HChar *
5640s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5641{
5642 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5643
5644 return "llch";
5645}
5646
5647static HChar *
5648s390_irgen_LLHR(UChar r1, UChar r2)
5649{
5650 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5651
5652 return "llhr";
5653}
5654
5655static HChar *
5656s390_irgen_LLGHR(UChar r1, UChar r2)
5657{
5658 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5659
5660 return "llghr";
5661}
5662
5663static HChar *
5664s390_irgen_LLH(UChar r1, IRTemp op2addr)
5665{
5666 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5667
5668 return "llh";
5669}
5670
5671static HChar *
5672s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5673{
5674 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5675
5676 return "llgh";
5677}
5678
5679static HChar *
5680s390_irgen_LLHRL(UChar r1, UInt i2)
5681{
5682 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5683 ((ULong)(Long)(Int)i2 << 1)))));
5684
5685 return "llhrl";
5686}
5687
5688static HChar *
5689s390_irgen_LLGHRL(UChar r1, UInt i2)
5690{
5691 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5692 ((ULong)(Long)(Int)i2 << 1)))));
5693
5694 return "llghrl";
5695}
5696
5697static HChar *
5698s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5699{
5700 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5701
5702 return "llhh";
5703}
5704
5705static HChar *
5706s390_irgen_LLIHF(UChar r1, UInt i2)
5707{
5708 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5709
5710 return "llihf";
5711}
5712
5713static HChar *
5714s390_irgen_LLIHH(UChar r1, UShort i2)
5715{
5716 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5717
5718 return "llihh";
5719}
5720
5721static HChar *
5722s390_irgen_LLIHL(UChar r1, UShort i2)
5723{
5724 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5725
5726 return "llihl";
5727}
5728
5729static HChar *
5730s390_irgen_LLILF(UChar r1, UInt i2)
5731{
5732 put_gpr_dw0(r1, mkU64(i2));
5733
5734 return "llilf";
5735}
5736
5737static HChar *
5738s390_irgen_LLILH(UChar r1, UShort i2)
5739{
5740 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5741
5742 return "llilh";
5743}
5744
5745static HChar *
5746s390_irgen_LLILL(UChar r1, UShort i2)
5747{
5748 put_gpr_dw0(r1, mkU64(i2));
5749
5750 return "llill";
5751}
5752
5753static HChar *
5754s390_irgen_LLGTR(UChar r1, UChar r2)
5755{
5756 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5757 mkU32(2147483647))));
5758
5759 return "llgtr";
5760}
5761
5762static HChar *
5763s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5764{
5765 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5766 mkexpr(op2addr)), mkU32(2147483647))));
5767
5768 return "llgt";
5769}
5770
5771static HChar *
5772s390_irgen_LNR(UChar r1, UChar r2)
5773{
5774 IRTemp op2 = newTemp(Ity_I32);
5775 IRTemp result = newTemp(Ity_I32);
5776
5777 assign(op2, get_gpr_w1(r2));
5778 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5779 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5780 put_gpr_w1(r1, mkexpr(result));
5781 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5782
5783 return "lnr";
5784}
5785
5786static HChar *
5787s390_irgen_LNGR(UChar r1, UChar r2)
5788{
5789 IRTemp op2 = newTemp(Ity_I64);
5790 IRTemp result = newTemp(Ity_I64);
5791
5792 assign(op2, get_gpr_dw0(r2));
5793 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5794 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5795 put_gpr_dw0(r1, mkexpr(result));
5796 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5797
5798 return "lngr";
5799}
5800
5801static HChar *
5802s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5803{
5804 IRTemp op2 = newTemp(Ity_I64);
5805 IRTemp result = newTemp(Ity_I64);
5806
5807 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5808 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5809 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5810 put_gpr_dw0(r1, mkexpr(result));
5811 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5812
5813 return "lngfr";
5814}
5815
5816static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005817s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5818{
5819 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5820 guest_IA_next_instr);
5821 put_gpr_w1(r1, get_gpr_w1(r2));
5822
5823 return "locr";
5824}
5825
5826static HChar *
5827s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5828{
5829 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5830 guest_IA_next_instr);
5831 put_gpr_dw0(r1, get_gpr_dw0(r2));
5832
5833 return "locgr";
5834}
5835
5836static HChar *
5837s390_irgen_LOC(UChar r1, IRTemp op2addr)
5838{
5839 /* condition is checked in format handler */
5840 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5841
5842 return "loc";
5843}
5844
5845static HChar *
5846s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5847{
5848 /* condition is checked in format handler */
5849 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5850
5851 return "locg";
5852}
5853
5854static HChar *
sewardj2019a972011-03-07 16:04:07 +00005855s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5856{
5857 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5858 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5859 ));
5860
5861 return "lpq";
5862}
5863
5864static HChar *
5865s390_irgen_LPR(UChar r1, UChar r2)
5866{
5867 IRTemp op2 = newTemp(Ity_I32);
5868 IRTemp result = newTemp(Ity_I32);
5869
5870 assign(op2, get_gpr_w1(r2));
5871 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5872 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5873 put_gpr_w1(r1, mkexpr(result));
5874 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5875
5876 return "lpr";
5877}
5878
5879static HChar *
5880s390_irgen_LPGR(UChar r1, UChar r2)
5881{
5882 IRTemp op2 = newTemp(Ity_I64);
5883 IRTemp result = newTemp(Ity_I64);
5884
5885 assign(op2, get_gpr_dw0(r2));
5886 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5887 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5888 put_gpr_dw0(r1, mkexpr(result));
5889 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5890
5891 return "lpgr";
5892}
5893
5894static HChar *
5895s390_irgen_LPGFR(UChar r1, UChar r2)
5896{
5897 IRTemp op2 = newTemp(Ity_I64);
5898 IRTemp result = newTemp(Ity_I64);
5899
5900 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5901 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5902 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5903 put_gpr_dw0(r1, mkexpr(result));
5904 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5905
5906 return "lpgfr";
5907}
5908
5909static HChar *
5910s390_irgen_LRVR(UChar r1, UChar r2)
5911{
5912 IRTemp b0 = newTemp(Ity_I8);
5913 IRTemp b1 = newTemp(Ity_I8);
5914 IRTemp b2 = newTemp(Ity_I8);
5915 IRTemp b3 = newTemp(Ity_I8);
5916
5917 assign(b3, get_gpr_b7(r2));
5918 assign(b2, get_gpr_b6(r2));
5919 assign(b1, get_gpr_b5(r2));
5920 assign(b0, get_gpr_b4(r2));
5921 put_gpr_b4(r1, mkexpr(b3));
5922 put_gpr_b5(r1, mkexpr(b2));
5923 put_gpr_b6(r1, mkexpr(b1));
5924 put_gpr_b7(r1, mkexpr(b0));
5925
5926 return "lrvr";
5927}
5928
5929static HChar *
5930s390_irgen_LRVGR(UChar r1, UChar r2)
5931{
5932 IRTemp b0 = newTemp(Ity_I8);
5933 IRTemp b1 = newTemp(Ity_I8);
5934 IRTemp b2 = newTemp(Ity_I8);
5935 IRTemp b3 = newTemp(Ity_I8);
5936 IRTemp b4 = newTemp(Ity_I8);
5937 IRTemp b5 = newTemp(Ity_I8);
5938 IRTemp b6 = newTemp(Ity_I8);
5939 IRTemp b7 = newTemp(Ity_I8);
5940
5941 assign(b7, get_gpr_b7(r2));
5942 assign(b6, get_gpr_b6(r2));
5943 assign(b5, get_gpr_b5(r2));
5944 assign(b4, get_gpr_b4(r2));
5945 assign(b3, get_gpr_b3(r2));
5946 assign(b2, get_gpr_b2(r2));
5947 assign(b1, get_gpr_b1(r2));
5948 assign(b0, get_gpr_b0(r2));
5949 put_gpr_b0(r1, mkexpr(b7));
5950 put_gpr_b1(r1, mkexpr(b6));
5951 put_gpr_b2(r1, mkexpr(b5));
5952 put_gpr_b3(r1, mkexpr(b4));
5953 put_gpr_b4(r1, mkexpr(b3));
5954 put_gpr_b5(r1, mkexpr(b2));
5955 put_gpr_b6(r1, mkexpr(b1));
5956 put_gpr_b7(r1, mkexpr(b0));
5957
5958 return "lrvgr";
5959}
5960
5961static HChar *
5962s390_irgen_LRVH(UChar r1, IRTemp op2addr)
5963{
5964 IRTemp op2 = newTemp(Ity_I16);
5965
5966 assign(op2, load(Ity_I16, mkexpr(op2addr)));
5967 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
5968 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
5969
5970 return "lrvh";
5971}
5972
5973static HChar *
5974s390_irgen_LRV(UChar r1, IRTemp op2addr)
5975{
5976 IRTemp op2 = newTemp(Ity_I32);
5977
5978 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5979 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
5980 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5981 mkU8(8)), mkU32(255))));
5982 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5983 mkU8(16)), mkU32(255))));
5984 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5985 mkU8(24)), mkU32(255))));
5986
5987 return "lrv";
5988}
5989
5990static HChar *
5991s390_irgen_LRVG(UChar r1, IRTemp op2addr)
5992{
5993 IRTemp op2 = newTemp(Ity_I64);
5994
5995 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5996 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
5997 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5998 mkU8(8)), mkU64(255))));
5999 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6000 mkU8(16)), mkU64(255))));
6001 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6002 mkU8(24)), mkU64(255))));
6003 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6004 mkU8(32)), mkU64(255))));
6005 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6006 mkU8(40)), mkU64(255))));
6007 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6008 mkU8(48)), mkU64(255))));
6009 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6010 mkU8(56)), mkU64(255))));
6011
6012 return "lrvg";
6013}
6014
6015static HChar *
6016s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
6017{
6018 store(mkexpr(op1addr), mkU16(i2));
6019
6020 return "mvhhi";
6021}
6022
6023static HChar *
6024s390_irgen_MVHI(UShort i2, IRTemp op1addr)
6025{
6026 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6027
6028 return "mvhi";
6029}
6030
6031static HChar *
6032s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6033{
6034 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6035
6036 return "mvghi";
6037}
6038
6039static HChar *
6040s390_irgen_MVI(UChar i2, IRTemp op1addr)
6041{
6042 store(mkexpr(op1addr), mkU8(i2));
6043
6044 return "mvi";
6045}
6046
6047static HChar *
6048s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6049{
6050 store(mkexpr(op1addr), mkU8(i2));
6051
6052 return "mviy";
6053}
6054
6055static HChar *
6056s390_irgen_MR(UChar r1, UChar r2)
6057{
6058 IRTemp op1 = newTemp(Ity_I32);
6059 IRTemp op2 = newTemp(Ity_I32);
6060 IRTemp result = newTemp(Ity_I64);
6061
6062 assign(op1, get_gpr_w1(r1 + 1));
6063 assign(op2, get_gpr_w1(r2));
6064 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6065 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6066 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6067
6068 return "mr";
6069}
6070
6071static HChar *
6072s390_irgen_M(UChar r1, IRTemp op2addr)
6073{
6074 IRTemp op1 = newTemp(Ity_I32);
6075 IRTemp op2 = newTemp(Ity_I32);
6076 IRTemp result = newTemp(Ity_I64);
6077
6078 assign(op1, get_gpr_w1(r1 + 1));
6079 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6080 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6081 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6082 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6083
6084 return "m";
6085}
6086
6087static HChar *
6088s390_irgen_MFY(UChar r1, IRTemp op2addr)
6089{
6090 IRTemp op1 = newTemp(Ity_I32);
6091 IRTemp op2 = newTemp(Ity_I32);
6092 IRTemp result = newTemp(Ity_I64);
6093
6094 assign(op1, get_gpr_w1(r1 + 1));
6095 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6096 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6097 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6098 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6099
6100 return "mfy";
6101}
6102
6103static HChar *
6104s390_irgen_MH(UChar r1, IRTemp op2addr)
6105{
6106 IRTemp op1 = newTemp(Ity_I32);
6107 IRTemp op2 = newTemp(Ity_I16);
6108 IRTemp result = newTemp(Ity_I64);
6109
6110 assign(op1, get_gpr_w1(r1));
6111 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6112 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6113 ));
6114 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6115
6116 return "mh";
6117}
6118
6119static HChar *
6120s390_irgen_MHY(UChar r1, IRTemp op2addr)
6121{
6122 IRTemp op1 = newTemp(Ity_I32);
6123 IRTemp op2 = newTemp(Ity_I16);
6124 IRTemp result = newTemp(Ity_I64);
6125
6126 assign(op1, get_gpr_w1(r1));
6127 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6128 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6129 ));
6130 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6131
6132 return "mhy";
6133}
6134
6135static HChar *
6136s390_irgen_MHI(UChar r1, UShort i2)
6137{
6138 IRTemp op1 = newTemp(Ity_I32);
6139 Short op2;
6140 IRTemp result = newTemp(Ity_I64);
6141
6142 assign(op1, get_gpr_w1(r1));
6143 op2 = (Short)i2;
6144 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6145 mkU16((UShort)op2))));
6146 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6147
6148 return "mhi";
6149}
6150
6151static HChar *
6152s390_irgen_MGHI(UChar r1, UShort i2)
6153{
6154 IRTemp op1 = newTemp(Ity_I64);
6155 Short op2;
6156 IRTemp result = newTemp(Ity_I128);
6157
6158 assign(op1, get_gpr_dw0(r1));
6159 op2 = (Short)i2;
6160 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6161 mkU16((UShort)op2))));
6162 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6163
6164 return "mghi";
6165}
6166
6167static HChar *
6168s390_irgen_MLR(UChar r1, UChar r2)
6169{
6170 IRTemp op1 = newTemp(Ity_I32);
6171 IRTemp op2 = newTemp(Ity_I32);
6172 IRTemp result = newTemp(Ity_I64);
6173
6174 assign(op1, get_gpr_w1(r1 + 1));
6175 assign(op2, get_gpr_w1(r2));
6176 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6177 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6178 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6179
6180 return "mlr";
6181}
6182
6183static HChar *
6184s390_irgen_MLGR(UChar r1, UChar r2)
6185{
6186 IRTemp op1 = newTemp(Ity_I64);
6187 IRTemp op2 = newTemp(Ity_I64);
6188 IRTemp result = newTemp(Ity_I128);
6189
6190 assign(op1, get_gpr_dw0(r1 + 1));
6191 assign(op2, get_gpr_dw0(r2));
6192 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6193 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6194 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6195
6196 return "mlgr";
6197}
6198
6199static HChar *
6200s390_irgen_ML(UChar r1, IRTemp op2addr)
6201{
6202 IRTemp op1 = newTemp(Ity_I32);
6203 IRTemp op2 = newTemp(Ity_I32);
6204 IRTemp result = newTemp(Ity_I64);
6205
6206 assign(op1, get_gpr_w1(r1 + 1));
6207 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6208 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6209 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6210 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6211
6212 return "ml";
6213}
6214
6215static HChar *
6216s390_irgen_MLG(UChar r1, IRTemp op2addr)
6217{
6218 IRTemp op1 = newTemp(Ity_I64);
6219 IRTemp op2 = newTemp(Ity_I64);
6220 IRTemp result = newTemp(Ity_I128);
6221
6222 assign(op1, get_gpr_dw0(r1 + 1));
6223 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6224 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6225 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6226 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6227
6228 return "mlg";
6229}
6230
6231static HChar *
6232s390_irgen_MSR(UChar r1, UChar r2)
6233{
6234 IRTemp op1 = newTemp(Ity_I32);
6235 IRTemp op2 = newTemp(Ity_I32);
6236 IRTemp result = newTemp(Ity_I64);
6237
6238 assign(op1, get_gpr_w1(r1));
6239 assign(op2, get_gpr_w1(r2));
6240 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6241 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6242
6243 return "msr";
6244}
6245
6246static HChar *
6247s390_irgen_MSGR(UChar r1, UChar r2)
6248{
6249 IRTemp op1 = newTemp(Ity_I64);
6250 IRTemp op2 = newTemp(Ity_I64);
6251 IRTemp result = newTemp(Ity_I128);
6252
6253 assign(op1, get_gpr_dw0(r1));
6254 assign(op2, get_gpr_dw0(r2));
6255 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6256 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6257
6258 return "msgr";
6259}
6260
6261static HChar *
6262s390_irgen_MSGFR(UChar r1, UChar r2)
6263{
6264 IRTemp op1 = newTemp(Ity_I64);
6265 IRTemp op2 = newTemp(Ity_I32);
6266 IRTemp result = newTemp(Ity_I128);
6267
6268 assign(op1, get_gpr_dw0(r1));
6269 assign(op2, get_gpr_w1(r2));
6270 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6271 ));
6272 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6273
6274 return "msgfr";
6275}
6276
6277static HChar *
6278s390_irgen_MS(UChar r1, IRTemp op2addr)
6279{
6280 IRTemp op1 = newTemp(Ity_I32);
6281 IRTemp op2 = newTemp(Ity_I32);
6282 IRTemp result = newTemp(Ity_I64);
6283
6284 assign(op1, get_gpr_w1(r1));
6285 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6286 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6287 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6288
6289 return "ms";
6290}
6291
6292static HChar *
6293s390_irgen_MSY(UChar r1, IRTemp op2addr)
6294{
6295 IRTemp op1 = newTemp(Ity_I32);
6296 IRTemp op2 = newTemp(Ity_I32);
6297 IRTemp result = newTemp(Ity_I64);
6298
6299 assign(op1, get_gpr_w1(r1));
6300 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6301 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6302 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6303
6304 return "msy";
6305}
6306
6307static HChar *
6308s390_irgen_MSG(UChar r1, IRTemp op2addr)
6309{
6310 IRTemp op1 = newTemp(Ity_I64);
6311 IRTemp op2 = newTemp(Ity_I64);
6312 IRTemp result = newTemp(Ity_I128);
6313
6314 assign(op1, get_gpr_dw0(r1));
6315 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6316 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6317 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6318
6319 return "msg";
6320}
6321
6322static HChar *
6323s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6324{
6325 IRTemp op1 = newTemp(Ity_I64);
6326 IRTemp op2 = newTemp(Ity_I32);
6327 IRTemp result = newTemp(Ity_I128);
6328
6329 assign(op1, get_gpr_dw0(r1));
6330 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6331 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6332 ));
6333 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6334
6335 return "msgf";
6336}
6337
6338static HChar *
6339s390_irgen_MSFI(UChar r1, UInt i2)
6340{
6341 IRTemp op1 = newTemp(Ity_I32);
6342 Int op2;
6343 IRTemp result = newTemp(Ity_I64);
6344
6345 assign(op1, get_gpr_w1(r1));
6346 op2 = (Int)i2;
6347 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6348 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6349
6350 return "msfi";
6351}
6352
6353static HChar *
6354s390_irgen_MSGFI(UChar r1, UInt i2)
6355{
6356 IRTemp op1 = newTemp(Ity_I64);
6357 Int op2;
6358 IRTemp result = newTemp(Ity_I128);
6359
6360 assign(op1, get_gpr_dw0(r1));
6361 op2 = (Int)i2;
6362 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6363 op2))));
6364 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6365
6366 return "msgfi";
6367}
6368
6369static HChar *
6370s390_irgen_OR(UChar r1, UChar r2)
6371{
6372 IRTemp op1 = newTemp(Ity_I32);
6373 IRTemp op2 = newTemp(Ity_I32);
6374 IRTemp result = newTemp(Ity_I32);
6375
6376 assign(op1, get_gpr_w1(r1));
6377 assign(op2, get_gpr_w1(r2));
6378 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6379 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6380 put_gpr_w1(r1, mkexpr(result));
6381
6382 return "or";
6383}
6384
6385static HChar *
6386s390_irgen_OGR(UChar r1, UChar r2)
6387{
6388 IRTemp op1 = newTemp(Ity_I64);
6389 IRTemp op2 = newTemp(Ity_I64);
6390 IRTemp result = newTemp(Ity_I64);
6391
6392 assign(op1, get_gpr_dw0(r1));
6393 assign(op2, get_gpr_dw0(r2));
6394 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6395 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6396 put_gpr_dw0(r1, mkexpr(result));
6397
6398 return "ogr";
6399}
6400
6401static HChar *
6402s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6403{
6404 IRTemp op2 = newTemp(Ity_I32);
6405 IRTemp op3 = newTemp(Ity_I32);
6406 IRTemp result = newTemp(Ity_I32);
6407
6408 assign(op2, get_gpr_w1(r2));
6409 assign(op3, get_gpr_w1(r3));
6410 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6411 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6412 put_gpr_w1(r1, mkexpr(result));
6413
6414 return "ork";
6415}
6416
6417static HChar *
6418s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6419{
6420 IRTemp op2 = newTemp(Ity_I64);
6421 IRTemp op3 = newTemp(Ity_I64);
6422 IRTemp result = newTemp(Ity_I64);
6423
6424 assign(op2, get_gpr_dw0(r2));
6425 assign(op3, get_gpr_dw0(r3));
6426 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6427 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6428 put_gpr_dw0(r1, mkexpr(result));
6429
6430 return "ogrk";
6431}
6432
6433static HChar *
6434s390_irgen_O(UChar r1, IRTemp op2addr)
6435{
6436 IRTemp op1 = newTemp(Ity_I32);
6437 IRTemp op2 = newTemp(Ity_I32);
6438 IRTemp result = newTemp(Ity_I32);
6439
6440 assign(op1, get_gpr_w1(r1));
6441 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6442 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6443 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6444 put_gpr_w1(r1, mkexpr(result));
6445
6446 return "o";
6447}
6448
6449static HChar *
6450s390_irgen_OY(UChar r1, IRTemp op2addr)
6451{
6452 IRTemp op1 = newTemp(Ity_I32);
6453 IRTemp op2 = newTemp(Ity_I32);
6454 IRTemp result = newTemp(Ity_I32);
6455
6456 assign(op1, get_gpr_w1(r1));
6457 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6458 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6459 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6460 put_gpr_w1(r1, mkexpr(result));
6461
6462 return "oy";
6463}
6464
6465static HChar *
6466s390_irgen_OG(UChar r1, IRTemp op2addr)
6467{
6468 IRTemp op1 = newTemp(Ity_I64);
6469 IRTemp op2 = newTemp(Ity_I64);
6470 IRTemp result = newTemp(Ity_I64);
6471
6472 assign(op1, get_gpr_dw0(r1));
6473 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6474 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6475 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6476 put_gpr_dw0(r1, mkexpr(result));
6477
6478 return "og";
6479}
6480
6481static HChar *
6482s390_irgen_OI(UChar i2, IRTemp op1addr)
6483{
6484 IRTemp op1 = newTemp(Ity_I8);
6485 UChar op2;
6486 IRTemp result = newTemp(Ity_I8);
6487
6488 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6489 op2 = i2;
6490 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6491 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6492 store(mkexpr(op1addr), mkexpr(result));
6493
6494 return "oi";
6495}
6496
6497static HChar *
6498s390_irgen_OIY(UChar i2, IRTemp op1addr)
6499{
6500 IRTemp op1 = newTemp(Ity_I8);
6501 UChar op2;
6502 IRTemp result = newTemp(Ity_I8);
6503
6504 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6505 op2 = i2;
6506 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6507 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6508 store(mkexpr(op1addr), mkexpr(result));
6509
6510 return "oiy";
6511}
6512
6513static HChar *
6514s390_irgen_OIHF(UChar r1, UInt i2)
6515{
6516 IRTemp op1 = newTemp(Ity_I32);
6517 UInt op2;
6518 IRTemp result = newTemp(Ity_I32);
6519
6520 assign(op1, get_gpr_w0(r1));
6521 op2 = i2;
6522 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6523 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6524 put_gpr_w0(r1, mkexpr(result));
6525
6526 return "oihf";
6527}
6528
6529static HChar *
6530s390_irgen_OIHH(UChar r1, UShort i2)
6531{
6532 IRTemp op1 = newTemp(Ity_I16);
6533 UShort op2;
6534 IRTemp result = newTemp(Ity_I16);
6535
6536 assign(op1, get_gpr_hw0(r1));
6537 op2 = i2;
6538 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6539 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6540 put_gpr_hw0(r1, mkexpr(result));
6541
6542 return "oihh";
6543}
6544
6545static HChar *
6546s390_irgen_OIHL(UChar r1, UShort i2)
6547{
6548 IRTemp op1 = newTemp(Ity_I16);
6549 UShort op2;
6550 IRTemp result = newTemp(Ity_I16);
6551
6552 assign(op1, get_gpr_hw1(r1));
6553 op2 = i2;
6554 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6555 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6556 put_gpr_hw1(r1, mkexpr(result));
6557
6558 return "oihl";
6559}
6560
6561static HChar *
6562s390_irgen_OILF(UChar r1, UInt i2)
6563{
6564 IRTemp op1 = newTemp(Ity_I32);
6565 UInt op2;
6566 IRTemp result = newTemp(Ity_I32);
6567
6568 assign(op1, get_gpr_w1(r1));
6569 op2 = i2;
6570 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6571 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6572 put_gpr_w1(r1, mkexpr(result));
6573
6574 return "oilf";
6575}
6576
6577static HChar *
6578s390_irgen_OILH(UChar r1, UShort i2)
6579{
6580 IRTemp op1 = newTemp(Ity_I16);
6581 UShort op2;
6582 IRTemp result = newTemp(Ity_I16);
6583
6584 assign(op1, get_gpr_hw2(r1));
6585 op2 = i2;
6586 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6587 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6588 put_gpr_hw2(r1, mkexpr(result));
6589
6590 return "oilh";
6591}
6592
6593static HChar *
6594s390_irgen_OILL(UChar r1, UShort i2)
6595{
6596 IRTemp op1 = newTemp(Ity_I16);
6597 UShort op2;
6598 IRTemp result = newTemp(Ity_I16);
6599
6600 assign(op1, get_gpr_hw3(r1));
6601 op2 = i2;
6602 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6603 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6604 put_gpr_hw3(r1, mkexpr(result));
6605
6606 return "oill";
6607}
6608
6609static HChar *
6610s390_irgen_PFD(void)
6611{
6612
6613 return "pfd";
6614}
6615
6616static HChar *
6617s390_irgen_PFDRL(void)
6618{
6619
6620 return "pfdrl";
6621}
6622
6623static HChar *
6624s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6625{
6626 IRTemp amount = newTemp(Ity_I64);
6627 IRTemp op = newTemp(Ity_I32);
6628
6629 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6630 assign(op, get_gpr_w1(r3));
6631 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6632 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6633 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6634
6635 return "rll";
6636}
6637
6638static HChar *
6639s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6640{
6641 IRTemp amount = newTemp(Ity_I64);
6642 IRTemp op = newTemp(Ity_I64);
6643
6644 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6645 assign(op, get_gpr_dw0(r3));
6646 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6647 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6648 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6649
6650 return "rllg";
6651}
6652
6653static HChar *
6654s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6655{
6656 UChar from;
6657 UChar to;
6658 UChar rot;
6659 UChar t_bit;
6660 ULong mask;
6661 ULong maskc;
6662 IRTemp result = newTemp(Ity_I64);
6663 IRTemp op2 = newTemp(Ity_I64);
6664
6665 from = i3 & 63;
6666 to = i4 & 63;
6667 rot = i5 & 63;
6668 t_bit = i3 & 128;
6669 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6670 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6671 mkU8(64 - rot))));
6672 if (from <= to) {
6673 mask = ~0ULL;
6674 mask = (mask >> from) & (mask << (63 - to));
6675 maskc = ~mask;
6676 } else {
6677 maskc = ~0ULL;
6678 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6679 mask = ~maskc;
6680 }
6681 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6682 ), mkU64(mask)));
6683 if (t_bit == 0) {
6684 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6685 mkU64(maskc)), mkexpr(result)));
6686 }
6687 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6688
6689 return "rnsbg";
6690}
6691
6692static HChar *
6693s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6694{
6695 UChar from;
6696 UChar to;
6697 UChar rot;
6698 UChar t_bit;
6699 ULong mask;
6700 ULong maskc;
6701 IRTemp result = newTemp(Ity_I64);
6702 IRTemp op2 = newTemp(Ity_I64);
6703
6704 from = i3 & 63;
6705 to = i4 & 63;
6706 rot = i5 & 63;
6707 t_bit = i3 & 128;
6708 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6709 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6710 mkU8(64 - rot))));
6711 if (from <= to) {
6712 mask = ~0ULL;
6713 mask = (mask >> from) & (mask << (63 - to));
6714 maskc = ~mask;
6715 } else {
6716 maskc = ~0ULL;
6717 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6718 mask = ~maskc;
6719 }
6720 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6721 ), mkU64(mask)));
6722 if (t_bit == 0) {
6723 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6724 mkU64(maskc)), mkexpr(result)));
6725 }
6726 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6727
6728 return "rxsbg";
6729}
6730
6731static HChar *
6732s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6733{
6734 UChar from;
6735 UChar to;
6736 UChar rot;
6737 UChar t_bit;
6738 ULong mask;
6739 ULong maskc;
6740 IRTemp result = newTemp(Ity_I64);
6741 IRTemp op2 = newTemp(Ity_I64);
6742
6743 from = i3 & 63;
6744 to = i4 & 63;
6745 rot = i5 & 63;
6746 t_bit = i3 & 128;
6747 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6748 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6749 mkU8(64 - rot))));
6750 if (from <= to) {
6751 mask = ~0ULL;
6752 mask = (mask >> from) & (mask << (63 - to));
6753 maskc = ~mask;
6754 } else {
6755 maskc = ~0ULL;
6756 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6757 mask = ~maskc;
6758 }
6759 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6760 ), mkU64(mask)));
6761 if (t_bit == 0) {
6762 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6763 mkU64(maskc)), mkexpr(result)));
6764 }
6765 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6766
6767 return "rosbg";
6768}
6769
6770static HChar *
6771s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6772{
6773 UChar from;
6774 UChar to;
6775 UChar rot;
6776 UChar z_bit;
6777 ULong mask;
6778 ULong maskc;
6779 IRTemp op2 = newTemp(Ity_I64);
6780 IRTemp result = newTemp(Ity_I64);
6781
6782 from = i3 & 63;
6783 to = i4 & 63;
6784 rot = i5 & 63;
6785 z_bit = i4 & 128;
6786 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6787 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6788 mkU8(64 - rot))));
6789 if (from <= to) {
6790 mask = ~0ULL;
6791 mask = (mask >> from) & (mask << (63 - to));
6792 maskc = ~mask;
6793 } else {
6794 maskc = ~0ULL;
6795 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6796 mask = ~maskc;
6797 }
6798 if (z_bit == 0) {
6799 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6800 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6801 } else {
6802 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6803 }
6804 assign(result, get_gpr_dw0(r1));
6805 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6806
6807 return "risbg";
6808}
6809
6810static HChar *
6811s390_irgen_SAR(UChar r1, UChar r2)
6812{
6813 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006814 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006815 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6816
6817 return "sar";
6818}
6819
6820static HChar *
6821s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6822{
6823 IRTemp p1 = newTemp(Ity_I64);
6824 IRTemp p2 = newTemp(Ity_I64);
6825 IRTemp op = newTemp(Ity_I64);
6826 IRTemp result = newTemp(Ity_I64);
6827 Long sign_mask;
6828 IRTemp shift_amount = newTemp(Ity_I64);
6829
6830 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6831 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6832 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6833 ));
6834 sign_mask = 1ULL << 63;
6835 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6836 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6837 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6838 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6839 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6840 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6841 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6842
6843 return "slda";
6844}
6845
6846static HChar *
6847s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6848{
6849 IRTemp p1 = newTemp(Ity_I64);
6850 IRTemp p2 = newTemp(Ity_I64);
6851 IRTemp result = newTemp(Ity_I64);
6852
6853 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6854 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6855 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6856 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6857 mkexpr(op2addr), mkU64(63)))));
6858 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6859 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6860
6861 return "sldl";
6862}
6863
6864static HChar *
6865s390_irgen_SLA(UChar r1, IRTemp op2addr)
6866{
6867 IRTemp uop = newTemp(Ity_I32);
6868 IRTemp result = newTemp(Ity_I32);
6869 UInt sign_mask;
6870 IRTemp shift_amount = newTemp(Ity_I64);
6871 IRTemp op = newTemp(Ity_I32);
6872
6873 assign(op, get_gpr_w1(r1));
6874 assign(uop, get_gpr_w1(r1));
6875 sign_mask = 2147483648U;
6876 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6877 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6878 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6879 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6880 put_gpr_w1(r1, mkexpr(result));
6881 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6882
6883 return "sla";
6884}
6885
6886static HChar *
6887s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6888{
6889 IRTemp uop = newTemp(Ity_I32);
6890 IRTemp result = newTemp(Ity_I32);
6891 UInt sign_mask;
6892 IRTemp shift_amount = newTemp(Ity_I64);
6893 IRTemp op = newTemp(Ity_I32);
6894
6895 assign(op, get_gpr_w1(r3));
6896 assign(uop, get_gpr_w1(r3));
6897 sign_mask = 2147483648U;
6898 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6899 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6900 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6901 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6902 put_gpr_w1(r1, mkexpr(result));
6903 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6904
6905 return "slak";
6906}
6907
6908static HChar *
6909s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6910{
6911 IRTemp uop = newTemp(Ity_I64);
6912 IRTemp result = newTemp(Ity_I64);
6913 ULong sign_mask;
6914 IRTemp shift_amount = newTemp(Ity_I64);
6915 IRTemp op = newTemp(Ity_I64);
6916
6917 assign(op, get_gpr_dw0(r3));
6918 assign(uop, get_gpr_dw0(r3));
6919 sign_mask = 9223372036854775808ULL;
6920 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6921 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6922 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6923 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6924 put_gpr_dw0(r1, mkexpr(result));
6925 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6926
6927 return "slag";
6928}
6929
6930static HChar *
6931s390_irgen_SLL(UChar r1, IRTemp op2addr)
6932{
6933 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6934 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6935
6936 return "sll";
6937}
6938
6939static HChar *
6940s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6941{
6942 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6943 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6944
6945 return "sllk";
6946}
6947
6948static HChar *
6949s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
6950{
6951 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
6952 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6953
6954 return "sllg";
6955}
6956
6957static HChar *
6958s390_irgen_SRDA(UChar r1, IRTemp op2addr)
6959{
6960 IRTemp p1 = newTemp(Ity_I64);
6961 IRTemp p2 = newTemp(Ity_I64);
6962 IRTemp result = newTemp(Ity_I64);
6963
6964 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6965 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6966 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6967 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6968 mkexpr(op2addr), mkU64(63)))));
6969 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6970 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6971 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6972
6973 return "srda";
6974}
6975
6976static HChar *
6977s390_irgen_SRDL(UChar r1, IRTemp op2addr)
6978{
6979 IRTemp p1 = newTemp(Ity_I64);
6980 IRTemp p2 = newTemp(Ity_I64);
6981 IRTemp result = newTemp(Ity_I64);
6982
6983 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6984 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6985 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6986 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6987 mkexpr(op2addr), mkU64(63)))));
6988 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6989 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6990
6991 return "srdl";
6992}
6993
6994static HChar *
6995s390_irgen_SRA(UChar r1, IRTemp op2addr)
6996{
6997 IRTemp result = newTemp(Ity_I32);
6998 IRTemp op = newTemp(Ity_I32);
6999
7000 assign(op, get_gpr_w1(r1));
7001 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7002 mkexpr(op2addr), mkU64(63)))));
7003 put_gpr_w1(r1, mkexpr(result));
7004 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7005
7006 return "sra";
7007}
7008
7009static HChar *
7010s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
7011{
7012 IRTemp result = newTemp(Ity_I32);
7013 IRTemp op = newTemp(Ity_I32);
7014
7015 assign(op, get_gpr_w1(r3));
7016 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7017 mkexpr(op2addr), mkU64(63)))));
7018 put_gpr_w1(r1, mkexpr(result));
7019 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7020
7021 return "srak";
7022}
7023
7024static HChar *
7025s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7026{
7027 IRTemp result = newTemp(Ity_I64);
7028 IRTemp op = newTemp(Ity_I64);
7029
7030 assign(op, get_gpr_dw0(r3));
7031 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7032 mkexpr(op2addr), mkU64(63)))));
7033 put_gpr_dw0(r1, mkexpr(result));
7034 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7035
7036 return "srag";
7037}
7038
7039static HChar *
7040s390_irgen_SRL(UChar r1, IRTemp op2addr)
7041{
7042 IRTemp op = newTemp(Ity_I32);
7043
7044 assign(op, get_gpr_w1(r1));
7045 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7046 mkexpr(op2addr), mkU64(63)))));
7047
7048 return "srl";
7049}
7050
7051static HChar *
7052s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7053{
7054 IRTemp op = newTemp(Ity_I32);
7055
7056 assign(op, get_gpr_w1(r3));
7057 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7058 mkexpr(op2addr), mkU64(63)))));
7059
7060 return "srlk";
7061}
7062
7063static HChar *
7064s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7065{
7066 IRTemp op = newTemp(Ity_I64);
7067
7068 assign(op, get_gpr_dw0(r3));
7069 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7070 mkexpr(op2addr), mkU64(63)))));
7071
7072 return "srlg";
7073}
7074
7075static HChar *
7076s390_irgen_ST(UChar r1, IRTemp op2addr)
7077{
7078 store(mkexpr(op2addr), get_gpr_w1(r1));
7079
7080 return "st";
7081}
7082
7083static HChar *
7084s390_irgen_STY(UChar r1, IRTemp op2addr)
7085{
7086 store(mkexpr(op2addr), get_gpr_w1(r1));
7087
7088 return "sty";
7089}
7090
7091static HChar *
7092s390_irgen_STG(UChar r1, IRTemp op2addr)
7093{
7094 store(mkexpr(op2addr), get_gpr_dw0(r1));
7095
7096 return "stg";
7097}
7098
7099static HChar *
7100s390_irgen_STRL(UChar r1, UInt i2)
7101{
7102 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7103 get_gpr_w1(r1));
7104
7105 return "strl";
7106}
7107
7108static HChar *
7109s390_irgen_STGRL(UChar r1, UInt i2)
7110{
7111 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7112 get_gpr_dw0(r1));
7113
7114 return "stgrl";
7115}
7116
7117static HChar *
7118s390_irgen_STC(UChar r1, IRTemp op2addr)
7119{
7120 store(mkexpr(op2addr), get_gpr_b7(r1));
7121
7122 return "stc";
7123}
7124
7125static HChar *
7126s390_irgen_STCY(UChar r1, IRTemp op2addr)
7127{
7128 store(mkexpr(op2addr), get_gpr_b7(r1));
7129
7130 return "stcy";
7131}
7132
7133static HChar *
7134s390_irgen_STCH(UChar r1, IRTemp op2addr)
7135{
7136 store(mkexpr(op2addr), get_gpr_b3(r1));
7137
7138 return "stch";
7139}
7140
7141static HChar *
7142s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7143{
7144 UChar mask;
7145 UChar n;
7146
7147 mask = (UChar)r3;
7148 n = 0;
7149 if ((mask & 8) != 0) {
7150 store(mkexpr(op2addr), get_gpr_b4(r1));
7151 n = n + 1;
7152 }
7153 if ((mask & 4) != 0) {
7154 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7155 n = n + 1;
7156 }
7157 if ((mask & 2) != 0) {
7158 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7159 n = n + 1;
7160 }
7161 if ((mask & 1) != 0) {
7162 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7163 }
7164
7165 return "stcm";
7166}
7167
7168static HChar *
7169s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7170{
7171 UChar mask;
7172 UChar n;
7173
7174 mask = (UChar)r3;
7175 n = 0;
7176 if ((mask & 8) != 0) {
7177 store(mkexpr(op2addr), get_gpr_b4(r1));
7178 n = n + 1;
7179 }
7180 if ((mask & 4) != 0) {
7181 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7182 n = n + 1;
7183 }
7184 if ((mask & 2) != 0) {
7185 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7186 n = n + 1;
7187 }
7188 if ((mask & 1) != 0) {
7189 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7190 }
7191
7192 return "stcmy";
7193}
7194
7195static HChar *
7196s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7197{
7198 UChar mask;
7199 UChar n;
7200
7201 mask = (UChar)r3;
7202 n = 0;
7203 if ((mask & 8) != 0) {
7204 store(mkexpr(op2addr), get_gpr_b0(r1));
7205 n = n + 1;
7206 }
7207 if ((mask & 4) != 0) {
7208 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7209 n = n + 1;
7210 }
7211 if ((mask & 2) != 0) {
7212 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7213 n = n + 1;
7214 }
7215 if ((mask & 1) != 0) {
7216 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7217 }
7218
7219 return "stcmh";
7220}
7221
7222static HChar *
7223s390_irgen_STH(UChar r1, IRTemp op2addr)
7224{
7225 store(mkexpr(op2addr), get_gpr_hw3(r1));
7226
7227 return "sth";
7228}
7229
7230static HChar *
7231s390_irgen_STHY(UChar r1, IRTemp op2addr)
7232{
7233 store(mkexpr(op2addr), get_gpr_hw3(r1));
7234
7235 return "sthy";
7236}
7237
7238static HChar *
7239s390_irgen_STHRL(UChar r1, UInt i2)
7240{
7241 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7242 get_gpr_hw3(r1));
7243
7244 return "sthrl";
7245}
7246
7247static HChar *
7248s390_irgen_STHH(UChar r1, IRTemp op2addr)
7249{
7250 store(mkexpr(op2addr), get_gpr_hw1(r1));
7251
7252 return "sthh";
7253}
7254
7255static HChar *
7256s390_irgen_STFH(UChar r1, IRTemp op2addr)
7257{
7258 store(mkexpr(op2addr), get_gpr_w0(r1));
7259
7260 return "stfh";
7261}
7262
7263static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007264s390_irgen_STOC(UChar r1, IRTemp op2addr)
7265{
7266 /* condition is checked in format handler */
7267 store(mkexpr(op2addr), get_gpr_w1(r1));
7268
7269 return "stoc";
7270}
7271
7272static HChar *
7273s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7274{
7275 /* condition is checked in format handler */
7276 store(mkexpr(op2addr), get_gpr_dw0(r1));
7277
7278 return "stocg";
7279}
7280
7281static HChar *
sewardj2019a972011-03-07 16:04:07 +00007282s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7283{
7284 store(mkexpr(op2addr), get_gpr_dw0(r1));
7285 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7286
7287 return "stpq";
7288}
7289
7290static HChar *
7291s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7292{
7293 store(mkexpr(op2addr), get_gpr_b7(r1));
7294 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7295
7296 return "strvh";
7297}
7298
7299static HChar *
7300s390_irgen_STRV(UChar r1, IRTemp op2addr)
7301{
7302 store(mkexpr(op2addr), get_gpr_b7(r1));
7303 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7304 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7305 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7306
7307 return "strv";
7308}
7309
7310static HChar *
7311s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7312{
7313 store(mkexpr(op2addr), get_gpr_b7(r1));
7314 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7315 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7316 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7317 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7318 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7319 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7320 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7321
7322 return "strvg";
7323}
7324
7325static HChar *
7326s390_irgen_SR(UChar r1, UChar r2)
7327{
7328 IRTemp op1 = newTemp(Ity_I32);
7329 IRTemp op2 = newTemp(Ity_I32);
7330 IRTemp result = newTemp(Ity_I32);
7331
7332 assign(op1, get_gpr_w1(r1));
7333 assign(op2, get_gpr_w1(r2));
7334 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7335 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7336 put_gpr_w1(r1, mkexpr(result));
7337
7338 return "sr";
7339}
7340
7341static HChar *
7342s390_irgen_SGR(UChar r1, UChar r2)
7343{
7344 IRTemp op1 = newTemp(Ity_I64);
7345 IRTemp op2 = newTemp(Ity_I64);
7346 IRTemp result = newTemp(Ity_I64);
7347
7348 assign(op1, get_gpr_dw0(r1));
7349 assign(op2, get_gpr_dw0(r2));
7350 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7351 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7352 put_gpr_dw0(r1, mkexpr(result));
7353
7354 return "sgr";
7355}
7356
7357static HChar *
7358s390_irgen_SGFR(UChar r1, UChar r2)
7359{
7360 IRTemp op1 = newTemp(Ity_I64);
7361 IRTemp op2 = newTemp(Ity_I64);
7362 IRTemp result = newTemp(Ity_I64);
7363
7364 assign(op1, get_gpr_dw0(r1));
7365 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7366 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7367 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7368 put_gpr_dw0(r1, mkexpr(result));
7369
7370 return "sgfr";
7371}
7372
7373static HChar *
7374s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7375{
7376 IRTemp op2 = newTemp(Ity_I32);
7377 IRTemp op3 = newTemp(Ity_I32);
7378 IRTemp result = newTemp(Ity_I32);
7379
7380 assign(op2, get_gpr_w1(r2));
7381 assign(op3, get_gpr_w1(r3));
7382 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7383 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7384 put_gpr_w1(r1, mkexpr(result));
7385
7386 return "srk";
7387}
7388
7389static HChar *
7390s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7391{
7392 IRTemp op2 = newTemp(Ity_I64);
7393 IRTemp op3 = newTemp(Ity_I64);
7394 IRTemp result = newTemp(Ity_I64);
7395
7396 assign(op2, get_gpr_dw0(r2));
7397 assign(op3, get_gpr_dw0(r3));
7398 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7399 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7400 put_gpr_dw0(r1, mkexpr(result));
7401
7402 return "sgrk";
7403}
7404
7405static HChar *
7406s390_irgen_S(UChar r1, IRTemp op2addr)
7407{
7408 IRTemp op1 = newTemp(Ity_I32);
7409 IRTemp op2 = newTemp(Ity_I32);
7410 IRTemp result = newTemp(Ity_I32);
7411
7412 assign(op1, get_gpr_w1(r1));
7413 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7414 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7415 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7416 put_gpr_w1(r1, mkexpr(result));
7417
7418 return "s";
7419}
7420
7421static HChar *
7422s390_irgen_SY(UChar r1, IRTemp op2addr)
7423{
7424 IRTemp op1 = newTemp(Ity_I32);
7425 IRTemp op2 = newTemp(Ity_I32);
7426 IRTemp result = newTemp(Ity_I32);
7427
7428 assign(op1, get_gpr_w1(r1));
7429 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7430 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7431 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7432 put_gpr_w1(r1, mkexpr(result));
7433
7434 return "sy";
7435}
7436
7437static HChar *
7438s390_irgen_SG(UChar r1, IRTemp op2addr)
7439{
7440 IRTemp op1 = newTemp(Ity_I64);
7441 IRTemp op2 = newTemp(Ity_I64);
7442 IRTemp result = newTemp(Ity_I64);
7443
7444 assign(op1, get_gpr_dw0(r1));
7445 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7446 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7447 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7448 put_gpr_dw0(r1, mkexpr(result));
7449
7450 return "sg";
7451}
7452
7453static HChar *
7454s390_irgen_SGF(UChar r1, IRTemp op2addr)
7455{
7456 IRTemp op1 = newTemp(Ity_I64);
7457 IRTemp op2 = newTemp(Ity_I64);
7458 IRTemp result = newTemp(Ity_I64);
7459
7460 assign(op1, get_gpr_dw0(r1));
7461 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7462 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7463 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7464 put_gpr_dw0(r1, mkexpr(result));
7465
7466 return "sgf";
7467}
7468
7469static HChar *
7470s390_irgen_SH(UChar r1, IRTemp op2addr)
7471{
7472 IRTemp op1 = newTemp(Ity_I32);
7473 IRTemp op2 = newTemp(Ity_I32);
7474 IRTemp result = newTemp(Ity_I32);
7475
7476 assign(op1, get_gpr_w1(r1));
7477 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7478 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7479 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7480 put_gpr_w1(r1, mkexpr(result));
7481
7482 return "sh";
7483}
7484
7485static HChar *
7486s390_irgen_SHY(UChar r1, IRTemp op2addr)
7487{
7488 IRTemp op1 = newTemp(Ity_I32);
7489 IRTemp op2 = newTemp(Ity_I32);
7490 IRTemp result = newTemp(Ity_I32);
7491
7492 assign(op1, get_gpr_w1(r1));
7493 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7494 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7495 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7496 put_gpr_w1(r1, mkexpr(result));
7497
7498 return "shy";
7499}
7500
7501static HChar *
7502s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7503{
7504 IRTemp op2 = newTemp(Ity_I32);
7505 IRTemp op3 = newTemp(Ity_I32);
7506 IRTemp result = newTemp(Ity_I32);
7507
7508 assign(op2, get_gpr_w0(r1));
7509 assign(op3, get_gpr_w0(r2));
7510 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7511 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7512 put_gpr_w0(r1, mkexpr(result));
7513
7514 return "shhhr";
7515}
7516
7517static HChar *
7518s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7519{
7520 IRTemp op2 = newTemp(Ity_I32);
7521 IRTemp op3 = newTemp(Ity_I32);
7522 IRTemp result = newTemp(Ity_I32);
7523
7524 assign(op2, get_gpr_w0(r1));
7525 assign(op3, get_gpr_w1(r2));
7526 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7527 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7528 put_gpr_w0(r1, mkexpr(result));
7529
7530 return "shhlr";
7531}
7532
7533static HChar *
7534s390_irgen_SLR(UChar r1, UChar r2)
7535{
7536 IRTemp op1 = newTemp(Ity_I32);
7537 IRTemp op2 = newTemp(Ity_I32);
7538 IRTemp result = newTemp(Ity_I32);
7539
7540 assign(op1, get_gpr_w1(r1));
7541 assign(op2, get_gpr_w1(r2));
7542 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7543 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7544 put_gpr_w1(r1, mkexpr(result));
7545
7546 return "slr";
7547}
7548
7549static HChar *
7550s390_irgen_SLGR(UChar r1, UChar r2)
7551{
7552 IRTemp op1 = newTemp(Ity_I64);
7553 IRTemp op2 = newTemp(Ity_I64);
7554 IRTemp result = newTemp(Ity_I64);
7555
7556 assign(op1, get_gpr_dw0(r1));
7557 assign(op2, get_gpr_dw0(r2));
7558 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7559 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7560 put_gpr_dw0(r1, mkexpr(result));
7561
7562 return "slgr";
7563}
7564
7565static HChar *
7566s390_irgen_SLGFR(UChar r1, UChar r2)
7567{
7568 IRTemp op1 = newTemp(Ity_I64);
7569 IRTemp op2 = newTemp(Ity_I64);
7570 IRTemp result = newTemp(Ity_I64);
7571
7572 assign(op1, get_gpr_dw0(r1));
7573 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7574 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7575 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7576 put_gpr_dw0(r1, mkexpr(result));
7577
7578 return "slgfr";
7579}
7580
7581static HChar *
7582s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7583{
7584 IRTemp op2 = newTemp(Ity_I32);
7585 IRTemp op3 = newTemp(Ity_I32);
7586 IRTemp result = newTemp(Ity_I32);
7587
7588 assign(op2, get_gpr_w1(r2));
7589 assign(op3, get_gpr_w1(r3));
7590 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7591 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7592 put_gpr_w1(r1, mkexpr(result));
7593
7594 return "slrk";
7595}
7596
7597static HChar *
7598s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7599{
7600 IRTemp op2 = newTemp(Ity_I64);
7601 IRTemp op3 = newTemp(Ity_I64);
7602 IRTemp result = newTemp(Ity_I64);
7603
7604 assign(op2, get_gpr_dw0(r2));
7605 assign(op3, get_gpr_dw0(r3));
7606 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7607 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7608 put_gpr_dw0(r1, mkexpr(result));
7609
7610 return "slgrk";
7611}
7612
7613static HChar *
7614s390_irgen_SL(UChar r1, IRTemp op2addr)
7615{
7616 IRTemp op1 = newTemp(Ity_I32);
7617 IRTemp op2 = newTemp(Ity_I32);
7618 IRTemp result = newTemp(Ity_I32);
7619
7620 assign(op1, get_gpr_w1(r1));
7621 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7622 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7623 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7624 put_gpr_w1(r1, mkexpr(result));
7625
7626 return "sl";
7627}
7628
7629static HChar *
7630s390_irgen_SLY(UChar r1, IRTemp op2addr)
7631{
7632 IRTemp op1 = newTemp(Ity_I32);
7633 IRTemp op2 = newTemp(Ity_I32);
7634 IRTemp result = newTemp(Ity_I32);
7635
7636 assign(op1, get_gpr_w1(r1));
7637 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7638 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7639 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7640 put_gpr_w1(r1, mkexpr(result));
7641
7642 return "sly";
7643}
7644
7645static HChar *
7646s390_irgen_SLG(UChar r1, IRTemp op2addr)
7647{
7648 IRTemp op1 = newTemp(Ity_I64);
7649 IRTemp op2 = newTemp(Ity_I64);
7650 IRTemp result = newTemp(Ity_I64);
7651
7652 assign(op1, get_gpr_dw0(r1));
7653 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7654 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7655 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7656 put_gpr_dw0(r1, mkexpr(result));
7657
7658 return "slg";
7659}
7660
7661static HChar *
7662s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7663{
7664 IRTemp op1 = newTemp(Ity_I64);
7665 IRTemp op2 = newTemp(Ity_I64);
7666 IRTemp result = newTemp(Ity_I64);
7667
7668 assign(op1, get_gpr_dw0(r1));
7669 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7670 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7671 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7672 put_gpr_dw0(r1, mkexpr(result));
7673
7674 return "slgf";
7675}
7676
7677static HChar *
7678s390_irgen_SLFI(UChar r1, UInt i2)
7679{
7680 IRTemp op1 = newTemp(Ity_I32);
7681 UInt op2;
7682 IRTemp result = newTemp(Ity_I32);
7683
7684 assign(op1, get_gpr_w1(r1));
7685 op2 = i2;
7686 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7687 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7688 mkU32(op2)));
7689 put_gpr_w1(r1, mkexpr(result));
7690
7691 return "slfi";
7692}
7693
7694static HChar *
7695s390_irgen_SLGFI(UChar r1, UInt i2)
7696{
7697 IRTemp op1 = newTemp(Ity_I64);
7698 ULong op2;
7699 IRTemp result = newTemp(Ity_I64);
7700
7701 assign(op1, get_gpr_dw0(r1));
7702 op2 = (ULong)i2;
7703 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7704 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7705 mkU64(op2)));
7706 put_gpr_dw0(r1, mkexpr(result));
7707
7708 return "slgfi";
7709}
7710
7711static HChar *
7712s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7713{
7714 IRTemp op2 = newTemp(Ity_I32);
7715 IRTemp op3 = newTemp(Ity_I32);
7716 IRTemp result = newTemp(Ity_I32);
7717
7718 assign(op2, get_gpr_w0(r1));
7719 assign(op3, get_gpr_w0(r2));
7720 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7721 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7722 put_gpr_w0(r1, mkexpr(result));
7723
7724 return "slhhhr";
7725}
7726
7727static HChar *
7728s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7729{
7730 IRTemp op2 = newTemp(Ity_I32);
7731 IRTemp op3 = newTemp(Ity_I32);
7732 IRTemp result = newTemp(Ity_I32);
7733
7734 assign(op2, get_gpr_w0(r1));
7735 assign(op3, get_gpr_w1(r2));
7736 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7737 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7738 put_gpr_w0(r1, mkexpr(result));
7739
7740 return "slhhlr";
7741}
7742
7743static HChar *
7744s390_irgen_SLBR(UChar r1, UChar r2)
7745{
7746 IRTemp op1 = newTemp(Ity_I32);
7747 IRTemp op2 = newTemp(Ity_I32);
7748 IRTemp result = newTemp(Ity_I32);
7749 IRTemp borrow_in = newTemp(Ity_I32);
7750
7751 assign(op1, get_gpr_w1(r1));
7752 assign(op2, get_gpr_w1(r2));
7753 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7754 s390_call_calculate_cc(), mkU8(1))));
7755 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7756 mkexpr(borrow_in)));
7757 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7758 put_gpr_w1(r1, mkexpr(result));
7759
7760 return "slbr";
7761}
7762
7763static HChar *
7764s390_irgen_SLBGR(UChar r1, UChar r2)
7765{
7766 IRTemp op1 = newTemp(Ity_I64);
7767 IRTemp op2 = newTemp(Ity_I64);
7768 IRTemp result = newTemp(Ity_I64);
7769 IRTemp borrow_in = newTemp(Ity_I64);
7770
7771 assign(op1, get_gpr_dw0(r1));
7772 assign(op2, get_gpr_dw0(r2));
7773 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7774 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7775 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7776 mkexpr(borrow_in)));
7777 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7778 put_gpr_dw0(r1, mkexpr(result));
7779
7780 return "slbgr";
7781}
7782
7783static HChar *
7784s390_irgen_SLB(UChar r1, IRTemp op2addr)
7785{
7786 IRTemp op1 = newTemp(Ity_I32);
7787 IRTemp op2 = newTemp(Ity_I32);
7788 IRTemp result = newTemp(Ity_I32);
7789 IRTemp borrow_in = newTemp(Ity_I32);
7790
7791 assign(op1, get_gpr_w1(r1));
7792 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7793 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7794 s390_call_calculate_cc(), mkU8(1))));
7795 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7796 mkexpr(borrow_in)));
7797 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7798 put_gpr_w1(r1, mkexpr(result));
7799
7800 return "slb";
7801}
7802
7803static HChar *
7804s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7805{
7806 IRTemp op1 = newTemp(Ity_I64);
7807 IRTemp op2 = newTemp(Ity_I64);
7808 IRTemp result = newTemp(Ity_I64);
7809 IRTemp borrow_in = newTemp(Ity_I64);
7810
7811 assign(op1, get_gpr_dw0(r1));
7812 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7813 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7814 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7815 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7816 mkexpr(borrow_in)));
7817 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7818 put_gpr_dw0(r1, mkexpr(result));
7819
7820 return "slbg";
7821}
7822
7823static HChar *
7824s390_irgen_SVC(UChar i)
7825{
7826 IRTemp sysno = newTemp(Ity_I64);
7827
7828 if (i != 0) {
7829 assign(sysno, mkU64(i));
7830 } else {
7831 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7832 }
7833 system_call(mkexpr(sysno));
7834
7835 return "svc";
7836}
7837
7838static HChar *
7839s390_irgen_TS(IRTemp op2addr)
7840{
7841 IRTemp value = newTemp(Ity_I8);
7842
7843 assign(value, load(Ity_I8, mkexpr(op2addr)));
7844 s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
7845 store(mkexpr(op2addr), mkU8(255));
7846
7847 return "ts";
7848}
7849
7850static HChar *
7851s390_irgen_TM(UChar i2, IRTemp op1addr)
7852{
7853 UChar mask;
7854 IRTemp value = newTemp(Ity_I8);
7855
7856 mask = i2;
7857 assign(value, load(Ity_I8, mkexpr(op1addr)));
7858 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7859 mkU8(mask)));
7860
7861 return "tm";
7862}
7863
7864static HChar *
7865s390_irgen_TMY(UChar i2, IRTemp op1addr)
7866{
7867 UChar mask;
7868 IRTemp value = newTemp(Ity_I8);
7869
7870 mask = i2;
7871 assign(value, load(Ity_I8, mkexpr(op1addr)));
7872 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7873 mkU8(mask)));
7874
7875 return "tmy";
7876}
7877
7878static HChar *
7879s390_irgen_TMHH(UChar r1, UShort i2)
7880{
7881 UShort mask;
7882 IRTemp value = newTemp(Ity_I16);
7883
7884 mask = i2;
7885 assign(value, get_gpr_hw0(r1));
7886 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7887 mkU16(mask)));
7888
7889 return "tmhh";
7890}
7891
7892static HChar *
7893s390_irgen_TMHL(UChar r1, UShort i2)
7894{
7895 UShort mask;
7896 IRTemp value = newTemp(Ity_I16);
7897
7898 mask = i2;
7899 assign(value, get_gpr_hw1(r1));
7900 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7901 mkU16(mask)));
7902
7903 return "tmhl";
7904}
7905
7906static HChar *
7907s390_irgen_TMLH(UChar r1, UShort i2)
7908{
7909 UShort mask;
7910 IRTemp value = newTemp(Ity_I16);
7911
7912 mask = i2;
7913 assign(value, get_gpr_hw2(r1));
7914 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7915 mkU16(mask)));
7916
7917 return "tmlh";
7918}
7919
7920static HChar *
7921s390_irgen_TMLL(UChar r1, UShort i2)
7922{
7923 UShort mask;
7924 IRTemp value = newTemp(Ity_I16);
7925
7926 mask = i2;
7927 assign(value, get_gpr_hw3(r1));
7928 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7929 mkU16(mask)));
7930
7931 return "tmll";
7932}
7933
7934static HChar *
7935s390_irgen_EFPC(UChar r1)
7936{
7937 put_gpr_w1(r1, get_fpc_w0());
7938
7939 return "efpc";
7940}
7941
7942static HChar *
7943s390_irgen_LER(UChar r1, UChar r2)
7944{
7945 put_fpr_w0(r1, get_fpr_w0(r2));
7946
7947 return "ler";
7948}
7949
7950static HChar *
7951s390_irgen_LDR(UChar r1, UChar r2)
7952{
7953 put_fpr_dw0(r1, get_fpr_dw0(r2));
7954
7955 return "ldr";
7956}
7957
7958static HChar *
7959s390_irgen_LXR(UChar r1, UChar r2)
7960{
7961 put_fpr_dw0(r1, get_fpr_dw0(r2));
7962 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
7963
7964 return "lxr";
7965}
7966
7967static HChar *
7968s390_irgen_LE(UChar r1, IRTemp op2addr)
7969{
7970 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7971
7972 return "le";
7973}
7974
7975static HChar *
7976s390_irgen_LD(UChar r1, IRTemp op2addr)
7977{
7978 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7979
7980 return "ld";
7981}
7982
7983static HChar *
7984s390_irgen_LEY(UChar r1, IRTemp op2addr)
7985{
7986 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7987
7988 return "ley";
7989}
7990
7991static HChar *
7992s390_irgen_LDY(UChar r1, IRTemp op2addr)
7993{
7994 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7995
7996 return "ldy";
7997}
7998
7999static HChar *
8000s390_irgen_LFPC(IRTemp op2addr)
8001{
8002 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
8003
8004 return "lfpc";
8005}
8006
8007static HChar *
8008s390_irgen_LZER(UChar r1)
8009{
8010 put_fpr_w0(r1, mkF32i(0x0));
8011
8012 return "lzer";
8013}
8014
8015static HChar *
8016s390_irgen_LZDR(UChar r1)
8017{
8018 put_fpr_dw0(r1, mkF64i(0x0));
8019
8020 return "lzdr";
8021}
8022
8023static HChar *
8024s390_irgen_LZXR(UChar r1)
8025{
8026 put_fpr_dw0(r1, mkF64i(0x0));
8027 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8028
8029 return "lzxr";
8030}
8031
8032static HChar *
8033s390_irgen_SRNM(IRTemp op2addr)
8034{
8035 UInt mask;
8036
8037 mask = 3;
8038 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8039 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8040 );
8041
8042 return "srnm";
8043}
8044
8045static HChar *
8046s390_irgen_SFPC(UChar r1)
8047{
8048 put_fpc_w0(get_gpr_w1(r1));
8049
8050 return "sfpc";
8051}
8052
8053static HChar *
8054s390_irgen_STE(UChar r1, IRTemp op2addr)
8055{
8056 store(mkexpr(op2addr), get_fpr_w0(r1));
8057
8058 return "ste";
8059}
8060
8061static HChar *
8062s390_irgen_STD(UChar r1, IRTemp op2addr)
8063{
8064 store(mkexpr(op2addr), get_fpr_dw0(r1));
8065
8066 return "std";
8067}
8068
8069static HChar *
8070s390_irgen_STEY(UChar r1, IRTemp op2addr)
8071{
8072 store(mkexpr(op2addr), get_fpr_w0(r1));
8073
8074 return "stey";
8075}
8076
8077static HChar *
8078s390_irgen_STDY(UChar r1, IRTemp op2addr)
8079{
8080 store(mkexpr(op2addr), get_fpr_dw0(r1));
8081
8082 return "stdy";
8083}
8084
8085static HChar *
8086s390_irgen_STFPC(IRTemp op2addr)
8087{
8088 store(mkexpr(op2addr), get_fpc_w0());
8089
8090 return "stfpc";
8091}
8092
8093static HChar *
8094s390_irgen_AEBR(UChar r1, UChar r2)
8095{
8096 IRTemp op1 = newTemp(Ity_F32);
8097 IRTemp op2 = newTemp(Ity_F32);
8098 IRTemp result = newTemp(Ity_F32);
8099
8100 assign(op1, get_fpr_w0(r1));
8101 assign(op2, get_fpr_w0(r2));
8102 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8103 mkexpr(op2)));
8104 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8105 put_fpr_w0(r1, mkexpr(result));
8106
8107 return "aebr";
8108}
8109
8110static HChar *
8111s390_irgen_ADBR(UChar r1, UChar r2)
8112{
8113 IRTemp op1 = newTemp(Ity_F64);
8114 IRTemp op2 = newTemp(Ity_F64);
8115 IRTemp result = newTemp(Ity_F64);
8116
8117 assign(op1, get_fpr_dw0(r1));
8118 assign(op2, get_fpr_dw0(r2));
8119 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8120 mkexpr(op2)));
8121 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8122 put_fpr_dw0(r1, mkexpr(result));
8123
8124 return "adbr";
8125}
8126
8127static HChar *
8128s390_irgen_AEB(UChar r1, IRTemp op2addr)
8129{
8130 IRTemp op1 = newTemp(Ity_F32);
8131 IRTemp op2 = newTemp(Ity_F32);
8132 IRTemp result = newTemp(Ity_F32);
8133
8134 assign(op1, get_fpr_w0(r1));
8135 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8136 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8137 mkexpr(op2)));
8138 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8139 put_fpr_w0(r1, mkexpr(result));
8140
8141 return "aeb";
8142}
8143
8144static HChar *
8145s390_irgen_ADB(UChar r1, IRTemp op2addr)
8146{
8147 IRTemp op1 = newTemp(Ity_F64);
8148 IRTemp op2 = newTemp(Ity_F64);
8149 IRTemp result = newTemp(Ity_F64);
8150
8151 assign(op1, get_fpr_dw0(r1));
8152 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8153 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8154 mkexpr(op2)));
8155 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8156 put_fpr_dw0(r1, mkexpr(result));
8157
8158 return "adb";
8159}
8160
8161static HChar *
8162s390_irgen_CEFBR(UChar r1, UChar r2)
8163{
8164 IRTemp op2 = newTemp(Ity_I32);
8165
8166 assign(op2, get_gpr_w1(r2));
8167 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8168
8169 return "cefbr";
8170}
8171
8172static HChar *
8173s390_irgen_CDFBR(UChar r1, UChar r2)
8174{
8175 IRTemp op2 = newTemp(Ity_I32);
8176
8177 assign(op2, get_gpr_w1(r2));
8178 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8179
8180 return "cdfbr";
8181}
8182
8183static HChar *
8184s390_irgen_CEGBR(UChar r1, UChar r2)
8185{
8186 IRTemp op2 = newTemp(Ity_I64);
8187
8188 assign(op2, get_gpr_dw0(r2));
8189 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8190
8191 return "cegbr";
8192}
8193
8194static HChar *
8195s390_irgen_CDGBR(UChar r1, UChar r2)
8196{
8197 IRTemp op2 = newTemp(Ity_I64);
8198
8199 assign(op2, get_gpr_dw0(r2));
8200 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8201
8202 return "cdgbr";
8203}
8204
8205static HChar *
8206s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8207{
8208 IRTemp op = newTemp(Ity_F32);
8209 IRTemp result = newTemp(Ity_I32);
8210
8211 assign(op, get_fpr_w0(r2));
8212 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8213 mkexpr(op)));
8214 put_gpr_w1(r1, mkexpr(result));
8215 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8216
8217 return "cfebr";
8218}
8219
8220static HChar *
8221s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8222{
8223 IRTemp op = newTemp(Ity_F64);
8224 IRTemp result = newTemp(Ity_I32);
8225
8226 assign(op, get_fpr_dw0(r2));
8227 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8228 mkexpr(op)));
8229 put_gpr_w1(r1, mkexpr(result));
8230 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8231
8232 return "cfdbr";
8233}
8234
8235static HChar *
8236s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8237{
8238 IRTemp op = newTemp(Ity_F32);
8239 IRTemp result = newTemp(Ity_I64);
8240
8241 assign(op, get_fpr_w0(r2));
8242 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8243 mkexpr(op)));
8244 put_gpr_dw0(r1, mkexpr(result));
8245 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8246
8247 return "cgebr";
8248}
8249
8250static HChar *
8251s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8252{
8253 IRTemp op = newTemp(Ity_F64);
8254 IRTemp result = newTemp(Ity_I64);
8255
8256 assign(op, get_fpr_dw0(r2));
8257 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8258 mkexpr(op)));
8259 put_gpr_dw0(r1, mkexpr(result));
8260 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8261
8262 return "cgdbr";
8263}
8264
8265static HChar *
8266s390_irgen_DEBR(UChar r1, UChar r2)
8267{
8268 IRTemp op1 = newTemp(Ity_F32);
8269 IRTemp op2 = newTemp(Ity_F32);
8270 IRTemp result = newTemp(Ity_F32);
8271
8272 assign(op1, get_fpr_w0(r1));
8273 assign(op2, get_fpr_w0(r2));
8274 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8275 mkexpr(op2)));
8276 put_fpr_w0(r1, mkexpr(result));
8277
8278 return "debr";
8279}
8280
8281static HChar *
8282s390_irgen_DDBR(UChar r1, UChar r2)
8283{
8284 IRTemp op1 = newTemp(Ity_F64);
8285 IRTemp op2 = newTemp(Ity_F64);
8286 IRTemp result = newTemp(Ity_F64);
8287
8288 assign(op1, get_fpr_dw0(r1));
8289 assign(op2, get_fpr_dw0(r2));
8290 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8291 mkexpr(op2)));
8292 put_fpr_dw0(r1, mkexpr(result));
8293
8294 return "ddbr";
8295}
8296
8297static HChar *
8298s390_irgen_DEB(UChar r1, IRTemp op2addr)
8299{
8300 IRTemp op1 = newTemp(Ity_F32);
8301 IRTemp op2 = newTemp(Ity_F32);
8302 IRTemp result = newTemp(Ity_F32);
8303
8304 assign(op1, get_fpr_w0(r1));
8305 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8306 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8307 mkexpr(op2)));
8308 put_fpr_w0(r1, mkexpr(result));
8309
8310 return "deb";
8311}
8312
8313static HChar *
8314s390_irgen_DDB(UChar r1, IRTemp op2addr)
8315{
8316 IRTemp op1 = newTemp(Ity_F64);
8317 IRTemp op2 = newTemp(Ity_F64);
8318 IRTemp result = newTemp(Ity_F64);
8319
8320 assign(op1, get_fpr_dw0(r1));
8321 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8322 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8323 mkexpr(op2)));
8324 put_fpr_dw0(r1, mkexpr(result));
8325
8326 return "ddb";
8327}
8328
8329static HChar *
8330s390_irgen_LTEBR(UChar r1, UChar r2)
8331{
8332 IRTemp result = newTemp(Ity_F32);
8333
8334 assign(result, get_fpr_w0(r2));
8335 put_fpr_w0(r1, mkexpr(result));
8336 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8337
8338 return "ltebr";
8339}
8340
8341static HChar *
8342s390_irgen_LTDBR(UChar r1, UChar r2)
8343{
8344 IRTemp result = newTemp(Ity_F64);
8345
8346 assign(result, get_fpr_dw0(r2));
8347 put_fpr_dw0(r1, mkexpr(result));
8348 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8349
8350 return "ltdbr";
8351}
8352
8353static HChar *
8354s390_irgen_LCEBR(UChar r1, UChar r2)
8355{
8356 IRTemp result = newTemp(Ity_F32);
8357
8358 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8359 put_fpr_w0(r1, mkexpr(result));
8360 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8361
8362 return "lcebr";
8363}
8364
8365static HChar *
8366s390_irgen_LCDBR(UChar r1, UChar r2)
8367{
8368 IRTemp result = newTemp(Ity_F64);
8369
8370 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8371 put_fpr_dw0(r1, mkexpr(result));
8372 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8373
8374 return "lcdbr";
8375}
8376
8377static HChar *
8378s390_irgen_LDEBR(UChar r1, UChar r2)
8379{
8380 IRTemp op = newTemp(Ity_F32);
8381
8382 assign(op, get_fpr_w0(r2));
8383 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8384
8385 return "ldebr";
8386}
8387
8388static HChar *
8389s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8390{
8391 IRTemp op = newTemp(Ity_F32);
8392
8393 assign(op, load(Ity_F32, mkexpr(op2addr)));
8394 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8395
8396 return "ldeb";
8397}
8398
8399static HChar *
8400s390_irgen_LEDBR(UChar r1, UChar r2)
8401{
8402 IRTemp op = newTemp(Ity_F64);
8403
8404 assign(op, get_fpr_dw0(r2));
8405 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8406
8407 return "ledbr";
8408}
8409
8410static HChar *
8411s390_irgen_MEEBR(UChar r1, UChar r2)
8412{
8413 IRTemp op1 = newTemp(Ity_F32);
8414 IRTemp op2 = newTemp(Ity_F32);
8415 IRTemp result = newTemp(Ity_F32);
8416
8417 assign(op1, get_fpr_w0(r1));
8418 assign(op2, get_fpr_w0(r2));
8419 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8420 mkexpr(op2)));
8421 put_fpr_w0(r1, mkexpr(result));
8422
8423 return "meebr";
8424}
8425
8426static HChar *
8427s390_irgen_MDBR(UChar r1, UChar r2)
8428{
8429 IRTemp op1 = newTemp(Ity_F64);
8430 IRTemp op2 = newTemp(Ity_F64);
8431 IRTemp result = newTemp(Ity_F64);
8432
8433 assign(op1, get_fpr_dw0(r1));
8434 assign(op2, get_fpr_dw0(r2));
8435 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8436 mkexpr(op2)));
8437 put_fpr_dw0(r1, mkexpr(result));
8438
8439 return "mdbr";
8440}
8441
8442static HChar *
8443s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8444{
8445 IRTemp op1 = newTemp(Ity_F32);
8446 IRTemp op2 = newTemp(Ity_F32);
8447 IRTemp result = newTemp(Ity_F32);
8448
8449 assign(op1, get_fpr_w0(r1));
8450 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8451 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8452 mkexpr(op2)));
8453 put_fpr_w0(r1, mkexpr(result));
8454
8455 return "meeb";
8456}
8457
8458static HChar *
8459s390_irgen_MDB(UChar r1, IRTemp op2addr)
8460{
8461 IRTemp op1 = newTemp(Ity_F64);
8462 IRTemp op2 = newTemp(Ity_F64);
8463 IRTemp result = newTemp(Ity_F64);
8464
8465 assign(op1, get_fpr_dw0(r1));
8466 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8467 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8468 mkexpr(op2)));
8469 put_fpr_dw0(r1, mkexpr(result));
8470
8471 return "mdb";
8472}
8473
8474static HChar *
8475s390_irgen_SEBR(UChar r1, UChar r2)
8476{
8477 IRTemp op1 = newTemp(Ity_F32);
8478 IRTemp op2 = newTemp(Ity_F32);
8479 IRTemp result = newTemp(Ity_F32);
8480
8481 assign(op1, get_fpr_w0(r1));
8482 assign(op2, get_fpr_w0(r2));
8483 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8484 mkexpr(op2)));
8485 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8486 put_fpr_w0(r1, mkexpr(result));
8487
8488 return "sebr";
8489}
8490
8491static HChar *
8492s390_irgen_SDBR(UChar r1, UChar r2)
8493{
8494 IRTemp op1 = newTemp(Ity_F64);
8495 IRTemp op2 = newTemp(Ity_F64);
8496 IRTemp result = newTemp(Ity_F64);
8497
8498 assign(op1, get_fpr_dw0(r1));
8499 assign(op2, get_fpr_dw0(r2));
8500 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8501 mkexpr(op2)));
8502 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8503 put_fpr_dw0(r1, mkexpr(result));
8504
8505 return "sdbr";
8506}
8507
8508static HChar *
8509s390_irgen_SEB(UChar r1, IRTemp op2addr)
8510{
8511 IRTemp op1 = newTemp(Ity_F32);
8512 IRTemp op2 = newTemp(Ity_F32);
8513 IRTemp result = newTemp(Ity_F32);
8514
8515 assign(op1, get_fpr_w0(r1));
8516 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8517 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8518 mkexpr(op2)));
8519 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8520 put_fpr_w0(r1, mkexpr(result));
8521
8522 return "seb";
8523}
8524
8525static HChar *
8526s390_irgen_SDB(UChar r1, IRTemp op2addr)
8527{
8528 IRTemp op1 = newTemp(Ity_F64);
8529 IRTemp op2 = newTemp(Ity_F64);
8530 IRTemp result = newTemp(Ity_F64);
8531
8532 assign(op1, get_fpr_dw0(r1));
8533 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8534 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8535 mkexpr(op2)));
8536 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8537 put_fpr_dw0(r1, mkexpr(result));
8538
8539 return "sdb";
8540}
8541
8542
8543static HChar *
8544s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8545{
8546 IRTemp current1 = newTemp(Ity_I8);
8547 IRTemp current2 = newTemp(Ity_I8);
8548 IRTemp counter = newTemp(Ity_I64);
8549
8550 assign(counter, get_counter_dw0());
8551 put_counter_dw0(mkU64(0));
8552
8553 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8554 mkexpr(counter))));
8555 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8556 mkexpr(counter))));
8557 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8558 False);
8559
8560 /* Both fields differ ? */
8561 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8562 guest_IA_next_instr);
8563
8564 /* Check for end of field */
8565 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8566 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8567 guest_IA_curr_instr);
8568 put_counter_dw0(mkU64(0));
8569
8570 return "clc";
8571}
8572
8573static HChar *
8574s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8575{
8576 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8577
8578 addr1 = newTemp(Ity_I64);
8579 addr3 = newTemp(Ity_I64);
8580 addr1_load = newTemp(Ity_I64);
8581 addr3_load = newTemp(Ity_I64);
8582 len1 = newTemp(Ity_I64);
8583 len3 = newTemp(Ity_I64);
8584 single1 = newTemp(Ity_I8);
8585 single3 = newTemp(Ity_I8);
8586
8587 assign(addr1, get_gpr_dw0(r1));
8588 assign(len1, get_gpr_dw0(r1 + 1));
8589 assign(addr3, get_gpr_dw0(r3));
8590 assign(len3, get_gpr_dw0(r3 + 1));
8591
8592 /* len1 == 0 and len3 == 0? Exit */
8593 s390_cc_set(0);
8594 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8595 mkexpr(len3)), mkU64(0)),
8596 guest_IA_next_instr);
8597
8598 /* A mux requires both ways to be possible. This is a way to prevent clcle
8599 from reading from addr1 if it should read from the pad. Since the pad
8600 has no address, just read from the instruction, we discard that anyway */
8601 assign(addr1_load,
8602 IRExpr_Mux0X(unop(Iop_1Uto8,
8603 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8604 mkexpr(addr1),
8605 mkU64(guest_IA_curr_instr)));
8606
8607 /* same for addr3 */
8608 assign(addr3_load,
8609 IRExpr_Mux0X(unop(Iop_1Uto8,
8610 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8611 mkexpr(addr3),
8612 mkU64(guest_IA_curr_instr)));
8613
8614 assign(single1,
8615 IRExpr_Mux0X(unop(Iop_1Uto8,
8616 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8617 load(Ity_I8, mkexpr(addr1_load)),
8618 unop(Iop_64to8, mkexpr(pad2))));
8619
8620 assign(single3,
8621 IRExpr_Mux0X(unop(Iop_1Uto8,
8622 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8623 load(Ity_I8, mkexpr(addr3_load)),
8624 unop(Iop_64to8, mkexpr(pad2))));
8625
8626 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8627 /* Both fields differ ? */
8628 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8629 guest_IA_next_instr);
8630
8631 /* If a length in 0 we must not change this length and the address */
8632 put_gpr_dw0(r1,
8633 IRExpr_Mux0X(unop(Iop_1Uto8,
8634 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8635 binop(Iop_Add64, mkexpr(addr1), mkU64(1)),
8636 mkexpr(addr1)));
8637
8638 put_gpr_dw0(r1 + 1,
8639 IRExpr_Mux0X(unop(Iop_1Uto8,
8640 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8641 binop(Iop_Sub64, mkexpr(len1), mkU64(1)),
8642 mkU64(0)));
8643
8644 put_gpr_dw0(r3,
8645 IRExpr_Mux0X(unop(Iop_1Uto8,
8646 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8647 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
8648 mkexpr(addr3)));
8649
8650 put_gpr_dw0(r3 + 1,
8651 IRExpr_Mux0X(unop(Iop_1Uto8,
8652 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8653 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
8654 mkU64(0)));
8655
8656 /* The architecture requires that we exit with CC3 after a machine specific
8657 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8658 s390_cc_set(3);
8659 if_condition_goto(binop(Iop_CmpEQ64,
8660 binop(Iop_And64,
8661 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8662 mkU64(0xfff)),
8663 mkU64(0)),
8664 guest_IA_next_instr);
8665
floriana64c2432011-07-16 02:11:50 +00008666 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00008667
8668 return "clcle";
8669}
floriana64c2432011-07-16 02:11:50 +00008670
sewardj2019a972011-03-07 16:04:07 +00008671static void
8672s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8673{
8674 IRTemp old1 = newTemp(Ity_I8);
8675 IRTemp old2 = newTemp(Ity_I8);
8676 IRTemp new1 = newTemp(Ity_I8);
8677 IRTemp counter = newTemp(Ity_I32);
8678 IRTemp addr1 = newTemp(Ity_I64);
8679
8680 assign(counter, get_counter_w0());
8681
8682 assign(addr1, binop(Iop_Add64, mkexpr(start1),
8683 unop(Iop_32Uto64, mkexpr(counter))));
8684
8685 assign(old1, load(Ity_I8, mkexpr(addr1)));
8686 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8687 unop(Iop_32Uto64,mkexpr(counter)))));
8688 assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
8689
8690 store(mkexpr(addr1),
8691 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
8692 mkexpr(start2))),
8693 mkexpr(new1), mkU8(0)));
8694 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
8695 get_counter_w1()));
8696
8697 /* Check for end of field */
8698 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
8699 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
8700 guest_IA_curr_instr);
8701 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
8702 False);
8703 put_counter_dw0(mkU64(0));
8704}
8705
8706
8707static void
8708s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8709{
8710 IRTemp current1 = newTemp(Ity_I8);
8711 IRTemp current2 = newTemp(Ity_I8);
8712 IRTemp counter = newTemp(Ity_I64);
8713
8714 assign(counter, get_counter_dw0());
8715 put_counter_dw0(mkU64(0));
8716
8717 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8718 mkexpr(counter))));
8719 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8720 mkexpr(counter))));
8721 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8722 False);
8723
8724 /* Both fields differ ? */
8725 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8726 guest_IA_next_instr);
8727
8728 /* Check for end of field */
8729 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8730 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8731 guest_IA_curr_instr);
8732 put_counter_dw0(mkU64(0));
8733}
8734
8735static void
8736s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8737{
8738 IRTemp counter = newTemp(Ity_I64);
8739
8740 assign(counter, get_counter_dw0());
8741
8742 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8743 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8744
8745 /* Check for end of field */
8746 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8747 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8748 guest_IA_curr_instr);
8749 put_counter_dw0(mkU64(0));
8750}
8751
8752
8753
8754static void
8755s390_irgen_EX_SS(UChar r, IRTemp addr2,
8756void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8757{
8758 struct SS {
8759 unsigned int op : 8;
8760 unsigned int l : 8;
8761 unsigned int b1 : 4;
8762 unsigned int d1 : 12;
8763 unsigned int b2 : 4;
8764 unsigned int d2 : 12;
8765 };
8766 union {
8767 struct SS dec;
8768 unsigned long bytes;
8769 } ss;
8770 IRTemp cond;
8771 IRDirty *d;
8772 IRTemp torun;
8773
8774 IRTemp start1 = newTemp(Ity_I64);
8775 IRTemp start2 = newTemp(Ity_I64);
8776 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8777 cond = newTemp(Ity_I1);
8778 torun = newTemp(Ity_I64);
8779
8780 assign(torun, load(Ity_I64, mkexpr(addr2)));
8781 /* Start with a check that the saved code is still correct */
8782 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8783 /* If not, save the new value */
8784 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8785 mkIRExprVec_1(mkexpr(torun)));
8786 d->guard = mkexpr(cond);
8787 stmt(IRStmt_Dirty(d));
8788
8789 /* and restart */
8790 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8791 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8792 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8793 IRConst_U64(guest_IA_curr_instr)));
8794
8795 ss.bytes = last_execute_target;
8796 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8797 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8798 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8799 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8800 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8801 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8802 irgen(len, start1, start2);
8803 last_execute_target = 0;
8804}
8805
8806static HChar *
8807s390_irgen_EX(UChar r1, IRTemp addr2)
8808{
8809 switch(last_execute_target & 0xff00000000000000ULL) {
8810 case 0:
8811 {
8812 /* no code information yet */
8813 IRDirty *d;
8814
8815 /* so safe the code... */
8816 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8817 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8818 stmt(IRStmt_Dirty(d));
8819 /* and restart */
8820 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8821 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8822 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8823 IRConst_U64(guest_IA_curr_instr)));
8824 /* we know that this will be invalidated */
8825 irsb->next = mkU64(guest_IA_next_instr);
8826 dis_res->whatNext = Dis_StopHere;
8827 break;
8828 }
8829
8830 case 0xd200000000000000ULL:
8831 /* special case MVC */
8832 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8833 return "mvc via ex";
8834
8835 case 0xd500000000000000ULL:
8836 /* special case CLC */
8837 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8838 return "clc via ex";
8839
8840 case 0xd700000000000000ULL:
8841 /* special case XC */
8842 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8843 return "xc via ex";
8844
8845
8846 default:
8847 {
8848 /* everything else will get a self checking prefix that also checks the
8849 register content */
8850 IRDirty *d;
8851 UChar *bytes;
8852 IRTemp cond;
8853 IRTemp orperand;
8854 IRTemp torun;
8855
8856 cond = newTemp(Ity_I1);
8857 orperand = newTemp(Ity_I64);
8858 torun = newTemp(Ity_I64);
8859
8860 if (r1 == 0)
8861 assign(orperand, mkU64(0));
8862 else
8863 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8864 /* This code is going to be translated */
8865 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8866 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8867
8868 /* Start with a check that saved code is still correct */
8869 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8870 mkU64(last_execute_target)));
8871 /* If not, save the new value */
8872 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8873 mkIRExprVec_1(mkexpr(torun)));
8874 d->guard = mkexpr(cond);
8875 stmt(IRStmt_Dirty(d));
8876
8877 /* and restart */
8878 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8879 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8880 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8881 IRConst_U64(guest_IA_curr_instr)));
8882
8883 /* Now comes the actual translation */
8884 bytes = (UChar *) &last_execute_target;
8885 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
8886 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00008887 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00008888 vex_printf(" which was executed by\n");
8889 /* dont make useless translations in the next execute */
8890 last_execute_target = 0;
8891 }
8892 }
8893 return "ex";
8894}
8895
8896static HChar *
8897s390_irgen_EXRL(UChar r1, UInt offset)
8898{
8899 IRTemp addr = newTemp(Ity_I64);
8900 /* we might save one round trip because we know the target */
8901 if (!last_execute_target)
8902 last_execute_target = *(ULong *)(HWord)
8903 (guest_IA_curr_instr + offset * 2UL);
8904 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
8905 s390_irgen_EX(r1, addr);
8906 return "exrl";
8907}
8908
8909static HChar *
8910s390_irgen_IPM(UChar r1)
8911{
8912 // As long as we dont support SPM, lets just assume 0 as program mask
8913 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
8914 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
8915
8916 return "ipm";
8917}
8918
8919
8920static HChar *
8921s390_irgen_SRST(UChar r1, UChar r2)
8922{
8923 IRTemp address = newTemp(Ity_I64);
8924 IRTemp next = newTemp(Ity_I64);
8925 IRTemp delim = newTemp(Ity_I8);
8926 IRTemp counter = newTemp(Ity_I64);
8927 IRTemp byte = newTemp(Ity_I8);
8928
8929 assign(address, get_gpr_dw0(r2));
8930 assign(next, get_gpr_dw0(r1));
8931
8932 assign(counter, get_counter_dw0());
8933 put_counter_dw0(mkU64(0));
8934
8935 // start = next? CC=2 and out r1 and r2 unchanged
8936 s390_cc_set(2);
8937 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
8938 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
8939 guest_IA_next_instr);
8940
8941 assign(byte, load(Ity_I8, mkexpr(address)));
8942 assign(delim, get_gpr_b7(0));
8943
8944 // byte = delim? CC=1, R1=address
8945 s390_cc_set(1);
8946 put_gpr_dw0(r1, mkexpr(address));
8947 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
8948 guest_IA_next_instr);
8949
8950 // else: all equal, no end yet, loop
8951 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8952 put_gpr_dw0(r1, mkexpr(next));
8953 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
8954 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8955 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8956 // >= 256 bytes done CC=3
8957 s390_cc_set(3);
8958 put_counter_dw0(mkU64(0));
8959
8960 return "srst";
8961}
8962
8963static HChar *
8964s390_irgen_CLST(UChar r1, UChar r2)
8965{
8966 IRTemp address1 = newTemp(Ity_I64);
8967 IRTemp address2 = newTemp(Ity_I64);
8968 IRTemp end = newTemp(Ity_I8);
8969 IRTemp counter = newTemp(Ity_I64);
8970 IRTemp byte1 = newTemp(Ity_I8);
8971 IRTemp byte2 = newTemp(Ity_I8);
8972
8973 assign(address1, get_gpr_dw0(r1));
8974 assign(address2, get_gpr_dw0(r2));
8975 assign(end, get_gpr_b7(0));
8976 assign(counter, get_counter_dw0());
8977 put_counter_dw0(mkU64(0));
8978 assign(byte1, load(Ity_I8, mkexpr(address1)));
8979 assign(byte2, load(Ity_I8, mkexpr(address2)));
8980
8981 // end in both? all equal, reset r1 and r2 to start values
8982 s390_cc_set(0);
8983 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
8984 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
8985 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
8986 binop(Iop_Or8,
8987 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
8988 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
8989 guest_IA_next_instr);
8990
8991 put_gpr_dw0(r1, mkexpr(address1));
8992 put_gpr_dw0(r2, mkexpr(address2));
8993
8994 // End found in string1
8995 s390_cc_set(1);
8996 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
8997 guest_IA_next_instr);
8998
8999 // End found in string2
9000 s390_cc_set(2);
9001 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
9002 guest_IA_next_instr);
9003
9004 // string1 < string2
9005 s390_cc_set(1);
9006 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
9007 unop(Iop_8Uto32, mkexpr(byte2))),
9008 guest_IA_next_instr);
9009
9010 // string2 < string1
9011 s390_cc_set(2);
9012 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
9013 unop(Iop_8Uto32, mkexpr(byte1))),
9014 guest_IA_next_instr);
9015
9016 // else: all equal, no end yet, loop
9017 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9018 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
9019 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
9020 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9021 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
9022 // >= 256 bytes done CC=3
9023 s390_cc_set(3);
9024 put_counter_dw0(mkU64(0));
9025
9026 return "clst";
9027}
9028
9029static void
9030s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9031{
9032 UChar reg;
9033 IRTemp addr = newTemp(Ity_I64);
9034
9035 assign(addr, mkexpr(op2addr));
9036 reg = r1;
9037 do {
9038 IRTemp old = addr;
9039
9040 reg %= 16;
9041 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9042 addr = newTemp(Ity_I64);
9043 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9044 reg++;
9045 } while (reg != (r3 + 1));
9046}
9047
9048static HChar *
9049s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9050{
9051 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9052
9053 return "lm";
9054}
9055
9056static HChar *
9057s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9058{
9059 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9060
9061 return "lmy";
9062}
9063
9064static HChar *
9065s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9066{
9067 UChar reg;
9068 IRTemp addr = newTemp(Ity_I64);
9069
9070 assign(addr, mkexpr(op2addr));
9071 reg = r1;
9072 do {
9073 IRTemp old = addr;
9074
9075 reg %= 16;
9076 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9077 addr = newTemp(Ity_I64);
9078 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9079 reg++;
9080 } while (reg != (r3 + 1));
9081
9082 return "lmh";
9083}
9084
9085static HChar *
9086s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9087{
9088 UChar reg;
9089 IRTemp addr = newTemp(Ity_I64);
9090
9091 assign(addr, mkexpr(op2addr));
9092 reg = r1;
9093 do {
9094 IRTemp old = addr;
9095
9096 reg %= 16;
9097 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9098 addr = newTemp(Ity_I64);
9099 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9100 reg++;
9101 } while (reg != (r3 + 1));
9102
9103 return "lmg";
9104}
9105
9106static void
9107s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9108{
9109 UChar reg;
9110 IRTemp addr = newTemp(Ity_I64);
9111
9112 assign(addr, mkexpr(op2addr));
9113 reg = r1;
9114 do {
9115 IRTemp old = addr;
9116
9117 reg %= 16;
9118 store(mkexpr(addr), get_gpr_w1(reg));
9119 addr = newTemp(Ity_I64);
9120 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9121 reg++;
9122 } while( reg != (r3 + 1));
9123}
9124
9125static HChar *
9126s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9127{
9128 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9129
9130 return "stm";
9131}
9132
9133static HChar *
9134s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9135{
9136 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9137
9138 return "stmy";
9139}
9140
9141static HChar *
9142s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9143{
9144 UChar reg;
9145 IRTemp addr = newTemp(Ity_I64);
9146
9147 assign(addr, mkexpr(op2addr));
9148 reg = r1;
9149 do {
9150 IRTemp old = addr;
9151
9152 reg %= 16;
9153 store(mkexpr(addr), get_gpr_w0(reg));
9154 addr = newTemp(Ity_I64);
9155 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9156 reg++;
9157 } while( reg != (r3 + 1));
9158
9159 return "stmh";
9160}
9161
9162static HChar *
9163s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9164{
9165 UChar reg;
9166 IRTemp addr = newTemp(Ity_I64);
9167
9168 assign(addr, mkexpr(op2addr));
9169 reg = r1;
9170 do {
9171 IRTemp old = addr;
9172
9173 reg %= 16;
9174 store(mkexpr(addr), get_gpr_dw0(reg));
9175 addr = newTemp(Ity_I64);
9176 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9177 reg++;
9178 } while( reg != (r3 + 1));
9179
9180 return "stmg";
9181}
9182
9183static void
9184s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
9185{
9186 IRTemp old1 = newTemp(Ity_I8);
9187 IRTemp old2 = newTemp(Ity_I8);
9188 IRTemp new1 = newTemp(Ity_I8);
9189 IRTemp counter = newTemp(Ity_I32);
9190 IRTemp addr1 = newTemp(Ity_I64);
9191
9192 assign(counter, get_counter_w0());
9193
9194 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9195 unop(Iop_32Uto64, mkexpr(counter))));
9196
9197 assign(old1, load(Ity_I8, mkexpr(addr1)));
9198 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9199 unop(Iop_32Uto64,mkexpr(counter)))));
9200 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9201
9202 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009203 if (op == Iop_Xor8) {
9204 store(mkexpr(addr1),
9205 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
9206 mkexpr(start2))),
9207 mkexpr(new1), mkU8(0)));
9208 } else
9209 store(mkexpr(addr1), mkexpr(new1));
9210 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9211 get_counter_w1()));
9212
9213 /* Check for end of field */
9214 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9215 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9216 guest_IA_curr_instr);
9217 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9218 False);
9219 put_counter_dw0(mkU64(0));
9220}
9221
9222static HChar *
9223s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9224{
9225 s390_irgen_XONC(Iop_Xor8, length, start1, start2);
9226
9227 return "xc";
9228}
9229
sewardjb63967e2011-03-24 08:50:04 +00009230static void
9231s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9232{
9233 IRTemp counter = newTemp(Ity_I32);
9234 IRTemp start = newTemp(Ity_I64);
9235 IRTemp addr = newTemp(Ity_I64);
9236
9237 assign(start,
9238 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9239
9240 if (length < 8) {
9241 UInt i;
9242
9243 for (i = 0; i <= length; ++i) {
9244 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9245 }
9246 } else {
9247 assign(counter, get_counter_w0());
9248
9249 assign(addr, binop(Iop_Add64, mkexpr(start),
9250 unop(Iop_32Uto64, mkexpr(counter))));
9251
9252 store(mkexpr(addr), mkU8(0));
9253
9254 /* Check for end of field */
9255 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9256 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9257 guest_IA_curr_instr);
9258
9259 /* Reset counter */
9260 put_counter_dw0(mkU64(0));
9261 }
9262
9263 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
9264
sewardj7ee97522011-05-09 21:45:04 +00009265 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009266 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9267}
9268
sewardj2019a972011-03-07 16:04:07 +00009269static HChar *
9270s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9271{
9272 s390_irgen_XONC(Iop_And8, length, start1, start2);
9273
9274 return "nc";
9275}
9276
9277static HChar *
9278s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9279{
9280 s390_irgen_XONC(Iop_Or8, length, start1, start2);
9281
9282 return "oc";
9283}
9284
9285
9286static HChar *
9287s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9288{
9289 IRTemp counter = newTemp(Ity_I64);
9290
9291 assign(counter, get_counter_dw0());
9292
9293 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9294 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9295
9296 /* Check for end of field */
9297 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9298 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9299 guest_IA_curr_instr);
9300 put_counter_dw0(mkU64(0));
9301
9302 return "mvc";
9303}
9304
9305static HChar *
9306s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9307{
9308 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9309
9310 addr1 = newTemp(Ity_I64);
9311 addr3 = newTemp(Ity_I64);
9312 addr3_load = newTemp(Ity_I64);
9313 len1 = newTemp(Ity_I64);
9314 len3 = newTemp(Ity_I64);
9315 single = newTemp(Ity_I8);
9316
9317 assign(addr1, get_gpr_dw0(r1));
9318 assign(len1, get_gpr_dw0(r1 + 1));
9319 assign(addr3, get_gpr_dw0(r3));
9320 assign(len3, get_gpr_dw0(r3 + 1));
9321
9322 // len1 == 0 ?
9323 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9324 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9325 guest_IA_next_instr);
9326
9327 /* This is a hack to prevent mvcle from reading from addr3 if it
9328 should read from the pad. Since the pad has no address, just
9329 read from the instruction, we discard that anyway */
9330 assign(addr3_load,
9331 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9332 mkU64(0))),
9333 mkexpr(addr3),
9334 mkU64(guest_IA_curr_instr)));
9335
9336 assign(single,
9337 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9338 mkU64(0))),
9339 load(Ity_I8, mkexpr(addr3_load)),
9340 unop(Iop_64to8, mkexpr(pad2))));
9341 store(mkexpr(addr1), mkexpr(single));
9342
9343 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9344
9345 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9346
9347 put_gpr_dw0(r3,
9348 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9349 mkU64(0))),
9350 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
9351 mkexpr(addr3)));
9352
9353 put_gpr_dw0(r3 + 1,
9354 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9355 mkU64(0))),
9356 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
9357 mkU64(0)));
9358
9359 /* We should set CC=3 (faked by overflow add) and leave after
9360 a maximum of ~4096 bytes have been processed. This is simpler:
9361 we leave whenever (len1 % 4096) == 0 */
9362 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
9363
9364 mktemp(Ity_I64, mkU64(-1ULL)), False);
9365 if_condition_goto(binop(Iop_CmpEQ64,
9366 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9367 mkU64(0)),
9368 guest_IA_next_instr);
9369
9370 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9371 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9372 guest_IA_curr_instr);
9373
9374 return "mvcle";
9375}
9376
9377static HChar *
9378s390_irgen_MVST(UChar r1, UChar r2)
9379{
9380 IRTemp addr1 = newTemp(Ity_I64);
9381 IRTemp addr2 = newTemp(Ity_I64);
9382 IRTemp end = newTemp(Ity_I8);
9383 IRTemp byte = newTemp(Ity_I8);
9384 IRTemp counter = newTemp(Ity_I64);
9385
9386 assign(addr1, get_gpr_dw0(r1));
9387 assign(addr2, get_gpr_dw0(r2));
9388 assign(counter, get_counter_dw0());
9389 assign(end, get_gpr_b7(0));
9390 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9391 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9392
9393 // We use unlimited as cpu-determined number
9394 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9395 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9396 guest_IA_curr_instr);
9397
9398 // and always set cc=1 at the end + update r1
9399 s390_cc_set(1);
9400 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9401 put_counter_dw0(mkU64(0));
9402
9403 return "mvst";
9404}
9405
9406static void
9407s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9408{
9409 IRTemp op1 = newTemp(Ity_I64);
9410 IRTemp result = newTemp(Ity_I64);
9411
9412 assign(op1, binop(Iop_32HLto64,
9413 get_gpr_w1(r1), // high 32 bits
9414 get_gpr_w1(r1 + 1))); // low 32 bits
9415 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9416 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9417 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9418}
9419
9420static void
9421s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9422{
9423 IRTemp op1 = newTemp(Ity_I128);
9424 IRTemp result = newTemp(Ity_I128);
9425
9426 assign(op1, binop(Iop_64HLto128,
9427 get_gpr_dw0(r1), // high 64 bits
9428 get_gpr_dw0(r1 + 1))); // low 64 bits
9429 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9430 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9431 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9432}
9433
9434static void
9435s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9436{
9437 IRTemp op1 = newTemp(Ity_I64);
9438 IRTemp result = newTemp(Ity_I128);
9439
9440 assign(op1, get_gpr_dw0(r1 + 1));
9441 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9442 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9443 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9444}
9445
9446static HChar *
9447s390_irgen_DR(UChar r1, UChar r2)
9448{
9449 IRTemp op2 = newTemp(Ity_I32);
9450
9451 assign(op2, get_gpr_w1(r2));
9452
9453 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9454
9455 return "dr";
9456}
9457
9458static HChar *
9459s390_irgen_D(UChar r1, IRTemp op2addr)
9460{
9461 IRTemp op2 = newTemp(Ity_I32);
9462
9463 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9464
9465 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9466
9467 return "d";
9468}
9469
9470static HChar *
9471s390_irgen_DLR(UChar r1, UChar r2)
9472{
9473 IRTemp op2 = newTemp(Ity_I32);
9474
9475 assign(op2, get_gpr_w1(r2));
9476
9477 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9478
9479 return "dr";
9480}
9481
9482static HChar *
9483s390_irgen_DL(UChar r1, IRTemp op2addr)
9484{
9485 IRTemp op2 = newTemp(Ity_I32);
9486
9487 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9488
9489 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9490
9491 return "dl";
9492}
9493
9494static HChar *
9495s390_irgen_DLG(UChar r1, IRTemp op2addr)
9496{
9497 IRTemp op2 = newTemp(Ity_I64);
9498
9499 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9500
9501 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9502
9503 return "dlg";
9504}
9505
9506static HChar *
9507s390_irgen_DLGR(UChar r1, UChar r2)
9508{
9509 IRTemp op2 = newTemp(Ity_I64);
9510
9511 assign(op2, get_gpr_dw0(r2));
9512
9513 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9514
9515 return "dlgr";
9516}
9517
9518static HChar *
9519s390_irgen_DSGR(UChar r1, UChar r2)
9520{
9521 IRTemp op2 = newTemp(Ity_I64);
9522
9523 assign(op2, get_gpr_dw0(r2));
9524
9525 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9526
9527 return "dsgr";
9528}
9529
9530static HChar *
9531s390_irgen_DSG(UChar r1, IRTemp op2addr)
9532{
9533 IRTemp op2 = newTemp(Ity_I64);
9534
9535 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9536
9537 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9538
9539 return "dsg";
9540}
9541
9542static HChar *
9543s390_irgen_DSGFR(UChar r1, UChar r2)
9544{
9545 IRTemp op2 = newTemp(Ity_I64);
9546
9547 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9548
9549 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9550
9551 return "dsgfr";
9552}
9553
9554static HChar *
9555s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9556{
9557 IRTemp op2 = newTemp(Ity_I64);
9558
9559 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9560
9561 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9562
9563 return "dsgf";
9564}
9565
9566static void
9567s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9568{
9569 UChar reg;
9570 IRTemp addr = newTemp(Ity_I64);
9571
9572 assign(addr, mkexpr(op2addr));
9573 reg = r1;
9574 do {
9575 IRTemp old = addr;
9576
9577 reg %= 16;
9578 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9579 addr = newTemp(Ity_I64);
9580 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9581 reg++;
9582 } while (reg != (r3 + 1));
9583}
9584
9585static HChar *
9586s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9587{
9588 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9589
9590 return "lam";
9591}
9592
9593static HChar *
9594s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9595{
9596 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9597
9598 return "lamy";
9599}
9600
9601static void
9602s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9603{
9604 UChar reg;
9605 IRTemp addr = newTemp(Ity_I64);
9606
9607 assign(addr, mkexpr(op2addr));
9608 reg = r1;
9609 do {
9610 IRTemp old = addr;
9611
9612 reg %= 16;
9613 store(mkexpr(addr), get_ar_w0(reg));
9614 addr = newTemp(Ity_I64);
9615 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9616 reg++;
9617 } while (reg != (r3 + 1));
9618}
9619
9620static HChar *
9621s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9622{
9623 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9624
9625 return "stam";
9626}
9627
9628static HChar *
9629s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9630{
9631 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9632
9633 return "stamy";
9634}
9635
9636
9637/* Implementation for 32-bit compare-and-swap */
9638static void
9639s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9640{
9641 IRCAS *cas;
9642 IRTemp op1 = newTemp(Ity_I32);
9643 IRTemp old_mem = newTemp(Ity_I32);
9644 IRTemp op3 = newTemp(Ity_I32);
9645 IRTemp result = newTemp(Ity_I32);
9646 IRTemp nequal = newTemp(Ity_I1);
9647
9648 assign(op1, get_gpr_w1(r1));
9649 assign(op3, get_gpr_w1(r3));
9650
9651 /* The first and second operands are compared. If they are equal,
9652 the third operand is stored at the second- operand location. */
9653 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9654 Iend_BE, mkexpr(op2addr),
9655 NULL, mkexpr(op1), /* expected value */
9656 NULL, mkexpr(op3) /* new value */);
9657 stmt(IRStmt_CAS(cas));
9658
9659 /* Set CC. Operands compared equal -> 0, else 1. */
9660 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9661 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9662
9663 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9664 Otherwise, store the old_value from memory in r1 and yield. */
9665 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9666 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9667 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9668 IRConst_U64(guest_IA_next_instr)));
9669}
9670
9671static HChar *
9672s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9673{
9674 s390_irgen_cas_32(r1, r3, op2addr);
9675
9676 return "cs";
9677}
9678
9679static HChar *
9680s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9681{
9682 s390_irgen_cas_32(r1, r3, op2addr);
9683
9684 return "csy";
9685}
9686
9687static HChar *
9688s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9689{
9690 IRCAS *cas;
9691 IRTemp op1 = newTemp(Ity_I64);
9692 IRTemp old_mem = newTemp(Ity_I64);
9693 IRTemp op3 = newTemp(Ity_I64);
9694 IRTemp result = newTemp(Ity_I64);
9695 IRTemp nequal = newTemp(Ity_I1);
9696
9697 assign(op1, get_gpr_dw0(r1));
9698 assign(op3, get_gpr_dw0(r3));
9699
9700 /* The first and second operands are compared. If they are equal,
9701 the third operand is stored at the second- operand location. */
9702 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9703 Iend_BE, mkexpr(op2addr),
9704 NULL, mkexpr(op1), /* expected value */
9705 NULL, mkexpr(op3) /* new value */);
9706 stmt(IRStmt_CAS(cas));
9707
9708 /* Set CC. Operands compared equal -> 0, else 1. */
9709 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9710 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9711
9712 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9713 Otherwise, store the old_value from memory in r1 and yield. */
9714 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9715 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9716 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9717 IRConst_U64(guest_IA_next_instr)));
9718
9719 return "csg";
9720}
9721
9722
9723/* Binary floating point */
9724
9725static HChar *
9726s390_irgen_AXBR(UChar r1, UChar r2)
9727{
9728 IRTemp op1 = newTemp(Ity_F128);
9729 IRTemp op2 = newTemp(Ity_F128);
9730 IRTemp result = newTemp(Ity_F128);
9731
9732 assign(op1, get_fpr_pair(r1));
9733 assign(op2, get_fpr_pair(r2));
9734 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9735 mkexpr(op2)));
9736 put_fpr_pair(r1, mkexpr(result));
9737
9738 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9739
9740 return "axbr";
9741}
9742
9743/* The result of a Iop_CmdFxx operation is a condition code. It is
9744 encoded using the values defined in type IRCmpFxxResult.
9745 Before we can store the condition code into the guest state (or do
9746 anything else with it for that matter) we need to convert it to
9747 the encoding that s390 uses. This is what this function does.
9748
9749 s390 VEX b6 b2 b0 cc.1 cc.0
9750 0 0x40 EQ 1 0 0 0 0
9751 1 0x01 LT 0 0 1 0 1
9752 2 0x00 GT 0 0 0 1 0
9753 3 0x45 Unordered 1 1 1 1 1
9754
9755 The following bits from the VEX encoding are interesting:
9756 b0, b2, b6 with b0 being the LSB. We observe:
9757
9758 cc.0 = b0;
9759 cc.1 = b2 | (~b0 & ~b6)
9760
9761 with cc being the s390 condition code.
9762*/
9763static IRExpr *
9764convert_vex_fpcc_to_s390(IRTemp vex_cc)
9765{
9766 IRTemp cc0 = newTemp(Ity_I32);
9767 IRTemp cc1 = newTemp(Ity_I32);
9768 IRTemp b0 = newTemp(Ity_I32);
9769 IRTemp b2 = newTemp(Ity_I32);
9770 IRTemp b6 = newTemp(Ity_I32);
9771
9772 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9773 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9774 mkU32(1)));
9775 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9776 mkU32(1)));
9777
9778 assign(cc0, mkexpr(b0));
9779 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9780 binop(Iop_And32,
9781 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9782 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9783 )));
9784
9785 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9786}
9787
9788static HChar *
9789s390_irgen_CEBR(UChar r1, UChar r2)
9790{
9791 IRTemp op1 = newTemp(Ity_F32);
9792 IRTemp op2 = newTemp(Ity_F32);
9793 IRTemp cc_vex = newTemp(Ity_I32);
9794 IRTemp cc_s390 = newTemp(Ity_I32);
9795
9796 assign(op1, get_fpr_w0(r1));
9797 assign(op2, get_fpr_w0(r2));
9798 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9799
9800 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9801 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9802
9803 return "cebr";
9804}
9805
9806static HChar *
9807s390_irgen_CDBR(UChar r1, UChar r2)
9808{
9809 IRTemp op1 = newTemp(Ity_F64);
9810 IRTemp op2 = newTemp(Ity_F64);
9811 IRTemp cc_vex = newTemp(Ity_I32);
9812 IRTemp cc_s390 = newTemp(Ity_I32);
9813
9814 assign(op1, get_fpr_dw0(r1));
9815 assign(op2, get_fpr_dw0(r2));
9816 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9817
9818 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9819 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9820
9821 return "cdbr";
9822}
9823
9824static HChar *
9825s390_irgen_CXBR(UChar r1, UChar r2)
9826{
9827 IRTemp op1 = newTemp(Ity_F128);
9828 IRTemp op2 = newTemp(Ity_F128);
9829 IRTemp cc_vex = newTemp(Ity_I32);
9830 IRTemp cc_s390 = newTemp(Ity_I32);
9831
9832 assign(op1, get_fpr_pair(r1));
9833 assign(op2, get_fpr_pair(r2));
9834 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
9835
9836 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9837 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9838
9839 return "cxbr";
9840}
9841
9842static HChar *
9843s390_irgen_CEB(UChar r1, IRTemp op2addr)
9844{
9845 IRTemp op1 = newTemp(Ity_F32);
9846 IRTemp op2 = newTemp(Ity_F32);
9847 IRTemp cc_vex = newTemp(Ity_I32);
9848 IRTemp cc_s390 = newTemp(Ity_I32);
9849
9850 assign(op1, get_fpr_w0(r1));
9851 assign(op2, load(Ity_F32, mkexpr(op2addr)));
9852 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9853
9854 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9855 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9856
9857 return "ceb";
9858}
9859
9860static HChar *
9861s390_irgen_CDB(UChar r1, IRTemp op2addr)
9862{
9863 IRTemp op1 = newTemp(Ity_F64);
9864 IRTemp op2 = newTemp(Ity_F64);
9865 IRTemp cc_vex = newTemp(Ity_I32);
9866 IRTemp cc_s390 = newTemp(Ity_I32);
9867
9868 assign(op1, get_fpr_dw0(r1));
9869 assign(op2, load(Ity_F64, mkexpr(op2addr)));
9870 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9871
9872 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9873 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9874
9875 return "cdb";
9876}
9877
9878static HChar *
9879s390_irgen_CXFBR(UChar r1, UChar r2)
9880{
9881 IRTemp op2 = newTemp(Ity_I32);
9882
9883 assign(op2, get_gpr_w1(r2));
9884 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
9885
9886 return "cxfbr";
9887}
9888
9889static HChar *
9890s390_irgen_CXGBR(UChar r1, UChar r2)
9891{
9892 IRTemp op2 = newTemp(Ity_I64);
9893
9894 assign(op2, get_gpr_dw0(r2));
9895 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
9896
9897 return "cxgbr";
9898}
9899
9900static HChar *
9901s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
9902{
9903 IRTemp op = newTemp(Ity_F128);
9904 IRTemp result = newTemp(Ity_I32);
9905
9906 assign(op, get_fpr_pair(r2));
9907 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
9908 mkexpr(op)));
9909 put_gpr_w1(r1, mkexpr(result));
9910 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
9911
9912 return "cfxbr";
9913}
9914
9915static HChar *
9916s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
9917{
9918 IRTemp op = newTemp(Ity_F128);
9919 IRTemp result = newTemp(Ity_I64);
9920
9921 assign(op, get_fpr_pair(r2));
9922 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
9923 mkexpr(op)));
9924 put_gpr_dw0(r1, mkexpr(result));
9925 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
9926
9927 return "cgxbr";
9928}
9929
9930static HChar *
9931s390_irgen_DXBR(UChar r1, UChar r2)
9932{
9933 IRTemp op1 = newTemp(Ity_F128);
9934 IRTemp op2 = newTemp(Ity_F128);
9935 IRTemp result = newTemp(Ity_F128);
9936
9937 assign(op1, get_fpr_pair(r1));
9938 assign(op2, get_fpr_pair(r2));
9939 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9940 mkexpr(op2)));
9941 put_fpr_pair(r1, mkexpr(result));
9942
9943 return "dxbr";
9944}
9945
9946static HChar *
9947s390_irgen_LTXBR(UChar r1, UChar r2)
9948{
9949 IRTemp result = newTemp(Ity_F128);
9950
9951 assign(result, get_fpr_pair(r2));
9952 put_fpr_pair(r1, mkexpr(result));
9953 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9954
9955 return "ltxbr";
9956}
9957
9958static HChar *
9959s390_irgen_LCXBR(UChar r1, UChar r2)
9960{
9961 IRTemp result = newTemp(Ity_F128);
9962
9963 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
9964 put_fpr_pair(r1, mkexpr(result));
9965 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9966
9967 return "lcxbr";
9968}
9969
9970static HChar *
9971s390_irgen_LXDBR(UChar r1, UChar r2)
9972{
9973 IRTemp op = newTemp(Ity_F64);
9974
9975 assign(op, get_fpr_dw0(r2));
9976 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9977
9978 return "lxdbr";
9979}
9980
9981static HChar *
9982s390_irgen_LXEBR(UChar r1, UChar r2)
9983{
9984 IRTemp op = newTemp(Ity_F32);
9985
9986 assign(op, get_fpr_w0(r2));
9987 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9988
9989 return "lxebr";
9990}
9991
9992static HChar *
9993s390_irgen_LXDB(UChar r1, IRTemp op2addr)
9994{
9995 IRTemp op = newTemp(Ity_F64);
9996
9997 assign(op, load(Ity_F64, mkexpr(op2addr)));
9998 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9999
10000 return "lxdb";
10001}
10002
10003static HChar *
10004s390_irgen_LXEB(UChar r1, IRTemp op2addr)
10005{
10006 IRTemp op = newTemp(Ity_F32);
10007
10008 assign(op, load(Ity_F32, mkexpr(op2addr)));
10009 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10010
10011 return "lxeb";
10012}
10013
10014static HChar *
10015s390_irgen_LNEBR(UChar r1, UChar r2)
10016{
10017 IRTemp result = newTemp(Ity_F32);
10018
10019 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
10020 put_fpr_w0(r1, mkexpr(result));
10021 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10022
10023 return "lnebr";
10024}
10025
10026static HChar *
10027s390_irgen_LNDBR(UChar r1, UChar r2)
10028{
10029 IRTemp result = newTemp(Ity_F64);
10030
10031 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10032 put_fpr_dw0(r1, mkexpr(result));
10033 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10034
10035 return "lndbr";
10036}
10037
10038static HChar *
10039s390_irgen_LNXBR(UChar r1, UChar r2)
10040{
10041 IRTemp result = newTemp(Ity_F128);
10042
10043 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10044 put_fpr_pair(r1, mkexpr(result));
10045 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10046
10047 return "lnxbr";
10048}
10049
10050static HChar *
10051s390_irgen_LPEBR(UChar r1, UChar r2)
10052{
10053 IRTemp result = newTemp(Ity_F32);
10054
10055 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10056 put_fpr_w0(r1, mkexpr(result));
10057 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10058
10059 return "lpebr";
10060}
10061
10062static HChar *
10063s390_irgen_LPDBR(UChar r1, UChar r2)
10064{
10065 IRTemp result = newTemp(Ity_F64);
10066
10067 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10068 put_fpr_dw0(r1, mkexpr(result));
10069 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10070
10071 return "lpdbr";
10072}
10073
10074static HChar *
10075s390_irgen_LPXBR(UChar r1, UChar r2)
10076{
10077 IRTemp result = newTemp(Ity_F128);
10078
10079 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10080 put_fpr_pair(r1, mkexpr(result));
10081 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10082
10083 return "lpxbr";
10084}
10085
10086static HChar *
10087s390_irgen_LDXBR(UChar r1, UChar r2)
10088{
10089 IRTemp result = newTemp(Ity_F64);
10090
10091 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10092 put_fpr_dw0(r1, mkexpr(result));
10093
10094 return "ldxbr";
10095}
10096
10097static HChar *
10098s390_irgen_LEXBR(UChar r1, UChar r2)
10099{
10100 IRTemp result = newTemp(Ity_F32);
10101
10102 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10103 put_fpr_w0(r1, mkexpr(result));
10104
10105 return "lexbr";
10106}
10107
10108static HChar *
10109s390_irgen_MXBR(UChar r1, UChar r2)
10110{
10111 IRTemp op1 = newTemp(Ity_F128);
10112 IRTemp op2 = newTemp(Ity_F128);
10113 IRTemp result = newTemp(Ity_F128);
10114
10115 assign(op1, get_fpr_pair(r1));
10116 assign(op2, get_fpr_pair(r2));
10117 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10118 mkexpr(op2)));
10119 put_fpr_pair(r1, mkexpr(result));
10120
10121 return "mxbr";
10122}
10123
10124static HChar *
10125s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10126{
10127 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10128 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10129
10130 return "maebr";
10131}
10132
10133static HChar *
10134s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10135{
10136 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10137 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10138
10139 return "madbr";
10140}
10141
10142static HChar *
10143s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10144{
10145 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10146
10147 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10148 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10149
10150 return "maeb";
10151}
10152
10153static HChar *
10154s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10155{
10156 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10157
10158 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10159 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10160
10161 return "madb";
10162}
10163
10164static HChar *
10165s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10166{
10167 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10168 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10169
10170 return "msebr";
10171}
10172
10173static HChar *
10174s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10175{
10176 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10177 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10178
10179 return "msdbr";
10180}
10181
10182static HChar *
10183s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10184{
10185 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10186
10187 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10188 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10189
10190 return "mseb";
10191}
10192
10193static HChar *
10194s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10195{
10196 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10197
10198 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10199 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10200
10201 return "msdb";
10202}
10203
10204static HChar *
10205s390_irgen_SQEBR(UChar r1, UChar r2)
10206{
10207 IRTemp result = newTemp(Ity_F32);
10208
10209 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10210 put_fpr_w0(r1, mkexpr(result));
10211
10212 return "sqebr";
10213}
10214
10215static HChar *
10216s390_irgen_SQDBR(UChar r1, UChar r2)
10217{
10218 IRTemp result = newTemp(Ity_F64);
10219
10220 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10221 put_fpr_dw0(r1, mkexpr(result));
10222
10223 return "sqdbr";
10224}
10225
10226static HChar *
10227s390_irgen_SQXBR(UChar r1, UChar r2)
10228{
10229 IRTemp result = newTemp(Ity_F128);
10230
10231 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10232 put_fpr_pair(r1, mkexpr(result));
10233
10234 return "sqxbr";
10235}
10236
10237static HChar *
10238s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10239{
10240 IRTemp op = newTemp(Ity_F32);
10241
10242 assign(op, load(Ity_F32, mkexpr(op2addr)));
10243 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10244
10245 return "sqeb";
10246}
10247
10248static HChar *
10249s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10250{
10251 IRTemp op = newTemp(Ity_F64);
10252
10253 assign(op, load(Ity_F64, mkexpr(op2addr)));
10254 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10255
10256 return "sqdb";
10257}
10258
10259static HChar *
10260s390_irgen_SXBR(UChar r1, UChar r2)
10261{
10262 IRTemp op1 = newTemp(Ity_F128);
10263 IRTemp op2 = newTemp(Ity_F128);
10264 IRTemp result = newTemp(Ity_F128);
10265
10266 assign(op1, get_fpr_pair(r1));
10267 assign(op2, get_fpr_pair(r2));
10268 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10269 mkexpr(op2)));
10270 put_fpr_pair(r1, mkexpr(result));
10271 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10272
10273 return "sxbr";
10274}
10275
10276static HChar *
10277s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10278{
10279 IRTemp value = newTemp(Ity_F32);
10280
10281 assign(value, get_fpr_w0(r1));
10282
10283 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10284
10285 return "tceb";
10286}
10287
10288static HChar *
10289s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10290{
10291 IRTemp value = newTemp(Ity_F64);
10292
10293 assign(value, get_fpr_dw0(r1));
10294
10295 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10296
10297 return "tcdb";
10298}
10299
10300static HChar *
10301s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10302{
10303 IRTemp value = newTemp(Ity_F128);
10304
10305 assign(value, get_fpr_pair(r1));
10306
10307 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10308
10309 return "tcxb";
10310}
10311
10312static HChar *
10313s390_irgen_LCDFR(UChar r1, UChar r2)
10314{
10315 IRTemp result = newTemp(Ity_F64);
10316
10317 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10318 put_fpr_dw0(r1, mkexpr(result));
10319
10320 return "lcdfr";
10321}
10322
10323static HChar *
10324s390_irgen_LNDFR(UChar r1, UChar r2)
10325{
10326 IRTemp result = newTemp(Ity_F64);
10327
10328 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10329 put_fpr_dw0(r1, mkexpr(result));
10330
10331 return "lndfr";
10332}
10333
10334static HChar *
10335s390_irgen_LPDFR(UChar r1, UChar r2)
10336{
10337 IRTemp result = newTemp(Ity_F64);
10338
10339 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10340 put_fpr_dw0(r1, mkexpr(result));
10341
10342 return "lpdfr";
10343}
10344
10345static HChar *
10346s390_irgen_LDGR(UChar r1, UChar r2)
10347{
10348 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10349
10350 return "ldgr";
10351}
10352
10353static HChar *
10354s390_irgen_LGDR(UChar r1, UChar r2)
10355{
10356 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10357
10358 return "lgdr";
10359}
10360
10361
10362static HChar *
10363s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10364{
10365 IRTemp sign = newTemp(Ity_I64);
10366 IRTemp value = newTemp(Ity_I64);
10367
10368 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10369 mkU64(1ULL << 63)));
10370 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10371 mkU64((1ULL << 63) - 1)));
10372 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10373 mkexpr(sign))));
10374
10375 return "cpsdr";
10376}
10377
10378
10379static UInt
10380s390_do_cvb(ULong decimal)
10381{
10382#if defined(VGA_s390x)
10383 UInt binary;
10384
10385 __asm__ volatile (
10386 "cvb %[result],%[input]\n\t"
10387 : [result] "=d"(binary)
10388 : [input] "m"(decimal)
10389 );
10390
10391 return binary;
10392#else
10393 return 0;
10394#endif
10395}
10396
10397static IRExpr *
10398s390_call_cvb(IRExpr *in)
10399{
10400 IRExpr **args, *call;
10401
10402 args = mkIRExprVec_1(in);
10403 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10404 "s390_do_cvb", &s390_do_cvb, args);
10405
10406 /* Nothing is excluded from definedness checking. */
10407 call->Iex.CCall.cee->mcx_mask = 0;
10408
10409 return call;
10410}
10411
10412static HChar *
10413s390_irgen_CVB(UChar r1, IRTemp op2addr)
10414{
10415 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10416
10417 return "cvb";
10418}
10419
10420static HChar *
10421s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10422{
10423 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10424
10425 return "cvby";
10426}
10427
10428
10429static ULong
10430s390_do_cvd(ULong binary_in)
10431{
10432#if defined(VGA_s390x)
10433 UInt binary = binary_in & 0xffffffffULL;
10434 ULong decimal;
10435
10436 __asm__ volatile (
10437 "cvd %[input],%[result]\n\t"
10438 : [result] "=m"(decimal)
10439 : [input] "d"(binary)
10440 );
10441
10442 return decimal;
10443#else
10444 return 0;
10445#endif
10446}
10447
10448static IRExpr *
10449s390_call_cvd(IRExpr *in)
10450{
10451 IRExpr **args, *call;
10452
10453 args = mkIRExprVec_1(in);
10454 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10455 "s390_do_cvd", &s390_do_cvd, args);
10456
10457 /* Nothing is excluded from definedness checking. */
10458 call->Iex.CCall.cee->mcx_mask = 0;
10459
10460 return call;
10461}
10462
10463static HChar *
10464s390_irgen_CVD(UChar r1, IRTemp op2addr)
10465{
10466 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10467
10468 return "cvd";
10469}
10470
10471static HChar *
10472s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10473{
10474 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10475
10476 return "cvdy";
10477}
10478
10479static HChar *
10480s390_irgen_FLOGR(UChar r1, UChar r2)
10481{
10482 IRTemp input = newTemp(Ity_I64);
10483 IRTemp not_zero = newTemp(Ity_I64);
10484 IRTemp tmpnum = newTemp(Ity_I64);
10485 IRTemp num = newTemp(Ity_I64);
10486 IRTemp shift_amount = newTemp(Ity_I8);
10487
10488 /* We use the "count leading zeroes" operator because the number of
10489 leading zeroes is identical with the bit position of the first '1' bit.
10490 However, that operator does not work when the input value is zero.
10491 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10492 the modified value. If input == 0, then the result is 64. Otherwise,
10493 the result of Clz64 is what we want. */
10494
10495 assign(input, get_gpr_dw0(r2));
10496 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10497 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10498
10499 /* num = (input == 0) ? 64 : tmpnum */
10500 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10501 /* == 0 */ mkU64(64),
10502 /* != 0 */ mkexpr(tmpnum)));
10503
10504 put_gpr_dw0(r1, mkexpr(num));
10505
10506 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10507 is to first shift the input value by NUM + 1 bits to the left which
10508 causes the leftmost '1' bit to disappear. Then we shift logically to
10509 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10510 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10511 the width of the value-to-be-shifted, we need to special case
10512 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10513 For both such INPUT values the result will be 0. */
10514
10515 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10516 mkU64(1))));
10517
10518 put_gpr_dw0(r1 + 1,
10519 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10520 /* == 0 || == 1*/ mkU64(0),
10521 /* otherwise */
10522 binop(Iop_Shr64,
10523 binop(Iop_Shl64, mkexpr(input),
10524 mkexpr(shift_amount)),
10525 mkexpr(shift_amount))));
10526
10527 /* Compare the original value as an unsigned integer with 0. */
10528 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10529 mktemp(Ity_I64, mkU64(0)), False);
10530
10531 return "flogr";
10532}
10533
sewardj1e5fea62011-05-17 16:18:36 +000010534static HChar *
10535s390_irgen_STCK(IRTemp op2addr)
10536{
10537 IRDirty *d;
10538 IRTemp cc = newTemp(Ity_I64);
10539
10540 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10541 &s390x_dirtyhelper_STCK,
10542 mkIRExprVec_1(mkexpr(op2addr)));
10543 d->mFx = Ifx_Write;
10544 d->mAddr = mkexpr(op2addr);
10545 d->mSize = 8;
10546 stmt(IRStmt_Dirty(d));
10547 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10548 mkexpr(cc), mkU64(0), mkU64(0));
10549 return "stck";
10550}
10551
10552static HChar *
10553s390_irgen_STCKF(IRTemp op2addr)
10554{
10555 IRDirty *d;
10556 IRTemp cc = newTemp(Ity_I64);
10557
10558 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10559 &s390x_dirtyhelper_STCKF,
10560 mkIRExprVec_1(mkexpr(op2addr)));
10561 d->mFx = Ifx_Write;
10562 d->mAddr = mkexpr(op2addr);
10563 d->mSize = 8;
10564 stmt(IRStmt_Dirty(d));
10565 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10566 mkexpr(cc), mkU64(0), mkU64(0));
10567 return "stckf";
10568}
10569
10570static HChar *
10571s390_irgen_STCKE(IRTemp op2addr)
10572{
10573 IRDirty *d;
10574 IRTemp cc = newTemp(Ity_I64);
10575
10576 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10577 &s390x_dirtyhelper_STCKE,
10578 mkIRExprVec_1(mkexpr(op2addr)));
10579 d->mFx = Ifx_Write;
10580 d->mAddr = mkexpr(op2addr);
10581 d->mSize = 16;
10582 stmt(IRStmt_Dirty(d));
10583 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10584 mkexpr(cc), mkU64(0), mkU64(0));
10585 return "stcke";
10586}
10587
florian933065d2011-07-11 01:48:02 +000010588static HChar *
10589s390_irgen_STFLE(IRTemp op2addr)
10590{
10591 IRDirty *d;
10592 IRTemp cc = newTemp(Ity_I64);
10593
10594 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
10595 &s390x_dirtyhelper_STFLE,
10596 mkIRExprVec_1(mkexpr(op2addr)));
10597
10598 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
10599
10600 d->fxState[0].fx = Ifx_Modify; /* read then write */
10601 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
10602 d->fxState[0].size = sizeof(ULong);
10603 d->nFxState = 1;
10604
10605 d->mAddr = mkexpr(op2addr);
10606 /* Pretend all double words are written */
10607 d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
10608 d->mFx = Ifx_Write;
10609
10610 stmt(IRStmt_Dirty(d));
10611
10612 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
10613
10614 return "stfle";
10615}
10616
sewardj2019a972011-03-07 16:04:07 +000010617/*------------------------------------------------------------*/
10618/*--- Build IR for special instructions ---*/
10619/*------------------------------------------------------------*/
10620
florianb4df7682011-07-05 02:09:01 +000010621static void
sewardj2019a972011-03-07 16:04:07 +000010622s390_irgen_client_request(void)
10623{
10624 if (0)
10625 vex_printf("%%R3 = client_request ( %%R2 )\n");
10626
10627 irsb->next = mkU64((ULong)(guest_IA_curr_instr
10628 + S390_SPECIAL_OP_PREAMBLE_SIZE
10629 + S390_SPECIAL_OP_SIZE));
10630 irsb->jumpkind = Ijk_ClientReq;
10631
10632 dis_res->whatNext = Dis_StopHere;
10633}
10634
florianb4df7682011-07-05 02:09:01 +000010635static void
sewardj2019a972011-03-07 16:04:07 +000010636s390_irgen_guest_NRADDR(void)
10637{
10638 if (0)
10639 vex_printf("%%R3 = guest_NRADDR\n");
10640
floriane88b3c92011-07-05 02:48:39 +000010641 put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
sewardj2019a972011-03-07 16:04:07 +000010642}
10643
florianb4df7682011-07-05 02:09:01 +000010644static void
sewardj2019a972011-03-07 16:04:07 +000010645s390_irgen_call_noredir(void)
10646{
10647 /* Continue after special op */
10648 put_gpr_dw0(14, mkU64(guest_IA_curr_instr
10649 + S390_SPECIAL_OP_PREAMBLE_SIZE
10650 + S390_SPECIAL_OP_SIZE));
10651
10652 /* The address is in REG1, all parameters are in the right (guest) places */
10653 irsb->next = get_gpr_dw0(1);
10654 irsb->jumpkind = Ijk_NoRedir;
10655
10656 dis_res->whatNext = Dis_StopHere;
10657}
10658
10659/* Force proper alignment for the structures below. */
10660#pragma pack(1)
10661
10662
10663static s390_decode_t
10664s390_decode_2byte_and_irgen(UChar *bytes)
10665{
10666 typedef union {
10667 struct {
10668 unsigned int op : 16;
10669 } E;
10670 struct {
10671 unsigned int op : 8;
10672 unsigned int i : 8;
10673 } I;
10674 struct {
10675 unsigned int op : 8;
10676 unsigned int r1 : 4;
10677 unsigned int r2 : 4;
10678 } RR;
10679 } formats;
10680 union {
10681 formats fmt;
10682 UShort value;
10683 } ovl;
10684
10685 vassert(sizeof(formats) == 2);
10686
10687 ((char *)(&ovl.value))[0] = bytes[0];
10688 ((char *)(&ovl.value))[1] = bytes[1];
10689
10690 switch (ovl.value & 0xffff) {
10691 case 0x0101: /* PR */ goto unimplemented;
10692 case 0x0102: /* UPT */ goto unimplemented;
10693 case 0x0104: /* PTFF */ goto unimplemented;
10694 case 0x0107: /* SCKPF */ goto unimplemented;
10695 case 0x010a: /* PFPO */ goto unimplemented;
10696 case 0x010b: /* TAM */ goto unimplemented;
10697 case 0x010c: /* SAM24 */ goto unimplemented;
10698 case 0x010d: /* SAM31 */ goto unimplemented;
10699 case 0x010e: /* SAM64 */ goto unimplemented;
10700 case 0x01ff: /* TRAP2 */ goto unimplemented;
10701 }
10702
10703 switch ((ovl.value & 0xff00) >> 8) {
10704 case 0x04: /* SPM */ goto unimplemented;
10705 case 0x05: /* BALR */ goto unimplemented;
10706 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10707 goto ok;
10708 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10709 goto ok;
10710 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
10711 case 0x0b: /* BSM */ goto unimplemented;
10712 case 0x0c: /* BASSM */ goto unimplemented;
10713 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10714 goto ok;
10715 case 0x0e: /* MVCL */ goto unimplemented;
10716 case 0x0f: /* CLCL */ goto unimplemented;
10717 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10718 goto ok;
10719 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10720 goto ok;
10721 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10722 goto ok;
10723 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10724 goto ok;
10725 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10726 goto ok;
10727 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10728 goto ok;
10729 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10730 goto ok;
10731 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10732 goto ok;
10733 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10734 goto ok;
10735 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10736 goto ok;
10737 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10738 goto ok;
10739 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10740 goto ok;
10741 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10742 goto ok;
10743 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10744 goto ok;
10745 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10746 goto ok;
10747 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10748 goto ok;
10749 case 0x20: /* LPDR */ goto unimplemented;
10750 case 0x21: /* LNDR */ goto unimplemented;
10751 case 0x22: /* LTDR */ goto unimplemented;
10752 case 0x23: /* LCDR */ goto unimplemented;
10753 case 0x24: /* HDR */ goto unimplemented;
10754 case 0x25: /* LDXR */ goto unimplemented;
10755 case 0x26: /* MXR */ goto unimplemented;
10756 case 0x27: /* MXDR */ goto unimplemented;
10757 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10758 goto ok;
10759 case 0x29: /* CDR */ goto unimplemented;
10760 case 0x2a: /* ADR */ goto unimplemented;
10761 case 0x2b: /* SDR */ goto unimplemented;
10762 case 0x2c: /* MDR */ goto unimplemented;
10763 case 0x2d: /* DDR */ goto unimplemented;
10764 case 0x2e: /* AWR */ goto unimplemented;
10765 case 0x2f: /* SWR */ goto unimplemented;
10766 case 0x30: /* LPER */ goto unimplemented;
10767 case 0x31: /* LNER */ goto unimplemented;
10768 case 0x32: /* LTER */ goto unimplemented;
10769 case 0x33: /* LCER */ goto unimplemented;
10770 case 0x34: /* HER */ goto unimplemented;
10771 case 0x35: /* LEDR */ goto unimplemented;
10772 case 0x36: /* AXR */ goto unimplemented;
10773 case 0x37: /* SXR */ goto unimplemented;
10774 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10775 goto ok;
10776 case 0x39: /* CER */ goto unimplemented;
10777 case 0x3a: /* AER */ goto unimplemented;
10778 case 0x3b: /* SER */ goto unimplemented;
10779 case 0x3c: /* MDER */ goto unimplemented;
10780 case 0x3d: /* DER */ goto unimplemented;
10781 case 0x3e: /* AUR */ goto unimplemented;
10782 case 0x3f: /* SUR */ goto unimplemented;
10783 }
10784
10785 return S390_DECODE_UNKNOWN_INSN;
10786
10787ok:
10788 return S390_DECODE_OK;
10789
10790unimplemented:
10791 return S390_DECODE_UNIMPLEMENTED_INSN;
10792}
10793
10794static s390_decode_t
10795s390_decode_4byte_and_irgen(UChar *bytes)
10796{
10797 typedef union {
10798 struct {
10799 unsigned int op1 : 8;
10800 unsigned int r1 : 4;
10801 unsigned int op2 : 4;
10802 unsigned int i2 : 16;
10803 } RI;
10804 struct {
10805 unsigned int op : 16;
10806 unsigned int : 8;
10807 unsigned int r1 : 4;
10808 unsigned int r2 : 4;
10809 } RRE;
10810 struct {
10811 unsigned int op : 16;
10812 unsigned int r1 : 4;
10813 unsigned int : 4;
10814 unsigned int r3 : 4;
10815 unsigned int r2 : 4;
10816 } RRF;
10817 struct {
10818 unsigned int op : 16;
10819 unsigned int r3 : 4;
10820 unsigned int m4 : 4;
10821 unsigned int r1 : 4;
10822 unsigned int r2 : 4;
10823 } RRF2;
10824 struct {
10825 unsigned int op : 16;
10826 unsigned int r3 : 4;
10827 unsigned int : 4;
10828 unsigned int r1 : 4;
10829 unsigned int r2 : 4;
10830 } RRF3;
10831 struct {
10832 unsigned int op : 16;
10833 unsigned int r3 : 4;
10834 unsigned int : 4;
10835 unsigned int r1 : 4;
10836 unsigned int r2 : 4;
10837 } RRR;
10838 struct {
10839 unsigned int op : 16;
10840 unsigned int r3 : 4;
10841 unsigned int : 4;
10842 unsigned int r1 : 4;
10843 unsigned int r2 : 4;
10844 } RRF4;
10845 struct {
10846 unsigned int op : 8;
10847 unsigned int r1 : 4;
10848 unsigned int r3 : 4;
10849 unsigned int b2 : 4;
10850 unsigned int d2 : 12;
10851 } RS;
10852 struct {
10853 unsigned int op : 8;
10854 unsigned int r1 : 4;
10855 unsigned int r3 : 4;
10856 unsigned int i2 : 16;
10857 } RSI;
10858 struct {
10859 unsigned int op : 8;
10860 unsigned int r1 : 4;
10861 unsigned int x2 : 4;
10862 unsigned int b2 : 4;
10863 unsigned int d2 : 12;
10864 } RX;
10865 struct {
10866 unsigned int op : 16;
10867 unsigned int b2 : 4;
10868 unsigned int d2 : 12;
10869 } S;
10870 struct {
10871 unsigned int op : 8;
10872 unsigned int i2 : 8;
10873 unsigned int b1 : 4;
10874 unsigned int d1 : 12;
10875 } SI;
10876 } formats;
10877 union {
10878 formats fmt;
10879 UInt value;
10880 } ovl;
10881
10882 vassert(sizeof(formats) == 4);
10883
10884 ((char *)(&ovl.value))[0] = bytes[0];
10885 ((char *)(&ovl.value))[1] = bytes[1];
10886 ((char *)(&ovl.value))[2] = bytes[2];
10887 ((char *)(&ovl.value))[3] = bytes[3];
10888
10889 switch ((ovl.value & 0xff0f0000) >> 16) {
10890 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
10891 ovl.fmt.RI.i2); goto ok;
10892 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
10893 ovl.fmt.RI.i2); goto ok;
10894 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
10895 ovl.fmt.RI.i2); goto ok;
10896 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
10897 ovl.fmt.RI.i2); goto ok;
10898 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
10899 ovl.fmt.RI.i2); goto ok;
10900 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
10901 ovl.fmt.RI.i2); goto ok;
10902 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
10903 ovl.fmt.RI.i2); goto ok;
10904 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
10905 ovl.fmt.RI.i2); goto ok;
10906 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
10907 ovl.fmt.RI.i2); goto ok;
10908 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
10909 ovl.fmt.RI.i2); goto ok;
10910 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
10911 ovl.fmt.RI.i2); goto ok;
10912 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
10913 ovl.fmt.RI.i2); goto ok;
10914 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
10915 ovl.fmt.RI.i2); goto ok;
10916 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
10917 ovl.fmt.RI.i2); goto ok;
10918 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
10919 ovl.fmt.RI.i2); goto ok;
10920 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
10921 ovl.fmt.RI.i2); goto ok;
10922 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
10923 ovl.fmt.RI.i2); goto ok;
10924 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
10925 ovl.fmt.RI.i2); goto ok;
10926 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
10927 ovl.fmt.RI.i2); goto ok;
10928 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
10929 ovl.fmt.RI.i2); goto ok;
10930 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10931 goto ok;
10932 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
10933 ovl.fmt.RI.i2); goto ok;
10934 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
10935 ovl.fmt.RI.i2); goto ok;
10936 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
10937 ovl.fmt.RI.i2); goto ok;
10938 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10939 goto ok;
10940 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
10941 ovl.fmt.RI.i2); goto ok;
10942 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10943 goto ok;
10944 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
10945 ovl.fmt.RI.i2); goto ok;
10946 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10947 goto ok;
10948 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
10949 ovl.fmt.RI.i2); goto ok;
10950 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10951 goto ok;
10952 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
10953 ovl.fmt.RI.i2); goto ok;
10954 }
10955
10956 switch ((ovl.value & 0xffff0000) >> 16) {
10957 case 0x8000: /* SSM */ goto unimplemented;
10958 case 0x8200: /* LPSW */ goto unimplemented;
10959 case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
10960 goto ok;
10961 case 0xb202: /* STIDP */ goto unimplemented;
10962 case 0xb204: /* SCK */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000010963 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000010964 case 0xb206: /* SCKC */ goto unimplemented;
10965 case 0xb207: /* STCKC */ goto unimplemented;
10966 case 0xb208: /* SPT */ goto unimplemented;
10967 case 0xb209: /* STPT */ goto unimplemented;
10968 case 0xb20a: /* SPKA */ goto unimplemented;
10969 case 0xb20b: /* IPK */ goto unimplemented;
10970 case 0xb20d: /* PTLB */ goto unimplemented;
10971 case 0xb210: /* SPX */ goto unimplemented;
10972 case 0xb211: /* STPX */ goto unimplemented;
10973 case 0xb212: /* STAP */ goto unimplemented;
10974 case 0xb214: /* SIE */ goto unimplemented;
10975 case 0xb218: /* PC */ goto unimplemented;
10976 case 0xb219: /* SAC */ goto unimplemented;
10977 case 0xb21a: /* CFC */ goto unimplemented;
10978 case 0xb221: /* IPTE */ goto unimplemented;
10979 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
10980 case 0xb223: /* IVSK */ goto unimplemented;
10981 case 0xb224: /* IAC */ goto unimplemented;
10982 case 0xb225: /* SSAR */ goto unimplemented;
10983 case 0xb226: /* EPAR */ goto unimplemented;
10984 case 0xb227: /* ESAR */ goto unimplemented;
10985 case 0xb228: /* PT */ goto unimplemented;
10986 case 0xb229: /* ISKE */ goto unimplemented;
10987 case 0xb22a: /* RRBE */ goto unimplemented;
10988 case 0xb22b: /* SSKE */ goto unimplemented;
10989 case 0xb22c: /* TB */ goto unimplemented;
10990 case 0xb22d: /* DXR */ goto unimplemented;
10991 case 0xb22e: /* PGIN */ goto unimplemented;
10992 case 0xb22f: /* PGOUT */ goto unimplemented;
10993 case 0xb230: /* CSCH */ goto unimplemented;
10994 case 0xb231: /* HSCH */ goto unimplemented;
10995 case 0xb232: /* MSCH */ goto unimplemented;
10996 case 0xb233: /* SSCH */ goto unimplemented;
10997 case 0xb234: /* STSCH */ goto unimplemented;
10998 case 0xb235: /* TSCH */ goto unimplemented;
10999 case 0xb236: /* TPI */ goto unimplemented;
11000 case 0xb237: /* SAL */ goto unimplemented;
11001 case 0xb238: /* RSCH */ goto unimplemented;
11002 case 0xb239: /* STCRW */ goto unimplemented;
11003 case 0xb23a: /* STCPS */ goto unimplemented;
11004 case 0xb23b: /* RCHP */ goto unimplemented;
11005 case 0xb23c: /* SCHM */ goto unimplemented;
11006 case 0xb240: /* BAKR */ goto unimplemented;
11007 case 0xb241: /* CKSM */ goto unimplemented;
11008 case 0xb244: /* SQDR */ goto unimplemented;
11009 case 0xb245: /* SQER */ goto unimplemented;
11010 case 0xb246: /* STURA */ goto unimplemented;
11011 case 0xb247: /* MSTA */ goto unimplemented;
11012 case 0xb248: /* PALB */ goto unimplemented;
11013 case 0xb249: /* EREG */ goto unimplemented;
11014 case 0xb24a: /* ESTA */ goto unimplemented;
11015 case 0xb24b: /* LURA */ goto unimplemented;
11016 case 0xb24c: /* TAR */ goto unimplemented;
11017 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
11018 ovl.fmt.RRE.r2); goto ok;
11019 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11020 goto ok;
11021 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11022 goto ok;
11023 case 0xb250: /* CSP */ goto unimplemented;
11024 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
11025 ovl.fmt.RRE.r2); goto ok;
11026 case 0xb254: /* MVPG */ goto unimplemented;
11027 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
11028 ovl.fmt.RRE.r2); goto ok;
11029 case 0xb257: /* CUSE */ goto unimplemented;
11030 case 0xb258: /* BSG */ goto unimplemented;
11031 case 0xb25a: /* BSA */ goto unimplemented;
11032 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
11033 ovl.fmt.RRE.r2); goto ok;
11034 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
11035 ovl.fmt.RRE.r2); goto ok;
11036 case 0xb263: /* CMPSC */ goto unimplemented;
11037 case 0xb274: /* SIGA */ goto unimplemented;
11038 case 0xb276: /* XSCH */ goto unimplemented;
11039 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011040 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011041 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011042 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011043 case 0xb27d: /* STSI */ goto unimplemented;
11044 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
11045 goto ok;
11046 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11047 goto ok;
11048 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11049 goto ok;
11050 case 0xb2a5: /* TRE */ goto unimplemented;
11051 case 0xb2a6: /* CU21 */ goto unimplemented;
11052 case 0xb2a7: /* CU12 */ goto unimplemented;
florian933065d2011-07-11 01:48:02 +000011053 case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
11054 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011055 case 0xb2b1: /* STFL */ goto unimplemented;
11056 case 0xb2b2: /* LPSWE */ goto unimplemented;
11057 case 0xb2b8: /* SRNMB */ goto unimplemented;
11058 case 0xb2b9: /* SRNMT */ goto unimplemented;
11059 case 0xb2bd: /* LFAS */ goto unimplemented;
11060 case 0xb2ff: /* TRAP4 */ goto unimplemented;
11061 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
11062 ovl.fmt.RRE.r2); goto ok;
11063 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11064 ovl.fmt.RRE.r2); goto ok;
11065 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11066 ovl.fmt.RRE.r2); goto ok;
11067 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11068 ovl.fmt.RRE.r2); goto ok;
11069 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11070 ovl.fmt.RRE.r2); goto ok;
11071 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11072 ovl.fmt.RRE.r2); goto ok;
11073 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11074 ovl.fmt.RRE.r2); goto ok;
11075 case 0xb307: /* MXDBR */ goto unimplemented;
11076 case 0xb308: /* KEBR */ goto unimplemented;
11077 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11078 ovl.fmt.RRE.r2); goto ok;
11079 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11080 ovl.fmt.RRE.r2); goto ok;
11081 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11082 ovl.fmt.RRE.r2); goto ok;
11083 case 0xb30c: /* MDEBR */ goto unimplemented;
11084 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11085 ovl.fmt.RRE.r2); goto ok;
11086 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11087 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11088 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11089 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11090 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11091 ovl.fmt.RRE.r2); goto ok;
11092 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11093 ovl.fmt.RRE.r2); goto ok;
11094 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11095 ovl.fmt.RRE.r2); goto ok;
11096 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11097 ovl.fmt.RRE.r2); goto ok;
11098 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11099 ovl.fmt.RRE.r2); goto ok;
11100 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11101 ovl.fmt.RRE.r2); goto ok;
11102 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11103 ovl.fmt.RRE.r2); goto ok;
11104 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11105 ovl.fmt.RRE.r2); goto ok;
11106 case 0xb318: /* KDBR */ goto unimplemented;
11107 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11108 ovl.fmt.RRE.r2); goto ok;
11109 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11110 ovl.fmt.RRE.r2); goto ok;
11111 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11112 ovl.fmt.RRE.r2); goto ok;
11113 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11114 ovl.fmt.RRE.r2); goto ok;
11115 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11116 ovl.fmt.RRE.r2); goto ok;
11117 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11118 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11119 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11120 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11121 case 0xb324: /* LDER */ goto unimplemented;
11122 case 0xb325: /* LXDR */ goto unimplemented;
11123 case 0xb326: /* LXER */ goto unimplemented;
11124 case 0xb32e: /* MAER */ goto unimplemented;
11125 case 0xb32f: /* MSER */ goto unimplemented;
11126 case 0xb336: /* SQXR */ goto unimplemented;
11127 case 0xb337: /* MEER */ goto unimplemented;
11128 case 0xb338: /* MAYLR */ goto unimplemented;
11129 case 0xb339: /* MYLR */ goto unimplemented;
11130 case 0xb33a: /* MAYR */ goto unimplemented;
11131 case 0xb33b: /* MYR */ goto unimplemented;
11132 case 0xb33c: /* MAYHR */ goto unimplemented;
11133 case 0xb33d: /* MYHR */ goto unimplemented;
11134 case 0xb33e: /* MADR */ goto unimplemented;
11135 case 0xb33f: /* MSDR */ goto unimplemented;
11136 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11137 ovl.fmt.RRE.r2); goto ok;
11138 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11139 ovl.fmt.RRE.r2); goto ok;
11140 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11141 ovl.fmt.RRE.r2); goto ok;
11142 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11143 ovl.fmt.RRE.r2); goto ok;
11144 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11145 ovl.fmt.RRE.r2); goto ok;
11146 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11147 ovl.fmt.RRE.r2); goto ok;
11148 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11149 ovl.fmt.RRE.r2); goto ok;
11150 case 0xb347: /* FIXBR */ goto unimplemented;
11151 case 0xb348: /* KXBR */ goto unimplemented;
11152 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11153 ovl.fmt.RRE.r2); goto ok;
11154 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11155 ovl.fmt.RRE.r2); goto ok;
11156 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11157 ovl.fmt.RRE.r2); goto ok;
11158 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11159 ovl.fmt.RRE.r2); goto ok;
11160 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11161 ovl.fmt.RRE.r2); goto ok;
11162 case 0xb350: /* TBEDR */ goto unimplemented;
11163 case 0xb351: /* TBDR */ goto unimplemented;
11164 case 0xb353: /* DIEBR */ goto unimplemented;
11165 case 0xb357: /* FIEBR */ goto unimplemented;
11166 case 0xb358: /* THDER */ goto unimplemented;
11167 case 0xb359: /* THDR */ goto unimplemented;
11168 case 0xb35b: /* DIDBR */ goto unimplemented;
11169 case 0xb35f: /* FIDBR */ goto unimplemented;
11170 case 0xb360: /* LPXR */ goto unimplemented;
11171 case 0xb361: /* LNXR */ goto unimplemented;
11172 case 0xb362: /* LTXR */ goto unimplemented;
11173 case 0xb363: /* LCXR */ goto unimplemented;
11174 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11175 ovl.fmt.RRE.r2); goto ok;
11176 case 0xb366: /* LEXR */ goto unimplemented;
11177 case 0xb367: /* FIXR */ goto unimplemented;
11178 case 0xb369: /* CXR */ goto unimplemented;
11179 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11180 ovl.fmt.RRE.r2); goto ok;
11181 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11182 ovl.fmt.RRE.r2); goto ok;
11183 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11184 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11185 goto ok;
11186 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11187 ovl.fmt.RRE.r2); goto ok;
11188 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11189 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11190 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11191 case 0xb377: /* FIER */ goto unimplemented;
11192 case 0xb37f: /* FIDR */ goto unimplemented;
11193 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11194 case 0xb385: /* SFASR */ goto unimplemented;
11195 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11196 case 0xb390: /* CELFBR */ goto unimplemented;
11197 case 0xb391: /* CDLFBR */ goto unimplemented;
11198 case 0xb392: /* CXLFBR */ goto unimplemented;
11199 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11200 ovl.fmt.RRE.r2); goto ok;
11201 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11202 ovl.fmt.RRE.r2); goto ok;
11203 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11204 ovl.fmt.RRE.r2); goto ok;
11205 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11206 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11207 goto ok;
11208 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11209 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11210 goto ok;
11211 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11212 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11213 goto ok;
11214 case 0xb3a0: /* CELGBR */ goto unimplemented;
11215 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11216 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11217 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11218 ovl.fmt.RRE.r2); goto ok;
11219 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11220 ovl.fmt.RRE.r2); goto ok;
11221 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11222 ovl.fmt.RRE.r2); goto ok;
11223 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11224 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11225 goto ok;
11226 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11227 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11228 goto ok;
11229 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11230 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11231 goto ok;
11232 case 0xb3b4: /* CEFR */ goto unimplemented;
11233 case 0xb3b5: /* CDFR */ goto unimplemented;
11234 case 0xb3b6: /* CXFR */ goto unimplemented;
11235 case 0xb3b8: /* CFER */ goto unimplemented;
11236 case 0xb3b9: /* CFDR */ goto unimplemented;
11237 case 0xb3ba: /* CFXR */ goto unimplemented;
11238 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11239 ovl.fmt.RRE.r2); goto ok;
11240 case 0xb3c4: /* CEGR */ goto unimplemented;
11241 case 0xb3c5: /* CDGR */ goto unimplemented;
11242 case 0xb3c6: /* CXGR */ goto unimplemented;
11243 case 0xb3c8: /* CGER */ goto unimplemented;
11244 case 0xb3c9: /* CGDR */ goto unimplemented;
11245 case 0xb3ca: /* CGXR */ goto unimplemented;
11246 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11247 ovl.fmt.RRE.r2); goto ok;
11248 case 0xb3d0: /* MDTR */ goto unimplemented;
11249 case 0xb3d1: /* DDTR */ goto unimplemented;
11250 case 0xb3d2: /* ADTR */ goto unimplemented;
11251 case 0xb3d3: /* SDTR */ goto unimplemented;
11252 case 0xb3d4: /* LDETR */ goto unimplemented;
11253 case 0xb3d5: /* LEDTR */ goto unimplemented;
11254 case 0xb3d6: /* LTDTR */ goto unimplemented;
11255 case 0xb3d7: /* FIDTR */ goto unimplemented;
11256 case 0xb3d8: /* MXTR */ goto unimplemented;
11257 case 0xb3d9: /* DXTR */ goto unimplemented;
11258 case 0xb3da: /* AXTR */ goto unimplemented;
11259 case 0xb3db: /* SXTR */ goto unimplemented;
11260 case 0xb3dc: /* LXDTR */ goto unimplemented;
11261 case 0xb3dd: /* LDXTR */ goto unimplemented;
11262 case 0xb3de: /* LTXTR */ goto unimplemented;
11263 case 0xb3df: /* FIXTR */ goto unimplemented;
11264 case 0xb3e0: /* KDTR */ goto unimplemented;
11265 case 0xb3e1: /* CGDTR */ goto unimplemented;
11266 case 0xb3e2: /* CUDTR */ goto unimplemented;
11267 case 0xb3e3: /* CSDTR */ goto unimplemented;
11268 case 0xb3e4: /* CDTR */ goto unimplemented;
11269 case 0xb3e5: /* EEDTR */ goto unimplemented;
11270 case 0xb3e7: /* ESDTR */ goto unimplemented;
11271 case 0xb3e8: /* KXTR */ goto unimplemented;
11272 case 0xb3e9: /* CGXTR */ goto unimplemented;
11273 case 0xb3ea: /* CUXTR */ goto unimplemented;
11274 case 0xb3eb: /* CSXTR */ goto unimplemented;
11275 case 0xb3ec: /* CXTR */ goto unimplemented;
11276 case 0xb3ed: /* EEXTR */ goto unimplemented;
11277 case 0xb3ef: /* ESXTR */ goto unimplemented;
11278 case 0xb3f1: /* CDGTR */ goto unimplemented;
11279 case 0xb3f2: /* CDUTR */ goto unimplemented;
11280 case 0xb3f3: /* CDSTR */ goto unimplemented;
11281 case 0xb3f4: /* CEDTR */ goto unimplemented;
11282 case 0xb3f5: /* QADTR */ goto unimplemented;
11283 case 0xb3f6: /* IEDTR */ goto unimplemented;
11284 case 0xb3f7: /* RRDTR */ goto unimplemented;
11285 case 0xb3f9: /* CXGTR */ goto unimplemented;
11286 case 0xb3fa: /* CXUTR */ goto unimplemented;
11287 case 0xb3fb: /* CXSTR */ goto unimplemented;
11288 case 0xb3fc: /* CEXTR */ goto unimplemented;
11289 case 0xb3fd: /* QAXTR */ goto unimplemented;
11290 case 0xb3fe: /* IEXTR */ goto unimplemented;
11291 case 0xb3ff: /* RRXTR */ goto unimplemented;
11292 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11293 ovl.fmt.RRE.r2); goto ok;
11294 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11295 ovl.fmt.RRE.r2); goto ok;
11296 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11297 ovl.fmt.RRE.r2); goto ok;
11298 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11299 ovl.fmt.RRE.r2); goto ok;
11300 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11301 ovl.fmt.RRE.r2); goto ok;
11302 case 0xb905: /* LURAG */ goto unimplemented;
11303 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11304 ovl.fmt.RRE.r2); goto ok;
11305 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11306 ovl.fmt.RRE.r2); goto ok;
11307 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11308 ovl.fmt.RRE.r2); goto ok;
11309 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11310 ovl.fmt.RRE.r2); goto ok;
11311 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11312 ovl.fmt.RRE.r2); goto ok;
11313 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11314 ovl.fmt.RRE.r2); goto ok;
11315 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11316 ovl.fmt.RRE.r2); goto ok;
11317 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11318 ovl.fmt.RRE.r2); goto ok;
11319 case 0xb90e: /* EREGG */ goto unimplemented;
11320 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11321 ovl.fmt.RRE.r2); goto ok;
11322 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11323 ovl.fmt.RRE.r2); goto ok;
11324 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11325 ovl.fmt.RRE.r2); goto ok;
11326 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11327 ovl.fmt.RRE.r2); goto ok;
11328 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11329 ovl.fmt.RRE.r2); goto ok;
11330 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11331 ovl.fmt.RRE.r2); goto ok;
11332 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11333 ovl.fmt.RRE.r2); goto ok;
11334 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11335 ovl.fmt.RRE.r2); goto ok;
11336 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11337 ovl.fmt.RRE.r2); goto ok;
11338 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11339 ovl.fmt.RRE.r2); goto ok;
11340 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11341 ovl.fmt.RRE.r2); goto ok;
11342 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11343 ovl.fmt.RRE.r2); goto ok;
11344 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11345 ovl.fmt.RRE.r2); goto ok;
11346 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11347 ovl.fmt.RRE.r2); goto ok;
11348 case 0xb91e: /* KMAC */ goto unimplemented;
11349 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11350 ovl.fmt.RRE.r2); goto ok;
11351 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11352 ovl.fmt.RRE.r2); goto ok;
11353 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11354 ovl.fmt.RRE.r2); goto ok;
11355 case 0xb925: /* STURG */ goto unimplemented;
11356 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11357 ovl.fmt.RRE.r2); goto ok;
11358 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11359 ovl.fmt.RRE.r2); goto ok;
11360 case 0xb928: /* PCKMO */ goto unimplemented;
11361 case 0xb92b: /* KMO */ goto unimplemented;
11362 case 0xb92c: /* PCC */ goto unimplemented;
11363 case 0xb92d: /* KMCTR */ goto unimplemented;
11364 case 0xb92e: /* KM */ goto unimplemented;
11365 case 0xb92f: /* KMC */ goto unimplemented;
11366 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11367 ovl.fmt.RRE.r2); goto ok;
11368 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11369 ovl.fmt.RRE.r2); goto ok;
11370 case 0xb93e: /* KIMD */ goto unimplemented;
11371 case 0xb93f: /* KLMD */ goto unimplemented;
11372 case 0xb941: /* CFDTR */ goto unimplemented;
11373 case 0xb942: /* CLGDTR */ goto unimplemented;
11374 case 0xb943: /* CLFDTR */ goto unimplemented;
11375 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11376 ovl.fmt.RRE.r2); goto ok;
11377 case 0xb949: /* CFXTR */ goto unimplemented;
11378 case 0xb94a: /* CLGXTR */ goto unimplemented;
11379 case 0xb94b: /* CLFXTR */ goto unimplemented;
11380 case 0xb951: /* CDFTR */ goto unimplemented;
11381 case 0xb952: /* CDLGTR */ goto unimplemented;
11382 case 0xb953: /* CDLFTR */ goto unimplemented;
11383 case 0xb959: /* CXFTR */ goto unimplemented;
11384 case 0xb95a: /* CXLGTR */ goto unimplemented;
11385 case 0xb95b: /* CXLFTR */ goto unimplemented;
11386 case 0xb960: /* CGRT */ goto unimplemented;
11387 case 0xb961: /* CLGRT */ goto unimplemented;
11388 case 0xb972: /* CRT */ goto unimplemented;
11389 case 0xb973: /* CLRT */ goto unimplemented;
11390 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11391 ovl.fmt.RRE.r2); goto ok;
11392 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11393 ovl.fmt.RRE.r2); goto ok;
11394 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11395 ovl.fmt.RRE.r2); goto ok;
11396 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11397 ovl.fmt.RRE.r2); goto ok;
11398 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11399 ovl.fmt.RRE.r2); goto ok;
11400 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11401 ovl.fmt.RRE.r2); goto ok;
11402 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11403 ovl.fmt.RRE.r2); goto ok;
11404 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11405 ovl.fmt.RRE.r2); goto ok;
11406 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11407 ovl.fmt.RRE.r2); goto ok;
11408 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11409 ovl.fmt.RRE.r2); goto ok;
11410 case 0xb98a: /* CSPG */ goto unimplemented;
11411 case 0xb98d: /* EPSW */ goto unimplemented;
11412 case 0xb98e: /* IDTE */ goto unimplemented;
11413 case 0xb990: /* TRTT */ goto unimplemented;
11414 case 0xb991: /* TRTO */ goto unimplemented;
11415 case 0xb992: /* TROT */ goto unimplemented;
11416 case 0xb993: /* TROO */ goto unimplemented;
11417 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11418 ovl.fmt.RRE.r2); goto ok;
11419 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11420 ovl.fmt.RRE.r2); goto ok;
11421 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11422 ovl.fmt.RRE.r2); goto ok;
11423 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11424 ovl.fmt.RRE.r2); goto ok;
11425 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11426 ovl.fmt.RRE.r2); goto ok;
11427 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11428 ovl.fmt.RRE.r2); goto ok;
11429 case 0xb99a: /* EPAIR */ goto unimplemented;
11430 case 0xb99b: /* ESAIR */ goto unimplemented;
11431 case 0xb99d: /* ESEA */ goto unimplemented;
11432 case 0xb99e: /* PTI */ goto unimplemented;
11433 case 0xb99f: /* SSAIR */ goto unimplemented;
11434 case 0xb9a2: /* PTF */ goto unimplemented;
11435 case 0xb9aa: /* LPTEA */ goto unimplemented;
11436 case 0xb9ae: /* RRBM */ goto unimplemented;
11437 case 0xb9af: /* PFMF */ goto unimplemented;
11438 case 0xb9b0: /* CU14 */ goto unimplemented;
11439 case 0xb9b1: /* CU24 */ goto unimplemented;
11440 case 0xb9b2: /* CU41 */ goto unimplemented;
11441 case 0xb9b3: /* CU42 */ goto unimplemented;
11442 case 0xb9bd: /* TRTRE */ goto unimplemented;
11443 case 0xb9be: /* SRSTU */ goto unimplemented;
11444 case 0xb9bf: /* TRTE */ goto unimplemented;
11445 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11446 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11447 goto ok;
11448 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
11449 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11450 goto ok;
11451 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
11452 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11453 goto ok;
11454 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
11455 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11456 goto ok;
11457 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
11458 ovl.fmt.RRE.r2); goto ok;
11459 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
11460 ovl.fmt.RRE.r2); goto ok;
11461 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
11462 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11463 goto ok;
11464 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
11465 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11466 goto ok;
11467 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
11468 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11469 goto ok;
11470 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
11471 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11472 goto ok;
11473 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
11474 ovl.fmt.RRE.r2); goto ok;
11475 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
11476 ovl.fmt.RRE.r2); goto ok;
11477 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000011478 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
11479 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11480 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011481 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
11482 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11483 goto ok;
11484 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
11485 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11486 goto ok;
11487 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
11488 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11489 goto ok;
11490 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
11491 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11492 goto ok;
11493 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
11494 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11495 goto ok;
11496 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
11497 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11498 goto ok;
11499 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
11500 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11501 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000011502 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
11503 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11504 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011505 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
11506 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11507 goto ok;
11508 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
11509 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11510 goto ok;
11511 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
11512 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11513 goto ok;
11514 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
11515 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11516 goto ok;
11517 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
11518 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11519 goto ok;
11520 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
11521 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11522 goto ok;
11523 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
11524 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11525 goto ok;
11526 }
11527
11528 switch ((ovl.value & 0xff000000) >> 24) {
11529 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11530 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11531 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11532 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11533 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11534 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11535 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11536 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11537 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11538 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11539 case 0x45: /* BAL */ goto unimplemented;
11540 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11541 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11542 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11543 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11544 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11545 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11546 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11547 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11548 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11549 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11550 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11551 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11552 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11553 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11554 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11555 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11556 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11557 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11558 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11559 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11560 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11561 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11562 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11563 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11564 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11565 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11566 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11567 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11568 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11569 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11570 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11571 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11572 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11573 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11574 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11575 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11576 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11577 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11578 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11579 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11580 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11581 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11582 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11583 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11584 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11585 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11586 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11587 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11588 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11589 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11590 case 0x67: /* MXD */ goto unimplemented;
11591 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11592 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11593 case 0x69: /* CD */ goto unimplemented;
11594 case 0x6a: /* AD */ goto unimplemented;
11595 case 0x6b: /* SD */ goto unimplemented;
11596 case 0x6c: /* MD */ goto unimplemented;
11597 case 0x6d: /* DD */ goto unimplemented;
11598 case 0x6e: /* AW */ goto unimplemented;
11599 case 0x6f: /* SW */ goto unimplemented;
11600 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11601 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11602 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11603 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11604 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11605 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11606 case 0x79: /* CE */ goto unimplemented;
11607 case 0x7a: /* AE */ goto unimplemented;
11608 case 0x7b: /* SE */ goto unimplemented;
11609 case 0x7c: /* MDE */ goto unimplemented;
11610 case 0x7d: /* DE */ goto unimplemented;
11611 case 0x7e: /* AU */ goto unimplemented;
11612 case 0x7f: /* SU */ goto unimplemented;
11613 case 0x83: /* DIAG */ goto unimplemented;
11614 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
11615 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11616 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
11617 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11618 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11619 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11620 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11621 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11622 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11623 ovl.fmt.RS.d2); goto ok;
11624 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11625 ovl.fmt.RS.d2); goto ok;
11626 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11627 ovl.fmt.RS.d2); goto ok;
11628 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11629 ovl.fmt.RS.d2); goto ok;
11630 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11631 ovl.fmt.RS.d2); goto ok;
11632 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11633 ovl.fmt.RS.d2); goto ok;
11634 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11635 ovl.fmt.RS.d2); goto ok;
11636 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11637 ovl.fmt.RS.d2); goto ok;
11638 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11639 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11640 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11641 ovl.fmt.SI.d1); goto ok;
11642 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11643 ovl.fmt.SI.d1); goto ok;
11644 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11645 ovl.fmt.SI.d1); goto ok;
11646 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11647 ovl.fmt.SI.d1); goto ok;
11648 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11649 ovl.fmt.SI.d1); goto ok;
11650 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11651 ovl.fmt.SI.d1); goto ok;
11652 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11653 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11654 case 0x99: /* TRACE */ goto unimplemented;
11655 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11656 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11657 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11658 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11659 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
11660 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11661 goto ok;
11662 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
11663 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11664 goto ok;
11665 case 0xac: /* STNSM */ goto unimplemented;
11666 case 0xad: /* STOSM */ goto unimplemented;
11667 case 0xae: /* SIGP */ goto unimplemented;
11668 case 0xaf: /* MC */ goto unimplemented;
11669 case 0xb1: /* LRA */ goto unimplemented;
11670 case 0xb6: /* STCTL */ goto unimplemented;
11671 case 0xb7: /* LCTL */ goto unimplemented;
11672 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11673 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11674 case 0xbb: /* CDS */ goto unimplemented;
11675 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11676 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11677 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11678 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11679 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11680 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11681 }
11682
11683 return S390_DECODE_UNKNOWN_INSN;
11684
11685ok:
11686 return S390_DECODE_OK;
11687
11688unimplemented:
11689 return S390_DECODE_UNIMPLEMENTED_INSN;
11690}
11691
11692static s390_decode_t
11693s390_decode_6byte_and_irgen(UChar *bytes)
11694{
11695 typedef union {
11696 struct {
11697 unsigned int op1 : 8;
11698 unsigned int r1 : 4;
11699 unsigned int r3 : 4;
11700 unsigned int i2 : 16;
11701 unsigned int : 8;
11702 unsigned int op2 : 8;
11703 } RIE;
11704 struct {
11705 unsigned int op1 : 8;
11706 unsigned int r1 : 4;
11707 unsigned int r2 : 4;
11708 unsigned int i3 : 8;
11709 unsigned int i4 : 8;
11710 unsigned int i5 : 8;
11711 unsigned int op2 : 8;
11712 } RIE_RRUUU;
11713 struct {
11714 unsigned int op1 : 8;
11715 unsigned int r1 : 4;
11716 unsigned int : 4;
11717 unsigned int i2 : 16;
11718 unsigned int m3 : 4;
11719 unsigned int : 4;
11720 unsigned int op2 : 8;
11721 } RIEv1;
11722 struct {
11723 unsigned int op1 : 8;
11724 unsigned int r1 : 4;
11725 unsigned int r2 : 4;
11726 unsigned int i4 : 16;
11727 unsigned int m3 : 4;
11728 unsigned int : 4;
11729 unsigned int op2 : 8;
11730 } RIE_RRPU;
11731 struct {
11732 unsigned int op1 : 8;
11733 unsigned int r1 : 4;
11734 unsigned int m3 : 4;
11735 unsigned int i4 : 16;
11736 unsigned int i2 : 8;
11737 unsigned int op2 : 8;
11738 } RIEv3;
11739 struct {
11740 unsigned int op1 : 8;
11741 unsigned int r1 : 4;
11742 unsigned int op2 : 4;
11743 unsigned int i2 : 32;
11744 } RIL;
11745 struct {
11746 unsigned int op1 : 8;
11747 unsigned int r1 : 4;
11748 unsigned int m3 : 4;
11749 unsigned int b4 : 4;
11750 unsigned int d4 : 12;
11751 unsigned int i2 : 8;
11752 unsigned int op2 : 8;
11753 } RIS;
11754 struct {
11755 unsigned int op1 : 8;
11756 unsigned int r1 : 4;
11757 unsigned int r2 : 4;
11758 unsigned int b4 : 4;
11759 unsigned int d4 : 12;
11760 unsigned int m3 : 4;
11761 unsigned int : 4;
11762 unsigned int op2 : 8;
11763 } RRS;
11764 struct {
11765 unsigned int op1 : 8;
11766 unsigned int l1 : 4;
11767 unsigned int : 4;
11768 unsigned int b1 : 4;
11769 unsigned int d1 : 12;
11770 unsigned int : 8;
11771 unsigned int op2 : 8;
11772 } RSL;
11773 struct {
11774 unsigned int op1 : 8;
11775 unsigned int r1 : 4;
11776 unsigned int r3 : 4;
11777 unsigned int b2 : 4;
11778 unsigned int dl2 : 12;
11779 unsigned int dh2 : 8;
11780 unsigned int op2 : 8;
11781 } RSY;
11782 struct {
11783 unsigned int op1 : 8;
11784 unsigned int r1 : 4;
11785 unsigned int x2 : 4;
11786 unsigned int b2 : 4;
11787 unsigned int d2 : 12;
11788 unsigned int : 8;
11789 unsigned int op2 : 8;
11790 } RXE;
11791 struct {
11792 unsigned int op1 : 8;
11793 unsigned int r3 : 4;
11794 unsigned int x2 : 4;
11795 unsigned int b2 : 4;
11796 unsigned int d2 : 12;
11797 unsigned int r1 : 4;
11798 unsigned int : 4;
11799 unsigned int op2 : 8;
11800 } RXF;
11801 struct {
11802 unsigned int op1 : 8;
11803 unsigned int r1 : 4;
11804 unsigned int x2 : 4;
11805 unsigned int b2 : 4;
11806 unsigned int dl2 : 12;
11807 unsigned int dh2 : 8;
11808 unsigned int op2 : 8;
11809 } RXY;
11810 struct {
11811 unsigned int op1 : 8;
11812 unsigned int i2 : 8;
11813 unsigned int b1 : 4;
11814 unsigned int dl1 : 12;
11815 unsigned int dh1 : 8;
11816 unsigned int op2 : 8;
11817 } SIY;
11818 struct {
11819 unsigned int op : 8;
11820 unsigned int l : 8;
11821 unsigned int b1 : 4;
11822 unsigned int d1 : 12;
11823 unsigned int b2 : 4;
11824 unsigned int d2 : 12;
11825 } SS;
11826 struct {
11827 unsigned int op : 8;
11828 unsigned int l1 : 4;
11829 unsigned int l2 : 4;
11830 unsigned int b1 : 4;
11831 unsigned int d1 : 12;
11832 unsigned int b2 : 4;
11833 unsigned int d2 : 12;
11834 } SS_LLRDRD;
11835 struct {
11836 unsigned int op : 8;
11837 unsigned int r1 : 4;
11838 unsigned int r3 : 4;
11839 unsigned int b2 : 4;
11840 unsigned int d2 : 12;
11841 unsigned int b4 : 4;
11842 unsigned int d4 : 12;
11843 } SS_RRRDRD2;
11844 struct {
11845 unsigned int op : 16;
11846 unsigned int b1 : 4;
11847 unsigned int d1 : 12;
11848 unsigned int b2 : 4;
11849 unsigned int d2 : 12;
11850 } SSE;
11851 struct {
11852 unsigned int op1 : 8;
11853 unsigned int r3 : 4;
11854 unsigned int op2 : 4;
11855 unsigned int b1 : 4;
11856 unsigned int d1 : 12;
11857 unsigned int b2 : 4;
11858 unsigned int d2 : 12;
11859 } SSF;
11860 struct {
11861 unsigned int op : 16;
11862 unsigned int b1 : 4;
11863 unsigned int d1 : 12;
11864 unsigned int i2 : 16;
11865 } SIL;
11866 } formats;
11867 union {
11868 formats fmt;
11869 ULong value;
11870 } ovl;
11871
11872 vassert(sizeof(formats) == 6);
11873
11874 ((char *)(&ovl.value))[0] = bytes[0];
11875 ((char *)(&ovl.value))[1] = bytes[1];
11876 ((char *)(&ovl.value))[2] = bytes[2];
11877 ((char *)(&ovl.value))[3] = bytes[3];
11878 ((char *)(&ovl.value))[4] = bytes[4];
11879 ((char *)(&ovl.value))[5] = bytes[5];
11880 ((char *)(&ovl.value))[6] = 0x0;
11881 ((char *)(&ovl.value))[7] = 0x0;
11882
11883 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
11884 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
11885 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11886 ovl.fmt.RXY.dl2,
11887 ovl.fmt.RXY.dh2); goto ok;
11888 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
11889 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
11890 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11891 ovl.fmt.RXY.dl2,
11892 ovl.fmt.RXY.dh2); goto ok;
11893 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
11894 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11895 ovl.fmt.RXY.dl2,
11896 ovl.fmt.RXY.dh2); goto ok;
11897 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
11898 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11899 ovl.fmt.RXY.dl2,
11900 ovl.fmt.RXY.dh2); goto ok;
11901 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
11902 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11903 ovl.fmt.RXY.dl2,
11904 ovl.fmt.RXY.dh2); goto ok;
11905 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
11906 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11907 ovl.fmt.RXY.dl2,
11908 ovl.fmt.RXY.dh2); goto ok;
11909 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
11910 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11911 ovl.fmt.RXY.dl2,
11912 ovl.fmt.RXY.dh2); goto ok;
11913 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
11914 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11915 ovl.fmt.RXY.dl2,
11916 ovl.fmt.RXY.dh2); goto ok;
11917 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
11918 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11919 ovl.fmt.RXY.dl2,
11920 ovl.fmt.RXY.dh2); goto ok;
11921 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
11922 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
11923 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11924 ovl.fmt.RXY.dl2,
11925 ovl.fmt.RXY.dh2); goto ok;
11926 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
11927 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11928 ovl.fmt.RXY.dl2,
11929 ovl.fmt.RXY.dh2); goto ok;
11930 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
11931 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
11932 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11933 ovl.fmt.RXY.dl2,
11934 ovl.fmt.RXY.dh2); goto ok;
11935 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
11936 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11937 ovl.fmt.RXY.dl2,
11938 ovl.fmt.RXY.dh2); goto ok;
11939 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
11940 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11941 ovl.fmt.RXY.dl2,
11942 ovl.fmt.RXY.dh2); goto ok;
11943 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
11944 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11945 ovl.fmt.RXY.dl2,
11946 ovl.fmt.RXY.dh2); goto ok;
11947 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
11948 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11949 ovl.fmt.RXY.dl2,
11950 ovl.fmt.RXY.dh2); goto ok;
11951 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
11952 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11953 ovl.fmt.RXY.dl2,
11954 ovl.fmt.RXY.dh2); goto ok;
11955 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
11956 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11957 ovl.fmt.RXY.dl2,
11958 ovl.fmt.RXY.dh2); goto ok;
11959 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
11960 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11961 ovl.fmt.RXY.dl2,
11962 ovl.fmt.RXY.dh2); goto ok;
11963 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
11964 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11965 ovl.fmt.RXY.dl2,
11966 ovl.fmt.RXY.dh2); goto ok;
11967 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
11968 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11969 ovl.fmt.RXY.dl2,
11970 ovl.fmt.RXY.dh2); goto ok;
11971 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
11972 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11973 ovl.fmt.RXY.dl2,
11974 ovl.fmt.RXY.dh2); goto ok;
11975 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
11976 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11977 ovl.fmt.RXY.dl2,
11978 ovl.fmt.RXY.dh2); goto ok;
11979 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
11980 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11981 ovl.fmt.RXY.dl2,
11982 ovl.fmt.RXY.dh2); goto ok;
11983 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
11984 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11985 ovl.fmt.RXY.dl2,
11986 ovl.fmt.RXY.dh2); goto ok;
11987 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
11988 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11989 ovl.fmt.RXY.dl2,
11990 ovl.fmt.RXY.dh2); goto ok;
11991 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
11992 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11993 ovl.fmt.RXY.dl2,
11994 ovl.fmt.RXY.dh2); goto ok;
11995 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
11996 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
11997 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11998 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11999 ovl.fmt.RXY.dh2); goto ok;
12000 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
12001 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12002 ovl.fmt.RXY.dl2,
12003 ovl.fmt.RXY.dh2); goto ok;
12004 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
12005 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12006 ovl.fmt.RXY.dl2,
12007 ovl.fmt.RXY.dh2); goto ok;
12008 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
12009 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12010 ovl.fmt.RXY.dl2,
12011 ovl.fmt.RXY.dh2); goto ok;
12012 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
12013 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12014 ovl.fmt.RXY.dl2,
12015 ovl.fmt.RXY.dh2); goto ok;
12016 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
12017 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12018 ovl.fmt.RXY.dl2,
12019 ovl.fmt.RXY.dh2); goto ok;
12020 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
12021 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12022 ovl.fmt.RXY.dl2,
12023 ovl.fmt.RXY.dh2); goto ok;
12024 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
12025 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12026 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12027 ovl.fmt.RXY.dh2); goto ok;
12028 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
12029 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12030 ovl.fmt.RXY.dl2,
12031 ovl.fmt.RXY.dh2); goto ok;
12032 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
12033 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12034 ovl.fmt.RXY.dl2,
12035 ovl.fmt.RXY.dh2); goto ok;
12036 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
12037 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12038 ovl.fmt.RXY.dl2,
12039 ovl.fmt.RXY.dh2); goto ok;
12040 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
12041 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12042 ovl.fmt.RXY.dl2,
12043 ovl.fmt.RXY.dh2); goto ok;
12044 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
12045 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12046 ovl.fmt.RXY.dl2,
12047 ovl.fmt.RXY.dh2); goto ok;
12048 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
12049 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12050 ovl.fmt.RXY.dl2,
12051 ovl.fmt.RXY.dh2); goto ok;
12052 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
12053 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12054 ovl.fmt.RXY.dl2,
12055 ovl.fmt.RXY.dh2); goto ok;
12056 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
12057 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12058 ovl.fmt.RXY.dl2,
12059 ovl.fmt.RXY.dh2); goto ok;
12060 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
12061 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12062 ovl.fmt.RXY.dl2,
12063 ovl.fmt.RXY.dh2); goto ok;
12064 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12065 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12066 ovl.fmt.RXY.dl2,
12067 ovl.fmt.RXY.dh2); goto ok;
12068 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12069 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12070 ovl.fmt.RXY.dl2,
12071 ovl.fmt.RXY.dh2); goto ok;
12072 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12073 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12074 ovl.fmt.RXY.dl2,
12075 ovl.fmt.RXY.dh2); goto ok;
12076 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12077 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12078 ovl.fmt.RXY.dl2,
12079 ovl.fmt.RXY.dh2); goto ok;
12080 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12081 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12082 ovl.fmt.RXY.dl2,
12083 ovl.fmt.RXY.dh2); goto ok;
12084 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12085 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12086 ovl.fmt.RXY.dl2,
12087 ovl.fmt.RXY.dh2); goto ok;
12088 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12089 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12090 ovl.fmt.RXY.dl2,
12091 ovl.fmt.RXY.dh2); goto ok;
12092 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12093 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12094 ovl.fmt.RXY.dl2,
12095 ovl.fmt.RXY.dh2); goto ok;
12096 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12097 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12098 ovl.fmt.RXY.dl2,
12099 ovl.fmt.RXY.dh2); goto ok;
12100 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12101 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12102 ovl.fmt.RXY.dl2,
12103 ovl.fmt.RXY.dh2); goto ok;
12104 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12105 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12106 ovl.fmt.RXY.dl2,
12107 ovl.fmt.RXY.dh2); goto ok;
12108 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12109 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12110 ovl.fmt.RXY.dl2,
12111 ovl.fmt.RXY.dh2); goto ok;
12112 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12113 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12114 ovl.fmt.RXY.dl2,
12115 ovl.fmt.RXY.dh2); goto ok;
12116 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12117 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12118 ovl.fmt.RXY.dl2,
12119 ovl.fmt.RXY.dh2); goto ok;
12120 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12121 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12122 ovl.fmt.RXY.dl2,
12123 ovl.fmt.RXY.dh2); goto ok;
12124 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12125 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12126 ovl.fmt.RXY.dl2,
12127 ovl.fmt.RXY.dh2); goto ok;
12128 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12129 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12130 ovl.fmt.RXY.dl2,
12131 ovl.fmt.RXY.dh2); goto ok;
12132 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12133 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12134 ovl.fmt.RXY.dl2,
12135 ovl.fmt.RXY.dh2); goto ok;
12136 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12137 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12138 ovl.fmt.RXY.dl2,
12139 ovl.fmt.RXY.dh2); goto ok;
12140 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12141 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12142 ovl.fmt.RXY.dl2,
12143 ovl.fmt.RXY.dh2); goto ok;
12144 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12145 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12146 ovl.fmt.RXY.dl2,
12147 ovl.fmt.RXY.dh2); goto ok;
12148 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12149 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12150 ovl.fmt.RXY.dl2,
12151 ovl.fmt.RXY.dh2); goto ok;
12152 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12153 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12154 ovl.fmt.RXY.dl2,
12155 ovl.fmt.RXY.dh2); goto ok;
12156 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12157 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12158 ovl.fmt.RXY.dl2,
12159 ovl.fmt.RXY.dh2); goto ok;
12160 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12161 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12162 ovl.fmt.RXY.dl2,
12163 ovl.fmt.RXY.dh2); goto ok;
12164 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12165 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12166 ovl.fmt.RXY.dl2,
12167 ovl.fmt.RXY.dh2); goto ok;
12168 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12169 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12170 ovl.fmt.RXY.dl2,
12171 ovl.fmt.RXY.dh2); goto ok;
12172 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12173 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12174 ovl.fmt.RXY.dl2,
12175 ovl.fmt.RXY.dh2); goto ok;
12176 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12177 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12178 ovl.fmt.RXY.dl2,
12179 ovl.fmt.RXY.dh2); goto ok;
12180 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12181 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12182 ovl.fmt.RXY.dl2,
12183 ovl.fmt.RXY.dh2); goto ok;
12184 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12185 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12186 ovl.fmt.RXY.dl2,
12187 ovl.fmt.RXY.dh2); goto ok;
12188 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12189 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12190 ovl.fmt.RXY.dl2,
12191 ovl.fmt.RXY.dh2); goto ok;
12192 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12193 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12194 ovl.fmt.RXY.dl2,
12195 ovl.fmt.RXY.dh2); goto ok;
12196 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12197 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12198 ovl.fmt.RXY.dl2,
12199 ovl.fmt.RXY.dh2); goto ok;
12200 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12201 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12202 ovl.fmt.RXY.dl2,
12203 ovl.fmt.RXY.dh2); goto ok;
12204 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12205 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12206 ovl.fmt.RXY.dl2,
12207 ovl.fmt.RXY.dh2); goto ok;
12208 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12209 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12210 ovl.fmt.RXY.dl2,
12211 ovl.fmt.RXY.dh2); goto ok;
12212 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12213 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12214 ovl.fmt.RXY.dl2,
12215 ovl.fmt.RXY.dh2); goto ok;
12216 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12217 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12218 ovl.fmt.RXY.dl2,
12219 ovl.fmt.RXY.dh2); goto ok;
12220 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12221 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12222 ovl.fmt.RXY.dl2,
12223 ovl.fmt.RXY.dh2); goto ok;
12224 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12225 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12226 ovl.fmt.RXY.dl2,
12227 ovl.fmt.RXY.dh2); goto ok;
12228 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12229 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12230 ovl.fmt.RXY.dl2,
12231 ovl.fmt.RXY.dh2); goto ok;
12232 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12233 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12234 ovl.fmt.RXY.dl2,
12235 ovl.fmt.RXY.dh2); goto ok;
12236 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12237 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12238 ovl.fmt.RXY.dl2,
12239 ovl.fmt.RXY.dh2); goto ok;
12240 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12241 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12242 ovl.fmt.RSY.dl2,
12243 ovl.fmt.RSY.dh2); goto ok;
12244 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12245 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12246 ovl.fmt.RSY.dl2,
12247 ovl.fmt.RSY.dh2); goto ok;
12248 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12249 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12250 ovl.fmt.RSY.dl2,
12251 ovl.fmt.RSY.dh2); goto ok;
12252 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12253 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12254 ovl.fmt.RSY.dl2,
12255 ovl.fmt.RSY.dh2); goto ok;
12256 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12257 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12258 ovl.fmt.RSY.dl2,
12259 ovl.fmt.RSY.dh2); goto ok;
12260 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12261 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12262 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12263 ovl.fmt.RSY.dl2,
12264 ovl.fmt.RSY.dh2); goto ok;
12265 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12266 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12267 ovl.fmt.RSY.dl2,
12268 ovl.fmt.RSY.dh2); goto ok;
12269 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12270 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12271 ovl.fmt.RSY.dl2,
12272 ovl.fmt.RSY.dh2); goto ok;
12273 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12274 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12275 ovl.fmt.RSY.dl2,
12276 ovl.fmt.RSY.dh2); goto ok;
12277 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12278 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12279 ovl.fmt.RSY.dl2,
12280 ovl.fmt.RSY.dh2); goto ok;
12281 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12282 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12283 ovl.fmt.RSY.dl2,
12284 ovl.fmt.RSY.dh2); goto ok;
12285 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12286 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12287 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12288 ovl.fmt.RSY.dl2,
12289 ovl.fmt.RSY.dh2); goto ok;
12290 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12291 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12292 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12293 ovl.fmt.RSY.dh2); goto ok;
12294 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12295 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12296 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12297 ovl.fmt.RSY.dh2); goto ok;
12298 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12299 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12300 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12301 ovl.fmt.RSY.dl2,
12302 ovl.fmt.RSY.dh2); goto ok;
12303 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12304 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12305 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12306 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12307 ovl.fmt.RSY.dl2,
12308 ovl.fmt.RSY.dh2); goto ok;
12309 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12310 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12311 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12312 ovl.fmt.RSY.dh2); goto ok;
12313 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12314 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12315 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12316 ovl.fmt.SIY.dh1); goto ok;
12317 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12318 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12319 ovl.fmt.SIY.dh1); goto ok;
12320 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12321 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12322 ovl.fmt.SIY.dh1); goto ok;
12323 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12324 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12325 ovl.fmt.SIY.dh1); goto ok;
12326 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12327 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12328 ovl.fmt.SIY.dh1); goto ok;
12329 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12330 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12331 ovl.fmt.SIY.dh1); goto ok;
12332 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12333 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12334 ovl.fmt.SIY.dh1); goto ok;
12335 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12336 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12337 ovl.fmt.SIY.dh1); goto ok;
12338 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12339 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12340 ovl.fmt.SIY.dh1); goto ok;
12341 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12342 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12343 ovl.fmt.SIY.dh1); goto ok;
12344 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12345 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12346 ovl.fmt.RSY.dl2,
12347 ovl.fmt.RSY.dh2); goto ok;
12348 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12349 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12350 ovl.fmt.RSY.dl2,
12351 ovl.fmt.RSY.dh2); goto ok;
12352 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12353 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12354 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12355 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12356 ovl.fmt.RSY.dl2,
12357 ovl.fmt.RSY.dh2); goto ok;
12358 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12359 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12360 ovl.fmt.RSY.dl2,
12361 ovl.fmt.RSY.dh2); goto ok;
12362 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12363 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12364 ovl.fmt.RSY.dl2,
12365 ovl.fmt.RSY.dh2); goto ok;
12366 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12367 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12368 ovl.fmt.RSY.dl2,
12369 ovl.fmt.RSY.dh2); goto ok;
12370 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12371 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12372 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12373 ovl.fmt.RSY.dh2); goto ok;
12374 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12375 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12376 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12377 ovl.fmt.RSY.dl2,
12378 ovl.fmt.RSY.dh2); goto ok;
12379 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12380 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12381 ovl.fmt.RSY.dl2,
12382 ovl.fmt.RSY.dh2); goto ok;
12383 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12384 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12385 ovl.fmt.RSY.dl2,
12386 ovl.fmt.RSY.dh2); goto ok;
12387 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12388 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12389 ovl.fmt.RSY.dl2,
12390 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012391 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12392 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12393 ovl.fmt.RSY.dl2,
12394 ovl.fmt.RSY.dh2,
12395 S390_XMNM_LOCG); goto ok;
12396 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12397 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12398 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12399 ovl.fmt.RSY.dh2,
12400 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012401 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12402 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12403 ovl.fmt.RSY.dl2,
12404 ovl.fmt.RSY.dh2); goto ok;
12405 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12406 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12407 ovl.fmt.RSY.dl2,
12408 ovl.fmt.RSY.dh2); goto ok;
12409 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12410 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12411 ovl.fmt.RSY.dl2,
12412 ovl.fmt.RSY.dh2); goto ok;
12413 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12414 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12415 ovl.fmt.RSY.dl2,
12416 ovl.fmt.RSY.dh2); goto ok;
12417 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12418 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12419 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12420 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012421 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12422 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12423 ovl.fmt.RSY.dl2,
12424 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12425 goto ok;
12426 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12427 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12428 ovl.fmt.RSY.dl2,
12429 ovl.fmt.RSY.dh2,
12430 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012431 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12432 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12433 ovl.fmt.RSY.dl2,
12434 ovl.fmt.RSY.dh2); goto ok;
12435 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12436 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12437 ovl.fmt.RSY.dl2,
12438 ovl.fmt.RSY.dh2); goto ok;
12439 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12440 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12441 ovl.fmt.RSY.dl2,
12442 ovl.fmt.RSY.dh2); goto ok;
12443 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12444 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12445 ovl.fmt.RSY.dl2,
12446 ovl.fmt.RSY.dh2); goto ok;
12447 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
12448 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12449 ovl.fmt.RSY.dl2,
12450 ovl.fmt.RSY.dh2); goto ok;
12451 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
12452 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12453 goto ok;
12454 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
12455 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12456 goto ok;
12457 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
12458 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
12459 ovl.fmt.RIE_RRUUU.r1,
12460 ovl.fmt.RIE_RRUUU.r2,
12461 ovl.fmt.RIE_RRUUU.i3,
12462 ovl.fmt.RIE_RRUUU.i4,
12463 ovl.fmt.RIE_RRUUU.i5);
12464 goto ok;
12465 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
12466 ovl.fmt.RIE_RRUUU.r1,
12467 ovl.fmt.RIE_RRUUU.r2,
12468 ovl.fmt.RIE_RRUUU.i3,
12469 ovl.fmt.RIE_RRUUU.i4,
12470 ovl.fmt.RIE_RRUUU.i5);
12471 goto ok;
12472 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
12473 ovl.fmt.RIE_RRUUU.r1,
12474 ovl.fmt.RIE_RRUUU.r2,
12475 ovl.fmt.RIE_RRUUU.i3,
12476 ovl.fmt.RIE_RRUUU.i4,
12477 ovl.fmt.RIE_RRUUU.i5);
12478 goto ok;
12479 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
12480 ovl.fmt.RIE_RRUUU.r1,
12481 ovl.fmt.RIE_RRUUU.r2,
12482 ovl.fmt.RIE_RRUUU.i3,
12483 ovl.fmt.RIE_RRUUU.i4,
12484 ovl.fmt.RIE_RRUUU.i5);
12485 goto ok;
12486 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
12487 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
12488 ovl.fmt.RIE_RRPU.r1,
12489 ovl.fmt.RIE_RRPU.r2,
12490 ovl.fmt.RIE_RRPU.i4,
12491 ovl.fmt.RIE_RRPU.m3); goto ok;
12492 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
12493 ovl.fmt.RIE_RRPU.r1,
12494 ovl.fmt.RIE_RRPU.r2,
12495 ovl.fmt.RIE_RRPU.i4,
12496 ovl.fmt.RIE_RRPU.m3); goto ok;
12497 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
12498 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
12499 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
12500 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
12501 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
12502 ovl.fmt.RIE_RRPU.r1,
12503 ovl.fmt.RIE_RRPU.r2,
12504 ovl.fmt.RIE_RRPU.i4,
12505 ovl.fmt.RIE_RRPU.m3); goto ok;
12506 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
12507 ovl.fmt.RIE_RRPU.r1,
12508 ovl.fmt.RIE_RRPU.r2,
12509 ovl.fmt.RIE_RRPU.i4,
12510 ovl.fmt.RIE_RRPU.m3); goto ok;
12511 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
12512 ovl.fmt.RIEv3.r1,
12513 ovl.fmt.RIEv3.m3,
12514 ovl.fmt.RIEv3.i4,
12515 ovl.fmt.RIEv3.i2); goto ok;
12516 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
12517 ovl.fmt.RIEv3.r1,
12518 ovl.fmt.RIEv3.m3,
12519 ovl.fmt.RIEv3.i4,
12520 ovl.fmt.RIEv3.i2); goto ok;
12521 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
12522 ovl.fmt.RIEv3.r1,
12523 ovl.fmt.RIEv3.m3,
12524 ovl.fmt.RIEv3.i4,
12525 ovl.fmt.RIEv3.i2); goto ok;
12526 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
12527 ovl.fmt.RIEv3.r1,
12528 ovl.fmt.RIEv3.m3,
12529 ovl.fmt.RIEv3.i4,
12530 ovl.fmt.RIEv3.i2); goto ok;
12531 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
12532 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12533 goto ok;
12534 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
12535 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12536 ovl.fmt.RIE.i2); goto ok;
12537 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
12538 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12539 ovl.fmt.RIE.i2); goto ok;
12540 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
12541 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12542 ovl.fmt.RIE.i2); goto ok;
12543 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
12544 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12545 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12546 goto ok;
12547 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
12548 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12549 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12550 goto ok;
12551 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
12552 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12553 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12554 goto ok;
12555 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
12556 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12557 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12558 goto ok;
12559 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
12560 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12561 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12562 ovl.fmt.RIS.i2); goto ok;
12563 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
12564 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12565 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12566 ovl.fmt.RIS.i2); goto ok;
12567 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
12568 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
12569 ovl.fmt.RIS.d4,
12570 ovl.fmt.RIS.i2); goto ok;
12571 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
12572 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12573 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12574 ovl.fmt.RIS.i2); goto ok;
12575 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
12576 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12577 ovl.fmt.RXE.d2); goto ok;
12578 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
12579 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12580 ovl.fmt.RXE.d2); goto ok;
12581 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
12582 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12583 ovl.fmt.RXE.d2); goto ok;
12584 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
12585 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
12586 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
12587 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12588 ovl.fmt.RXE.d2); goto ok;
12589 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
12590 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12591 ovl.fmt.RXE.d2); goto ok;
12592 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
12593 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12594 ovl.fmt.RXE.d2); goto ok;
12595 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
12596 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
12597 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12598 ovl.fmt.RXE.d2); goto ok;
12599 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
12600 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12601 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12602 ovl.fmt.RXF.r1); goto ok;
12603 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
12604 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12605 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12606 ovl.fmt.RXF.r1); goto ok;
12607 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
12608 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12609 ovl.fmt.RXE.d2); goto ok;
12610 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
12611 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12612 ovl.fmt.RXE.d2); goto ok;
12613 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
12614 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12615 ovl.fmt.RXE.d2); goto ok;
12616 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
12617 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12618 ovl.fmt.RXE.d2); goto ok;
12619 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
12620 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12621 ovl.fmt.RXE.d2); goto ok;
12622 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
12623 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12624 ovl.fmt.RXE.d2); goto ok;
12625 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
12626 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
12627 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12628 ovl.fmt.RXE.d2); goto ok;
12629 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
12630 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12631 ovl.fmt.RXE.d2); goto ok;
12632 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
12633 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12634 ovl.fmt.RXE.d2); goto ok;
12635 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
12636 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12637 ovl.fmt.RXE.d2); goto ok;
12638 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
12639 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12640 ovl.fmt.RXE.d2); goto ok;
12641 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
12642 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12643 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12644 ovl.fmt.RXF.r1); goto ok;
12645 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
12646 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12647 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12648 ovl.fmt.RXF.r1); goto ok;
12649 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
12650 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
12651 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
12652 case 0xed000000002eULL: /* MAE */ goto unimplemented;
12653 case 0xed000000002fULL: /* MSE */ goto unimplemented;
12654 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
12655 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
12656 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
12657 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
12658 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
12659 case 0xed000000003aULL: /* MAY */ goto unimplemented;
12660 case 0xed000000003bULL: /* MY */ goto unimplemented;
12661 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
12662 case 0xed000000003dULL: /* MYH */ goto unimplemented;
12663 case 0xed000000003eULL: /* MAD */ goto unimplemented;
12664 case 0xed000000003fULL: /* MSD */ goto unimplemented;
12665 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
12666 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
12667 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
12668 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
12669 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
12670 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
12671 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
12672 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
12673 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
12674 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
12675 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
12676 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12677 ovl.fmt.RXY.dl2,
12678 ovl.fmt.RXY.dh2); goto ok;
12679 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
12680 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12681 ovl.fmt.RXY.dl2,
12682 ovl.fmt.RXY.dh2); goto ok;
12683 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
12684 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12685 ovl.fmt.RXY.dl2,
12686 ovl.fmt.RXY.dh2); goto ok;
12687 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
12688 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12689 ovl.fmt.RXY.dl2,
12690 ovl.fmt.RXY.dh2); goto ok;
12691 }
12692
12693 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
12694 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
12695 ovl.fmt.RIL.i2); goto ok;
12696 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
12697 ovl.fmt.RIL.i2); goto ok;
12698 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
12699 ovl.fmt.RIL.i2); goto ok;
12700 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
12701 ovl.fmt.RIL.i2); goto ok;
12702 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
12703 ovl.fmt.RIL.i2); goto ok;
12704 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
12705 ovl.fmt.RIL.i2); goto ok;
12706 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
12707 ovl.fmt.RIL.i2); goto ok;
12708 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
12709 ovl.fmt.RIL.i2); goto ok;
12710 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
12711 ovl.fmt.RIL.i2); goto ok;
12712 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
12713 ovl.fmt.RIL.i2); goto ok;
12714 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
12715 ovl.fmt.RIL.i2); goto ok;
12716 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
12717 ovl.fmt.RIL.i2); goto ok;
12718 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
12719 ovl.fmt.RIL.i2); goto ok;
12720 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
12721 ovl.fmt.RIL.i2); goto ok;
12722 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
12723 ovl.fmt.RIL.i2); goto ok;
12724 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
12725 ovl.fmt.RIL.i2); goto ok;
12726 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
12727 ovl.fmt.RIL.i2); goto ok;
12728 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
12729 ovl.fmt.RIL.i2); goto ok;
12730 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
12731 ovl.fmt.RIL.i2); goto ok;
12732 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
12733 ovl.fmt.RIL.i2); goto ok;
12734 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
12735 ovl.fmt.RIL.i2); goto ok;
12736 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
12737 ovl.fmt.RIL.i2); goto ok;
12738 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
12739 ovl.fmt.RIL.i2); goto ok;
12740 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
12741 ovl.fmt.RIL.i2); goto ok;
12742 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
12743 ovl.fmt.RIL.i2); goto ok;
12744 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
12745 ovl.fmt.RIL.i2); goto ok;
12746 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
12747 ovl.fmt.RIL.i2); goto ok;
12748 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
12749 ovl.fmt.RIL.i2); goto ok;
12750 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
12751 ovl.fmt.RIL.i2); goto ok;
12752 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
12753 ovl.fmt.RIL.i2); goto ok;
12754 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
12755 ovl.fmt.RIL.i2); goto ok;
12756 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
12757 ovl.fmt.RIL.i2); goto ok;
12758 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
12759 ovl.fmt.RIL.i2); goto ok;
12760 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
12761 ovl.fmt.RIL.i2); goto ok;
12762 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
12763 ovl.fmt.RIL.i2); goto ok;
12764 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
12765 ovl.fmt.RIL.i2); goto ok;
12766 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
12767 ovl.fmt.RIL.i2); goto ok;
12768 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
12769 ovl.fmt.RIL.i2); goto ok;
12770 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
12771 ovl.fmt.RIL.i2); goto ok;
12772 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
12773 ovl.fmt.RIL.i2); goto ok;
12774 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
12775 ovl.fmt.RIL.i2); goto ok;
12776 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
12777 ovl.fmt.RIL.i2); goto ok;
12778 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
12779 ovl.fmt.RIL.i2); goto ok;
12780 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
12781 ovl.fmt.RIL.i2); goto ok;
12782 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
12783 ovl.fmt.RIL.i2); goto ok;
12784 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
12785 ovl.fmt.RIL.i2); goto ok;
12786 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
12787 ovl.fmt.RIL.i2); goto ok;
12788 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
12789 ovl.fmt.RIL.i2); goto ok;
12790 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
12791 ovl.fmt.RIL.i2); goto ok;
12792 case 0xc800ULL: /* MVCOS */ goto unimplemented;
12793 case 0xc801ULL: /* ECTG */ goto unimplemented;
12794 case 0xc802ULL: /* CSST */ goto unimplemented;
12795 case 0xc804ULL: /* LPD */ goto unimplemented;
12796 case 0xc805ULL: /* LPDG */ goto unimplemented;
12797 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
12798 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
12799 ovl.fmt.RIL.i2); goto ok;
12800 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
12801 ovl.fmt.RIL.i2); goto ok;
12802 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
12803 ovl.fmt.RIL.i2); goto ok;
12804 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
12805 ovl.fmt.RIL.i2); goto ok;
12806 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
12807 ovl.fmt.RIL.i2); goto ok;
12808 }
12809
12810 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
12811 case 0xd0ULL: /* TRTR */ goto unimplemented;
12812 case 0xd1ULL: /* MVN */ goto unimplemented;
12813 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
12814 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12815 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12816 case 0xd3ULL: /* MVZ */ goto unimplemented;
12817 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
12818 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12819 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12820 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
12821 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12822 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12823 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
12824 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12825 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000012826 case 0xd7ULL:
12827 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
12828 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
12829 else
12830 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
12831 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12832 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
12833 goto ok;
sewardj2019a972011-03-07 16:04:07 +000012834 case 0xd9ULL: /* MVCK */ goto unimplemented;
12835 case 0xdaULL: /* MVCP */ goto unimplemented;
12836 case 0xdbULL: /* MVCS */ goto unimplemented;
12837 case 0xdcULL: /* TR */ goto unimplemented;
12838 case 0xddULL: /* TRT */ goto unimplemented;
12839 case 0xdeULL: /* ED */ goto unimplemented;
12840 case 0xdfULL: /* EDMK */ goto unimplemented;
12841 case 0xe1ULL: /* PKU */ goto unimplemented;
12842 case 0xe2ULL: /* UNPKU */ goto unimplemented;
12843 case 0xe8ULL: /* MVCIN */ goto unimplemented;
12844 case 0xe9ULL: /* PKA */ goto unimplemented;
12845 case 0xeaULL: /* UNPKA */ goto unimplemented;
12846 case 0xeeULL: /* PLO */ goto unimplemented;
12847 case 0xefULL: /* LMD */ goto unimplemented;
12848 case 0xf0ULL: /* SRP */ goto unimplemented;
12849 case 0xf1ULL: /* MVO */ goto unimplemented;
12850 case 0xf2ULL: /* PACK */ goto unimplemented;
12851 case 0xf3ULL: /* UNPK */ goto unimplemented;
12852 case 0xf8ULL: /* ZAP */ goto unimplemented;
12853 case 0xf9ULL: /* CP */ goto unimplemented;
12854 case 0xfaULL: /* AP */ goto unimplemented;
12855 case 0xfbULL: /* SP */ goto unimplemented;
12856 case 0xfcULL: /* MP */ goto unimplemented;
12857 case 0xfdULL: /* DP */ goto unimplemented;
12858 }
12859
12860 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
12861 case 0xe500ULL: /* LASP */ goto unimplemented;
12862 case 0xe501ULL: /* TPROT */ goto unimplemented;
12863 case 0xe502ULL: /* STRAG */ goto unimplemented;
12864 case 0xe50eULL: /* MVCSK */ goto unimplemented;
12865 case 0xe50fULL: /* MVCDK */ goto unimplemented;
12866 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
12867 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12868 goto ok;
12869 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
12870 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12871 goto ok;
12872 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
12873 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12874 goto ok;
12875 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
12876 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12877 goto ok;
12878 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
12879 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12880 goto ok;
12881 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
12882 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12883 goto ok;
12884 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
12885 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12886 goto ok;
12887 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
12888 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12889 goto ok;
12890 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
12891 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12892 goto ok;
12893 }
12894
12895 return S390_DECODE_UNKNOWN_INSN;
12896
12897ok:
12898 return S390_DECODE_OK;
12899
12900unimplemented:
12901 return S390_DECODE_UNIMPLEMENTED_INSN;
12902}
12903
12904/* Handle "special" instructions. */
12905static s390_decode_t
12906s390_decode_special_and_irgen(UChar *bytes)
12907{
12908 s390_decode_t status = S390_DECODE_OK;
12909
12910 /* Got a "Special" instruction preamble. Which one is it? */
12911 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
12912 s390_irgen_client_request();
12913 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
12914 s390_irgen_guest_NRADDR();
12915 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
12916 s390_irgen_call_noredir();
12917 } else {
12918 /* We don't know what it is. */
12919 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
12920 }
12921
12922 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
12923
12924 return status;
12925}
12926
12927
12928/* Function returns # bytes that were decoded or 0 in case of failure */
florianb4df7682011-07-05 02:09:01 +000012929static UInt
sewardj2019a972011-03-07 16:04:07 +000012930s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
12931{
12932 s390_decode_t status;
12933
12934 dis_res = dres;
12935
12936 /* Spot the 8-byte preamble: 18ff lr r15,r15
12937 1811 lr r1,r1
12938 1822 lr r2,r2
12939 1833 lr r3,r3 */
12940 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
12941 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
12942 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
12943
12944 /* Handle special instruction that follows that preamble. */
12945 if (0) vex_printf("special function handling...\n");
12946 bytes += S390_SPECIAL_OP_PREAMBLE_SIZE;
12947 status = s390_decode_special_and_irgen(bytes);
12948 insn_length = S390_SPECIAL_OP_SIZE;
12949 } else {
12950 /* Handle normal instructions. */
12951 switch (insn_length) {
12952 case 2:
12953 status = s390_decode_2byte_and_irgen(bytes);
12954 break;
12955
12956 case 4:
12957 status = s390_decode_4byte_and_irgen(bytes);
12958 break;
12959
12960 case 6:
12961 status = s390_decode_6byte_and_irgen(bytes);
12962 break;
12963
12964 default:
12965 status = S390_DECODE_ERROR;
12966 break;
12967 }
12968 }
12969 /* next instruction is execute, stop here */
12970 if (irsb->next == NULL && (*(char *)(HWord) guest_IA_next_instr == 0x44)) {
12971 irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
12972 dis_res->whatNext = Dis_StopHere;
12973 }
12974
12975 if (status == S390_DECODE_OK) return insn_length; /* OK */
12976
12977 /* Decoding failed somehow */
12978 vex_printf("vex s390->IR: ");
12979 switch (status) {
12980 case S390_DECODE_UNKNOWN_INSN:
12981 vex_printf("unknown insn: ");
12982 break;
12983
12984 case S390_DECODE_UNIMPLEMENTED_INSN:
12985 vex_printf("unimplemented insn: ");
12986 break;
12987
12988 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
12989 vex_printf("unimplemented special insn: ");
12990 break;
12991
12992 default:
12993 case S390_DECODE_ERROR:
12994 vex_printf("decoding error: ");
12995 break;
12996 }
12997
12998 vex_printf("%02x%02x", bytes[0], bytes[1]);
12999 if (insn_length > 2) {
13000 vex_printf(" %02x%02x", bytes[2], bytes[3]);
13001 }
13002 if (insn_length > 4) {
13003 vex_printf(" %02x%02x", bytes[4], bytes[5]);
13004 }
13005 vex_printf("\n");
13006
13007 return 0; /* Failed */
13008}
13009
13010
13011/* Generate an IRExpr for an address. */
13012static __inline__ IRExpr *
13013mkaddr_expr(Addr64 addr)
13014{
13015 return IRExpr_Const(IRConst_U64(addr));
13016}
13017
13018
13019/* Disassemble a single instruction INSN into IR. */
13020static DisResult
13021disInstr_S390_WRK(UChar *insn, Bool (*resteerOkFn)(void *, Addr64),
13022 void *callback_data)
13023{
13024 UChar byte;
13025 UInt insn_length;
13026 DisResult dres;
13027
13028 /* ---------------------------------------------------- */
13029 /* --- Compute instruction length -- */
13030 /* ---------------------------------------------------- */
13031
13032 /* Get the first byte of the insn. */
13033 byte = insn[0];
13034
13035 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
13036 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
13037 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
13038
13039 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13040
13041 /* ---------------------------------------------------- */
13042 /* --- Initialise the DisResult data -- */
13043 /* ---------------------------------------------------- */
13044 dres.whatNext = Dis_Continue;
13045 dres.len = insn_length;
13046 dres.continueAt = 0;
13047
floriana99f20e2011-07-17 14:16:41 +000013048 /* fixs390: consider chasing of conditional jumps */
13049
floriana64c2432011-07-16 02:11:50 +000013050 resteer_fn = resteerOkFn;
13051 resteer_data = callback_data;
sewardj2019a972011-03-07 16:04:07 +000013052
13053 /* Normal and special instruction handling starts here. */
13054 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
13055 /* All decode failures end up here. The decoder has already issued an
13056 error message.
13057 Tell the dispatcher that this insn cannot be decoded, and so has
13058 not been executed, and (is currently) the next to be executed.
13059 IA should be up-to-date since it made so at the start of each
13060 insn, but nevertheless be paranoid and update it again right
13061 now. */
floriane88b3c92011-07-05 02:48:39 +000013062 addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
sewardj2019a972011-03-07 16:04:07 +000013063 mkaddr_expr(guest_IA_curr_instr)));
13064
sewardj15469da2011-04-13 15:10:16 +000013065 irsb->next = mkaddr_expr(guest_IA_next_instr);
sewardj2019a972011-03-07 16:04:07 +000013066 irsb->jumpkind = Ijk_NoDecode;
13067 dres.whatNext = Dis_StopHere;
13068 dres.len = 0;
13069
13070 return dres;
13071 }
13072
13073 return dres;
13074}
13075
13076
13077/*------------------------------------------------------------*/
13078/*--- Top-level fn ---*/
13079/*------------------------------------------------------------*/
13080
13081/* Disassemble a single instruction into IR. The instruction
13082 is located in host memory at &guest_code[delta]. */
13083
13084DisResult
13085disInstr_S390(IRSB *irsb_IN,
13086 Bool put_IP,
13087 Bool (*resteerOkFn)(void *, Addr64),
13088 Bool resteerCisOk,
13089 void *callback_opaque,
13090 UChar *guest_code,
13091 Long delta,
13092 Addr64 guest_IP,
13093 VexArch guest_arch,
13094 VexArchInfo *archinfo,
13095 VexAbiInfo *abiinfo,
13096 Bool host_bigendian)
13097{
13098 vassert(guest_arch == VexArchS390X);
13099
13100 /* The instruction decoder requires a big-endian machine. */
13101 vassert(host_bigendian == True);
13102
13103 /* Set globals (see top of this file) */
13104 guest_IA_curr_instr = guest_IP;
13105
13106 irsb = irsb_IN;
13107
13108 vassert(guest_arch == VexArchS390X);
13109
13110 /* We may be asked to update the guest IA before going further. */
13111 if (put_IP)
floriane88b3c92011-07-05 02:48:39 +000013112 addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
sewardj2019a972011-03-07 16:04:07 +000013113 mkaddr_expr(guest_IA_curr_instr)));
13114
13115 return disInstr_S390_WRK(guest_code + delta, resteerOkFn, callback_opaque);
13116}
13117
13118/*---------------------------------------------------------------*/
13119/*--- end guest_s390_toIR.c ---*/
13120/*---------------------------------------------------------------*/