Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 1 | /* |
| 2 | * XGL |
| 3 | * |
| 4 | * Copyright (C) 2014 LunarG, Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included |
| 14 | * in all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | */ |
| 24 | |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 25 | #include "genhw/genhw.h" |
| 26 | #include "kmd/winsys.h" |
| 27 | #include "dev.h" |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 28 | #include "mem.h" |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 29 | #include "obj.h" |
Chia-I Wu | 00a23b2 | 2014-08-20 15:28:08 +0800 | [diff] [blame] | 30 | #include "cmd_priv.h" |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 31 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 32 | static XGL_RESULT cmd_writer_alloc_and_map(struct intel_cmd *cmd, |
| 33 | struct intel_cmd_writer *writer, |
| 34 | XGL_UINT size) |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 35 | { |
| 36 | struct intel_winsys *winsys = cmd->dev->winsys; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 37 | const XGL_GPU_SIZE bo_size = sizeof(uint32_t) * size; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 38 | struct intel_bo *bo; |
| 39 | void *ptr; |
| 40 | |
| 41 | bo = intel_winsys_alloc_buffer(winsys, |
| 42 | "batch buffer", bo_size, INTEL_DOMAIN_CPU); |
| 43 | if (!bo) |
| 44 | return XGL_ERROR_OUT_OF_GPU_MEMORY; |
| 45 | |
| 46 | ptr = intel_bo_map(bo, true); |
| 47 | if (!bo) { |
| 48 | intel_bo_unreference(bo); |
| 49 | return XGL_ERROR_MEMORY_MAP_FAILED; |
| 50 | } |
| 51 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 52 | writer->bo = bo; |
| 53 | writer->ptr_opaque = ptr; |
| 54 | writer->size = size; |
| 55 | writer->used = 0; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 56 | |
| 57 | return XGL_SUCCESS; |
| 58 | } |
| 59 | |
Chia-I Wu | 5e25c27 | 2014-08-21 20:19:12 +0800 | [diff] [blame] | 60 | static void cmd_writer_copy(struct intel_cmd *cmd, |
| 61 | struct intel_cmd_writer *writer, |
| 62 | const uint32_t *vals, XGL_UINT len) |
| 63 | { |
| 64 | assert(writer->used + len <= writer->size); |
| 65 | memcpy((uint32_t *) writer->ptr_opaque + writer->used, |
| 66 | vals, sizeof(uint32_t) * len); |
| 67 | writer->used += len; |
| 68 | } |
| 69 | |
| 70 | static void cmd_writer_patch(struct intel_cmd *cmd, |
| 71 | struct intel_cmd_writer *writer, |
| 72 | XGL_UINT pos, uint32_t val) |
| 73 | { |
| 74 | assert(pos < writer->used); |
| 75 | ((uint32_t *) writer->ptr_opaque)[pos] = val; |
| 76 | } |
| 77 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 78 | void cmd_writer_grow(struct intel_cmd *cmd, |
| 79 | struct intel_cmd_writer *writer) |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 80 | { |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 81 | const XGL_UINT size = writer->size << 1; |
| 82 | const XGL_UINT old_used = writer->used; |
| 83 | struct intel_bo *old_bo = writer->bo; |
| 84 | void *old_ptr = writer->ptr_opaque; |
| 85 | |
| 86 | if (size >= writer->size && |
| 87 | cmd_writer_alloc_and_map(cmd, writer, size) == XGL_SUCCESS) { |
| 88 | cmd_writer_copy(cmd, writer, (const uint32_t *) old_ptr, old_used); |
| 89 | |
| 90 | intel_bo_unmap(old_bo); |
| 91 | intel_bo_unreference(old_bo); |
| 92 | } else { |
| 93 | intel_dev_log(cmd->dev, XGL_DBG_MSG_ERROR, |
| 94 | XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0, |
| 95 | "failed to grow command buffer of size %u", writer->size); |
| 96 | |
| 97 | /* wrap it and fail silently */ |
| 98 | writer->used = 0; |
| 99 | cmd->result = XGL_ERROR_OUT_OF_GPU_MEMORY; |
| 100 | } |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 101 | } |
| 102 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 103 | static void cmd_writer_unmap(struct intel_cmd *cmd, |
| 104 | struct intel_cmd_writer *writer) |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 105 | { |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 106 | intel_bo_unmap(writer->bo); |
| 107 | writer->ptr_opaque = NULL; |
| 108 | } |
| 109 | |
| 110 | static void cmd_writer_free(struct intel_cmd *cmd, |
| 111 | struct intel_cmd_writer *writer) |
| 112 | { |
| 113 | intel_bo_unreference(writer->bo); |
| 114 | writer->bo = NULL; |
| 115 | } |
| 116 | |
| 117 | static void cmd_writer_reset(struct intel_cmd *cmd, |
| 118 | struct intel_cmd_writer *writer) |
| 119 | { |
| 120 | /* do not reset writer->size as we want to know how big it has grown to */ |
| 121 | writer->used = 0; |
| 122 | |
| 123 | if (writer->ptr_opaque) |
| 124 | cmd_writer_unmap(cmd, writer); |
| 125 | if (writer->bo) |
| 126 | cmd_writer_free(cmd, writer); |
| 127 | } |
| 128 | |
| 129 | static void cmd_unmap(struct intel_cmd *cmd) |
| 130 | { |
| 131 | cmd_writer_unmap(cmd, &cmd->batch); |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 132 | cmd_writer_unmap(cmd, &cmd->state); |
Chia-I Wu | 1cbc005 | 2014-08-25 09:50:12 +0800 | [diff] [blame] | 133 | cmd_writer_unmap(cmd, &cmd->kernel); |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 134 | } |
| 135 | |
| 136 | static void cmd_reset(struct intel_cmd *cmd) |
| 137 | { |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 138 | cmd_writer_reset(cmd, &cmd->batch); |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 139 | cmd_writer_reset(cmd, &cmd->state); |
Chia-I Wu | 1cbc005 | 2014-08-25 09:50:12 +0800 | [diff] [blame] | 140 | cmd_writer_reset(cmd, &cmd->kernel); |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 141 | cmd->reloc_used = 0; |
Chia-I Wu | 0496670 | 2014-08-20 15:05:03 +0800 | [diff] [blame] | 142 | cmd->result = XGL_SUCCESS; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 143 | } |
| 144 | |
| 145 | static void cmd_destroy(struct intel_obj *obj) |
| 146 | { |
| 147 | struct intel_cmd *cmd = intel_cmd_from_obj(obj); |
| 148 | |
| 149 | intel_cmd_destroy(cmd); |
| 150 | } |
| 151 | |
| 152 | XGL_RESULT intel_cmd_create(struct intel_dev *dev, |
| 153 | const XGL_CMD_BUFFER_CREATE_INFO *info, |
| 154 | struct intel_cmd **cmd_ret) |
| 155 | { |
Chia-I Wu | 6388329 | 2014-08-25 13:50:26 +0800 | [diff] [blame] | 156 | int pipeline_select; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 157 | struct intel_cmd *cmd; |
| 158 | |
Chia-I Wu | 6388329 | 2014-08-25 13:50:26 +0800 | [diff] [blame] | 159 | switch (info->queueType) { |
| 160 | case XGL_QUEUE_TYPE_GRAPHICS: |
| 161 | pipeline_select = GEN6_PIPELINE_SELECT_DW0_SELECT_3D; |
| 162 | break; |
| 163 | case XGL_QUEUE_TYPE_COMPUTE: |
| 164 | pipeline_select = GEN6_PIPELINE_SELECT_DW0_SELECT_MEDIA; |
| 165 | break; |
| 166 | case XGL_QUEUE_TYPE_DMA: |
| 167 | pipeline_select = -1; |
| 168 | break; |
| 169 | default: |
| 170 | return XGL_ERROR_INVALID_VALUE; |
| 171 | break; |
| 172 | } |
| 173 | |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 174 | cmd = (struct intel_cmd *) intel_base_create(dev, sizeof(*cmd), |
| 175 | dev->base.dbg, XGL_DBG_OBJECT_CMD_BUFFER, info, 0); |
| 176 | if (!cmd) |
| 177 | return XGL_ERROR_OUT_OF_MEMORY; |
| 178 | |
| 179 | cmd->obj.destroy = cmd_destroy; |
| 180 | |
| 181 | cmd->dev = dev; |
Chia-I Wu | 0b78444 | 2014-08-25 22:54:16 +0800 | [diff] [blame^] | 182 | cmd->scratch_bo = dev->cmd_scratch_bo; |
Chia-I Wu | 6388329 | 2014-08-25 13:50:26 +0800 | [diff] [blame] | 183 | cmd->pipeline_select = pipeline_select; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 184 | |
Chia-I Wu | e0cdd83 | 2014-08-25 12:38:56 +0800 | [diff] [blame] | 185 | /* |
| 186 | * XXX This is not quite right. intel_gpu sets maxMemRefsPerSubmission to |
| 187 | * batch_buffer_reloc_count, but we may emit up to two relocs, for start |
| 188 | * and end offsets, for each referenced memories. |
| 189 | */ |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 190 | cmd->reloc_count = dev->gpu->batch_buffer_reloc_count; |
| 191 | cmd->relocs = icd_alloc(sizeof(cmd->relocs[0]) * cmd->reloc_count, |
| 192 | 4096, XGL_SYSTEM_ALLOC_INTERNAL); |
| 193 | if (!cmd->relocs) { |
| 194 | intel_cmd_destroy(cmd); |
| 195 | return XGL_ERROR_OUT_OF_MEMORY; |
| 196 | } |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 197 | |
| 198 | *cmd_ret = cmd; |
| 199 | |
| 200 | return XGL_SUCCESS; |
| 201 | } |
| 202 | |
| 203 | void intel_cmd_destroy(struct intel_cmd *cmd) |
| 204 | { |
| 205 | cmd_reset(cmd); |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 206 | |
| 207 | icd_free(cmd->relocs); |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 208 | intel_base_destroy(&cmd->obj.base); |
| 209 | } |
| 210 | |
| 211 | XGL_RESULT intel_cmd_begin(struct intel_cmd *cmd, XGL_FLAGS flags) |
| 212 | { |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 213 | XGL_RESULT ret; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 214 | |
| 215 | cmd_reset(cmd); |
| 216 | |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 217 | if (cmd->flags != flags) { |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 218 | cmd->flags = flags; |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 219 | cmd->batch.size = 0; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 220 | } |
| 221 | |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 222 | if (!cmd->batch.size) { |
Chia-I Wu | 1cbc005 | 2014-08-25 09:50:12 +0800 | [diff] [blame] | 223 | const XGL_UINT size = |
| 224 | cmd->dev->gpu->max_batch_buffer_size / sizeof(uint32_t) / 2; |
| 225 | XGL_UINT divider = 1; |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 226 | |
| 227 | if (flags & XGL_CMD_BUFFER_OPTIMIZE_GPU_SMALL_BATCH_BIT) |
| 228 | divider *= 4; |
| 229 | |
Chia-I Wu | 1cbc005 | 2014-08-25 09:50:12 +0800 | [diff] [blame] | 230 | cmd->batch.size = size / divider; |
| 231 | cmd->state.size = size / divider; |
| 232 | cmd->kernel.size = 16384 / sizeof(uint32_t) / divider; |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 233 | } |
| 234 | |
| 235 | ret = cmd_writer_alloc_and_map(cmd, &cmd->batch, cmd->batch.size); |
Chia-I Wu | 1cbc005 | 2014-08-25 09:50:12 +0800 | [diff] [blame] | 236 | if (ret == XGL_SUCCESS) |
| 237 | ret = cmd_writer_alloc_and_map(cmd, &cmd->state, cmd->state.size); |
| 238 | if (ret == XGL_SUCCESS) |
| 239 | ret = cmd_writer_alloc_and_map(cmd, &cmd->kernel, cmd->kernel.size); |
| 240 | if (ret != XGL_SUCCESS) { |
| 241 | cmd_reset(cmd); |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 242 | return ret; |
| 243 | } |
| 244 | |
Chia-I Wu | 79dfbb3 | 2014-08-25 12:19:02 +0800 | [diff] [blame] | 245 | cmd_batch_begin(cmd); |
| 246 | |
Chia-I Wu | 24565ee | 2014-08-21 20:24:31 +0800 | [diff] [blame] | 247 | return XGL_SUCCESS; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 248 | } |
| 249 | |
| 250 | XGL_RESULT intel_cmd_end(struct intel_cmd *cmd) |
| 251 | { |
| 252 | struct intel_winsys *winsys = cmd->dev->winsys; |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 253 | XGL_UINT i; |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 254 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 255 | cmd_batch_end(cmd); |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 256 | |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 257 | /* TODO we need a more "explicit" winsys */ |
Chia-I Wu | fdfb8ed | 2014-08-21 15:40:07 +0800 | [diff] [blame] | 258 | for (i = 0; i < cmd->reloc_used; i++) { |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 259 | const struct intel_cmd_reloc *reloc = &cmd->relocs[i]; |
| 260 | uint64_t presumed_offset; |
| 261 | int err; |
| 262 | |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 263 | err = intel_bo_add_reloc(reloc->writer->bo, |
Chia-I Wu | 9ee3872 | 2014-08-25 12:11:36 +0800 | [diff] [blame] | 264 | sizeof(uint32_t) * reloc->pos, reloc->bo, reloc->val, |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 265 | reloc->read_domains, reloc->write_domain, &presumed_offset); |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 266 | if (err) { |
| 267 | cmd->result = XGL_ERROR_UNKNOWN; |
| 268 | break; |
| 269 | } |
| 270 | |
| 271 | assert(presumed_offset == (uint64_t) (uint32_t) presumed_offset); |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 272 | cmd_writer_patch(cmd, reloc->writer, reloc->pos, |
| 273 | (uint32_t) presumed_offset); |
Chia-I Wu | 343b137 | 2014-08-20 16:39:20 +0800 | [diff] [blame] | 274 | } |
| 275 | |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 276 | cmd_unmap(cmd); |
| 277 | |
Chia-I Wu | 0496670 | 2014-08-20 15:05:03 +0800 | [diff] [blame] | 278 | if (cmd->result != XGL_SUCCESS) |
| 279 | return cmd->result; |
Chia-I Wu | e24c329 | 2014-08-21 14:05:23 +0800 | [diff] [blame] | 280 | |
| 281 | if (intel_winsys_can_submit_bo(winsys, &cmd->batch.bo, 1)) |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 282 | return XGL_SUCCESS; |
| 283 | else |
| 284 | return XGL_ERROR_TOO_MANY_MEMORY_REFERENCES; |
| 285 | } |
| 286 | |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 287 | XGL_RESULT XGLAPI intelCreateCommandBuffer( |
| 288 | XGL_DEVICE device, |
| 289 | const XGL_CMD_BUFFER_CREATE_INFO* pCreateInfo, |
| 290 | XGL_CMD_BUFFER* pCmdBuffer) |
| 291 | { |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 292 | struct intel_dev *dev = intel_dev(device); |
| 293 | |
| 294 | return intel_cmd_create(dev, pCreateInfo, |
| 295 | (struct intel_cmd **) pCmdBuffer); |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 296 | } |
| 297 | |
| 298 | XGL_RESULT XGLAPI intelBeginCommandBuffer( |
| 299 | XGL_CMD_BUFFER cmdBuffer, |
| 300 | XGL_FLAGS flags) |
| 301 | { |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 302 | struct intel_cmd *cmd = intel_cmd(cmdBuffer); |
| 303 | |
| 304 | return intel_cmd_begin(cmd, flags); |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 305 | } |
| 306 | |
| 307 | XGL_RESULT XGLAPI intelEndCommandBuffer( |
| 308 | XGL_CMD_BUFFER cmdBuffer) |
| 309 | { |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 310 | struct intel_cmd *cmd = intel_cmd(cmdBuffer); |
| 311 | |
| 312 | return intel_cmd_end(cmd); |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 313 | } |
| 314 | |
| 315 | XGL_RESULT XGLAPI intelResetCommandBuffer( |
| 316 | XGL_CMD_BUFFER cmdBuffer) |
| 317 | { |
Chia-I Wu | 730e536 | 2014-08-19 12:15:09 +0800 | [diff] [blame] | 318 | struct intel_cmd *cmd = intel_cmd(cmdBuffer); |
| 319 | |
| 320 | cmd_reset(cmd); |
| 321 | |
| 322 | return XGL_SUCCESS; |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 323 | } |
| 324 | |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 325 | XGL_VOID XGLAPI intelCmdPrepareMemoryRegions( |
| 326 | XGL_CMD_BUFFER cmdBuffer, |
| 327 | XGL_UINT transitionCount, |
| 328 | const XGL_MEMORY_STATE_TRANSITION* pStateTransitions) |
| 329 | { |
| 330 | } |
| 331 | |
| 332 | XGL_VOID XGLAPI intelCmdPrepareImages( |
| 333 | XGL_CMD_BUFFER cmdBuffer, |
| 334 | XGL_UINT transitionCount, |
| 335 | const XGL_IMAGE_STATE_TRANSITION* pStateTransitions) |
| 336 | { |
| 337 | } |
| 338 | |
Chia-I Wu | 0914213 | 2014-08-11 15:42:55 +0800 | [diff] [blame] | 339 | XGL_VOID XGLAPI intelCmdCopyMemory( |
| 340 | XGL_CMD_BUFFER cmdBuffer, |
| 341 | XGL_GPU_MEMORY srcMem, |
| 342 | XGL_GPU_MEMORY destMem, |
| 343 | XGL_UINT regionCount, |
| 344 | const XGL_MEMORY_COPY* pRegions) |
| 345 | { |
| 346 | } |
| 347 | |
| 348 | XGL_VOID XGLAPI intelCmdCopyImage( |
| 349 | XGL_CMD_BUFFER cmdBuffer, |
| 350 | XGL_IMAGE srcImage, |
| 351 | XGL_IMAGE destImage, |
| 352 | XGL_UINT regionCount, |
| 353 | const XGL_IMAGE_COPY* pRegions) |
| 354 | { |
| 355 | } |
| 356 | |
| 357 | XGL_VOID XGLAPI intelCmdCopyMemoryToImage( |
| 358 | XGL_CMD_BUFFER cmdBuffer, |
| 359 | XGL_GPU_MEMORY srcMem, |
| 360 | XGL_IMAGE destImage, |
| 361 | XGL_UINT regionCount, |
| 362 | const XGL_MEMORY_IMAGE_COPY* pRegions) |
| 363 | { |
| 364 | } |
| 365 | |
| 366 | XGL_VOID XGLAPI intelCmdCopyImageToMemory( |
| 367 | XGL_CMD_BUFFER cmdBuffer, |
| 368 | XGL_IMAGE srcImage, |
| 369 | XGL_GPU_MEMORY destMem, |
| 370 | XGL_UINT regionCount, |
| 371 | const XGL_MEMORY_IMAGE_COPY* pRegions) |
| 372 | { |
| 373 | } |
| 374 | |
| 375 | XGL_VOID XGLAPI intelCmdCloneImageData( |
| 376 | XGL_CMD_BUFFER cmdBuffer, |
| 377 | XGL_IMAGE srcImage, |
| 378 | XGL_IMAGE_STATE srcImageState, |
| 379 | XGL_IMAGE destImage, |
| 380 | XGL_IMAGE_STATE destImageState) |
| 381 | { |
| 382 | } |
| 383 | |
| 384 | XGL_VOID XGLAPI intelCmdUpdateMemory( |
| 385 | XGL_CMD_BUFFER cmdBuffer, |
| 386 | XGL_GPU_MEMORY destMem, |
| 387 | XGL_GPU_SIZE destOffset, |
| 388 | XGL_GPU_SIZE dataSize, |
| 389 | const XGL_UINT32* pData) |
| 390 | { |
| 391 | } |
| 392 | |
| 393 | XGL_VOID XGLAPI intelCmdFillMemory( |
| 394 | XGL_CMD_BUFFER cmdBuffer, |
| 395 | XGL_GPU_MEMORY destMem, |
| 396 | XGL_GPU_SIZE destOffset, |
| 397 | XGL_GPU_SIZE fillSize, |
| 398 | XGL_UINT32 data) |
| 399 | { |
| 400 | } |
| 401 | |
| 402 | XGL_VOID XGLAPI intelCmdClearColorImage( |
| 403 | XGL_CMD_BUFFER cmdBuffer, |
| 404 | XGL_IMAGE image, |
| 405 | const XGL_FLOAT color[4], |
| 406 | XGL_UINT rangeCount, |
| 407 | const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges) |
| 408 | { |
| 409 | } |
| 410 | |
| 411 | XGL_VOID XGLAPI intelCmdClearColorImageRaw( |
| 412 | XGL_CMD_BUFFER cmdBuffer, |
| 413 | XGL_IMAGE image, |
| 414 | const XGL_UINT32 color[4], |
| 415 | XGL_UINT rangeCount, |
| 416 | const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges) |
| 417 | { |
| 418 | } |
| 419 | |
| 420 | XGL_VOID XGLAPI intelCmdClearDepthStencil( |
| 421 | XGL_CMD_BUFFER cmdBuffer, |
| 422 | XGL_IMAGE image, |
| 423 | XGL_FLOAT depth, |
| 424 | XGL_UINT32 stencil, |
| 425 | XGL_UINT rangeCount, |
| 426 | const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges) |
| 427 | { |
| 428 | } |
| 429 | |
| 430 | XGL_VOID XGLAPI intelCmdResolveImage( |
| 431 | XGL_CMD_BUFFER cmdBuffer, |
| 432 | XGL_IMAGE srcImage, |
| 433 | XGL_IMAGE destImage, |
| 434 | XGL_UINT rectCount, |
| 435 | const XGL_IMAGE_RESOLVE* pRects) |
| 436 | { |
| 437 | } |
| 438 | |
| 439 | XGL_VOID XGLAPI intelCmdSetEvent( |
| 440 | XGL_CMD_BUFFER cmdBuffer, |
| 441 | XGL_EVENT event) |
| 442 | { |
| 443 | } |
| 444 | |
| 445 | XGL_VOID XGLAPI intelCmdResetEvent( |
| 446 | XGL_CMD_BUFFER cmdBuffer, |
| 447 | XGL_EVENT event) |
| 448 | { |
| 449 | } |
| 450 | |
| 451 | XGL_VOID XGLAPI intelCmdMemoryAtomic( |
| 452 | XGL_CMD_BUFFER cmdBuffer, |
| 453 | XGL_GPU_MEMORY destMem, |
| 454 | XGL_GPU_SIZE destOffset, |
| 455 | XGL_UINT64 srcData, |
| 456 | XGL_ATOMIC_OP atomicOp) |
| 457 | { |
| 458 | } |
| 459 | |
| 460 | XGL_VOID XGLAPI intelCmdBeginQuery( |
| 461 | XGL_CMD_BUFFER cmdBuffer, |
| 462 | XGL_QUERY_POOL queryPool, |
| 463 | XGL_UINT slot, |
| 464 | XGL_FLAGS flags) |
| 465 | { |
| 466 | } |
| 467 | |
| 468 | XGL_VOID XGLAPI intelCmdEndQuery( |
| 469 | XGL_CMD_BUFFER cmdBuffer, |
| 470 | XGL_QUERY_POOL queryPool, |
| 471 | XGL_UINT slot) |
| 472 | { |
| 473 | } |
| 474 | |
| 475 | XGL_VOID XGLAPI intelCmdResetQueryPool( |
| 476 | XGL_CMD_BUFFER cmdBuffer, |
| 477 | XGL_QUERY_POOL queryPool, |
| 478 | XGL_UINT startQuery, |
| 479 | XGL_UINT queryCount) |
| 480 | { |
| 481 | } |
| 482 | |
| 483 | XGL_VOID XGLAPI intelCmdWriteTimestamp( |
| 484 | XGL_CMD_BUFFER cmdBuffer, |
| 485 | XGL_TIMESTAMP_TYPE timestampType, |
| 486 | XGL_GPU_MEMORY destMem, |
| 487 | XGL_GPU_SIZE destOffset) |
| 488 | { |
| 489 | } |
| 490 | |
| 491 | XGL_VOID XGLAPI intelCmdInitAtomicCounters( |
| 492 | XGL_CMD_BUFFER cmdBuffer, |
| 493 | XGL_PIPELINE_BIND_POINT pipelineBindPoint, |
| 494 | XGL_UINT startCounter, |
| 495 | XGL_UINT counterCount, |
| 496 | const XGL_UINT32* pData) |
| 497 | { |
| 498 | } |
| 499 | |
| 500 | XGL_VOID XGLAPI intelCmdLoadAtomicCounters( |
| 501 | XGL_CMD_BUFFER cmdBuffer, |
| 502 | XGL_PIPELINE_BIND_POINT pipelineBindPoint, |
| 503 | XGL_UINT startCounter, |
| 504 | XGL_UINT counterCount, |
| 505 | XGL_GPU_MEMORY srcMem, |
| 506 | XGL_GPU_SIZE srcOffset) |
| 507 | { |
| 508 | } |
| 509 | |
| 510 | XGL_VOID XGLAPI intelCmdSaveAtomicCounters( |
| 511 | XGL_CMD_BUFFER cmdBuffer, |
| 512 | XGL_PIPELINE_BIND_POINT pipelineBindPoint, |
| 513 | XGL_UINT startCounter, |
| 514 | XGL_UINT counterCount, |
| 515 | XGL_GPU_MEMORY destMem, |
| 516 | XGL_GPU_SIZE destOffset) |
| 517 | { |
| 518 | } |
| 519 | |
| 520 | XGL_VOID XGLAPI intelCmdDbgMarkerBegin( |
| 521 | XGL_CMD_BUFFER cmdBuffer, |
| 522 | const XGL_CHAR* pMarker) |
| 523 | { |
| 524 | } |
| 525 | |
| 526 | XGL_VOID XGLAPI intelCmdDbgMarkerEnd( |
| 527 | XGL_CMD_BUFFER cmdBuffer) |
| 528 | { |
| 529 | } |