blob: 505395fc9b31521fc7dc424750493c74a3b52f98 [file] [log] [blame]
Chia-I Wu214dac62014-08-05 11:07:40 +08001/*
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -06002 * Vulkan
Chia-I Wu214dac62014-08-05 11:07:40 +08003 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wu214dac62014-08-05 11:07:40 +080026 */
27
28#include <stdio.h>
29#include <sys/types.h>
30#include <sys/stat.h>
31#include <fcntl.h>
32#include <unistd.h>
33
34#include "genhw/genhw.h"
Chia-I Wud8965932014-10-13 13:32:37 +080035#include "kmd/winsys.h"
Chia-I Wuec841722014-08-25 22:36:01 +080036#include "queue.h"
Chia-I Wu214dac62014-08-05 11:07:40 +080037#include "gpu.h"
Chia-I Wu032a2e32015-01-19 11:14:00 +080038#include "instance.h"
Chia-I Wu41858c82015-04-04 16:39:25 +080039#include "wsi.h"
Courtney Goeltzenleuchter1c7c65d2015-06-10 17:39:03 -060040#include "vk_debug_report_lunarg.h"
41#include "vk_debug_marker_lunarg.h"
Chia-I Wu1db76e02014-09-15 14:21:14 +080042
Chia-I Wuf07865e2014-09-15 13:52:21 +080043static int gpu_open_primary_node(struct intel_gpu *gpu)
44{
Chia-I Wu41858c82015-04-04 16:39:25 +080045 if (gpu->primary_fd_internal < 0)
46 gpu->primary_fd_internal = open(gpu->primary_node, O_RDWR);
47
Chia-I Wuf07865e2014-09-15 13:52:21 +080048 return gpu->primary_fd_internal;
49}
50
51static void gpu_close_primary_node(struct intel_gpu *gpu)
52{
Chia-I Wu41858c82015-04-04 16:39:25 +080053 if (gpu->primary_fd_internal >= 0) {
54 close(gpu->primary_fd_internal);
Chia-I Wuf07865e2014-09-15 13:52:21 +080055 gpu->primary_fd_internal = -1;
Chia-I Wu41858c82015-04-04 16:39:25 +080056 }
Chia-I Wuf07865e2014-09-15 13:52:21 +080057}
58
59static int gpu_open_render_node(struct intel_gpu *gpu)
60{
61 if (gpu->render_fd_internal < 0 && gpu->render_node) {
62 gpu->render_fd_internal = open(gpu->render_node, O_RDWR);
63 if (gpu->render_fd_internal < 0) {
Courtney Goeltzenleuchter1c7c65d2015-06-10 17:39:03 -060064 intel_log(gpu, VK_DBG_REPORT_ERROR_BIT, 0, VK_NULL_HANDLE, 0,
Chia-I Wuf07865e2014-09-15 13:52:21 +080065 0, "failed to open %s", gpu->render_node);
66 }
67 }
68
69 return gpu->render_fd_internal;
70}
71
72static void gpu_close_render_node(struct intel_gpu *gpu)
73{
74 if (gpu->render_fd_internal >= 0) {
75 close(gpu->render_fd_internal);
76 gpu->render_fd_internal = -1;
77 }
78}
79
Chia-I Wu214dac62014-08-05 11:07:40 +080080static const char *gpu_get_name(const struct intel_gpu *gpu)
81{
82 const char *name = NULL;
83
84 if (gen_is_hsw(gpu->devid)) {
85 if (gen_is_desktop(gpu->devid))
86 name = "Intel(R) Haswell Desktop";
87 else if (gen_is_mobile(gpu->devid))
88 name = "Intel(R) Haswell Mobile";
89 else if (gen_is_server(gpu->devid))
90 name = "Intel(R) Haswell Server";
91 }
92 else if (gen_is_ivb(gpu->devid)) {
93 if (gen_is_desktop(gpu->devid))
94 name = "Intel(R) Ivybridge Desktop";
95 else if (gen_is_mobile(gpu->devid))
96 name = "Intel(R) Ivybridge Mobile";
97 else if (gen_is_server(gpu->devid))
98 name = "Intel(R) Ivybridge Server";
99 }
100 else if (gen_is_snb(gpu->devid)) {
101 if (gen_is_desktop(gpu->devid))
102 name = "Intel(R) Sandybridge Desktop";
103 else if (gen_is_mobile(gpu->devid))
104 name = "Intel(R) Sandybridge Mobile";
105 else if (gen_is_server(gpu->devid))
106 name = "Intel(R) Sandybridge Server";
107 }
108
109 if (!name)
110 name = "Unknown Intel Chipset";
111
112 return name;
113}
114
Chia-I Wud71ff552015-02-20 12:50:12 -0700115void intel_gpu_destroy(struct intel_gpu *gpu)
Chia-I Wu214dac62014-08-05 11:07:40 +0800116{
Chia-I Wu8635e912015-04-09 14:13:57 +0800117 intel_wsi_gpu_cleanup(gpu);
Chia-I Wud71ff552015-02-20 12:50:12 -0700118
Chia-I Wu41858c82015-04-04 16:39:25 +0800119 intel_gpu_cleanup_winsys(gpu);
Chia-I Wud71ff552015-02-20 12:50:12 -0700120
Chia-I Wuf9c81ef2015-02-22 13:49:15 +0800121 intel_free(gpu, gpu->primary_node);
122 intel_free(gpu, gpu);
Chia-I Wud71ff552015-02-20 12:50:12 -0700123}
124
125static int devid_to_gen(int devid)
126{
127 int gen;
128
129 if (gen_is_hsw(devid))
130 gen = INTEL_GEN(7.5);
131 else if (gen_is_ivb(devid))
132 gen = INTEL_GEN(7);
133 else if (gen_is_snb(devid))
134 gen = INTEL_GEN(6);
135 else
136 gen = -1;
137
138#ifdef INTEL_GEN_SPECIALIZED
139 if (gen != INTEL_GEN(INTEL_GEN_SPECIALIZED))
140 gen = -1;
141#endif
142
143 return gen;
144}
145
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600146VkResult intel_gpu_create(const struct intel_instance *instance, int devid,
Chia-I Wud71ff552015-02-20 12:50:12 -0700147 const char *primary_node, const char *render_node,
148 struct intel_gpu **gpu_ret)
149{
150 const int gen = devid_to_gen(devid);
Chia-I Wuf07865e2014-09-15 13:52:21 +0800151 size_t primary_len, render_len;
Chia-I Wud71ff552015-02-20 12:50:12 -0700152 struct intel_gpu *gpu;
153
154 if (gen < 0) {
Courtney Goeltzenleuchter1c7c65d2015-06-10 17:39:03 -0600155 intel_log(instance, VK_DBG_REPORT_WARN_BIT, 0,
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600156 VK_NULL_HANDLE, 0, 0, "unsupported device id 0x%04x", devid);
157 return VK_ERROR_INITIALIZATION_FAILED;
Chia-I Wud71ff552015-02-20 12:50:12 -0700158 }
Chia-I Wu214dac62014-08-05 11:07:40 +0800159
Tony Barbour8205d902015-04-16 15:59:00 -0600160 gpu = intel_alloc(instance, sizeof(*gpu), 0, VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
Chia-I Wu214dac62014-08-05 11:07:40 +0800161 if (!gpu)
Tony Barbour8205d902015-04-16 15:59:00 -0600162 return VK_ERROR_OUT_OF_HOST_MEMORY;
Chia-I Wu214dac62014-08-05 11:07:40 +0800163
164 memset(gpu, 0, sizeof(*gpu));
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600165 /* there is no VK_DBG_OBJECT_GPU */
Courtney Goeltzenleuchter9ecf6852015-06-09 08:22:48 -0600166 intel_handle_init(&gpu->handle, VK_OBJECT_TYPE_PHYSICAL_DEVICE, instance);
Chia-I Wu214dac62014-08-05 11:07:40 +0800167
Chia-I Wu214dac62014-08-05 11:07:40 +0800168 gpu->devid = devid;
169
Chia-I Wuf07865e2014-09-15 13:52:21 +0800170 primary_len = strlen(primary_node);
171 render_len = (render_node) ? strlen(render_node) : 0;
172
Chia-I Wuf9c81ef2015-02-22 13:49:15 +0800173 gpu->primary_node = intel_alloc(gpu, primary_len + 1 +
Tony Barbour8205d902015-04-16 15:59:00 -0600174 ((render_len) ? (render_len + 1) : 0), 0, VK_SYSTEM_ALLOC_TYPE_INTERNAL);
Chia-I Wuf07865e2014-09-15 13:52:21 +0800175 if (!gpu->primary_node) {
Chia-I Wuf9c81ef2015-02-22 13:49:15 +0800176 intel_free(instance, gpu);
Tony Barbour8205d902015-04-16 15:59:00 -0600177 return VK_ERROR_OUT_OF_HOST_MEMORY;
Chia-I Wu214dac62014-08-05 11:07:40 +0800178 }
Chia-I Wuf07865e2014-09-15 13:52:21 +0800179
180 memcpy(gpu->primary_node, primary_node, primary_len + 1);
181
182 if (render_node) {
183 gpu->render_node = gpu->primary_node + primary_len + 1;
184 memcpy(gpu->render_node, render_node, render_len + 1);
BogDan Vatra80f80612015-04-30 19:28:26 +0300185 } else {
186 gpu->render_node = gpu->primary_node;
Chia-I Wuf07865e2014-09-15 13:52:21 +0800187 }
Chia-I Wu214dac62014-08-05 11:07:40 +0800188
189 gpu->gen_opaque = gen;
190
Chia-I Wu960f1952014-08-28 23:27:10 +0800191 switch (intel_gpu_gen(gpu)) {
192 case INTEL_GEN(7.5):
193 gpu->gt = gen_get_hsw_gt(devid);
194 break;
195 case INTEL_GEN(7):
196 gpu->gt = gen_get_ivb_gt(devid);
197 break;
198 case INTEL_GEN(6):
199 gpu->gt = gen_get_snb_gt(devid);
200 break;
201 }
202
Mike Stroyan9fca7122015-02-09 13:08:26 -0700203 /* 150K dwords */
204 gpu->max_batch_buffer_size = sizeof(uint32_t) * 150*1024;
Chia-I Wud6109bb2014-08-21 09:12:19 +0800205
206 /* the winsys is prepared for one reloc every two dwords, then minus 2 */
207 gpu->batch_buffer_reloc_count =
208 gpu->max_batch_buffer_size / sizeof(uint32_t) / 2 - 2;
Chia-I Wu214dac62014-08-05 11:07:40 +0800209
Chia-I Wuf07865e2014-09-15 13:52:21 +0800210 gpu->primary_fd_internal = -1;
211 gpu->render_fd_internal = -1;
212
Chia-I Wu214dac62014-08-05 11:07:40 +0800213 *gpu_ret = gpu;
214
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600215 return VK_SUCCESS;
Chia-I Wu214dac62014-08-05 11:07:40 +0800216}
217
Chia-I Wu214dac62014-08-05 11:07:40 +0800218void intel_gpu_get_props(const struct intel_gpu *gpu,
Tony Barbour8205d902015-04-16 15:59:00 -0600219 VkPhysicalDeviceProperties *props)
Chia-I Wu214dac62014-08-05 11:07:40 +0800220{
221 const char *name;
222 size_t name_len;
223
Chia-I Wu214dac62014-08-05 11:07:40 +0800224 props->apiVersion = INTEL_API_VERSION;
225 props->driverVersion = INTEL_DRIVER_VERSION;
226
227 props->vendorId = 0x8086;
228 props->deviceId = gpu->devid;
229
Tony Barbour8205d902015-04-16 15:59:00 -0600230 props->deviceType = VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU;
Chia-I Wu214dac62014-08-05 11:07:40 +0800231
232 /* copy GPU name */
233 name = gpu_get_name(gpu);
234 name_len = strlen(name);
Tony Barbour8205d902015-04-16 15:59:00 -0600235 if (name_len > sizeof(props->deviceName) - 1)
236 name_len = sizeof(props->deviceName) - 1;
237 memcpy(props->deviceName, name, name_len);
238 props->deviceName[name_len] = '\0';
Chia-I Wu214dac62014-08-05 11:07:40 +0800239
Chia-I Wu214dac62014-08-05 11:07:40 +0800240 props->maxBoundDescriptorSets = 1;
241 props->maxThreadGroupSize = 512;
242
243 /* incremented every 80ns */
244 props->timestampFrequency = 1000 * 1000 * 1000 / 80;
245
246 props->multiColorAttachmentClears = false;
Chris Forbescbdbcff2015-05-06 09:01:36 +1200247
248 /* hardware is limited to 16 viewports */
249 props->maxViewports = INTEL_MAX_VIEWPORTS;
250
251 props->maxColorAttachments = INTEL_MAX_RENDER_TARGETS;
252
253 /* ? */
254 props->maxDescriptorSets = 2;
Chia-I Wu214dac62014-08-05 11:07:40 +0800255}
256
257void intel_gpu_get_perf(const struct intel_gpu *gpu,
Tony Barbour8205d902015-04-16 15:59:00 -0600258 VkPhysicalDevicePerformance *perf)
Chia-I Wu214dac62014-08-05 11:07:40 +0800259{
260 /* TODO */
Tony Barbour8205d902015-04-16 15:59:00 -0600261 perf->maxDeviceClock = 1.0f;
Chia-I Wu214dac62014-08-05 11:07:40 +0800262 perf->aluPerClock = 1.0f;
263 perf->texPerClock = 1.0f;
264 perf->primsPerClock = 1.0f;
265 perf->pixelsPerClock = 1.0f;
266}
267
268void intel_gpu_get_queue_props(const struct intel_gpu *gpu,
269 enum intel_gpu_engine_type engine,
Tony Barbour8205d902015-04-16 15:59:00 -0600270 VkPhysicalDeviceQueueProperties *props)
Chia-I Wu214dac62014-08-05 11:07:40 +0800271{
Chia-I Wu214dac62014-08-05 11:07:40 +0800272 switch (engine) {
273 case INTEL_GPU_ENGINE_3D:
Mark Lobodzinskifb9f5642015-05-11 17:21:15 -0500274 props->queueFlags = VK_QUEUE_GRAPHICS_BIT | VK_QUEUE_COMPUTE_BIT;
Chia-I Wu214dac62014-08-05 11:07:40 +0800275 props->queueCount = 1;
Chia-I Wuec841722014-08-25 22:36:01 +0800276 props->maxAtomicCounters = INTEL_QUEUE_ATOMIC_COUNTER_COUNT;
Chia-I Wu214dac62014-08-05 11:07:40 +0800277 props->supportsTimestamps = true;
278 break;
279 default:
280 assert(!"unknown engine type");
281 return;
282 }
283}
284
285void intel_gpu_get_memory_props(const struct intel_gpu *gpu,
Tony Barbour8205d902015-04-16 15:59:00 -0600286 VkPhysicalDeviceMemoryProperties *props)
Chia-I Wu214dac62014-08-05 11:07:40 +0800287{
Mark Lobodzinski72346292015-07-02 16:49:40 -0600288 memset(props, 0, sizeof(VkPhysicalDeviceMemoryProperties));
289 props->memoryTypeCount = INTEL_MEMORY_TYPE_COUNT;
290 props->memoryHeapCount = INTEL_MEMORY_HEAP_COUNT;
291
292 // For now, Intel will support one memory type
293 for (uint32_t i = 0; i < props->memoryTypeCount; i++) {
294 assert(props->memoryTypeCount == 1);
295 props->memoryTypes[i].propertyFlags = INTEL_MEMORY_PROPERTY_ALL;
296 props->memoryTypes[i].heapIndex = i;
297 }
298
299 // For now, Intel will support a single heap with all available memory
300 for (uint32_t i = 0; i < props->memoryHeapCount; i++) {
301 assert(props->memoryHeapCount == 1);
302 props->memoryHeaps[0].size = INTEL_MEMORY_HEAP_SIZE;
303 }
Chia-I Wu214dac62014-08-05 11:07:40 +0800304}
305
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800306int intel_gpu_get_max_threads(const struct intel_gpu *gpu,
Tony Barbour8205d902015-04-16 15:59:00 -0600307 VkShaderStage stage)
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800308{
309 switch (intel_gpu_gen(gpu)) {
310 case INTEL_GEN(7.5):
311 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600312 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800313 return (gpu->gt >= 2) ? 280 : 70;
Cody Northrop293d4502015-05-05 09:38:03 -0600314 case VK_SHADER_STAGE_GEOMETRY:
315 /* values from ilo_gpe_init_gs_cso_gen7 */
316 return (gpu->gt >= 2) ? 256 : 70;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600317 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800318 return (gpu->gt == 3) ? 408 :
319 (gpu->gt == 2) ? 204 : 102;
320 default:
321 break;
322 }
323 break;
324 case INTEL_GEN(7):
325 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600326 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800327 return (gpu->gt == 2) ? 128 : 36;
Cody Northrop293d4502015-05-05 09:38:03 -0600328 case VK_SHADER_STAGE_GEOMETRY:
329 /* values from ilo_gpe_init_gs_cso_gen7 */
330 return (gpu->gt == 2) ? 128 : 36;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600331 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800332 return (gpu->gt == 2) ? 172 : 48;
333 default:
334 break;
335 }
336 break;
337 case INTEL_GEN(6):
338 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600339 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800340 return (gpu->gt == 2) ? 60 : 24;
Cody Northrop293d4502015-05-05 09:38:03 -0600341 case VK_SHADER_STAGE_GEOMETRY:
342 /* values from ilo_gpe_init_gs_cso_gen6 */
343 return (gpu->gt == 2) ? 28 : 21;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600344 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800345 return (gpu->gt == 2) ? 80 : 40;
346 default:
347 break;
348 }
349 break;
350 default:
351 break;
352 }
353
Courtney Goeltzenleuchter1c7c65d2015-06-10 17:39:03 -0600354 intel_log(gpu, VK_DBG_REPORT_ERROR_BIT, 0, VK_NULL_HANDLE,
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800355 0, 0, "unknown Gen or shader stage");
356
357 switch (stage) {
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600358 case VK_SHADER_STAGE_VERTEX:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800359 return 1;
Cody Northrop293d4502015-05-05 09:38:03 -0600360 case VK_SHADER_STAGE_GEOMETRY:
361 return 1;
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600362 case VK_SHADER_STAGE_FRAGMENT:
Chia-I Wu3f4bd102014-12-19 13:14:42 +0800363 return 4;
364 default:
365 return 1;
366 }
367}
368
Chia-I Wu41858c82015-04-04 16:39:25 +0800369int intel_gpu_get_primary_fd(struct intel_gpu *gpu)
Chia-I Wu1db76e02014-09-15 14:21:14 +0800370{
Chia-I Wu41858c82015-04-04 16:39:25 +0800371 return gpu_open_primary_node(gpu);
Chia-I Wu1db76e02014-09-15 14:21:14 +0800372}
373
Courtney Goeltzenleuchter382489d2015-04-10 08:34:15 -0600374VkResult intel_gpu_init_winsys(struct intel_gpu *gpu)
Chia-I Wu214dac62014-08-05 11:07:40 +0800375{
Chia-I Wud8965932014-10-13 13:32:37 +0800376 int fd;
Chia-I Wu214dac62014-08-05 11:07:40 +0800377
Chia-I Wud8965932014-10-13 13:32:37 +0800378 assert(!gpu->winsys);
379
Chia-I Wu41858c82015-04-04 16:39:25 +0800380 fd = gpu_open_render_node(gpu);
Chia-I Wud8965932014-10-13 13:32:37 +0800381 if (fd < 0)
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600382 return VK_ERROR_UNKNOWN;
Chia-I Wud8965932014-10-13 13:32:37 +0800383
Courtney Goeltzenleuchter9ecf6852015-06-09 08:22:48 -0600384 gpu->winsys = intel_winsys_create_for_fd(gpu->handle.instance->icd, fd);
Chia-I Wud8965932014-10-13 13:32:37 +0800385 if (!gpu->winsys) {
Courtney Goeltzenleuchter1c7c65d2015-06-10 17:39:03 -0600386 intel_log(gpu, VK_DBG_REPORT_ERROR_BIT, 0,
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600387 VK_NULL_HANDLE, 0, 0, "failed to create GPU winsys");
Chia-I Wu41858c82015-04-04 16:39:25 +0800388 gpu_close_render_node(gpu);
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600389 return VK_ERROR_UNKNOWN;
Chia-I Wud8965932014-10-13 13:32:37 +0800390 }
391
Courtney Goeltzenleuchter9cc421e2015-04-08 15:36:08 -0600392 return VK_SUCCESS;
Chia-I Wu214dac62014-08-05 11:07:40 +0800393}
394
Chia-I Wu41858c82015-04-04 16:39:25 +0800395void intel_gpu_cleanup_winsys(struct intel_gpu *gpu)
Chia-I Wu214dac62014-08-05 11:07:40 +0800396{
Chia-I Wud8965932014-10-13 13:32:37 +0800397 if (gpu->winsys) {
398 intel_winsys_destroy(gpu->winsys);
399 gpu->winsys = NULL;
400 }
401
Chia-I Wuf07865e2014-09-15 13:52:21 +0800402 gpu_close_primary_node(gpu);
403 gpu_close_render_node(gpu);
Chia-I Wu214dac62014-08-05 11:07:40 +0800404}
405
Courtney Goeltzenleuchter95b73722015-06-08 18:08:35 -0600406enum intel_phy_dev_ext_type intel_gpu_lookup_phy_dev_extension(
407 const struct intel_gpu *gpu,
408 const VkExtensionProperties *ext)
Chia-I Wu214dac62014-08-05 11:07:40 +0800409{
Courtney Goeltzenleuchter95b73722015-06-08 18:08:35 -0600410 enum intel_phy_dev_ext_type type;
Chia-I Wu1db76e02014-09-15 14:21:14 +0800411
Courtney Goeltzenleuchter95b73722015-06-08 18:08:35 -0600412 for (type = 0; type < ARRAY_SIZE(intel_phy_dev_gpu_exts); type++) {
413 if (compare_vk_extension_properties(&intel_phy_dev_gpu_exts[type], ext))
Chia-I Wu1db76e02014-09-15 14:21:14 +0800414 break;
415 }
416
Courtney Goeltzenleuchter95b73722015-06-08 18:08:35 -0600417 assert(type < INTEL_PHY_DEV_EXT_COUNT || type == INTEL_PHY_DEV_EXT_INVALID);
Chia-I Wu1db76e02014-09-15 14:21:14 +0800418
419 return type;
Chia-I Wu214dac62014-08-05 11:07:40 +0800420}
Chia-I Wubec90a02014-08-06 12:33:03 +0800421
Tony Barbour426b9052015-06-24 16:06:58 -0600422ICD_EXPORT VkResult VKAPI vkGetPhysicalDeviceProperties(
423 VkPhysicalDevice gpu_,
424 VkPhysicalDeviceProperties* pProperties)
Chia-I Wubec90a02014-08-06 12:33:03 +0800425{
Chia-I Wu41858c82015-04-04 16:39:25 +0800426 struct intel_gpu *gpu = intel_gpu(gpu_);
Chia-I Wubec90a02014-08-06 12:33:03 +0800427
Tony Barbour426b9052015-06-24 16:06:58 -0600428 intel_gpu_get_props(gpu, pProperties);
429 return VK_SUCCESS;
430}
Chia-I Wubec90a02014-08-06 12:33:03 +0800431
Tony Barbour426b9052015-06-24 16:06:58 -0600432ICD_EXPORT VkResult VKAPI vkGetPhysicalDevicePerformance(
433 VkPhysicalDevice gpu_,
434 VkPhysicalDevicePerformance* pPerformance)
435{
436 struct intel_gpu *gpu = intel_gpu(gpu_);
Chia-I Wubec90a02014-08-06 12:33:03 +0800437
Tony Barbour426b9052015-06-24 16:06:58 -0600438 intel_gpu_get_perf(gpu, pPerformance);
Chia-I Wubec90a02014-08-06 12:33:03 +0800439
Tony Barbour426b9052015-06-24 16:06:58 -0600440 return VK_SUCCESS;
441}
Chia-I Wubec90a02014-08-06 12:33:03 +0800442
Tony Barbour426b9052015-06-24 16:06:58 -0600443ICD_EXPORT VkResult VKAPI vkGetPhysicalDeviceQueueCount(
444 VkPhysicalDevice gpu_,
445 uint32_t* pCount)
446{
447 *pCount = INTEL_GPU_ENGINE_COUNT;
Chia-I Wubec90a02014-08-06 12:33:03 +0800448
Tony Barbour426b9052015-06-24 16:06:58 -0600449 return VK_SUCCESS;
450}
Chia-I Wubec90a02014-08-06 12:33:03 +0800451
Tony Barbour426b9052015-06-24 16:06:58 -0600452ICD_EXPORT VkResult VKAPI vkGetPhysicalDeviceQueueProperties(
453 VkPhysicalDevice gpu_,
454 uint32_t count,
455 VkPhysicalDeviceQueueProperties* pProperties)
456{
457 struct intel_gpu *gpu = intel_gpu(gpu_);
458 int engine;
459
460 if (count > INTEL_GPU_ENGINE_COUNT)
461 return VK_ERROR_INVALID_VALUE;
462
463 for (engine = 0; engine < count; engine++) {
464 intel_gpu_get_queue_props(gpu, engine, pProperties);
465 pProperties++;
466 }
467 return VK_SUCCESS;
468}
469
470ICD_EXPORT VkResult VKAPI vkGetPhysicalDeviceMemoryProperties(
471 VkPhysicalDevice gpu_,
472 VkPhysicalDeviceMemoryProperties* pProperties)
473{
474 struct intel_gpu *gpu = intel_gpu(gpu_);
475
476 intel_gpu_get_memory_props(gpu, pProperties);
477 return VK_SUCCESS;
Chia-I Wubec90a02014-08-06 12:33:03 +0800478}
479
Chris Forbesd7576302015-06-21 22:55:02 +1200480ICD_EXPORT VkResult VKAPI vkGetPhysicalDeviceFeatures(
481 VkPhysicalDevice physicalDevice,
482 VkPhysicalDeviceFeatures* pFeatures)
483{
484 VkResult ret = VK_SUCCESS;
485
486 /* TODO: fill out features */
487 memset(pFeatures, 0, sizeof(*pFeatures));
488
489 return ret;
490}
491
492ICD_EXPORT VkResult VKAPI vkGetPhysicalDeviceLimits(
493 VkPhysicalDevice physicalDevice,
494 VkPhysicalDeviceLimits* pLimits)
495{
496 VkResult ret = VK_SUCCESS;
497
498 /* TODO: fill out limits */
499 memset(pLimits, 0, sizeof(*pLimits));
500
501 return ret;
502}
503
Tony Barbour426b9052015-06-24 16:06:58 -0600504ICD_EXPORT VkResult VKAPI vkGetPhysicalDeviceExtensionCount(
Tony Barbour8205d902015-04-16 15:59:00 -0600505 VkPhysicalDevice gpu,
Tony Barbour426b9052015-06-24 16:06:58 -0600506 uint32_t* pCount)
Chia-I Wubec90a02014-08-06 12:33:03 +0800507{
Tony Barbour426b9052015-06-24 16:06:58 -0600508 *pCount = INTEL_PHY_DEV_EXT_COUNT;
509 return VK_SUCCESS;
510}
Chia-I Wubec90a02014-08-06 12:33:03 +0800511
Tony Barbour426b9052015-06-24 16:06:58 -0600512ICD_EXPORT VkResult VKAPI vkGetPhysicalDeviceExtensionProperties(
513 VkPhysicalDevice gpu,
514 uint32_t extensionIndex,
515 VkExtensionProperties* pProperties)
516{
517 if (extensionIndex >= INTEL_PHY_DEV_EXT_COUNT)
518 return VK_ERROR_INVALID_VALUE;
Tobin Ehlis0ef6ec52015-04-16 12:51:37 -0600519
Tony Barbour426b9052015-06-24 16:06:58 -0600520 memcpy(pProperties, &intel_phy_dev_gpu_exts[extensionIndex], sizeof(VkExtensionProperties));
Tobin Ehlis0ef6ec52015-04-16 12:51:37 -0600521 return VK_SUCCESS;
Chia-I Wubec90a02014-08-06 12:33:03 +0800522}