blob: 6be198fb432d349d890958ecddd58afaed7d150c [file] [log] [blame]
Chia-I Wu82f50aa2014-08-05 10:43:03 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wu82f50aa2014-08-05 10:43:03 +080026 */
27
Chia-I Wude2bb862014-08-19 14:32:47 +080028#include "dispatch.h"
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -060029#include "dev.h"
Chia-I Wu9e61c0d2014-09-15 15:12:06 +080030#include "gpu.h"
31#include "mem.h"
Chia-I Wu82f50aa2014-08-05 10:43:03 +080032#include "obj.h"
33
34/**
35 * Return true if an (not so) arbitrary pointer casted to intel_base points to
36 * a valid intel_base. This assumes at least the first sizeof(void*) bytes of
37 * the address are accessible, and they does not happen to be our magic
38 * values.
39 */
40bool intel_base_is_valid(const struct intel_base *base)
41{
Chia-I Wu6a42c2a2014-08-19 14:36:47 +080042 if (base->dispatch != intel_dispatch_get(true) &&
43 base->dispatch != intel_dispatch_get(false))
Chia-I Wu82f50aa2014-08-05 10:43:03 +080044 return false;
45
46 return !intel_gpu_is_valid((const struct intel_gpu *) base);
47}
48
Chia-I Wu26f0bd02014-08-07 10:38:40 +080049XGL_RESULT intel_base_get_info(struct intel_base *base, int type,
50 XGL_SIZE *size, XGL_VOID *data)
51{
52 XGL_RESULT ret = XGL_SUCCESS;
53 XGL_SIZE s;
54
55 switch (type) {
56 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
57 s = sizeof(XGL_MEMORY_REQUIREMENTS);
58 memset(data, 0, s);
59 *size = s;
60 break;
61 default:
62 ret = XGL_ERROR_INVALID_VALUE;
63 break;
64 }
65
66 return ret;
67}
68
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080069static bool base_dbg_copy_create_info(struct intel_base_dbg *dbg,
70 const void *create_info)
71{
72 const union {
73 const void *ptr;
74 const struct {
75 XGL_STRUCTURE_TYPE struct_type;
76 XGL_VOID *next;
77 } *header;
78 } info = { .ptr = create_info };
79 XGL_SIZE shallow_copy = 0;
80
81 if (!create_info)
82 return true;
83
Chia-I Wub1076d72014-08-18 16:10:20 +080084 switch (dbg->type) {
85 case XGL_DBG_OBJECT_DEVICE:
86 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080087 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080088 case XGL_DBG_OBJECT_GPU_MEMORY:
89 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_MEMORY_ALLOC_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080090 shallow_copy = sizeof(XGL_MEMORY_ALLOC_INFO);
91 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080092 case XGL_DBG_OBJECT_EVENT:
93 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_EVENT_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080094 shallow_copy = sizeof(XGL_EVENT_CREATE_INFO);
95 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080096 case XGL_DBG_OBJECT_FENCE:
97 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_FENCE_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080098 shallow_copy = sizeof(XGL_FENCE_CREATE_INFO);
99 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800100 case XGL_DBG_OBJECT_QUERY_POOL:
101 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO);
Courtney Goeltzenleuchter850d12c2014-08-07 18:13:10 -0600102 shallow_copy = sizeof(XGL_QUERY_POOL_CREATE_INFO);
103 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800104 case XGL_DBG_OBJECT_IMAGE:
105 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
Chia-I Wufeb441f2014-08-08 21:27:38 +0800106 shallow_copy = sizeof(XGL_IMAGE_CREATE_INFO);
107 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800108 case XGL_DBG_OBJECT_IMAGE_VIEW:
109 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800110 shallow_copy = sizeof(XGL_IMAGE_VIEW_CREATE_INFO);
111 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800112 case XGL_DBG_OBJECT_COLOR_TARGET_VIEW:
113 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_COLOR_ATTACHMENT_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800114 shallow_copy = sizeof(XGL_COLOR_ATTACHMENT_VIEW_CREATE_INFO);
115 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800116 case XGL_DBG_OBJECT_DEPTH_STENCIL_VIEW:
117 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEPTH_STENCIL_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800118 shallow_copy = sizeof(XGL_DEPTH_STENCIL_VIEW_CREATE_INFO);
119 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800120 case XGL_DBG_OBJECT_SAMPLER:
121 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
Chia-I Wu28b89962014-08-18 14:40:49 +0800122 shallow_copy = sizeof(XGL_SAMPLER_CREATE_INFO);
123 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800124 case XGL_DBG_OBJECT_DESCRIPTOR_SET:
125 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DESCRIPTOR_SET_CREATE_INFO);
Chia-I Wub8d04c82014-08-18 15:51:10 +0800126 shallow_copy = sizeof(XGL_DESCRIPTOR_SET_CREATE_INFO);
127 break;
Chia-I Wua5714e82014-08-11 15:33:42 +0800128 case XGL_DBG_OBJECT_VIEWPORT_STATE:
129 /* no struct header! */
130 shallow_copy = sizeof(XGL_VIEWPORT_STATE_CREATE_INFO);
131 break;
132 case XGL_DBG_OBJECT_RASTER_STATE:
133 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_RASTER_STATE_CREATE_INFO);
134 shallow_copy = sizeof(XGL_RASTER_STATE_CREATE_INFO);
135 break;
136 case XGL_DBG_OBJECT_MSAA_STATE:
137 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_MSAA_STATE_CREATE_INFO);
138 shallow_copy = sizeof(XGL_MSAA_STATE_CREATE_INFO);
139 break;
140 case XGL_DBG_OBJECT_COLOR_BLEND_STATE:
141 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_COLOR_BLEND_STATE_CREATE_INFO);
142 shallow_copy = sizeof(XGL_COLOR_BLEND_STATE_CREATE_INFO);
143 break;
144 case XGL_DBG_OBJECT_DEPTH_STENCIL_STATE:
145 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEPTH_STENCIL_STATE_CREATE_INFO);
146 shallow_copy = sizeof(XGL_DEPTH_STENCIL_STATE_CREATE_INFO);
147 break;
Chia-I Wu730e5362014-08-19 12:15:09 +0800148 case XGL_DBG_OBJECT_CMD_BUFFER:
149 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_CMD_BUFFER_CREATE_INFO);
150 shallow_copy = sizeof(XGL_CMD_BUFFER_CREATE_INFO);
151 break;
Courtney Goeltzenleuchter05a60542014-08-15 14:54:34 -0600152 case XGL_DBG_OBJECT_GRAPHICS_PIPELINE:
153 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
154 break;
Courtney Goeltzenleuchter52ec3362014-08-19 11:52:02 -0600155 case XGL_DBG_OBJECT_SHADER:
156 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_SHADER_CREATE_INFO);
157 shallow_copy = sizeof(XGL_SHADER_CREATE_INFO);
158 break;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800159 default:
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600160 // log debug message regarding invalid struct_type?
161 intel_dev_log(dbg->dev, XGL_DBG_MSG_ERROR,
162 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
163 "Invalid Create Info type: 0x%x", info.header->struct_type);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800164 return false;
165 break;
166 }
167
168 if (shallow_copy) {
169 assert(!info.header->next);
170
171 dbg->create_info = icd_alloc(shallow_copy, 0, XGL_SYSTEM_ALLOC_DEBUG);
172 if (!dbg->create_info)
173 return false;
174
175 memcpy(dbg->create_info, create_info, shallow_copy);
Chia-I Wue2934f92014-08-16 13:17:22 +0800176 dbg->create_info_size = shallow_copy;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800177 } else if (info.header->struct_type ==
178 XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO) {
179 const XGL_DEVICE_CREATE_INFO *src = info.ptr;
180 XGL_DEVICE_CREATE_INFO *dst;
181 uint8_t *d;
182 XGL_SIZE size;
183 XGL_UINT i;
184
185 size = sizeof(*src);
Chia-I Wue2934f92014-08-16 13:17:22 +0800186 dbg->create_info_size = size;
187
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800188 size += sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
189 size += sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
190 for (i = 0; i < src->extensionCount; i++) {
191 size += 1 +
192 strlen((const char *) src->ppEnabledExtensionNames[i]);
193 }
194
Chia-I Wu98dcfab2014-08-07 12:07:52 +0800195 dst = icd_alloc(size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800196 if (!dst)
197 return false;
198
199 memcpy(dst, src, sizeof(*src));
200
201 d = (uint8_t *) dst;
202 d += sizeof(*src);
203
204 size = sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
205 memcpy(d, src->pRequestedQueues, size);
206 dst->pRequestedQueues = (const XGL_DEVICE_QUEUE_CREATE_INFO *) d;
207 d += size;
208
209 size = sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
210 dst->ppEnabledExtensionNames = (const XGL_CHAR * const *) d;
211
212 for (i = 0; i < src->extensionCount; i++) {
213 const XGL_SIZE len =
214 strlen((const char *) src->ppEnabledExtensionNames[i]);
215
216 memcpy(d + size, src->ppEnabledExtensionNames[i], len + 1);
217 ((const XGL_CHAR **) d)[i] = (const XGL_CHAR *) (d + size);
218
219 size += len + 1;
220 }
Courtney Goeltzenleuchter05a60542014-08-15 14:54:34 -0600221 } else if (info.header->struct_type == XGL_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO) {
222 // TODO: What do we want to copy here?
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800223 }
224
225 return true;
226}
227
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800228/**
Chia-I Wubbf2c932014-08-07 12:20:08 +0800229 * Create an intel_base_dbg. When dbg_size is non-zero, a buffer of that
Chia-I Wu660caf82014-08-07 10:54:26 +0800230 * size is allocated and zeroed.
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800231 */
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600232struct intel_base_dbg *intel_base_dbg_create(struct intel_dev *dev,
233 XGL_DBG_OBJECT_TYPE type,
Chia-I Wu660caf82014-08-07 10:54:26 +0800234 const void *create_info,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800235 XGL_SIZE dbg_size)
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800236{
Chia-I Wu660caf82014-08-07 10:54:26 +0800237 struct intel_base_dbg *dbg;
238
Chia-I Wubbf2c932014-08-07 12:20:08 +0800239 if (!dbg_size)
240 dbg_size = sizeof(*dbg);
Chia-I Wu660caf82014-08-07 10:54:26 +0800241
Chia-I Wubbf2c932014-08-07 12:20:08 +0800242 assert(dbg_size >= sizeof(*dbg));
Chia-I Wu660caf82014-08-07 10:54:26 +0800243
Chia-I Wubbf2c932014-08-07 12:20:08 +0800244 dbg = icd_alloc(dbg_size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu660caf82014-08-07 10:54:26 +0800245 if (!dbg)
246 return NULL;
247
Chia-I Wubbf2c932014-08-07 12:20:08 +0800248 memset(dbg, 0, dbg_size);
Chia-I Wu660caf82014-08-07 10:54:26 +0800249
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800250 dbg->alloc_id = icd_get_allocator_id();
251 dbg->type = type;
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600252 dbg->dev = dev;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800253
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800254 if (!base_dbg_copy_create_info(dbg, create_info)) {
255 icd_free(dbg);
256 return NULL;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800257 }
258
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800259 return dbg;
260}
261
262void intel_base_dbg_destroy(struct intel_base_dbg *dbg)
263{
Chia-I Wu660caf82014-08-07 10:54:26 +0800264 if (dbg->tag)
265 icd_free(dbg->tag);
266
267 if (dbg->create_info)
268 icd_free(dbg->create_info);
269
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800270 icd_free(dbg);
271}
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800272
Chia-I Wubbf2c932014-08-07 12:20:08 +0800273/**
274 * Create an intel_base. obj_size and dbg_size specify the real sizes of the
275 * object and the debug metadata. Memories are zeroed.
276 */
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600277struct intel_base *intel_base_create(struct intel_dev *dev,
278 XGL_SIZE obj_size, bool debug,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800279 XGL_DBG_OBJECT_TYPE type,
280 const void *create_info,
281 XGL_SIZE dbg_size)
282{
283 struct intel_base *base;
284
285 if (!obj_size)
286 obj_size = sizeof(*base);
287
288 assert(obj_size >= sizeof(*base));
289
290 base = icd_alloc(obj_size, 0, XGL_SYSTEM_ALLOC_API_OBJECT);
291 if (!base)
292 return NULL;
293
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600294 if (dev == NULL) {
295 /*
296 * dev is NULL when we are creating the base device object
297 * Set dev now so that debug setup happens correctly
298 */
299 dev = (struct intel_dev *) base;
300 }
301
Chia-I Wubbf2c932014-08-07 12:20:08 +0800302 memset(base, 0, obj_size);
303
Chia-I Wu6a42c2a2014-08-19 14:36:47 +0800304 base->dispatch = intel_dispatch_get(debug);
Chia-I Wubbf2c932014-08-07 12:20:08 +0800305 if (debug) {
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600306 base->dbg = intel_base_dbg_create(dev, type, create_info, dbg_size);
Chia-I Wubbf2c932014-08-07 12:20:08 +0800307 if (!base->dbg) {
308 icd_free(base);
309 return NULL;
310 }
311 }
Chia-I Wu6a42c2a2014-08-19 14:36:47 +0800312
Chia-I Wubbf2c932014-08-07 12:20:08 +0800313 base->get_info = intel_base_get_info;
314
315 return base;
316}
317
318void intel_base_destroy(struct intel_base *base)
319{
320 if (base->dbg)
321 intel_base_dbg_destroy(base->dbg);
322 icd_free(base);
323}
324
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800325XGL_RESULT XGLAPI intelDestroyObject(
326 XGL_OBJECT object)
327{
328 struct intel_obj *obj = intel_obj(object);
329
330 obj->destroy(obj);
331
332 return XGL_SUCCESS;
333}
334
335XGL_RESULT XGLAPI intelGetObjectInfo(
336 XGL_BASE_OBJECT object,
337 XGL_OBJECT_INFO_TYPE infoType,
338 XGL_SIZE* pDataSize,
339 XGL_VOID* pData)
340{
341 struct intel_base *base = intel_base(object);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800342
Chia-I Wu26f0bd02014-08-07 10:38:40 +0800343 return base->get_info(base, infoType, pDataSize, pData);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800344}
345
346XGL_RESULT XGLAPI intelBindObjectMemory(
347 XGL_OBJECT object,
Chia-I Wu9e61c0d2014-09-15 15:12:06 +0800348 XGL_GPU_MEMORY mem_,
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800349 XGL_GPU_SIZE offset)
350{
351 struct intel_obj *obj = intel_obj(object);
Chia-I Wu9e61c0d2014-09-15 15:12:06 +0800352 struct intel_mem *mem = intel_mem(mem_);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800353
Chia-I Wu9e61c0d2014-09-15 15:12:06 +0800354 intel_obj_bind_mem(obj, mem, offset);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800355
356 return XGL_SUCCESS;
357}
Chia-I Wu7ec9f342014-08-19 10:47:53 +0800358
359XGL_RESULT XGLAPI intelDbgSetObjectTag(
360 XGL_BASE_OBJECT object,
361 XGL_SIZE tagSize,
362 const XGL_VOID* pTag)
363{
364 struct intel_base *base = intel_base(object);
365 struct intel_base_dbg *dbg = base->dbg;
366 void *tag;
367
368 if (!dbg)
369 return XGL_SUCCESS;
370
371 tag = icd_alloc(tagSize, 0, XGL_SYSTEM_ALLOC_DEBUG);
372 if (!tag)
373 return XGL_ERROR_OUT_OF_MEMORY;
374
375 memcpy(tag, pTag, tagSize);
376
377 if (dbg->tag)
378 icd_free(dbg->tag);
379
380 dbg->tag = tag;
381 dbg->tag_size = tagSize;
382
383 return XGL_SUCCESS;
384}