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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 2d763bac13803a8ca61c46daf552b94992da0988 / . / asoc / kona.c
blob: 4382689faaea66ffe268c4c9da03ecabccddd26c [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2/*
Xiao Lid8bb93c2020-01-07 12:59:05 +0800[diff] [blame]3 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]16#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]23#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]24#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]25#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]32#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]33#include "codecs/wsa881x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]34#include "codecs/wcd938x/wcd938x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
37#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]38#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]39
40#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]41#define __CHIPSET__ "KONA "
42#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
43
44#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]45#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]46#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]47#define SAMPLING_RATE_22P05KHZ 22050
48#define SAMPLING_RATE_32KHZ 32000
49#define SAMPLING_RATE_44P1KHZ 44100
50#define SAMPLING_RATE_48KHZ 48000
51#define SAMPLING_RATE_88P2KHZ 88200
52#define SAMPLING_RATE_96KHZ 96000
53#define SAMPLING_RATE_176P4KHZ 176400
54#define SAMPLING_RATE_192KHZ 192000
55#define SAMPLING_RATE_352P8KHZ 352800
56#define SAMPLING_RATE_384KHZ 384000
57
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]58#define IS_FRACTIONAL(x) \
59((x == SAMPLING_RATE_11P025KHZ) || (x == SAMPLING_RATE_22P05KHZ) || \
60(x == SAMPLING_RATE_44P1KHZ) || (x == SAMPLING_RATE_88P2KHZ) || \
61(x == SAMPLING_RATE_176P4KHZ) || (x == SAMPLING_RATE_352P8KHZ))
62
63#define IS_MSM_INTERFACE_MI2S(x) \
64((x == PRIM_MI2S) || (x == SEC_MI2S) || (x == TERT_MI2S))
65
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]66#define WCD9XXX_MBHC_DEF_RLOADS 5
67#define WCD9XXX_MBHC_DEF_BUTTONS 8
68#define CODEC_EXT_CLK_RATE 9600000
69#define ADSP_STATE_READY_TIMEOUT_MS 3000
70#define DEV_NAME_STR_LEN 32
71#define WCD_MBHC_HS_V_MAX 1600
72
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]73#define TDM_CHANNEL_MAX 8
74#define DEV_NAME_STR_LEN 32
75
76#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
77
78#define ADSP_STATE_READY_TIMEOUT_MS 3000
79
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]80#define WSA8810_NAME_1 "wsa881x.20170211"
81#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]82#define WCN_CDC_SLIM_RX_CH_MAX 2
83#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]84#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]85
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]86enum {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]87 RX_PATH = 0,
88 TX_PATH,
89 MAX_PATH,
90};
91
92enum {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]93 TDM_0 = 0,
94 TDM_1,
95 TDM_2,
96 TDM_3,
97 TDM_4,
98 TDM_5,
99 TDM_6,
100 TDM_7,
101 TDM_PORT_MAX,
102};
103
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]104#define TDM_MAX_SLOTS 8
105#define TDM_SLOT_WIDTH_BITS 32
106
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]107enum {
108 TDM_PRI = 0,
109 TDM_SEC,
110 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]111 TDM_QUAT,
112 TDM_QUIN,
113 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]114 TDM_INTERFACE_MAX,
115};
116
117enum {
118 PRIM_AUX_PCM = 0,
119 SEC_AUX_PCM,
120 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]121 QUAT_AUX_PCM,
122 QUIN_AUX_PCM,
123 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]124 AUX_PCM_MAX,
125};
126
127enum {
128 PRIM_MI2S = 0,
129 SEC_MI2S,
130 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]131 QUAT_MI2S,
132 QUIN_MI2S,
133 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]134 MI2S_MAX,
135};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]136
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]137enum {
138 WSA_CDC_DMA_RX_0 = 0,
139 WSA_CDC_DMA_RX_1,
140 RX_CDC_DMA_RX_0,
141 RX_CDC_DMA_RX_1,
142 RX_CDC_DMA_RX_2,
143 RX_CDC_DMA_RX_3,
144 RX_CDC_DMA_RX_5,
145 CDC_DMA_RX_MAX,
146};
147
148enum {
149 WSA_CDC_DMA_TX_0 = 0,
150 WSA_CDC_DMA_TX_1,
151 WSA_CDC_DMA_TX_2,
152 TX_CDC_DMA_TX_0,
153 TX_CDC_DMA_TX_3,
154 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]155 VA_CDC_DMA_TX_0,
156 VA_CDC_DMA_TX_1,
157 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]158 CDC_DMA_TX_MAX,
159};
160
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]161enum {
162 SLIM_RX_7 = 0,
163 SLIM_RX_MAX,
164};
165enum {
166 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]167 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]168 SLIM_TX_MAX,
169};
170
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]171enum {
172 AFE_LOOPBACK_TX_IDX = 0,
173 AFE_LOOPBACK_TX_IDX_MAX,
174};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]175struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]176 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]177 int usbc_en2_gpio; /* used by gpio driver API */
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]178 int lito_v2_enabled;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]179 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
180 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
181 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]182 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
183 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]184 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
185 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
186 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
187 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
188 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]189 struct device_node *fsa_handle;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]190 struct clk *lpass_audio_hw_vote;
191 int core_audio_vote_count;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]192};
193
194struct tdm_port {
195 u32 mode;
196 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]197};
198
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]199struct tdm_dev_config {
200 unsigned int tdm_slot_offset[TDM_MAX_SLOTS];
201};
202
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]203enum {
204 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]205 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]206 EXT_DISP_RX_IDX_MAX,
207};
208
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]209struct msm_wsa881x_dev_info {
210 struct device_node *of_node;
211 u32 index;
212};
213
214struct aux_codec_dev_info {
215 struct device_node *of_node;
216 u32 index;
217};
218
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]219struct dev_config {
220 u32 sample_rate;
221 u32 bit_format;
222 u32 channels;
223};
224
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]225/* Default configuration of slimbus channels */
226static struct dev_config slim_rx_cfg[] = {
227 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
228};
229
230static struct dev_config slim_tx_cfg[] = {
231 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]232 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]233};
234
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]235/* Default configuration of external display BE */
236static struct dev_config ext_disp_rx_cfg[] = {
237 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]238 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]239};
240
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]241static struct dev_config usb_rx_cfg = {
242 .sample_rate = SAMPLING_RATE_48KHZ,
243 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
244 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]245};
246
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]247static struct dev_config usb_tx_cfg = {
248 .sample_rate = SAMPLING_RATE_48KHZ,
249 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
250 .channels = 1,
251};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]252
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]253static struct dev_config proxy_rx_cfg = {
254 .sample_rate = SAMPLING_RATE_48KHZ,
255 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
256 .channels = 2,
257};
258
259static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
260 {
261 AFE_API_VERSION_I2S_CONFIG,
262 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
263 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
264 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
265 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
266 0,
267 },
268 {
269 AFE_API_VERSION_I2S_CONFIG,
270 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
271 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
272 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
273 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
274 0,
275 },
276 {
277 AFE_API_VERSION_I2S_CONFIG,
278 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
279 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
280 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
281 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
282 0,
283 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]284 {
285 AFE_API_VERSION_I2S_CONFIG,
286 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
287 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
288 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
289 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
290 0,
291 },
292 {
293 AFE_API_VERSION_I2S_CONFIG,
294 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
295 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
296 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
297 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
298 0,
299 },
300 {
301 AFE_API_VERSION_I2S_CONFIG,
302 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
303 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
304 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
305 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
306 0,
307 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]308};
309
310struct mi2s_conf {
311 struct mutex lock;
312 u32 ref_cnt;
313 u32 msm_is_mi2s_master;
314};
315
316static u32 mi2s_ebit_clk[MI2S_MAX] = {
317 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
318 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
319 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
320};
321
322static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
323
324/* Default configuration of TDM channels */
325static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
326 { /* PRI TDM */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
335 },
336 { /* SEC TDM */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
345 },
346 { /* TERT TDM */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
355 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]356 { /* QUAT TDM */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
359 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
360 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
361 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
362 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
363 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
365 },
366 { /* QUIN TDM */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
372 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
373 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
375 },
376 { /* SEN TDM */
377 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
382 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
383 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
385 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]386};
387
388static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
389 { /* PRI TDM */
390 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
392 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
393 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
398 },
399 { /* SEC TDM */
400 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
402 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
403 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
408 },
409 { /* TERT TDM */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
412 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
413 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
418 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]419 { /* QUAT TDM */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
422 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
423 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
424 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
425 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
426 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
427 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
428 },
429 { /* QUIN TDM */
430 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
431 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
432 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
433 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
434 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
435 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
436 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
437 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
438 },
439 { /* SEN TDM */
440 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
441 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
442 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
443 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
444 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
445 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
446 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
447 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
448 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]449};
450
451/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]452static struct dev_config aux_pcm_rx_cfg[] = {
453 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]454 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
455 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]456 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
457 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
458 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]459};
460
461static struct dev_config aux_pcm_tx_cfg[] = {
462 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]463 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
464 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]465 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
466 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
467 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]468};
469
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]470/* Default configuration of MI2S channels */
471static struct dev_config mi2s_rx_cfg[] = {
472 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
473 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
474 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]475 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
476 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
477 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]478};
479
480static struct dev_config mi2s_tx_cfg[] = {
481 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
482 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
483 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]484 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
485 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
486 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]487};
488
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]489static struct tdm_dev_config pri_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
490 { /* PRI TDM */
491 { {0, 4, 0xFFFF} }, /* RX_0 */
492 { {8, 12, 0xFFFF} }, /* RX_1 */
493 { {16, 20, 0xFFFF} }, /* RX_2 */
494 { {24, 28, 0xFFFF} }, /* RX_3 */
495 { {0xFFFF} }, /* RX_4 */
496 { {0xFFFF} }, /* RX_5 */
497 { {0xFFFF} }, /* RX_6 */
498 { {0xFFFF} }, /* RX_7 */
499 },
500 {
501 { {0, 4, 8, 12, 0xFFFF} }, /* TX_0 */
502 { {8, 12, 0xFFFF} }, /* TX_1 */
503 { {16, 20, 0xFFFF} }, /* TX_2 */
504 { {24, 28, 0xFFFF} }, /* TX_3 */
505 { {0xFFFF} }, /* TX_4 */
506 { {0xFFFF} }, /* TX_5 */
507 { {0xFFFF} }, /* TX_6 */
508 { {0xFFFF} }, /* TX_7 */
509 },
510};
511
512static struct tdm_dev_config sec_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
513 { /* SEC TDM */
514 { {0, 4, 0xFFFF} }, /* RX_0 */
515 { {8, 12, 0xFFFF} }, /* RX_1 */
516 { {16, 20, 0xFFFF} }, /* RX_2 */
517 { {24, 28, 0xFFFF} }, /* RX_3 */
518 { {0xFFFF} }, /* RX_4 */
519 { {0xFFFF} }, /* RX_5 */
520 { {0xFFFF} }, /* RX_6 */
521 { {0xFFFF} }, /* RX_7 */
522 },
523 {
524 { {0, 4, 0xFFFF} }, /* TX_0 */
525 { {8, 12, 0xFFFF} }, /* TX_1 */
526 { {16, 20, 0xFFFF} }, /* TX_2 */
527 { {24, 28, 0xFFFF} }, /* TX_3 */
528 { {0xFFFF} }, /* TX_4 */
529 { {0xFFFF} }, /* TX_5 */
530 { {0xFFFF} }, /* TX_6 */
531 { {0xFFFF} }, /* TX_7 */
532 },
533};
534
535static struct tdm_dev_config tert_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
536 { /* TERT TDM */
537 { {0, 4, 0xFFFF} }, /* RX_0 */
538 { {8, 12, 0xFFFF} }, /* RX_1 */
539 { {16, 20, 0xFFFF} }, /* RX_2 */
540 { {24, 28, 0xFFFF} }, /* RX_3 */
541 { {0xFFFF} }, /* RX_4 */
542 { {0xFFFF} }, /* RX_5 */
543 { {0xFFFF} }, /* RX_6 */
544 { {0xFFFF} }, /* RX_7 */
545 },
546 {
547 { {0, 4, 0xFFFF} }, /* TX_0 */
548 { {8, 12, 0xFFFF} }, /* TX_1 */
549 { {16, 20, 0xFFFF} }, /* TX_2 */
550 { {24, 28, 0xFFFF} }, /* TX_3 */
551 { {0xFFFF} }, /* TX_4 */
552 { {0xFFFF} }, /* TX_5 */
553 { {0xFFFF} }, /* TX_6 */
554 { {0xFFFF} }, /* TX_7 */
555 },
556};
557
558static struct tdm_dev_config quat_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
559 { /* QUAT TDM */
560 { {0, 4, 0xFFFF} }, /* RX_0 */
561 { {8, 12, 0xFFFF} }, /* RX_1 */
562 { {16, 20, 0xFFFF} }, /* RX_2 */
563 { {24, 28, 0xFFFF} }, /* RX_3 */
564 { {0xFFFF} }, /* RX_4 */
565 { {0xFFFF} }, /* RX_5 */
566 { {0xFFFF} }, /* RX_6 */
567 { {0xFFFF} }, /* RX_7 */
568 },
569 {
570 { {0, 4, 0xFFFF} }, /* TX_0 */
571 { {8, 12, 0xFFFF} }, /* TX_1 */
572 { {16, 20, 0xFFFF} }, /* TX_2 */
573 { {24, 28, 0xFFFF} }, /* TX_3 */
574 { {0xFFFF} }, /* TX_4 */
575 { {0xFFFF} }, /* TX_5 */
576 { {0xFFFF} }, /* TX_6 */
577 { {0xFFFF} }, /* TX_7 */
578 },
579};
580
581static struct tdm_dev_config quin_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
582 { /* QUIN TDM */
583 { {0, 4, 0xFFFF} }, /* RX_0 */
584 { {8, 12, 0xFFFF} }, /* RX_1 */
585 { {16, 20, 0xFFFF} }, /* RX_2 */
586 { {24, 28, 0xFFFF} }, /* RX_3 */
587 { {0xFFFF} }, /* RX_4 */
588 { {0xFFFF} }, /* RX_5 */
589 { {0xFFFF} }, /* RX_6 */
590 { {0xFFFF} }, /* RX_7 */
591 },
592 {
593 { {0, 4, 0xFFFF} }, /* TX_0 */
594 { {8, 12, 0xFFFF} }, /* TX_1 */
595 { {16, 20, 0xFFFF} }, /* TX_2 */
596 { {24, 28, 0xFFFF} }, /* TX_3 */
597 { {0xFFFF} }, /* TX_4 */
598 { {0xFFFF} }, /* TX_5 */
599 { {0xFFFF} }, /* TX_6 */
600 { {0xFFFF} }, /* TX_7 */
601 },
602};
603
604static struct tdm_dev_config sen_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
605 { /* SEN TDM */
606 { {0, 4, 0xFFFF} }, /* RX_0 */
607 { {8, 12, 0xFFFF} }, /* RX_1 */
608 { {16, 20, 0xFFFF} }, /* RX_2 */
609 { {24, 28, 0xFFFF} }, /* RX_3 */
610 { {0xFFFF} }, /* RX_4 */
611 { {0xFFFF} }, /* RX_5 */
612 { {0xFFFF} }, /* RX_6 */
613 { {0xFFFF} }, /* RX_7 */
614 },
615 {
616 { {0, 4, 0xFFFF} }, /* TX_0 */
617 { {8, 12, 0xFFFF} }, /* TX_1 */
618 { {16, 20, 0xFFFF} }, /* TX_2 */
619 { {24, 28, 0xFFFF} }, /* TX_3 */
620 { {0xFFFF} }, /* TX_4 */
621 { {0xFFFF} }, /* TX_5 */
622 { {0xFFFF} }, /* TX_6 */
623 { {0xFFFF} }, /* TX_7 */
624 },
625};
626
627static void *tdm_cfg[TDM_INTERFACE_MAX] = {
628 pri_tdm_dev_config,
629 sec_tdm_dev_config,
630 tert_tdm_dev_config,
631 quat_tdm_dev_config,
632 quin_tdm_dev_config,
633 sen_tdm_dev_config,
634};
635
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]636/* Default configuration of Codec DMA Interface RX */
637static struct dev_config cdc_dma_rx_cfg[] = {
638 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
639 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
640 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
641 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
642 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
643 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
644 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
645};
646
647/* Default configuration of Codec DMA Interface TX */
648static struct dev_config cdc_dma_tx_cfg[] = {
649 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
650 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
651 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
652 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
653 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
654 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]655 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
656 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
657 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]658};
659
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]660static struct dev_config afe_loopback_tx_cfg[] = {
661 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
662};
663
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]664static int msm_vi_feed_tx_ch = 2;
665static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]666static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
667 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]668static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]669static char const *ch_text[] = {"Two", "Three", "Four", "Five",
670 "Six", "Seven", "Eight"};
671static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
672 "KHZ_16", "KHZ_22P05",
673 "KHZ_32", "KHZ_44P1", "KHZ_48",
674 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
675 "KHZ_192", "KHZ_352P8", "KHZ_384"};
676static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
677 "Five", "Six", "Seven",
678 "Eight"};
679static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
680 "KHZ_48", "KHZ_176P4",
681 "KHZ_352P8"};
682static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
683static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
684 "Five", "Six", "Seven", "Eight"};
685static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
686static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
687 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]688 "KHZ_48", "KHZ_88P2", "KHZ_96",
689 "KHZ_176P4", "KHZ_192","KHZ_352P8",
690 "KHZ_384"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]691static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
692 "Five", "Six", "Seven",
693 "Eight"};
694
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]695static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
696static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
697 "Five", "Six", "Seven",
698 "Eight"};
699static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
700 "KHZ_16", "KHZ_22P05",
701 "KHZ_32", "KHZ_44P1", "KHZ_48",
702 "KHZ_88P2", "KHZ_96",
703 "KHZ_176P4", "KHZ_192",
704 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]705static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
706 "KHZ_16", "KHZ_22P05",
707 "KHZ_32", "KHZ_44P1", "KHZ_48",
708 "KHZ_88P2", "KHZ_96",
709 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]710static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
711 "S24_3LE"};
712static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
713 "KHZ_192", "KHZ_32", "KHZ_44P1",
714 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]715static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
716 "KHZ_44P1", "KHZ_48",
717 "KHZ_88P2", "KHZ_96"};
718static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
719 "KHZ_44P1", "KHZ_48",
720 "KHZ_88P2", "KHZ_96"};
721static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
722 "KHZ_44P1", "KHZ_48",
723 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]724static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]725
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]726static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
727static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
728static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
729static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
730static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
731static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]732static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]733static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
734static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
735static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
736static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
737static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
738static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
739static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]740static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]741static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
742static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]743static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
744static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
745static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]746static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]747static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
748static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]749static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
750static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
751static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]752static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
753static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]754static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
755static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
756static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]757static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
758static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
759static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]760static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
761static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
762static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]763static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
764static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
765static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]766static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
767static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
768static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
769static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
770static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]771static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
772static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
773static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]774static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
775static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
776static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]777static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
778static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
779static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]780static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
781static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
782static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
783static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
784static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
785static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
786static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
787static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
788static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
789static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
790static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
791static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
792static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]793static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
794static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
795static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]796static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
797static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]798static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
799static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
800static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
801static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
802static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]803static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
804static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
805static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]806static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
807 cdc_dma_sample_rate_text);
808static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
809 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]810static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
811 cdc_dma_sample_rate_text);
812static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
813 cdc_dma_sample_rate_text);
814static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
815 cdc_dma_sample_rate_text);
816static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
817 cdc_dma_sample_rate_text);
818static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
819 cdc_dma_sample_rate_text);
820static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
821 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]822static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
823 cdc_dma_sample_rate_text);
824static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
825 cdc_dma_sample_rate_text);
826static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
827 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]828
829/* WCD9380 */
830static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
831static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
832static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
833static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
834static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
835static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
836 cdc80_dma_sample_rate_text);
837static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
838 cdc80_dma_sample_rate_text);
839static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
840 cdc80_dma_sample_rate_text);
841static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
842 cdc80_dma_sample_rate_text);
843static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
844 cdc80_dma_sample_rate_text);
845/* WCD9385 */
846static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
847static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
848static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
849static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
850static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
851static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
852 cdc_dma_sample_rate_text);
853static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
854 cdc_dma_sample_rate_text);
855static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
856 cdc_dma_sample_rate_text);
857static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
858 cdc_dma_sample_rate_text);
859static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
860 cdc_dma_sample_rate_text);
861
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]862static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
863static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
864static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
865 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]866static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
867static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
868static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]869static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]870
871static bool is_initial_boot;
872static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]873static struct snd_soc_aux_dev *msm_aux_dev;
874static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]875static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]876static int dmic_0_1_gpio_cnt;
877static int dmic_2_3_gpio_cnt;
878static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]879
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]880static void *def_wcd_mbhc_cal(void);
881
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]882/*
883 * Need to report LINEIN
884 * if R/L channel impedance is larger than 5K ohm
885 */
886static struct wcd_mbhc_config wcd_mbhc_cfg = {
887 .read_fw_bin = false,
888 .calibration = NULL,
889 .detect_extn_cable = true,
890 .mono_stero_detection = false,
891 .swap_gnd_mic = NULL,
892 .hs_ext_micbias = true,
893 .key_code[0] = KEY_MEDIA,
894 .key_code[1] = KEY_VOICECOMMAND,
895 .key_code[2] = KEY_VOLUMEUP,
896 .key_code[3] = KEY_VOLUMEDOWN,
897 .key_code[4] = 0,
898 .key_code[5] = 0,
899 .key_code[6] = 0,
900 .key_code[7] = 0,
901 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]902 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]903 .mbhc_micbias = MIC_BIAS_2,
904 .anc_micbias = MIC_BIAS_2,
905 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]906 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]907};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]908
909static inline int param_is_mask(int p)
910{
911 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
912 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
913}
914
915static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
916 int n)
917{
918 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
919}
920
921static void param_set_mask(struct snd_pcm_hw_params *p, int n,
922 unsigned int bit)
923{
924 if (bit >= SNDRV_MASK_MAX)
925 return;
926 if (param_is_mask(n)) {
927 struct snd_mask *m = param_to_mask(p, n);
928
929 m->bits[0] = 0;
930 m->bits[1] = 0;
931 m->bits[bit >> 5] |= (1 << (bit & 31));
932 }
933}
934
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]935static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
936 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]937{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]938 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]939
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]940 switch (usb_rx_cfg.sample_rate) {
941 case SAMPLING_RATE_384KHZ:
942 sample_rate_val = 12;
943 break;
944 case SAMPLING_RATE_352P8KHZ:
945 sample_rate_val = 11;
946 break;
947 case SAMPLING_RATE_192KHZ:
948 sample_rate_val = 10;
949 break;
950 case SAMPLING_RATE_176P4KHZ:
951 sample_rate_val = 9;
952 break;
953 case SAMPLING_RATE_96KHZ:
954 sample_rate_val = 8;
955 break;
956 case SAMPLING_RATE_88P2KHZ:
957 sample_rate_val = 7;
958 break;
959 case SAMPLING_RATE_48KHZ:
960 sample_rate_val = 6;
961 break;
962 case SAMPLING_RATE_44P1KHZ:
963 sample_rate_val = 5;
964 break;
965 case SAMPLING_RATE_32KHZ:
966 sample_rate_val = 4;
967 break;
968 case SAMPLING_RATE_22P05KHZ:
969 sample_rate_val = 3;
970 break;
971 case SAMPLING_RATE_16KHZ:
972 sample_rate_val = 2;
973 break;
974 case SAMPLING_RATE_11P025KHZ:
975 sample_rate_val = 1;
976 break;
977 case SAMPLING_RATE_8KHZ:
978 default:
979 sample_rate_val = 0;
980 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]981 }
982
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]983 ucontrol->value.integer.value[0] = sample_rate_val;
984 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
985 usb_rx_cfg.sample_rate);
986 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]987}
988
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]989static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
990 struct snd_ctl_elem_value *ucontrol)
991{
992 switch (ucontrol->value.integer.value[0]) {
993 case 12:
994 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
995 break;
996 case 11:
997 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
998 break;
999 case 10:
1000 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1001 break;
1002 case 9:
1003 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1004 break;
1005 case 8:
1006 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1007 break;
1008 case 7:
1009 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1010 break;
1011 case 6:
1012 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1013 break;
1014 case 5:
1015 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1016 break;
1017 case 4:
1018 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1019 break;
1020 case 3:
1021 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1022 break;
1023 case 2:
1024 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1025 break;
1026 case 1:
1027 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1028 break;
1029 case 0:
1030 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1031 break;
1032 default:
1033 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1034 break;
1035 }
1036
1037 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1038 __func__, ucontrol->value.integer.value[0],
1039 usb_rx_cfg.sample_rate);
1040 return 0;
1041}
1042
1043static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1044 struct snd_ctl_elem_value *ucontrol)
1045{
1046 int sample_rate_val = 0;
1047
1048 switch (usb_tx_cfg.sample_rate) {
1049 case SAMPLING_RATE_384KHZ:
1050 sample_rate_val = 12;
1051 break;
1052 case SAMPLING_RATE_352P8KHZ:
1053 sample_rate_val = 11;
1054 break;
1055 case SAMPLING_RATE_192KHZ:
1056 sample_rate_val = 10;
1057 break;
1058 case SAMPLING_RATE_176P4KHZ:
1059 sample_rate_val = 9;
1060 break;
1061 case SAMPLING_RATE_96KHZ:
1062 sample_rate_val = 8;
1063 break;
1064 case SAMPLING_RATE_88P2KHZ:
1065 sample_rate_val = 7;
1066 break;
1067 case SAMPLING_RATE_48KHZ:
1068 sample_rate_val = 6;
1069 break;
1070 case SAMPLING_RATE_44P1KHZ:
1071 sample_rate_val = 5;
1072 break;
1073 case SAMPLING_RATE_32KHZ:
1074 sample_rate_val = 4;
1075 break;
1076 case SAMPLING_RATE_22P05KHZ:
1077 sample_rate_val = 3;
1078 break;
1079 case SAMPLING_RATE_16KHZ:
1080 sample_rate_val = 2;
1081 break;
1082 case SAMPLING_RATE_11P025KHZ:
1083 sample_rate_val = 1;
1084 break;
1085 case SAMPLING_RATE_8KHZ:
1086 sample_rate_val = 0;
1087 break;
1088 default:
1089 sample_rate_val = 6;
1090 break;
1091 }
1092
1093 ucontrol->value.integer.value[0] = sample_rate_val;
1094 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1095 usb_tx_cfg.sample_rate);
1096 return 0;
1097}
1098
1099static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1100 struct snd_ctl_elem_value *ucontrol)
1101{
1102 switch (ucontrol->value.integer.value[0]) {
1103 case 12:
1104 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1105 break;
1106 case 11:
1107 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1108 break;
1109 case 10:
1110 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1111 break;
1112 case 9:
1113 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1114 break;
1115 case 8:
1116 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1117 break;
1118 case 7:
1119 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1120 break;
1121 case 6:
1122 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1123 break;
1124 case 5:
1125 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1126 break;
1127 case 4:
1128 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1129 break;
1130 case 3:
1131 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1132 break;
1133 case 2:
1134 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1135 break;
1136 case 1:
1137 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1138 break;
1139 case 0:
1140 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1141 break;
1142 default:
1143 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1144 break;
1145 }
1146
1147 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1148 __func__, ucontrol->value.integer.value[0],
1149 usb_tx_cfg.sample_rate);
1150 return 0;
1151}
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]1152static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
1153 struct snd_ctl_elem_value *ucontrol)
1154{
1155 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1156 afe_loopback_tx_cfg[0].channels);
1157 ucontrol->value.enumerated.item[0] =
1158 afe_loopback_tx_cfg[0].channels - 1;
1159
1160 return 0;
1161}
1162
1163static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
1164 struct snd_ctl_elem_value *ucontrol)
1165{
1166 afe_loopback_tx_cfg[0].channels =
1167 ucontrol->value.enumerated.item[0] + 1;
1168 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1169 afe_loopback_tx_cfg[0].channels);
1170
1171 return 1;
1172}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1173
1174static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1175 struct snd_ctl_elem_value *ucontrol)
1176{
1177 switch (usb_rx_cfg.bit_format) {
1178 case SNDRV_PCM_FORMAT_S32_LE:
1179 ucontrol->value.integer.value[0] = 3;
1180 break;
1181 case SNDRV_PCM_FORMAT_S24_3LE:
1182 ucontrol->value.integer.value[0] = 2;
1183 break;
1184 case SNDRV_PCM_FORMAT_S24_LE:
1185 ucontrol->value.integer.value[0] = 1;
1186 break;
1187 case SNDRV_PCM_FORMAT_S16_LE:
1188 default:
1189 ucontrol->value.integer.value[0] = 0;
1190 break;
1191 }
1192
1193 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1194 __func__, usb_rx_cfg.bit_format,
1195 ucontrol->value.integer.value[0]);
1196 return 0;
1197}
1198
1199static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1200 struct snd_ctl_elem_value *ucontrol)
1201{
1202 int rc = 0;
1203
1204 switch (ucontrol->value.integer.value[0]) {
1205 case 3:
1206 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1207 break;
1208 case 2:
1209 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1210 break;
1211 case 1:
1212 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1213 break;
1214 case 0:
1215 default:
1216 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1217 break;
1218 }
1219 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1220 __func__, usb_rx_cfg.bit_format,
1221 ucontrol->value.integer.value[0]);
1222
1223 return rc;
1224}
1225
1226static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1227 struct snd_ctl_elem_value *ucontrol)
1228{
1229 switch (usb_tx_cfg.bit_format) {
1230 case SNDRV_PCM_FORMAT_S32_LE:
1231 ucontrol->value.integer.value[0] = 3;
1232 break;
1233 case SNDRV_PCM_FORMAT_S24_3LE:
1234 ucontrol->value.integer.value[0] = 2;
1235 break;
1236 case SNDRV_PCM_FORMAT_S24_LE:
1237 ucontrol->value.integer.value[0] = 1;
1238 break;
1239 case SNDRV_PCM_FORMAT_S16_LE:
1240 default:
1241 ucontrol->value.integer.value[0] = 0;
1242 break;
1243 }
1244
1245 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1246 __func__, usb_tx_cfg.bit_format,
1247 ucontrol->value.integer.value[0]);
1248 return 0;
1249}
1250
1251static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1252 struct snd_ctl_elem_value *ucontrol)
1253{
1254 int rc = 0;
1255
1256 switch (ucontrol->value.integer.value[0]) {
1257 case 3:
1258 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1259 break;
1260 case 2:
1261 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1262 break;
1263 case 1:
1264 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1265 break;
1266 case 0:
1267 default:
1268 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1269 break;
1270 }
1271 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1272 __func__, usb_tx_cfg.bit_format,
1273 ucontrol->value.integer.value[0]);
1274
1275 return rc;
1276}
1277
1278static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1279 struct snd_ctl_elem_value *ucontrol)
1280{
1281 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1282 usb_rx_cfg.channels);
1283 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1284 return 0;
1285}
1286
1287static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1288 struct snd_ctl_elem_value *ucontrol)
1289{
1290 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1291
1292 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1293 return 1;
1294}
1295
1296static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1297 struct snd_ctl_elem_value *ucontrol)
1298{
1299 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1300 usb_tx_cfg.channels);
1301 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1302 return 0;
1303}
1304
1305static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1306 struct snd_ctl_elem_value *ucontrol)
1307{
1308 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1309
1310 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1311 return 1;
1312}
1313
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]1314static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1315 struct snd_ctl_elem_value *ucontrol)
1316{
1317 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1318 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1319 ucontrol->value.integer.value[0]);
1320 return 0;
1321}
1322
1323static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1324 struct snd_ctl_elem_value *ucontrol)
1325{
1326 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1327 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1328 return 1;
1329}
1330
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1331static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1332{
1333 int idx = 0;
1334
1335 if (strnstr(kcontrol->id.name, "Display Port RX",
1336 sizeof("Display Port RX"))) {
1337 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]1338 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1339 sizeof("Display Port1 RX"))) {
1340 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1341 } else {
1342 pr_err("%s: unsupported BE: %s\n",
1343 __func__, kcontrol->id.name);
1344 idx = -EINVAL;
1345 }
1346
1347 return idx;
1348}
1349
1350static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1351 struct snd_ctl_elem_value *ucontrol)
1352{
1353 int idx = ext_disp_get_port_idx(kcontrol);
1354
1355 if (idx < 0)
1356 return idx;
1357
1358 switch (ext_disp_rx_cfg[idx].bit_format) {
1359 case SNDRV_PCM_FORMAT_S24_3LE:
1360 ucontrol->value.integer.value[0] = 2;
1361 break;
1362 case SNDRV_PCM_FORMAT_S24_LE:
1363 ucontrol->value.integer.value[0] = 1;
1364 break;
1365 case SNDRV_PCM_FORMAT_S16_LE:
1366 default:
1367 ucontrol->value.integer.value[0] = 0;
1368 break;
1369 }
1370
1371 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1372 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1373 ucontrol->value.integer.value[0]);
1374 return 0;
1375}
1376
1377static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1378 struct snd_ctl_elem_value *ucontrol)
1379{
1380 int idx = ext_disp_get_port_idx(kcontrol);
1381
1382 if (idx < 0)
1383 return idx;
1384
1385 switch (ucontrol->value.integer.value[0]) {
1386 case 2:
1387 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1388 break;
1389 case 1:
1390 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1391 break;
1392 case 0:
1393 default:
1394 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1395 break;
1396 }
1397 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1398 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1399 ucontrol->value.integer.value[0]);
1400
1401 return 0;
1402}
1403
1404static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1405 struct snd_ctl_elem_value *ucontrol)
1406{
1407 int idx = ext_disp_get_port_idx(kcontrol);
1408
1409 if (idx < 0)
1410 return idx;
1411
1412 ucontrol->value.integer.value[0] =
1413 ext_disp_rx_cfg[idx].channels - 2;
1414
1415 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1416 idx, ext_disp_rx_cfg[idx].channels);
1417
1418 return 0;
1419}
1420
1421static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1422 struct snd_ctl_elem_value *ucontrol)
1423{
1424 int idx = ext_disp_get_port_idx(kcontrol);
1425
1426 if (idx < 0)
1427 return idx;
1428
1429 ext_disp_rx_cfg[idx].channels =
1430 ucontrol->value.integer.value[0] + 2;
1431
1432 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1433 idx, ext_disp_rx_cfg[idx].channels);
1434 return 1;
1435}
1436
1437static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1438 struct snd_ctl_elem_value *ucontrol)
1439{
1440 int sample_rate_val;
1441 int idx = ext_disp_get_port_idx(kcontrol);
1442
1443 if (idx < 0)
1444 return idx;
1445
1446 switch (ext_disp_rx_cfg[idx].sample_rate) {
1447 case SAMPLING_RATE_176P4KHZ:
1448 sample_rate_val = 6;
1449 break;
1450
1451 case SAMPLING_RATE_88P2KHZ:
1452 sample_rate_val = 5;
1453 break;
1454
1455 case SAMPLING_RATE_44P1KHZ:
1456 sample_rate_val = 4;
1457 break;
1458
1459 case SAMPLING_RATE_32KHZ:
1460 sample_rate_val = 3;
1461 break;
1462
1463 case SAMPLING_RATE_192KHZ:
1464 sample_rate_val = 2;
1465 break;
1466
1467 case SAMPLING_RATE_96KHZ:
1468 sample_rate_val = 1;
1469 break;
1470
1471 case SAMPLING_RATE_48KHZ:
1472 default:
1473 sample_rate_val = 0;
1474 break;
1475 }
1476
1477 ucontrol->value.integer.value[0] = sample_rate_val;
1478 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1479 idx, ext_disp_rx_cfg[idx].sample_rate);
1480
1481 return 0;
1482}
1483
1484static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1485 struct snd_ctl_elem_value *ucontrol)
1486{
1487 int idx = ext_disp_get_port_idx(kcontrol);
1488
1489 if (idx < 0)
1490 return idx;
1491
1492 switch (ucontrol->value.integer.value[0]) {
1493 case 6:
1494 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1495 break;
1496 case 5:
1497 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1498 break;
1499 case 4:
1500 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1501 break;
1502 case 3:
1503 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1504 break;
1505 case 2:
1506 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1507 break;
1508 case 1:
1509 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1510 break;
1511 case 0:
1512 default:
1513 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1514 break;
1515 }
1516
1517 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1518 __func__, ucontrol->value.integer.value[0], idx,
1519 ext_disp_rx_cfg[idx].sample_rate);
1520 return 0;
1521}
1522
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1523static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1524 struct snd_ctl_elem_value *ucontrol)
1525{
1526 pr_debug("%s: proxy_rx channels = %d\n",
1527 __func__, proxy_rx_cfg.channels);
1528 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1529
1530 return 0;
1531}
1532
1533static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1534 struct snd_ctl_elem_value *ucontrol)
1535{
1536 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1537 pr_debug("%s: proxy_rx channels = %d\n",
1538 __func__, proxy_rx_cfg.channels);
1539
1540 return 1;
1541}
1542
1543static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1544 struct tdm_port *port)
1545{
1546 if (port) {
1547 if (strnstr(kcontrol->id.name, "PRI",
1548 sizeof(kcontrol->id.name))) {
1549 port->mode = TDM_PRI;
1550 } else if (strnstr(kcontrol->id.name, "SEC",
1551 sizeof(kcontrol->id.name))) {
1552 port->mode = TDM_SEC;
1553 } else if (strnstr(kcontrol->id.name, "TERT",
1554 sizeof(kcontrol->id.name))) {
1555 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]1556 } else if (strnstr(kcontrol->id.name, "QUAT",
1557 sizeof(kcontrol->id.name))) {
1558 port->mode = TDM_QUAT;
1559 } else if (strnstr(kcontrol->id.name, "QUIN",
1560 sizeof(kcontrol->id.name))) {
1561 port->mode = TDM_QUIN;
1562 } else if (strnstr(kcontrol->id.name, "SEN",
1563 sizeof(kcontrol->id.name))) {
1564 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1565 } else {
1566 pr_err("%s: unsupported mode in: %s\n",
1567 __func__, kcontrol->id.name);
1568 return -EINVAL;
1569 }
1570
1571 if (strnstr(kcontrol->id.name, "RX_0",
1572 sizeof(kcontrol->id.name)) ||
1573 strnstr(kcontrol->id.name, "TX_0",
1574 sizeof(kcontrol->id.name))) {
1575 port->channel = TDM_0;
1576 } else if (strnstr(kcontrol->id.name, "RX_1",
1577 sizeof(kcontrol->id.name)) ||
1578 strnstr(kcontrol->id.name, "TX_1",
1579 sizeof(kcontrol->id.name))) {
1580 port->channel = TDM_1;
1581 } else if (strnstr(kcontrol->id.name, "RX_2",
1582 sizeof(kcontrol->id.name)) ||
1583 strnstr(kcontrol->id.name, "TX_2",
1584 sizeof(kcontrol->id.name))) {
1585 port->channel = TDM_2;
1586 } else if (strnstr(kcontrol->id.name, "RX_3",
1587 sizeof(kcontrol->id.name)) ||
1588 strnstr(kcontrol->id.name, "TX_3",
1589 sizeof(kcontrol->id.name))) {
1590 port->channel = TDM_3;
1591 } else if (strnstr(kcontrol->id.name, "RX_4",
1592 sizeof(kcontrol->id.name)) ||
1593 strnstr(kcontrol->id.name, "TX_4",
1594 sizeof(kcontrol->id.name))) {
1595 port->channel = TDM_4;
1596 } else if (strnstr(kcontrol->id.name, "RX_5",
1597 sizeof(kcontrol->id.name)) ||
1598 strnstr(kcontrol->id.name, "TX_5",
1599 sizeof(kcontrol->id.name))) {
1600 port->channel = TDM_5;
1601 } else if (strnstr(kcontrol->id.name, "RX_6",
1602 sizeof(kcontrol->id.name)) ||
1603 strnstr(kcontrol->id.name, "TX_6",
1604 sizeof(kcontrol->id.name))) {
1605 port->channel = TDM_6;
1606 } else if (strnstr(kcontrol->id.name, "RX_7",
1607 sizeof(kcontrol->id.name)) ||
1608 strnstr(kcontrol->id.name, "TX_7",
1609 sizeof(kcontrol->id.name))) {
1610 port->channel = TDM_7;
1611 } else {
1612 pr_err("%s: unsupported channel in: %s\n",
1613 __func__, kcontrol->id.name);
1614 return -EINVAL;
1615 }
1616 } else {
1617 return -EINVAL;
1618 }
1619 return 0;
1620}
1621
1622static int tdm_get_sample_rate(int value)
1623{
1624 int sample_rate = 0;
1625
1626 switch (value) {
1627 case 0:
1628 sample_rate = SAMPLING_RATE_8KHZ;
1629 break;
1630 case 1:
1631 sample_rate = SAMPLING_RATE_16KHZ;
1632 break;
1633 case 2:
1634 sample_rate = SAMPLING_RATE_32KHZ;
1635 break;
1636 case 3:
1637 sample_rate = SAMPLING_RATE_48KHZ;
1638 break;
1639 case 4:
1640 sample_rate = SAMPLING_RATE_176P4KHZ;
1641 break;
1642 case 5:
1643 sample_rate = SAMPLING_RATE_352P8KHZ;
1644 break;
1645 default:
1646 sample_rate = SAMPLING_RATE_48KHZ;
1647 break;
1648 }
1649 return sample_rate;
1650}
1651
1652static int tdm_get_sample_rate_val(int sample_rate)
1653{
1654 int sample_rate_val = 0;
1655
1656 switch (sample_rate) {
1657 case SAMPLING_RATE_8KHZ:
1658 sample_rate_val = 0;
1659 break;
1660 case SAMPLING_RATE_16KHZ:
1661 sample_rate_val = 1;
1662 break;
1663 case SAMPLING_RATE_32KHZ:
1664 sample_rate_val = 2;
1665 break;
1666 case SAMPLING_RATE_48KHZ:
1667 sample_rate_val = 3;
1668 break;
1669 case SAMPLING_RATE_176P4KHZ:
1670 sample_rate_val = 4;
1671 break;
1672 case SAMPLING_RATE_352P8KHZ:
1673 sample_rate_val = 5;
1674 break;
1675 default:
1676 sample_rate_val = 3;
1677 break;
1678 }
1679 return sample_rate_val;
1680}
1681
1682static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1683 struct snd_ctl_elem_value *ucontrol)
1684{
1685 struct tdm_port port;
1686 int ret = tdm_get_port_idx(kcontrol, &port);
1687
1688 if (ret) {
1689 pr_err("%s: unsupported control: %s\n",
1690 __func__, kcontrol->id.name);
1691 } else {
1692 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1693 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1694
1695 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1696 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1697 ucontrol->value.enumerated.item[0]);
1698 }
1699 return ret;
1700}
1701
1702static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1703 struct snd_ctl_elem_value *ucontrol)
1704{
1705 struct tdm_port port;
1706 int ret = tdm_get_port_idx(kcontrol, &port);
1707
1708 if (ret) {
1709 pr_err("%s: unsupported control: %s\n",
1710 __func__, kcontrol->id.name);
1711 } else {
1712 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1713 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1714
1715 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1716 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1717 ucontrol->value.enumerated.item[0]);
1718 }
1719 return ret;
1720}
1721
1722static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1723 struct snd_ctl_elem_value *ucontrol)
1724{
1725 struct tdm_port port;
1726 int ret = tdm_get_port_idx(kcontrol, &port);
1727
1728 if (ret) {
1729 pr_err("%s: unsupported control: %s\n",
1730 __func__, kcontrol->id.name);
1731 } else {
1732 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1733 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1734
1735 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1736 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1737 ucontrol->value.enumerated.item[0]);
1738 }
1739 return ret;
1740}
1741
1742static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1743 struct snd_ctl_elem_value *ucontrol)
1744{
1745 struct tdm_port port;
1746 int ret = tdm_get_port_idx(kcontrol, &port);
1747
1748 if (ret) {
1749 pr_err("%s: unsupported control: %s\n",
1750 __func__, kcontrol->id.name);
1751 } else {
1752 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1753 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1754
1755 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1756 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1757 ucontrol->value.enumerated.item[0]);
1758 }
1759 return ret;
1760}
1761
1762static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1763{
1764 int format = 0;
1765
1766 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1767 case 0:
1768 format = SNDRV_PCM_FORMAT_S16_LE;
1769 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1770 case 1:
1771 format = SNDRV_PCM_FORMAT_S24_LE;
1772 break;
1773 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1774 format = SNDRV_PCM_FORMAT_S32_LE;
1775 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1776 default:
1777 format = SNDRV_PCM_FORMAT_S16_LE;
1778 break;
1779 }
1780 return format;
1781}
1782
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1783static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1784{
1785 int value = 0;
1786
1787 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1788 case SNDRV_PCM_FORMAT_S16_LE:
1789 value = 0;
1790 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1791 case SNDRV_PCM_FORMAT_S24_LE:
1792 value = 1;
1793 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1794 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1795 value = 2;
1796 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1797 default:
1798 value = 0;
1799 break;
1800 }
1801 return value;
1802}
1803
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1804static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1805 struct snd_ctl_elem_value *ucontrol)
1806{
1807 struct tdm_port port;
1808 int ret = tdm_get_port_idx(kcontrol, &port);
1809
1810 if (ret) {
1811 pr_err("%s: unsupported control: %s\n",
1812 __func__, kcontrol->id.name);
1813 } else {
1814 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1815 tdm_rx_cfg[port.mode][port.channel].bit_format);
1816
1817 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1818 tdm_rx_cfg[port.mode][port.channel].bit_format,
1819 ucontrol->value.enumerated.item[0]);
1820 }
1821 return ret;
1822}
1823
1824static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1825 struct snd_ctl_elem_value *ucontrol)
1826{
1827 struct tdm_port port;
1828 int ret = tdm_get_port_idx(kcontrol, &port);
1829
1830 if (ret) {
1831 pr_err("%s: unsupported control: %s\n",
1832 __func__, kcontrol->id.name);
1833 } else {
1834 tdm_rx_cfg[port.mode][port.channel].bit_format =
1835 tdm_get_format(ucontrol->value.enumerated.item[0]);
1836
1837 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1838 tdm_rx_cfg[port.mode][port.channel].bit_format,
1839 ucontrol->value.enumerated.item[0]);
1840 }
1841 return ret;
1842}
1843
1844static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1845 struct snd_ctl_elem_value *ucontrol)
1846{
1847 struct tdm_port port;
1848 int ret = tdm_get_port_idx(kcontrol, &port);
1849
1850 if (ret) {
1851 pr_err("%s: unsupported control: %s\n",
1852 __func__, kcontrol->id.name);
1853 } else {
1854 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1855 tdm_tx_cfg[port.mode][port.channel].bit_format);
1856
1857 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1858 tdm_tx_cfg[port.mode][port.channel].bit_format,
1859 ucontrol->value.enumerated.item[0]);
1860 }
1861 return ret;
1862}
1863
1864static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1865 struct snd_ctl_elem_value *ucontrol)
1866{
1867 struct tdm_port port;
1868 int ret = tdm_get_port_idx(kcontrol, &port);
1869
1870 if (ret) {
1871 pr_err("%s: unsupported control: %s\n",
1872 __func__, kcontrol->id.name);
1873 } else {
1874 tdm_tx_cfg[port.mode][port.channel].bit_format =
1875 tdm_get_format(ucontrol->value.enumerated.item[0]);
1876
1877 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1878 tdm_tx_cfg[port.mode][port.channel].bit_format,
1879 ucontrol->value.enumerated.item[0]);
1880 }
1881 return ret;
1882}
1883
1884static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1885 struct snd_ctl_elem_value *ucontrol)
1886{
1887 struct tdm_port port;
1888 int ret = tdm_get_port_idx(kcontrol, &port);
1889
1890 if (ret) {
1891 pr_err("%s: unsupported control: %s\n",
1892 __func__, kcontrol->id.name);
1893 } else {
1894
1895 ucontrol->value.enumerated.item[0] =
1896 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1897
1898 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1899 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1900 ucontrol->value.enumerated.item[0]);
1901 }
1902 return ret;
1903}
1904
1905static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1906 struct snd_ctl_elem_value *ucontrol)
1907{
1908 struct tdm_port port;
1909 int ret = tdm_get_port_idx(kcontrol, &port);
1910
1911 if (ret) {
1912 pr_err("%s: unsupported control: %s\n",
1913 __func__, kcontrol->id.name);
1914 } else {
1915 tdm_rx_cfg[port.mode][port.channel].channels =
1916 ucontrol->value.enumerated.item[0] + 1;
1917
1918 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1919 tdm_rx_cfg[port.mode][port.channel].channels,
1920 ucontrol->value.enumerated.item[0] + 1);
1921 }
1922 return ret;
1923}
1924
1925static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1926 struct snd_ctl_elem_value *ucontrol)
1927{
1928 struct tdm_port port;
1929 int ret = tdm_get_port_idx(kcontrol, &port);
1930
1931 if (ret) {
1932 pr_err("%s: unsupported control: %s\n",
1933 __func__, kcontrol->id.name);
1934 } else {
1935 ucontrol->value.enumerated.item[0] =
1936 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1937
1938 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1939 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1940 ucontrol->value.enumerated.item[0]);
1941 }
1942 return ret;
1943}
1944
1945static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1946 struct snd_ctl_elem_value *ucontrol)
1947{
1948 struct tdm_port port;
1949 int ret = tdm_get_port_idx(kcontrol, &port);
1950
1951 if (ret) {
1952 pr_err("%s: unsupported control: %s\n",
1953 __func__, kcontrol->id.name);
1954 } else {
1955 tdm_tx_cfg[port.mode][port.channel].channels =
1956 ucontrol->value.enumerated.item[0] + 1;
1957
1958 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1959 tdm_tx_cfg[port.mode][port.channel].channels,
1960 ucontrol->value.enumerated.item[0] + 1);
1961 }
1962 return ret;
1963}
1964
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]1965static int tdm_slot_map_put(struct snd_kcontrol *kcontrol,
1966 struct snd_ctl_elem_value *ucontrol)
1967{
1968 int slot_index = 0;
1969 int interface = ucontrol->value.integer.value[0];
1970 int channel = ucontrol->value.integer.value[1];
1971 unsigned int offset_val = 0;
1972 unsigned int *slot_offset = NULL;
1973 struct tdm_dev_config *config = NULL;
1974
1975 if (interface < 0 || interface >= (TDM_INTERFACE_MAX * MAX_PATH)) {
1976 pr_err("%s: incorrect interface = %d\n", __func__, interface);
1977 return -EINVAL;
1978 }
1979 if (channel < 0 || channel >= TDM_PORT_MAX) {
1980 pr_err("%s: incorrect channel = %d\n", __func__, channel);
1981 return -EINVAL;
1982 }
1983
1984 pr_debug("%s: interface = %d, channel = %d\n", __func__,
1985 interface, channel);
1986
1987 config = ((struct tdm_dev_config *) tdm_cfg[interface / MAX_PATH]) +
1988 ((interface % MAX_PATH) * TDM_PORT_MAX) + channel;
1989 slot_offset = config->tdm_slot_offset;
1990
1991 for (slot_index = 0; slot_index < TDM_MAX_SLOTS; slot_index++) {
1992 offset_val = ucontrol->value.integer.value[MAX_PATH +
1993 slot_index];
1994 /* Offset value can only be 0, 4, 8, ..28 */
1995 if (offset_val % 4 == 0 && offset_val <= 28)
1996 slot_offset[slot_index] = offset_val;
1997 pr_debug("%s: slot offset[%d] = %d\n", __func__,
1998 slot_index, slot_offset[slot_index]);
1999 }
2000
2001 return 0;
2002}
2003
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2004static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2005{
2006 int idx = 0;
2007
2008 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2009 sizeof("PRIM_AUX_PCM"))) {
2010 idx = PRIM_AUX_PCM;
2011 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2012 sizeof("SEC_AUX_PCM"))) {
2013 idx = SEC_AUX_PCM;
2014 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2015 sizeof("TERT_AUX_PCM"))) {
2016 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2017 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2018 sizeof("QUAT_AUX_PCM"))) {
2019 idx = QUAT_AUX_PCM;
2020 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2021 sizeof("QUIN_AUX_PCM"))) {
2022 idx = QUIN_AUX_PCM;
2023 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
2024 sizeof("SEN_AUX_PCM"))) {
2025 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2026 } else {
2027 pr_err("%s: unsupported port: %s\n",
2028 __func__, kcontrol->id.name);
2029 idx = -EINVAL;
2030 }
2031
2032 return idx;
2033}
2034
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2035static int aux_pcm_get_sample_rate(int value)
2036{
2037 int sample_rate = 0;
2038
2039 switch (value) {
2040 case 1:
2041 sample_rate = SAMPLING_RATE_16KHZ;
2042 break;
2043 case 0:
2044 default:
2045 sample_rate = SAMPLING_RATE_8KHZ;
2046 break;
2047 }
2048 return sample_rate;
2049}
2050
2051static int aux_pcm_get_sample_rate_val(int sample_rate)
2052{
2053 int sample_rate_val = 0;
2054
2055 switch (sample_rate) {
2056 case SAMPLING_RATE_16KHZ:
2057 sample_rate_val = 1;
2058 break;
2059 case SAMPLING_RATE_8KHZ:
2060 default:
2061 sample_rate_val = 0;
2062 break;
2063 }
2064 return sample_rate_val;
2065}
2066
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2067static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2068{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2069 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2070
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2071 switch (value) {
2072 case 0:
2073 format = SNDRV_PCM_FORMAT_S16_LE;
2074 break;
2075 case 1:
2076 format = SNDRV_PCM_FORMAT_S24_LE;
2077 break;
2078 case 2:
2079 format = SNDRV_PCM_FORMAT_S24_3LE;
2080 break;
2081 case 3:
2082 format = SNDRV_PCM_FORMAT_S32_LE;
2083 break;
2084 default:
2085 format = SNDRV_PCM_FORMAT_S16_LE;
2086 break;
2087 }
2088 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2089}
2090
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2091static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2092{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2093 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2094
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2095 switch (format) {
2096 case SNDRV_PCM_FORMAT_S16_LE:
2097 value = 0;
2098 break;
2099 case SNDRV_PCM_FORMAT_S24_LE:
2100 value = 1;
2101 break;
2102 case SNDRV_PCM_FORMAT_S24_3LE:
2103 value = 2;
2104 break;
2105 case SNDRV_PCM_FORMAT_S32_LE:
2106 value = 3;
2107 break;
2108 default:
2109 value = 0;
2110 break;
2111 }
2112 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2113}
2114
2115static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2116 struct snd_ctl_elem_value *ucontrol)
2117{
2118 int idx = aux_pcm_get_port_idx(kcontrol);
2119
2120 if (idx < 0)
2121 return idx;
2122
2123 ucontrol->value.enumerated.item[0] =
2124 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2125
2126 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2127 idx, aux_pcm_rx_cfg[idx].sample_rate,
2128 ucontrol->value.enumerated.item[0]);
2129
2130 return 0;
2131}
2132
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2133static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2134 struct snd_ctl_elem_value *ucontrol)
2135{
2136 int idx = aux_pcm_get_port_idx(kcontrol);
2137
2138 if (idx < 0)
2139 return idx;
2140
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2141 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2142 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2143
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2144 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2145 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2146 ucontrol->value.enumerated.item[0]);
2147
2148 return 0;
2149}
2150
2151static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2152 struct snd_ctl_elem_value *ucontrol)
2153{
2154 int idx = aux_pcm_get_port_idx(kcontrol);
2155
2156 if (idx < 0)
2157 return idx;
2158
2159 ucontrol->value.enumerated.item[0] =
2160 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2161
2162 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2163 idx, aux_pcm_tx_cfg[idx].sample_rate,
2164 ucontrol->value.enumerated.item[0]);
2165
2166 return 0;
2167}
2168
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2169static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2170 struct snd_ctl_elem_value *ucontrol)
2171{
2172 int idx = aux_pcm_get_port_idx(kcontrol);
2173
2174 if (idx < 0)
2175 return idx;
2176
2177 aux_pcm_tx_cfg[idx].sample_rate =
2178 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2179
2180 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2181 idx, aux_pcm_tx_cfg[idx].sample_rate,
2182 ucontrol->value.enumerated.item[0]);
2183
2184 return 0;
2185}
2186
2187static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
2188 struct snd_ctl_elem_value *ucontrol)
2189{
2190 int idx = aux_pcm_get_port_idx(kcontrol);
2191
2192 if (idx < 0)
2193 return idx;
2194
2195 ucontrol->value.enumerated.item[0] =
2196 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
2197
2198 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2199 idx, aux_pcm_rx_cfg[idx].bit_format,
2200 ucontrol->value.enumerated.item[0]);
2201
2202 return 0;
2203}
2204
2205static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
2206 struct snd_ctl_elem_value *ucontrol)
2207{
2208 int idx = aux_pcm_get_port_idx(kcontrol);
2209
2210 if (idx < 0)
2211 return idx;
2212
2213 aux_pcm_rx_cfg[idx].bit_format =
2214 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2215
2216 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2217 idx, aux_pcm_rx_cfg[idx].bit_format,
2218 ucontrol->value.enumerated.item[0]);
2219
2220 return 0;
2221}
2222
2223static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2224 struct snd_ctl_elem_value *ucontrol)
2225{
2226 int idx = aux_pcm_get_port_idx(kcontrol);
2227
2228 if (idx < 0)
2229 return idx;
2230
2231 ucontrol->value.enumerated.item[0] =
2232 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2233
2234 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2235 idx, aux_pcm_tx_cfg[idx].bit_format,
2236 ucontrol->value.enumerated.item[0]);
2237
2238 return 0;
2239}
2240
2241static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2242 struct snd_ctl_elem_value *ucontrol)
2243{
2244 int idx = aux_pcm_get_port_idx(kcontrol);
2245
2246 if (idx < 0)
2247 return idx;
2248
2249 aux_pcm_tx_cfg[idx].bit_format =
2250 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2251
2252 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2253 idx, aux_pcm_tx_cfg[idx].bit_format,
2254 ucontrol->value.enumerated.item[0]);
2255
2256 return 0;
2257}
2258
2259static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2260{
2261 int idx = 0;
2262
2263 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2264 sizeof("PRIM_MI2S_RX"))) {
2265 idx = PRIM_MI2S;
2266 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2267 sizeof("SEC_MI2S_RX"))) {
2268 idx = SEC_MI2S;
2269 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2270 sizeof("TERT_MI2S_RX"))) {
2271 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2272 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2273 sizeof("QUAT_MI2S_RX"))) {
2274 idx = QUAT_MI2S;
2275 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2276 sizeof("QUIN_MI2S_RX"))) {
2277 idx = QUIN_MI2S;
2278 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2279 sizeof("SEN_MI2S_RX"))) {
2280 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2281 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2282 sizeof("PRIM_MI2S_TX"))) {
2283 idx = PRIM_MI2S;
2284 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2285 sizeof("SEC_MI2S_TX"))) {
2286 idx = SEC_MI2S;
2287 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2288 sizeof("TERT_MI2S_TX"))) {
2289 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2290 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2291 sizeof("QUAT_MI2S_TX"))) {
2292 idx = QUAT_MI2S;
2293 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2294 sizeof("QUIN_MI2S_TX"))) {
2295 idx = QUIN_MI2S;
2296 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2297 sizeof("SEN_MI2S_TX"))) {
2298 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2299 } else {
2300 pr_err("%s: unsupported channel: %s\n",
2301 __func__, kcontrol->id.name);
2302 idx = -EINVAL;
2303 }
2304
2305 return idx;
2306}
2307
2308static int mi2s_get_sample_rate(int value)
2309{
2310 int sample_rate = 0;
2311
2312 switch (value) {
2313 case 0:
2314 sample_rate = SAMPLING_RATE_8KHZ;
2315 break;
2316 case 1:
2317 sample_rate = SAMPLING_RATE_11P025KHZ;
2318 break;
2319 case 2:
2320 sample_rate = SAMPLING_RATE_16KHZ;
2321 break;
2322 case 3:
2323 sample_rate = SAMPLING_RATE_22P05KHZ;
2324 break;
2325 case 4:
2326 sample_rate = SAMPLING_RATE_32KHZ;
2327 break;
2328 case 5:
2329 sample_rate = SAMPLING_RATE_44P1KHZ;
2330 break;
2331 case 6:
2332 sample_rate = SAMPLING_RATE_48KHZ;
2333 break;
2334 case 7:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2335 sample_rate = SAMPLING_RATE_88P2KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2336 break;
2337 case 8:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2338 sample_rate = SAMPLING_RATE_96KHZ;
2339 break;
2340 case 9:
2341 sample_rate = SAMPLING_RATE_176P4KHZ;
2342 break;
2343 case 10:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2344 sample_rate = SAMPLING_RATE_192KHZ;
2345 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2346 case 11:
2347 sample_rate = SAMPLING_RATE_352P8KHZ;
2348 break;
2349 case 12:
2350 sample_rate = SAMPLING_RATE_384KHZ;
2351 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2352 default:
2353 sample_rate = SAMPLING_RATE_48KHZ;
2354 break;
2355 }
2356 return sample_rate;
2357}
2358
2359static int mi2s_get_sample_rate_val(int sample_rate)
2360{
2361 int sample_rate_val = 0;
2362
2363 switch (sample_rate) {
2364 case SAMPLING_RATE_8KHZ:
2365 sample_rate_val = 0;
2366 break;
2367 case SAMPLING_RATE_11P025KHZ:
2368 sample_rate_val = 1;
2369 break;
2370 case SAMPLING_RATE_16KHZ:
2371 sample_rate_val = 2;
2372 break;
2373 case SAMPLING_RATE_22P05KHZ:
2374 sample_rate_val = 3;
2375 break;
2376 case SAMPLING_RATE_32KHZ:
2377 sample_rate_val = 4;
2378 break;
2379 case SAMPLING_RATE_44P1KHZ:
2380 sample_rate_val = 5;
2381 break;
2382 case SAMPLING_RATE_48KHZ:
2383 sample_rate_val = 6;
2384 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2385 case SAMPLING_RATE_88P2KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2386 sample_rate_val = 7;
2387 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2388 case SAMPLING_RATE_96KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2389 sample_rate_val = 8;
2390 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2391 case SAMPLING_RATE_176P4KHZ:
2392 sample_rate_val = 9;
2393 break;
2394 case SAMPLING_RATE_192KHZ:
2395 sample_rate_val = 10;
2396 break;
2397 case SAMPLING_RATE_352P8KHZ:
2398 sample_rate_val = 11;
2399 break;
2400 case SAMPLING_RATE_384KHZ:
2401 sample_rate_val = 12;
2402 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2403 default:
2404 sample_rate_val = 6;
2405 break;
2406 }
2407 return sample_rate_val;
2408}
2409
2410static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2411 struct snd_ctl_elem_value *ucontrol)
2412{
2413 int idx = mi2s_get_port_idx(kcontrol);
2414
2415 if (idx < 0)
2416 return idx;
2417
2418 ucontrol->value.enumerated.item[0] =
2419 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2420
2421 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2422 idx, mi2s_rx_cfg[idx].sample_rate,
2423 ucontrol->value.enumerated.item[0]);
2424
2425 return 0;
2426}
2427
2428static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2429 struct snd_ctl_elem_value *ucontrol)
2430{
2431 int idx = mi2s_get_port_idx(kcontrol);
2432
2433 if (idx < 0)
2434 return idx;
2435
2436 mi2s_rx_cfg[idx].sample_rate =
2437 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2438
2439 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2440 idx, mi2s_rx_cfg[idx].sample_rate,
2441 ucontrol->value.enumerated.item[0]);
2442
2443 return 0;
2444}
2445
2446static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2447 struct snd_ctl_elem_value *ucontrol)
2448{
2449 int idx = mi2s_get_port_idx(kcontrol);
2450
2451 if (idx < 0)
2452 return idx;
2453
2454 ucontrol->value.enumerated.item[0] =
2455 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2456
2457 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2458 idx, mi2s_tx_cfg[idx].sample_rate,
2459 ucontrol->value.enumerated.item[0]);
2460
2461 return 0;
2462}
2463
2464static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2465 struct snd_ctl_elem_value *ucontrol)
2466{
2467 int idx = mi2s_get_port_idx(kcontrol);
2468
2469 if (idx < 0)
2470 return idx;
2471
2472 mi2s_tx_cfg[idx].sample_rate =
2473 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2474
2475 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2476 idx, mi2s_tx_cfg[idx].sample_rate,
2477 ucontrol->value.enumerated.item[0]);
2478
2479 return 0;
2480}
2481
2482static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2483 struct snd_ctl_elem_value *ucontrol)
2484{
2485 int idx = mi2s_get_port_idx(kcontrol);
2486
2487 if (idx < 0)
2488 return idx;
2489
2490 ucontrol->value.enumerated.item[0] =
2491 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2492
2493 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2494 idx, mi2s_rx_cfg[idx].bit_format,
2495 ucontrol->value.enumerated.item[0]);
2496
2497 return 0;
2498}
2499
2500static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2501 struct snd_ctl_elem_value *ucontrol)
2502{
2503 int idx = mi2s_get_port_idx(kcontrol);
2504
2505 if (idx < 0)
2506 return idx;
2507
2508 mi2s_rx_cfg[idx].bit_format =
2509 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2510
2511 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2512 idx, mi2s_rx_cfg[idx].bit_format,
2513 ucontrol->value.enumerated.item[0]);
2514
2515 return 0;
2516}
2517
2518static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2519 struct snd_ctl_elem_value *ucontrol)
2520{
2521 int idx = mi2s_get_port_idx(kcontrol);
2522
2523 if (idx < 0)
2524 return idx;
2525
2526 ucontrol->value.enumerated.item[0] =
2527 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2528
2529 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2530 idx, mi2s_tx_cfg[idx].bit_format,
2531 ucontrol->value.enumerated.item[0]);
2532
2533 return 0;
2534}
2535
2536static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2537 struct snd_ctl_elem_value *ucontrol)
2538{
2539 int idx = mi2s_get_port_idx(kcontrol);
2540
2541 if (idx < 0)
2542 return idx;
2543
2544 mi2s_tx_cfg[idx].bit_format =
2545 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2546
2547 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2548 idx, mi2s_tx_cfg[idx].bit_format,
2549 ucontrol->value.enumerated.item[0]);
2550
2551 return 0;
2552}
2553static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2554 struct snd_ctl_elem_value *ucontrol)
2555{
2556 int idx = mi2s_get_port_idx(kcontrol);
2557
2558 if (idx < 0)
2559 return idx;
2560
2561 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2562 idx, mi2s_rx_cfg[idx].channels);
2563 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2564
2565 return 0;
2566}
2567
2568static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2569 struct snd_ctl_elem_value *ucontrol)
2570{
2571 int idx = mi2s_get_port_idx(kcontrol);
2572
2573 if (idx < 0)
2574 return idx;
2575
2576 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2577 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2578 idx, mi2s_rx_cfg[idx].channels);
2579
2580 return 1;
2581}
2582
2583static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2584 struct snd_ctl_elem_value *ucontrol)
2585{
2586 int idx = mi2s_get_port_idx(kcontrol);
2587
2588 if (idx < 0)
2589 return idx;
2590
2591 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2592 idx, mi2s_tx_cfg[idx].channels);
2593 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2594
2595 return 0;
2596}
2597
2598static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2599 struct snd_ctl_elem_value *ucontrol)
2600{
2601 int idx = mi2s_get_port_idx(kcontrol);
2602
2603 if (idx < 0)
2604 return idx;
2605
2606 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2607 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2608 idx, mi2s_tx_cfg[idx].channels);
2609
2610 return 1;
2611}
2612
2613static int msm_get_port_id(int be_id)
2614{
2615 int afe_port_id = 0;
2616
2617 switch (be_id) {
2618 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2619 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2620 break;
2621 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2622 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2623 break;
2624 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2625 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2626 break;
2627 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2628 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2629 break;
2630 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2631 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2632 break;
2633 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2634 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2635 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2636 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2637 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2638 break;
2639 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2640 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2641 break;
2642 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2643 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2644 break;
2645 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2646 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2647 break;
2648 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2649 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2650 break;
2651 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2652 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2653 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]2654 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2655 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2656 break;
2657 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2658 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2659 break;
2660 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2661 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2662 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2663 default:
2664 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2665 afe_port_id = -EINVAL;
2666 }
2667
2668 return afe_port_id;
2669}
2670
2671static u32 get_mi2s_bits_per_sample(u32 bit_format)
2672{
2673 u32 bit_per_sample = 0;
2674
2675 switch (bit_format) {
2676 case SNDRV_PCM_FORMAT_S32_LE:
2677 case SNDRV_PCM_FORMAT_S24_3LE:
2678 case SNDRV_PCM_FORMAT_S24_LE:
2679 bit_per_sample = 32;
2680 break;
2681 case SNDRV_PCM_FORMAT_S16_LE:
2682 default:
2683 bit_per_sample = 16;
2684 break;
2685 }
2686
2687 return bit_per_sample;
2688}
2689
2690static void update_mi2s_clk_val(int dai_id, int stream)
2691{
2692 u32 bit_per_sample = 0;
2693
2694 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2695 bit_per_sample =
2696 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2697 mi2s_clk[dai_id].clk_freq_in_hz =
2698 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2699 } else {
2700 bit_per_sample =
2701 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2702 mi2s_clk[dai_id].clk_freq_in_hz =
2703 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2704 }
2705}
2706
2707static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2708{
2709 int ret = 0;
2710 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2711 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2712 int port_id = 0;
2713 int index = cpu_dai->id;
2714
2715 port_id = msm_get_port_id(rtd->dai_link->id);
2716 if (port_id < 0) {
2717 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2718 ret = port_id;
2719 goto err;
2720 }
2721
2722 if (enable) {
2723 update_mi2s_clk_val(index, substream->stream);
2724 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2725 mi2s_clk[index].clk_freq_in_hz);
2726 }
2727
2728 mi2s_clk[index].enable = enable;
2729 ret = afe_set_lpass_clock_v2(port_id,
2730 &mi2s_clk[index]);
2731 if (ret < 0) {
2732 dev_err(rtd->card->dev,
2733 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2734 __func__, port_id, ret);
2735 goto err;
2736 }
2737
2738err:
2739 return ret;
2740}
2741
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2742static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2743{
2744 int idx = 0;
2745
2746 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2747 sizeof("WSA_CDC_DMA_RX_0")))
2748 idx = WSA_CDC_DMA_RX_0;
2749 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2750 sizeof("WSA_CDC_DMA_RX_0")))
2751 idx = WSA_CDC_DMA_RX_1;
2752 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2753 sizeof("RX_CDC_DMA_RX_0")))
2754 idx = RX_CDC_DMA_RX_0;
2755 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2756 sizeof("RX_CDC_DMA_RX_1")))
2757 idx = RX_CDC_DMA_RX_1;
2758 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2759 sizeof("RX_CDC_DMA_RX_2")))
2760 idx = RX_CDC_DMA_RX_2;
2761 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2762 sizeof("RX_CDC_DMA_RX_3")))
2763 idx = RX_CDC_DMA_RX_3;
2764 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2765 sizeof("RX_CDC_DMA_RX_5")))
2766 idx = RX_CDC_DMA_RX_5;
2767 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2768 sizeof("WSA_CDC_DMA_TX_0")))
2769 idx = WSA_CDC_DMA_TX_0;
2770 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2771 sizeof("WSA_CDC_DMA_TX_1")))
2772 idx = WSA_CDC_DMA_TX_1;
2773 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2774 sizeof("WSA_CDC_DMA_TX_2")))
2775 idx = WSA_CDC_DMA_TX_2;
2776 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2777 sizeof("TX_CDC_DMA_TX_0")))
2778 idx = TX_CDC_DMA_TX_0;
2779 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2780 sizeof("TX_CDC_DMA_TX_3")))
2781 idx = TX_CDC_DMA_TX_3;
2782 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2783 sizeof("TX_CDC_DMA_TX_4")))
2784 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2785 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2786 sizeof("VA_CDC_DMA_TX_0")))
2787 idx = VA_CDC_DMA_TX_0;
2788 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2789 sizeof("VA_CDC_DMA_TX_1")))
2790 idx = VA_CDC_DMA_TX_1;
2791 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2792 sizeof("VA_CDC_DMA_TX_2")))
2793 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2794 else {
2795 pr_err("%s: unsupported channel: %s\n",
2796 __func__, kcontrol->id.name);
2797 return -EINVAL;
2798 }
2799
2800 return idx;
2801}
2802
2803static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2804 struct snd_ctl_elem_value *ucontrol)
2805{
2806 int ch_num = cdc_dma_get_port_idx(kcontrol);
2807
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2808 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2809 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2810 return ch_num;
2811 }
2812
2813 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2814 cdc_dma_rx_cfg[ch_num].channels - 1);
2815 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2816 return 0;
2817}
2818
2819static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2820 struct snd_ctl_elem_value *ucontrol)
2821{
2822 int ch_num = cdc_dma_get_port_idx(kcontrol);
2823
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2824 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2825 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2826 return ch_num;
2827 }
2828
2829 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2830
2831 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2832 cdc_dma_rx_cfg[ch_num].channels);
2833 return 1;
2834}
2835
2836static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2837 struct snd_ctl_elem_value *ucontrol)
2838{
2839 int ch_num = cdc_dma_get_port_idx(kcontrol);
2840
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2841 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2842 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2843 return ch_num;
2844 }
2845
2846 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2847 case SNDRV_PCM_FORMAT_S32_LE:
2848 ucontrol->value.integer.value[0] = 3;
2849 break;
2850 case SNDRV_PCM_FORMAT_S24_3LE:
2851 ucontrol->value.integer.value[0] = 2;
2852 break;
2853 case SNDRV_PCM_FORMAT_S24_LE:
2854 ucontrol->value.integer.value[0] = 1;
2855 break;
2856 case SNDRV_PCM_FORMAT_S16_LE:
2857 default:
2858 ucontrol->value.integer.value[0] = 0;
2859 break;
2860 }
2861
2862 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2863 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2864 ucontrol->value.integer.value[0]);
2865 return 0;
2866}
2867
2868static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2869 struct snd_ctl_elem_value *ucontrol)
2870{
2871 int rc = 0;
2872 int ch_num = cdc_dma_get_port_idx(kcontrol);
2873
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2874 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2875 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2876 return ch_num;
2877 }
2878
2879 switch (ucontrol->value.integer.value[0]) {
2880 case 3:
2881 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2882 break;
2883 case 2:
2884 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2885 break;
2886 case 1:
2887 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2888 break;
2889 case 0:
2890 default:
2891 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2892 break;
2893 }
2894 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2895 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2896 ucontrol->value.integer.value[0]);
2897
2898 return rc;
2899}
2900
2901
2902static int cdc_dma_get_sample_rate_val(int sample_rate)
2903{
2904 int sample_rate_val = 0;
2905
2906 switch (sample_rate) {
2907 case SAMPLING_RATE_8KHZ:
2908 sample_rate_val = 0;
2909 break;
2910 case SAMPLING_RATE_11P025KHZ:
2911 sample_rate_val = 1;
2912 break;
2913 case SAMPLING_RATE_16KHZ:
2914 sample_rate_val = 2;
2915 break;
2916 case SAMPLING_RATE_22P05KHZ:
2917 sample_rate_val = 3;
2918 break;
2919 case SAMPLING_RATE_32KHZ:
2920 sample_rate_val = 4;
2921 break;
2922 case SAMPLING_RATE_44P1KHZ:
2923 sample_rate_val = 5;
2924 break;
2925 case SAMPLING_RATE_48KHZ:
2926 sample_rate_val = 6;
2927 break;
2928 case SAMPLING_RATE_88P2KHZ:
2929 sample_rate_val = 7;
2930 break;
2931 case SAMPLING_RATE_96KHZ:
2932 sample_rate_val = 8;
2933 break;
2934 case SAMPLING_RATE_176P4KHZ:
2935 sample_rate_val = 9;
2936 break;
2937 case SAMPLING_RATE_192KHZ:
2938 sample_rate_val = 10;
2939 break;
2940 case SAMPLING_RATE_352P8KHZ:
2941 sample_rate_val = 11;
2942 break;
2943 case SAMPLING_RATE_384KHZ:
2944 sample_rate_val = 12;
2945 break;
2946 default:
2947 sample_rate_val = 6;
2948 break;
2949 }
2950 return sample_rate_val;
2951}
2952
2953static int cdc_dma_get_sample_rate(int value)
2954{
2955 int sample_rate = 0;
2956
2957 switch (value) {
2958 case 0:
2959 sample_rate = SAMPLING_RATE_8KHZ;
2960 break;
2961 case 1:
2962 sample_rate = SAMPLING_RATE_11P025KHZ;
2963 break;
2964 case 2:
2965 sample_rate = SAMPLING_RATE_16KHZ;
2966 break;
2967 case 3:
2968 sample_rate = SAMPLING_RATE_22P05KHZ;
2969 break;
2970 case 4:
2971 sample_rate = SAMPLING_RATE_32KHZ;
2972 break;
2973 case 5:
2974 sample_rate = SAMPLING_RATE_44P1KHZ;
2975 break;
2976 case 6:
2977 sample_rate = SAMPLING_RATE_48KHZ;
2978 break;
2979 case 7:
2980 sample_rate = SAMPLING_RATE_88P2KHZ;
2981 break;
2982 case 8:
2983 sample_rate = SAMPLING_RATE_96KHZ;
2984 break;
2985 case 9:
2986 sample_rate = SAMPLING_RATE_176P4KHZ;
2987 break;
2988 case 10:
2989 sample_rate = SAMPLING_RATE_192KHZ;
2990 break;
2991 case 11:
2992 sample_rate = SAMPLING_RATE_352P8KHZ;
2993 break;
2994 case 12:
2995 sample_rate = SAMPLING_RATE_384KHZ;
2996 break;
2997 default:
2998 sample_rate = SAMPLING_RATE_48KHZ;
2999 break;
3000 }
3001 return sample_rate;
3002}
3003
3004static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3005 struct snd_ctl_elem_value *ucontrol)
3006{
3007 int ch_num = cdc_dma_get_port_idx(kcontrol);
3008
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]3009 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3010 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3011 return ch_num;
3012 }
3013
3014 ucontrol->value.enumerated.item[0] =
3015 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
3016
3017 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
3018 cdc_dma_rx_cfg[ch_num].sample_rate);
3019 return 0;
3020}
3021
3022static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3023 struct snd_ctl_elem_value *ucontrol)
3024{
3025 int ch_num = cdc_dma_get_port_idx(kcontrol);
3026
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]3027 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3028 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3029 return ch_num;
3030 }
3031
3032 cdc_dma_rx_cfg[ch_num].sample_rate =
3033 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
3034
3035
3036 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
3037 __func__, ucontrol->value.enumerated.item[0],
3038 cdc_dma_rx_cfg[ch_num].sample_rate);
3039 return 0;
3040}
3041
3042static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
3043 struct snd_ctl_elem_value *ucontrol)
3044{
3045 int ch_num = cdc_dma_get_port_idx(kcontrol);
3046
3047 if (ch_num < 0) {
3048 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3049 return ch_num;
3050 }
3051
3052 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3053 cdc_dma_tx_cfg[ch_num].channels);
3054 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
3055 return 0;
3056}
3057
3058static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
3059 struct snd_ctl_elem_value *ucontrol)
3060{
3061 int ch_num = cdc_dma_get_port_idx(kcontrol);
3062
3063 if (ch_num < 0) {
3064 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3065 return ch_num;
3066 }
3067
3068 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
3069
3070 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3071 cdc_dma_tx_cfg[ch_num].channels);
3072 return 1;
3073}
3074
3075static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3076 struct snd_ctl_elem_value *ucontrol)
3077{
3078 int sample_rate_val;
3079 int ch_num = cdc_dma_get_port_idx(kcontrol);
3080
3081 if (ch_num < 0) {
3082 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3083 return ch_num;
3084 }
3085
3086 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
3087 case SAMPLING_RATE_384KHZ:
3088 sample_rate_val = 12;
3089 break;
3090 case SAMPLING_RATE_352P8KHZ:
3091 sample_rate_val = 11;
3092 break;
3093 case SAMPLING_RATE_192KHZ:
3094 sample_rate_val = 10;
3095 break;
3096 case SAMPLING_RATE_176P4KHZ:
3097 sample_rate_val = 9;
3098 break;
3099 case SAMPLING_RATE_96KHZ:
3100 sample_rate_val = 8;
3101 break;
3102 case SAMPLING_RATE_88P2KHZ:
3103 sample_rate_val = 7;
3104 break;
3105 case SAMPLING_RATE_48KHZ:
3106 sample_rate_val = 6;
3107 break;
3108 case SAMPLING_RATE_44P1KHZ:
3109 sample_rate_val = 5;
3110 break;
3111 case SAMPLING_RATE_32KHZ:
3112 sample_rate_val = 4;
3113 break;
3114 case SAMPLING_RATE_22P05KHZ:
3115 sample_rate_val = 3;
3116 break;
3117 case SAMPLING_RATE_16KHZ:
3118 sample_rate_val = 2;
3119 break;
3120 case SAMPLING_RATE_11P025KHZ:
3121 sample_rate_val = 1;
3122 break;
3123 case SAMPLING_RATE_8KHZ:
3124 sample_rate_val = 0;
3125 break;
3126 default:
3127 sample_rate_val = 6;
3128 break;
3129 }
3130
3131 ucontrol->value.integer.value[0] = sample_rate_val;
3132 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
3133 cdc_dma_tx_cfg[ch_num].sample_rate);
3134 return 0;
3135}
3136
3137static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3138 struct snd_ctl_elem_value *ucontrol)
3139{
3140 int ch_num = cdc_dma_get_port_idx(kcontrol);
3141
3142 if (ch_num < 0) {
3143 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3144 return ch_num;
3145 }
3146
3147 switch (ucontrol->value.integer.value[0]) {
3148 case 12:
3149 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
3150 break;
3151 case 11:
3152 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
3153 break;
3154 case 10:
3155 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
3156 break;
3157 case 9:
3158 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
3159 break;
3160 case 8:
3161 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
3162 break;
3163 case 7:
3164 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
3165 break;
3166 case 6:
3167 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3168 break;
3169 case 5:
3170 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
3171 break;
3172 case 4:
3173 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
3174 break;
3175 case 3:
3176 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
3177 break;
3178 case 2:
3179 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
3180 break;
3181 case 1:
3182 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
3183 break;
3184 case 0:
3185 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
3186 break;
3187 default:
3188 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3189 break;
3190 }
3191
3192 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
3193 __func__, ucontrol->value.integer.value[0],
3194 cdc_dma_tx_cfg[ch_num].sample_rate);
3195 return 0;
3196}
3197
3198static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
3199 struct snd_ctl_elem_value *ucontrol)
3200{
3201 int ch_num = cdc_dma_get_port_idx(kcontrol);
3202
3203 if (ch_num < 0) {
3204 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3205 return ch_num;
3206 }
3207
3208 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
3209 case SNDRV_PCM_FORMAT_S32_LE:
3210 ucontrol->value.integer.value[0] = 3;
3211 break;
3212 case SNDRV_PCM_FORMAT_S24_3LE:
3213 ucontrol->value.integer.value[0] = 2;
3214 break;
3215 case SNDRV_PCM_FORMAT_S24_LE:
3216 ucontrol->value.integer.value[0] = 1;
3217 break;
3218 case SNDRV_PCM_FORMAT_S16_LE:
3219 default:
3220 ucontrol->value.integer.value[0] = 0;
3221 break;
3222 }
3223
3224 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3225 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3226 ucontrol->value.integer.value[0]);
3227 return 0;
3228}
3229
3230static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
3231 struct snd_ctl_elem_value *ucontrol)
3232{
3233 int rc = 0;
3234 int ch_num = cdc_dma_get_port_idx(kcontrol);
3235
3236 if (ch_num < 0) {
3237 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3238 return ch_num;
3239 }
3240
3241 switch (ucontrol->value.integer.value[0]) {
3242 case 3:
3243 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3244 break;
3245 case 2:
3246 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3247 break;
3248 case 1:
3249 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3250 break;
3251 case 0:
3252 default:
3253 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3254 break;
3255 }
3256 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3257 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3258 ucontrol->value.integer.value[0]);
3259
3260 return rc;
3261}
3262
3263static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3264{
3265 int idx = 0;
3266
3267 switch (be_id) {
3268 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3269 idx = WSA_CDC_DMA_RX_0;
3270 break;
3271 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3272 idx = WSA_CDC_DMA_TX_0;
3273 break;
3274 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3275 idx = WSA_CDC_DMA_RX_1;
3276 break;
3277 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3278 idx = WSA_CDC_DMA_TX_1;
3279 break;
3280 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3281 idx = WSA_CDC_DMA_TX_2;
3282 break;
3283 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3284 idx = RX_CDC_DMA_RX_0;
3285 break;
3286 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3287 idx = RX_CDC_DMA_RX_1;
3288 break;
3289 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3290 idx = RX_CDC_DMA_RX_2;
3291 break;
3292 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3293 idx = RX_CDC_DMA_RX_3;
3294 break;
3295 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3296 idx = RX_CDC_DMA_RX_5;
3297 break;
3298 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3299 idx = TX_CDC_DMA_TX_0;
3300 break;
3301 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3302 idx = TX_CDC_DMA_TX_3;
3303 break;
3304 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3305 idx = TX_CDC_DMA_TX_4;
3306 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3307 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3308 idx = VA_CDC_DMA_TX_0;
3309 break;
3310 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3311 idx = VA_CDC_DMA_TX_1;
3312 break;
3313 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3314 idx = VA_CDC_DMA_TX_2;
3315 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3316 default:
3317 idx = RX_CDC_DMA_RX_0;
3318 break;
3319 }
3320
3321 return idx;
3322}
3323
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3324static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3325 struct snd_ctl_elem_value *ucontrol)
3326{
3327 /*
3328 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3329 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3330 * value.
3331 */
3332 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3333 case SAMPLING_RATE_96KHZ:
3334 ucontrol->value.integer.value[0] = 5;
3335 break;
3336 case SAMPLING_RATE_88P2KHZ:
3337 ucontrol->value.integer.value[0] = 4;
3338 break;
3339 case SAMPLING_RATE_48KHZ:
3340 ucontrol->value.integer.value[0] = 3;
3341 break;
3342 case SAMPLING_RATE_44P1KHZ:
3343 ucontrol->value.integer.value[0] = 2;
3344 break;
3345 case SAMPLING_RATE_16KHZ:
3346 ucontrol->value.integer.value[0] = 1;
3347 break;
3348 case SAMPLING_RATE_8KHZ:
3349 default:
3350 ucontrol->value.integer.value[0] = 0;
3351 break;
3352 }
3353 pr_debug("%s: sample rate = %d\n", __func__,
3354 slim_rx_cfg[SLIM_RX_7].sample_rate);
3355
3356 return 0;
3357}
3358
3359static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3360 struct snd_ctl_elem_value *ucontrol)
3361{
3362 switch (ucontrol->value.integer.value[0]) {
3363 case 1:
3364 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3365 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3366 break;
3367 case 2:
3368 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3369 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3370 break;
3371 case 3:
3372 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3373 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3374 break;
3375 case 4:
3376 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3377 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3378 break;
3379 case 5:
3380 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3381 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3382 break;
3383 case 0:
3384 default:
3385 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3386 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3387 break;
3388 }
3389 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3390 __func__,
3391 slim_rx_cfg[SLIM_RX_7].sample_rate,
3392 slim_tx_cfg[SLIM_TX_7].sample_rate,
3393 ucontrol->value.enumerated.item[0]);
3394
3395 return 0;
3396}
3397
3398static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3399 struct snd_ctl_elem_value *ucontrol)
3400{
3401 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3402 case SAMPLING_RATE_96KHZ:
3403 ucontrol->value.integer.value[0] = 5;
3404 break;
3405 case SAMPLING_RATE_88P2KHZ:
3406 ucontrol->value.integer.value[0] = 4;
3407 break;
3408 case SAMPLING_RATE_48KHZ:
3409 ucontrol->value.integer.value[0] = 3;
3410 break;
3411 case SAMPLING_RATE_44P1KHZ:
3412 ucontrol->value.integer.value[0] = 2;
3413 break;
3414 case SAMPLING_RATE_16KHZ:
3415 ucontrol->value.integer.value[0] = 1;
3416 break;
3417 case SAMPLING_RATE_8KHZ:
3418 default:
3419 ucontrol->value.integer.value[0] = 0;
3420 break;
3421 }
3422 pr_debug("%s: sample rate rx = %d\n", __func__,
3423 slim_rx_cfg[SLIM_RX_7].sample_rate);
3424
3425 return 0;
3426}
3427
3428static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3429 struct snd_ctl_elem_value *ucontrol)
3430{
3431 switch (ucontrol->value.integer.value[0]) {
3432 case 1:
3433 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3434 break;
3435 case 2:
3436 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3437 break;
3438 case 3:
3439 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3440 break;
3441 case 4:
3442 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3443 break;
3444 case 5:
3445 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3446 break;
3447 case 0:
3448 default:
3449 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3450 break;
3451 }
3452 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3453 __func__,
3454 slim_rx_cfg[SLIM_RX_7].sample_rate,
3455 ucontrol->value.enumerated.item[0]);
3456
3457 return 0;
3458}
3459
3460static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3461 struct snd_ctl_elem_value *ucontrol)
3462{
3463 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3464 case SAMPLING_RATE_96KHZ:
3465 ucontrol->value.integer.value[0] = 5;
3466 break;
3467 case SAMPLING_RATE_88P2KHZ:
3468 ucontrol->value.integer.value[0] = 4;
3469 break;
3470 case SAMPLING_RATE_48KHZ:
3471 ucontrol->value.integer.value[0] = 3;
3472 break;
3473 case SAMPLING_RATE_44P1KHZ:
3474 ucontrol->value.integer.value[0] = 2;
3475 break;
3476 case SAMPLING_RATE_16KHZ:
3477 ucontrol->value.integer.value[0] = 1;
3478 break;
3479 case SAMPLING_RATE_8KHZ:
3480 default:
3481 ucontrol->value.integer.value[0] = 0;
3482 break;
3483 }
3484 pr_debug("%s: sample rate tx = %d\n", __func__,
3485 slim_tx_cfg[SLIM_TX_7].sample_rate);
3486
3487 return 0;
3488}
3489
3490static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3491 struct snd_ctl_elem_value *ucontrol)
3492{
3493 switch (ucontrol->value.integer.value[0]) {
3494 case 1:
3495 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3496 break;
3497 case 2:
3498 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3499 break;
3500 case 3:
3501 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3502 break;
3503 case 4:
3504 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3505 break;
3506 case 5:
3507 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3508 break;
3509 case 0:
3510 default:
3511 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3512 break;
3513 }
3514 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3515 __func__,
3516 slim_tx_cfg[SLIM_TX_7].sample_rate,
3517 ucontrol->value.enumerated.item[0]);
3518
3519 return 0;
3520}
3521
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3522static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3523 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3524 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3525 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3526 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3527 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3528 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3529 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3530 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3531 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3532 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3533 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3534 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3535 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3536 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3537 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3538 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3539 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3540 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3541 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3542 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3543 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3544 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3545 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3546 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3547 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3548 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3549 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3550 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3551 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3552 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3553 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3554 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3555 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3556 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3557 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3558 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3559 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3560 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3561 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3562 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3563 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3564 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3565 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3566 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3567 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3568 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3569 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3570 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3571 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3572 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3573 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3574 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3575 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3576 wsa_cdc_dma_rx_0_sample_rate,
3577 cdc_dma_rx_sample_rate_get,
3578 cdc_dma_rx_sample_rate_put),
3579 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3580 wsa_cdc_dma_rx_1_sample_rate,
3581 cdc_dma_rx_sample_rate_get,
3582 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3583 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3584 wsa_cdc_dma_tx_0_sample_rate,
3585 cdc_dma_tx_sample_rate_get,
3586 cdc_dma_tx_sample_rate_put),
3587 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3588 wsa_cdc_dma_tx_1_sample_rate,
3589 cdc_dma_tx_sample_rate_get,
3590 cdc_dma_tx_sample_rate_put),
3591 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3592 wsa_cdc_dma_tx_2_sample_rate,
3593 cdc_dma_tx_sample_rate_get,
3594 cdc_dma_tx_sample_rate_put),
3595 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3596 tx_cdc_dma_tx_0_sample_rate,
3597 cdc_dma_tx_sample_rate_get,
3598 cdc_dma_tx_sample_rate_put),
3599 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3600 tx_cdc_dma_tx_3_sample_rate,
3601 cdc_dma_tx_sample_rate_get,
3602 cdc_dma_tx_sample_rate_put),
3603 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3604 tx_cdc_dma_tx_4_sample_rate,
3605 cdc_dma_tx_sample_rate_get,
3606 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3607 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3608 va_cdc_dma_tx_0_sample_rate,
3609 cdc_dma_tx_sample_rate_get,
3610 cdc_dma_tx_sample_rate_put),
3611 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3612 va_cdc_dma_tx_1_sample_rate,
3613 cdc_dma_tx_sample_rate_get,
3614 cdc_dma_tx_sample_rate_put),
3615 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3616 va_cdc_dma_tx_2_sample_rate,
3617 cdc_dma_tx_sample_rate_get,
3618 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3619};
3620
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]3621static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3622 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3623 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3624 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3625 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3626 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3627 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3628 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3629 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3630 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3631 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3632 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3633 rx_cdc80_dma_rx_0_sample_rate,
3634 cdc_dma_rx_sample_rate_get,
3635 cdc_dma_rx_sample_rate_put),
3636 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3637 rx_cdc80_dma_rx_1_sample_rate,
3638 cdc_dma_rx_sample_rate_get,
3639 cdc_dma_rx_sample_rate_put),
3640 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3641 rx_cdc80_dma_rx_2_sample_rate,
3642 cdc_dma_rx_sample_rate_get,
3643 cdc_dma_rx_sample_rate_put),
3644 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3645 rx_cdc80_dma_rx_3_sample_rate,
3646 cdc_dma_rx_sample_rate_get,
3647 cdc_dma_rx_sample_rate_put),
3648 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3649 rx_cdc80_dma_rx_5_sample_rate,
3650 cdc_dma_rx_sample_rate_get,
3651 cdc_dma_rx_sample_rate_put),
3652};
3653
3654static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3655 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3656 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3657 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3658 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3659 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3660 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3661 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3662 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3663 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3664 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3665 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3666 rx_cdc85_dma_rx_0_sample_rate,
3667 cdc_dma_rx_sample_rate_get,
3668 cdc_dma_rx_sample_rate_put),
3669 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3670 rx_cdc85_dma_rx_1_sample_rate,
3671 cdc_dma_rx_sample_rate_get,
3672 cdc_dma_rx_sample_rate_put),
3673 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3674 rx_cdc85_dma_rx_2_sample_rate,
3675 cdc_dma_rx_sample_rate_get,
3676 cdc_dma_rx_sample_rate_put),
3677 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3678 rx_cdc85_dma_rx_3_sample_rate,
3679 cdc_dma_rx_sample_rate_get,
3680 cdc_dma_rx_sample_rate_put),
3681 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3682 rx_cdc85_dma_rx_5_sample_rate,
3683 cdc_dma_rx_sample_rate_get,
3684 cdc_dma_rx_sample_rate_put),
3685};
3686
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3687static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3688 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3689 usb_audio_rx_sample_rate_get,
3690 usb_audio_rx_sample_rate_put),
3691 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3692 usb_audio_tx_sample_rate_get,
3693 usb_audio_tx_sample_rate_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame^]3694 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3695 usb_audio_rx_format_get, usb_audio_rx_format_put),
3696 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3697 usb_audio_tx_format_get, usb_audio_tx_format_put),
3698 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3699 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3700 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3701 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3702 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3703 proxy_rx_ch_get, proxy_rx_ch_put),
3704 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3705 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3706 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3707 ext_disp_rx_format_get, ext_disp_rx_format_put),
3708 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3709 ext_disp_rx_sample_rate_get,
3710 ext_disp_rx_sample_rate_put),
3711 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3712 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3713 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3714 ext_disp_rx_format_get, ext_disp_rx_format_put),
3715 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3716 ext_disp_rx_sample_rate_get,
3717 ext_disp_rx_sample_rate_put),
3718 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3719 msm_bt_sample_rate_get,
3720 msm_bt_sample_rate_put),
3721 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3722 msm_bt_sample_rate_rx_get,
3723 msm_bt_sample_rate_rx_put),
3724 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3725 msm_bt_sample_rate_tx_get,
3726 msm_bt_sample_rate_tx_put),
3727 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3728 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3729 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3730 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3731};
3732
3733static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3734 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3735 tdm_rx_sample_rate_get,
3736 tdm_rx_sample_rate_put),
3737 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3738 tdm_rx_sample_rate_get,
3739 tdm_rx_sample_rate_put),
3740 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3741 tdm_rx_sample_rate_get,
3742 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3743 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3744 tdm_rx_sample_rate_get,
3745 tdm_rx_sample_rate_put),
3746 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3747 tdm_rx_sample_rate_get,
3748 tdm_rx_sample_rate_put),
3749 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3750 tdm_rx_sample_rate_get,
3751 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3752 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3753 tdm_tx_sample_rate_get,
3754 tdm_tx_sample_rate_put),
3755 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3756 tdm_tx_sample_rate_get,
3757 tdm_tx_sample_rate_put),
3758 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3759 tdm_tx_sample_rate_get,
3760 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3761 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3762 tdm_tx_sample_rate_get,
3763 tdm_tx_sample_rate_put),
3764 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3765 tdm_tx_sample_rate_get,
3766 tdm_tx_sample_rate_put),
3767 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3768 tdm_tx_sample_rate_get,
3769 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3770 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3771 tdm_rx_format_get,
3772 tdm_rx_format_put),
3773 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3774 tdm_rx_format_get,
3775 tdm_rx_format_put),
3776 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3777 tdm_rx_format_get,
3778 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3779 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3780 tdm_rx_format_get,
3781 tdm_rx_format_put),
3782 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3783 tdm_rx_format_get,
3784 tdm_rx_format_put),
3785 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3786 tdm_rx_format_get,
3787 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3788 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3789 tdm_tx_format_get,
3790 tdm_tx_format_put),
3791 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3792 tdm_tx_format_get,
3793 tdm_tx_format_put),
3794 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3795 tdm_tx_format_get,
3796 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3797 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3798 tdm_tx_format_get,
3799 tdm_tx_format_put),
3800 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3801 tdm_tx_format_get,
3802 tdm_tx_format_put),
3803 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3804 tdm_tx_format_get,
3805 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3806 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3807 tdm_rx_ch_get,
3808 tdm_rx_ch_put),
3809 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3810 tdm_rx_ch_get,
3811 tdm_rx_ch_put),
3812 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3813 tdm_rx_ch_get,
3814 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3815 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3816 tdm_rx_ch_get,
3817 tdm_rx_ch_put),
3818 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3819 tdm_rx_ch_get,
3820 tdm_rx_ch_put),
3821 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3822 tdm_rx_ch_get,
3823 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3824 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3825 tdm_tx_ch_get,
3826 tdm_tx_ch_put),
3827 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3828 tdm_tx_ch_get,
3829 tdm_tx_ch_put),
3830 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3831 tdm_tx_ch_get,
3832 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3833 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3834 tdm_tx_ch_get,
3835 tdm_tx_ch_put),
3836 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3837 tdm_tx_ch_get,
3838 tdm_tx_ch_put),
3839 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3840 tdm_tx_ch_get,
3841 tdm_tx_ch_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame^]3842 SOC_SINGLE_MULTI_EXT("TDM Slot Map", SND_SOC_NOPM, 0, 255, 0,
3843 TDM_MAX_SLOTS + MAX_PATH, NULL, tdm_slot_map_put),
3844};
3845
3846static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
3847 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3848 aux_pcm_rx_sample_rate_get,
3849 aux_pcm_rx_sample_rate_put),
3850 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3851 aux_pcm_rx_sample_rate_get,
3852 aux_pcm_rx_sample_rate_put),
3853 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3854 aux_pcm_rx_sample_rate_get,
3855 aux_pcm_rx_sample_rate_put),
3856 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3857 aux_pcm_rx_sample_rate_get,
3858 aux_pcm_rx_sample_rate_put),
3859 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3860 aux_pcm_rx_sample_rate_get,
3861 aux_pcm_rx_sample_rate_put),
3862 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3863 aux_pcm_rx_sample_rate_get,
3864 aux_pcm_rx_sample_rate_put),
3865 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3866 aux_pcm_tx_sample_rate_get,
3867 aux_pcm_tx_sample_rate_put),
3868 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3869 aux_pcm_tx_sample_rate_get,
3870 aux_pcm_tx_sample_rate_put),
3871 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3872 aux_pcm_tx_sample_rate_get,
3873 aux_pcm_tx_sample_rate_put),
3874 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3875 aux_pcm_tx_sample_rate_get,
3876 aux_pcm_tx_sample_rate_put),
3877 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3878 aux_pcm_tx_sample_rate_get,
3879 aux_pcm_tx_sample_rate_put),
3880 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3881 aux_pcm_tx_sample_rate_get,
3882 aux_pcm_tx_sample_rate_put),
3883 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3884 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3885 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3886 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3887 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3888 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3889 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3890 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3891 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3892 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3893 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3894 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3895 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3896 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3897 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3898 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3899 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3900 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3901 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3902 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3903 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3904 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3905 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3906 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3907};
3908
3909static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
3910 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3911 mi2s_rx_sample_rate_get,
3912 mi2s_rx_sample_rate_put),
3913 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3914 mi2s_rx_sample_rate_get,
3915 mi2s_rx_sample_rate_put),
3916 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3917 mi2s_rx_sample_rate_get,
3918 mi2s_rx_sample_rate_put),
3919 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3920 mi2s_rx_sample_rate_get,
3921 mi2s_rx_sample_rate_put),
3922 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3923 mi2s_rx_sample_rate_get,
3924 mi2s_rx_sample_rate_put),
3925 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3926 mi2s_rx_sample_rate_get,
3927 mi2s_rx_sample_rate_put),
3928 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3929 mi2s_tx_sample_rate_get,
3930 mi2s_tx_sample_rate_put),
3931 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3932 mi2s_tx_sample_rate_get,
3933 mi2s_tx_sample_rate_put),
3934 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3935 mi2s_tx_sample_rate_get,
3936 mi2s_tx_sample_rate_put),
3937 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3938 mi2s_tx_sample_rate_get,
3939 mi2s_tx_sample_rate_put),
3940 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3941 mi2s_tx_sample_rate_get,
3942 mi2s_tx_sample_rate_put),
3943 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
3944 mi2s_tx_sample_rate_get,
3945 mi2s_tx_sample_rate_put),
3946 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3947 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3948 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3949 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3950 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3951 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3952 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3953 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3954 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3955 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3956 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
3957 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3958 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3959 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3960 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3961 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3962 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3963 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3964 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3965 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3966 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3967 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3968 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
3969 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3970 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3971 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3972 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3973 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3974 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3975 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3976 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3977 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3978 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3979 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3980 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
3981 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3982 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3983 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3984 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3985 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3986 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3987 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3988 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3989 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3990 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3991 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3992 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
3993 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3994};
3995
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]3996static const struct snd_kcontrol_new msm_snd_controls[] = {
3997 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3998 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3999 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
4000 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4001 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
4002 aux_pcm_rx_sample_rate_get,
4003 aux_pcm_rx_sample_rate_put),
4004 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
4005 aux_pcm_tx_sample_rate_get,
4006 aux_pcm_tx_sample_rate_put),
4007};
4008
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4009static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4010{
4011 int idx;
4012
4013 switch (be_id) {
4014 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4015 idx = EXT_DISP_RX_IDX_DP;
4016 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4017 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
4018 idx = EXT_DISP_RX_IDX_DP1;
4019 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4020 default:
4021 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4022 idx = -EINVAL;
4023 break;
4024 }
4025
4026 return idx;
4027}
4028
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4029static int kona_send_island_va_config(int32_t be_id)
4030{
4031 int rc = 0;
4032 int port_id = 0xFFFF;
4033
4034 port_id = msm_get_port_id(be_id);
4035 if (port_id < 0) {
4036 pr_err("%s: Invalid island interface, be_id: %d\n",
4037 __func__, be_id);
4038 rc = -EINVAL;
4039 } else {
4040 /*
4041 * send island mode config
4042 * This should be the first configuration
4043 */
4044 rc = afe_send_port_island_mode(port_id);
4045 if (rc)
4046 pr_err("%s: afe send island mode failed %d\n",
4047 __func__, rc);
4048 }
4049
4050 return rc;
4051}
4052
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4053static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4054 struct snd_pcm_hw_params *params)
4055{
4056 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4057 struct snd_interval *rate = hw_param_interval(params,
4058 SNDRV_PCM_HW_PARAM_RATE);
4059 struct snd_interval *channels = hw_param_interval(params,
4060 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4061 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4062
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4063 pr_debug("%s: dai_id= %d, format = %d, rate = %d\n",
4064 __func__, dai_link->id, params_format(params),
4065 params_rate(params));
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4066
4067 switch (dai_link->id) {
4068 case MSM_BACKEND_DAI_USB_RX:
4069 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4070 usb_rx_cfg.bit_format);
4071 rate->min = rate->max = usb_rx_cfg.sample_rate;
4072 channels->min = channels->max = usb_rx_cfg.channels;
4073 break;
4074
4075 case MSM_BACKEND_DAI_USB_TX:
4076 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4077 usb_tx_cfg.bit_format);
4078 rate->min = rate->max = usb_tx_cfg.sample_rate;
4079 channels->min = channels->max = usb_tx_cfg.channels;
4080 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4081
4082 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4083 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4084 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4085 if (idx < 0) {
4086 pr_err("%s: Incorrect ext disp idx %d\n",
4087 __func__, idx);
4088 rc = idx;
4089 goto done;
4090 }
4091
4092 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4093 ext_disp_rx_cfg[idx].bit_format);
4094 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4095 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4096 break;
4097
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4098 case MSM_BACKEND_DAI_AFE_PCM_RX:
4099 channels->min = channels->max = proxy_rx_cfg.channels;
4100 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4101 break;
4102
4103 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4104 channels->min = channels->max =
4105 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4106 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4107 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4108 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4109 break;
4110
4111 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4112 channels->min = channels->max =
4113 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4114 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4115 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4116 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4117 break;
4118
4119 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4120 channels->min = channels->max =
4121 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4122 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4123 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4124 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4125 break;
4126
4127 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4128 channels->min = channels->max =
4129 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4130 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4131 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4132 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4133 break;
4134
4135 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4136 channels->min = channels->max =
4137 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4138 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4139 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4140 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4141 break;
4142
4143 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4144 channels->min = channels->max =
4145 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4146 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4147 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4148 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4149 break;
4150
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4151 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4152 channels->min = channels->max =
4153 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4154 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4155 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4156 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4157 break;
4158
4159 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4160 channels->min = channels->max =
4161 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4162 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4163 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4164 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4165 break;
4166
4167 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4168 channels->min = channels->max =
4169 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4170 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4171 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4172 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4173 break;
4174
4175 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4176 channels->min = channels->max =
4177 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4178 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4179 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4180 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4181 break;
4182
4183 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
4184 channels->min = channels->max =
4185 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4186 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4187 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
4188 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
4189 break;
4190
4191 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
4192 channels->min = channels->max =
4193 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4194 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4195 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
4196 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
4197 break;
4198
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4199 case MSM_BACKEND_DAI_AUXPCM_RX:
4200 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4201 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4202 rate->min = rate->max =
4203 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4204 channels->min = channels->max =
4205 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4206 break;
4207
4208 case MSM_BACKEND_DAI_AUXPCM_TX:
4209 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4210 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4211 rate->min = rate->max =
4212 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4213 channels->min = channels->max =
4214 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4215 break;
4216
4217 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4218 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4219 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4220 rate->min = rate->max =
4221 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4222 channels->min = channels->max =
4223 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4224 break;
4225
4226 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4227 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4228 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4229 rate->min = rate->max =
4230 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4231 channels->min = channels->max =
4232 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4233 break;
4234
4235 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4236 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4237 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4238 rate->min = rate->max =
4239 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4240 channels->min = channels->max =
4241 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4242 break;
4243
4244 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4245 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4246 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4247 rate->min = rate->max =
4248 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4249 channels->min = channels->max =
4250 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4251 break;
4252
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4253 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4255 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4256 rate->min = rate->max =
4257 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4258 channels->min = channels->max =
4259 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4260 break;
4261
4262 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4263 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4264 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4265 rate->min = rate->max =
4266 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4267 channels->min = channels->max =
4268 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4269 break;
4270
4271 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4272 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4273 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4274 rate->min = rate->max =
4275 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4276 channels->min = channels->max =
4277 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4278 break;
4279
4280 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4281 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4282 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4283 rate->min = rate->max =
4284 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4285 channels->min = channels->max =
4286 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4287 break;
4288
4289 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4290 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4291 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4292 rate->min = rate->max =
4293 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4294 channels->min = channels->max =
4295 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4296 break;
4297
4298 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4299 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4300 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4301 rate->min = rate->max =
4302 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4303 channels->min = channels->max =
4304 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4305 break;
4306
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4307 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4308 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4309 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4310 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4311 channels->min = channels->max =
4312 mi2s_rx_cfg[PRIM_MI2S].channels;
4313 break;
4314
4315 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4316 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4317 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4318 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4319 channels->min = channels->max =
4320 mi2s_tx_cfg[PRIM_MI2S].channels;
4321 break;
4322
4323 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4324 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4325 mi2s_rx_cfg[SEC_MI2S].bit_format);
4326 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4327 channels->min = channels->max =
4328 mi2s_rx_cfg[SEC_MI2S].channels;
4329 break;
4330
4331 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4332 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4333 mi2s_tx_cfg[SEC_MI2S].bit_format);
4334 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4335 channels->min = channels->max =
4336 mi2s_tx_cfg[SEC_MI2S].channels;
4337 break;
4338
4339 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4340 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4341 mi2s_rx_cfg[TERT_MI2S].bit_format);
4342 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4343 channels->min = channels->max =
4344 mi2s_rx_cfg[TERT_MI2S].channels;
4345 break;
4346
4347 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4348 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4349 mi2s_tx_cfg[TERT_MI2S].bit_format);
4350 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4351 channels->min = channels->max =
4352 mi2s_tx_cfg[TERT_MI2S].channels;
4353 break;
4354
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4355 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4356 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4357 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4358 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4359 channels->min = channels->max =
4360 mi2s_rx_cfg[QUAT_MI2S].channels;
4361 break;
4362
4363 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4364 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4365 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4366 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4367 channels->min = channels->max =
4368 mi2s_tx_cfg[QUAT_MI2S].channels;
4369 break;
4370
4371 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4372 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4373 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4374 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4375 channels->min = channels->max =
4376 mi2s_rx_cfg[QUIN_MI2S].channels;
4377 break;
4378
4379 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4380 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4381 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4382 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4383 channels->min = channels->max =
4384 mi2s_tx_cfg[QUIN_MI2S].channels;
4385 break;
4386
4387 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4388 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4389 mi2s_rx_cfg[SEN_MI2S].bit_format);
4390 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4391 channels->min = channels->max =
4392 mi2s_rx_cfg[SEN_MI2S].channels;
4393 break;
4394
4395 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4396 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4397 mi2s_tx_cfg[SEN_MI2S].bit_format);
4398 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4399 channels->min = channels->max =
4400 mi2s_tx_cfg[SEN_MI2S].channels;
4401 break;
4402
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4403 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4404 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4405 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4406 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4407 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4408 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4409 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4410 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4411 cdc_dma_rx_cfg[idx].bit_format);
4412 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4413 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4414 break;
4415
4416 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4417 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4418 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4419 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4420 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4421 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4422 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4423 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4424 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4425 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4426 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4427 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4428 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4429 break;
4430
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4431 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4432 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4433 SNDRV_PCM_FORMAT_S32_LE);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4434 rate->min = rate->max = SAMPLING_RATE_8KHZ;
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4435 channels->min = channels->max = msm_vi_feed_tx_ch;
4436 break;
4437
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4438 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4439 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4440 slim_rx_cfg[SLIM_RX_7].bit_format);
4441 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4442 channels->min = channels->max =
4443 slim_rx_cfg[SLIM_RX_7].channels;
4444 break;
4445
4446 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlad7df1232019-11-29 19:39:17 +0530[diff] [blame]4447 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4448 slim_tx_cfg[SLIM_TX_7].bit_format);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4449 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4450 channels->min = channels->max =
4451 slim_tx_cfg[SLIM_TX_7].channels;
4452 break;
4453
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4454 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4455 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4456 channels->min = channels->max =
4457 slim_tx_cfg[SLIM_TX_8].channels;
4458 break;
4459
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4460 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4461 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4462 afe_loopback_tx_cfg[idx].bit_format);
4463 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4464 channels->min = channels->max =
4465 afe_loopback_tx_cfg[idx].channels;
4466 break;
4467
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4468 default:
4469 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4470 break;
4471 }
4472
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4473done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4474 return rc;
4475}
4476
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]4477static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4478{
4479 struct snd_soc_card *card = component->card;
4480 struct msm_asoc_mach_data *pdata =
4481 snd_soc_card_get_drvdata(card);
4482
4483 if (!pdata->fsa_handle)
4484 return false;
4485
4486 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4487}
4488
4489static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4490{
4491 int value = 0;
4492 bool ret = false;
4493 struct snd_soc_card *card;
4494 struct msm_asoc_mach_data *pdata;
4495
4496 if (!component) {
4497 pr_err("%s component is NULL\n", __func__);
4498 return false;
4499 }
4500 card = component->card;
4501 pdata = snd_soc_card_get_drvdata(card);
4502
4503 if (!pdata)
4504 return false;
4505
4506 if (wcd_mbhc_cfg.enable_usbc_analog)
4507 return msm_usbc_swap_gnd_mic(component, active);
4508
4509 /* if usbc is not defined, swap using us_euro_gpio_p */
4510 if (pdata->us_euro_gpio_p) {
4511 value = msm_cdc_pinctrl_get_state(
4512 pdata->us_euro_gpio_p);
4513 if (value)
4514 msm_cdc_pinctrl_select_sleep_state(
4515 pdata->us_euro_gpio_p);
4516 else
4517 msm_cdc_pinctrl_select_active_state(
4518 pdata->us_euro_gpio_p);
4519 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4520 __func__, value, !value);
4521 ret = true;
4522 }
4523
4524 return ret;
4525}
4526
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4527static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4528 struct snd_pcm_hw_params *params)
4529{
4530 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4531 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4532 int ret = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4533 int slot_width = TDM_SLOT_WIDTH_BITS;
4534 int channels, slots = TDM_MAX_SLOTS;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4535 unsigned int slot_mask, rate, clk_freq;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4536 unsigned int *slot_offset;
4537 struct tdm_dev_config *config;
4538 unsigned int path_dir = 0, interface = 0, channel_interface = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4539
4540 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4541
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4542 if (cpu_dai->id < AFE_PORT_ID_TDM_PORT_RANGE_START) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4543 pr_err("%s: dai id 0x%x not supported\n",
4544 __func__, cpu_dai->id);
4545 return -EINVAL;
4546 }
4547
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4548 /* RX or TX */
4549 path_dir = cpu_dai->id % MAX_PATH;
4550
4551 /* PRI, SEC, TERT, QUAT, QUIN, ... */
4552 interface = (cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START)
4553 / (MAX_PATH * TDM_PORT_MAX);
4554
4555 /* 0, 1, 2, .. 7 */
4556 channel_interface =
4557 ((cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START) / MAX_PATH)
4558 % TDM_PORT_MAX;
4559
4560 pr_debug("%s: path dir: %u, interface %u, channel interface %u\n",
4561 __func__, path_dir, interface, channel_interface);
4562
4563 config = ((struct tdm_dev_config *) tdm_cfg[interface]) +
4564 (path_dir * TDM_PORT_MAX) + channel_interface;
4565 slot_offset = config->tdm_slot_offset;
4566
4567 if (path_dir)
4568 channels = tdm_tx_cfg[interface][channel_interface].channels;
4569 else
4570 channels = tdm_rx_cfg[interface][channel_interface].channels;
4571
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4572 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4573 /*2 slot config - bits 0 and 1 set for the first two slots */
4574 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4575
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4576 pr_debug("%s: tdm rx slot_width %d slots %d slot_mask %x\n",
4577 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4578
4579 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4580 slots, slot_width);
4581 if (ret < 0) {
4582 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4583 __func__, ret);
4584 goto end;
4585 }
4586
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4587 pr_debug("%s: tdm rx channels: %d\n", __func__, channels);
4588
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4589 ret = snd_soc_dai_set_channel_map(cpu_dai,
4590 0, NULL, channels, slot_offset);
4591 if (ret < 0) {
4592 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4593 __func__, ret);
4594 goto end;
4595 }
4596 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4597 /*2 slot config - bits 0 and 1 set for the first two slots */
4598 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4599
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4600 pr_debug("%s: tdm tx slot_width %d slots %d slot_mask %x\n",
4601 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4602
4603 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4604 slots, slot_width);
4605 if (ret < 0) {
4606 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4607 __func__, ret);
4608 goto end;
4609 }
4610
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4611 pr_debug("%s: tdm tx channels: %d\n", __func__, channels);
4612
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4613 ret = snd_soc_dai_set_channel_map(cpu_dai,
4614 channels, slot_offset, 0, NULL);
4615 if (ret < 0) {
4616 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4617 __func__, ret);
4618 goto end;
4619 }
4620 } else {
4621 ret = -EINVAL;
4622 pr_err("%s: invalid use case, err:%d\n",
4623 __func__, ret);
4624 goto end;
4625 }
4626
4627 rate = params_rate(params);
4628 clk_freq = rate * slot_width * slots;
4629 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4630 if (ret < 0)
4631 pr_err("%s: failed to set tdm clk, err:%d\n",
4632 __func__, ret);
4633
4634end:
4635 return ret;
4636}
4637
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4638static int msm_get_tdm_mode(u32 port_id)
4639{
4640 int tdm_mode;
4641
4642 switch (port_id) {
4643 case AFE_PORT_ID_PRIMARY_TDM_RX:
4644 case AFE_PORT_ID_PRIMARY_TDM_TX:
4645 tdm_mode = TDM_PRI;
4646 break;
4647 case AFE_PORT_ID_SECONDARY_TDM_RX:
4648 case AFE_PORT_ID_SECONDARY_TDM_TX:
4649 tdm_mode = TDM_SEC;
4650 break;
4651 case AFE_PORT_ID_TERTIARY_TDM_RX:
4652 case AFE_PORT_ID_TERTIARY_TDM_TX:
4653 tdm_mode = TDM_TERT;
4654 break;
4655 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4656 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4657 tdm_mode = TDM_QUAT;
4658 break;
4659 case AFE_PORT_ID_QUINARY_TDM_RX:
4660 case AFE_PORT_ID_QUINARY_TDM_TX:
4661 tdm_mode = TDM_QUIN;
4662 break;
4663 case AFE_PORT_ID_SENARY_TDM_RX:
4664 case AFE_PORT_ID_SENARY_TDM_TX:
4665 tdm_mode = TDM_SEN;
4666 break;
4667 default:
4668 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4669 tdm_mode = -EINVAL;
4670 }
4671 return tdm_mode;
4672}
4673
4674static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4675{
4676 int ret = 0;
4677 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4678 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4679 struct snd_soc_card *card = rtd->card;
4680 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4681 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4682
4683 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4684 ret = -EINVAL;
4685 pr_err("%s: Invalid TDM interface %d\n",
4686 __func__, ret);
4687 return ret;
4688 }
4689
4690 if (pdata->mi2s_gpio_p[tdm_mode]) {
4691 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4692 == 0) {
4693 ret = msm_cdc_pinctrl_select_active_state(
4694 pdata->mi2s_gpio_p[tdm_mode]);
4695 if (ret) {
4696 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4697 __func__, ret);
4698 goto done;
4699 }
4700 }
4701 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4702 }
4703
4704done:
4705 return ret;
4706}
4707
4708static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4709{
4710 int ret = 0;
4711 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4712 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4713 struct snd_soc_card *card = rtd->card;
4714 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4715 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4716
4717 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4718 ret = -EINVAL;
4719 pr_err("%s: Invalid TDM interface %d\n",
4720 __func__, ret);
4721 return;
4722 }
4723
4724 if (pdata->mi2s_gpio_p[tdm_mode]) {
4725 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4726 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4727 == 0) {
4728 ret = msm_cdc_pinctrl_select_sleep_state(
4729 pdata->mi2s_gpio_p[tdm_mode]);
4730 if (ret)
4731 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4732 __func__, ret);
4733 }
4734 }
4735}
4736
4737static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4738{
4739 int ret = 0;
4740 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4741 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4742 struct snd_soc_card *card = rtd->card;
4743 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4744 u32 aux_mode = cpu_dai->id - 1;
4745
4746 if (aux_mode >= AUX_PCM_MAX) {
4747 ret = -EINVAL;
4748 pr_err("%s: Invalid AUX interface %d\n",
4749 __func__, ret);
4750 return ret;
4751 }
4752
4753 if (pdata->mi2s_gpio_p[aux_mode]) {
4754 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4755 == 0) {
4756 ret = msm_cdc_pinctrl_select_active_state(
4757 pdata->mi2s_gpio_p[aux_mode]);
4758 if (ret) {
4759 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4760 __func__, ret);
4761 goto done;
4762 }
4763 }
4764 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4765 }
4766
4767done:
4768 return ret;
4769}
4770
4771static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4772{
4773 int ret = 0;
4774 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4775 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4776 struct snd_soc_card *card = rtd->card;
4777 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4778 u32 aux_mode = cpu_dai->id - 1;
4779
4780 if (aux_mode >= AUX_PCM_MAX) {
4781 pr_err("%s: Invalid AUX interface %d\n",
4782 __func__, ret);
4783 return;
4784 }
4785
4786 if (pdata->mi2s_gpio_p[aux_mode]) {
4787 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4788 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4789 == 0) {
4790 ret = msm_cdc_pinctrl_select_sleep_state(
4791 pdata->mi2s_gpio_p[aux_mode]);
4792 if (ret)
4793 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4794 __func__, ret);
4795 }
4796 }
4797}
4798
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4799static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4800{
4801 int ret = 0;
4802 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4803 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4804
4805 switch (dai_link->id) {
4806 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4807 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4808 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4809 ret = kona_send_island_va_config(dai_link->id);
4810 if (ret)
4811 pr_err("%s: send island va cfg failed, err: %d\n",
4812 __func__, ret);
4813 break;
4814 }
4815
4816 return ret;
4817}
4818
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4819static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4820 struct snd_pcm_hw_params *params)
4821{
4822 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4823 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4824 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4825 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4826
4827 int ret = 0;
4828 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4829 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4830 u32 user_set_tx_ch = 0;
4831 u32 user_set_rx_ch = 0;
4832 u32 ch_id;
4833
4834 ret = snd_soc_dai_get_channel_map(codec_dai,
4835 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4836 &rx_ch_cdc_dma);
4837 if (ret < 0) {
4838 pr_err("%s: failed to get codec chan map, err:%d\n",
4839 __func__, ret);
4840 goto err;
4841 }
4842
4843 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4844 switch (dai_link->id) {
4845 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4846 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4847 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4848 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4849 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4850 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4851 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4852 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4853 {
4854 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4855 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4856 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4857 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4858 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4859 user_set_rx_ch, &rx_ch_cdc_dma);
4860 if (ret < 0) {
4861 pr_err("%s: failed to set cpu chan map, err:%d\n",
4862 __func__, ret);
4863 goto err;
4864 }
4865
4866 }
4867 break;
4868 }
4869 } else {
4870 switch (dai_link->id) {
4871 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4872 {
4873 user_set_tx_ch = msm_vi_feed_tx_ch;
4874 }
4875 break;
4876 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4877 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4878 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4879 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4880 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4881 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4882 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4883 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4884 {
4885 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4886 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4887 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4888 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4889 }
4890 break;
4891 }
4892
4893 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4894 &tx_ch_cdc_dma, 0, 0);
4895 if (ret < 0) {
4896 pr_err("%s: failed to set cpu chan map, err:%d\n",
4897 __func__, ret);
4898 goto err;
4899 }
4900 }
4901
4902err:
4903 return ret;
4904}
4905
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4906static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4907{
4908 cpumask_t mask;
4909
4910 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4911 pm_qos_remove_request(&substream->latency_pm_qos_req);
4912
4913 cpumask_clear(&mask);
4914 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4915 cpumask_set_cpu(2, &mask); /* affine to core 2 */
4916 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
4917
4918 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
4919
4920 pm_qos_add_request(&substream->latency_pm_qos_req,
4921 PM_QOS_CPU_DMA_LATENCY,
4922 MSM_LL_QOS_VALUE);
4923 return 0;
4924}
4925
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4926void mi2s_disable_audio_vote(struct snd_pcm_substream *substream)
4927{
4928 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4929 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4930 int index = cpu_dai->id;
4931 struct snd_soc_card *card = rtd->card;
4932 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4933 int sample_rate = 0;
4934
4935 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4936 sample_rate = mi2s_rx_cfg[index].sample_rate;
4937 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4938 sample_rate = mi2s_tx_cfg[index].sample_rate;
4939 } else {
4940 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
4941 return;
4942 }
4943
4944 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
4945 if (pdata->lpass_audio_hw_vote != NULL) {
4946 if (--pdata->core_audio_vote_count == 0) {
4947 clk_disable_unprepare(
4948 pdata->lpass_audio_hw_vote);
4949 } else if (pdata->core_audio_vote_count < 0) {
4950 pr_err("%s: audio vote mismatch\n", __func__);
4951 pdata->core_audio_vote_count = 0;
4952 }
4953 } else {
4954 pr_err("%s: Invalid lpass audio hw node\n", __func__);
4955 }
4956 }
4957}
4958
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4959static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
4960{
4961 int ret = 0;
4962 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4963 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4964 int index = cpu_dai->id;
4965 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4966 struct snd_soc_card *card = rtd->card;
4967 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4968 int sample_rate = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4969
4970 dev_dbg(rtd->card->dev,
4971 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
4972 __func__, substream->name, substream->stream,
4973 cpu_dai->name, cpu_dai->id);
4974
4975 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4976 ret = -EINVAL;
4977 dev_err(rtd->card->dev,
4978 "%s: CPU DAI id (%d) out of range\n",
4979 __func__, cpu_dai->id);
4980 goto err;
4981 }
4982 /*
4983 * Mutex protection in case the same MI2S
4984 * interface using for both TX and RX so
4985 * that the same clock won't be enable twice.
4986 */
4987 mutex_lock(&mi2s_intf_conf[index].lock);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4988 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4989 sample_rate = mi2s_rx_cfg[index].sample_rate;
4990 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4991 sample_rate = mi2s_tx_cfg[index].sample_rate;
4992 } else {
4993 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
4994 ret = -EINVAL;
4995 goto vote_err;
4996 }
4997
4998 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
4999 if (pdata->lpass_audio_hw_vote == NULL) {
5000 dev_err(rtd->card->dev, "%s: Invalid lpass audio hw node\n",
5001 __func__);
5002 ret = -EINVAL;
5003 goto vote_err;
5004 }
5005 if (pdata->core_audio_vote_count == 0) {
5006 ret = clk_prepare_enable(pdata->lpass_audio_hw_vote);
5007 if (ret < 0) {
5008 dev_err(rtd->card->dev, "%s: audio vote error\n",
5009 __func__);
5010 goto vote_err;
5011 }
5012 }
5013 pdata->core_audio_vote_count++;
5014 }
5015
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5016 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5017 /* Check if msm needs to provide the clock to the interface */
5018 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5019 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5020 fmt = SND_SOC_DAIFMT_CBM_CFM;
5021 }
5022 ret = msm_mi2s_set_sclk(substream, true);
5023 if (ret < 0) {
5024 dev_err(rtd->card->dev,
5025 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5026 __func__, ret);
5027 goto clean_up;
5028 }
5029
5030 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5031 if (ret < 0) {
5032 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5033 __func__, index, ret);
5034 goto clk_off;
5035 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5036 if (pdata->mi2s_gpio_p[index]) {
5037 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5038 == 0) {
5039 ret = msm_cdc_pinctrl_select_active_state(
5040 pdata->mi2s_gpio_p[index]);
5041 if (ret) {
5042 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
5043 __func__, ret);
5044 goto clk_off;
5045 }
5046 }
5047 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
5048 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5049 }
5050clk_off:
5051 if (ret < 0)
5052 msm_mi2s_set_sclk(substream, false);
5053clean_up:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5054 if (ret < 0) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5055 mi2s_intf_conf[index].ref_cnt--;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5056 mi2s_disable_audio_vote(substream);
5057 }
5058vote_err:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5059 mutex_unlock(&mi2s_intf_conf[index].lock);
5060err:
5061 return ret;
5062}
5063
5064static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5065{
5066 int ret = 0;
5067 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5068 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5069 struct snd_soc_card *card = rtd->card;
5070 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5071
5072 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5073 substream->name, substream->stream);
5074 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5075 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5076 return;
5077 }
5078
5079 mutex_lock(&mi2s_intf_conf[index].lock);
5080 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5081 if (pdata->mi2s_gpio_p[index]) {
5082 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
5083 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5084 == 0) {
5085 ret = msm_cdc_pinctrl_select_sleep_state(
5086 pdata->mi2s_gpio_p[index]);
5087 if (ret)
5088 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
5089 __func__, ret);
5090 }
5091 }
5092
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5093 ret = msm_mi2s_set_sclk(substream, false);
5094 if (ret < 0)
5095 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5096 __func__, index, ret);
5097 }
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5098 mi2s_disable_audio_vote(substream);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5099 mutex_unlock(&mi2s_intf_conf[index].lock);
5100}
5101
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5102static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
5103 struct snd_pcm_hw_params *params)
5104{
5105 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5106 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5107 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5108 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5109 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
5110 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5111 int ret = 0;
5112
5113 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5114 codec_dai->name, codec_dai->id);
5115 ret = snd_soc_dai_get_channel_map(codec_dai,
5116 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5117 if (ret) {
5118 dev_err(rtd->dev,
5119 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5120 __func__, ret);
5121 goto err;
5122 }
5123
5124 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5125 __func__, tx_ch_cnt, dai_link->id);
5126
5127 ret = snd_soc_dai_set_channel_map(cpu_dai,
5128 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5129 if (ret)
5130 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5131 __func__, ret);
5132
5133err:
5134 return ret;
5135}
5136
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5137static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5138 struct snd_pcm_hw_params *params)
5139{
5140 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5141 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5142 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5143 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5144 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5145 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5146 int ret = 0;
5147
5148 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5149 codec_dai->name, codec_dai->id);
5150 ret = snd_soc_dai_get_channel_map(codec_dai,
5151 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5152 if (ret) {
5153 dev_err(rtd->dev,
5154 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5155 __func__, ret);
5156 goto err;
5157 }
5158
5159 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5160 __func__, tx_ch_cnt, dai_link->id);
5161
5162 ret = snd_soc_dai_set_channel_map(cpu_dai,
5163 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5164 if (ret)
5165 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5166 __func__, ret);
5167
5168err:
5169 return ret;
5170}
5171
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5172static struct snd_soc_ops kona_aux_be_ops = {
5173 .startup = kona_aux_snd_startup,
5174 .shutdown = kona_aux_snd_shutdown
5175};
5176
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5177static struct snd_soc_ops kona_tdm_be_ops = {
5178 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5179 .startup = kona_tdm_snd_startup,
5180 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5181};
5182
5183static struct snd_soc_ops msm_mi2s_be_ops = {
5184 .startup = msm_mi2s_snd_startup,
5185 .shutdown = msm_mi2s_snd_shutdown,
5186};
5187
5188static struct snd_soc_ops msm_fe_qos_ops = {
5189 .prepare = msm_fe_qos_prepare,
5190};
5191
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5192static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]5193 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5194 .hw_params = msm_snd_cdc_dma_hw_params,
5195};
5196
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5197static struct snd_soc_ops msm_wcn_ops = {
5198 .hw_params = msm_wcn_hw_params,
5199};
5200
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5201static struct snd_soc_ops msm_wcn_ops_lito = {
5202 .hw_params = msm_wcn_hw_params_lito,
5203};
5204
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5205static int msm_dmic_event(struct snd_soc_dapm_widget *w,
5206 struct snd_kcontrol *kcontrol, int event)
5207{
5208 struct msm_asoc_mach_data *pdata = NULL;
5209 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5210 int ret = 0;
5211 u32 dmic_idx;
5212 int *dmic_gpio_cnt;
5213 struct device_node *dmic_gpio;
5214 char *wname;
5215
5216 wname = strpbrk(w->name, "012345");
5217 if (!wname) {
5218 dev_err(component->dev, "%s: widget not found\n", __func__);
5219 return -EINVAL;
5220 }
5221
5222 ret = kstrtouint(wname, 10, &dmic_idx);
5223 if (ret < 0) {
5224 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
5225 __func__);
5226 return -EINVAL;
5227 }
5228
5229 pdata = snd_soc_card_get_drvdata(component->card);
5230
5231 switch (dmic_idx) {
5232 case 0:
5233 case 1:
5234 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
5235 dmic_gpio = pdata->dmic01_gpio_p;
5236 break;
5237 case 2:
5238 case 3:
5239 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
5240 dmic_gpio = pdata->dmic23_gpio_p;
5241 break;
5242 case 4:
5243 case 5:
5244 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
5245 dmic_gpio = pdata->dmic45_gpio_p;
5246 break;
5247 default:
5248 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
5249 __func__);
5250 return -EINVAL;
5251 }
5252
5253 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
5254 __func__, event, dmic_idx, *dmic_gpio_cnt);
5255
5256 switch (event) {
5257 case SND_SOC_DAPM_PRE_PMU:
5258 (*dmic_gpio_cnt)++;
5259 if (*dmic_gpio_cnt == 1) {
5260 ret = msm_cdc_pinctrl_select_active_state(
5261 dmic_gpio);
5262 if (ret < 0) {
5263 pr_err("%s: gpio set cannot be activated %sd",
5264 __func__, "dmic_gpio");
5265 return ret;
5266 }
5267 }
5268
5269 break;
5270 case SND_SOC_DAPM_POST_PMD:
5271 (*dmic_gpio_cnt)--;
5272 if (*dmic_gpio_cnt == 0) {
5273 ret = msm_cdc_pinctrl_select_sleep_state(
5274 dmic_gpio);
5275 if (ret < 0) {
5276 pr_err("%s: gpio set cannot be de-activated %sd",
5277 __func__, "dmic_gpio");
5278 return ret;
5279 }
5280 }
5281 break;
5282 default:
5283 pr_err("%s: invalid DAPM event %d\n", __func__, event);
5284 return -EINVAL;
5285 }
5286 return 0;
5287}
5288
5289static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
5290 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
5291 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
5292 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
5293 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5294 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5295 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
5296 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
5297 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
5298 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
5299 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
5300 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5301 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
5302 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5303};
5304
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5305static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5306{
5307 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5308 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5309 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5310
5311 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5312 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5313}
5314
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5315static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5316{
5317 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5318 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5319 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5320
5321 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5322 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5323}
5324
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame^]5325#ifndef CONFIG_TDM_DISABLE
5326static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5327{
5328 snd_soc_add_component_controls(component, msm_tdm_snd_controls,
5329 ARRAY_SIZE(msm_tdm_snd_controls));
5330}
5331#else
5332static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5333{
5334 return;
5335}
5336#endif
5337
5338#ifndef CONFIG_MI2S_DISABLE
5339static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5340{
5341 snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
5342 ARRAY_SIZE(msm_mi2s_snd_controls));
5343}
5344#else
5345static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5346{
5347 return;
5348}
5349#endif
5350
5351#ifndef CONFIG_AUXPCM_DISABLE
5352static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5353{
5354 snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
5355 ARRAY_SIZE(msm_auxpcm_snd_controls));
5356}
5357#else
5358static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5359{
5360 return;
5361}
5362#endif
5363
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5364static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5365{
5366 int ret = -EINVAL;
5367 struct snd_soc_component *component;
5368 struct snd_soc_dapm_context *dapm;
5369 struct snd_card *card;
5370 struct snd_info_entry *entry;
5371 struct snd_soc_component *aux_comp;
5372 struct msm_asoc_mach_data *pdata =
5373 snd_soc_card_get_drvdata(rtd->card);
5374
5375 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5376 if (!component) {
5377 pr_err("%s: could not find component for bolero_codec\n",
5378 __func__);
5379 return ret;
5380 }
5381
5382 dapm = snd_soc_component_get_dapm(component);
5383
5384 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5385 ARRAY_SIZE(msm_int_snd_controls));
5386 if (ret < 0) {
5387 pr_err("%s: add_component_controls failed: %d\n",
5388 __func__, ret);
5389 return ret;
5390 }
5391 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5392 ARRAY_SIZE(msm_common_snd_controls));
5393 if (ret < 0) {
5394 pr_err("%s: add common snd controls failed: %d\n",
5395 __func__, ret);
5396 return ret;
5397 }
5398
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame^]5399 msm_add_tdm_snd_controls(component);
5400 msm_add_mi2s_snd_controls(component);
5401 msm_add_auxpcm_snd_controls(component);
5402
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5403 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5404 ARRAY_SIZE(msm_int_dapm_widgets));
5405
5406 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5407 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5408 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5409 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +0530[diff] [blame]5410 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5411 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5412 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5413 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5414
5415 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5416 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5417 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5418 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5419 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5420
5421 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5422 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5423 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5424 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5425
5426 snd_soc_dapm_sync(dapm);
5427
5428 /*
5429 * Send speaker configuration only for WSA8810.
5430 * Default configuration is for WSA8815.
5431 */
5432 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5433 __func__, rtd->card->num_aux_devs);
5434 if (rtd->card->num_aux_devs &&
5435 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5436 list_for_each_entry(aux_comp,
5437 &rtd->card->aux_comp_list,
5438 card_aux_list) {
5439 if (aux_comp->name != NULL && (
5440 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5441 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5442 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5443 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5444 wsa_macro_set_spkr_gain_offset(component,
5445 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5446 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5447 }
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]5448 if (pdata->lito_v2_enabled) {
5449 /*
5450 * Enable tx data line3 for saipan version v2 amd
5451 * write corresponding lpi register.
5452 */
5453 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map_v2),
5454 sm_port_map_v2);
5455 } else {
5456 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5457 sm_port_map);
5458 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5459 }
5460 card = rtd->card->snd_card;
5461 if (!pdata->codec_root) {
5462 entry = snd_info_create_subdir(card->module, "codecs",
5463 card->proc_root);
5464 if (!entry) {
5465 pr_debug("%s: Cannot create codecs module entry\n",
5466 __func__);
5467 ret = 0;
5468 goto err;
5469 }
5470 pdata->codec_root = entry;
5471 }
5472 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -0800[diff] [blame]5473 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5474 codec_reg_done = true;
5475 return 0;
5476err:
5477 return ret;
5478}
5479
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]5480static void *def_wcd_mbhc_cal(void)
5481{
5482 void *wcd_mbhc_cal;
5483 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5484 u16 *btn_high;
5485
5486 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5487 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5488 if (!wcd_mbhc_cal)
5489 return NULL;
5490
5491 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5492 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5493 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5494 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5495 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5496
5497 btn_high[0] = 75;
5498 btn_high[1] = 150;
5499 btn_high[2] = 237;
5500 btn_high[3] = 500;
5501 btn_high[4] = 500;
5502 btn_high[5] = 500;
5503 btn_high[6] = 500;
5504 btn_high[7] = 500;
5505
5506 return wcd_mbhc_cal;
5507}
5508
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5509/* Digital audio interface glue - connects codec <---> CPU */
5510static struct snd_soc_dai_link msm_common_dai_links[] = {
5511 /* FrontEnd DAI Links */
5512 {/* hw:x,0 */
5513 .name = MSM_DAILINK_NAME(Media1),
5514 .stream_name = "MultiMedia1",
5515 .cpu_dai_name = "MultiMedia1",
5516 .platform_name = "msm-pcm-dsp.0",
5517 .dynamic = 1,
5518 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5519 .dpcm_playback = 1,
5520 .dpcm_capture = 1,
5521 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5522 SND_SOC_DPCM_TRIGGER_POST},
5523 .codec_dai_name = "snd-soc-dummy-dai",
5524 .codec_name = "snd-soc-dummy",
5525 .ignore_suspend = 1,
5526 /* this dainlink has playback support */
5527 .ignore_pmdown_time = 1,
5528 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5529 },
5530 {/* hw:x,1 */
5531 .name = MSM_DAILINK_NAME(Media2),
5532 .stream_name = "MultiMedia2",
5533 .cpu_dai_name = "MultiMedia2",
5534 .platform_name = "msm-pcm-dsp.0",
5535 .dynamic = 1,
5536 .dpcm_playback = 1,
5537 .dpcm_capture = 1,
5538 .codec_dai_name = "snd-soc-dummy-dai",
5539 .codec_name = "snd-soc-dummy",
5540 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5541 SND_SOC_DPCM_TRIGGER_POST},
5542 .ignore_suspend = 1,
5543 /* this dainlink has playback support */
5544 .ignore_pmdown_time = 1,
5545 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5546 },
5547 {/* hw:x,2 */
5548 .name = "VoiceMMode1",
5549 .stream_name = "VoiceMMode1",
5550 .cpu_dai_name = "VoiceMMode1",
5551 .platform_name = "msm-pcm-voice",
5552 .dynamic = 1,
5553 .dpcm_playback = 1,
5554 .dpcm_capture = 1,
5555 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5556 SND_SOC_DPCM_TRIGGER_POST},
5557 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5558 .ignore_suspend = 1,
5559 .ignore_pmdown_time = 1,
5560 .codec_dai_name = "snd-soc-dummy-dai",
5561 .codec_name = "snd-soc-dummy",
5562 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5563 },
5564 {/* hw:x,3 */
5565 .name = "MSM VoIP",
5566 .stream_name = "VoIP",
5567 .cpu_dai_name = "VoIP",
5568 .platform_name = "msm-voip-dsp",
5569 .dynamic = 1,
5570 .dpcm_playback = 1,
5571 .dpcm_capture = 1,
5572 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5573 SND_SOC_DPCM_TRIGGER_POST},
5574 .codec_dai_name = "snd-soc-dummy-dai",
5575 .codec_name = "snd-soc-dummy",
5576 .ignore_suspend = 1,
5577 /* this dainlink has playback support */
5578 .ignore_pmdown_time = 1,
5579 .id = MSM_FRONTEND_DAI_VOIP,
5580 },
5581 {/* hw:x,4 */
5582 .name = MSM_DAILINK_NAME(ULL),
5583 .stream_name = "MultiMedia3",
5584 .cpu_dai_name = "MultiMedia3",
5585 .platform_name = "msm-pcm-dsp.2",
5586 .dynamic = 1,
5587 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5588 .dpcm_playback = 1,
5589 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5590 SND_SOC_DPCM_TRIGGER_POST},
5591 .codec_dai_name = "snd-soc-dummy-dai",
5592 .codec_name = "snd-soc-dummy",
5593 .ignore_suspend = 1,
5594 /* this dainlink has playback support */
5595 .ignore_pmdown_time = 1,
5596 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5597 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5598 {/* hw:x,5 */
5599 .name = "MSM AFE-PCM RX",
5600 .stream_name = "AFE-PROXY RX",
5601 .cpu_dai_name = "msm-dai-q6-dev.241",
5602 .codec_name = "msm-stub-codec.1",
5603 .codec_dai_name = "msm-stub-rx",
5604 .platform_name = "msm-pcm-afe",
5605 .dpcm_playback = 1,
5606 .ignore_suspend = 1,
5607 /* this dainlink has playback support */
5608 .ignore_pmdown_time = 1,
5609 },
5610 {/* hw:x,6 */
5611 .name = "MSM AFE-PCM TX",
5612 .stream_name = "AFE-PROXY TX",
5613 .cpu_dai_name = "msm-dai-q6-dev.240",
5614 .codec_name = "msm-stub-codec.1",
5615 .codec_dai_name = "msm-stub-tx",
5616 .platform_name = "msm-pcm-afe",
5617 .dpcm_capture = 1,
5618 .ignore_suspend = 1,
5619 },
5620 {/* hw:x,7 */
5621 .name = MSM_DAILINK_NAME(Compress1),
5622 .stream_name = "Compress1",
5623 .cpu_dai_name = "MultiMedia4",
5624 .platform_name = "msm-compress-dsp",
5625 .dynamic = 1,
5626 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5627 .dpcm_playback = 1,
5628 .dpcm_capture = 1,
5629 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5630 SND_SOC_DPCM_TRIGGER_POST},
5631 .codec_dai_name = "snd-soc-dummy-dai",
5632 .codec_name = "snd-soc-dummy",
5633 .ignore_suspend = 1,
5634 .ignore_pmdown_time = 1,
5635 /* this dainlink has playback support */
5636 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5637 },
Meng Wang197cb302019-03-01 13:54:38 +0800[diff] [blame]5638 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5639 {/* hw:x,8 */
5640 .name = "AUXPCM Hostless",
5641 .stream_name = "AUXPCM Hostless",
5642 .cpu_dai_name = "AUXPCM_HOSTLESS",
5643 .platform_name = "msm-pcm-hostless",
5644 .dynamic = 1,
5645 .dpcm_playback = 1,
5646 .dpcm_capture = 1,
5647 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5648 SND_SOC_DPCM_TRIGGER_POST},
5649 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5650 .ignore_suspend = 1,
5651 /* this dainlink has playback support */
5652 .ignore_pmdown_time = 1,
5653 .codec_dai_name = "snd-soc-dummy-dai",
5654 .codec_name = "snd-soc-dummy",
5655 },
5656 {/* hw:x,9 */
5657 .name = MSM_DAILINK_NAME(LowLatency),
5658 .stream_name = "MultiMedia5",
5659 .cpu_dai_name = "MultiMedia5",
5660 .platform_name = "msm-pcm-dsp.1",
5661 .dynamic = 1,
5662 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5663 .dpcm_playback = 1,
5664 .dpcm_capture = 1,
5665 .codec_dai_name = "snd-soc-dummy-dai",
5666 .codec_name = "snd-soc-dummy",
5667 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5668 SND_SOC_DPCM_TRIGGER_POST},
5669 .ignore_suspend = 1,
5670 /* this dainlink has playback support */
5671 .ignore_pmdown_time = 1,
5672 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5673 .ops = &msm_fe_qos_ops,
5674 },
5675 {/* hw:x,10 */
5676 .name = "Listen 1 Audio Service",
5677 .stream_name = "Listen 1 Audio Service",
5678 .cpu_dai_name = "LSM1",
5679 .platform_name = "msm-lsm-client",
5680 .dynamic = 1,
5681 .dpcm_capture = 1,
5682 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5683 SND_SOC_DPCM_TRIGGER_POST },
5684 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5685 .ignore_suspend = 1,
5686 .codec_dai_name = "snd-soc-dummy-dai",
5687 .codec_name = "snd-soc-dummy",
5688 .id = MSM_FRONTEND_DAI_LSM1,
5689 },
5690 /* Multiple Tunnel instances */
5691 {/* hw:x,11 */
5692 .name = MSM_DAILINK_NAME(Compress2),
5693 .stream_name = "Compress2",
5694 .cpu_dai_name = "MultiMedia7",
5695 .platform_name = "msm-compress-dsp",
5696 .dynamic = 1,
5697 .dpcm_playback = 1,
5698 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5699 SND_SOC_DPCM_TRIGGER_POST},
5700 .codec_dai_name = "snd-soc-dummy-dai",
5701 .codec_name = "snd-soc-dummy",
5702 .ignore_suspend = 1,
5703 .ignore_pmdown_time = 1,
5704 /* this dainlink has playback support */
5705 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5706 },
5707 {/* hw:x,12 */
5708 .name = MSM_DAILINK_NAME(MultiMedia10),
5709 .stream_name = "MultiMedia10",
5710 .cpu_dai_name = "MultiMedia10",
5711 .platform_name = "msm-pcm-dsp.1",
5712 .dynamic = 1,
5713 .dpcm_playback = 1,
5714 .dpcm_capture = 1,
5715 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5716 SND_SOC_DPCM_TRIGGER_POST},
5717 .codec_dai_name = "snd-soc-dummy-dai",
5718 .codec_name = "snd-soc-dummy",
5719 .ignore_suspend = 1,
5720 .ignore_pmdown_time = 1,
5721 /* this dainlink has playback support */
5722 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5723 },
5724 {/* hw:x,13 */
5725 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5726 .stream_name = "MM_NOIRQ",
5727 .cpu_dai_name = "MultiMedia8",
5728 .platform_name = "msm-pcm-dsp-noirq",
5729 .dynamic = 1,
5730 .dpcm_playback = 1,
5731 .dpcm_capture = 1,
5732 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5733 SND_SOC_DPCM_TRIGGER_POST},
5734 .codec_dai_name = "snd-soc-dummy-dai",
5735 .codec_name = "snd-soc-dummy",
5736 .ignore_suspend = 1,
5737 .ignore_pmdown_time = 1,
5738 /* this dainlink has playback support */
5739 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5740 .ops = &msm_fe_qos_ops,
5741 },
5742 /* HDMI Hostless */
5743 {/* hw:x,14 */
5744 .name = "HDMI_RX_HOSTLESS",
5745 .stream_name = "HDMI_RX_HOSTLESS",
5746 .cpu_dai_name = "HDMI_HOSTLESS",
5747 .platform_name = "msm-pcm-hostless",
5748 .dynamic = 1,
5749 .dpcm_playback = 1,
5750 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5751 SND_SOC_DPCM_TRIGGER_POST},
5752 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5753 .ignore_suspend = 1,
5754 .ignore_pmdown_time = 1,
5755 .codec_dai_name = "snd-soc-dummy-dai",
5756 .codec_name = "snd-soc-dummy",
5757 },
5758 {/* hw:x,15 */
5759 .name = "VoiceMMode2",
5760 .stream_name = "VoiceMMode2",
5761 .cpu_dai_name = "VoiceMMode2",
5762 .platform_name = "msm-pcm-voice",
5763 .dynamic = 1,
5764 .dpcm_playback = 1,
5765 .dpcm_capture = 1,
5766 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5767 SND_SOC_DPCM_TRIGGER_POST},
5768 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5769 .ignore_suspend = 1,
5770 .ignore_pmdown_time = 1,
5771 .codec_dai_name = "snd-soc-dummy-dai",
5772 .codec_name = "snd-soc-dummy",
5773 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5774 },
5775 /* LSM FE */
5776 {/* hw:x,16 */
5777 .name = "Listen 2 Audio Service",
5778 .stream_name = "Listen 2 Audio Service",
5779 .cpu_dai_name = "LSM2",
5780 .platform_name = "msm-lsm-client",
5781 .dynamic = 1,
5782 .dpcm_capture = 1,
5783 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5784 SND_SOC_DPCM_TRIGGER_POST },
5785 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5786 .ignore_suspend = 1,
5787 .codec_dai_name = "snd-soc-dummy-dai",
5788 .codec_name = "snd-soc-dummy",
5789 .id = MSM_FRONTEND_DAI_LSM2,
5790 },
5791 {/* hw:x,17 */
5792 .name = "Listen 3 Audio Service",
5793 .stream_name = "Listen 3 Audio Service",
5794 .cpu_dai_name = "LSM3",
5795 .platform_name = "msm-lsm-client",
5796 .dynamic = 1,
5797 .dpcm_capture = 1,
5798 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5799 SND_SOC_DPCM_TRIGGER_POST },
5800 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5801 .ignore_suspend = 1,
5802 .codec_dai_name = "snd-soc-dummy-dai",
5803 .codec_name = "snd-soc-dummy",
5804 .id = MSM_FRONTEND_DAI_LSM3,
5805 },
5806 {/* hw:x,18 */
5807 .name = "Listen 4 Audio Service",
5808 .stream_name = "Listen 4 Audio Service",
5809 .cpu_dai_name = "LSM4",
5810 .platform_name = "msm-lsm-client",
5811 .dynamic = 1,
5812 .dpcm_capture = 1,
5813 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5814 SND_SOC_DPCM_TRIGGER_POST },
5815 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5816 .ignore_suspend = 1,
5817 .codec_dai_name = "snd-soc-dummy-dai",
5818 .codec_name = "snd-soc-dummy",
5819 .id = MSM_FRONTEND_DAI_LSM4,
5820 },
5821 {/* hw:x,19 */
5822 .name = "Listen 5 Audio Service",
5823 .stream_name = "Listen 5 Audio Service",
5824 .cpu_dai_name = "LSM5",
5825 .platform_name = "msm-lsm-client",
5826 .dynamic = 1,
5827 .dpcm_capture = 1,
5828 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5829 SND_SOC_DPCM_TRIGGER_POST },
5830 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5831 .ignore_suspend = 1,
5832 .codec_dai_name = "snd-soc-dummy-dai",
5833 .codec_name = "snd-soc-dummy",
5834 .id = MSM_FRONTEND_DAI_LSM5,
5835 },
5836 {/* hw:x,20 */
5837 .name = "Listen 6 Audio Service",
5838 .stream_name = "Listen 6 Audio Service",
5839 .cpu_dai_name = "LSM6",
5840 .platform_name = "msm-lsm-client",
5841 .dynamic = 1,
5842 .dpcm_capture = 1,
5843 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5844 SND_SOC_DPCM_TRIGGER_POST },
5845 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5846 .ignore_suspend = 1,
5847 .codec_dai_name = "snd-soc-dummy-dai",
5848 .codec_name = "snd-soc-dummy",
5849 .id = MSM_FRONTEND_DAI_LSM6,
5850 },
5851 {/* hw:x,21 */
5852 .name = "Listen 7 Audio Service",
5853 .stream_name = "Listen 7 Audio Service",
5854 .cpu_dai_name = "LSM7",
5855 .platform_name = "msm-lsm-client",
5856 .dynamic = 1,
5857 .dpcm_capture = 1,
5858 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5859 SND_SOC_DPCM_TRIGGER_POST },
5860 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5861 .ignore_suspend = 1,
5862 .codec_dai_name = "snd-soc-dummy-dai",
5863 .codec_name = "snd-soc-dummy",
5864 .id = MSM_FRONTEND_DAI_LSM7,
5865 },
5866 {/* hw:x,22 */
5867 .name = "Listen 8 Audio Service",
5868 .stream_name = "Listen 8 Audio Service",
5869 .cpu_dai_name = "LSM8",
5870 .platform_name = "msm-lsm-client",
5871 .dynamic = 1,
5872 .dpcm_capture = 1,
5873 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5874 SND_SOC_DPCM_TRIGGER_POST },
5875 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5876 .ignore_suspend = 1,
5877 .codec_dai_name = "snd-soc-dummy-dai",
5878 .codec_name = "snd-soc-dummy",
5879 .id = MSM_FRONTEND_DAI_LSM8,
5880 },
5881 {/* hw:x,23 */
5882 .name = MSM_DAILINK_NAME(Media9),
5883 .stream_name = "MultiMedia9",
5884 .cpu_dai_name = "MultiMedia9",
5885 .platform_name = "msm-pcm-dsp.0",
5886 .dynamic = 1,
5887 .dpcm_playback = 1,
5888 .dpcm_capture = 1,
5889 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5890 SND_SOC_DPCM_TRIGGER_POST},
5891 .codec_dai_name = "snd-soc-dummy-dai",
5892 .codec_name = "snd-soc-dummy",
5893 .ignore_suspend = 1,
5894 /* this dainlink has playback support */
5895 .ignore_pmdown_time = 1,
5896 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
5897 },
5898 {/* hw:x,24 */
5899 .name = MSM_DAILINK_NAME(Compress4),
5900 .stream_name = "Compress4",
5901 .cpu_dai_name = "MultiMedia11",
5902 .platform_name = "msm-compress-dsp",
5903 .dynamic = 1,
5904 .dpcm_playback = 1,
5905 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5906 SND_SOC_DPCM_TRIGGER_POST},
5907 .codec_dai_name = "snd-soc-dummy-dai",
5908 .codec_name = "snd-soc-dummy",
5909 .ignore_suspend = 1,
5910 .ignore_pmdown_time = 1,
5911 /* this dainlink has playback support */
5912 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
5913 },
5914 {/* hw:x,25 */
5915 .name = MSM_DAILINK_NAME(Compress5),
5916 .stream_name = "Compress5",
5917 .cpu_dai_name = "MultiMedia12",
5918 .platform_name = "msm-compress-dsp",
5919 .dynamic = 1,
5920 .dpcm_playback = 1,
5921 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5922 SND_SOC_DPCM_TRIGGER_POST},
5923 .codec_dai_name = "snd-soc-dummy-dai",
5924 .codec_name = "snd-soc-dummy",
5925 .ignore_suspend = 1,
5926 .ignore_pmdown_time = 1,
5927 /* this dainlink has playback support */
5928 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
5929 },
5930 {/* hw:x,26 */
5931 .name = MSM_DAILINK_NAME(Compress6),
5932 .stream_name = "Compress6",
5933 .cpu_dai_name = "MultiMedia13",
5934 .platform_name = "msm-compress-dsp",
5935 .dynamic = 1,
5936 .dpcm_playback = 1,
5937 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5938 SND_SOC_DPCM_TRIGGER_POST},
5939 .codec_dai_name = "snd-soc-dummy-dai",
5940 .codec_name = "snd-soc-dummy",
5941 .ignore_suspend = 1,
5942 .ignore_pmdown_time = 1,
5943 /* this dainlink has playback support */
5944 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
5945 },
5946 {/* hw:x,27 */
5947 .name = MSM_DAILINK_NAME(Compress7),
5948 .stream_name = "Compress7",
5949 .cpu_dai_name = "MultiMedia14",
5950 .platform_name = "msm-compress-dsp",
5951 .dynamic = 1,
5952 .dpcm_playback = 1,
5953 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5954 SND_SOC_DPCM_TRIGGER_POST},
5955 .codec_dai_name = "snd-soc-dummy-dai",
5956 .codec_name = "snd-soc-dummy",
5957 .ignore_suspend = 1,
5958 .ignore_pmdown_time = 1,
5959 /* this dainlink has playback support */
5960 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
5961 },
5962 {/* hw:x,28 */
5963 .name = MSM_DAILINK_NAME(Compress8),
5964 .stream_name = "Compress8",
5965 .cpu_dai_name = "MultiMedia15",
5966 .platform_name = "msm-compress-dsp",
5967 .dynamic = 1,
5968 .dpcm_playback = 1,
5969 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5970 SND_SOC_DPCM_TRIGGER_POST},
5971 .codec_dai_name = "snd-soc-dummy-dai",
5972 .codec_name = "snd-soc-dummy",
5973 .ignore_suspend = 1,
5974 .ignore_pmdown_time = 1,
5975 /* this dainlink has playback support */
5976 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
5977 },
5978 {/* hw:x,29 */
5979 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
5980 .stream_name = "MM_NOIRQ_2",
5981 .cpu_dai_name = "MultiMedia16",
5982 .platform_name = "msm-pcm-dsp-noirq",
5983 .dynamic = 1,
5984 .dpcm_playback = 1,
5985 .dpcm_capture = 1,
5986 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5987 SND_SOC_DPCM_TRIGGER_POST},
5988 .codec_dai_name = "snd-soc-dummy-dai",
5989 .codec_name = "snd-soc-dummy",
5990 .ignore_suspend = 1,
5991 .ignore_pmdown_time = 1,
5992 /* this dainlink has playback support */
5993 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -0700[diff] [blame]5994 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5995 },
5996 {/* hw:x,30 */
5997 .name = "CDC_DMA Hostless",
5998 .stream_name = "CDC_DMA Hostless",
5999 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6000 .platform_name = "msm-pcm-hostless",
6001 .dynamic = 1,
6002 .dpcm_playback = 1,
6003 .dpcm_capture = 1,
6004 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6005 SND_SOC_DPCM_TRIGGER_POST},
6006 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6007 .ignore_suspend = 1,
6008 /* this dailink has playback support */
6009 .ignore_pmdown_time = 1,
6010 .codec_dai_name = "snd-soc-dummy-dai",
6011 .codec_name = "snd-soc-dummy",
6012 },
6013 {/* hw:x,31 */
6014 .name = "TX3_CDC_DMA Hostless",
6015 .stream_name = "TX3_CDC_DMA Hostless",
6016 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6017 .platform_name = "msm-pcm-hostless",
6018 .dynamic = 1,
6019 .dpcm_capture = 1,
6020 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6021 SND_SOC_DPCM_TRIGGER_POST},
6022 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6023 .ignore_suspend = 1,
6024 .codec_dai_name = "snd-soc-dummy-dai",
6025 .codec_name = "snd-soc-dummy",
6026 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6027 {/* hw:x,32 */
6028 .name = "Tertiary MI2S TX_Hostless",
6029 .stream_name = "Tertiary MI2S_TX Hostless Capture",
6030 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
6031 .platform_name = "msm-pcm-hostless",
6032 .dynamic = 1,
6033 .dpcm_capture = 1,
6034 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6035 SND_SOC_DPCM_TRIGGER_POST},
6036 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6037 .ignore_suspend = 1,
6038 .ignore_pmdown_time = 1,
6039 .codec_dai_name = "snd-soc-dummy-dai",
6040 .codec_name = "snd-soc-dummy",
6041 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6042};
6043
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6044static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6045 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6046 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6047 .stream_name = "WSA CDC DMA0 Capture",
6048 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6049 .platform_name = "msm-pcm-hostless",
6050 .codec_name = "bolero_codec",
6051 .codec_dai_name = "wsa_macro_vifeedback",
6052 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6053 .be_hw_params_fixup = msm_be_hw_params_fixup,
6054 .ignore_suspend = 1,
6055 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6056 .ops = &msm_cdc_dma_be_ops,
6057 },
6058};
6059
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6060static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6061 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6062 .name = MSM_DAILINK_NAME(ASM Loopback),
6063 .stream_name = "MultiMedia6",
6064 .cpu_dai_name = "MultiMedia6",
6065 .platform_name = "msm-pcm-loopback",
6066 .dynamic = 1,
6067 .dpcm_playback = 1,
6068 .dpcm_capture = 1,
6069 .codec_dai_name = "snd-soc-dummy-dai",
6070 .codec_name = "snd-soc-dummy",
6071 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6072 SND_SOC_DPCM_TRIGGER_POST},
6073 .ignore_suspend = 1,
6074 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6075 .ignore_pmdown_time = 1,
6076 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6077 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6078 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6079 .name = "USB Audio Hostless",
6080 .stream_name = "USB Audio Hostless",
6081 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6082 .platform_name = "msm-pcm-hostless",
6083 .dynamic = 1,
6084 .dpcm_playback = 1,
6085 .dpcm_capture = 1,
6086 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6087 SND_SOC_DPCM_TRIGGER_POST},
6088 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6089 .ignore_suspend = 1,
6090 .ignore_pmdown_time = 1,
6091 .codec_dai_name = "snd-soc-dummy-dai",
6092 .codec_name = "snd-soc-dummy",
6093 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6094 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6095 .name = "SLIMBUS_7 Hostless",
6096 .stream_name = "SLIMBUS_7 Hostless",
6097 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
6098 .platform_name = "msm-pcm-hostless",
6099 .dynamic = 1,
6100 .dpcm_capture = 1,
6101 .dpcm_playback = 1,
6102 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6103 SND_SOC_DPCM_TRIGGER_POST},
6104 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6105 .ignore_suspend = 1,
6106 .ignore_pmdown_time = 1,
6107 .codec_dai_name = "snd-soc-dummy-dai",
6108 .codec_name = "snd-soc-dummy",
6109 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6110 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6111 .name = "Compress Capture",
6112 .stream_name = "Compress9",
6113 .cpu_dai_name = "MultiMedia17",
6114 .platform_name = "msm-compress-dsp",
6115 .dynamic = 1,
6116 .dpcm_capture = 1,
6117 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6118 SND_SOC_DPCM_TRIGGER_POST},
6119 .codec_dai_name = "snd-soc-dummy-dai",
6120 .codec_name = "snd-soc-dummy",
6121 .ignore_suspend = 1,
6122 .ignore_pmdown_time = 1,
6123 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6124 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6125 {/* hw:x,38 */
6126 .name = "SLIMBUS_8 Hostless",
6127 .stream_name = "SLIMBUS_8 Hostless",
6128 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6129 .platform_name = "msm-pcm-hostless",
6130 .dynamic = 1,
6131 .dpcm_capture = 1,
6132 .dpcm_playback = 1,
6133 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6134 SND_SOC_DPCM_TRIGGER_POST},
6135 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6136 .ignore_suspend = 1,
6137 .ignore_pmdown_time = 1,
6138 .codec_dai_name = "snd-soc-dummy-dai",
6139 .codec_name = "snd-soc-dummy",
6140 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -0700[diff] [blame]6141 {/* hw:x,39 */
6142 .name = LPASS_BE_TX_CDC_DMA_TX_5,
6143 .stream_name = "TX CDC DMA5 Capture",
6144 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
6145 .platform_name = "msm-pcm-hostless",
6146 .codec_name = "bolero_codec",
6147 .codec_dai_name = "tx_macro_tx3",
6148 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
6149 .be_hw_params_fixup = msm_be_hw_params_fixup,
6150 .ignore_suspend = 1,
6151 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6152 .ops = &msm_cdc_dma_be_ops,
6153 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6154};
6155
6156static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6157 /* Backend AFE DAI Links */
6158 {
6159 .name = LPASS_BE_AFE_PCM_RX,
6160 .stream_name = "AFE Playback",
6161 .cpu_dai_name = "msm-dai-q6-dev.224",
6162 .platform_name = "msm-pcm-routing",
6163 .codec_name = "msm-stub-codec.1",
6164 .codec_dai_name = "msm-stub-rx",
6165 .no_pcm = 1,
6166 .dpcm_playback = 1,
6167 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6168 .be_hw_params_fixup = msm_be_hw_params_fixup,
6169 /* this dainlink has playback support */
6170 .ignore_pmdown_time = 1,
6171 .ignore_suspend = 1,
6172 },
6173 {
6174 .name = LPASS_BE_AFE_PCM_TX,
6175 .stream_name = "AFE Capture",
6176 .cpu_dai_name = "msm-dai-q6-dev.225",
6177 .platform_name = "msm-pcm-routing",
6178 .codec_name = "msm-stub-codec.1",
6179 .codec_dai_name = "msm-stub-tx",
6180 .no_pcm = 1,
6181 .dpcm_capture = 1,
6182 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6183 .be_hw_params_fixup = msm_be_hw_params_fixup,
6184 .ignore_suspend = 1,
6185 },
6186 /* Incall Record Uplink BACK END DAI Link */
6187 {
6188 .name = LPASS_BE_INCALL_RECORD_TX,
6189 .stream_name = "Voice Uplink Capture",
6190 .cpu_dai_name = "msm-dai-q6-dev.32772",
6191 .platform_name = "msm-pcm-routing",
6192 .codec_name = "msm-stub-codec.1",
6193 .codec_dai_name = "msm-stub-tx",
6194 .no_pcm = 1,
6195 .dpcm_capture = 1,
6196 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6197 .be_hw_params_fixup = msm_be_hw_params_fixup,
6198 .ignore_suspend = 1,
6199 },
6200 /* Incall Record Downlink BACK END DAI Link */
6201 {
6202 .name = LPASS_BE_INCALL_RECORD_RX,
6203 .stream_name = "Voice Downlink Capture",
6204 .cpu_dai_name = "msm-dai-q6-dev.32771",
6205 .platform_name = "msm-pcm-routing",
6206 .codec_name = "msm-stub-codec.1",
6207 .codec_dai_name = "msm-stub-tx",
6208 .no_pcm = 1,
6209 .dpcm_capture = 1,
6210 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6211 .be_hw_params_fixup = msm_be_hw_params_fixup,
6212 .ignore_suspend = 1,
6213 },
6214 /* Incall Music BACK END DAI Link */
6215 {
6216 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6217 .stream_name = "Voice Farend Playback",
6218 .cpu_dai_name = "msm-dai-q6-dev.32773",
6219 .platform_name = "msm-pcm-routing",
6220 .codec_name = "msm-stub-codec.1",
6221 .codec_dai_name = "msm-stub-rx",
6222 .no_pcm = 1,
6223 .dpcm_playback = 1,
6224 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6225 .be_hw_params_fixup = msm_be_hw_params_fixup,
6226 .ignore_suspend = 1,
6227 .ignore_pmdown_time = 1,
6228 },
6229 /* Incall Music 2 BACK END DAI Link */
6230 {
6231 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6232 .stream_name = "Voice2 Farend Playback",
6233 .cpu_dai_name = "msm-dai-q6-dev.32770",
6234 .platform_name = "msm-pcm-routing",
6235 .codec_name = "msm-stub-codec.1",
6236 .codec_dai_name = "msm-stub-rx",
6237 .no_pcm = 1,
6238 .dpcm_playback = 1,
6239 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6240 .be_hw_params_fixup = msm_be_hw_params_fixup,
6241 .ignore_suspend = 1,
6242 .ignore_pmdown_time = 1,
6243 },
Jaideep Sharma2ef4fb22020-03-11 22:29:11 +0530[diff] [blame]6244 /* Proxy Tx BACK END DAI Link */
6245 {
6246 .name = LPASS_BE_PROXY_TX,
6247 .stream_name = "Proxy Capture",
6248 .cpu_dai_name = "msm-dai-q6-dev.8195",
6249 .platform_name = "msm-pcm-routing",
6250 .codec_name = "msm-stub-codec.1",
6251 .codec_dai_name = "msm-stub-tx",
6252 .no_pcm = 1,
6253 .dpcm_capture = 1,
6254 .id = MSM_BACKEND_DAI_PROXY_TX,
6255 .ignore_suspend = 1,
6256 },
6257 /* Proxy Rx BACK END DAI Link */
6258 {
6259 .name = LPASS_BE_PROXY_RX,
6260 .stream_name = "Proxy Playback",
6261 .cpu_dai_name = "msm-dai-q6-dev.8194",
6262 .platform_name = "msm-pcm-routing",
6263 .codec_name = "msm-stub-codec.1",
6264 .codec_dai_name = "msm-stub-rx",
6265 .no_pcm = 1,
6266 .dpcm_playback = 1,
6267 .id = MSM_BACKEND_DAI_PROXY_RX,
6268 .ignore_pmdown_time = 1,
6269 .ignore_suspend = 1,
6270 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6271 {
6272 .name = LPASS_BE_USB_AUDIO_RX,
6273 .stream_name = "USB Audio Playback",
6274 .cpu_dai_name = "msm-dai-q6-dev.28672",
6275 .platform_name = "msm-pcm-routing",
6276 .codec_name = "msm-stub-codec.1",
6277 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6278 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6279 .no_pcm = 1,
6280 .dpcm_playback = 1,
6281 .id = MSM_BACKEND_DAI_USB_RX,
6282 .be_hw_params_fixup = msm_be_hw_params_fixup,
6283 .ignore_pmdown_time = 1,
6284 .ignore_suspend = 1,
6285 },
6286 {
6287 .name = LPASS_BE_USB_AUDIO_TX,
6288 .stream_name = "USB Audio Capture",
6289 .cpu_dai_name = "msm-dai-q6-dev.28673",
6290 .platform_name = "msm-pcm-routing",
6291 .codec_name = "msm-stub-codec.1",
6292 .codec_dai_name = "msm-stub-tx",
6293 .no_pcm = 1,
6294 .dpcm_capture = 1,
6295 .id = MSM_BACKEND_DAI_USB_TX,
6296 .be_hw_params_fixup = msm_be_hw_params_fixup,
6297 .ignore_suspend = 1,
6298 },
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame^]6299};
6300
6301
6302static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6303 {
6304 .name = LPASS_BE_PRI_TDM_RX_0,
6305 .stream_name = "Primary TDM0 Playback",
6306 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6307 .platform_name = "msm-pcm-routing",
6308 .codec_name = "msm-stub-codec.1",
6309 .codec_dai_name = "msm-stub-rx",
6310 .no_pcm = 1,
6311 .dpcm_playback = 1,
6312 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6313 .be_hw_params_fixup = msm_be_hw_params_fixup,
6314 .ops = &kona_tdm_be_ops,
6315 .ignore_suspend = 1,
6316 .ignore_pmdown_time = 1,
6317 },
6318 {
6319 .name = LPASS_BE_PRI_TDM_TX_0,
6320 .stream_name = "Primary TDM0 Capture",
6321 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6322 .platform_name = "msm-pcm-routing",
6323 .codec_name = "msm-stub-codec.1",
6324 .codec_dai_name = "msm-stub-tx",
6325 .no_pcm = 1,
6326 .dpcm_capture = 1,
6327 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6328 .be_hw_params_fixup = msm_be_hw_params_fixup,
6329 .ops = &kona_tdm_be_ops,
6330 .ignore_suspend = 1,
6331 },
6332 {
6333 .name = LPASS_BE_SEC_TDM_RX_0,
6334 .stream_name = "Secondary TDM0 Playback",
6335 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6336 .platform_name = "msm-pcm-routing",
6337 .codec_name = "msm-stub-codec.1",
6338 .codec_dai_name = "msm-stub-rx",
6339 .no_pcm = 1,
6340 .dpcm_playback = 1,
6341 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6342 .be_hw_params_fixup = msm_be_hw_params_fixup,
6343 .ops = &kona_tdm_be_ops,
6344 .ignore_suspend = 1,
6345 .ignore_pmdown_time = 1,
6346 },
6347 {
6348 .name = LPASS_BE_SEC_TDM_TX_0,
6349 .stream_name = "Secondary TDM0 Capture",
6350 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6351 .platform_name = "msm-pcm-routing",
6352 .codec_name = "msm-stub-codec.1",
6353 .codec_dai_name = "msm-stub-tx",
6354 .no_pcm = 1,
6355 .dpcm_capture = 1,
6356 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6357 .be_hw_params_fixup = msm_be_hw_params_fixup,
6358 .ops = &kona_tdm_be_ops,
6359 .ignore_suspend = 1,
6360 },
6361 {
6362 .name = LPASS_BE_TERT_TDM_RX_0,
6363 .stream_name = "Tertiary TDM0 Playback",
6364 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6365 .platform_name = "msm-pcm-routing",
6366 .codec_name = "msm-stub-codec.1",
6367 .codec_dai_name = "msm-stub-rx",
6368 .no_pcm = 1,
6369 .dpcm_playback = 1,
6370 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6371 .be_hw_params_fixup = msm_be_hw_params_fixup,
6372 .ops = &kona_tdm_be_ops,
6373 .ignore_suspend = 1,
6374 .ignore_pmdown_time = 1,
6375 },
6376 {
6377 .name = LPASS_BE_TERT_TDM_TX_0,
6378 .stream_name = "Tertiary TDM0 Capture",
6379 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6380 .platform_name = "msm-pcm-routing",
6381 .codec_name = "msm-stub-codec.1",
6382 .codec_dai_name = "msm-stub-tx",
6383 .no_pcm = 1,
6384 .dpcm_capture = 1,
6385 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6386 .be_hw_params_fixup = msm_be_hw_params_fixup,
6387 .ops = &kona_tdm_be_ops,
6388 .ignore_suspend = 1,
6389 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6390 {
6391 .name = LPASS_BE_QUAT_TDM_RX_0,
6392 .stream_name = "Quaternary TDM0 Playback",
6393 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6394 .platform_name = "msm-pcm-routing",
6395 .codec_name = "msm-stub-codec.1",
6396 .codec_dai_name = "msm-stub-rx",
6397 .no_pcm = 1,
6398 .dpcm_playback = 1,
6399 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6400 .be_hw_params_fixup = msm_be_hw_params_fixup,
6401 .ops = &kona_tdm_be_ops,
6402 .ignore_suspend = 1,
6403 .ignore_pmdown_time = 1,
6404 },
6405 {
6406 .name = LPASS_BE_QUAT_TDM_TX_0,
6407 .stream_name = "Quaternary TDM0 Capture",
6408 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6409 .platform_name = "msm-pcm-routing",
6410 .codec_name = "msm-stub-codec.1",
6411 .codec_dai_name = "msm-stub-tx",
6412 .no_pcm = 1,
6413 .dpcm_capture = 1,
6414 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6415 .be_hw_params_fixup = msm_be_hw_params_fixup,
6416 .ops = &kona_tdm_be_ops,
6417 .ignore_suspend = 1,
6418 },
6419 {
6420 .name = LPASS_BE_QUIN_TDM_RX_0,
6421 .stream_name = "Quinary TDM0 Playback",
6422 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6423 .platform_name = "msm-pcm-routing",
6424 .codec_name = "msm-stub-codec.1",
6425 .codec_dai_name = "msm-stub-rx",
6426 .no_pcm = 1,
6427 .dpcm_playback = 1,
6428 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6429 .be_hw_params_fixup = msm_be_hw_params_fixup,
6430 .ops = &kona_tdm_be_ops,
6431 .ignore_suspend = 1,
6432 .ignore_pmdown_time = 1,
6433 },
6434 {
6435 .name = LPASS_BE_QUIN_TDM_TX_0,
6436 .stream_name = "Quinary TDM0 Capture",
6437 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6438 .platform_name = "msm-pcm-routing",
6439 .codec_name = "msm-stub-codec.1",
6440 .codec_dai_name = "msm-stub-tx",
6441 .no_pcm = 1,
6442 .dpcm_capture = 1,
6443 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6444 .be_hw_params_fixup = msm_be_hw_params_fixup,
6445 .ops = &kona_tdm_be_ops,
6446 .ignore_suspend = 1,
6447 },
6448 {
6449 .name = LPASS_BE_SEN_TDM_RX_0,
6450 .stream_name = "Senary TDM0 Playback",
6451 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6452 .platform_name = "msm-pcm-routing",
6453 .codec_name = "msm-stub-codec.1",
6454 .codec_dai_name = "msm-stub-rx",
6455 .no_pcm = 1,
6456 .dpcm_playback = 1,
6457 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6458 .be_hw_params_fixup = msm_be_hw_params_fixup,
6459 .ops = &kona_tdm_be_ops,
6460 .ignore_suspend = 1,
6461 .ignore_pmdown_time = 1,
6462 },
6463 {
6464 .name = LPASS_BE_SEN_TDM_TX_0,
6465 .stream_name = "Senary TDM0 Capture",
6466 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6467 .platform_name = "msm-pcm-routing",
6468 .codec_name = "msm-stub-codec.1",
6469 .codec_dai_name = "msm-stub-tx",
6470 .no_pcm = 1,
6471 .dpcm_capture = 1,
6472 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6473 .be_hw_params_fixup = msm_be_hw_params_fixup,
6474 .ops = &kona_tdm_be_ops,
6475 .ignore_suspend = 1,
6476 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6477};
6478
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6479static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6480 {
6481 .name = LPASS_BE_SLIMBUS_7_RX,
6482 .stream_name = "Slimbus7 Playback",
6483 .cpu_dai_name = "msm-dai-q6-dev.16398",
6484 .platform_name = "msm-pcm-routing",
6485 .codec_name = "btfmslim_slave",
6486 /* BT codec driver determines capabilities based on
6487 * dai name, bt codecdai name should always contains
6488 * supported usecase information
6489 */
6490 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6491 .no_pcm = 1,
6492 .dpcm_playback = 1,
6493 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6494 .be_hw_params_fixup = msm_be_hw_params_fixup,
6495 .init = &msm_wcn_init,
6496 .ops = &msm_wcn_ops,
6497 /* dai link has playback support */
6498 .ignore_pmdown_time = 1,
6499 .ignore_suspend = 1,
6500 },
6501 {
6502 .name = LPASS_BE_SLIMBUS_7_TX,
6503 .stream_name = "Slimbus7 Capture",
6504 .cpu_dai_name = "msm-dai-q6-dev.16399",
6505 .platform_name = "msm-pcm-routing",
6506 .codec_name = "btfmslim_slave",
6507 .codec_dai_name = "btfm_bt_sco_slim_tx",
6508 .no_pcm = 1,
6509 .dpcm_capture = 1,
6510 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6511 .be_hw_params_fixup = msm_be_hw_params_fixup,
6512 .ops = &msm_wcn_ops,
6513 .ignore_suspend = 1,
6514 },
6515};
6516
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6517static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6518 {
6519 .name = LPASS_BE_SLIMBUS_7_RX,
6520 .stream_name = "Slimbus7 Playback",
6521 .cpu_dai_name = "msm-dai-q6-dev.16398",
6522 .platform_name = "msm-pcm-routing",
6523 .codec_name = "btfmslim_slave",
6524 /* BT codec driver determines capabilities based on
6525 * dai name, bt codecdai name should always contains
6526 * supported usecase information
6527 */
6528 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6529 .no_pcm = 1,
6530 .dpcm_playback = 1,
6531 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6532 .be_hw_params_fixup = msm_be_hw_params_fixup,
6533 .init = &msm_wcn_init_lito,
6534 .ops = &msm_wcn_ops_lito,
6535 /* dai link has playback support */
6536 .ignore_pmdown_time = 1,
6537 .ignore_suspend = 1,
6538 },
6539 {
6540 .name = LPASS_BE_SLIMBUS_7_TX,
6541 .stream_name = "Slimbus7 Capture",
6542 .cpu_dai_name = "msm-dai-q6-dev.16399",
6543 .platform_name = "msm-pcm-routing",
6544 .codec_name = "btfmslim_slave",
6545 .codec_dai_name = "btfm_bt_sco_slim_tx",
6546 .no_pcm = 1,
6547 .dpcm_capture = 1,
6548 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6549 .be_hw_params_fixup = msm_be_hw_params_fixup,
6550 .ops = &msm_wcn_ops_lito,
6551 .ignore_suspend = 1,
6552 },
6553 {
6554 .name = LPASS_BE_SLIMBUS_8_TX,
6555 .stream_name = "Slimbus8 Capture",
6556 .cpu_dai_name = "msm-dai-q6-dev.16401",
6557 .platform_name = "msm-pcm-routing",
6558 .codec_name = "btfmslim_slave",
6559 .codec_dai_name = "btfm_fm_slim_tx",
6560 .no_pcm = 1,
6561 .dpcm_capture = 1,
6562 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6563 .be_hw_params_fixup = msm_be_hw_params_fixup,
6564 .ops = &msm_wcn_ops_lito,
6565 .ignore_suspend = 1,
6566 },
6567};
6568
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6569static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6570 /* DISP PORT BACK END DAI Link */
6571 {
6572 .name = LPASS_BE_DISPLAY_PORT,
6573 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6574 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6575 .platform_name = "msm-pcm-routing",
6576 .codec_name = "msm-ext-disp-audio-codec-rx",
6577 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6578 .no_pcm = 1,
6579 .dpcm_playback = 1,
6580 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6581 .be_hw_params_fixup = msm_be_hw_params_fixup,
6582 .ignore_pmdown_time = 1,
6583 .ignore_suspend = 1,
6584 },
6585 /* DISP PORT 1 BACK END DAI Link */
6586 {
6587 .name = LPASS_BE_DISPLAY_PORT1,
6588 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6589 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6590 .platform_name = "msm-pcm-routing",
6591 .codec_name = "msm-ext-disp-audio-codec-rx",
6592 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6593 .no_pcm = 1,
6594 .dpcm_playback = 1,
6595 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6596 .be_hw_params_fixup = msm_be_hw_params_fixup,
6597 .ignore_pmdown_time = 1,
6598 .ignore_suspend = 1,
6599 },
6600};
6601
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6602static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6603 {
6604 .name = LPASS_BE_PRI_MI2S_RX,
6605 .stream_name = "Primary MI2S Playback",
6606 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6607 .platform_name = "msm-pcm-routing",
6608 .codec_name = "msm-stub-codec.1",
6609 .codec_dai_name = "msm-stub-rx",
6610 .no_pcm = 1,
6611 .dpcm_playback = 1,
6612 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6613 .be_hw_params_fixup = msm_be_hw_params_fixup,
6614 .ops = &msm_mi2s_be_ops,
6615 .ignore_suspend = 1,
6616 .ignore_pmdown_time = 1,
6617 },
6618 {
6619 .name = LPASS_BE_PRI_MI2S_TX,
6620 .stream_name = "Primary MI2S Capture",
6621 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6622 .platform_name = "msm-pcm-routing",
6623 .codec_name = "msm-stub-codec.1",
6624 .codec_dai_name = "msm-stub-tx",
6625 .no_pcm = 1,
6626 .dpcm_capture = 1,
6627 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6628 .be_hw_params_fixup = msm_be_hw_params_fixup,
6629 .ops = &msm_mi2s_be_ops,
6630 .ignore_suspend = 1,
6631 },
6632 {
6633 .name = LPASS_BE_SEC_MI2S_RX,
6634 .stream_name = "Secondary MI2S Playback",
6635 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6636 .platform_name = "msm-pcm-routing",
6637 .codec_name = "msm-stub-codec.1",
6638 .codec_dai_name = "msm-stub-rx",
6639 .no_pcm = 1,
6640 .dpcm_playback = 1,
6641 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6642 .be_hw_params_fixup = msm_be_hw_params_fixup,
6643 .ops = &msm_mi2s_be_ops,
6644 .ignore_suspend = 1,
6645 .ignore_pmdown_time = 1,
6646 },
6647 {
6648 .name = LPASS_BE_SEC_MI2S_TX,
6649 .stream_name = "Secondary MI2S Capture",
6650 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6651 .platform_name = "msm-pcm-routing",
6652 .codec_name = "msm-stub-codec.1",
6653 .codec_dai_name = "msm-stub-tx",
6654 .no_pcm = 1,
6655 .dpcm_capture = 1,
6656 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6657 .be_hw_params_fixup = msm_be_hw_params_fixup,
6658 .ops = &msm_mi2s_be_ops,
6659 .ignore_suspend = 1,
6660 },
6661 {
6662 .name = LPASS_BE_TERT_MI2S_RX,
6663 .stream_name = "Tertiary MI2S Playback",
6664 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6665 .platform_name = "msm-pcm-routing",
6666 .codec_name = "msm-stub-codec.1",
6667 .codec_dai_name = "msm-stub-rx",
6668 .no_pcm = 1,
6669 .dpcm_playback = 1,
6670 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6671 .be_hw_params_fixup = msm_be_hw_params_fixup,
6672 .ops = &msm_mi2s_be_ops,
6673 .ignore_suspend = 1,
6674 .ignore_pmdown_time = 1,
6675 },
6676 {
6677 .name = LPASS_BE_TERT_MI2S_TX,
6678 .stream_name = "Tertiary MI2S Capture",
6679 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6680 .platform_name = "msm-pcm-routing",
6681 .codec_name = "msm-stub-codec.1",
6682 .codec_dai_name = "msm-stub-tx",
6683 .no_pcm = 1,
6684 .dpcm_capture = 1,
6685 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6686 .be_hw_params_fixup = msm_be_hw_params_fixup,
6687 .ops = &msm_mi2s_be_ops,
6688 .ignore_suspend = 1,
6689 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6690 {
6691 .name = LPASS_BE_QUAT_MI2S_RX,
6692 .stream_name = "Quaternary MI2S Playback",
6693 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6694 .platform_name = "msm-pcm-routing",
6695 .codec_name = "msm-stub-codec.1",
6696 .codec_dai_name = "msm-stub-rx",
6697 .no_pcm = 1,
6698 .dpcm_playback = 1,
6699 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6700 .be_hw_params_fixup = msm_be_hw_params_fixup,
6701 .ops = &msm_mi2s_be_ops,
6702 .ignore_suspend = 1,
6703 .ignore_pmdown_time = 1,
6704 },
6705 {
6706 .name = LPASS_BE_QUAT_MI2S_TX,
6707 .stream_name = "Quaternary MI2S Capture",
6708 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6709 .platform_name = "msm-pcm-routing",
6710 .codec_name = "msm-stub-codec.1",
6711 .codec_dai_name = "msm-stub-tx",
6712 .no_pcm = 1,
6713 .dpcm_capture = 1,
6714 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6715 .be_hw_params_fixup = msm_be_hw_params_fixup,
6716 .ops = &msm_mi2s_be_ops,
6717 .ignore_suspend = 1,
6718 },
6719 {
6720 .name = LPASS_BE_QUIN_MI2S_RX,
6721 .stream_name = "Quinary MI2S Playback",
6722 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6723 .platform_name = "msm-pcm-routing",
6724 .codec_name = "msm-stub-codec.1",
6725 .codec_dai_name = "msm-stub-rx",
6726 .no_pcm = 1,
6727 .dpcm_playback = 1,
6728 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6729 .be_hw_params_fixup = msm_be_hw_params_fixup,
6730 .ops = &msm_mi2s_be_ops,
6731 .ignore_suspend = 1,
6732 .ignore_pmdown_time = 1,
6733 },
6734 {
6735 .name = LPASS_BE_QUIN_MI2S_TX,
6736 .stream_name = "Quinary MI2S Capture",
6737 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6738 .platform_name = "msm-pcm-routing",
6739 .codec_name = "msm-stub-codec.1",
6740 .codec_dai_name = "msm-stub-tx",
6741 .no_pcm = 1,
6742 .dpcm_capture = 1,
6743 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6744 .be_hw_params_fixup = msm_be_hw_params_fixup,
6745 .ops = &msm_mi2s_be_ops,
6746 .ignore_suspend = 1,
6747 },
6748 {
6749 .name = LPASS_BE_SENARY_MI2S_RX,
6750 .stream_name = "Senary MI2S Playback",
6751 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6752 .platform_name = "msm-pcm-routing",
6753 .codec_name = "msm-stub-codec.1",
6754 .codec_dai_name = "msm-stub-rx",
6755 .no_pcm = 1,
6756 .dpcm_playback = 1,
6757 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6758 .be_hw_params_fixup = msm_be_hw_params_fixup,
6759 .ops = &msm_mi2s_be_ops,
6760 .ignore_suspend = 1,
6761 .ignore_pmdown_time = 1,
6762 },
6763 {
6764 .name = LPASS_BE_SENARY_MI2S_TX,
6765 .stream_name = "Senary MI2S Capture",
6766 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6767 .platform_name = "msm-pcm-routing",
6768 .codec_name = "msm-stub-codec.1",
6769 .codec_dai_name = "msm-stub-tx",
6770 .no_pcm = 1,
6771 .dpcm_capture = 1,
6772 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6773 .be_hw_params_fixup = msm_be_hw_params_fixup,
6774 .ops = &msm_mi2s_be_ops,
6775 .ignore_suspend = 1,
6776 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6777};
6778
6779static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6780 /* Primary AUX PCM Backend DAI Links */
6781 {
6782 .name = LPASS_BE_AUXPCM_RX,
6783 .stream_name = "AUX PCM Playback",
6784 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6785 .platform_name = "msm-pcm-routing",
6786 .codec_name = "msm-stub-codec.1",
6787 .codec_dai_name = "msm-stub-rx",
6788 .no_pcm = 1,
6789 .dpcm_playback = 1,
6790 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6791 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6792 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6793 .ignore_pmdown_time = 1,
6794 .ignore_suspend = 1,
6795 },
6796 {
6797 .name = LPASS_BE_AUXPCM_TX,
6798 .stream_name = "AUX PCM Capture",
6799 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6800 .platform_name = "msm-pcm-routing",
6801 .codec_name = "msm-stub-codec.1",
6802 .codec_dai_name = "msm-stub-tx",
6803 .no_pcm = 1,
6804 .dpcm_capture = 1,
6805 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6806 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6807 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6808 .ignore_suspend = 1,
6809 },
6810 /* Secondary AUX PCM Backend DAI Links */
6811 {
6812 .name = LPASS_BE_SEC_AUXPCM_RX,
6813 .stream_name = "Sec AUX PCM Playback",
6814 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6815 .platform_name = "msm-pcm-routing",
6816 .codec_name = "msm-stub-codec.1",
6817 .codec_dai_name = "msm-stub-rx",
6818 .no_pcm = 1,
6819 .dpcm_playback = 1,
6820 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6821 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6822 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6823 .ignore_pmdown_time = 1,
6824 .ignore_suspend = 1,
6825 },
6826 {
6827 .name = LPASS_BE_SEC_AUXPCM_TX,
6828 .stream_name = "Sec AUX PCM Capture",
6829 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6830 .platform_name = "msm-pcm-routing",
6831 .codec_name = "msm-stub-codec.1",
6832 .codec_dai_name = "msm-stub-tx",
6833 .no_pcm = 1,
6834 .dpcm_capture = 1,
6835 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6836 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6837 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6838 .ignore_suspend = 1,
6839 },
6840 /* Tertiary AUX PCM Backend DAI Links */
6841 {
6842 .name = LPASS_BE_TERT_AUXPCM_RX,
6843 .stream_name = "Tert AUX PCM Playback",
6844 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6845 .platform_name = "msm-pcm-routing",
6846 .codec_name = "msm-stub-codec.1",
6847 .codec_dai_name = "msm-stub-rx",
6848 .no_pcm = 1,
6849 .dpcm_playback = 1,
6850 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6851 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6852 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6853 .ignore_suspend = 1,
6854 },
6855 {
6856 .name = LPASS_BE_TERT_AUXPCM_TX,
6857 .stream_name = "Tert AUX PCM Capture",
6858 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6859 .platform_name = "msm-pcm-routing",
6860 .codec_name = "msm-stub-codec.1",
6861 .codec_dai_name = "msm-stub-tx",
6862 .no_pcm = 1,
6863 .dpcm_capture = 1,
6864 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6865 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6866 .ops = &kona_aux_be_ops,
6867 .ignore_suspend = 1,
6868 },
6869 /* Quaternary AUX PCM Backend DAI Links */
6870 {
6871 .name = LPASS_BE_QUAT_AUXPCM_RX,
6872 .stream_name = "Quat AUX PCM Playback",
6873 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6874 .platform_name = "msm-pcm-routing",
6875 .codec_name = "msm-stub-codec.1",
6876 .codec_dai_name = "msm-stub-rx",
6877 .no_pcm = 1,
6878 .dpcm_playback = 1,
6879 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6880 .be_hw_params_fixup = msm_be_hw_params_fixup,
6881 .ops = &kona_aux_be_ops,
6882 .ignore_suspend = 1,
6883 },
6884 {
6885 .name = LPASS_BE_QUAT_AUXPCM_TX,
6886 .stream_name = "Quat AUX PCM Capture",
6887 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6888 .platform_name = "msm-pcm-routing",
6889 .codec_name = "msm-stub-codec.1",
6890 .codec_dai_name = "msm-stub-tx",
6891 .no_pcm = 1,
6892 .dpcm_capture = 1,
6893 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
6894 .be_hw_params_fixup = msm_be_hw_params_fixup,
6895 .ops = &kona_aux_be_ops,
6896 .ignore_suspend = 1,
6897 },
6898 /* Quinary AUX PCM Backend DAI Links */
6899 {
6900 .name = LPASS_BE_QUIN_AUXPCM_RX,
6901 .stream_name = "Quin AUX PCM Playback",
6902 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6903 .platform_name = "msm-pcm-routing",
6904 .codec_name = "msm-stub-codec.1",
6905 .codec_dai_name = "msm-stub-rx",
6906 .no_pcm = 1,
6907 .dpcm_playback = 1,
6908 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
6909 .be_hw_params_fixup = msm_be_hw_params_fixup,
6910 .ops = &kona_aux_be_ops,
6911 .ignore_suspend = 1,
6912 },
6913 {
6914 .name = LPASS_BE_QUIN_AUXPCM_TX,
6915 .stream_name = "Quin AUX PCM Capture",
6916 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6917 .platform_name = "msm-pcm-routing",
6918 .codec_name = "msm-stub-codec.1",
6919 .codec_dai_name = "msm-stub-tx",
6920 .no_pcm = 1,
6921 .dpcm_capture = 1,
6922 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
6923 .be_hw_params_fixup = msm_be_hw_params_fixup,
6924 .ops = &kona_aux_be_ops,
6925 .ignore_suspend = 1,
6926 },
6927 /* Senary AUX PCM Backend DAI Links */
6928 {
6929 .name = LPASS_BE_SEN_AUXPCM_RX,
6930 .stream_name = "Sen AUX PCM Playback",
6931 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6932 .platform_name = "msm-pcm-routing",
6933 .codec_name = "msm-stub-codec.1",
6934 .codec_dai_name = "msm-stub-rx",
6935 .no_pcm = 1,
6936 .dpcm_playback = 1,
6937 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
6938 .be_hw_params_fixup = msm_be_hw_params_fixup,
6939 .ops = &kona_aux_be_ops,
6940 .ignore_suspend = 1,
6941 },
6942 {
6943 .name = LPASS_BE_SEN_AUXPCM_TX,
6944 .stream_name = "Sen AUX PCM Capture",
6945 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6946 .platform_name = "msm-pcm-routing",
6947 .codec_name = "msm-stub-codec.1",
6948 .codec_dai_name = "msm-stub-tx",
6949 .no_pcm = 1,
6950 .dpcm_capture = 1,
6951 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
6952 .be_hw_params_fixup = msm_be_hw_params_fixup,
6953 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6954 .ignore_suspend = 1,
6955 },
6956};
6957
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6958static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
6959 /* WSA CDC DMA Backend DAI Links */
6960 {
6961 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
6962 .stream_name = "WSA CDC DMA0 Playback",
6963 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
6964 .platform_name = "msm-pcm-routing",
6965 .codec_name = "bolero_codec",
6966 .codec_dai_name = "wsa_macro_rx1",
6967 .no_pcm = 1,
6968 .dpcm_playback = 1,
6969 .init = &msm_int_audrx_init,
6970 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
6971 .be_hw_params_fixup = msm_be_hw_params_fixup,
6972 .ignore_pmdown_time = 1,
6973 .ignore_suspend = 1,
6974 .ops = &msm_cdc_dma_be_ops,
6975 },
6976 {
6977 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
6978 .stream_name = "WSA CDC DMA1 Playback",
6979 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
6980 .platform_name = "msm-pcm-routing",
6981 .codec_name = "bolero_codec",
6982 .codec_dai_name = "wsa_macro_rx_mix",
6983 .no_pcm = 1,
6984 .dpcm_playback = 1,
6985 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
6986 .be_hw_params_fixup = msm_be_hw_params_fixup,
6987 .ignore_pmdown_time = 1,
6988 .ignore_suspend = 1,
6989 .ops = &msm_cdc_dma_be_ops,
6990 },
6991 {
6992 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
6993 .stream_name = "WSA CDC DMA1 Capture",
6994 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
6995 .platform_name = "msm-pcm-routing",
6996 .codec_name = "bolero_codec",
6997 .codec_dai_name = "wsa_macro_echo",
6998 .no_pcm = 1,
6999 .dpcm_capture = 1,
7000 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7001 .be_hw_params_fixup = msm_be_hw_params_fixup,
7002 .ignore_suspend = 1,
7003 .ops = &msm_cdc_dma_be_ops,
7004 },
7005};
7006
7007static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7008 /* RX CDC DMA Backend DAI Links */
7009 {
7010 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7011 .stream_name = "RX CDC DMA0 Playback",
7012 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
7013 .platform_name = "msm-pcm-routing",
7014 .codec_name = "bolero_codec",
7015 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7016 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7017 .no_pcm = 1,
7018 .dpcm_playback = 1,
7019 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7020 .be_hw_params_fixup = msm_be_hw_params_fixup,
7021 .ignore_pmdown_time = 1,
7022 .ignore_suspend = 1,
7023 .ops = &msm_cdc_dma_be_ops,
7024 },
7025 {
7026 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7027 .stream_name = "RX CDC DMA1 Playback",
7028 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
7029 .platform_name = "msm-pcm-routing",
7030 .codec_name = "bolero_codec",
7031 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7032 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7033 .no_pcm = 1,
7034 .dpcm_playback = 1,
7035 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7036 .be_hw_params_fixup = msm_be_hw_params_fixup,
7037 .ignore_pmdown_time = 1,
7038 .ignore_suspend = 1,
7039 .ops = &msm_cdc_dma_be_ops,
7040 },
7041 {
7042 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7043 .stream_name = "RX CDC DMA2 Playback",
7044 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
7045 .platform_name = "msm-pcm-routing",
7046 .codec_name = "bolero_codec",
7047 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7048 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7049 .no_pcm = 1,
7050 .dpcm_playback = 1,
7051 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7052 .be_hw_params_fixup = msm_be_hw_params_fixup,
7053 .ignore_pmdown_time = 1,
7054 .ignore_suspend = 1,
7055 .ops = &msm_cdc_dma_be_ops,
7056 },
7057 {
7058 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7059 .stream_name = "RX CDC DMA3 Playback",
7060 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
7061 .platform_name = "msm-pcm-routing",
7062 .codec_name = "bolero_codec",
7063 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7064 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7065 .no_pcm = 1,
7066 .dpcm_playback = 1,
7067 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7068 .be_hw_params_fixup = msm_be_hw_params_fixup,
7069 .ignore_pmdown_time = 1,
7070 .ignore_suspend = 1,
7071 .ops = &msm_cdc_dma_be_ops,
7072 },
7073 /* TX CDC DMA Backend DAI Links */
7074 {
7075 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7076 .stream_name = "TX CDC DMA3 Capture",
7077 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
7078 .platform_name = "msm-pcm-routing",
7079 .codec_name = "bolero_codec",
7080 .codec_dai_name = "tx_macro_tx1",
7081 .no_pcm = 1,
7082 .dpcm_capture = 1,
7083 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7084 .be_hw_params_fixup = msm_be_hw_params_fixup,
7085 .ignore_suspend = 1,
7086 .ops = &msm_cdc_dma_be_ops,
7087 },
7088 {
7089 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7090 .stream_name = "TX CDC DMA4 Capture",
7091 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
7092 .platform_name = "msm-pcm-routing",
7093 .codec_name = "bolero_codec",
7094 .codec_dai_name = "tx_macro_tx2",
7095 .no_pcm = 1,
7096 .dpcm_capture = 1,
7097 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7098 .be_hw_params_fixup = msm_be_hw_params_fixup,
7099 .ignore_suspend = 1,
7100 .ops = &msm_cdc_dma_be_ops,
7101 },
7102};
7103
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7104static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
7105 {
7106 .name = LPASS_BE_VA_CDC_DMA_TX_0,
7107 .stream_name = "VA CDC DMA0 Capture",
7108 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
7109 .platform_name = "msm-pcm-routing",
7110 .codec_name = "bolero_codec",
7111 .codec_dai_name = "va_macro_tx1",
7112 .no_pcm = 1,
7113 .dpcm_capture = 1,
7114 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
7115 .be_hw_params_fixup = msm_be_hw_params_fixup,
7116 .ignore_suspend = 1,
7117 .ops = &msm_cdc_dma_be_ops,
7118 },
7119 {
7120 .name = LPASS_BE_VA_CDC_DMA_TX_1,
7121 .stream_name = "VA CDC DMA1 Capture",
7122 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
7123 .platform_name = "msm-pcm-routing",
7124 .codec_name = "bolero_codec",
7125 .codec_dai_name = "va_macro_tx2",
7126 .no_pcm = 1,
7127 .dpcm_capture = 1,
7128 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
7129 .be_hw_params_fixup = msm_be_hw_params_fixup,
7130 .ignore_suspend = 1,
7131 .ops = &msm_cdc_dma_be_ops,
7132 },
7133 {
7134 .name = LPASS_BE_VA_CDC_DMA_TX_2,
7135 .stream_name = "VA CDC DMA2 Capture",
7136 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
7137 .platform_name = "msm-pcm-routing",
7138 .codec_name = "bolero_codec",
7139 .codec_dai_name = "va_macro_tx3",
7140 .no_pcm = 1,
7141 .dpcm_capture = 1,
7142 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
7143 .be_hw_params_fixup = msm_be_hw_params_fixup,
7144 .ignore_suspend = 1,
7145 .ops = &msm_cdc_dma_be_ops,
7146 },
7147};
7148
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7149static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
7150 {
7151 .name = LPASS_BE_AFE_LOOPBACK_TX,
7152 .stream_name = "AFE Loopback Capture",
7153 .cpu_dai_name = "msm-dai-q6-dev.24577",
7154 .platform_name = "msm-pcm-routing",
7155 .codec_name = "msm-stub-codec.1",
7156 .codec_dai_name = "msm-stub-tx",
7157 .no_pcm = 1,
7158 .dpcm_capture = 1,
7159 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
7160 .be_hw_params_fixup = msm_be_hw_params_fixup,
7161 .ignore_pmdown_time = 1,
7162 .ignore_suspend = 1,
7163 },
7164};
7165
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7166static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7167 ARRAY_SIZE(msm_common_dai_links) +
7168 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7169 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7170 ARRAY_SIZE(msm_common_be_dai_links) +
7171 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7172 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7173 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7174 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7175 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
7176 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7177 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7178 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame^]7179 ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
7180 ARRAY_SIZE(msm_tdm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7181
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7182static int msm_populate_dai_link_component_of_node(
7183 struct snd_soc_card *card)
7184{
7185 int i, index, ret = 0;
7186 struct device *cdev = card->dev;
7187 struct snd_soc_dai_link *dai_link = card->dai_link;
7188 struct device_node *np;
7189
7190 if (!cdev) {
7191 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
7192 return -ENODEV;
7193 }
7194
7195 for (i = 0; i < card->num_links; i++) {
7196 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7197 continue;
7198
7199 /* populate platform_of_node for snd card dai links */
7200 if (dai_link[i].platform_name &&
7201 !dai_link[i].platform_of_node) {
7202 index = of_property_match_string(cdev->of_node,
7203 "asoc-platform-names",
7204 dai_link[i].platform_name);
7205 if (index < 0) {
7206 dev_err(cdev, "%s: No match found for platform name: %s\n",
7207 __func__, dai_link[i].platform_name);
7208 ret = index;
7209 goto err;
7210 }
7211 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7212 index);
7213 if (!np) {
7214 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
7215 __func__, dai_link[i].platform_name,
7216 index);
7217 ret = -ENODEV;
7218 goto err;
7219 }
7220 dai_link[i].platform_of_node = np;
7221 dai_link[i].platform_name = NULL;
7222 }
7223
7224 /* populate cpu_of_node for snd card dai links */
7225 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7226 index = of_property_match_string(cdev->of_node,
7227 "asoc-cpu-names",
7228 dai_link[i].cpu_dai_name);
7229 if (index >= 0) {
7230 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7231 index);
7232 if (!np) {
7233 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
7234 __func__,
7235 dai_link[i].cpu_dai_name);
7236 ret = -ENODEV;
7237 goto err;
7238 }
7239 dai_link[i].cpu_of_node = np;
7240 dai_link[i].cpu_dai_name = NULL;
7241 }
7242 }
7243
7244 /* populate codec_of_node for snd card dai links */
7245 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7246 index = of_property_match_string(cdev->of_node,
7247 "asoc-codec-names",
7248 dai_link[i].codec_name);
7249 if (index < 0)
7250 continue;
7251 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7252 index);
7253 if (!np) {
7254 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
7255 __func__, dai_link[i].codec_name);
7256 ret = -ENODEV;
7257 goto err;
7258 }
7259 dai_link[i].codec_of_node = np;
7260 dai_link[i].codec_name = NULL;
7261 }
7262 }
7263
7264err:
7265 return ret;
7266}
7267
7268static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7269{
7270 int ret = -EINVAL;
7271 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
7272
7273 if (!component) {
7274 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
7275 return ret;
7276 }
7277
7278 ret = snd_soc_add_component_controls(component, msm_snd_controls,
7279 ARRAY_SIZE(msm_snd_controls));
7280 if (ret < 0) {
7281 dev_err(component->dev,
7282 "%s: add_codec_controls failed, err = %d\n",
7283 __func__, ret);
7284 return ret;
7285 }
7286
7287 return ret;
7288}
7289
7290static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7291 struct snd_pcm_hw_params *params)
7292{
7293 return 0;
7294}
7295
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7296static struct snd_soc_ops msm_stub_be_ops = {
7297 .hw_params = msm_snd_stub_hw_params,
7298};
7299
7300struct snd_soc_card snd_soc_card_stub_msm = {
7301 .name = "kona-stub-snd-card",
7302};
7303
7304static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7305 /* FrontEnd DAI Links */
7306 {
7307 .name = "MSMSTUB Media1",
7308 .stream_name = "MultiMedia1",
7309 .cpu_dai_name = "MultiMedia1",
7310 .platform_name = "msm-pcm-dsp.0",
7311 .dynamic = 1,
7312 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7313 .dpcm_playback = 1,
7314 .dpcm_capture = 1,
7315 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7316 SND_SOC_DPCM_TRIGGER_POST},
7317 .codec_dai_name = "snd-soc-dummy-dai",
7318 .codec_name = "snd-soc-dummy",
7319 .ignore_suspend = 1,
7320 /* this dainlink has playback support */
7321 .ignore_pmdown_time = 1,
7322 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7323 },
7324};
7325
7326static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7327 /* Backend DAI Links */
7328 {
7329 .name = LPASS_BE_AUXPCM_RX,
7330 .stream_name = "AUX PCM Playback",
7331 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7332 .platform_name = "msm-pcm-routing",
7333 .codec_name = "msm-stub-codec.1",
7334 .codec_dai_name = "msm-stub-rx",
7335 .no_pcm = 1,
7336 .dpcm_playback = 1,
7337 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7338 .init = &msm_audrx_stub_init,
7339 .be_hw_params_fixup = msm_be_hw_params_fixup,
7340 .ignore_pmdown_time = 1,
7341 .ignore_suspend = 1,
7342 .ops = &msm_stub_be_ops,
7343 },
7344 {
7345 .name = LPASS_BE_AUXPCM_TX,
7346 .stream_name = "AUX PCM Capture",
7347 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7348 .platform_name = "msm-pcm-routing",
7349 .codec_name = "msm-stub-codec.1",
7350 .codec_dai_name = "msm-stub-tx",
7351 .no_pcm = 1,
7352 .dpcm_capture = 1,
7353 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7354 .be_hw_params_fixup = msm_be_hw_params_fixup,
7355 .ignore_suspend = 1,
7356 .ops = &msm_stub_be_ops,
7357 },
7358};
7359
7360static struct snd_soc_dai_link msm_stub_dai_links[
7361 ARRAY_SIZE(msm_stub_fe_dai_links) +
7362 ARRAY_SIZE(msm_stub_be_dai_links)];
7363
7364static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7365 { .compatible = "qcom,kona-asoc-snd",
7366 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7367 { .compatible = "qcom,kona-asoc-snd-stub",
7368 .data = "stub_codec"},
7369 {},
7370};
7371
7372static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7373{
7374 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7375 struct snd_soc_dai_link *dailink = NULL;
7376 int len_1 = 0;
7377 int len_2 = 0;
7378 int total_links = 0;
7379 int rc = 0;
7380 u32 mi2s_audio_intf = 0;
7381 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7382 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7383 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7384 const struct of_device_id *match;
7385
7386 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
7387 if (!match) {
7388 dev_err(dev, "%s: No DT match found for sound card\n",
7389 __func__);
7390 return NULL;
7391 }
7392
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7393 if (!strcmp(match->data, "codec")) {
7394 card = &snd_soc_card_kona_msm;
7395
7396 memcpy(msm_kona_dai_links + total_links,
7397 msm_common_dai_links,
7398 sizeof(msm_common_dai_links));
7399 total_links += ARRAY_SIZE(msm_common_dai_links);
7400
7401 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7402 msm_bolero_fe_dai_links,
7403 sizeof(msm_bolero_fe_dai_links));
7404 total_links +=
7405 ARRAY_SIZE(msm_bolero_fe_dai_links);
7406
7407 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7408 msm_common_misc_fe_dai_links,
7409 sizeof(msm_common_misc_fe_dai_links));
7410 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7411
7412 memcpy(msm_kona_dai_links + total_links,
7413 msm_common_be_dai_links,
7414 sizeof(msm_common_be_dai_links));
7415 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7416
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7417 memcpy(msm_kona_dai_links + total_links,
7418 msm_wsa_cdc_dma_be_dai_links,
7419 sizeof(msm_wsa_cdc_dma_be_dai_links));
7420 total_links +=
7421 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7422
7423 memcpy(msm_kona_dai_links + total_links,
7424 msm_rx_tx_cdc_dma_be_dai_links,
7425 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7426 total_links +=
7427 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7428
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7429 memcpy(msm_kona_dai_links + total_links,
7430 msm_va_cdc_dma_be_dai_links,
7431 sizeof(msm_va_cdc_dma_be_dai_links));
7432 total_links +=
7433 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7434
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7435 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7436 &mi2s_audio_intf);
7437 if (rc) {
7438 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7439 __func__);
7440 } else {
7441 if (mi2s_audio_intf) {
7442 memcpy(msm_kona_dai_links + total_links,
7443 msm_mi2s_be_dai_links,
7444 sizeof(msm_mi2s_be_dai_links));
7445 total_links +=
7446 ARRAY_SIZE(msm_mi2s_be_dai_links);
7447 }
7448 }
7449
7450 rc = of_property_read_u32(dev->of_node,
7451 "qcom,auxpcm-audio-intf",
7452 &auxpcm_audio_intf);
7453 if (rc) {
7454 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7455 __func__);
7456 } else {
7457 if (auxpcm_audio_intf) {
7458 memcpy(msm_kona_dai_links + total_links,
7459 msm_auxpcm_be_dai_links,
7460 sizeof(msm_auxpcm_be_dai_links));
7461 total_links +=
7462 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7463 }
7464 }
7465
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7466 rc = of_property_read_u32(dev->of_node,
7467 "qcom,ext-disp-audio-rx", &val);
7468 if (!rc && val) {
7469 dev_dbg(dev, "%s(): ext disp audio support present\n",
7470 __func__);
7471 memcpy(msm_kona_dai_links + total_links,
7472 ext_disp_be_dai_link,
7473 sizeof(ext_disp_be_dai_link));
7474 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7475 }
7476
7477 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7478 if (!rc && val) {
7479 dev_dbg(dev, "%s(): WCN BT support present\n",
7480 __func__);
7481 memcpy(msm_kona_dai_links + total_links,
7482 msm_wcn_be_dai_links,
7483 sizeof(msm_wcn_be_dai_links));
7484 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7485 }
7486
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7487 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7488 &val);
7489 if (!rc && val) {
7490 memcpy(msm_kona_dai_links + total_links,
7491 msm_afe_rxtx_lb_be_dai_link,
7492 sizeof(msm_afe_rxtx_lb_be_dai_link));
7493 total_links +=
7494 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7495 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7496
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame^]7497 rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
7498 &val);
7499 if (!rc && val) {
7500 memcpy(msm_kona_dai_links + total_links,
7501 msm_tdm_be_dai_links,
7502 sizeof(msm_tdm_be_dai_links));
7503 total_links +=
7504 ARRAY_SIZE(msm_tdm_be_dai_links);
7505 }
7506
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7507 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7508 &wcn_btfm_intf);
7509 if (rc) {
7510 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7511 __func__);
7512 } else {
7513 if (wcn_btfm_intf) {
7514 memcpy(msm_kona_dai_links + total_links,
7515 msm_wcn_btfm_be_dai_links,
7516 sizeof(msm_wcn_btfm_be_dai_links));
7517 total_links +=
7518 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7519 }
7520 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7521 dailink = msm_kona_dai_links;
7522 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7523 card = &snd_soc_card_stub_msm;
7524 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7525 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7526
7527 memcpy(msm_stub_dai_links,
7528 msm_stub_fe_dai_links,
7529 sizeof(msm_stub_fe_dai_links));
7530 memcpy(msm_stub_dai_links + len_1,
7531 msm_stub_be_dai_links,
7532 sizeof(msm_stub_be_dai_links));
7533
7534 dailink = msm_stub_dai_links;
7535 total_links = len_2;
7536 }
7537
7538 if (card) {
7539 card->dai_link = dailink;
7540 card->num_links = total_links;
7541 }
7542
7543 return card;
7544}
7545
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7546static int msm_wsa881x_init(struct snd_soc_component *component)
7547{
7548 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7549 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7550 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7551 SPKR_L_BOOST, SPKR_L_VI};
7552 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7553 SPKR_R_BOOST, SPKR_R_VI};
7554 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7555 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7556 struct msm_asoc_mach_data *pdata;
7557 struct snd_soc_dapm_context *dapm;
7558 struct snd_card *card;
7559 struct snd_info_entry *entry;
7560 int ret = 0;
7561
7562 if (!component) {
7563 pr_err("%s component is NULL\n", __func__);
7564 return -EINVAL;
7565 }
7566
7567 card = component->card->snd_card;
7568 dapm = snd_soc_component_get_dapm(component);
7569
7570 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7571 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7572 __func__, component->name);
7573 wsa881x_set_channel_map(component, &spkleft_ports[0],
7574 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7575 &ch_rate[0], &spkleft_port_types[0]);
7576 if (dapm->component) {
7577 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7578 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7579 }
7580 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7581 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7582 __func__, component->name);
7583 wsa881x_set_channel_map(component, &spkright_ports[0],
7584 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7585 &ch_rate[0], &spkright_port_types[0]);
7586 if (dapm->component) {
7587 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7588 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7589 }
7590 } else {
7591 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7592 component->name);
7593 ret = -EINVAL;
7594 goto err;
7595 }
7596 pdata = snd_soc_card_get_drvdata(component->card);
7597 if (!pdata->codec_root) {
7598 entry = snd_info_create_subdir(card->module, "codecs",
7599 card->proc_root);
7600 if (!entry) {
7601 pr_err("%s: Cannot create codecs module entry\n",
7602 __func__);
7603 ret = 0;
7604 goto err;
7605 }
7606 pdata->codec_root = entry;
7607 }
7608 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7609 component);
7610err:
7611 return ret;
7612}
7613
7614static int msm_aux_codec_init(struct snd_soc_component *component)
7615{
7616 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7617 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7618 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7619 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7620 struct snd_info_entry *entry;
7621 struct snd_card *card = component->card->snd_card;
7622 struct msm_asoc_mach_data *pdata;
7623
7624 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7625 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7626 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7627 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7628 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7629 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7630 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7631 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7632 snd_soc_dapm_sync(dapm);
7633
7634 pdata = snd_soc_card_get_drvdata(component->card);
7635 if (!pdata->codec_root) {
7636 entry = snd_info_create_subdir(card->module, "codecs",
7637 card->proc_root);
7638 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7639 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7640 __func__);
7641 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7642 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7643 }
7644 pdata->codec_root = entry;
7645 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7646 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7647
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7648 codec_variant = wcd938x_get_codec_variant(component);
7649 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
7650 if (codec_variant == WCD9380)
7651 ret = snd_soc_add_component_controls(component,
7652 msm_int_wcd9380_snd_controls,
7653 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
7654 else if (codec_variant == WCD9385)
7655 ret = snd_soc_add_component_controls(component,
7656 msm_int_wcd9385_snd_controls,
7657 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
7658
7659 if (ret < 0) {
7660 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
7661 __func__, ret);
7662 return ret;
7663 }
7664
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7665mbhc_cfg_cal:
7666 mbhc_calibration = def_wcd_mbhc_cal();
7667 if (!mbhc_calibration)
7668 return -ENOMEM;
7669 wcd_mbhc_cfg.calibration = mbhc_calibration;
7670 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7671 if (ret) {
7672 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7673 __func__, ret);
7674 goto err_hs_detect;
7675 }
7676 return 0;
7677
7678err_hs_detect:
7679 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7680 return ret;
7681}
7682
7683static int msm_init_aux_dev(struct platform_device *pdev,
7684 struct snd_soc_card *card)
7685{
7686 struct device_node *wsa_of_node;
7687 struct device_node *aux_codec_of_node;
7688 u32 wsa_max_devs;
7689 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7690 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7691 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7692 int i;
Xiao Lid8bb93c2020-01-07 12:59:05 +0800[diff] [blame]7693 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
7694 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7695 const char *auxdev_name_prefix[1];
7696 char *dev_name_str = NULL;
7697 int found = 0;
7698 int codecs_found = 0;
7699 int ret = 0;
7700
7701 /* Get maximum WSA device count for this platform */
7702 ret = of_property_read_u32(pdev->dev.of_node,
7703 "qcom,wsa-max-devs", &wsa_max_devs);
7704 if (ret) {
7705 dev_info(&pdev->dev,
7706 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7707 __func__, pdev->dev.of_node->full_name, ret);
7708 wsa_max_devs = 0;
7709 goto codec_aux_dev;
7710 }
7711 if (wsa_max_devs == 0) {
7712 dev_warn(&pdev->dev,
7713 "%s: Max WSA devices is 0 for this target?\n",
7714 __func__);
7715 goto codec_aux_dev;
7716 }
7717
7718 /* Get count of WSA device phandles for this platform */
7719 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7720 "qcom,wsa-devs", NULL);
7721 if (wsa_dev_cnt == -ENOENT) {
7722 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7723 __func__);
7724 goto err;
7725 } else if (wsa_dev_cnt <= 0) {
7726 dev_err(&pdev->dev,
7727 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7728 __func__, wsa_dev_cnt);
7729 ret = -EINVAL;
7730 goto err;
7731 }
7732
7733 /*
7734 * Expect total phandles count to be NOT less than maximum possible
7735 * WSA count. However, if it is less, then assign same value to
7736 * max count as well.
7737 */
7738 if (wsa_dev_cnt < wsa_max_devs) {
7739 dev_dbg(&pdev->dev,
7740 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7741 __func__, wsa_max_devs, wsa_dev_cnt);
7742 wsa_max_devs = wsa_dev_cnt;
7743 }
7744
7745 /* Make sure prefix string passed for each WSA device */
7746 ret = of_property_count_strings(pdev->dev.of_node,
7747 "qcom,wsa-aux-dev-prefix");
7748 if (ret != wsa_dev_cnt) {
7749 dev_err(&pdev->dev,
7750 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7751 __func__, wsa_dev_cnt, ret);
7752 ret = -EINVAL;
7753 goto err;
7754 }
7755
7756 /*
7757 * Alloc mem to store phandle and index info of WSA device, if already
7758 * registered with ALSA core
7759 */
7760 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7761 sizeof(struct msm_wsa881x_dev_info),
7762 GFP_KERNEL);
7763 if (!wsa881x_dev_info) {
7764 ret = -ENOMEM;
7765 goto err;
7766 }
7767
7768 /*
7769 * search and check whether all WSA devices are already
7770 * registered with ALSA core or not. If found a node, store
7771 * the node and the index in a local array of struct for later
7772 * use.
7773 */
7774 for (i = 0; i < wsa_dev_cnt; i++) {
7775 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7776 "qcom,wsa-devs", i);
7777 if (unlikely(!wsa_of_node)) {
7778 /* we should not be here */
7779 dev_err(&pdev->dev,
7780 "%s: wsa dev node is not present\n",
7781 __func__);
7782 ret = -EINVAL;
7783 goto err;
7784 }
7785 if (soc_find_component(wsa_of_node, NULL)) {
7786 /* WSA device registered with ALSA core */
7787 wsa881x_dev_info[found].of_node = wsa_of_node;
7788 wsa881x_dev_info[found].index = i;
7789 found++;
7790 if (found == wsa_max_devs)
7791 break;
7792 }
7793 }
7794
7795 if (found < wsa_max_devs) {
7796 dev_dbg(&pdev->dev,
7797 "%s: failed to find %d components. Found only %d\n",
7798 __func__, wsa_max_devs, found);
7799 return -EPROBE_DEFER;
7800 }
7801 dev_info(&pdev->dev,
7802 "%s: found %d wsa881x devices registered with ALSA core\n",
7803 __func__, found);
7804
7805codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7806 /* Get maximum aux codec device count for this platform */
7807 ret = of_property_read_u32(pdev->dev.of_node,
7808 "qcom,codec-max-aux-devs",
7809 &codec_max_aux_devs);
7810 if (ret) {
7811 dev_err(&pdev->dev,
7812 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7813 __func__, pdev->dev.of_node->full_name, ret);
7814 codec_max_aux_devs = 0;
7815 goto aux_dev_register;
7816 }
7817 if (codec_max_aux_devs == 0) {
7818 dev_dbg(&pdev->dev,
7819 "%s: Max aux codec devices is 0 for this target?\n",
7820 __func__);
7821 goto aux_dev_register;
7822 }
7823
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7824 /* Get count of aux codec device phandles for this platform */
7825 codec_aux_dev_cnt = of_count_phandle_with_args(
7826 pdev->dev.of_node,
7827 "qcom,codec-aux-devs", NULL);
7828 if (codec_aux_dev_cnt == -ENOENT) {
7829 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7830 __func__);
7831 goto err;
7832 } else if (codec_aux_dev_cnt <= 0) {
7833 dev_err(&pdev->dev,
7834 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7835 __func__, codec_aux_dev_cnt);
7836 ret = -EINVAL;
7837 goto err;
7838 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7839
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7840 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7841 * Expect total phandles count to be NOT less than maximum possible
7842 * AUX device count. However, if it is less, then assign same value to
7843 * max count as well.
7844 */
7845 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7846 dev_dbg(&pdev->dev,
7847 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7848 __func__, codec_max_aux_devs,
7849 codec_aux_dev_cnt);
7850 codec_max_aux_devs = codec_aux_dev_cnt;
7851 }
7852
7853 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7854 * Alloc mem to store phandle and index info of aux codec
7855 * if already registered with ALSA core
7856 */
7857 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7858 sizeof(struct aux_codec_dev_info),
7859 GFP_KERNEL);
7860 if (!aux_cdc_dev_info) {
7861 ret = -ENOMEM;
7862 goto err;
7863 }
7864
7865 /*
7866 * search and check whether all aux codecs are already
7867 * registered with ALSA core or not. If found a node, store
7868 * the node and the index in a local array of struct for later
7869 * use.
7870 */
7871 for (i = 0; i < codec_aux_dev_cnt; i++) {
7872 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
7873 "qcom,codec-aux-devs", i);
7874 if (unlikely(!aux_codec_of_node)) {
7875 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7876 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7877 "%s: aux codec dev node is not present\n",
7878 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7879 ret = -EINVAL;
7880 goto err;
7881 }
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7882 if (soc_find_component(aux_codec_of_node, NULL)) {
7883 /* AUX codec registered with ALSA core */
7884 aux_cdc_dev_info[codecs_found].of_node =
7885 aux_codec_of_node;
7886 aux_cdc_dev_info[codecs_found].index = i;
7887 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7888 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7889 }
7890
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7891 if (codecs_found < codec_aux_dev_cnt) {
7892 dev_dbg(&pdev->dev,
7893 "%s: failed to find %d components. Found only %d\n",
7894 __func__, codec_aux_dev_cnt, codecs_found);
7895 return -EPROBE_DEFER;
7896 }
7897 dev_info(&pdev->dev,
7898 "%s: found %d AUX codecs registered with ALSA core\n",
7899 __func__, codecs_found);
7900
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7901aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7902 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
7903 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
7904
7905 /* Alloc array of AUX devs struct */
7906 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
7907 sizeof(struct snd_soc_aux_dev),
7908 GFP_KERNEL);
7909 if (!msm_aux_dev) {
7910 ret = -ENOMEM;
7911 goto err;
7912 }
7913
7914 /* Alloc array of codec conf struct */
7915 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
7916 sizeof(struct snd_soc_codec_conf),
7917 GFP_KERNEL);
7918 if (!msm_codec_conf) {
7919 ret = -ENOMEM;
7920 goto err;
7921 }
7922
7923 for (i = 0; i < wsa_max_devs; i++) {
7924 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
7925 GFP_KERNEL);
7926 if (!dev_name_str) {
7927 ret = -ENOMEM;
7928 goto err;
7929 }
7930
7931 ret = of_property_read_string_index(pdev->dev.of_node,
7932 "qcom,wsa-aux-dev-prefix",
7933 wsa881x_dev_info[i].index,
7934 auxdev_name_prefix);
7935 if (ret) {
7936 dev_err(&pdev->dev,
7937 "%s: failed to read wsa aux dev prefix, ret = %d\n",
7938 __func__, ret);
7939 ret = -EINVAL;
7940 goto err;
7941 }
7942
7943 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
7944 msm_aux_dev[i].name = dev_name_str;
7945 msm_aux_dev[i].codec_name = NULL;
7946 msm_aux_dev[i].codec_of_node =
7947 wsa881x_dev_info[i].of_node;
7948 msm_aux_dev[i].init = msm_wsa881x_init;
7949 msm_codec_conf[i].dev_name = NULL;
7950 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
7951 msm_codec_conf[i].of_node =
7952 wsa881x_dev_info[i].of_node;
7953 }
7954
7955 for (i = 0; i < codec_aux_dev_cnt; i++) {
7956 msm_aux_dev[wsa_max_devs + i].name = NULL;
7957 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
7958 msm_aux_dev[wsa_max_devs + i].codec_of_node =
7959 aux_cdc_dev_info[i].of_node;
7960 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
7961 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
7962 msm_codec_conf[wsa_max_devs + i].name_prefix =
7963 NULL;
7964 msm_codec_conf[wsa_max_devs + i].of_node =
7965 aux_cdc_dev_info[i].of_node;
7966 }
7967
7968 card->codec_conf = msm_codec_conf;
7969 card->aux_dev = msm_aux_dev;
7970err:
7971 return ret;
7972}
7973
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7974static void msm_i2s_auxpcm_init(struct platform_device *pdev)
7975{
7976 int count = 0;
7977 u32 mi2s_master_slave[MI2S_MAX];
7978 int ret = 0;
7979
7980 for (count = 0; count < MI2S_MAX; count++) {
7981 mutex_init(&mi2s_intf_conf[count].lock);
7982 mi2s_intf_conf[count].ref_cnt = 0;
7983 }
7984
7985 ret = of_property_read_u32_array(pdev->dev.of_node,
7986 "qcom,msm-mi2s-master",
7987 mi2s_master_slave, MI2S_MAX);
7988 if (ret) {
7989 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
7990 __func__);
7991 } else {
7992 for (count = 0; count < MI2S_MAX; count++) {
7993 mi2s_intf_conf[count].msm_is_mi2s_master =
7994 mi2s_master_slave[count];
7995 }
7996 }
7997}
7998
7999static void msm_i2s_auxpcm_deinit(void)
8000{
8001 int count = 0;
8002
8003 for (count = 0; count < MI2S_MAX; count++) {
8004 mutex_destroy(&mi2s_intf_conf[count].lock);
8005 mi2s_intf_conf[count].ref_cnt = 0;
8006 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8007 }
8008}
8009
8010static int kona_ssr_enable(struct device *dev, void *data)
8011{
8012 struct platform_device *pdev = to_platform_device(dev);
8013 struct snd_soc_card *card = platform_get_drvdata(pdev);
8014 int ret = 0;
8015
8016 if (!card) {
8017 dev_err(dev, "%s: card is NULL\n", __func__);
8018 ret = -EINVAL;
8019 goto err;
8020 }
8021
8022 if (!strcmp(card->name, "kona-stub-snd-card")) {
8023 /* TODO */
8024 dev_dbg(dev, "%s: TODO \n", __func__);
8025 }
8026
8027 snd_soc_card_change_online_state(card, 1);
8028 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8029
8030err:
8031 return ret;
8032}
8033
8034static void kona_ssr_disable(struct device *dev, void *data)
8035{
8036 struct platform_device *pdev = to_platform_device(dev);
8037 struct snd_soc_card *card = platform_get_drvdata(pdev);
8038
8039 if (!card) {
8040 dev_err(dev, "%s: card is NULL\n", __func__);
8041 return;
8042 }
8043
8044 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8045 snd_soc_card_change_online_state(card, 0);
8046
8047 if (!strcmp(card->name, "kona-stub-snd-card")) {
8048 /* TODO */
8049 dev_dbg(dev, "%s: TODO \n", __func__);
8050 }
8051}
8052
8053static const struct snd_event_ops kona_ssr_ops = {
8054 .enable = kona_ssr_enable,
8055 .disable = kona_ssr_disable,
8056};
8057
8058static int msm_audio_ssr_compare(struct device *dev, void *data)
8059{
8060 struct device_node *node = data;
8061
8062 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8063 __func__, dev->of_node, node);
8064 return (dev->of_node && dev->of_node == node);
8065}
8066
8067static int msm_audio_ssr_register(struct device *dev)
8068{
8069 struct device_node *np = dev->of_node;
8070 struct snd_event_clients *ssr_clients = NULL;
8071 struct device_node *node = NULL;
8072 int ret = 0;
8073 int i = 0;
8074
8075 for (i = 0; ; i++) {
8076 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8077 if (!node)
8078 break;
8079 snd_event_mstr_add_client(&ssr_clients,
8080 msm_audio_ssr_compare, node);
8081 }
8082
8083 ret = snd_event_master_register(dev, &kona_ssr_ops,
8084 ssr_clients, NULL);
8085 if (!ret)
8086 snd_event_notify(dev, SND_EVENT_UP);
8087
8088 return ret;
8089}
8090
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8091static int msm_asoc_machine_probe(struct platform_device *pdev)
8092{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8093 struct snd_soc_card *card = NULL;
8094 struct msm_asoc_mach_data *pdata = NULL;
8095 const char *mbhc_audio_jack_type = NULL;
8096 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8097 uint index = 0;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]8098 struct clk *lpass_audio_hw_vote = NULL;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8099
8100 if (!pdev->dev.of_node) {
8101 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
8102 return -EINVAL;
8103 }
8104
8105 pdata = devm_kzalloc(&pdev->dev,
8106 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8107 if (!pdata)
8108 return -ENOMEM;
8109
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]8110 of_property_read_u32(pdev->dev.of_node,
8111 "qcom,lito-is-v2-enabled",
8112 &pdata->lito_v2_enabled);
8113
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8114 card = populate_snd_card_dailinks(&pdev->dev);
8115 if (!card) {
8116 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8117 ret = -EINVAL;
8118 goto err;
8119 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8120
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8121 card->dev = &pdev->dev;
8122 platform_set_drvdata(pdev, card);
8123 snd_soc_card_set_drvdata(card, pdata);
8124
8125 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8126 if (ret) {
8127 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
8128 __func__, ret);
8129 goto err;
8130 }
8131
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8132 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8133 if (ret) {
8134 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
8135 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8136 goto err;
8137 }
8138
8139 ret = msm_populate_dai_link_component_of_node(card);
8140 if (ret) {
8141 ret = -EPROBE_DEFER;
8142 goto err;
8143 }
8144
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]8145 ret = msm_init_aux_dev(pdev, card);
8146 if (ret)
8147 goto err;
8148
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8149 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8150 if (ret == -EPROBE_DEFER) {
8151 if (codec_reg_done)
8152 ret = -EINVAL;
8153 goto err;
8154 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8155 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
8156 __func__, ret);
8157 goto err;
8158 }
8159 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
8160 __func__, card->name);
8161
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8162 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8163 "qcom,hph-en1-gpio", 0);
8164 if (!pdata->hph_en1_gpio_p) {
8165 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8166 __func__, "qcom,hph-en1-gpio",
8167 pdev->dev.of_node->full_name);
8168 }
8169
8170 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8171 "qcom,hph-en0-gpio", 0);
8172 if (!pdata->hph_en0_gpio_p) {
8173 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8174 __func__, "qcom,hph-en0-gpio",
8175 pdev->dev.of_node->full_name);
8176 }
8177
8178 ret = of_property_read_string(pdev->dev.of_node,
8179 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8180 if (ret) {
8181 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
8182 __func__, "qcom,mbhc-audio-jack-type",
8183 pdev->dev.of_node->full_name);
8184 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8185 } else {
8186 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8187 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8188 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8189 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8190 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8191 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8192 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8193 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8194 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8195 } else {
8196 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8197 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8198 }
8199 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]8200 /*
8201 * Parse US-Euro gpio info from DT. Report no error if us-euro
8202 * entry is not found in DT file as some targets do not support
8203 * US-Euro detection
8204 */
8205 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8206 "qcom,us-euro-gpios", 0);
8207 if (!pdata->us_euro_gpio_p) {
8208 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8209 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8210 } else {
8211 dev_dbg(&pdev->dev, "%s detected\n",
8212 "qcom,us-euro-gpios");
8213 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8214 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8215
Meng Wanga60b4082019-02-25 17:02:23 +0800[diff] [blame]8216 if (wcd_mbhc_cfg.enable_usbc_analog)
8217 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8218
8219 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8220 "fsa4480-i2c-handle", 0);
8221 if (!pdata->fsa_handle)
8222 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8223 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
8224
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8225 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]8226 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8227 "qcom,cdc-dmic01-gpios",
8228 0);
8229 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8230 "qcom,cdc-dmic23-gpios",
8231 0);
8232 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
8233 "qcom,cdc-dmic45-gpios",
8234 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +0530[diff] [blame]8235 if (pdata->dmic01_gpio_p)
8236 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
8237 if (pdata->dmic23_gpio_p)
8238 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +0530[diff] [blame]8239 if (pdata->dmic45_gpio_p)
8240 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8241
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8242 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8243 "qcom,pri-mi2s-gpios", 0);
8244 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8245 "qcom,sec-mi2s-gpios", 0);
8246 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8247 "qcom,tert-mi2s-gpios", 0);
8248 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8249 "qcom,quat-mi2s-gpios", 0);
8250 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8251 "qcom,quin-mi2s-gpios", 0);
8252 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8253 "qcom,sen-mi2s-gpios", 0);
Meng Wang4f5815c2020-02-13 14:10:20 +0800[diff] [blame]8254 for (index = PRIM_MI2S; index < MI2S_MAX; index++) {
8255 if (pdata->mi2s_gpio_p[index])
8256 msm_cdc_pinctrl_set_wakeup_capable(pdata->mi2s_gpio_p[index], false);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8257 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
Meng Wang4f5815c2020-02-13 14:10:20 +0800[diff] [blame]8258 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8259
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]8260 /* Register LPASS audio hw vote */
8261 lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
8262 if (IS_ERR(lpass_audio_hw_vote)) {
8263 ret = PTR_ERR(lpass_audio_hw_vote);
8264 dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
8265 __func__, "lpass_audio_hw_vote", ret);
8266 lpass_audio_hw_vote = NULL;
8267 ret = 0;
8268 }
8269 pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
8270 pdata->core_audio_vote_count = 0;
8271
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8272 ret = msm_audio_ssr_register(&pdev->dev);
8273 if (ret)
8274 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8275 __func__, ret);
8276
8277 is_initial_boot = true;
8278
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8279 return 0;
8280err:
8281 devm_kfree(&pdev->dev, pdata);
8282 return ret;
8283}
8284
8285static int msm_asoc_machine_remove(struct platform_device *pdev)
8286{
8287 struct snd_soc_card *card = platform_get_drvdata(pdev);
8288
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8289 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8290 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8291 msm_i2s_auxpcm_deinit();
8292
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8293 return 0;
8294}
8295
8296static struct platform_driver kona_asoc_machine_driver = {
8297 .driver = {
8298 .name = DRV_NAME,
8299 .owner = THIS_MODULE,
8300 .pm = &snd_soc_pm_ops,
8301 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800[diff] [blame]8302 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8303 },
8304 .probe = msm_asoc_machine_probe,
8305 .remove = msm_asoc_machine_remove,
8306};
8307module_platform_driver(kona_asoc_machine_driver);
8308
8309MODULE_DESCRIPTION("ALSA SoC msm");
8310MODULE_LICENSE("GPL v2");
8311MODULE_ALIAS("platform:" DRV_NAME);
8312MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);