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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / c4e96121c5c917b8d44c037f46ce597208853369 / . / asoc / sm6150.c
blob: 307ef0c6321deba9a6ef85a8429480acac2249b5 [file] [log] [blame]
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/of_gpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/input.h>
23#include <linux/of_device.h>
24#include <linux/pm_qos.h>
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]25#include <linux/soc/qcom/fsa4480-i2c.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]26#include <sound/core.h>
27#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/pcm.h>
30#include <sound/pcm_params.h>
31#include <sound/info.h>
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]32#include <soc/snd_event.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]33#include <dsp/q6afe-v2.h>
34#include <dsp/q6core.h>
35#include "device_event.h"
36#include "msm-pcm-routing-v2.h"
37#include "codecs/msm-cdc-pinctrl.h"
38#include "codecs/wcd934x/wcd934x.h"
39#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]40#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]41#include "codecs/wsa881x.h"
42#include "codecs/bolero/bolero-cdc.h"
43#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]44#include "codecs/bolero/wsa-macro.h"
Laxminath Kasam838f0b82018-10-23 20:20:18 +0530[diff] [blame]45#include "codecs/wcd937x/wcd937x.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]46
47#define DRV_NAME "sm6150-asoc-snd"
48
49#define __CHIPSET__ "SM6150 "
50#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
51
52#define SAMPLING_RATE_8KHZ 8000
53#define SAMPLING_RATE_11P025KHZ 11025
54#define SAMPLING_RATE_16KHZ 16000
55#define SAMPLING_RATE_22P05KHZ 22050
56#define SAMPLING_RATE_32KHZ 32000
57#define SAMPLING_RATE_44P1KHZ 44100
58#define SAMPLING_RATE_48KHZ 48000
59#define SAMPLING_RATE_88P2KHZ 88200
60#define SAMPLING_RATE_96KHZ 96000
61#define SAMPLING_RATE_176P4KHZ 176400
62#define SAMPLING_RATE_192KHZ 192000
63#define SAMPLING_RATE_352P8KHZ 352800
64#define SAMPLING_RATE_384KHZ 384000
65
66#define WCD9XXX_MBHC_DEF_BUTTONS 8
67#define WCD9XXX_MBHC_DEF_RLOADS 5
68#define CODEC_EXT_CLK_RATE 9600000
69#define ADSP_STATE_READY_TIMEOUT_MS 3000
70#define DEV_NAME_STR_LEN 32
71
72#define WSA8810_NAME_1 "wsa881x.20170211"
73#define WSA8810_NAME_2 "wsa881x.20170212"
74#define WCN_CDC_SLIM_RX_CH_MAX 2
75#define WCN_CDC_SLIM_TX_CH_MAX 3
76#define TDM_CHANNEL_MAX 8
77
78#define ADSP_STATE_READY_TIMEOUT_MS 3000
79#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
80#define MSM_HIFI_ON 1
81
82enum {
83 SLIM_RX_0 = 0,
84 SLIM_RX_1,
85 SLIM_RX_2,
86 SLIM_RX_3,
87 SLIM_RX_4,
88 SLIM_RX_5,
89 SLIM_RX_6,
90 SLIM_RX_7,
91 SLIM_RX_MAX,
92};
93enum {
94 SLIM_TX_0 = 0,
95 SLIM_TX_1,
96 SLIM_TX_2,
97 SLIM_TX_3,
98 SLIM_TX_4,
99 SLIM_TX_5,
100 SLIM_TX_6,
101 SLIM_TX_7,
102 SLIM_TX_8,
103 SLIM_TX_MAX,
104};
105
106enum {
107 PRIM_MI2S = 0,
108 SEC_MI2S,
109 TERT_MI2S,
110 QUAT_MI2S,
111 QUIN_MI2S,
112 MI2S_MAX,
113};
114
115enum {
116 PRIM_AUX_PCM = 0,
117 SEC_AUX_PCM,
118 TERT_AUX_PCM,
119 QUAT_AUX_PCM,
120 QUIN_AUX_PCM,
121 AUX_PCM_MAX,
122};
123
124enum {
125 WSA_CDC_DMA_RX_0 = 0,
126 WSA_CDC_DMA_RX_1,
127 RX_CDC_DMA_RX_0,
128 RX_CDC_DMA_RX_1,
129 RX_CDC_DMA_RX_2,
130 RX_CDC_DMA_RX_3,
131 RX_CDC_DMA_RX_5,
132 CDC_DMA_RX_MAX,
133};
134
135enum {
136 WSA_CDC_DMA_TX_0 = 0,
137 WSA_CDC_DMA_TX_1,
138 WSA_CDC_DMA_TX_2,
139 TX_CDC_DMA_TX_0,
140 TX_CDC_DMA_TX_3,
141 TX_CDC_DMA_TX_4,
142 CDC_DMA_TX_MAX,
143};
144
145struct mi2s_conf {
146 struct mutex lock;
147 u32 ref_cnt;
148 u32 msm_is_mi2s_master;
149};
150
151static u32 mi2s_ebit_clk[MI2S_MAX] = {
152 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
153 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
154 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
155 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
156 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
157};
158
159struct dev_config {
160 u32 sample_rate;
161 u32 bit_format;
162 u32 channels;
163};
164
165enum {
166 DP_RX_IDX = 0,
167 EXT_DISP_RX_IDX_MAX,
168};
169
170struct msm_wsa881x_dev_info {
171 struct device_node *of_node;
172 u32 index;
173};
174
175struct aux_codec_dev_info {
176 struct device_node *of_node;
177 u32 index;
178};
179
180enum pinctrl_pin_state {
181 STATE_DISABLE = 0, /* All pins are in sleep state */
182 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
183 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
184};
185
186struct msm_pinctrl_info {
187 struct pinctrl *pinctrl;
188 struct pinctrl_state *mi2s_disable;
189 struct pinctrl_state *tdm_disable;
190 struct pinctrl_state *mi2s_active;
191 struct pinctrl_state *tdm_active;
192 enum pinctrl_pin_state curr_state;
193};
194
195struct msm_asoc_mach_data {
196 struct snd_info_entry *codec_root;
197 struct msm_pinctrl_info pinctrl_info;
198 int usbc_en2_gpio; /* used by gpio driver API */
199 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
200 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
201 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
202 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
203 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
204 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]205 bool is_afe_config_done;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]206 struct device_node *fsa_handle;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]207};
208
209struct msm_asoc_wcd93xx_codec {
210 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
211 enum afe_config_type config_type);
212};
213
214static const char *const pin_states[] = {"sleep", "i2s-active",
215 "tdm-active"};
216
217static struct snd_soc_card snd_soc_card_sm6150_msm;
218
219enum {
220 TDM_0 = 0,
221 TDM_1,
222 TDM_2,
223 TDM_3,
224 TDM_4,
225 TDM_5,
226 TDM_6,
227 TDM_7,
228 TDM_PORT_MAX,
229};
230
231enum {
232 TDM_PRI = 0,
233 TDM_SEC,
234 TDM_TERT,
235 TDM_QUAT,
236 TDM_QUIN,
237 TDM_INTERFACE_MAX,
238};
239
240struct tdm_port {
241 u32 mode;
242 u32 channel;
243};
244
245/* TDM default config */
246static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
247 { /* PRI TDM */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
253 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
254 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
256 },
257 { /* SEC TDM */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
263 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
264 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
266 },
267 { /* TERT TDM */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
276 },
277 { /* QUAT TDM */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
286 },
287 { /* QUIN TDM */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
294 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
295 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
296 }
297
298};
299
300/* TDM default config */
301static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
302 { /* PRI TDM */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
311 },
312 { /* SEC TDM */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
321 },
322 { /* TERT TDM */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
331 },
332 { /* QUAT TDM */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
341 },
342 { /* QUIN TDM */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
351 }
352};
353
354
355/* Default configuration of slimbus channels */
356static struct dev_config slim_rx_cfg[] = {
357 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
362 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
363 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
364 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
365};
366
367static struct dev_config slim_tx_cfg[] = {
368 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
372 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
373 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
374 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
375 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
376 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
377};
378
379/* Default configuration of Codec DMA Interface Tx */
380static struct dev_config cdc_dma_rx_cfg[] = {
381 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
383 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
384 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
385 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
386 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
387 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
388};
389
390/* Default configuration of Codec DMA Interface Rx */
391static struct dev_config cdc_dma_tx_cfg[] = {
392 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
395 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
396 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
397 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
398};
399
400/* Default configuration of external display BE */
401static struct dev_config ext_disp_rx_cfg[] = {
402 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
403};
404
405static struct dev_config usb_rx_cfg = {
406 .sample_rate = SAMPLING_RATE_48KHZ,
407 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
408 .channels = 2,
409};
410
411static struct dev_config usb_tx_cfg = {
412 .sample_rate = SAMPLING_RATE_48KHZ,
413 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
414 .channels = 1,
415};
416
417static struct dev_config proxy_rx_cfg = {
418 .sample_rate = SAMPLING_RATE_48KHZ,
419 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
420 .channels = 2,
421};
422
423/* Default configuration of MI2S channels */
424static struct dev_config mi2s_rx_cfg[] = {
425 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
426 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
427 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
428 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
429 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
430};
431
432static struct dev_config mi2s_tx_cfg[] = {
433 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
435 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
436 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
437 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
438};
439
440static struct dev_config aux_pcm_rx_cfg[] = {
441 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
442 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
443 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
444 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
445 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
446};
447
448static struct dev_config aux_pcm_tx_cfg[] = {
449 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
450 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
451 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
452 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
453 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
454};
455static int msm_vi_feed_tx_ch = 2;
456static const char *const slim_rx_ch_text[] = {"One", "Two"};
457static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
458 "Five", "Six", "Seven",
459 "Eight"};
460static const char *const vi_feed_ch_text[] = {"One", "Two"};
461static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
462 "S32_LE"};
463static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
464 "S24_3LE"};
465static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
466 "KHZ_32", "KHZ_44P1", "KHZ_48",
467 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
468 "KHZ_192", "KHZ_352P8", "KHZ_384"};
469static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
470 "KHZ_44P1", "KHZ_48",
471 "KHZ_88P2", "KHZ_96"};
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]472static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
473 "KHZ_44P1", "KHZ_48",
474 "KHZ_88P2", "KHZ_96"};
475static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
476 "KHZ_44P1", "KHZ_48",
477 "KHZ_88P2", "KHZ_96"};
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]478static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
479 "Five", "Six", "Seven",
480 "Eight"};
481static char const *ch_text[] = {"Two", "Three", "Four", "Five",
482 "Six", "Seven", "Eight"};
483static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
484 "KHZ_16", "KHZ_22P05",
485 "KHZ_32", "KHZ_44P1", "KHZ_48",
486 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
487 "KHZ_192", "KHZ_352P8", "KHZ_384"};
488static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
489 "KHZ_192", "KHZ_32", "KHZ_44P1",
490 "KHZ_88P2", "KHZ_176P4" };
491static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
492 "Five", "Six", "Seven", "Eight"};
493static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
494static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
495 "KHZ_48", "KHZ_176P4",
496 "KHZ_352P8"};
497static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
498static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
499 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
500 "KHZ_48", "KHZ_96", "KHZ_192"};
501static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
502 "Five", "Six", "Seven",
503 "Eight"};
504static const char *const hifi_text[] = {"Off", "On"};
505static const char *const qos_text[] = {"Disable", "Enable"};
506
507static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
508static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
509 "Five", "Six", "Seven",
510 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]511static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
512 "KHZ_16", "KHZ_22P05",
513 "KHZ_32", "KHZ_44P1", "KHZ_48",
514 "KHZ_88P2", "KHZ_96",
515 "KHZ_176P4", "KHZ_192",
516 "KHZ_352P8", "KHZ_384"};
517
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]518
519static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
520static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
521static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
522static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
523static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
524static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
525static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
526static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
527static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
528static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
529static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
530static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
531static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
532static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
533static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
534static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
535static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
536static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
537static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
540static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
541static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]543static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
544static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]545static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
548 ext_disp_sample_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
550static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
551static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
553static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
554static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
558static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
565static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
566static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
567static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
568static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
569static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
570static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
571static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
572static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
573static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
574static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
575static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
576static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
577static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
578static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
579static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
586static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
587static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
588static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
589static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
590static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
592static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
593static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
594static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
595static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
596static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
597static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
598static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
599static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
600static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
601static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
602static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
603static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
604static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
605static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
606static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
607static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
608static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
609static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
610static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
611static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
612static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
613static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
614static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
615static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
616 cdc_dma_sample_rate_text);
617static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
618 cdc_dma_sample_rate_text);
619static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
620 cdc_dma_sample_rate_text);
621static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
622 cdc_dma_sample_rate_text);
623static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
624 cdc_dma_sample_rate_text);
625static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
626 cdc_dma_sample_rate_text);
627static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
628 cdc_dma_sample_rate_text);
629static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
630 cdc_dma_sample_rate_text);
631static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
632 cdc_dma_sample_rate_text);
633static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
634 cdc_dma_sample_rate_text);
635static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
636 cdc_dma_sample_rate_text);
637static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
638 cdc_dma_sample_rate_text);
639static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
640 cdc_dma_sample_rate_text);
641
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]642static int msm_hifi_control;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]643static bool codec_reg_done;
644static struct snd_soc_aux_dev *msm_aux_dev;
645static struct snd_soc_codec_conf *msm_codec_conf;
646static struct msm_asoc_wcd93xx_codec msm_codec_fn;
647
648static int dmic_0_1_gpio_cnt;
649static int dmic_2_3_gpio_cnt;
650
651static void *def_wcd_mbhc_cal(void);
652static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
653 int enable, bool dapm);
654static int msm_wsa881x_init(struct snd_soc_component *component);
655static int msm_aux_codec_init(struct snd_soc_component *component);
656
657/*
658 * Need to report LINEIN
659 * if R/L channel impedance is larger than 5K ohm
660 */
661static struct wcd_mbhc_config wcd_mbhc_cfg = {
662 .read_fw_bin = false,
663 .calibration = NULL,
664 .detect_extn_cable = true,
665 .mono_stero_detection = false,
666 .swap_gnd_mic = NULL,
667 .hs_ext_micbias = true,
668 .key_code[0] = KEY_MEDIA,
669 .key_code[1] = KEY_VOICECOMMAND,
670 .key_code[2] = KEY_VOLUMEUP,
671 .key_code[3] = KEY_VOLUMEDOWN,
672 .key_code[4] = 0,
673 .key_code[5] = 0,
674 .key_code[6] = 0,
675 .key_code[7] = 0,
676 .linein_th = 5000,
677 .moisture_en = true,
678 .mbhc_micbias = MIC_BIAS_2,
679 .anc_micbias = MIC_BIAS_2,
680 .enable_anc_mic_detect = false,
681};
682
683static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
684 {"MIC BIAS1", NULL, "MCLK TX"},
685 {"MIC BIAS2", NULL, "MCLK TX"},
686 {"MIC BIAS3", NULL, "MCLK TX"},
687 {"MIC BIAS4", NULL, "MCLK TX"},
688};
689
690static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
691 {
692 AFE_API_VERSION_I2S_CONFIG,
693 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
694 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
695 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
696 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
697 0,
698 },
699 {
700 AFE_API_VERSION_I2S_CONFIG,
701 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
702 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
703 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
704 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
705 0,
706 },
707 {
708 AFE_API_VERSION_I2S_CONFIG,
709 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
710 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
711 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
712 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
713 0,
714 },
715 {
716 AFE_API_VERSION_I2S_CONFIG,
717 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
718 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
719 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
720 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
721 0,
722 },
723 {
724 AFE_API_VERSION_I2S_CONFIG,
725 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
726 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
727 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
728 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
729 0,
730 }
731
732};
733
734static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
735
736static int slim_get_sample_rate_val(int sample_rate)
737{
738 int sample_rate_val = 0;
739
740 switch (sample_rate) {
741 case SAMPLING_RATE_8KHZ:
742 sample_rate_val = 0;
743 break;
744 case SAMPLING_RATE_16KHZ:
745 sample_rate_val = 1;
746 break;
747 case SAMPLING_RATE_32KHZ:
748 sample_rate_val = 2;
749 break;
750 case SAMPLING_RATE_44P1KHZ:
751 sample_rate_val = 3;
752 break;
753 case SAMPLING_RATE_48KHZ:
754 sample_rate_val = 4;
755 break;
756 case SAMPLING_RATE_88P2KHZ:
757 sample_rate_val = 5;
758 break;
759 case SAMPLING_RATE_96KHZ:
760 sample_rate_val = 6;
761 break;
762 case SAMPLING_RATE_176P4KHZ:
763 sample_rate_val = 7;
764 break;
765 case SAMPLING_RATE_192KHZ:
766 sample_rate_val = 8;
767 break;
768 case SAMPLING_RATE_352P8KHZ:
769 sample_rate_val = 9;
770 break;
771 case SAMPLING_RATE_384KHZ:
772 sample_rate_val = 10;
773 break;
774 default:
775 sample_rate_val = 4;
776 break;
777 }
778 return sample_rate_val;
779}
780
781static int slim_get_sample_rate(int value)
782{
783 int sample_rate = 0;
784
785 switch (value) {
786 case 0:
787 sample_rate = SAMPLING_RATE_8KHZ;
788 break;
789 case 1:
790 sample_rate = SAMPLING_RATE_16KHZ;
791 break;
792 case 2:
793 sample_rate = SAMPLING_RATE_32KHZ;
794 break;
795 case 3:
796 sample_rate = SAMPLING_RATE_44P1KHZ;
797 break;
798 case 4:
799 sample_rate = SAMPLING_RATE_48KHZ;
800 break;
801 case 5:
802 sample_rate = SAMPLING_RATE_88P2KHZ;
803 break;
804 case 6:
805 sample_rate = SAMPLING_RATE_96KHZ;
806 break;
807 case 7:
808 sample_rate = SAMPLING_RATE_176P4KHZ;
809 break;
810 case 8:
811 sample_rate = SAMPLING_RATE_192KHZ;
812 break;
813 case 9:
814 sample_rate = SAMPLING_RATE_352P8KHZ;
815 break;
816 case 10:
817 sample_rate = SAMPLING_RATE_384KHZ;
818 break;
819 default:
820 sample_rate = SAMPLING_RATE_48KHZ;
821 break;
822 }
823 return sample_rate;
824}
825
826static int slim_get_bit_format_val(int bit_format)
827{
828 int val = 0;
829
830 switch (bit_format) {
831 case SNDRV_PCM_FORMAT_S32_LE:
832 val = 3;
833 break;
834 case SNDRV_PCM_FORMAT_S24_3LE:
835 val = 2;
836 break;
837 case SNDRV_PCM_FORMAT_S24_LE:
838 val = 1;
839 break;
840 case SNDRV_PCM_FORMAT_S16_LE:
841 default:
842 val = 0;
843 break;
844 }
845 return val;
846}
847
848static int slim_get_bit_format(int val)
849{
850 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
851
852 switch (val) {
853 case 0:
854 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
855 break;
856 case 1:
857 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
858 break;
859 case 2:
860 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
861 break;
862 case 3:
863 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
864 break;
865 default:
866 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
867 break;
868 }
869 return bit_fmt;
870}
871
872static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
873{
874 int port_id = 0;
875
876 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
877 port_id = SLIM_RX_0;
878 } else if (strnstr(kcontrol->id.name,
879 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
880 port_id = SLIM_RX_2;
881 } else if (strnstr(kcontrol->id.name,
882 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
883 port_id = SLIM_RX_5;
884 } else if (strnstr(kcontrol->id.name,
885 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
886 port_id = SLIM_RX_6;
887 } else if (strnstr(kcontrol->id.name,
888 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
889 port_id = SLIM_TX_0;
890 } else if (strnstr(kcontrol->id.name,
891 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
892 port_id = SLIM_TX_1;
893 } else {
894 pr_err("%s: unsupported channel: %s\n",
895 __func__, kcontrol->id.name);
896 return -EINVAL;
897 }
898
899 return port_id;
900}
901
902static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
903 struct snd_ctl_elem_value *ucontrol)
904{
905 int ch_num = slim_get_port_idx(kcontrol);
906
907 if (ch_num < 0)
908 return ch_num;
909
910 ucontrol->value.enumerated.item[0] =
911 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
912
913 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
914 ch_num, slim_rx_cfg[ch_num].sample_rate,
915 ucontrol->value.enumerated.item[0]);
916
917 return 0;
918}
919
920static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
921 struct snd_ctl_elem_value *ucontrol)
922{
923 int ch_num = slim_get_port_idx(kcontrol);
924
925 if (ch_num < 0)
926 return ch_num;
927
928 slim_rx_cfg[ch_num].sample_rate =
929 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
930
931 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
932 ch_num, slim_rx_cfg[ch_num].sample_rate,
933 ucontrol->value.enumerated.item[0]);
934
935 return 0;
936}
937
938static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
939 struct snd_ctl_elem_value *ucontrol)
940{
941 int ch_num = slim_get_port_idx(kcontrol);
942
943 if (ch_num < 0)
944 return ch_num;
945
946 ucontrol->value.enumerated.item[0] =
947 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
948
949 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
950 ch_num, slim_tx_cfg[ch_num].sample_rate,
951 ucontrol->value.enumerated.item[0]);
952
953 return 0;
954}
955
956static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
957 struct snd_ctl_elem_value *ucontrol)
958{
959 int sample_rate = 0;
960 int ch_num = slim_get_port_idx(kcontrol);
961
962 if (ch_num < 0)
963 return ch_num;
964
965 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
966 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
967 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
968 __func__, sample_rate);
969 return -EINVAL;
970 }
971 slim_tx_cfg[ch_num].sample_rate = sample_rate;
972
973 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
974 ch_num, slim_tx_cfg[ch_num].sample_rate,
975 ucontrol->value.enumerated.item[0]);
976
977 return 0;
978}
979
980static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
981 struct snd_ctl_elem_value *ucontrol)
982{
983 int ch_num = slim_get_port_idx(kcontrol);
984
985 if (ch_num < 0)
986 return ch_num;
987
988 ucontrol->value.enumerated.item[0] =
989 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
990
991 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
992 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
993 ucontrol->value.enumerated.item[0]);
994
995 return 0;
996}
997
998static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
999 struct snd_ctl_elem_value *ucontrol)
1000{
1001 int ch_num = slim_get_port_idx(kcontrol);
1002
1003 if (ch_num < 0)
1004 return ch_num;
1005
1006 slim_rx_cfg[ch_num].bit_format =
1007 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1008
1009 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1010 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1011 ucontrol->value.enumerated.item[0]);
1012
1013 return 0;
1014}
1015
1016static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1017 struct snd_ctl_elem_value *ucontrol)
1018{
1019 int ch_num = slim_get_port_idx(kcontrol);
1020
1021 if (ch_num < 0)
1022 return ch_num;
1023
1024 ucontrol->value.enumerated.item[0] =
1025 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1026
1027 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1028 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1029 ucontrol->value.enumerated.item[0]);
1030
1031 return 0;
1032}
1033
1034static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1035 struct snd_ctl_elem_value *ucontrol)
1036{
1037 int ch_num = slim_get_port_idx(kcontrol);
1038
1039 if (ch_num < 0)
1040 return ch_num;
1041
1042 slim_tx_cfg[ch_num].bit_format =
1043 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1044
1045 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1046 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1047 ucontrol->value.enumerated.item[0]);
1048
1049 return 0;
1050}
1051
1052static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1053 struct snd_ctl_elem_value *ucontrol)
1054{
1055 int ch_num = slim_get_port_idx(kcontrol);
1056
1057 if (ch_num < 0)
1058 return ch_num;
1059
1060 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1061 ch_num, slim_rx_cfg[ch_num].channels);
1062 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1063
1064 return 0;
1065}
1066
1067static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1068 struct snd_ctl_elem_value *ucontrol)
1069{
1070 int ch_num = slim_get_port_idx(kcontrol);
1071
1072 if (ch_num < 0)
1073 return ch_num;
1074
1075 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1076 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1077 ch_num, slim_rx_cfg[ch_num].channels);
1078
1079 return 1;
1080}
1081
1082static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1083 struct snd_ctl_elem_value *ucontrol)
1084{
1085 int ch_num = slim_get_port_idx(kcontrol);
1086
1087 if (ch_num < 0)
1088 return ch_num;
1089
1090 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1091 ch_num, slim_tx_cfg[ch_num].channels);
1092 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1093
1094 return 0;
1095}
1096
1097static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1098 struct snd_ctl_elem_value *ucontrol)
1099{
1100 int ch_num = slim_get_port_idx(kcontrol);
1101
1102 if (ch_num < 0)
1103 return ch_num;
1104
1105 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1106 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1107 ch_num, slim_tx_cfg[ch_num].channels);
1108
1109 return 1;
1110}
1111
1112static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1113 struct snd_ctl_elem_value *ucontrol)
1114{
1115 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1116 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1117 ucontrol->value.integer.value[0]);
1118 return 0;
1119}
1120
1121static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1122 struct snd_ctl_elem_value *ucontrol)
1123{
1124 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1125
1126 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1127 return 1;
1128}
1129
1130static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1131 struct snd_ctl_elem_value *ucontrol)
1132{
1133 /*
1134 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1135 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1136 * value.
1137 */
1138 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1139 case SAMPLING_RATE_96KHZ:
1140 ucontrol->value.integer.value[0] = 5;
1141 break;
1142 case SAMPLING_RATE_88P2KHZ:
1143 ucontrol->value.integer.value[0] = 4;
1144 break;
1145 case SAMPLING_RATE_48KHZ:
1146 ucontrol->value.integer.value[0] = 3;
1147 break;
1148 case SAMPLING_RATE_44P1KHZ:
1149 ucontrol->value.integer.value[0] = 2;
1150 break;
1151 case SAMPLING_RATE_16KHZ:
1152 ucontrol->value.integer.value[0] = 1;
1153 break;
1154 case SAMPLING_RATE_8KHZ:
1155 default:
1156 ucontrol->value.integer.value[0] = 0;
1157 break;
1158 }
1159 pr_debug("%s: sample rate = %d\n", __func__,
1160 slim_rx_cfg[SLIM_RX_7].sample_rate);
1161
1162 return 0;
1163}
1164
1165static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1166 struct snd_ctl_elem_value *ucontrol)
1167{
1168 switch (ucontrol->value.integer.value[0]) {
1169 case 1:
1170 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1171 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1172 break;
1173 case 2:
1174 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1175 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1176 break;
1177 case 3:
1178 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1179 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1180 break;
1181 case 4:
1182 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1183 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1184 break;
1185 case 5:
1186 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1187 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1188 break;
1189 case 0:
1190 default:
1191 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1192 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1193 break;
1194 }
1195 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1196 __func__,
1197 slim_rx_cfg[SLIM_RX_7].sample_rate,
1198 slim_tx_cfg[SLIM_TX_7].sample_rate,
1199 ucontrol->value.enumerated.item[0]);
1200
1201 return 0;
1202}
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1203static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
1204 struct snd_ctl_elem_value *ucontrol)
1205{
1206 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1207 case SAMPLING_RATE_96KHZ:
1208 ucontrol->value.integer.value[0] = 5;
1209 break;
1210 case SAMPLING_RATE_88P2KHZ:
1211 ucontrol->value.integer.value[0] = 4;
1212 break;
1213 case SAMPLING_RATE_48KHZ:
1214 ucontrol->value.integer.value[0] = 3;
1215 break;
1216 case SAMPLING_RATE_44P1KHZ:
1217 ucontrol->value.integer.value[0] = 2;
1218 break;
1219 case SAMPLING_RATE_16KHZ:
1220 ucontrol->value.integer.value[0] = 1;
1221 break;
1222 case SAMPLING_RATE_8KHZ:
1223 default:
1224 ucontrol->value.integer.value[0] = 0;
1225 break;
1226 }
1227 pr_debug("%s: sample rate rx = %d", __func__,
1228 slim_rx_cfg[SLIM_RX_7].sample_rate);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1229
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]1230 return 0;
1231}
1232
1233static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
1234 struct snd_ctl_elem_value *ucontrol)
1235{
1236 switch (ucontrol->value.integer.value[0]) {
1237 case 1:
1238 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1239 break;
1240 case 2:
1241 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1242 break;
1243 case 3:
1244 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1245 break;
1246 case 4:
1247 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1248 break;
1249 case 5:
1250 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1251 break;
1252 case 0:
1253 default:
1254 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1255 break;
1256 }
1257 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
1258 __func__,
1259 slim_rx_cfg[SLIM_RX_7].sample_rate,
1260 ucontrol->value.enumerated.item[0]);
1261
1262 return 0;
1263}
1264
1265static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
1266 struct snd_ctl_elem_value *ucontrol)
1267{
1268 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
1269 case SAMPLING_RATE_96KHZ:
1270 ucontrol->value.integer.value[0] = 5;
1271 break;
1272 case SAMPLING_RATE_88P2KHZ:
1273 ucontrol->value.integer.value[0] = 4;
1274 break;
1275 case SAMPLING_RATE_48KHZ:
1276 ucontrol->value.integer.value[0] = 3;
1277 break;
1278 case SAMPLING_RATE_44P1KHZ:
1279 ucontrol->value.integer.value[0] = 2;
1280 break;
1281 case SAMPLING_RATE_16KHZ:
1282 ucontrol->value.integer.value[0] = 1;
1283 break;
1284 case SAMPLING_RATE_8KHZ:
1285 default:
1286 ucontrol->value.integer.value[0] = 0;
1287 break;
1288 }
1289 pr_debug("%s: sample rate tx = %d", __func__,
1290 slim_tx_cfg[SLIM_TX_7].sample_rate);
1291
1292 return 0;
1293}
1294
1295static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
1296 struct snd_ctl_elem_value *ucontrol)
1297{
1298 switch (ucontrol->value.integer.value[0]) {
1299 case 1:
1300 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1301 break;
1302 case 2:
1303 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1304 break;
1305 case 3:
1306 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1307 break;
1308 case 4:
1309 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1310 break;
1311 case 5:
1312 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1313 break;
1314 case 0:
1315 default:
1316 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1317 break;
1318 }
1319 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
1320 __func__,
1321 slim_tx_cfg[SLIM_TX_7].sample_rate,
1322 ucontrol->value.enumerated.item[0]);
1323
1324 return 0;
1325}
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1326static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1327{
1328 int idx = 0;
1329
1330 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1331 sizeof("WSA_CDC_DMA_RX_0")))
1332 idx = WSA_CDC_DMA_RX_0;
1333 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1334 sizeof("WSA_CDC_DMA_RX_0")))
1335 idx = WSA_CDC_DMA_RX_1;
1336 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1337 sizeof("RX_CDC_DMA_RX_0")))
1338 idx = RX_CDC_DMA_RX_0;
1339 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1340 sizeof("RX_CDC_DMA_RX_1")))
1341 idx = RX_CDC_DMA_RX_1;
1342 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1343 sizeof("RX_CDC_DMA_RX_2")))
1344 idx = RX_CDC_DMA_RX_2;
1345 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1346 sizeof("RX_CDC_DMA_RX_3")))
1347 idx = RX_CDC_DMA_RX_3;
1348 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1349 sizeof("RX_CDC_DMA_RX_5")))
1350 idx = RX_CDC_DMA_RX_5;
1351 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1352 sizeof("WSA_CDC_DMA_TX_0")))
1353 idx = WSA_CDC_DMA_TX_0;
1354 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1355 sizeof("WSA_CDC_DMA_TX_1")))
1356 idx = WSA_CDC_DMA_TX_1;
1357 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1358 sizeof("WSA_CDC_DMA_TX_2")))
1359 idx = WSA_CDC_DMA_TX_2;
1360 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1361 sizeof("TX_CDC_DMA_TX_0")))
1362 idx = TX_CDC_DMA_TX_0;
1363 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1364 sizeof("TX_CDC_DMA_TX_3")))
1365 idx = TX_CDC_DMA_TX_3;
1366 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1367 sizeof("TX_CDC_DMA_TX_4")))
1368 idx = TX_CDC_DMA_TX_4;
1369 else {
1370 pr_err("%s: unsupported channel: %s\n",
1371 __func__, kcontrol->id.name);
1372 return -EINVAL;
1373 }
1374
1375 return idx;
1376}
1377
1378static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1379 struct snd_ctl_elem_value *ucontrol)
1380{
1381 int ch_num = cdc_dma_get_port_idx(kcontrol);
1382
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1383 if (ch_num < 0) {
1384 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1385 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1386 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1387
1388 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1389 cdc_dma_rx_cfg[ch_num].channels - 1);
1390 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1391 return 0;
1392}
1393
1394static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1395 struct snd_ctl_elem_value *ucontrol)
1396{
1397 int ch_num = cdc_dma_get_port_idx(kcontrol);
1398
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1399 if (ch_num < 0) {
1400 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1401 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1402 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1403
1404 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1405
1406 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1407 cdc_dma_rx_cfg[ch_num].channels);
1408 return 1;
1409}
1410
1411static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1412 struct snd_ctl_elem_value *ucontrol)
1413{
1414 int ch_num = cdc_dma_get_port_idx(kcontrol);
1415
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1416 if (ch_num < 0) {
1417 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1418 return ch_num;
1419 }
1420
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1421 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1422 case SNDRV_PCM_FORMAT_S32_LE:
1423 ucontrol->value.integer.value[0] = 3;
1424 break;
1425 case SNDRV_PCM_FORMAT_S24_3LE:
1426 ucontrol->value.integer.value[0] = 2;
1427 break;
1428 case SNDRV_PCM_FORMAT_S24_LE:
1429 ucontrol->value.integer.value[0] = 1;
1430 break;
1431 case SNDRV_PCM_FORMAT_S16_LE:
1432 default:
1433 ucontrol->value.integer.value[0] = 0;
1434 break;
1435 }
1436
1437 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1438 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1439 ucontrol->value.integer.value[0]);
1440 return 0;
1441}
1442
1443static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1444 struct snd_ctl_elem_value *ucontrol)
1445{
1446 int rc = 0;
1447 int ch_num = cdc_dma_get_port_idx(kcontrol);
1448
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1449 if (ch_num < 0) {
1450 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1451 return ch_num;
1452 }
1453
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1454 switch (ucontrol->value.integer.value[0]) {
1455 case 3:
1456 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1457 break;
1458 case 2:
1459 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1460 break;
1461 case 1:
1462 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1463 break;
1464 case 0:
1465 default:
1466 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1467 break;
1468 }
1469 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1470 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1471 ucontrol->value.integer.value[0]);
1472
1473 return rc;
1474}
1475
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1476
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1477static int cdc_dma_get_sample_rate_val(int sample_rate)
1478{
1479 int sample_rate_val = 0;
1480
1481 switch (sample_rate) {
1482 case SAMPLING_RATE_8KHZ:
1483 sample_rate_val = 0;
1484 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1485 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1486 sample_rate_val = 1;
1487 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1488 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1489 sample_rate_val = 2;
1490 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1491 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1492 sample_rate_val = 3;
1493 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1494 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1495 sample_rate_val = 4;
1496 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1497 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1498 sample_rate_val = 5;
1499 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1500 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1501 sample_rate_val = 6;
1502 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1503 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1504 sample_rate_val = 7;
1505 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1506 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1507 sample_rate_val = 8;
1508 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1509 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1510 sample_rate_val = 9;
1511 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1512 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1513 sample_rate_val = 10;
1514 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1515 case SAMPLING_RATE_352P8KHZ:
1516 sample_rate_val = 11;
1517 break;
1518 case SAMPLING_RATE_384KHZ:
1519 sample_rate_val = 12;
1520 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1521 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1522 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1523 break;
1524 }
1525 return sample_rate_val;
1526}
1527
1528static int cdc_dma_get_sample_rate(int value)
1529{
1530 int sample_rate = 0;
1531
1532 switch (value) {
1533 case 0:
1534 sample_rate = SAMPLING_RATE_8KHZ;
1535 break;
1536 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1537 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1538 break;
1539 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1540 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1541 break;
1542 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1543 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1544 break;
1545 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1546 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1547 break;
1548 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1549 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1550 break;
1551 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1552 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1553 break;
1554 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1555 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1556 break;
1557 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1558 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1559 break;
1560 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1561 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1562 break;
1563 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1564 sample_rate = SAMPLING_RATE_192KHZ;
1565 break;
1566 case 11:
1567 sample_rate = SAMPLING_RATE_352P8KHZ;
1568 break;
1569 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1570 sample_rate = SAMPLING_RATE_384KHZ;
1571 break;
1572 default:
1573 sample_rate = SAMPLING_RATE_48KHZ;
1574 break;
1575 }
1576 return sample_rate;
1577}
1578
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1579static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1580 struct snd_ctl_elem_value *ucontrol)
1581{
1582 int ch_num = cdc_dma_get_port_idx(kcontrol);
1583
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1584 if (ch_num < 0) {
1585 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1586 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1587 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1588
1589 ucontrol->value.enumerated.item[0] =
1590 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1591
1592 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1593 cdc_dma_rx_cfg[ch_num].sample_rate);
1594 return 0;
1595}
1596
1597static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1598 struct snd_ctl_elem_value *ucontrol)
1599{
1600 int ch_num = cdc_dma_get_port_idx(kcontrol);
1601
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1602 if (ch_num < 0) {
1603 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1604 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1605 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1606
1607 cdc_dma_rx_cfg[ch_num].sample_rate =
1608 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1609
1610
1611 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1612 __func__, ucontrol->value.enumerated.item[0],
1613 cdc_dma_rx_cfg[ch_num].sample_rate);
1614 return 0;
1615}
1616
1617static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1618 struct snd_ctl_elem_value *ucontrol)
1619{
1620 int ch_num = cdc_dma_get_port_idx(kcontrol);
1621
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1622 if (ch_num < 0) {
1623 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1624 return ch_num;
1625 }
1626
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1627 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1628 cdc_dma_tx_cfg[ch_num].channels);
1629 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1630 return 0;
1631}
1632
1633static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1634 struct snd_ctl_elem_value *ucontrol)
1635{
1636 int ch_num = cdc_dma_get_port_idx(kcontrol);
1637
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1638 if (ch_num < 0) {
1639 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1640 return ch_num;
1641 }
1642
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1643 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1644
1645 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1646 cdc_dma_tx_cfg[ch_num].channels);
1647 return 1;
1648}
1649
1650static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1651 struct snd_ctl_elem_value *ucontrol)
1652{
1653 int sample_rate_val;
1654 int ch_num = cdc_dma_get_port_idx(kcontrol);
1655
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1656 if (ch_num < 0) {
1657 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1658 return ch_num;
1659 }
1660
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1661 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1662 case SAMPLING_RATE_384KHZ:
1663 sample_rate_val = 12;
1664 break;
1665 case SAMPLING_RATE_352P8KHZ:
1666 sample_rate_val = 11;
1667 break;
1668 case SAMPLING_RATE_192KHZ:
1669 sample_rate_val = 10;
1670 break;
1671 case SAMPLING_RATE_176P4KHZ:
1672 sample_rate_val = 9;
1673 break;
1674 case SAMPLING_RATE_96KHZ:
1675 sample_rate_val = 8;
1676 break;
1677 case SAMPLING_RATE_88P2KHZ:
1678 sample_rate_val = 7;
1679 break;
1680 case SAMPLING_RATE_48KHZ:
1681 sample_rate_val = 6;
1682 break;
1683 case SAMPLING_RATE_44P1KHZ:
1684 sample_rate_val = 5;
1685 break;
1686 case SAMPLING_RATE_32KHZ:
1687 sample_rate_val = 4;
1688 break;
1689 case SAMPLING_RATE_22P05KHZ:
1690 sample_rate_val = 3;
1691 break;
1692 case SAMPLING_RATE_16KHZ:
1693 sample_rate_val = 2;
1694 break;
1695 case SAMPLING_RATE_11P025KHZ:
1696 sample_rate_val = 1;
1697 break;
1698 case SAMPLING_RATE_8KHZ:
1699 sample_rate_val = 0;
1700 break;
1701 default:
1702 sample_rate_val = 6;
1703 break;
1704 }
1705
1706 ucontrol->value.integer.value[0] = sample_rate_val;
1707 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1708 cdc_dma_tx_cfg[ch_num].sample_rate);
1709 return 0;
1710}
1711
1712static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1713 struct snd_ctl_elem_value *ucontrol)
1714{
1715 int ch_num = cdc_dma_get_port_idx(kcontrol);
1716
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1717 if (ch_num < 0) {
1718 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1719 return ch_num;
1720 }
1721
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1722 switch (ucontrol->value.integer.value[0]) {
1723 case 12:
1724 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1725 break;
1726 case 11:
1727 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1728 break;
1729 case 10:
1730 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1731 break;
1732 case 9:
1733 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1734 break;
1735 case 8:
1736 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1737 break;
1738 case 7:
1739 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1740 break;
1741 case 6:
1742 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1743 break;
1744 case 5:
1745 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1746 break;
1747 case 4:
1748 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1749 break;
1750 case 3:
1751 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1752 break;
1753 case 2:
1754 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1755 break;
1756 case 1:
1757 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1758 break;
1759 case 0:
1760 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1761 break;
1762 default:
1763 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1764 break;
1765 }
1766
1767 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1768 __func__, ucontrol->value.integer.value[0],
1769 cdc_dma_tx_cfg[ch_num].sample_rate);
1770 return 0;
1771}
1772
1773static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1774 struct snd_ctl_elem_value *ucontrol)
1775{
1776 int ch_num = cdc_dma_get_port_idx(kcontrol);
1777
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1778 if (ch_num < 0) {
1779 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1780 return ch_num;
1781 }
1782
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1783 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1784 case SNDRV_PCM_FORMAT_S32_LE:
1785 ucontrol->value.integer.value[0] = 3;
1786 break;
1787 case SNDRV_PCM_FORMAT_S24_3LE:
1788 ucontrol->value.integer.value[0] = 2;
1789 break;
1790 case SNDRV_PCM_FORMAT_S24_LE:
1791 ucontrol->value.integer.value[0] = 1;
1792 break;
1793 case SNDRV_PCM_FORMAT_S16_LE:
1794 default:
1795 ucontrol->value.integer.value[0] = 0;
1796 break;
1797 }
1798
1799 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1800 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1801 ucontrol->value.integer.value[0]);
1802 return 0;
1803}
1804
1805static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1806 struct snd_ctl_elem_value *ucontrol)
1807{
1808 int rc = 0;
1809 int ch_num = cdc_dma_get_port_idx(kcontrol);
1810
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1811 if (ch_num < 0) {
1812 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1813 return ch_num;
1814 }
1815
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1816 switch (ucontrol->value.integer.value[0]) {
1817 case 3:
1818 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1819 break;
1820 case 2:
1821 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1822 break;
1823 case 1:
1824 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1825 break;
1826 case 0:
1827 default:
1828 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1829 break;
1830 }
1831 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1832 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1833 ucontrol->value.integer.value[0]);
1834
1835 return rc;
1836}
1837
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1838static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1839 struct snd_ctl_elem_value *ucontrol)
1840{
1841 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1842 usb_rx_cfg.channels);
1843 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1844 return 0;
1845}
1846
1847static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1848 struct snd_ctl_elem_value *ucontrol)
1849{
1850 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1851
1852 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1853 return 1;
1854}
1855
1856static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1857 struct snd_ctl_elem_value *ucontrol)
1858{
1859 int sample_rate_val;
1860
1861 switch (usb_rx_cfg.sample_rate) {
1862 case SAMPLING_RATE_384KHZ:
1863 sample_rate_val = 12;
1864 break;
1865 case SAMPLING_RATE_352P8KHZ:
1866 sample_rate_val = 11;
1867 break;
1868 case SAMPLING_RATE_192KHZ:
1869 sample_rate_val = 10;
1870 break;
1871 case SAMPLING_RATE_176P4KHZ:
1872 sample_rate_val = 9;
1873 break;
1874 case SAMPLING_RATE_96KHZ:
1875 sample_rate_val = 8;
1876 break;
1877 case SAMPLING_RATE_88P2KHZ:
1878 sample_rate_val = 7;
1879 break;
1880 case SAMPLING_RATE_48KHZ:
1881 sample_rate_val = 6;
1882 break;
1883 case SAMPLING_RATE_44P1KHZ:
1884 sample_rate_val = 5;
1885 break;
1886 case SAMPLING_RATE_32KHZ:
1887 sample_rate_val = 4;
1888 break;
1889 case SAMPLING_RATE_22P05KHZ:
1890 sample_rate_val = 3;
1891 break;
1892 case SAMPLING_RATE_16KHZ:
1893 sample_rate_val = 2;
1894 break;
1895 case SAMPLING_RATE_11P025KHZ:
1896 sample_rate_val = 1;
1897 break;
1898 case SAMPLING_RATE_8KHZ:
1899 default:
1900 sample_rate_val = 0;
1901 break;
1902 }
1903
1904 ucontrol->value.integer.value[0] = sample_rate_val;
1905 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1906 usb_rx_cfg.sample_rate);
1907 return 0;
1908}
1909
1910static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1911 struct snd_ctl_elem_value *ucontrol)
1912{
1913 switch (ucontrol->value.integer.value[0]) {
1914 case 12:
1915 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1916 break;
1917 case 11:
1918 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1919 break;
1920 case 10:
1921 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1922 break;
1923 case 9:
1924 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1925 break;
1926 case 8:
1927 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1928 break;
1929 case 7:
1930 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1931 break;
1932 case 6:
1933 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1934 break;
1935 case 5:
1936 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1937 break;
1938 case 4:
1939 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1940 break;
1941 case 3:
1942 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1943 break;
1944 case 2:
1945 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1946 break;
1947 case 1:
1948 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1949 break;
1950 case 0:
1951 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1952 break;
1953 default:
1954 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1955 break;
1956 }
1957
1958 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1959 __func__, ucontrol->value.integer.value[0],
1960 usb_rx_cfg.sample_rate);
1961 return 0;
1962}
1963
1964static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1965 struct snd_ctl_elem_value *ucontrol)
1966{
1967 switch (usb_rx_cfg.bit_format) {
1968 case SNDRV_PCM_FORMAT_S32_LE:
1969 ucontrol->value.integer.value[0] = 3;
1970 break;
1971 case SNDRV_PCM_FORMAT_S24_3LE:
1972 ucontrol->value.integer.value[0] = 2;
1973 break;
1974 case SNDRV_PCM_FORMAT_S24_LE:
1975 ucontrol->value.integer.value[0] = 1;
1976 break;
1977 case SNDRV_PCM_FORMAT_S16_LE:
1978 default:
1979 ucontrol->value.integer.value[0] = 0;
1980 break;
1981 }
1982
1983 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1984 __func__, usb_rx_cfg.bit_format,
1985 ucontrol->value.integer.value[0]);
1986 return 0;
1987}
1988
1989static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1990 struct snd_ctl_elem_value *ucontrol)
1991{
1992 int rc = 0;
1993
1994 switch (ucontrol->value.integer.value[0]) {
1995 case 3:
1996 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1997 break;
1998 case 2:
1999 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2000 break;
2001 case 1:
2002 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2003 break;
2004 case 0:
2005 default:
2006 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2007 break;
2008 }
2009 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
2010 __func__, usb_rx_cfg.bit_format,
2011 ucontrol->value.integer.value[0]);
2012
2013 return rc;
2014}
2015
2016static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
2017 struct snd_ctl_elem_value *ucontrol)
2018{
2019 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
2020 usb_tx_cfg.channels);
2021 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
2022 return 0;
2023}
2024
2025static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
2026 struct snd_ctl_elem_value *ucontrol)
2027{
2028 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
2029
2030 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
2031 return 1;
2032}
2033
2034static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2035 struct snd_ctl_elem_value *ucontrol)
2036{
2037 int sample_rate_val;
2038
2039 switch (usb_tx_cfg.sample_rate) {
2040 case SAMPLING_RATE_384KHZ:
2041 sample_rate_val = 12;
2042 break;
2043 case SAMPLING_RATE_352P8KHZ:
2044 sample_rate_val = 11;
2045 break;
2046 case SAMPLING_RATE_192KHZ:
2047 sample_rate_val = 10;
2048 break;
2049 case SAMPLING_RATE_176P4KHZ:
2050 sample_rate_val = 9;
2051 break;
2052 case SAMPLING_RATE_96KHZ:
2053 sample_rate_val = 8;
2054 break;
2055 case SAMPLING_RATE_88P2KHZ:
2056 sample_rate_val = 7;
2057 break;
2058 case SAMPLING_RATE_48KHZ:
2059 sample_rate_val = 6;
2060 break;
2061 case SAMPLING_RATE_44P1KHZ:
2062 sample_rate_val = 5;
2063 break;
2064 case SAMPLING_RATE_32KHZ:
2065 sample_rate_val = 4;
2066 break;
2067 case SAMPLING_RATE_22P05KHZ:
2068 sample_rate_val = 3;
2069 break;
2070 case SAMPLING_RATE_16KHZ:
2071 sample_rate_val = 2;
2072 break;
2073 case SAMPLING_RATE_11P025KHZ:
2074 sample_rate_val = 1;
2075 break;
2076 case SAMPLING_RATE_8KHZ:
2077 sample_rate_val = 0;
2078 break;
2079 default:
2080 sample_rate_val = 6;
2081 break;
2082 }
2083
2084 ucontrol->value.integer.value[0] = sample_rate_val;
2085 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
2086 usb_tx_cfg.sample_rate);
2087 return 0;
2088}
2089
2090static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2091 struct snd_ctl_elem_value *ucontrol)
2092{
2093 switch (ucontrol->value.integer.value[0]) {
2094 case 12:
2095 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
2096 break;
2097 case 11:
2098 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
2099 break;
2100 case 10:
2101 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
2102 break;
2103 case 9:
2104 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
2105 break;
2106 case 8:
2107 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
2108 break;
2109 case 7:
2110 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
2111 break;
2112 case 6:
2113 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2114 break;
2115 case 5:
2116 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
2117 break;
2118 case 4:
2119 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
2120 break;
2121 case 3:
2122 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
2123 break;
2124 case 2:
2125 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
2126 break;
2127 case 1:
2128 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
2129 break;
2130 case 0:
2131 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
2132 break;
2133 default:
2134 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2135 break;
2136 }
2137
2138 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
2139 __func__, ucontrol->value.integer.value[0],
2140 usb_tx_cfg.sample_rate);
2141 return 0;
2142}
2143
2144static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
2145 struct snd_ctl_elem_value *ucontrol)
2146{
2147 switch (usb_tx_cfg.bit_format) {
2148 case SNDRV_PCM_FORMAT_S32_LE:
2149 ucontrol->value.integer.value[0] = 3;
2150 break;
2151 case SNDRV_PCM_FORMAT_S24_3LE:
2152 ucontrol->value.integer.value[0] = 2;
2153 break;
2154 case SNDRV_PCM_FORMAT_S24_LE:
2155 ucontrol->value.integer.value[0] = 1;
2156 break;
2157 case SNDRV_PCM_FORMAT_S16_LE:
2158 default:
2159 ucontrol->value.integer.value[0] = 0;
2160 break;
2161 }
2162
2163 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2164 __func__, usb_tx_cfg.bit_format,
2165 ucontrol->value.integer.value[0]);
2166 return 0;
2167}
2168
2169static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
2170 struct snd_ctl_elem_value *ucontrol)
2171{
2172 int rc = 0;
2173
2174 switch (ucontrol->value.integer.value[0]) {
2175 case 3:
2176 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2177 break;
2178 case 2:
2179 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2180 break;
2181 case 1:
2182 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2183 break;
2184 case 0:
2185 default:
2186 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2187 break;
2188 }
2189 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2190 __func__, usb_tx_cfg.bit_format,
2191 ucontrol->value.integer.value[0]);
2192
2193 return rc;
2194}
2195
2196static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2197{
2198 int idx;
2199
2200 if (strnstr(kcontrol->id.name, "Display Port RX",
2201 sizeof("Display Port RX"))) {
2202 idx = DP_RX_IDX;
2203 } else {
2204 pr_err("%s: unsupported BE: %s\n",
2205 __func__, kcontrol->id.name);
2206 idx = -EINVAL;
2207 }
2208
2209 return idx;
2210}
2211
2212static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2213 struct snd_ctl_elem_value *ucontrol)
2214{
2215 int idx = ext_disp_get_port_idx(kcontrol);
2216
2217 if (idx < 0)
2218 return idx;
2219
2220 switch (ext_disp_rx_cfg[idx].bit_format) {
2221 case SNDRV_PCM_FORMAT_S24_3LE:
2222 ucontrol->value.integer.value[0] = 2;
2223 break;
2224 case SNDRV_PCM_FORMAT_S24_LE:
2225 ucontrol->value.integer.value[0] = 1;
2226 break;
2227 case SNDRV_PCM_FORMAT_S16_LE:
2228 default:
2229 ucontrol->value.integer.value[0] = 0;
2230 break;
2231 }
2232
2233 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2234 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2235 ucontrol->value.integer.value[0]);
2236 return 0;
2237}
2238
2239static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2240 struct snd_ctl_elem_value *ucontrol)
2241{
2242 int idx = ext_disp_get_port_idx(kcontrol);
2243
2244 if (idx < 0)
2245 return idx;
2246
2247 switch (ucontrol->value.integer.value[0]) {
2248 case 2:
2249 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2250 break;
2251 case 1:
2252 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2253 break;
2254 case 0:
2255 default:
2256 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2257 break;
2258 }
2259 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2260 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2261 ucontrol->value.integer.value[0]);
2262
2263 return 0;
2264}
2265
2266static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2267 struct snd_ctl_elem_value *ucontrol)
2268{
2269 int idx = ext_disp_get_port_idx(kcontrol);
2270
2271 if (idx < 0)
2272 return idx;
2273
2274 ucontrol->value.integer.value[0] =
2275 ext_disp_rx_cfg[idx].channels - 2;
2276
2277 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2278 idx, ext_disp_rx_cfg[idx].channels);
2279
2280 return 0;
2281}
2282
2283static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2284 struct snd_ctl_elem_value *ucontrol)
2285{
2286 int idx = ext_disp_get_port_idx(kcontrol);
2287
2288 if (idx < 0)
2289 return idx;
2290
2291 ext_disp_rx_cfg[idx].channels =
2292 ucontrol->value.integer.value[0] + 2;
2293
2294 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2295 idx, ext_disp_rx_cfg[idx].channels);
2296 return 1;
2297}
2298
2299static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2300 struct snd_ctl_elem_value *ucontrol)
2301{
2302 int sample_rate_val;
2303 int idx = ext_disp_get_port_idx(kcontrol);
2304
2305 if (idx < 0)
2306 return idx;
2307
2308 switch (ext_disp_rx_cfg[idx].sample_rate) {
2309 case SAMPLING_RATE_176P4KHZ:
2310 sample_rate_val = 6;
2311 break;
2312
2313 case SAMPLING_RATE_88P2KHZ:
2314 sample_rate_val = 5;
2315 break;
2316
2317 case SAMPLING_RATE_44P1KHZ:
2318 sample_rate_val = 4;
2319 break;
2320
2321 case SAMPLING_RATE_32KHZ:
2322 sample_rate_val = 3;
2323 break;
2324
2325 case SAMPLING_RATE_192KHZ:
2326 sample_rate_val = 2;
2327 break;
2328
2329 case SAMPLING_RATE_96KHZ:
2330 sample_rate_val = 1;
2331 break;
2332
2333 case SAMPLING_RATE_48KHZ:
2334 default:
2335 sample_rate_val = 0;
2336 break;
2337 }
2338
2339 ucontrol->value.integer.value[0] = sample_rate_val;
2340 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2341 idx, ext_disp_rx_cfg[idx].sample_rate);
2342
2343 return 0;
2344}
2345
2346static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2347 struct snd_ctl_elem_value *ucontrol)
2348{
2349 int idx = ext_disp_get_port_idx(kcontrol);
2350
2351 if (idx < 0)
2352 return idx;
2353
2354 switch (ucontrol->value.integer.value[0]) {
2355 case 6:
2356 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2357 break;
2358 case 5:
2359 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2360 break;
2361 case 4:
2362 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2363 break;
2364 case 3:
2365 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2366 break;
2367 case 2:
2368 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2369 break;
2370 case 1:
2371 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2372 break;
2373 case 0:
2374 default:
2375 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2376 break;
2377 }
2378
2379 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2380 __func__, ucontrol->value.integer.value[0], idx,
2381 ext_disp_rx_cfg[idx].sample_rate);
2382 return 0;
2383}
2384
2385static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2386 struct snd_ctl_elem_value *ucontrol)
2387{
2388 pr_debug("%s: proxy_rx channels = %d\n",
2389 __func__, proxy_rx_cfg.channels);
2390 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2391
2392 return 0;
2393}
2394
2395static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2396 struct snd_ctl_elem_value *ucontrol)
2397{
2398 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2399 pr_debug("%s: proxy_rx channels = %d\n",
2400 __func__, proxy_rx_cfg.channels);
2401
2402 return 1;
2403}
2404
2405static int tdm_get_sample_rate(int value)
2406{
2407 int sample_rate = 0;
2408
2409 switch (value) {
2410 case 0:
2411 sample_rate = SAMPLING_RATE_8KHZ;
2412 break;
2413 case 1:
2414 sample_rate = SAMPLING_RATE_16KHZ;
2415 break;
2416 case 2:
2417 sample_rate = SAMPLING_RATE_32KHZ;
2418 break;
2419 case 3:
2420 sample_rate = SAMPLING_RATE_48KHZ;
2421 break;
2422 case 4:
2423 sample_rate = SAMPLING_RATE_176P4KHZ;
2424 break;
2425 case 5:
2426 sample_rate = SAMPLING_RATE_352P8KHZ;
2427 break;
2428 default:
2429 sample_rate = SAMPLING_RATE_48KHZ;
2430 break;
2431 }
2432 return sample_rate;
2433}
2434
2435static int aux_pcm_get_sample_rate(int value)
2436{
2437 int sample_rate;
2438
2439 switch (value) {
2440 case 1:
2441 sample_rate = SAMPLING_RATE_16KHZ;
2442 break;
2443 case 0:
2444 default:
2445 sample_rate = SAMPLING_RATE_8KHZ;
2446 break;
2447 }
2448 return sample_rate;
2449}
2450
2451static int tdm_get_sample_rate_val(int sample_rate)
2452{
2453 int sample_rate_val = 0;
2454
2455 switch (sample_rate) {
2456 case SAMPLING_RATE_8KHZ:
2457 sample_rate_val = 0;
2458 break;
2459 case SAMPLING_RATE_16KHZ:
2460 sample_rate_val = 1;
2461 break;
2462 case SAMPLING_RATE_32KHZ:
2463 sample_rate_val = 2;
2464 break;
2465 case SAMPLING_RATE_48KHZ:
2466 sample_rate_val = 3;
2467 break;
2468 case SAMPLING_RATE_176P4KHZ:
2469 sample_rate_val = 4;
2470 break;
2471 case SAMPLING_RATE_352P8KHZ:
2472 sample_rate_val = 5;
2473 break;
2474 default:
2475 sample_rate_val = 3;
2476 break;
2477 }
2478 return sample_rate_val;
2479}
2480
2481static int aux_pcm_get_sample_rate_val(int sample_rate)
2482{
2483 int sample_rate_val;
2484
2485 switch (sample_rate) {
2486 case SAMPLING_RATE_16KHZ:
2487 sample_rate_val = 1;
2488 break;
2489 case SAMPLING_RATE_8KHZ:
2490 default:
2491 sample_rate_val = 0;
2492 break;
2493 }
2494 return sample_rate_val;
2495}
2496
2497static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2498 struct tdm_port *port)
2499{
2500 if (port) {
2501 if (strnstr(kcontrol->id.name, "PRI",
2502 sizeof(kcontrol->id.name))) {
2503 port->mode = TDM_PRI;
2504 } else if (strnstr(kcontrol->id.name, "SEC",
2505 sizeof(kcontrol->id.name))) {
2506 port->mode = TDM_SEC;
2507 } else if (strnstr(kcontrol->id.name, "TERT",
2508 sizeof(kcontrol->id.name))) {
2509 port->mode = TDM_TERT;
2510 } else if (strnstr(kcontrol->id.name, "QUAT",
2511 sizeof(kcontrol->id.name))) {
2512 port->mode = TDM_QUAT;
2513 } else if (strnstr(kcontrol->id.name, "QUIN",
2514 sizeof(kcontrol->id.name))) {
2515 port->mode = TDM_QUIN;
2516 } else {
2517 pr_err("%s: unsupported mode in: %s\n",
2518 __func__, kcontrol->id.name);
2519 return -EINVAL;
2520 }
2521
2522 if (strnstr(kcontrol->id.name, "RX_0",
2523 sizeof(kcontrol->id.name)) ||
2524 strnstr(kcontrol->id.name, "TX_0",
2525 sizeof(kcontrol->id.name))) {
2526 port->channel = TDM_0;
2527 } else if (strnstr(kcontrol->id.name, "RX_1",
2528 sizeof(kcontrol->id.name)) ||
2529 strnstr(kcontrol->id.name, "TX_1",
2530 sizeof(kcontrol->id.name))) {
2531 port->channel = TDM_1;
2532 } else if (strnstr(kcontrol->id.name, "RX_2",
2533 sizeof(kcontrol->id.name)) ||
2534 strnstr(kcontrol->id.name, "TX_2",
2535 sizeof(kcontrol->id.name))) {
2536 port->channel = TDM_2;
2537 } else if (strnstr(kcontrol->id.name, "RX_3",
2538 sizeof(kcontrol->id.name)) ||
2539 strnstr(kcontrol->id.name, "TX_3",
2540 sizeof(kcontrol->id.name))) {
2541 port->channel = TDM_3;
2542 } else if (strnstr(kcontrol->id.name, "RX_4",
2543 sizeof(kcontrol->id.name)) ||
2544 strnstr(kcontrol->id.name, "TX_4",
2545 sizeof(kcontrol->id.name))) {
2546 port->channel = TDM_4;
2547 } else if (strnstr(kcontrol->id.name, "RX_5",
2548 sizeof(kcontrol->id.name)) ||
2549 strnstr(kcontrol->id.name, "TX_5",
2550 sizeof(kcontrol->id.name))) {
2551 port->channel = TDM_5;
2552 } else if (strnstr(kcontrol->id.name, "RX_6",
2553 sizeof(kcontrol->id.name)) ||
2554 strnstr(kcontrol->id.name, "TX_6",
2555 sizeof(kcontrol->id.name))) {
2556 port->channel = TDM_6;
2557 } else if (strnstr(kcontrol->id.name, "RX_7",
2558 sizeof(kcontrol->id.name)) ||
2559 strnstr(kcontrol->id.name, "TX_7",
2560 sizeof(kcontrol->id.name))) {
2561 port->channel = TDM_7;
2562 } else {
2563 pr_err("%s: unsupported channel in: %s\n",
2564 __func__, kcontrol->id.name);
2565 return -EINVAL;
2566 }
2567 } else {
2568 return -EINVAL;
2569 }
2570 return 0;
2571}
2572
2573static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2574 struct snd_ctl_elem_value *ucontrol)
2575{
2576 struct tdm_port port;
2577 int ret = tdm_get_port_idx(kcontrol, &port);
2578
2579 if (ret) {
2580 pr_err("%s: unsupported control: %s\n",
2581 __func__, kcontrol->id.name);
2582 } else {
2583 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2584 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2585
2586 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2587 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2588 ucontrol->value.enumerated.item[0]);
2589 }
2590 return ret;
2591}
2592
2593static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2594 struct snd_ctl_elem_value *ucontrol)
2595{
2596 struct tdm_port port;
2597 int ret = tdm_get_port_idx(kcontrol, &port);
2598
2599 if (ret) {
2600 pr_err("%s: unsupported control: %s\n",
2601 __func__, kcontrol->id.name);
2602 } else {
2603 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2604 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2605
2606 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2607 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2608 ucontrol->value.enumerated.item[0]);
2609 }
2610 return ret;
2611}
2612
2613static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2614 struct snd_ctl_elem_value *ucontrol)
2615{
2616 struct tdm_port port;
2617 int ret = tdm_get_port_idx(kcontrol, &port);
2618
2619 if (ret) {
2620 pr_err("%s: unsupported control: %s\n",
2621 __func__, kcontrol->id.name);
2622 } else {
2623 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2624 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2625
2626 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2627 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2628 ucontrol->value.enumerated.item[0]);
2629 }
2630 return ret;
2631}
2632
2633static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2634 struct snd_ctl_elem_value *ucontrol)
2635{
2636 struct tdm_port port;
2637 int ret = tdm_get_port_idx(kcontrol, &port);
2638
2639 if (ret) {
2640 pr_err("%s: unsupported control: %s\n",
2641 __func__, kcontrol->id.name);
2642 } else {
2643 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2644 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2645
2646 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2647 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2648 ucontrol->value.enumerated.item[0]);
2649 }
2650 return ret;
2651}
2652
2653static int tdm_get_format(int value)
2654{
2655 int format = 0;
2656
2657 switch (value) {
2658 case 0:
2659 format = SNDRV_PCM_FORMAT_S16_LE;
2660 break;
2661 case 1:
2662 format = SNDRV_PCM_FORMAT_S24_LE;
2663 break;
2664 case 2:
2665 format = SNDRV_PCM_FORMAT_S32_LE;
2666 break;
2667 default:
2668 format = SNDRV_PCM_FORMAT_S16_LE;
2669 break;
2670 }
2671 return format;
2672}
2673
2674static int tdm_get_format_val(int format)
2675{
2676 int value = 0;
2677
2678 switch (format) {
2679 case SNDRV_PCM_FORMAT_S16_LE:
2680 value = 0;
2681 break;
2682 case SNDRV_PCM_FORMAT_S24_LE:
2683 value = 1;
2684 break;
2685 case SNDRV_PCM_FORMAT_S32_LE:
2686 value = 2;
2687 break;
2688 default:
2689 value = 0;
2690 break;
2691 }
2692 return value;
2693}
2694
2695static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2696 struct snd_ctl_elem_value *ucontrol)
2697{
2698 struct tdm_port port;
2699 int ret = tdm_get_port_idx(kcontrol, &port);
2700
2701 if (ret) {
2702 pr_err("%s: unsupported control: %s\n",
2703 __func__, kcontrol->id.name);
2704 } else {
2705 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2706 tdm_rx_cfg[port.mode][port.channel].bit_format);
2707
2708 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2709 tdm_rx_cfg[port.mode][port.channel].bit_format,
2710 ucontrol->value.enumerated.item[0]);
2711 }
2712 return ret;
2713}
2714
2715static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2716 struct snd_ctl_elem_value *ucontrol)
2717{
2718 struct tdm_port port;
2719 int ret = tdm_get_port_idx(kcontrol, &port);
2720
2721 if (ret) {
2722 pr_err("%s: unsupported control: %s\n",
2723 __func__, kcontrol->id.name);
2724 } else {
2725 tdm_rx_cfg[port.mode][port.channel].bit_format =
2726 tdm_get_format(ucontrol->value.enumerated.item[0]);
2727
2728 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2729 tdm_rx_cfg[port.mode][port.channel].bit_format,
2730 ucontrol->value.enumerated.item[0]);
2731 }
2732 return ret;
2733}
2734
2735static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2736 struct snd_ctl_elem_value *ucontrol)
2737{
2738 struct tdm_port port;
2739 int ret = tdm_get_port_idx(kcontrol, &port);
2740
2741 if (ret) {
2742 pr_err("%s: unsupported control: %s\n",
2743 __func__, kcontrol->id.name);
2744 } else {
2745 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2746 tdm_tx_cfg[port.mode][port.channel].bit_format);
2747
2748 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2749 tdm_tx_cfg[port.mode][port.channel].bit_format,
2750 ucontrol->value.enumerated.item[0]);
2751 }
2752 return ret;
2753}
2754
2755static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2756 struct snd_ctl_elem_value *ucontrol)
2757{
2758 struct tdm_port port;
2759 int ret = tdm_get_port_idx(kcontrol, &port);
2760
2761 if (ret) {
2762 pr_err("%s: unsupported control: %s\n",
2763 __func__, kcontrol->id.name);
2764 } else {
2765 tdm_tx_cfg[port.mode][port.channel].bit_format =
2766 tdm_get_format(ucontrol->value.enumerated.item[0]);
2767
2768 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2769 tdm_tx_cfg[port.mode][port.channel].bit_format,
2770 ucontrol->value.enumerated.item[0]);
2771 }
2772 return ret;
2773}
2774
2775static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2776 struct snd_ctl_elem_value *ucontrol)
2777{
2778 struct tdm_port port;
2779 int ret = tdm_get_port_idx(kcontrol, &port);
2780
2781 if (ret) {
2782 pr_err("%s: unsupported control: %s\n",
2783 __func__, kcontrol->id.name);
2784 } else {
2785
2786 ucontrol->value.enumerated.item[0] =
2787 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2788
2789 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2790 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2791 ucontrol->value.enumerated.item[0]);
2792 }
2793 return ret;
2794}
2795
2796static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2797 struct snd_ctl_elem_value *ucontrol)
2798{
2799 struct tdm_port port;
2800 int ret = tdm_get_port_idx(kcontrol, &port);
2801
2802 if (ret) {
2803 pr_err("%s: unsupported control: %s\n",
2804 __func__, kcontrol->id.name);
2805 } else {
2806 tdm_rx_cfg[port.mode][port.channel].channels =
2807 ucontrol->value.enumerated.item[0] + 1;
2808
2809 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2810 tdm_rx_cfg[port.mode][port.channel].channels,
2811 ucontrol->value.enumerated.item[0] + 1);
2812 }
2813 return ret;
2814}
2815
2816static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2817 struct snd_ctl_elem_value *ucontrol)
2818{
2819 struct tdm_port port;
2820 int ret = tdm_get_port_idx(kcontrol, &port);
2821
2822 if (ret) {
2823 pr_err("%s: unsupported control: %s\n",
2824 __func__, kcontrol->id.name);
2825 } else {
2826 ucontrol->value.enumerated.item[0] =
2827 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2828
2829 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2830 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2831 ucontrol->value.enumerated.item[0]);
2832 }
2833 return ret;
2834}
2835
2836static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2837 struct snd_ctl_elem_value *ucontrol)
2838{
2839 struct tdm_port port;
2840 int ret = tdm_get_port_idx(kcontrol, &port);
2841
2842 if (ret) {
2843 pr_err("%s: unsupported control: %s\n",
2844 __func__, kcontrol->id.name);
2845 } else {
2846 tdm_tx_cfg[port.mode][port.channel].channels =
2847 ucontrol->value.enumerated.item[0] + 1;
2848
2849 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2850 tdm_tx_cfg[port.mode][port.channel].channels,
2851 ucontrol->value.enumerated.item[0] + 1);
2852 }
2853 return ret;
2854}
2855
2856static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2857{
2858 int idx;
2859
2860 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2861 sizeof("PRIM_AUX_PCM"))) {
2862 idx = PRIM_AUX_PCM;
2863 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2864 sizeof("SEC_AUX_PCM"))) {
2865 idx = SEC_AUX_PCM;
2866 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2867 sizeof("TERT_AUX_PCM"))) {
2868 idx = TERT_AUX_PCM;
2869 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2870 sizeof("QUAT_AUX_PCM"))) {
2871 idx = QUAT_AUX_PCM;
2872 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2873 sizeof("QUIN_AUX_PCM"))) {
2874 idx = QUIN_AUX_PCM;
2875 } else {
2876 pr_err("%s: unsupported port: %s\n",
2877 __func__, kcontrol->id.name);
2878 idx = -EINVAL;
2879 }
2880
2881 return idx;
2882}
2883
2884static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2885 struct snd_ctl_elem_value *ucontrol)
2886{
2887 int idx = aux_pcm_get_port_idx(kcontrol);
2888
2889 if (idx < 0)
2890 return idx;
2891
2892 aux_pcm_rx_cfg[idx].sample_rate =
2893 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2894
2895 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2896 idx, aux_pcm_rx_cfg[idx].sample_rate,
2897 ucontrol->value.enumerated.item[0]);
2898
2899 return 0;
2900}
2901
2902static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2903 struct snd_ctl_elem_value *ucontrol)
2904{
2905 int idx = aux_pcm_get_port_idx(kcontrol);
2906
2907 if (idx < 0)
2908 return idx;
2909
2910 ucontrol->value.enumerated.item[0] =
2911 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2912
2913 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2914 idx, aux_pcm_rx_cfg[idx].sample_rate,
2915 ucontrol->value.enumerated.item[0]);
2916
2917 return 0;
2918}
2919
2920static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2921 struct snd_ctl_elem_value *ucontrol)
2922{
2923 int idx = aux_pcm_get_port_idx(kcontrol);
2924
2925 if (idx < 0)
2926 return idx;
2927
2928 aux_pcm_tx_cfg[idx].sample_rate =
2929 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2930
2931 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2932 idx, aux_pcm_tx_cfg[idx].sample_rate,
2933 ucontrol->value.enumerated.item[0]);
2934
2935 return 0;
2936}
2937
2938static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2939 struct snd_ctl_elem_value *ucontrol)
2940{
2941 int idx = aux_pcm_get_port_idx(kcontrol);
2942
2943 if (idx < 0)
2944 return idx;
2945
2946 ucontrol->value.enumerated.item[0] =
2947 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2948
2949 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2950 idx, aux_pcm_tx_cfg[idx].sample_rate,
2951 ucontrol->value.enumerated.item[0]);
2952
2953 return 0;
2954}
2955
2956static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2957{
2958 int idx;
2959
2960 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2961 sizeof("PRIM_MI2S_RX"))) {
2962 idx = PRIM_MI2S;
2963 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2964 sizeof("SEC_MI2S_RX"))) {
2965 idx = SEC_MI2S;
2966 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2967 sizeof("TERT_MI2S_RX"))) {
2968 idx = TERT_MI2S;
2969 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2970 sizeof("QUAT_MI2S_RX"))) {
2971 idx = QUAT_MI2S;
2972 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2973 sizeof("QUIN_MI2S_RX"))) {
2974 idx = QUIN_MI2S;
2975 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2976 sizeof("PRIM_MI2S_TX"))) {
2977 idx = PRIM_MI2S;
2978 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2979 sizeof("SEC_MI2S_TX"))) {
2980 idx = SEC_MI2S;
2981 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2982 sizeof("TERT_MI2S_TX"))) {
2983 idx = TERT_MI2S;
2984 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2985 sizeof("QUAT_MI2S_TX"))) {
2986 idx = QUAT_MI2S;
2987 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2988 sizeof("QUIN_MI2S_TX"))) {
2989 idx = QUIN_MI2S;
2990 } else {
2991 pr_err("%s: unsupported channel: %s\n",
2992 __func__, kcontrol->id.name);
2993 idx = -EINVAL;
2994 }
2995
2996 return idx;
2997}
2998
2999static int mi2s_get_sample_rate_val(int sample_rate)
3000{
3001 int sample_rate_val;
3002
3003 switch (sample_rate) {
3004 case SAMPLING_RATE_8KHZ:
3005 sample_rate_val = 0;
3006 break;
3007 case SAMPLING_RATE_11P025KHZ:
3008 sample_rate_val = 1;
3009 break;
3010 case SAMPLING_RATE_16KHZ:
3011 sample_rate_val = 2;
3012 break;
3013 case SAMPLING_RATE_22P05KHZ:
3014 sample_rate_val = 3;
3015 break;
3016 case SAMPLING_RATE_32KHZ:
3017 sample_rate_val = 4;
3018 break;
3019 case SAMPLING_RATE_44P1KHZ:
3020 sample_rate_val = 5;
3021 break;
3022 case SAMPLING_RATE_48KHZ:
3023 sample_rate_val = 6;
3024 break;
3025 case SAMPLING_RATE_96KHZ:
3026 sample_rate_val = 7;
3027 break;
3028 case SAMPLING_RATE_192KHZ:
3029 sample_rate_val = 8;
3030 break;
3031 default:
3032 sample_rate_val = 6;
3033 break;
3034 }
3035 return sample_rate_val;
3036}
3037
3038static int mi2s_get_sample_rate(int value)
3039{
3040 int sample_rate;
3041
3042 switch (value) {
3043 case 0:
3044 sample_rate = SAMPLING_RATE_8KHZ;
3045 break;
3046 case 1:
3047 sample_rate = SAMPLING_RATE_11P025KHZ;
3048 break;
3049 case 2:
3050 sample_rate = SAMPLING_RATE_16KHZ;
3051 break;
3052 case 3:
3053 sample_rate = SAMPLING_RATE_22P05KHZ;
3054 break;
3055 case 4:
3056 sample_rate = SAMPLING_RATE_32KHZ;
3057 break;
3058 case 5:
3059 sample_rate = SAMPLING_RATE_44P1KHZ;
3060 break;
3061 case 6:
3062 sample_rate = SAMPLING_RATE_48KHZ;
3063 break;
3064 case 7:
3065 sample_rate = SAMPLING_RATE_96KHZ;
3066 break;
3067 case 8:
3068 sample_rate = SAMPLING_RATE_192KHZ;
3069 break;
3070 default:
3071 sample_rate = SAMPLING_RATE_48KHZ;
3072 break;
3073 }
3074 return sample_rate;
3075}
3076
3077static int mi2s_auxpcm_get_format(int value)
3078{
3079 int format;
3080
3081 switch (value) {
3082 case 0:
3083 format = SNDRV_PCM_FORMAT_S16_LE;
3084 break;
3085 case 1:
3086 format = SNDRV_PCM_FORMAT_S24_LE;
3087 break;
3088 case 2:
3089 format = SNDRV_PCM_FORMAT_S24_3LE;
3090 break;
3091 case 3:
3092 format = SNDRV_PCM_FORMAT_S32_LE;
3093 break;
3094 default:
3095 format = SNDRV_PCM_FORMAT_S16_LE;
3096 break;
3097 }
3098 return format;
3099}
3100
3101static int mi2s_auxpcm_get_format_value(int format)
3102{
3103 int value;
3104
3105 switch (format) {
3106 case SNDRV_PCM_FORMAT_S16_LE:
3107 value = 0;
3108 break;
3109 case SNDRV_PCM_FORMAT_S24_LE:
3110 value = 1;
3111 break;
3112 case SNDRV_PCM_FORMAT_S24_3LE:
3113 value = 2;
3114 break;
3115 case SNDRV_PCM_FORMAT_S32_LE:
3116 value = 3;
3117 break;
3118 default:
3119 value = 0;
3120 break;
3121 }
3122 return value;
3123}
3124
3125static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3126 struct snd_ctl_elem_value *ucontrol)
3127{
3128 int idx = mi2s_get_port_idx(kcontrol);
3129
3130 if (idx < 0)
3131 return idx;
3132
3133 mi2s_rx_cfg[idx].sample_rate =
3134 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3135
3136 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3137 idx, mi2s_rx_cfg[idx].sample_rate,
3138 ucontrol->value.enumerated.item[0]);
3139
3140 return 0;
3141}
3142
3143static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3144 struct snd_ctl_elem_value *ucontrol)
3145{
3146 int idx = mi2s_get_port_idx(kcontrol);
3147
3148 if (idx < 0)
3149 return idx;
3150
3151 ucontrol->value.enumerated.item[0] =
3152 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
3153
3154 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3155 idx, mi2s_rx_cfg[idx].sample_rate,
3156 ucontrol->value.enumerated.item[0]);
3157
3158 return 0;
3159}
3160
3161static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3162 struct snd_ctl_elem_value *ucontrol)
3163{
3164 int idx = mi2s_get_port_idx(kcontrol);
3165
3166 if (idx < 0)
3167 return idx;
3168
3169 mi2s_tx_cfg[idx].sample_rate =
3170 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3171
3172 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3173 idx, mi2s_tx_cfg[idx].sample_rate,
3174 ucontrol->value.enumerated.item[0]);
3175
3176 return 0;
3177}
3178
3179static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3180 struct snd_ctl_elem_value *ucontrol)
3181{
3182 int idx = mi2s_get_port_idx(kcontrol);
3183
3184 if (idx < 0)
3185 return idx;
3186
3187 ucontrol->value.enumerated.item[0] =
3188 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3189
3190 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3191 idx, mi2s_tx_cfg[idx].sample_rate,
3192 ucontrol->value.enumerated.item[0]);
3193
3194 return 0;
3195}
3196
3197static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3198 struct snd_ctl_elem_value *ucontrol)
3199{
3200 int idx = mi2s_get_port_idx(kcontrol);
3201
3202 if (idx < 0)
3203 return idx;
3204
3205 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3206 idx, mi2s_rx_cfg[idx].channels);
3207 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3208
3209 return 0;
3210}
3211
3212static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3213 struct snd_ctl_elem_value *ucontrol)
3214{
3215 int idx = mi2s_get_port_idx(kcontrol);
3216
3217 if (idx < 0)
3218 return idx;
3219
3220 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3221 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3222 idx, mi2s_rx_cfg[idx].channels);
3223
3224 return 1;
3225}
3226
3227static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3228 struct snd_ctl_elem_value *ucontrol)
3229{
3230 int idx = mi2s_get_port_idx(kcontrol);
3231
3232 if (idx < 0)
3233 return idx;
3234
3235 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3236 idx, mi2s_tx_cfg[idx].channels);
3237 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3238
3239 return 0;
3240}
3241
3242static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3243 struct snd_ctl_elem_value *ucontrol)
3244{
3245 int idx = mi2s_get_port_idx(kcontrol);
3246
3247 if (idx < 0)
3248 return idx;
3249
3250 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3251 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3252 idx, mi2s_tx_cfg[idx].channels);
3253
3254 return 1;
3255}
3256
3257static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3258 struct snd_ctl_elem_value *ucontrol)
3259{
3260 int idx = mi2s_get_port_idx(kcontrol);
3261
3262 if (idx < 0)
3263 return idx;
3264
3265 ucontrol->value.enumerated.item[0] =
3266 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3267
3268 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3269 idx, mi2s_rx_cfg[idx].bit_format,
3270 ucontrol->value.enumerated.item[0]);
3271
3272 return 0;
3273}
3274
3275static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3276 struct snd_ctl_elem_value *ucontrol)
3277{
3278 int idx = mi2s_get_port_idx(kcontrol);
3279
3280 if (idx < 0)
3281 return idx;
3282
3283 mi2s_rx_cfg[idx].bit_format =
3284 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3285
3286 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3287 idx, mi2s_rx_cfg[idx].bit_format,
3288 ucontrol->value.enumerated.item[0]);
3289
3290 return 0;
3291}
3292
3293static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3294 struct snd_ctl_elem_value *ucontrol)
3295{
3296 int idx = mi2s_get_port_idx(kcontrol);
3297
3298 if (idx < 0)
3299 return idx;
3300
3301 ucontrol->value.enumerated.item[0] =
3302 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3303
3304 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3305 idx, mi2s_tx_cfg[idx].bit_format,
3306 ucontrol->value.enumerated.item[0]);
3307
3308 return 0;
3309}
3310
3311static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3312 struct snd_ctl_elem_value *ucontrol)
3313{
3314 int idx = mi2s_get_port_idx(kcontrol);
3315
3316 if (idx < 0)
3317 return idx;
3318
3319 mi2s_tx_cfg[idx].bit_format =
3320 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3321
3322 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3323 idx, mi2s_tx_cfg[idx].bit_format,
3324 ucontrol->value.enumerated.item[0]);
3325
3326 return 0;
3327}
3328
3329static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3330 struct snd_ctl_elem_value *ucontrol)
3331{
3332 int idx = aux_pcm_get_port_idx(kcontrol);
3333
3334 if (idx < 0)
3335 return idx;
3336
3337 ucontrol->value.enumerated.item[0] =
3338 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3339
3340 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3341 idx, aux_pcm_rx_cfg[idx].bit_format,
3342 ucontrol->value.enumerated.item[0]);
3343
3344 return 0;
3345}
3346
3347static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3348 struct snd_ctl_elem_value *ucontrol)
3349{
3350 int idx = aux_pcm_get_port_idx(kcontrol);
3351
3352 if (idx < 0)
3353 return idx;
3354
3355 aux_pcm_rx_cfg[idx].bit_format =
3356 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3357
3358 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3359 idx, aux_pcm_rx_cfg[idx].bit_format,
3360 ucontrol->value.enumerated.item[0]);
3361
3362 return 0;
3363}
3364
3365static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3366 struct snd_ctl_elem_value *ucontrol)
3367{
3368 int idx = aux_pcm_get_port_idx(kcontrol);
3369
3370 if (idx < 0)
3371 return idx;
3372
3373 ucontrol->value.enumerated.item[0] =
3374 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3375
3376 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3377 idx, aux_pcm_tx_cfg[idx].bit_format,
3378 ucontrol->value.enumerated.item[0]);
3379
3380 return 0;
3381}
3382
3383static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3384 struct snd_ctl_elem_value *ucontrol)
3385{
3386 int idx = aux_pcm_get_port_idx(kcontrol);
3387
3388 if (idx < 0)
3389 return idx;
3390
3391 aux_pcm_tx_cfg[idx].bit_format =
3392 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3393
3394 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3395 idx, aux_pcm_tx_cfg[idx].bit_format,
3396 ucontrol->value.enumerated.item[0]);
3397
3398 return 0;
3399}
3400
3401static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3402{
3403 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3404 struct snd_soc_card *card = codec->component.card;
3405 struct msm_asoc_mach_data *pdata =
3406 snd_soc_card_get_drvdata(card);
3407
3408 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3409 msm_hifi_control);
3410
3411 if (!pdata || !pdata->hph_en1_gpio_p) {
3412 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3413 return -EINVAL;
3414 }
3415 if (msm_hifi_control == MSM_HIFI_ON) {
3416 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3417 /* 5msec delay needed as per HW requirement */
3418 usleep_range(5000, 5010);
3419 } else {
3420 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3421 }
3422 snd_soc_dapm_sync(dapm);
3423
3424 return 0;
3425}
3426
3427static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3428 struct snd_ctl_elem_value *ucontrol)
3429{
3430 pr_debug("%s: msm_hifi_control = %d\n",
3431 __func__, msm_hifi_control);
3432 ucontrol->value.integer.value[0] = msm_hifi_control;
3433
3434 return 0;
3435}
3436
3437static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3438 struct snd_ctl_elem_value *ucontrol)
3439{
3440 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3441
3442 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3443 __func__, ucontrol->value.integer.value[0]);
3444
3445 msm_hifi_control = ucontrol->value.integer.value[0];
3446 msm_hifi_ctrl(codec);
3447
3448 return 0;
3449}
3450
3451static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3452 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3453 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3454 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3455 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3456 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3457 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3458 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3459 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3460 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3461 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3462 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3463 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3464 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3465 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3466 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3467 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3468 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3469 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3470 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3471 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3472 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3473 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3474 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3475 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3476 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3477 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3478 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3479 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3480 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3481 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3482 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3483 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3484 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3485 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3486 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3487 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3488 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3489 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3490 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3491 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3492 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3493 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3494 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3495 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3496 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3497 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3498 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3499 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3500 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3501 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3502 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3503 wsa_cdc_dma_rx_0_sample_rate,
3504 cdc_dma_rx_sample_rate_get,
3505 cdc_dma_rx_sample_rate_put),
3506 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3507 wsa_cdc_dma_rx_1_sample_rate,
3508 cdc_dma_rx_sample_rate_get,
3509 cdc_dma_rx_sample_rate_put),
3510 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3511 rx_cdc_dma_rx_0_sample_rate,
3512 cdc_dma_rx_sample_rate_get,
3513 cdc_dma_rx_sample_rate_put),
3514 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3515 rx_cdc_dma_rx_1_sample_rate,
3516 cdc_dma_rx_sample_rate_get,
3517 cdc_dma_rx_sample_rate_put),
3518 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3519 rx_cdc_dma_rx_2_sample_rate,
3520 cdc_dma_rx_sample_rate_get,
3521 cdc_dma_rx_sample_rate_put),
3522 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3523 rx_cdc_dma_rx_3_sample_rate,
3524 cdc_dma_rx_sample_rate_get,
3525 cdc_dma_rx_sample_rate_put),
3526 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3527 rx_cdc_dma_rx_5_sample_rate,
3528 cdc_dma_rx_sample_rate_get,
3529 cdc_dma_rx_sample_rate_put),
3530 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3531 wsa_cdc_dma_tx_0_sample_rate,
3532 cdc_dma_tx_sample_rate_get,
3533 cdc_dma_tx_sample_rate_put),
3534 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3535 wsa_cdc_dma_tx_1_sample_rate,
3536 cdc_dma_tx_sample_rate_get,
3537 cdc_dma_tx_sample_rate_put),
3538 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3539 wsa_cdc_dma_tx_2_sample_rate,
3540 cdc_dma_tx_sample_rate_get,
3541 cdc_dma_tx_sample_rate_put),
3542 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3543 tx_cdc_dma_tx_0_sample_rate,
3544 cdc_dma_tx_sample_rate_get,
3545 cdc_dma_tx_sample_rate_put),
3546 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3547 tx_cdc_dma_tx_3_sample_rate,
3548 cdc_dma_tx_sample_rate_get,
3549 cdc_dma_tx_sample_rate_put),
3550 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3551 tx_cdc_dma_tx_4_sample_rate,
3552 cdc_dma_tx_sample_rate_get,
3553 cdc_dma_tx_sample_rate_put),
3554};
3555
3556static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3557 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3558 slim_rx_ch_get, slim_rx_ch_put),
3559 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3560 slim_rx_ch_get, slim_rx_ch_put),
3561 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3562 slim_tx_ch_get, slim_tx_ch_put),
3563 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3564 slim_tx_ch_get, slim_tx_ch_put),
3565 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3566 slim_rx_ch_get, slim_rx_ch_put),
3567 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3568 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3569 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3570 slim_rx_bit_format_get, slim_rx_bit_format_put),
3571 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3572 slim_rx_bit_format_get, slim_rx_bit_format_put),
3573 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3574 slim_rx_bit_format_get, slim_rx_bit_format_put),
3575 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3576 slim_tx_bit_format_get, slim_tx_bit_format_put),
3577 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3578 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3579 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3580 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3581 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3582 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3583 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3584 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3585 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3586 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3587};
3588
3589static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3590 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3591 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3592 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3593 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3594 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3595 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3596 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3597 proxy_rx_ch_get, proxy_rx_ch_put),
3598 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3599 usb_audio_rx_format_get, usb_audio_rx_format_put),
3600 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3601 usb_audio_tx_format_get, usb_audio_tx_format_put),
3602 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3603 ext_disp_rx_format_get, ext_disp_rx_format_put),
3604 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3605 usb_audio_rx_sample_rate_get,
3606 usb_audio_rx_sample_rate_put),
3607 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3608 usb_audio_tx_sample_rate_get,
3609 usb_audio_tx_sample_rate_put),
3610 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3611 ext_disp_rx_sample_rate_get,
3612 ext_disp_rx_sample_rate_put),
3613 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3614 tdm_rx_sample_rate_get,
3615 tdm_rx_sample_rate_put),
3616 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3617 tdm_tx_sample_rate_get,
3618 tdm_tx_sample_rate_put),
3619 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3620 tdm_rx_format_get,
3621 tdm_rx_format_put),
3622 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3623 tdm_tx_format_get,
3624 tdm_tx_format_put),
3625 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3626 tdm_rx_ch_get,
3627 tdm_rx_ch_put),
3628 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3629 tdm_tx_ch_get,
3630 tdm_tx_ch_put),
3631 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3632 tdm_rx_sample_rate_get,
3633 tdm_rx_sample_rate_put),
3634 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3635 tdm_tx_sample_rate_get,
3636 tdm_tx_sample_rate_put),
3637 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3638 tdm_rx_format_get,
3639 tdm_rx_format_put),
3640 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3641 tdm_tx_format_get,
3642 tdm_tx_format_put),
3643 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3644 tdm_rx_ch_get,
3645 tdm_rx_ch_put),
3646 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3647 tdm_tx_ch_get,
3648 tdm_tx_ch_put),
3649 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3650 tdm_rx_sample_rate_get,
3651 tdm_rx_sample_rate_put),
3652 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3653 tdm_tx_sample_rate_get,
3654 tdm_tx_sample_rate_put),
3655 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3656 tdm_rx_format_get,
3657 tdm_rx_format_put),
3658 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3659 tdm_tx_format_get,
3660 tdm_tx_format_put),
3661 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3662 tdm_rx_ch_get,
3663 tdm_rx_ch_put),
3664 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3665 tdm_tx_ch_get,
3666 tdm_tx_ch_put),
3667 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3668 tdm_rx_sample_rate_get,
3669 tdm_rx_sample_rate_put),
3670 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3671 tdm_tx_sample_rate_get,
3672 tdm_tx_sample_rate_put),
3673 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3674 tdm_rx_format_get,
3675 tdm_rx_format_put),
3676 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3677 tdm_tx_format_get,
3678 tdm_tx_format_put),
3679 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3680 tdm_rx_ch_get,
3681 tdm_rx_ch_put),
3682 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3683 tdm_tx_ch_get,
3684 tdm_tx_ch_put),
3685 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3686 tdm_rx_sample_rate_get,
3687 tdm_rx_sample_rate_put),
3688 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3689 tdm_tx_sample_rate_get,
3690 tdm_tx_sample_rate_put),
3691 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3692 tdm_rx_format_get,
3693 tdm_rx_format_put),
3694 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3695 tdm_tx_format_get,
3696 tdm_tx_format_put),
3697 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3698 tdm_rx_ch_get,
3699 tdm_rx_ch_put),
3700 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3701 tdm_tx_ch_get,
3702 tdm_tx_ch_put),
3703 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3704 aux_pcm_rx_sample_rate_get,
3705 aux_pcm_rx_sample_rate_put),
3706 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3707 aux_pcm_rx_sample_rate_get,
3708 aux_pcm_rx_sample_rate_put),
3709 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3710 aux_pcm_rx_sample_rate_get,
3711 aux_pcm_rx_sample_rate_put),
3712 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3713 aux_pcm_rx_sample_rate_get,
3714 aux_pcm_rx_sample_rate_put),
3715 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3716 aux_pcm_rx_sample_rate_get,
3717 aux_pcm_rx_sample_rate_put),
3718 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3719 aux_pcm_tx_sample_rate_get,
3720 aux_pcm_tx_sample_rate_put),
3721 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3722 aux_pcm_tx_sample_rate_get,
3723 aux_pcm_tx_sample_rate_put),
3724 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3725 aux_pcm_tx_sample_rate_get,
3726 aux_pcm_tx_sample_rate_put),
3727 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3728 aux_pcm_tx_sample_rate_get,
3729 aux_pcm_tx_sample_rate_put),
3730 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3731 aux_pcm_tx_sample_rate_get,
3732 aux_pcm_tx_sample_rate_put),
3733 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3734 mi2s_rx_sample_rate_get,
3735 mi2s_rx_sample_rate_put),
3736 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3737 mi2s_rx_sample_rate_get,
3738 mi2s_rx_sample_rate_put),
3739 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3740 mi2s_rx_sample_rate_get,
3741 mi2s_rx_sample_rate_put),
3742 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3743 mi2s_rx_sample_rate_get,
3744 mi2s_rx_sample_rate_put),
3745 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3746 mi2s_rx_sample_rate_get,
3747 mi2s_rx_sample_rate_put),
3748 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3749 mi2s_tx_sample_rate_get,
3750 mi2s_tx_sample_rate_put),
3751 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3752 mi2s_tx_sample_rate_get,
3753 mi2s_tx_sample_rate_put),
3754 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3755 mi2s_tx_sample_rate_get,
3756 mi2s_tx_sample_rate_put),
3757 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3758 mi2s_tx_sample_rate_get,
3759 mi2s_tx_sample_rate_put),
3760 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3761 mi2s_tx_sample_rate_get,
3762 mi2s_tx_sample_rate_put),
3763 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3764 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3765 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3766 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3767 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3768 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3769 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3770 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3771 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3772 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3773 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3774 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3775 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3776 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3777 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3778 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3779 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3780 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3781 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3782 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3783 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3784 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3785 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3786 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3787 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3788 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3789 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3790 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3791 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3792 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3793 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3794 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3795 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3796 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3797 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3798 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3799 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3800 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3801 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3802 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3803 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3804 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3805 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3806 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3807 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3808 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3809 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3810 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3811 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3812 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3813 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3814 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3815 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3816 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3817 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3818 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3819 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3820 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3821 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3822 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3823 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3824 msm_hifi_put),
3825 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3826 msm_bt_sample_rate_get,
3827 msm_bt_sample_rate_put),
Sharad Sangle493a1b32018-09-19 15:52:15 +0530[diff] [blame]3828 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3829 msm_bt_sample_rate_rx_get,
3830 msm_bt_sample_rate_rx_put),
3831 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3832 msm_bt_sample_rate_tx_get,
3833 msm_bt_sample_rate_tx_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +0530[diff] [blame]3834 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3835 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3836};
3837
3838static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3839 int enable, bool dapm)
3840{
3841 int ret = 0;
3842
3843 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3844 ret = tavil_cdc_mclk_enable(codec, enable);
3845 } else {
3846 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3847 __func__);
3848 ret = -EINVAL;
3849 }
3850 return ret;
3851}
3852
3853static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3854 int enable, bool dapm)
3855{
3856 int ret = 0;
3857
3858 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3859 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3860 } else {
3861 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3862 __func__);
3863 ret = -EINVAL;
3864 }
3865
3866 return ret;
3867}
3868
3869static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3870 struct snd_kcontrol *kcontrol, int event)
3871{
3872 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3873
3874 pr_debug("%s: event = %d\n", __func__, event);
3875
3876 switch (event) {
3877 case SND_SOC_DAPM_PRE_PMU:
3878 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3879 case SND_SOC_DAPM_POST_PMD:
3880 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3881 }
3882 return 0;
3883}
3884
3885static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3886 struct snd_kcontrol *kcontrol, int event)
3887{
3888 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3889
3890 pr_debug("%s: event = %d\n", __func__, event);
3891
3892 switch (event) {
3893 case SND_SOC_DAPM_PRE_PMU:
3894 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3895 case SND_SOC_DAPM_POST_PMD:
3896 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3897 }
3898 return 0;
3899}
3900
3901static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3902 struct snd_kcontrol *k, int event)
3903{
3904 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3905 struct snd_soc_card *card = codec->component.card;
3906 struct msm_asoc_mach_data *pdata =
3907 snd_soc_card_get_drvdata(card);
3908
3909 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3910 __func__, msm_hifi_control);
3911
3912 if (!pdata || !pdata->hph_en0_gpio_p) {
3913 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3914 return -EINVAL;
3915 }
3916
3917 if (msm_hifi_control != MSM_HIFI_ON) {
3918 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3919 __func__);
3920 return 0;
3921 }
3922
3923 switch (event) {
3924 case SND_SOC_DAPM_POST_PMU:
3925 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3926 break;
3927 case SND_SOC_DAPM_PRE_PMD:
3928 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3929 break;
3930 }
3931
3932 return 0;
3933}
3934
3935static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3936
3937 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3938 msm_mclk_event,
3939 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3940
3941 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3942 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3943
3944 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3945 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3946 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3947 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3948 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3949 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3950 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3951 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3952
3953 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3954 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3955 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3956 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3957 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3958 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3959};
3960
3961static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3962 struct snd_kcontrol *kcontrol, int event)
3963{
3964 struct msm_asoc_mach_data *pdata = NULL;
3965 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3966 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]3967 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3968 int *dmic_gpio_cnt;
3969 struct device_node *dmic_gpio;
3970 char *wname;
3971
3972 wname = strpbrk(w->name, "0123");
3973 if (!wname) {
3974 dev_err(codec->dev, "%s: widget not found\n", __func__);
3975 return -EINVAL;
3976 }
3977
3978 ret = kstrtouint(wname, 10, &dmic_idx);
3979 if (ret < 0) {
3980 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3981 __func__);
3982 return -EINVAL;
3983 }
3984
3985 pdata = snd_soc_card_get_drvdata(codec->component.card);
3986
3987 switch (dmic_idx) {
3988 case 0:
3989 case 1:
3990 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3991 dmic_gpio = pdata->dmic01_gpio_p;
3992 break;
3993 case 2:
3994 case 3:
3995 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
3996 dmic_gpio = pdata->dmic23_gpio_p;
3997 break;
3998 default:
3999 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
4000 __func__);
4001 return -EINVAL;
4002 }
4003
4004 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4005 __func__, event, dmic_idx, *dmic_gpio_cnt);
4006
4007 switch (event) {
4008 case SND_SOC_DAPM_PRE_PMU:
4009 (*dmic_gpio_cnt)++;
4010 if (*dmic_gpio_cnt == 1) {
4011 ret = msm_cdc_pinctrl_select_active_state(
4012 dmic_gpio);
4013 if (ret < 0) {
4014 pr_err("%s: gpio set cannot be activated %sd",
4015 __func__, "dmic_gpio");
4016 return ret;
4017 }
4018 }
4019
4020 break;
4021 case SND_SOC_DAPM_POST_PMD:
4022 (*dmic_gpio_cnt)--;
4023 if (*dmic_gpio_cnt == 0) {
4024 ret = msm_cdc_pinctrl_select_sleep_state(
4025 dmic_gpio);
4026 if (ret < 0) {
4027 pr_err("%s: gpio set cannot be de-activated %sd",
4028 __func__, "dmic_gpio");
4029 return ret;
4030 }
4031 }
4032 break;
4033 default:
4034 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4035 return -EINVAL;
4036 }
4037 return 0;
4038}
4039
4040static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4041 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4042 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4043 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4044 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4045 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4046 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4047 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4048 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4049};
4050
4051static inline int param_is_mask(int p)
4052{
4053 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
4054 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
4055}
4056
4057static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
4058 int n)
4059{
4060 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
4061}
4062
4063static void param_set_mask(struct snd_pcm_hw_params *p, int n,
4064 unsigned int bit)
4065{
4066 if (bit >= SNDRV_MASK_MAX)
4067 return;
4068 if (param_is_mask(n)) {
4069 struct snd_mask *m = param_to_mask(p, n);
4070
4071 m->bits[0] = 0;
4072 m->bits[1] = 0;
4073 m->bits[bit >> 5] |= (1 << (bit & 31));
4074 }
4075}
4076
4077static int msm_slim_get_ch_from_beid(int32_t be_id)
4078{
4079 int ch_id = 0;
4080
4081 switch (be_id) {
4082 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4083 ch_id = SLIM_RX_0;
4084 break;
4085 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4086 ch_id = SLIM_RX_1;
4087 break;
4088 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4089 ch_id = SLIM_RX_2;
4090 break;
4091 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4092 ch_id = SLIM_RX_3;
4093 break;
4094 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4095 ch_id = SLIM_RX_4;
4096 break;
4097 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4098 ch_id = SLIM_RX_6;
4099 break;
4100 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4101 ch_id = SLIM_TX_0;
4102 break;
4103 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4104 ch_id = SLIM_TX_3;
4105 break;
4106 default:
4107 ch_id = SLIM_RX_0;
4108 break;
4109 }
4110
4111 return ch_id;
4112}
4113
4114static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
4115{
4116 int idx = 0;
4117
4118 switch (be_id) {
4119 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4120 idx = WSA_CDC_DMA_RX_0;
4121 break;
4122 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4123 idx = WSA_CDC_DMA_TX_0;
4124 break;
4125 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4126 idx = WSA_CDC_DMA_RX_1;
4127 break;
4128 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4129 idx = WSA_CDC_DMA_TX_1;
4130 break;
4131 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4132 idx = WSA_CDC_DMA_TX_2;
4133 break;
4134 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4135 idx = RX_CDC_DMA_RX_0;
4136 break;
4137 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4138 idx = RX_CDC_DMA_RX_1;
4139 break;
4140 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4141 idx = RX_CDC_DMA_RX_2;
4142 break;
4143 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4144 idx = RX_CDC_DMA_RX_3;
4145 break;
4146 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4147 idx = RX_CDC_DMA_RX_5;
4148 break;
4149 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4150 idx = TX_CDC_DMA_TX_0;
4151 break;
4152 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4153 idx = TX_CDC_DMA_TX_3;
4154 break;
4155 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
4156 idx = TX_CDC_DMA_TX_4;
4157 break;
4158 default:
4159 idx = RX_CDC_DMA_RX_0;
4160 break;
4161 }
4162
4163 return idx;
4164}
4165
4166static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4167{
4168 int idx = -EINVAL;
4169
4170 switch (be_id) {
4171 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4172 idx = DP_RX_IDX;
4173 break;
4174 default:
4175 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4176 idx = -EINVAL;
4177 break;
4178 }
4179
4180 return idx;
4181}
4182
4183static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4184 struct snd_pcm_hw_params *params)
4185{
4186 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4187 struct snd_interval *rate = hw_param_interval(params,
4188 SNDRV_PCM_HW_PARAM_RATE);
4189 struct snd_interval *channels = hw_param_interval(params,
4190 SNDRV_PCM_HW_PARAM_CHANNELS);
4191 int rc = 0;
4192 int idx;
4193 void *config = NULL;
4194 struct snd_soc_codec *codec = NULL;
4195
4196 pr_debug("%s: format = %d, rate = %d\n",
4197 __func__, params_format(params), params_rate(params));
4198
4199 switch (dai_link->id) {
4200 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4201 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4202 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4203 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4204 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4205 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4206 idx = msm_slim_get_ch_from_beid(dai_link->id);
4207 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4208 slim_rx_cfg[idx].bit_format);
4209 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4210 channels->min = channels->max = slim_rx_cfg[idx].channels;
4211 break;
4212
4213 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4214 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4215 idx = msm_slim_get_ch_from_beid(dai_link->id);
4216 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4217 slim_tx_cfg[idx].bit_format);
4218 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4219 channels->min = channels->max = slim_tx_cfg[idx].channels;
4220 break;
4221
4222 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4223 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4224 slim_tx_cfg[1].bit_format);
4225 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4226 channels->min = channels->max = slim_tx_cfg[1].channels;
4227 break;
4228
4229 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4230 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4231 SNDRV_PCM_FORMAT_S32_LE);
4232 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4233 channels->min = channels->max = msm_vi_feed_tx_ch;
4234 break;
4235
4236 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4237 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4238 slim_rx_cfg[5].bit_format);
4239 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4240 channels->min = channels->max = slim_rx_cfg[5].channels;
4241 break;
4242
4243 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4244 codec = rtd->codec;
4245 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4246 channels->min = channels->max = 1;
4247
4248 config = msm_codec_fn.get_afe_config_fn(codec,
4249 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4250 if (config) {
4251 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4252 config, SLIMBUS_5_TX);
4253 if (rc)
4254 pr_err("%s: Failed to set slimbus slave port config %d\n",
4255 __func__, rc);
4256 }
4257 break;
4258
4259 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4260 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4261 slim_rx_cfg[SLIM_RX_7].bit_format);
4262 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4263 channels->min = channels->max =
4264 slim_rx_cfg[SLIM_RX_7].channels;
4265 break;
4266
4267 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4268 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4269 channels->min = channels->max =
4270 slim_tx_cfg[SLIM_TX_7].channels;
4271 break;
4272
4273 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4274 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4275 channels->min = channels->max =
4276 slim_tx_cfg[SLIM_TX_8].channels;
4277 break;
4278
4279 case MSM_BACKEND_DAI_USB_RX:
4280 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4281 usb_rx_cfg.bit_format);
4282 rate->min = rate->max = usb_rx_cfg.sample_rate;
4283 channels->min = channels->max = usb_rx_cfg.channels;
4284 break;
4285
4286 case MSM_BACKEND_DAI_USB_TX:
4287 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4288 usb_tx_cfg.bit_format);
4289 rate->min = rate->max = usb_tx_cfg.sample_rate;
4290 channels->min = channels->max = usb_tx_cfg.channels;
4291 break;
4292
4293 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4294 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4295 if (idx < 0) {
4296 pr_err("%s: Incorrect ext disp idx %d\n",
4297 __func__, idx);
4298 rc = idx;
4299 goto done;
4300 }
4301
4302 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4303 ext_disp_rx_cfg[idx].bit_format);
4304 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4305 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4306 break;
4307
4308 case MSM_BACKEND_DAI_AFE_PCM_RX:
4309 channels->min = channels->max = proxy_rx_cfg.channels;
4310 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4311 break;
4312
4313 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4314 channels->min = channels->max =
4315 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4316 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4317 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4318 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4319 break;
4320
4321 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4322 channels->min = channels->max =
4323 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4324 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4325 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4326 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4327 break;
4328
4329 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4330 channels->min = channels->max =
4331 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4332 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4333 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4334 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4335 break;
4336
4337 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4338 channels->min = channels->max =
4339 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4340 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4341 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4342 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4343 break;
4344
4345 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4346 channels->min = channels->max =
4347 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4348 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4349 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4350 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4351 break;
4352
4353 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4354 channels->min = channels->max =
4355 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4356 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4357 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4358 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4359 break;
4360
4361 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4362 channels->min = channels->max =
4363 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4364 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4365 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4366 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4367 break;
4368
4369 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4370 channels->min = channels->max =
4371 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4372 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4373 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4374 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4375 break;
4376
4377 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4378 channels->min = channels->max =
4379 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4380 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4381 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4382 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4383 break;
4384
4385 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4386 channels->min = channels->max =
4387 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4388 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4389 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4390 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4391 break;
4392
4393
4394 case MSM_BACKEND_DAI_AUXPCM_RX:
4395 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4396 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4397 rate->min = rate->max =
4398 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4399 channels->min = channels->max =
4400 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4401 break;
4402
4403 case MSM_BACKEND_DAI_AUXPCM_TX:
4404 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4405 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4406 rate->min = rate->max =
4407 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4408 channels->min = channels->max =
4409 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4410 break;
4411
4412 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4413 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4414 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4415 rate->min = rate->max =
4416 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4417 channels->min = channels->max =
4418 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4419 break;
4420
4421 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4422 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4423 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4424 rate->min = rate->max =
4425 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4426 channels->min = channels->max =
4427 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4428 break;
4429
4430 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4431 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4432 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4433 rate->min = rate->max =
4434 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4435 channels->min = channels->max =
4436 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4437 break;
4438
4439 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4440 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4441 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4442 rate->min = rate->max =
4443 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4444 channels->min = channels->max =
4445 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4446 break;
4447
4448 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4449 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4450 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4451 rate->min = rate->max =
4452 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4453 channels->min = channels->max =
4454 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4455 break;
4456
4457 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4458 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4459 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4460 rate->min = rate->max =
4461 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4462 channels->min = channels->max =
4463 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4464 break;
4465
4466 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4467 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4468 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4469 rate->min = rate->max =
4470 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4471 channels->min = channels->max =
4472 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4473 break;
4474
4475 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4476 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4477 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4478 rate->min = rate->max =
4479 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4480 channels->min = channels->max =
4481 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4482 break;
4483
4484 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4485 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4486 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4487 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4488 channels->min = channels->max =
4489 mi2s_rx_cfg[PRIM_MI2S].channels;
4490 break;
4491
4492 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4493 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4494 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4495 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4496 channels->min = channels->max =
4497 mi2s_tx_cfg[PRIM_MI2S].channels;
4498 break;
4499
4500 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4501 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4502 mi2s_rx_cfg[SEC_MI2S].bit_format);
4503 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4504 channels->min = channels->max =
4505 mi2s_rx_cfg[SEC_MI2S].channels;
4506 break;
4507
4508 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4509 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4510 mi2s_tx_cfg[SEC_MI2S].bit_format);
4511 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4512 channels->min = channels->max =
4513 mi2s_tx_cfg[SEC_MI2S].channels;
4514 break;
4515
4516 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4517 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4518 mi2s_rx_cfg[TERT_MI2S].bit_format);
4519 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4520 channels->min = channels->max =
4521 mi2s_rx_cfg[TERT_MI2S].channels;
4522 break;
4523
4524 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4525 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4526 mi2s_tx_cfg[TERT_MI2S].bit_format);
4527 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4528 channels->min = channels->max =
4529 mi2s_tx_cfg[TERT_MI2S].channels;
4530 break;
4531
4532 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4533 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4534 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4535 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4536 channels->min = channels->max =
4537 mi2s_rx_cfg[QUAT_MI2S].channels;
4538 break;
4539
4540 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4541 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4542 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4543 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4544 channels->min = channels->max =
4545 mi2s_tx_cfg[QUAT_MI2S].channels;
4546 break;
4547
4548 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4549 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4550 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4551 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4552 channels->min = channels->max =
4553 mi2s_rx_cfg[QUIN_MI2S].channels;
4554 break;
4555
4556 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4557 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4558 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4559 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4560 channels->min = channels->max =
4561 mi2s_tx_cfg[QUIN_MI2S].channels;
4562 break;
4563
4564 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4565 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4566 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4567 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4568 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4569 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4570 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4571 cdc_dma_rx_cfg[idx].bit_format);
4572 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4573 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4574 break;
4575
4576 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4577 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4578 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]4579 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4580 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4581 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4582 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4583 cdc_dma_tx_cfg[idx].bit_format);
4584 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4585 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4586 break;
4587
4588 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4589 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4590 SNDRV_PCM_FORMAT_S32_LE);
4591 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4592 channels->min = channels->max = msm_vi_feed_tx_ch;
4593 break;
4594
4595 default:
4596 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4597 break;
4598 }
4599
4600done:
4601 return rc;
4602}
4603
4604static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4605{
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4606 struct snd_soc_card *card = codec->component.card;
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4607 struct msm_asoc_mach_data *pdata =
4608 snd_soc_card_get_drvdata(card);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4609
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4610 if (!pdata->fsa_handle)
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4611 return false;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4612
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]4613 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4614}
4615
4616static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4617{
4618 int value = 0;
4619 bool ret = false;
4620 struct snd_soc_card *card;
4621 struct msm_asoc_mach_data *pdata;
4622
4623 if (!codec) {
4624 pr_err("%s codec is NULL\n", __func__);
4625 return false;
4626 }
4627 card = codec->component.card;
4628 pdata = snd_soc_card_get_drvdata(card);
4629
4630 if (!pdata)
4631 return false;
4632
4633 if (wcd_mbhc_cfg.enable_usbc_analog)
4634 return msm_usbc_swap_gnd_mic(codec, active);
4635
4636 /* if usbc is not defined, swap using us_euro_gpio_p */
4637 if (pdata->us_euro_gpio_p) {
4638 value = msm_cdc_pinctrl_get_state(
4639 pdata->us_euro_gpio_p);
4640 if (value)
4641 msm_cdc_pinctrl_select_sleep_state(
4642 pdata->us_euro_gpio_p);
4643 else
4644 msm_cdc_pinctrl_select_active_state(
4645 pdata->us_euro_gpio_p);
4646 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4647 __func__, value, !value);
4648 ret = true;
4649 }
4650 return ret;
4651}
4652
4653static int msm_afe_set_config(struct snd_soc_codec *codec)
4654{
4655 int ret = 0;
4656 void *config_data = NULL;
4657
4658 if (!msm_codec_fn.get_afe_config_fn) {
4659 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4660 __func__);
4661 return -EINVAL;
4662 }
4663
4664 config_data = msm_codec_fn.get_afe_config_fn(codec,
4665 AFE_CDC_REGISTERS_CONFIG);
4666 if (config_data) {
4667 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4668 if (ret) {
4669 dev_err(codec->dev,
4670 "%s: Failed to set codec registers config %d\n",
4671 __func__, ret);
4672 return ret;
4673 }
4674 }
4675
4676 config_data = msm_codec_fn.get_afe_config_fn(codec,
4677 AFE_CDC_REGISTER_PAGE_CONFIG);
4678 if (config_data) {
4679 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4680 0);
4681 if (ret)
4682 dev_err(codec->dev,
4683 "%s: Failed to set cdc register page config\n",
4684 __func__);
4685 }
4686
4687 config_data = msm_codec_fn.get_afe_config_fn(codec,
4688 AFE_SLIMBUS_SLAVE_CONFIG);
4689 if (config_data) {
4690 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4691 if (ret) {
4692 dev_err(codec->dev,
4693 "%s: Failed to set slimbus slave config %d\n",
4694 __func__, ret);
4695 return ret;
4696 }
4697 }
4698
4699 return 0;
4700}
4701
4702static void msm_afe_clear_config(void)
4703{
4704 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4705 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4706}
4707
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4708static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4709{
4710 int ret = 0;
4711 void *config_data;
4712 struct snd_soc_codec *codec = rtd->codec;
4713 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4714 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4715 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4716 struct snd_soc_component *aux_comp;
4717 struct snd_card *card;
4718 struct snd_info_entry *entry;
4719 struct msm_asoc_mach_data *pdata =
4720 snd_soc_card_get_drvdata(rtd->card);
4721
4722 /*
4723 * Codec SLIMBUS configuration
4724 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4725 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4726 * TX14, TX15, TX16
4727 */
4728 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4729 150, 151};
4730 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4731 134, 135, 136, 137, 138, 139,
4732 140, 141, 142, 143};
4733
4734 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4735
4736 rtd->pmdown_time = 0;
4737
4738 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4739 ARRAY_SIZE(msm_tavil_snd_controls));
4740 if (ret < 0) {
4741 pr_err("%s: add_codec_controls failed, err %d\n",
4742 __func__, ret);
4743 return ret;
4744 }
4745
4746 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4747 ARRAY_SIZE(msm_common_snd_controls));
4748 if (ret < 0) {
4749 pr_err("%s: add_codec_controls failed, err %d\n",
4750 __func__, ret);
4751 return ret;
4752 }
4753
4754 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4755 ARRAY_SIZE(msm_dapm_widgets_tavil));
4756
4757 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4758 ARRAY_SIZE(wcd_audio_paths_tavil));
4759
4760 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4761 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4762 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4763 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4764 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4765 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4766 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4767 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4768 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4769 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4770 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4771 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4772 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4773 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4774 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4775 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4776 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4777 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4778 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4779 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4780 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4781 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4782 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4783 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4784 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4785 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4786 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4787
4788 snd_soc_dapm_sync(dapm);
4789
4790 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4791 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4792
4793 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4794
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]4795 ret = msm_afe_set_config(codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4796 if (ret) {
4797 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4798 goto err;
4799 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]4800 pdata->is_afe_config_done = true;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4801
4802 config_data = msm_codec_fn.get_afe_config_fn(codec,
4803 AFE_AANC_VERSION);
4804 if (config_data) {
4805 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4806 if (ret) {
4807 pr_err("%s: Failed to set aanc version %d\n",
4808 __func__, ret);
4809 goto err;
4810 }
4811 }
4812
4813 /*
4814 * Send speaker configuration only for WSA8810.
4815 * Default configuration is for WSA8815.
4816 */
4817 pr_debug("%s: Number of aux devices: %d\n",
4818 __func__, rtd->card->num_aux_devs);
4819 if (rtd->card->num_aux_devs &&
4820 !list_empty(&rtd->card->aux_comp_list)) {
4821 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4822 struct snd_soc_component, card_aux_list);
4823 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4824 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4825 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4826 tavil_set_spkr_gain_offset(rtd->codec,
4827 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4828 }
4829 }
4830
4831 card = rtd->card->snd_card;
4832 entry = snd_info_create_subdir(card->module, "codecs",
4833 card->proc_root);
4834 if (!entry) {
4835 pr_debug("%s: Cannot create codecs module entry\n",
4836 __func__);
4837 ret = 0;
4838 goto err;
4839 }
4840 pdata->codec_root = entry;
4841 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4842
4843 codec_reg_done = true;
4844 return 0;
4845err:
4846 return ret;
4847}
4848
4849static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4850{
4851 int ret = 0;
4852 struct snd_soc_codec *codec = rtd->codec;
4853 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4854 struct snd_card *card;
4855 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4856 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4857 struct msm_asoc_mach_data *pdata =
4858 snd_soc_card_get_drvdata(rtd->card);
4859
4860 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
4861 ARRAY_SIZE(msm_int_snd_controls));
4862 if (ret < 0) {
4863 pr_err("%s: add_codec_controls failed: %d\n",
4864 __func__, ret);
4865 return ret;
4866 }
4867 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4868 ARRAY_SIZE(msm_common_snd_controls));
4869 if (ret < 0) {
4870 pr_err("%s: add common snd controls failed: %d\n",
4871 __func__, ret);
4872 return ret;
4873 }
4874
4875 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4876 ARRAY_SIZE(msm_int_dapm_widgets));
4877
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4878 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4879 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4880 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4881 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4882
4883 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4884 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4885 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4886 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4887
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4888 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4889 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4890 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4891 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4892
4893 snd_soc_dapm_sync(dapm);
4894
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4895 /*
4896 * Send speaker configuration only for WSA8810.
4897 * Default configuration is for WSA8815.
4898 */
4899 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
4900 __func__, rtd->card->num_aux_devs);
4901 if (rtd->card->num_aux_devs &&
4902 !list_empty(&rtd->card->component_dev_list)) {
4903 aux_comp = list_first_entry(
4904 &rtd->card->component_dev_list,
4905 struct snd_soc_component,
4906 card_aux_list);
4907 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4908 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4909 wsa_macro_set_spkr_mode(rtd->codec,
4910 WSA_MACRO_SPKR_MODE_1);
4911 wsa_macro_set_spkr_gain_offset(rtd->codec,
4912 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4913 }
4914 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4915 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]4916 if (!pdata->codec_root) {
4917 entry = snd_info_create_subdir(card->module, "codecs",
4918 card->proc_root);
4919 if (!entry) {
4920 pr_debug("%s: Cannot create codecs module entry\n",
4921 __func__);
4922 ret = 0;
4923 goto err;
4924 }
4925 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4926 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4927 bolero_info_create_codec_entry(pdata->codec_root, codec);
4928 codec_reg_done = true;
4929 return 0;
4930err:
4931 return ret;
4932}
4933
4934static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4935{
4936 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4937 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4938 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4939
4940 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4941 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4942}
4943
4944static void *def_wcd_mbhc_cal(void)
4945{
4946 void *wcd_mbhc_cal;
4947 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4948 u16 *btn_high;
4949
4950 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4951 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4952 if (!wcd_mbhc_cal)
4953 return NULL;
4954
4955#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
4956 S(v_hs_max, 1600);
4957#undef S
4958#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
4959 S(num_btn, WCD_MBHC_DEF_BUTTONS);
4960#undef S
4961
4962 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4963 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4964 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4965
4966 btn_high[0] = 75;
4967 btn_high[1] = 150;
4968 btn_high[2] = 237;
4969 btn_high[3] = 500;
4970 btn_high[4] = 500;
4971 btn_high[5] = 500;
4972 btn_high[6] = 500;
4973 btn_high[7] = 500;
4974
4975 return wcd_mbhc_cal;
4976}
4977
4978static int msm_snd_hw_params(struct snd_pcm_substream *substream,
4979 struct snd_pcm_hw_params *params)
4980{
4981 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4982 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4983 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4984 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4985
4986 int ret = 0;
4987 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
4988 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4989 u32 user_set_tx_ch = 0;
4990 u32 rx_ch_count;
4991
4992 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4993 ret = snd_soc_dai_get_channel_map(codec_dai,
4994 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4995 if (ret < 0) {
4996 pr_err("%s: failed to get codec chan map, err:%d\n",
4997 __func__, ret);
4998 goto err;
4999 }
5000 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5001 pr_debug("%s: rx_5_ch=%d\n", __func__,
5002 slim_rx_cfg[5].channels);
5003 rx_ch_count = slim_rx_cfg[5].channels;
5004 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5005 pr_debug("%s: rx_2_ch=%d\n", __func__,
5006 slim_rx_cfg[2].channels);
5007 rx_ch_count = slim_rx_cfg[2].channels;
5008 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5009 pr_debug("%s: rx_6_ch=%d\n", __func__,
5010 slim_rx_cfg[6].channels);
5011 rx_ch_count = slim_rx_cfg[6].channels;
5012 } else {
5013 pr_debug("%s: rx_0_ch=%d\n", __func__,
5014 slim_rx_cfg[0].channels);
5015 rx_ch_count = slim_rx_cfg[0].channels;
5016 }
5017 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5018 rx_ch_count, rx_ch);
5019 if (ret < 0) {
5020 pr_err("%s: failed to set cpu chan map, err:%d\n",
5021 __func__, ret);
5022 goto err;
5023 }
5024 } else {
5025
5026 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5027 codec_dai->name, codec_dai->id, user_set_tx_ch);
5028 ret = snd_soc_dai_get_channel_map(codec_dai,
5029 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5030 if (ret < 0) {
5031 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5032 __func__, ret);
5033 goto err;
5034 }
5035 /* For <codec>_tx1 case */
5036 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5037 user_set_tx_ch = slim_tx_cfg[0].channels;
5038 /* For <codec>_tx3 case */
5039 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5040 user_set_tx_ch = slim_tx_cfg[1].channels;
5041 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5042 user_set_tx_ch = msm_vi_feed_tx_ch;
5043 else
5044 user_set_tx_ch = tx_ch_cnt;
5045
5046 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5047 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5048 tx_ch_cnt, dai_link->id);
5049
5050 ret = snd_soc_dai_set_channel_map(cpu_dai,
5051 user_set_tx_ch, tx_ch, 0, 0);
5052 if (ret < 0)
5053 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5054 __func__, ret);
5055 }
5056
5057err:
5058 return ret;
5059}
5060
5061
5062static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5063 struct snd_pcm_hw_params *params)
5064{
5065 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5066 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5067 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5068 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5069
5070 int ret = 0;
5071 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5072 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5073 u32 user_set_tx_ch = 0;
5074 u32 user_set_rx_ch = 0;
5075 u32 ch_id;
5076
5077 ret = snd_soc_dai_get_channel_map(codec_dai,
5078 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5079 &rx_ch_cdc_dma);
5080 if (ret < 0) {
5081 pr_err("%s: failed to get codec chan map, err:%d\n",
5082 __func__, ret);
5083 goto err;
5084 }
5085
5086 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5087 switch (dai_link->id) {
5088 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5089 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5090 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5091 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5092 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5093 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5094 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5095 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5096 {
5097 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5098 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5099 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5100 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5101 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5102 user_set_rx_ch, &rx_ch_cdc_dma);
5103 if (ret < 0) {
5104 pr_err("%s: failed to set cpu chan map, err:%d\n",
5105 __func__, ret);
5106 goto err;
5107 }
5108
5109 }
5110 break;
5111 }
5112 } else {
5113 switch (dai_link->id) {
5114 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5115 {
5116 user_set_tx_ch = msm_vi_feed_tx_ch;
5117 }
5118 break;
5119 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5120 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5121 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5122 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5123 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5124 {
5125 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5126 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5127 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5128 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5129 }
5130 break;
5131 }
5132
5133 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5134 &tx_ch_cdc_dma, 0, 0);
5135 if (ret < 0) {
5136 pr_err("%s: failed to set cpu chan map, err:%d\n",
5137 __func__, ret);
5138 goto err;
5139 }
5140 }
5141
5142err:
5143 return ret;
5144}
5145
5146static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5147 struct snd_pcm_hw_params *params)
5148{
5149 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5150 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5151 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5152 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5153 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5154 unsigned int num_tx_ch = 0;
5155 unsigned int num_rx_ch = 0;
5156 int ret = 0;
5157
5158 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5159 num_rx_ch = params_channels(params);
5160 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5161 codec_dai->name, codec_dai->id, num_rx_ch);
5162 ret = snd_soc_dai_get_channel_map(codec_dai,
5163 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5164 if (ret < 0) {
5165 pr_err("%s: failed to get codec chan map, err:%d\n",
5166 __func__, ret);
5167 goto err;
5168 }
5169 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5170 num_rx_ch, rx_ch);
5171 if (ret < 0) {
5172 pr_err("%s: failed to set cpu chan map, err:%d\n",
5173 __func__, ret);
5174 goto err;
5175 }
5176 } else {
5177 num_tx_ch = params_channels(params);
5178 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5179 codec_dai->name, codec_dai->id, num_tx_ch);
5180 ret = snd_soc_dai_get_channel_map(codec_dai,
5181 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5182 if (ret < 0) {
5183 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5184 __func__, ret);
5185 goto err;
5186 }
5187 ret = snd_soc_dai_set_channel_map(cpu_dai,
5188 num_tx_ch, tx_ch, 0, 0);
5189 if (ret < 0) {
5190 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5191 __func__, ret);
5192 goto err;
5193 }
5194 }
5195
5196err:
5197 return ret;
5198}
5199
5200static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5201 struct snd_pcm_hw_params *params)
5202{
5203 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5204 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5205 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5206 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5207 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5208 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5209 int ret;
5210
5211 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5212 codec_dai->name, codec_dai->id);
5213 ret = snd_soc_dai_get_channel_map(codec_dai,
5214 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5215 if (ret) {
5216 dev_err(rtd->dev,
5217 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5218 __func__, ret);
5219 goto err;
5220 }
5221
5222 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5223 __func__, tx_ch_cnt, dai_link->id);
5224
5225 ret = snd_soc_dai_set_channel_map(cpu_dai,
5226 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5227 if (ret)
5228 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5229 __func__, ret);
5230
5231err:
5232 return ret;
5233}
5234
5235static int msm_get_port_id(int be_id)
5236{
5237 int afe_port_id;
5238
5239 switch (be_id) {
5240 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5241 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5242 break;
5243 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5244 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5245 break;
5246 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5247 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5248 break;
5249 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5250 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5251 break;
5252 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5253 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5254 break;
5255 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5256 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5257 break;
5258 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5259 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5260 break;
5261 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5262 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5263 break;
5264 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5265 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5266 break;
5267 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5268 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5269 break;
5270 default:
5271 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5272 afe_port_id = -EINVAL;
5273 }
5274
5275 return afe_port_id;
5276}
5277
5278static u32 get_mi2s_bits_per_sample(u32 bit_format)
5279{
5280 u32 bit_per_sample;
5281
5282 switch (bit_format) {
5283 case SNDRV_PCM_FORMAT_S32_LE:
5284 case SNDRV_PCM_FORMAT_S24_3LE:
5285 case SNDRV_PCM_FORMAT_S24_LE:
5286 bit_per_sample = 32;
5287 break;
5288 case SNDRV_PCM_FORMAT_S16_LE:
5289 default:
5290 bit_per_sample = 16;
5291 break;
5292 }
5293
5294 return bit_per_sample;
5295}
5296
5297static void update_mi2s_clk_val(int dai_id, int stream)
5298{
5299 u32 bit_per_sample;
5300
5301 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5302 bit_per_sample =
5303 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5304 mi2s_clk[dai_id].clk_freq_in_hz =
5305 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5306 } else {
5307 bit_per_sample =
5308 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5309 mi2s_clk[dai_id].clk_freq_in_hz =
5310 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5311 }
5312}
5313
5314static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5315{
5316 int ret = 0;
5317 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5318 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5319 int port_id = 0;
5320 int index = cpu_dai->id;
5321
5322 port_id = msm_get_port_id(rtd->dai_link->id);
5323 if (port_id < 0) {
5324 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5325 ret = port_id;
5326 goto err;
5327 }
5328
5329 if (enable) {
5330 update_mi2s_clk_val(index, substream->stream);
5331 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5332 mi2s_clk[index].clk_freq_in_hz);
5333 }
5334
5335 mi2s_clk[index].enable = enable;
5336 ret = afe_set_lpass_clock_v2(port_id,
5337 &mi2s_clk[index]);
5338 if (ret < 0) {
5339 dev_err(rtd->card->dev,
5340 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5341 __func__, port_id, ret);
5342 goto err;
5343 }
5344
5345err:
5346 return ret;
5347}
5348
5349static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5350 enum pinctrl_pin_state new_state)
5351{
5352 int ret = 0;
5353 int curr_state = 0;
5354
5355 if (pinctrl_info == NULL) {
5356 pr_err("%s: pinctrl_info is NULL\n", __func__);
5357 ret = -EINVAL;
5358 goto err;
5359 }
5360
5361 if (pinctrl_info->pinctrl == NULL) {
5362 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5363 ret = -EINVAL;
5364 goto err;
5365 }
5366
5367 curr_state = pinctrl_info->curr_state;
5368 pinctrl_info->curr_state = new_state;
5369 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5370 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5371
5372 if (curr_state == pinctrl_info->curr_state) {
5373 pr_debug("%s: Already in same state\n", __func__);
5374 goto err;
5375 }
5376
5377 if (curr_state != STATE_DISABLE &&
5378 pinctrl_info->curr_state != STATE_DISABLE) {
5379 pr_debug("%s: state already active cannot switch\n", __func__);
5380 ret = -EIO;
5381 goto err;
5382 }
5383
5384 switch (pinctrl_info->curr_state) {
5385 case STATE_MI2S_ACTIVE:
5386 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5387 pinctrl_info->mi2s_active);
5388 if (ret) {
5389 pr_err("%s: MI2S state select failed with %d\n",
5390 __func__, ret);
5391 ret = -EIO;
5392 goto err;
5393 }
5394 break;
5395 case STATE_TDM_ACTIVE:
5396 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5397 pinctrl_info->tdm_active);
5398 if (ret) {
5399 pr_err("%s: TDM state select failed with %d\n",
5400 __func__, ret);
5401 ret = -EIO;
5402 goto err;
5403 }
5404 break;
5405 case STATE_DISABLE:
5406 if (curr_state == STATE_MI2S_ACTIVE) {
5407 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5408 pinctrl_info->mi2s_disable);
5409 } else {
5410 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5411 pinctrl_info->tdm_disable);
5412 }
5413 if (ret) {
5414 pr_err("%s: state disable failed with %d\n",
5415 __func__, ret);
5416 ret = -EIO;
5417 goto err;
5418 }
5419 break;
5420 default:
5421 pr_err("%s: TLMM pin state is invalid\n", __func__);
5422 return -EINVAL;
5423 }
5424
5425err:
5426 return ret;
5427}
5428
5429static int msm_get_pinctrl(struct platform_device *pdev)
5430{
5431 struct snd_soc_card *card = platform_get_drvdata(pdev);
5432 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5433 struct msm_pinctrl_info *pinctrl_info = NULL;
5434 struct pinctrl *pinctrl;
5435 int ret = 0;
5436
5437 pinctrl_info = &pdata->pinctrl_info;
5438
5439 if (pinctrl_info == NULL) {
5440 pr_err("%s: pinctrl_info is NULL\n", __func__);
5441 return -EINVAL;
5442 }
5443
5444 pinctrl = devm_pinctrl_get(&pdev->dev);
5445 if (IS_ERR_OR_NULL(pinctrl)) {
5446 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5447 return -EINVAL;
5448 }
5449 pinctrl_info->pinctrl = pinctrl;
5450
5451 /* get all the states handles from Device Tree */
5452 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5453 "quat-mi2s-sleep");
5454 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5455 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5456 goto err;
5457 }
5458 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5459 "quat-mi2s-active");
5460 if (IS_ERR(pinctrl_info->mi2s_active)) {
5461 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5462 goto err;
5463 }
5464 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5465 "quat-tdm-sleep");
5466 if (IS_ERR(pinctrl_info->tdm_disable)) {
5467 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5468 goto err;
5469 }
5470 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5471 "quat-tdm-active");
5472 if (IS_ERR(pinctrl_info->tdm_active)) {
5473 pr_err("%s: could not get tdm_active pinstate\n",
5474 __func__);
5475 goto err;
5476 }
5477 /* Reset the TLMM pins to a default state */
5478 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5479 pinctrl_info->mi2s_disable);
5480 if (ret != 0) {
5481 pr_err("%s: Disable TLMM pins failed with %d\n",
5482 __func__, ret);
5483 ret = -EIO;
5484 goto err;
5485 }
5486 pinctrl_info->curr_state = STATE_DISABLE;
5487
5488 return 0;
5489
5490err:
5491 devm_pinctrl_put(pinctrl);
5492 pinctrl_info->pinctrl = NULL;
5493 return -EINVAL;
5494}
5495
5496static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5497 struct snd_pcm_hw_params *params)
5498{
5499 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5500 struct snd_interval *rate = hw_param_interval(params,
5501 SNDRV_PCM_HW_PARAM_RATE);
5502 struct snd_interval *channels = hw_param_interval(params,
5503 SNDRV_PCM_HW_PARAM_CHANNELS);
5504
5505 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5506 channels->min = channels->max =
5507 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5508 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5509 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5510 rate->min = rate->max =
5511 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5512 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5513 channels->min = channels->max =
5514 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5515 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5516 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5517 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5518 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5519 channels->min = channels->max =
5520 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5521 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5522 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5523 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5524 } else {
5525 pr_err("%s: dai id 0x%x not supported\n",
5526 __func__, cpu_dai->id);
5527 return -EINVAL;
5528 }
5529
5530 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5531 __func__, cpu_dai->id, channels->max, rate->max,
5532 params_format(params));
5533
5534 return 0;
5535}
5536
5537static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5538 struct snd_pcm_hw_params *params)
5539{
5540 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5541 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5542 int ret = 0;
5543 int slot_width = 32;
5544 int channels, slots;
5545 unsigned int slot_mask, rate, clk_freq;
5546 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5547
5548 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5549
5550 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5551 switch (cpu_dai->id) {
5552 case AFE_PORT_ID_PRIMARY_TDM_RX:
5553 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5554 break;
5555 case AFE_PORT_ID_SECONDARY_TDM_RX:
5556 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5557 break;
5558 case AFE_PORT_ID_TERTIARY_TDM_RX:
5559 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5560 break;
5561 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5562 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5563 break;
5564 case AFE_PORT_ID_QUINARY_TDM_RX:
5565 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5566 break;
5567 case AFE_PORT_ID_PRIMARY_TDM_TX:
5568 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5569 break;
5570 case AFE_PORT_ID_SECONDARY_TDM_TX:
5571 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5572 break;
5573 case AFE_PORT_ID_TERTIARY_TDM_TX:
5574 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5575 break;
5576 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5577 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5578 break;
5579 case AFE_PORT_ID_QUINARY_TDM_TX:
5580 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5581 break;
5582
5583 default:
5584 pr_err("%s: dai id 0x%x not supported\n",
5585 __func__, cpu_dai->id);
5586 return -EINVAL;
5587 }
5588
5589 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5590 /*2 slot config - bits 0 and 1 set for the first two slots */
5591 slot_mask = 0x0000FFFF >> (16-slots);
5592 channels = slots;
5593
5594 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5595 __func__, slot_width, slots);
5596
5597 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5598 slots, slot_width);
5599 if (ret < 0) {
5600 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5601 __func__, ret);
5602 goto end;
5603 }
5604
5605 ret = snd_soc_dai_set_channel_map(cpu_dai,
5606 0, NULL, channels, slot_offset);
5607 if (ret < 0) {
5608 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5609 __func__, ret);
5610 goto end;
5611 }
5612 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5613 /*2 slot config - bits 0 and 1 set for the first two slots */
5614 slot_mask = 0x0000FFFF >> (16-slots);
5615 channels = slots;
5616
5617 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5618 __func__, slot_width, slots);
5619
5620 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5621 slots, slot_width);
5622 if (ret < 0) {
5623 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5624 __func__, ret);
5625 goto end;
5626 }
5627
5628 ret = snd_soc_dai_set_channel_map(cpu_dai,
5629 channels, slot_offset, 0, NULL);
5630 if (ret < 0) {
5631 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5632 __func__, ret);
5633 goto end;
5634 }
5635 } else {
5636 ret = -EINVAL;
5637 pr_err("%s: invalid use case, err:%d\n",
5638 __func__, ret);
5639 goto end;
5640 }
5641
5642 rate = params_rate(params);
5643 clk_freq = rate * slot_width * slots;
5644 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5645 if (ret < 0)
5646 pr_err("%s: failed to set tdm clk, err:%d\n",
5647 __func__, ret);
5648
5649end:
5650 return ret;
5651}
5652
5653static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5654{
5655 int ret = 0;
5656 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5657 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5658 struct snd_soc_card *card = rtd->card;
5659 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5660 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5661
5662 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5663 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5664 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5665 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5666 if (ret)
5667 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5668 __func__, ret);
5669 }
5670
5671 return ret;
5672}
5673
5674static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5675{
5676 int ret = 0;
5677 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5678 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5679 struct snd_soc_card *card = rtd->card;
5680 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5681 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5682
5683 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5684 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5685 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5686 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5687 if (ret)
5688 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5689 __func__, ret);
5690 }
5691}
5692
5693static struct snd_soc_ops sm6150_tdm_be_ops = {
5694 .hw_params = sm6150_tdm_snd_hw_params,
5695 .startup = sm6150_tdm_snd_startup,
5696 .shutdown = sm6150_tdm_snd_shutdown
5697};
5698
5699static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5700{
5701 cpumask_t mask;
5702
5703 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5704 pm_qos_remove_request(&substream->latency_pm_qos_req);
5705
5706 cpumask_clear(&mask);
5707 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5708 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5709 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5710
5711 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5712
5713 pm_qos_add_request(&substream->latency_pm_qos_req,
5714 PM_QOS_CPU_DMA_LATENCY,
5715 MSM_LL_QOS_VALUE);
5716 return 0;
5717}
5718
5719static struct snd_soc_ops msm_fe_qos_ops = {
5720 .prepare = msm_fe_qos_prepare,
5721};
5722
5723static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5724{
5725 int ret = 0;
5726 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5727 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5728 int index = cpu_dai->id;
5729 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5730 struct snd_soc_card *card = rtd->card;
5731 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5732 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5733 int ret_pinctrl = 0;
5734
5735 dev_dbg(rtd->card->dev,
5736 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5737 __func__, substream->name, substream->stream,
5738 cpu_dai->name, cpu_dai->id);
5739
5740 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5741 ret = -EINVAL;
5742 dev_err(rtd->card->dev,
5743 "%s: CPU DAI id (%d) out of range\n",
5744 __func__, cpu_dai->id);
5745 goto err;
5746 }
5747 /*
5748 * Mutex protection in case the same MI2S
5749 * interface using for both TX and RX so
5750 * that the same clock won't be enable twice.
5751 */
5752 mutex_lock(&mi2s_intf_conf[index].lock);
5753 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5754 /* Check if msm needs to provide the clock to the interface */
5755 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5756 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5757 fmt = SND_SOC_DAIFMT_CBM_CFM;
5758 }
5759 ret = msm_mi2s_set_sclk(substream, true);
5760 if (ret < 0) {
5761 dev_err(rtd->card->dev,
5762 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5763 __func__, ret);
5764 goto clean_up;
5765 }
5766
5767 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5768 if (ret < 0) {
5769 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5770 __func__, index, ret);
5771 goto clk_off;
5772 }
5773 if (index == QUAT_MI2S) {
5774 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5775 STATE_MI2S_ACTIVE);
5776 if (ret_pinctrl)
5777 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5778 __func__, ret_pinctrl);
5779 }
5780 }
5781clk_off:
5782 if (ret < 0)
5783 msm_mi2s_set_sclk(substream, false);
5784clean_up:
5785 if (ret < 0)
5786 mi2s_intf_conf[index].ref_cnt--;
5787 mutex_unlock(&mi2s_intf_conf[index].lock);
5788err:
5789 return ret;
5790}
5791
5792static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5793{
5794 int ret;
5795 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5796 int index = rtd->cpu_dai->id;
5797 struct snd_soc_card *card = rtd->card;
5798 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5799 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5800 int ret_pinctrl = 0;
5801
5802 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5803 substream->name, substream->stream);
5804 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5805 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5806 return;
5807 }
5808
5809 mutex_lock(&mi2s_intf_conf[index].lock);
5810 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5811 ret = msm_mi2s_set_sclk(substream, false);
5812 if (ret < 0)
5813 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5814 __func__, index, ret);
5815 if (index == QUAT_MI2S) {
5816 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5817 STATE_DISABLE);
5818 if (ret_pinctrl)
5819 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5820 __func__, ret_pinctrl);
5821 }
5822 }
5823 mutex_unlock(&mi2s_intf_conf[index].lock);
5824}
5825
5826static struct snd_soc_ops msm_mi2s_be_ops = {
5827 .startup = msm_mi2s_snd_startup,
5828 .shutdown = msm_mi2s_snd_shutdown,
5829};
5830
5831static struct snd_soc_ops msm_cdc_dma_be_ops = {
5832 .hw_params = msm_snd_cdc_dma_hw_params,
5833};
5834
5835static struct snd_soc_ops msm_be_ops = {
5836 .hw_params = msm_snd_hw_params,
5837};
5838
5839static struct snd_soc_ops msm_slimbus_2_be_ops = {
5840 .hw_params = msm_slimbus_2_hw_params,
5841};
5842
5843static struct snd_soc_ops msm_wcn_ops = {
5844 .hw_params = msm_wcn_hw_params,
5845};
5846
5847
5848/* Digital audio interface glue - connects codec <---> CPU */
5849static struct snd_soc_dai_link msm_common_dai_links[] = {
5850 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5851 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5852 .name = MSM_DAILINK_NAME(Media1),
5853 .stream_name = "MultiMedia1",
5854 .cpu_dai_name = "MultiMedia1",
5855 .platform_name = "msm-pcm-dsp.0",
5856 .dynamic = 1,
5857 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5858 .dpcm_playback = 1,
5859 .dpcm_capture = 1,
5860 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5861 SND_SOC_DPCM_TRIGGER_POST},
5862 .codec_dai_name = "snd-soc-dummy-dai",
5863 .codec_name = "snd-soc-dummy",
5864 .ignore_suspend = 1,
5865 /* this dainlink has playback support */
5866 .ignore_pmdown_time = 1,
5867 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5868 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5869 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5870 .name = MSM_DAILINK_NAME(Media2),
5871 .stream_name = "MultiMedia2",
5872 .cpu_dai_name = "MultiMedia2",
5873 .platform_name = "msm-pcm-dsp.0",
5874 .dynamic = 1,
5875 .dpcm_playback = 1,
5876 .dpcm_capture = 1,
5877 .codec_dai_name = "snd-soc-dummy-dai",
5878 .codec_name = "snd-soc-dummy",
5879 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5880 SND_SOC_DPCM_TRIGGER_POST},
5881 .ignore_suspend = 1,
5882 /* this dainlink has playback support */
5883 .ignore_pmdown_time = 1,
5884 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5885 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5886 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5887 .name = "VoiceMMode1",
5888 .stream_name = "VoiceMMode1",
5889 .cpu_dai_name = "VoiceMMode1",
5890 .platform_name = "msm-pcm-voice",
5891 .dynamic = 1,
5892 .dpcm_playback = 1,
5893 .dpcm_capture = 1,
5894 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5895 SND_SOC_DPCM_TRIGGER_POST},
5896 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5897 .ignore_suspend = 1,
5898 .ignore_pmdown_time = 1,
5899 .codec_dai_name = "snd-soc-dummy-dai",
5900 .codec_name = "snd-soc-dummy",
5901 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5902 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5903 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5904 .name = "MSM VoIP",
5905 .stream_name = "VoIP",
5906 .cpu_dai_name = "VoIP",
5907 .platform_name = "msm-voip-dsp",
5908 .dynamic = 1,
5909 .dpcm_playback = 1,
5910 .dpcm_capture = 1,
5911 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5912 SND_SOC_DPCM_TRIGGER_POST},
5913 .codec_dai_name = "snd-soc-dummy-dai",
5914 .codec_name = "snd-soc-dummy",
5915 .ignore_suspend = 1,
5916 /* this dainlink has playback support */
5917 .ignore_pmdown_time = 1,
5918 .id = MSM_FRONTEND_DAI_VOIP,
5919 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5920 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5921 .name = MSM_DAILINK_NAME(ULL),
5922 .stream_name = "MultiMedia3",
5923 .cpu_dai_name = "MultiMedia3",
5924 .platform_name = "msm-pcm-dsp.2",
5925 .dynamic = 1,
5926 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5927 .dpcm_playback = 1,
5928 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5929 SND_SOC_DPCM_TRIGGER_POST},
5930 .codec_dai_name = "snd-soc-dummy-dai",
5931 .codec_name = "snd-soc-dummy",
5932 .ignore_suspend = 1,
5933 /* this dainlink has playback support */
5934 .ignore_pmdown_time = 1,
5935 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5936 },
5937 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5938 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5939 .name = "SLIMBUS_0 Hostless",
5940 .stream_name = "SLIMBUS_0 Hostless",
5941 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5942 .platform_name = "msm-pcm-hostless",
5943 .dynamic = 1,
5944 .dpcm_playback = 1,
5945 .dpcm_capture = 1,
5946 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5947 SND_SOC_DPCM_TRIGGER_POST},
5948 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5949 .ignore_suspend = 1,
5950 /* this dailink has playback support */
5951 .ignore_pmdown_time = 1,
5952 .codec_dai_name = "snd-soc-dummy-dai",
5953 .codec_name = "snd-soc-dummy",
5954 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5955 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5956 .name = "MSM AFE-PCM RX",
5957 .stream_name = "AFE-PROXY RX",
5958 .cpu_dai_name = "msm-dai-q6-dev.241",
5959 .codec_name = "msm-stub-codec.1",
5960 .codec_dai_name = "msm-stub-rx",
5961 .platform_name = "msm-pcm-afe",
5962 .dpcm_playback = 1,
5963 .ignore_suspend = 1,
5964 /* this dainlink has playback support */
5965 .ignore_pmdown_time = 1,
5966 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5967 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5968 .name = "MSM AFE-PCM TX",
5969 .stream_name = "AFE-PROXY TX",
5970 .cpu_dai_name = "msm-dai-q6-dev.240",
5971 .codec_name = "msm-stub-codec.1",
5972 .codec_dai_name = "msm-stub-tx",
5973 .platform_name = "msm-pcm-afe",
5974 .dpcm_capture = 1,
5975 .ignore_suspend = 1,
5976 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5977 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5978 .name = MSM_DAILINK_NAME(Compress1),
5979 .stream_name = "Compress1",
5980 .cpu_dai_name = "MultiMedia4",
5981 .platform_name = "msm-compress-dsp",
5982 .dynamic = 1,
5983 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5984 .dpcm_playback = 1,
5985 .dpcm_capture = 1,
5986 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5987 SND_SOC_DPCM_TRIGGER_POST},
5988 .codec_dai_name = "snd-soc-dummy-dai",
5989 .codec_name = "snd-soc-dummy",
5990 .ignore_suspend = 1,
5991 .ignore_pmdown_time = 1,
5992 /* this dainlink has playback support */
5993 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5994 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5995 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5996 .name = "AUXPCM Hostless",
5997 .stream_name = "AUXPCM Hostless",
5998 .cpu_dai_name = "AUXPCM_HOSTLESS",
5999 .platform_name = "msm-pcm-hostless",
6000 .dynamic = 1,
6001 .dpcm_playback = 1,
6002 .dpcm_capture = 1,
6003 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6004 SND_SOC_DPCM_TRIGGER_POST},
6005 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6006 .ignore_suspend = 1,
6007 /* this dainlink has playback support */
6008 .ignore_pmdown_time = 1,
6009 .codec_dai_name = "snd-soc-dummy-dai",
6010 .codec_name = "snd-soc-dummy",
6011 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6012 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6013 .name = "SLIMBUS_1 Hostless",
6014 .stream_name = "SLIMBUS_1 Hostless",
6015 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6016 .platform_name = "msm-pcm-hostless",
6017 .dynamic = 1,
6018 .dpcm_playback = 1,
6019 .dpcm_capture = 1,
6020 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6021 SND_SOC_DPCM_TRIGGER_POST},
6022 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6023 .ignore_suspend = 1,
6024 /* this dailink has playback support */
6025 .ignore_pmdown_time = 1,
6026 .codec_dai_name = "snd-soc-dummy-dai",
6027 .codec_name = "snd-soc-dummy",
6028 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6029 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6030 .name = "SLIMBUS_3 Hostless",
6031 .stream_name = "SLIMBUS_3 Hostless",
6032 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6033 .platform_name = "msm-pcm-hostless",
6034 .dynamic = 1,
6035 .dpcm_playback = 1,
6036 .dpcm_capture = 1,
6037 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6038 SND_SOC_DPCM_TRIGGER_POST},
6039 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6040 .ignore_suspend = 1,
6041 /* this dailink has playback support */
6042 .ignore_pmdown_time = 1,
6043 .codec_dai_name = "snd-soc-dummy-dai",
6044 .codec_name = "snd-soc-dummy",
6045 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6046 {/* hw:x,12 */
6047 .name = "SLIMBUS_7 Hostless",
6048 .stream_name = "SLIMBUS_7 Hostless",
6049 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6050 .platform_name = "msm-pcm-hostless",
6051 .dynamic = 1,
6052 .dpcm_playback = 1,
6053 .dpcm_capture = 1,
6054 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6055 SND_SOC_DPCM_TRIGGER_POST},
6056 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6057 .ignore_suspend = 1,
6058 /* this dailink has playback support */
6059 .ignore_pmdown_time = 1,
6060 .codec_dai_name = "snd-soc-dummy-dai",
6061 .codec_name = "snd-soc-dummy",
6062 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6063 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6064 .name = MSM_DAILINK_NAME(LowLatency),
6065 .stream_name = "MultiMedia5",
6066 .cpu_dai_name = "MultiMedia5",
6067 .platform_name = "msm-pcm-dsp.1",
6068 .dynamic = 1,
6069 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6070 .dpcm_playback = 1,
6071 .dpcm_capture = 1,
6072 .codec_dai_name = "snd-soc-dummy-dai",
6073 .codec_name = "snd-soc-dummy",
6074 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6075 SND_SOC_DPCM_TRIGGER_POST},
6076 .ignore_suspend = 1,
6077 /* this dainlink has playback support */
6078 .ignore_pmdown_time = 1,
6079 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6080 .ops = &msm_fe_qos_ops,
6081 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6082 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6083 .name = "Listen 1 Audio Service",
6084 .stream_name = "Listen 1 Audio Service",
6085 .cpu_dai_name = "LSM1",
6086 .platform_name = "msm-lsm-client",
6087 .dynamic = 1,
6088 .dpcm_capture = 1,
6089 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6090 SND_SOC_DPCM_TRIGGER_POST },
6091 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6092 .ignore_suspend = 1,
6093 .codec_dai_name = "snd-soc-dummy-dai",
6094 .codec_name = "snd-soc-dummy",
6095 .id = MSM_FRONTEND_DAI_LSM1,
6096 },
6097 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6098 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6099 .name = MSM_DAILINK_NAME(Compress2),
6100 .stream_name = "Compress2",
6101 .cpu_dai_name = "MultiMedia7",
6102 .platform_name = "msm-compress-dsp",
6103 .dynamic = 1,
6104 .dpcm_playback = 1,
6105 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6106 SND_SOC_DPCM_TRIGGER_POST},
6107 .codec_dai_name = "snd-soc-dummy-dai",
6108 .codec_name = "snd-soc-dummy",
6109 .ignore_suspend = 1,
6110 .ignore_pmdown_time = 1,
6111 /* this dainlink has playback support */
6112 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6113 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6114 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6115 .name = MSM_DAILINK_NAME(MultiMedia10),
6116 .stream_name = "MultiMedia10",
6117 .cpu_dai_name = "MultiMedia10",
6118 .platform_name = "msm-pcm-dsp.1",
6119 .dynamic = 1,
6120 .dpcm_playback = 1,
6121 .dpcm_capture = 1,
6122 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6123 SND_SOC_DPCM_TRIGGER_POST},
6124 .codec_dai_name = "snd-soc-dummy-dai",
6125 .codec_name = "snd-soc-dummy",
6126 .ignore_suspend = 1,
6127 .ignore_pmdown_time = 1,
6128 /* this dainlink has playback support */
6129 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6130 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6131 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6132 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6133 .stream_name = "MM_NOIRQ",
6134 .cpu_dai_name = "MultiMedia8",
6135 .platform_name = "msm-pcm-dsp-noirq",
6136 .dynamic = 1,
6137 .dpcm_playback = 1,
6138 .dpcm_capture = 1,
6139 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6140 SND_SOC_DPCM_TRIGGER_POST},
6141 .codec_dai_name = "snd-soc-dummy-dai",
6142 .codec_name = "snd-soc-dummy",
6143 .ignore_suspend = 1,
6144 .ignore_pmdown_time = 1,
6145 /* this dainlink has playback support */
6146 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6147 .ops = &msm_fe_qos_ops,
6148 },
6149 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6150 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6151 .name = "HDMI_RX_HOSTLESS",
6152 .stream_name = "HDMI_RX_HOSTLESS",
6153 .cpu_dai_name = "HDMI_HOSTLESS",
6154 .platform_name = "msm-pcm-hostless",
6155 .dynamic = 1,
6156 .dpcm_playback = 1,
6157 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6158 SND_SOC_DPCM_TRIGGER_POST},
6159 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6160 .ignore_suspend = 1,
6161 .ignore_pmdown_time = 1,
6162 .codec_dai_name = "snd-soc-dummy-dai",
6163 .codec_name = "snd-soc-dummy",
6164 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6165 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6166 .name = "VoiceMMode2",
6167 .stream_name = "VoiceMMode2",
6168 .cpu_dai_name = "VoiceMMode2",
6169 .platform_name = "msm-pcm-voice",
6170 .dynamic = 1,
6171 .dpcm_playback = 1,
6172 .dpcm_capture = 1,
6173 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6174 SND_SOC_DPCM_TRIGGER_POST},
6175 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6176 .ignore_suspend = 1,
6177 .ignore_pmdown_time = 1,
6178 .codec_dai_name = "snd-soc-dummy-dai",
6179 .codec_name = "snd-soc-dummy",
6180 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6181 },
6182 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6183 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6184 .name = "Listen 2 Audio Service",
6185 .stream_name = "Listen 2 Audio Service",
6186 .cpu_dai_name = "LSM2",
6187 .platform_name = "msm-lsm-client",
6188 .dynamic = 1,
6189 .dpcm_capture = 1,
6190 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6191 SND_SOC_DPCM_TRIGGER_POST },
6192 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6193 .ignore_suspend = 1,
6194 .codec_dai_name = "snd-soc-dummy-dai",
6195 .codec_name = "snd-soc-dummy",
6196 .id = MSM_FRONTEND_DAI_LSM2,
6197 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6198 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6199 .name = "Listen 3 Audio Service",
6200 .stream_name = "Listen 3 Audio Service",
6201 .cpu_dai_name = "LSM3",
6202 .platform_name = "msm-lsm-client",
6203 .dynamic = 1,
6204 .dpcm_capture = 1,
6205 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6206 SND_SOC_DPCM_TRIGGER_POST },
6207 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6208 .ignore_suspend = 1,
6209 .codec_dai_name = "snd-soc-dummy-dai",
6210 .codec_name = "snd-soc-dummy",
6211 .id = MSM_FRONTEND_DAI_LSM3,
6212 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6213 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6214 .name = "Listen 4 Audio Service",
6215 .stream_name = "Listen 4 Audio Service",
6216 .cpu_dai_name = "LSM4",
6217 .platform_name = "msm-lsm-client",
6218 .dynamic = 1,
6219 .dpcm_capture = 1,
6220 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6221 SND_SOC_DPCM_TRIGGER_POST },
6222 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6223 .ignore_suspend = 1,
6224 .codec_dai_name = "snd-soc-dummy-dai",
6225 .codec_name = "snd-soc-dummy",
6226 .id = MSM_FRONTEND_DAI_LSM4,
6227 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6228 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6229 .name = "Listen 5 Audio Service",
6230 .stream_name = "Listen 5 Audio Service",
6231 .cpu_dai_name = "LSM5",
6232 .platform_name = "msm-lsm-client",
6233 .dynamic = 1,
6234 .dpcm_capture = 1,
6235 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6236 SND_SOC_DPCM_TRIGGER_POST },
6237 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6238 .ignore_suspend = 1,
6239 .codec_dai_name = "snd-soc-dummy-dai",
6240 .codec_name = "snd-soc-dummy",
6241 .id = MSM_FRONTEND_DAI_LSM5,
6242 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6243 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6244 .name = "Listen 6 Audio Service",
6245 .stream_name = "Listen 6 Audio Service",
6246 .cpu_dai_name = "LSM6",
6247 .platform_name = "msm-lsm-client",
6248 .dynamic = 1,
6249 .dpcm_capture = 1,
6250 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6251 SND_SOC_DPCM_TRIGGER_POST },
6252 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6253 .ignore_suspend = 1,
6254 .codec_dai_name = "snd-soc-dummy-dai",
6255 .codec_name = "snd-soc-dummy",
6256 .id = MSM_FRONTEND_DAI_LSM6,
6257 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6258 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6259 .name = "Listen 7 Audio Service",
6260 .stream_name = "Listen 7 Audio Service",
6261 .cpu_dai_name = "LSM7",
6262 .platform_name = "msm-lsm-client",
6263 .dynamic = 1,
6264 .dpcm_capture = 1,
6265 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6266 SND_SOC_DPCM_TRIGGER_POST },
6267 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6268 .ignore_suspend = 1,
6269 .codec_dai_name = "snd-soc-dummy-dai",
6270 .codec_name = "snd-soc-dummy",
6271 .id = MSM_FRONTEND_DAI_LSM7,
6272 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6273 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6274 .name = "Listen 8 Audio Service",
6275 .stream_name = "Listen 8 Audio Service",
6276 .cpu_dai_name = "LSM8",
6277 .platform_name = "msm-lsm-client",
6278 .dynamic = 1,
6279 .dpcm_capture = 1,
6280 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6281 SND_SOC_DPCM_TRIGGER_POST },
6282 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6283 .ignore_suspend = 1,
6284 .codec_dai_name = "snd-soc-dummy-dai",
6285 .codec_name = "snd-soc-dummy",
6286 .id = MSM_FRONTEND_DAI_LSM8,
6287 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6288 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6289 .name = MSM_DAILINK_NAME(Media9),
6290 .stream_name = "MultiMedia9",
6291 .cpu_dai_name = "MultiMedia9",
6292 .platform_name = "msm-pcm-dsp.0",
6293 .dynamic = 1,
6294 .dpcm_playback = 1,
6295 .dpcm_capture = 1,
6296 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6297 SND_SOC_DPCM_TRIGGER_POST},
6298 .codec_dai_name = "snd-soc-dummy-dai",
6299 .codec_name = "snd-soc-dummy",
6300 .ignore_suspend = 1,
6301 /* this dainlink has playback support */
6302 .ignore_pmdown_time = 1,
6303 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6304 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6305 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6306 .name = MSM_DAILINK_NAME(Compress4),
6307 .stream_name = "Compress4",
6308 .cpu_dai_name = "MultiMedia11",
6309 .platform_name = "msm-compress-dsp",
6310 .dynamic = 1,
6311 .dpcm_playback = 1,
6312 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6313 SND_SOC_DPCM_TRIGGER_POST},
6314 .codec_dai_name = "snd-soc-dummy-dai",
6315 .codec_name = "snd-soc-dummy",
6316 .ignore_suspend = 1,
6317 .ignore_pmdown_time = 1,
6318 /* this dainlink has playback support */
6319 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6320 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6321 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6322 .name = MSM_DAILINK_NAME(Compress5),
6323 .stream_name = "Compress5",
6324 .cpu_dai_name = "MultiMedia12",
6325 .platform_name = "msm-compress-dsp",
6326 .dynamic = 1,
6327 .dpcm_playback = 1,
6328 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6329 SND_SOC_DPCM_TRIGGER_POST},
6330 .codec_dai_name = "snd-soc-dummy-dai",
6331 .codec_name = "snd-soc-dummy",
6332 .ignore_suspend = 1,
6333 .ignore_pmdown_time = 1,
6334 /* this dainlink has playback support */
6335 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6336 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6337 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6338 .name = MSM_DAILINK_NAME(Compress6),
6339 .stream_name = "Compress6",
6340 .cpu_dai_name = "MultiMedia13",
6341 .platform_name = "msm-compress-dsp",
6342 .dynamic = 1,
6343 .dpcm_playback = 1,
6344 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6345 SND_SOC_DPCM_TRIGGER_POST},
6346 .codec_dai_name = "snd-soc-dummy-dai",
6347 .codec_name = "snd-soc-dummy",
6348 .ignore_suspend = 1,
6349 .ignore_pmdown_time = 1,
6350 /* this dainlink has playback support */
6351 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6352 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6353 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6354 .name = MSM_DAILINK_NAME(Compress7),
6355 .stream_name = "Compress7",
6356 .cpu_dai_name = "MultiMedia14",
6357 .platform_name = "msm-compress-dsp",
6358 .dynamic = 1,
6359 .dpcm_playback = 1,
6360 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6361 SND_SOC_DPCM_TRIGGER_POST},
6362 .codec_dai_name = "snd-soc-dummy-dai",
6363 .codec_name = "snd-soc-dummy",
6364 .ignore_suspend = 1,
6365 .ignore_pmdown_time = 1,
6366 /* this dainlink has playback support */
6367 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6368 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6369 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6370 .name = MSM_DAILINK_NAME(Compress8),
6371 .stream_name = "Compress8",
6372 .cpu_dai_name = "MultiMedia15",
6373 .platform_name = "msm-compress-dsp",
6374 .dynamic = 1,
6375 .dpcm_playback = 1,
6376 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6377 SND_SOC_DPCM_TRIGGER_POST},
6378 .codec_dai_name = "snd-soc-dummy-dai",
6379 .codec_name = "snd-soc-dummy",
6380 .ignore_suspend = 1,
6381 .ignore_pmdown_time = 1,
6382 /* this dainlink has playback support */
6383 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6384 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6385 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6386 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6387 .stream_name = "MM_NOIRQ_2",
6388 .cpu_dai_name = "MultiMedia16",
6389 .platform_name = "msm-pcm-dsp-noirq",
6390 .dynamic = 1,
6391 .dpcm_playback = 1,
6392 .dpcm_capture = 1,
6393 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6394 SND_SOC_DPCM_TRIGGER_POST},
6395 .codec_dai_name = "snd-soc-dummy-dai",
6396 .codec_name = "snd-soc-dummy",
6397 .ignore_suspend = 1,
6398 .ignore_pmdown_time = 1,
6399 /* this dainlink has playback support */
6400 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6401 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6402 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6403 .name = "SLIMBUS_8 Hostless",
6404 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6405 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6406 .platform_name = "msm-pcm-hostless",
6407 .dynamic = 1,
6408 .dpcm_capture = 1,
6409 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6410 SND_SOC_DPCM_TRIGGER_POST},
6411 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6412 .ignore_suspend = 1,
6413 .codec_dai_name = "snd-soc-dummy-dai",
6414 .codec_name = "snd-soc-dummy",
6415 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6416 {/* hw:x,35 */
6417 .name = "CDC_DMA Hostless",
6418 .stream_name = "CDC_DMA Hostless",
6419 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6420 .platform_name = "msm-pcm-hostless",
6421 .dynamic = 1,
6422 .dpcm_playback = 1,
6423 .dpcm_capture = 1,
6424 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6425 SND_SOC_DPCM_TRIGGER_POST},
6426 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6427 .ignore_suspend = 1,
6428 /* this dailink has playback support */
6429 .ignore_pmdown_time = 1,
6430 .codec_dai_name = "snd-soc-dummy-dai",
6431 .codec_name = "snd-soc-dummy",
6432 },
6433 {/* hw:x,36 */
6434 .name = "TX3_CDC_DMA Hostless",
6435 .stream_name = "TX3_CDC_DMA Hostless",
6436 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6437 .platform_name = "msm-pcm-hostless",
6438 .dynamic = 1,
6439 .dpcm_capture = 1,
6440 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6441 SND_SOC_DPCM_TRIGGER_POST},
6442 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6443 .ignore_suspend = 1,
6444 .codec_dai_name = "snd-soc-dummy-dai",
6445 .codec_name = "snd-soc-dummy",
6446 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6447};
6448
6449
6450static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6451 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6452 .name = LPASS_BE_SLIMBUS_4_TX,
6453 .stream_name = "Slimbus4 Capture",
6454 .cpu_dai_name = "msm-dai-q6-dev.16393",
6455 .platform_name = "msm-pcm-hostless",
6456 .codec_name = "tavil_codec",
6457 .codec_dai_name = "tavil_vifeedback",
6458 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6459 .be_hw_params_fixup = msm_be_hw_params_fixup,
6460 .ops = &msm_be_ops,
6461 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6462 .ignore_suspend = 1,
6463 },
6464 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6465 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6466 .name = "SLIMBUS_2 Hostless Playback",
6467 .stream_name = "SLIMBUS_2 Hostless Playback",
6468 .cpu_dai_name = "msm-dai-q6-dev.16388",
6469 .platform_name = "msm-pcm-hostless",
6470 .codec_name = "tavil_codec",
6471 .codec_dai_name = "tavil_rx2",
6472 .ignore_suspend = 1,
6473 .ignore_pmdown_time = 1,
6474 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6475 .ops = &msm_slimbus_2_be_ops,
6476 },
6477 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6478 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6479 .name = "SLIMBUS_2 Hostless Capture",
6480 .stream_name = "SLIMBUS_2 Hostless Capture",
6481 .cpu_dai_name = "msm-dai-q6-dev.16389",
6482 .platform_name = "msm-pcm-hostless",
6483 .codec_name = "tavil_codec",
6484 .codec_dai_name = "tavil_tx2",
6485 .ignore_suspend = 1,
6486 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6487 .ops = &msm_slimbus_2_be_ops,
6488 },
6489};
6490
6491static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6492 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6493 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6494 .stream_name = "WSA CDC DMA0 Capture",
6495 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6496 .platform_name = "msm-pcm-hostless",
6497 .codec_name = "bolero_codec",
6498 .codec_dai_name = "wsa_macro_vifeedback",
6499 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6500 .be_hw_params_fixup = msm_be_hw_params_fixup,
6501 .ignore_suspend = 1,
6502 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6503 .ops = &msm_cdc_dma_be_ops,
6504 },
6505};
6506
6507static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6508 {
6509 .name = MSM_DAILINK_NAME(ASM Loopback),
6510 .stream_name = "MultiMedia6",
6511 .cpu_dai_name = "MultiMedia6",
6512 .platform_name = "msm-pcm-loopback",
6513 .dynamic = 1,
6514 .dpcm_playback = 1,
6515 .dpcm_capture = 1,
6516 .codec_dai_name = "snd-soc-dummy-dai",
6517 .codec_name = "snd-soc-dummy",
6518 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6519 SND_SOC_DPCM_TRIGGER_POST},
6520 .ignore_suspend = 1,
6521 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6522 .ignore_pmdown_time = 1,
6523 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6524 },
6525 {
6526 .name = "USB Audio Hostless",
6527 .stream_name = "USB Audio Hostless",
6528 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6529 .platform_name = "msm-pcm-hostless",
6530 .dynamic = 1,
6531 .dpcm_playback = 1,
6532 .dpcm_capture = 1,
6533 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6534 SND_SOC_DPCM_TRIGGER_POST},
6535 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6536 .ignore_suspend = 1,
6537 .ignore_pmdown_time = 1,
6538 .codec_dai_name = "snd-soc-dummy-dai",
6539 .codec_name = "snd-soc-dummy",
6540 },
6541};
6542
6543static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6544 /* Backend AFE DAI Links */
6545 {
6546 .name = LPASS_BE_AFE_PCM_RX,
6547 .stream_name = "AFE Playback",
6548 .cpu_dai_name = "msm-dai-q6-dev.224",
6549 .platform_name = "msm-pcm-routing",
6550 .codec_name = "msm-stub-codec.1",
6551 .codec_dai_name = "msm-stub-rx",
6552 .no_pcm = 1,
6553 .dpcm_playback = 1,
6554 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6555 .be_hw_params_fixup = msm_be_hw_params_fixup,
6556 /* this dainlink has playback support */
6557 .ignore_pmdown_time = 1,
6558 .ignore_suspend = 1,
6559 },
6560 {
6561 .name = LPASS_BE_AFE_PCM_TX,
6562 .stream_name = "AFE Capture",
6563 .cpu_dai_name = "msm-dai-q6-dev.225",
6564 .platform_name = "msm-pcm-routing",
6565 .codec_name = "msm-stub-codec.1",
6566 .codec_dai_name = "msm-stub-tx",
6567 .no_pcm = 1,
6568 .dpcm_capture = 1,
6569 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6570 .be_hw_params_fixup = msm_be_hw_params_fixup,
6571 .ignore_suspend = 1,
6572 },
6573 /* Incall Record Uplink BACK END DAI Link */
6574 {
6575 .name = LPASS_BE_INCALL_RECORD_TX,
6576 .stream_name = "Voice Uplink Capture",
6577 .cpu_dai_name = "msm-dai-q6-dev.32772",
6578 .platform_name = "msm-pcm-routing",
6579 .codec_name = "msm-stub-codec.1",
6580 .codec_dai_name = "msm-stub-tx",
6581 .no_pcm = 1,
6582 .dpcm_capture = 1,
6583 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6584 .be_hw_params_fixup = msm_be_hw_params_fixup,
6585 .ignore_suspend = 1,
6586 },
6587 /* Incall Record Downlink BACK END DAI Link */
6588 {
6589 .name = LPASS_BE_INCALL_RECORD_RX,
6590 .stream_name = "Voice Downlink Capture",
6591 .cpu_dai_name = "msm-dai-q6-dev.32771",
6592 .platform_name = "msm-pcm-routing",
6593 .codec_name = "msm-stub-codec.1",
6594 .codec_dai_name = "msm-stub-tx",
6595 .no_pcm = 1,
6596 .dpcm_capture = 1,
6597 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6598 .be_hw_params_fixup = msm_be_hw_params_fixup,
6599 .ignore_suspend = 1,
6600 },
6601 /* Incall Music BACK END DAI Link */
6602 {
6603 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6604 .stream_name = "Voice Farend Playback",
6605 .cpu_dai_name = "msm-dai-q6-dev.32773",
6606 .platform_name = "msm-pcm-routing",
6607 .codec_name = "msm-stub-codec.1",
6608 .codec_dai_name = "msm-stub-rx",
6609 .no_pcm = 1,
6610 .dpcm_playback = 1,
6611 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6612 .be_hw_params_fixup = msm_be_hw_params_fixup,
6613 .ignore_suspend = 1,
6614 .ignore_pmdown_time = 1,
6615 },
6616 /* Incall Music 2 BACK END DAI Link */
6617 {
6618 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6619 .stream_name = "Voice2 Farend Playback",
6620 .cpu_dai_name = "msm-dai-q6-dev.32770",
6621 .platform_name = "msm-pcm-routing",
6622 .codec_name = "msm-stub-codec.1",
6623 .codec_dai_name = "msm-stub-rx",
6624 .no_pcm = 1,
6625 .dpcm_playback = 1,
6626 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6627 .be_hw_params_fixup = msm_be_hw_params_fixup,
6628 .ignore_suspend = 1,
6629 .ignore_pmdown_time = 1,
6630 },
6631 {
6632 .name = LPASS_BE_USB_AUDIO_RX,
6633 .stream_name = "USB Audio Playback",
6634 .cpu_dai_name = "msm-dai-q6-dev.28672",
6635 .platform_name = "msm-pcm-routing",
6636 .codec_name = "msm-stub-codec.1",
6637 .codec_dai_name = "msm-stub-rx",
6638 .no_pcm = 1,
6639 .dpcm_playback = 1,
6640 .id = MSM_BACKEND_DAI_USB_RX,
6641 .be_hw_params_fixup = msm_be_hw_params_fixup,
6642 .ignore_pmdown_time = 1,
6643 .ignore_suspend = 1,
6644 },
6645 {
6646 .name = LPASS_BE_USB_AUDIO_TX,
6647 .stream_name = "USB Audio Capture",
6648 .cpu_dai_name = "msm-dai-q6-dev.28673",
6649 .platform_name = "msm-pcm-routing",
6650 .codec_name = "msm-stub-codec.1",
6651 .codec_dai_name = "msm-stub-tx",
6652 .no_pcm = 1,
6653 .dpcm_capture = 1,
6654 .id = MSM_BACKEND_DAI_USB_TX,
6655 .be_hw_params_fixup = msm_be_hw_params_fixup,
6656 .ignore_suspend = 1,
6657 },
6658 {
6659 .name = LPASS_BE_PRI_TDM_RX_0,
6660 .stream_name = "Primary TDM0 Playback",
6661 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6662 .platform_name = "msm-pcm-routing",
6663 .codec_name = "msm-stub-codec.1",
6664 .codec_dai_name = "msm-stub-rx",
6665 .no_pcm = 1,
6666 .dpcm_playback = 1,
6667 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6668 .be_hw_params_fixup = msm_be_hw_params_fixup,
6669 .ops = &sm6150_tdm_be_ops,
6670 .ignore_suspend = 1,
6671 .ignore_pmdown_time = 1,
6672 },
6673 {
6674 .name = LPASS_BE_PRI_TDM_TX_0,
6675 .stream_name = "Primary TDM0 Capture",
6676 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6677 .platform_name = "msm-pcm-routing",
6678 .codec_name = "msm-stub-codec.1",
6679 .codec_dai_name = "msm-stub-tx",
6680 .no_pcm = 1,
6681 .dpcm_capture = 1,
6682 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6683 .be_hw_params_fixup = msm_be_hw_params_fixup,
6684 .ops = &sm6150_tdm_be_ops,
6685 .ignore_suspend = 1,
6686 },
6687 {
6688 .name = LPASS_BE_SEC_TDM_RX_0,
6689 .stream_name = "Secondary TDM0 Playback",
6690 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6691 .platform_name = "msm-pcm-routing",
6692 .codec_name = "msm-stub-codec.1",
6693 .codec_dai_name = "msm-stub-rx",
6694 .no_pcm = 1,
6695 .dpcm_playback = 1,
6696 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6697 .be_hw_params_fixup = msm_be_hw_params_fixup,
6698 .ops = &sm6150_tdm_be_ops,
6699 .ignore_suspend = 1,
6700 .ignore_pmdown_time = 1,
6701 },
6702 {
6703 .name = LPASS_BE_SEC_TDM_TX_0,
6704 .stream_name = "Secondary TDM0 Capture",
6705 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6706 .platform_name = "msm-pcm-routing",
6707 .codec_name = "msm-stub-codec.1",
6708 .codec_dai_name = "msm-stub-tx",
6709 .no_pcm = 1,
6710 .dpcm_capture = 1,
6711 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6712 .be_hw_params_fixup = msm_be_hw_params_fixup,
6713 .ops = &sm6150_tdm_be_ops,
6714 .ignore_suspend = 1,
6715 },
6716 {
6717 .name = LPASS_BE_TERT_TDM_RX_0,
6718 .stream_name = "Tertiary TDM0 Playback",
6719 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6720 .platform_name = "msm-pcm-routing",
6721 .codec_name = "msm-stub-codec.1",
6722 .codec_dai_name = "msm-stub-rx",
6723 .no_pcm = 1,
6724 .dpcm_playback = 1,
6725 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6726 .be_hw_params_fixup = msm_be_hw_params_fixup,
6727 .ops = &sm6150_tdm_be_ops,
6728 .ignore_suspend = 1,
6729 .ignore_pmdown_time = 1,
6730 },
6731 {
6732 .name = LPASS_BE_TERT_TDM_TX_0,
6733 .stream_name = "Tertiary TDM0 Capture",
6734 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6735 .platform_name = "msm-pcm-routing",
6736 .codec_name = "msm-stub-codec.1",
6737 .codec_dai_name = "msm-stub-tx",
6738 .no_pcm = 1,
6739 .dpcm_capture = 1,
6740 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6741 .be_hw_params_fixup = msm_be_hw_params_fixup,
6742 .ops = &sm6150_tdm_be_ops,
6743 .ignore_suspend = 1,
6744 },
6745 {
6746 .name = LPASS_BE_QUAT_TDM_RX_0,
6747 .stream_name = "Quaternary TDM0 Playback",
6748 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6749 .platform_name = "msm-pcm-routing",
6750 .codec_name = "msm-stub-codec.1",
6751 .codec_dai_name = "msm-stub-rx",
6752 .no_pcm = 1,
6753 .dpcm_playback = 1,
6754 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6755 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6756 .ops = &sm6150_tdm_be_ops,
6757 .ignore_suspend = 1,
6758 .ignore_pmdown_time = 1,
6759 },
6760 {
6761 .name = LPASS_BE_QUAT_TDM_TX_0,
6762 .stream_name = "Quaternary TDM0 Capture",
6763 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6764 .platform_name = "msm-pcm-routing",
6765 .codec_name = "msm-stub-codec.1",
6766 .codec_dai_name = "msm-stub-tx",
6767 .no_pcm = 1,
6768 .dpcm_capture = 1,
6769 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6770 .be_hw_params_fixup = msm_be_hw_params_fixup,
6771 .ops = &sm6150_tdm_be_ops,
6772 .ignore_suspend = 1,
6773 },
6774};
6775
6776static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6777 {
6778 .name = LPASS_BE_SLIMBUS_0_RX,
6779 .stream_name = "Slimbus Playback",
6780 .cpu_dai_name = "msm-dai-q6-dev.16384",
6781 .platform_name = "msm-pcm-routing",
6782 .codec_name = "tavil_codec",
6783 .codec_dai_name = "tavil_rx1",
6784 .no_pcm = 1,
6785 .dpcm_playback = 1,
6786 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6787 .init = &msm_audrx_tavil_init,
6788 .be_hw_params_fixup = msm_be_hw_params_fixup,
6789 /* this dainlink has playback support */
6790 .ignore_pmdown_time = 1,
6791 .ignore_suspend = 1,
6792 .ops = &msm_be_ops,
6793 },
6794 {
6795 .name = LPASS_BE_SLIMBUS_0_TX,
6796 .stream_name = "Slimbus Capture",
6797 .cpu_dai_name = "msm-dai-q6-dev.16385",
6798 .platform_name = "msm-pcm-routing",
6799 .codec_name = "tavil_codec",
6800 .codec_dai_name = "tavil_tx1",
6801 .no_pcm = 1,
6802 .dpcm_capture = 1,
6803 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6804 .be_hw_params_fixup = msm_be_hw_params_fixup,
6805 .ignore_suspend = 1,
6806 .ops = &msm_be_ops,
6807 },
6808 {
6809 .name = LPASS_BE_SLIMBUS_1_RX,
6810 .stream_name = "Slimbus1 Playback",
6811 .cpu_dai_name = "msm-dai-q6-dev.16386",
6812 .platform_name = "msm-pcm-routing",
6813 .codec_name = "tavil_codec",
6814 .codec_dai_name = "tavil_rx1",
6815 .no_pcm = 1,
6816 .dpcm_playback = 1,
6817 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6818 .be_hw_params_fixup = msm_be_hw_params_fixup,
6819 .ops = &msm_be_ops,
6820 /* dai link has playback support */
6821 .ignore_pmdown_time = 1,
6822 .ignore_suspend = 1,
6823 },
6824 {
6825 .name = LPASS_BE_SLIMBUS_1_TX,
6826 .stream_name = "Slimbus1 Capture",
6827 .cpu_dai_name = "msm-dai-q6-dev.16387",
6828 .platform_name = "msm-pcm-routing",
6829 .codec_name = "tavil_codec",
6830 .codec_dai_name = "tavil_tx3",
6831 .no_pcm = 1,
6832 .dpcm_capture = 1,
6833 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6834 .be_hw_params_fixup = msm_be_hw_params_fixup,
6835 .ops = &msm_be_ops,
6836 .ignore_suspend = 1,
6837 },
6838 {
6839 .name = LPASS_BE_SLIMBUS_2_RX,
6840 .stream_name = "Slimbus2 Playback",
6841 .cpu_dai_name = "msm-dai-q6-dev.16388",
6842 .platform_name = "msm-pcm-routing",
6843 .codec_name = "tavil_codec",
6844 .codec_dai_name = "tavil_rx2",
6845 .no_pcm = 1,
6846 .dpcm_playback = 1,
6847 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6848 .be_hw_params_fixup = msm_be_hw_params_fixup,
6849 .ops = &msm_be_ops,
6850 .ignore_pmdown_time = 1,
6851 .ignore_suspend = 1,
6852 },
6853 {
6854 .name = LPASS_BE_SLIMBUS_3_RX,
6855 .stream_name = "Slimbus3 Playback",
6856 .cpu_dai_name = "msm-dai-q6-dev.16390",
6857 .platform_name = "msm-pcm-routing",
6858 .codec_name = "tavil_codec",
6859 .codec_dai_name = "tavil_rx1",
6860 .no_pcm = 1,
6861 .dpcm_playback = 1,
6862 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6863 .be_hw_params_fixup = msm_be_hw_params_fixup,
6864 .ops = &msm_be_ops,
6865 /* dai link has playback support */
6866 .ignore_pmdown_time = 1,
6867 .ignore_suspend = 1,
6868 },
6869 {
6870 .name = LPASS_BE_SLIMBUS_3_TX,
6871 .stream_name = "Slimbus3 Capture",
6872 .cpu_dai_name = "msm-dai-q6-dev.16391",
6873 .platform_name = "msm-pcm-routing",
6874 .codec_name = "tavil_codec",
6875 .codec_dai_name = "tavil_tx1",
6876 .no_pcm = 1,
6877 .dpcm_capture = 1,
6878 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6879 .be_hw_params_fixup = msm_be_hw_params_fixup,
6880 .ops = &msm_be_ops,
6881 .ignore_suspend = 1,
6882 },
6883 {
6884 .name = LPASS_BE_SLIMBUS_4_RX,
6885 .stream_name = "Slimbus4 Playback",
6886 .cpu_dai_name = "msm-dai-q6-dev.16392",
6887 .platform_name = "msm-pcm-routing",
6888 .codec_name = "tavil_codec",
6889 .codec_dai_name = "tavil_rx1",
6890 .no_pcm = 1,
6891 .dpcm_playback = 1,
6892 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6893 .be_hw_params_fixup = msm_be_hw_params_fixup,
6894 .ops = &msm_be_ops,
6895 /* dai link has playback support */
6896 .ignore_pmdown_time = 1,
6897 .ignore_suspend = 1,
6898 },
6899 {
6900 .name = LPASS_BE_SLIMBUS_5_RX,
6901 .stream_name = "Slimbus5 Playback",
6902 .cpu_dai_name = "msm-dai-q6-dev.16394",
6903 .platform_name = "msm-pcm-routing",
6904 .codec_name = "tavil_codec",
6905 .codec_dai_name = "tavil_rx3",
6906 .no_pcm = 1,
6907 .dpcm_playback = 1,
6908 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6909 .be_hw_params_fixup = msm_be_hw_params_fixup,
6910 .ops = &msm_be_ops,
6911 /* dai link has playback support */
6912 .ignore_pmdown_time = 1,
6913 .ignore_suspend = 1,
6914 },
6915 /* MAD BE */
6916 {
6917 .name = LPASS_BE_SLIMBUS_5_TX,
6918 .stream_name = "Slimbus5 Capture",
6919 .cpu_dai_name = "msm-dai-q6-dev.16395",
6920 .platform_name = "msm-pcm-routing",
6921 .codec_name = "tavil_codec",
6922 .codec_dai_name = "tavil_mad1",
6923 .no_pcm = 1,
6924 .dpcm_capture = 1,
6925 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6926 .be_hw_params_fixup = msm_be_hw_params_fixup,
6927 .ops = &msm_be_ops,
6928 .ignore_suspend = 1,
6929 },
6930 {
6931 .name = LPASS_BE_SLIMBUS_6_RX,
6932 .stream_name = "Slimbus6 Playback",
6933 .cpu_dai_name = "msm-dai-q6-dev.16396",
6934 .platform_name = "msm-pcm-routing",
6935 .codec_name = "tavil_codec",
6936 .codec_dai_name = "tavil_rx4",
6937 .no_pcm = 1,
6938 .dpcm_playback = 1,
6939 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6940 .be_hw_params_fixup = msm_be_hw_params_fixup,
6941 .ops = &msm_be_ops,
6942 /* dai link has playback support */
6943 .ignore_pmdown_time = 1,
6944 .ignore_suspend = 1,
6945 },
6946 /* Slimbus VI Recording */
6947 {
6948 .name = LPASS_BE_SLIMBUS_TX_VI,
6949 .stream_name = "Slimbus4 Capture",
6950 .cpu_dai_name = "msm-dai-q6-dev.16393",
6951 .platform_name = "msm-pcm-routing",
6952 .codec_name = "tavil_codec",
6953 .codec_dai_name = "tavil_vifeedback",
6954 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6955 .be_hw_params_fixup = msm_be_hw_params_fixup,
6956 .ops = &msm_be_ops,
6957 .ignore_suspend = 1,
6958 .no_pcm = 1,
6959 .dpcm_capture = 1,
6960 },
6961};
6962
6963static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6964 {
6965 .name = LPASS_BE_SLIMBUS_7_RX,
6966 .stream_name = "Slimbus7 Playback",
6967 .cpu_dai_name = "msm-dai-q6-dev.16398",
6968 .platform_name = "msm-pcm-routing",
6969 .codec_name = "btfmslim_slave",
6970 /* BT codec driver determines capabilities based on
6971 * dai name, bt codecdai name should always contains
6972 * supported usecase information
6973 */
6974 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6975 .no_pcm = 1,
6976 .dpcm_playback = 1,
6977 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6978 .be_hw_params_fixup = msm_be_hw_params_fixup,
6979 .ops = &msm_wcn_ops,
6980 /* dai link has playback support */
6981 .ignore_pmdown_time = 1,
6982 .ignore_suspend = 1,
6983 },
6984 {
6985 .name = LPASS_BE_SLIMBUS_7_TX,
6986 .stream_name = "Slimbus7 Capture",
6987 .cpu_dai_name = "msm-dai-q6-dev.16399",
6988 .platform_name = "msm-pcm-routing",
6989 .codec_name = "btfmslim_slave",
6990 .codec_dai_name = "btfm_bt_sco_slim_tx",
6991 .no_pcm = 1,
6992 .dpcm_capture = 1,
6993 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6994 .be_hw_params_fixup = msm_be_hw_params_fixup,
6995 .ops = &msm_wcn_ops,
6996 .ignore_suspend = 1,
6997 },
6998 {
6999 .name = LPASS_BE_SLIMBUS_8_TX,
7000 .stream_name = "Slimbus8 Capture",
7001 .cpu_dai_name = "msm-dai-q6-dev.16401",
7002 .platform_name = "msm-pcm-routing",
7003 .codec_name = "btfmslim_slave",
7004 .codec_dai_name = "btfm_fm_slim_tx",
7005 .no_pcm = 1,
7006 .dpcm_capture = 1,
7007 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
7008 .be_hw_params_fixup = msm_be_hw_params_fixup,
7009 .init = &msm_wcn_init,
7010 .ops = &msm_wcn_ops,
7011 .ignore_suspend = 1,
7012 },
7013};
7014
7015static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
7016 /* DISP PORT BACK END DAI Link */
7017 {
7018 .name = LPASS_BE_DISPLAY_PORT,
7019 .stream_name = "Display Port Playback",
7020 .cpu_dai_name = "msm-dai-q6-dp.24608",
7021 .platform_name = "msm-pcm-routing",
7022 .codec_name = "msm-ext-disp-audio-codec-rx",
7023 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
7024 .no_pcm = 1,
7025 .dpcm_playback = 1,
7026 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
7027 .be_hw_params_fixup = msm_be_hw_params_fixup,
7028 .ignore_pmdown_time = 1,
7029 .ignore_suspend = 1,
7030 },
7031};
7032
7033static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7034 {
7035 .name = LPASS_BE_PRI_MI2S_RX,
7036 .stream_name = "Primary MI2S Playback",
7037 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7038 .platform_name = "msm-pcm-routing",
7039 .codec_name = "msm-stub-codec.1",
7040 .codec_dai_name = "msm-stub-rx",
7041 .no_pcm = 1,
7042 .dpcm_playback = 1,
7043 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7044 .be_hw_params_fixup = msm_be_hw_params_fixup,
7045 .ops = &msm_mi2s_be_ops,
7046 .ignore_suspend = 1,
7047 .ignore_pmdown_time = 1,
7048 },
7049 {
7050 .name = LPASS_BE_PRI_MI2S_TX,
7051 .stream_name = "Primary MI2S Capture",
7052 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7053 .platform_name = "msm-pcm-routing",
7054 .codec_name = "msm-stub-codec.1",
7055 .codec_dai_name = "msm-stub-tx",
7056 .no_pcm = 1,
7057 .dpcm_capture = 1,
7058 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7059 .be_hw_params_fixup = msm_be_hw_params_fixup,
7060 .ops = &msm_mi2s_be_ops,
7061 .ignore_suspend = 1,
7062 },
7063 {
7064 .name = LPASS_BE_SEC_MI2S_RX,
7065 .stream_name = "Secondary MI2S Playback",
7066 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7067 .platform_name = "msm-pcm-routing",
7068 .codec_name = "msm-stub-codec.1",
7069 .codec_dai_name = "msm-stub-rx",
7070 .no_pcm = 1,
7071 .dpcm_playback = 1,
7072 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7073 .be_hw_params_fixup = msm_be_hw_params_fixup,
7074 .ops = &msm_mi2s_be_ops,
7075 .ignore_suspend = 1,
7076 .ignore_pmdown_time = 1,
7077 },
7078 {
7079 .name = LPASS_BE_SEC_MI2S_TX,
7080 .stream_name = "Secondary MI2S Capture",
7081 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7082 .platform_name = "msm-pcm-routing",
7083 .codec_name = "msm-stub-codec.1",
7084 .codec_dai_name = "msm-stub-tx",
7085 .no_pcm = 1,
7086 .dpcm_capture = 1,
7087 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7088 .be_hw_params_fixup = msm_be_hw_params_fixup,
7089 .ops = &msm_mi2s_be_ops,
7090 .ignore_suspend = 1,
7091 },
7092 {
7093 .name = LPASS_BE_TERT_MI2S_RX,
7094 .stream_name = "Tertiary MI2S Playback",
7095 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7096 .platform_name = "msm-pcm-routing",
7097 .codec_name = "msm-stub-codec.1",
7098 .codec_dai_name = "msm-stub-rx",
7099 .no_pcm = 1,
7100 .dpcm_playback = 1,
7101 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7102 .be_hw_params_fixup = msm_be_hw_params_fixup,
7103 .ops = &msm_mi2s_be_ops,
7104 .ignore_suspend = 1,
7105 .ignore_pmdown_time = 1,
7106 },
7107 {
7108 .name = LPASS_BE_TERT_MI2S_TX,
7109 .stream_name = "Tertiary MI2S Capture",
7110 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7111 .platform_name = "msm-pcm-routing",
7112 .codec_name = "msm-stub-codec.1",
7113 .codec_dai_name = "msm-stub-tx",
7114 .no_pcm = 1,
7115 .dpcm_capture = 1,
7116 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7117 .be_hw_params_fixup = msm_be_hw_params_fixup,
7118 .ops = &msm_mi2s_be_ops,
7119 .ignore_suspend = 1,
7120 },
7121 {
7122 .name = LPASS_BE_QUAT_MI2S_RX,
7123 .stream_name = "Quaternary MI2S Playback",
7124 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7125 .platform_name = "msm-pcm-routing",
7126 .codec_name = "msm-stub-codec.1",
7127 .codec_dai_name = "msm-stub-rx",
7128 .no_pcm = 1,
7129 .dpcm_playback = 1,
7130 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7131 .be_hw_params_fixup = msm_be_hw_params_fixup,
7132 .ops = &msm_mi2s_be_ops,
7133 .ignore_suspend = 1,
7134 .ignore_pmdown_time = 1,
7135 },
7136 {
7137 .name = LPASS_BE_QUAT_MI2S_TX,
7138 .stream_name = "Quaternary MI2S Capture",
7139 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7140 .platform_name = "msm-pcm-routing",
7141 .codec_name = "msm-stub-codec.1",
7142 .codec_dai_name = "msm-stub-tx",
7143 .no_pcm = 1,
7144 .dpcm_capture = 1,
7145 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7146 .be_hw_params_fixup = msm_be_hw_params_fixup,
7147 .ops = &msm_mi2s_be_ops,
7148 .ignore_suspend = 1,
7149 },
7150 {
7151 .name = LPASS_BE_QUIN_MI2S_RX,
7152 .stream_name = "Quinary MI2S Playback",
7153 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7154 .platform_name = "msm-pcm-routing",
7155 .codec_name = "msm-stub-codec.1",
7156 .codec_dai_name = "msm-stub-rx",
7157 .no_pcm = 1,
7158 .dpcm_playback = 1,
7159 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7160 .be_hw_params_fixup = msm_be_hw_params_fixup,
7161 .ops = &msm_mi2s_be_ops,
7162 .ignore_suspend = 1,
7163 .ignore_pmdown_time = 1,
7164 },
7165 {
7166 .name = LPASS_BE_QUIN_MI2S_TX,
7167 .stream_name = "Quinary MI2S Capture",
7168 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7169 .platform_name = "msm-pcm-routing",
7170 .codec_name = "msm-stub-codec.1",
7171 .codec_dai_name = "msm-stub-tx",
7172 .no_pcm = 1,
7173 .dpcm_capture = 1,
7174 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7175 .be_hw_params_fixup = msm_be_hw_params_fixup,
7176 .ops = &msm_mi2s_be_ops,
7177 .ignore_suspend = 1,
7178 },
7179
7180};
7181
7182static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7183 /* Primary AUX PCM Backend DAI Links */
7184 {
7185 .name = LPASS_BE_AUXPCM_RX,
7186 .stream_name = "AUX PCM Playback",
7187 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7188 .platform_name = "msm-pcm-routing",
7189 .codec_name = "msm-stub-codec.1",
7190 .codec_dai_name = "msm-stub-rx",
7191 .no_pcm = 1,
7192 .dpcm_playback = 1,
7193 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7194 .be_hw_params_fixup = msm_be_hw_params_fixup,
7195 .ignore_pmdown_time = 1,
7196 .ignore_suspend = 1,
7197 },
7198 {
7199 .name = LPASS_BE_AUXPCM_TX,
7200 .stream_name = "AUX PCM Capture",
7201 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7202 .platform_name = "msm-pcm-routing",
7203 .codec_name = "msm-stub-codec.1",
7204 .codec_dai_name = "msm-stub-tx",
7205 .no_pcm = 1,
7206 .dpcm_capture = 1,
7207 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7208 .be_hw_params_fixup = msm_be_hw_params_fixup,
7209 .ignore_suspend = 1,
7210 },
7211 /* Secondary AUX PCM Backend DAI Links */
7212 {
7213 .name = LPASS_BE_SEC_AUXPCM_RX,
7214 .stream_name = "Sec AUX PCM Playback",
7215 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7216 .platform_name = "msm-pcm-routing",
7217 .codec_name = "msm-stub-codec.1",
7218 .codec_dai_name = "msm-stub-rx",
7219 .no_pcm = 1,
7220 .dpcm_playback = 1,
7221 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7222 .be_hw_params_fixup = msm_be_hw_params_fixup,
7223 .ignore_pmdown_time = 1,
7224 .ignore_suspend = 1,
7225 },
7226 {
7227 .name = LPASS_BE_SEC_AUXPCM_TX,
7228 .stream_name = "Sec AUX PCM Capture",
7229 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7230 .platform_name = "msm-pcm-routing",
7231 .codec_name = "msm-stub-codec.1",
7232 .codec_dai_name = "msm-stub-tx",
7233 .no_pcm = 1,
7234 .dpcm_capture = 1,
7235 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7236 .be_hw_params_fixup = msm_be_hw_params_fixup,
7237 .ignore_suspend = 1,
7238 },
7239 /* Tertiary AUX PCM Backend DAI Links */
7240 {
7241 .name = LPASS_BE_TERT_AUXPCM_RX,
7242 .stream_name = "Tert AUX PCM Playback",
7243 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7244 .platform_name = "msm-pcm-routing",
7245 .codec_name = "msm-stub-codec.1",
7246 .codec_dai_name = "msm-stub-rx",
7247 .no_pcm = 1,
7248 .dpcm_playback = 1,
7249 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7250 .be_hw_params_fixup = msm_be_hw_params_fixup,
7251 .ignore_suspend = 1,
7252 },
7253 {
7254 .name = LPASS_BE_TERT_AUXPCM_TX,
7255 .stream_name = "Tert AUX PCM Capture",
7256 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7257 .platform_name = "msm-pcm-routing",
7258 .codec_name = "msm-stub-codec.1",
7259 .codec_dai_name = "msm-stub-tx",
7260 .no_pcm = 1,
7261 .dpcm_capture = 1,
7262 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7263 .be_hw_params_fixup = msm_be_hw_params_fixup,
7264 .ignore_suspend = 1,
7265 },
7266 /* Quaternary AUX PCM Backend DAI Links */
7267 {
7268 .name = LPASS_BE_QUAT_AUXPCM_RX,
7269 .stream_name = "Quat AUX PCM Playback",
7270 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7271 .platform_name = "msm-pcm-routing",
7272 .codec_name = "msm-stub-codec.1",
7273 .codec_dai_name = "msm-stub-rx",
7274 .no_pcm = 1,
7275 .dpcm_playback = 1,
7276 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7277 .be_hw_params_fixup = msm_be_hw_params_fixup,
7278 .ignore_pmdown_time = 1,
7279 .ignore_suspend = 1,
7280 },
7281 {
7282 .name = LPASS_BE_QUAT_AUXPCM_TX,
7283 .stream_name = "Quat AUX PCM Capture",
7284 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7285 .platform_name = "msm-pcm-routing",
7286 .codec_name = "msm-stub-codec.1",
7287 .codec_dai_name = "msm-stub-tx",
7288 .no_pcm = 1,
7289 .dpcm_capture = 1,
7290 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7291 .be_hw_params_fixup = msm_be_hw_params_fixup,
7292 .ignore_suspend = 1,
7293 },
7294 /* Quinary AUX PCM Backend DAI Links */
7295 {
7296 .name = LPASS_BE_QUIN_AUXPCM_RX,
7297 .stream_name = "Quin AUX PCM Playback",
7298 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7299 .platform_name = "msm-pcm-routing",
7300 .codec_name = "msm-stub-codec.1",
7301 .codec_dai_name = "msm-stub-rx",
7302 .no_pcm = 1,
7303 .dpcm_playback = 1,
7304 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7305 .be_hw_params_fixup = msm_be_hw_params_fixup,
7306 .ignore_pmdown_time = 1,
7307 .ignore_suspend = 1,
7308 },
7309 {
7310 .name = LPASS_BE_QUIN_AUXPCM_TX,
7311 .stream_name = "Quin AUX PCM Capture",
7312 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7313 .platform_name = "msm-pcm-routing",
7314 .codec_name = "msm-stub-codec.1",
7315 .codec_dai_name = "msm-stub-tx",
7316 .no_pcm = 1,
7317 .dpcm_capture = 1,
7318 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7319 .be_hw_params_fixup = msm_be_hw_params_fixup,
7320 .ignore_suspend = 1,
7321 },
7322};
7323
7324static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7325 /* WSA CDC DMA Backend DAI Links */
7326 {
7327 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7328 .stream_name = "WSA CDC DMA0 Playback",
7329 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7330 .platform_name = "msm-pcm-routing",
7331 .codec_name = "bolero_codec",
7332 .codec_dai_name = "wsa_macro_rx1",
7333 .no_pcm = 1,
7334 .dpcm_playback = 1,
7335 .init = &msm_int_audrx_init,
7336 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7337 .be_hw_params_fixup = msm_be_hw_params_fixup,
7338 .ignore_pmdown_time = 1,
7339 .ignore_suspend = 1,
7340 .ops = &msm_cdc_dma_be_ops,
7341 },
7342 {
7343 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7344 .stream_name = "WSA CDC DMA1 Playback",
7345 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7346 .platform_name = "msm-pcm-routing",
7347 .codec_name = "bolero_codec",
7348 .codec_dai_name = "wsa_macro_rx_mix",
7349 .no_pcm = 1,
7350 .dpcm_playback = 1,
7351 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7352 .be_hw_params_fixup = msm_be_hw_params_fixup,
7353 .ignore_pmdown_time = 1,
7354 .ignore_suspend = 1,
7355 .ops = &msm_cdc_dma_be_ops,
7356 },
7357 {
7358 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7359 .stream_name = "WSA CDC DMA1 Capture",
7360 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7361 .platform_name = "msm-pcm-routing",
7362 .codec_name = "bolero_codec",
7363 .codec_dai_name = "wsa_macro_echo",
7364 .no_pcm = 1,
7365 .dpcm_capture = 1,
7366 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7367 .be_hw_params_fixup = msm_be_hw_params_fixup,
7368 .ignore_suspend = 1,
7369 .ops = &msm_cdc_dma_be_ops,
7370 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7371};
7372
7373static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7374 /* RX CDC DMA Backend DAI Links */
7375 {
7376 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7377 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7378 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7379 .platform_name = "msm-pcm-routing",
7380 .codec_name = "bolero_codec",
7381 .codec_dai_name = "rx_macro_rx1",
7382 .no_pcm = 1,
7383 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7384 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7385 .be_hw_params_fixup = msm_be_hw_params_fixup,
7386 .ignore_pmdown_time = 1,
7387 .ignore_suspend = 1,
7388 .ops = &msm_cdc_dma_be_ops,
7389 },
7390 {
7391 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7392 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7393 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7394 .platform_name = "msm-pcm-routing",
7395 .codec_name = "bolero_codec",
7396 .codec_dai_name = "rx_macro_rx2",
7397 .no_pcm = 1,
7398 .dpcm_playback = 1,
7399 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7400 .be_hw_params_fixup = msm_be_hw_params_fixup,
7401 .ignore_pmdown_time = 1,
7402 .ignore_suspend = 1,
7403 .ops = &msm_cdc_dma_be_ops,
7404 },
7405 {
7406 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7407 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7408 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7409 .platform_name = "msm-pcm-routing",
7410 .codec_name = "bolero_codec",
7411 .codec_dai_name = "rx_macro_rx3",
7412 .no_pcm = 1,
7413 .dpcm_playback = 1,
7414 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7415 .be_hw_params_fixup = msm_be_hw_params_fixup,
7416 .ignore_pmdown_time = 1,
7417 .ignore_suspend = 1,
7418 .ops = &msm_cdc_dma_be_ops,
7419 },
7420 {
7421 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7422 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7423 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7424 .platform_name = "msm-pcm-routing",
7425 .codec_name = "bolero_codec",
7426 .codec_dai_name = "rx_macro_rx4",
7427 .no_pcm = 1,
7428 .dpcm_playback = 1,
7429 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7430 .be_hw_params_fixup = msm_be_hw_params_fixup,
7431 .ignore_pmdown_time = 1,
7432 .ignore_suspend = 1,
7433 .ops = &msm_cdc_dma_be_ops,
7434 },
7435 /* TX CDC DMA Backend DAI Links */
7436 {
7437 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7438 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7439 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7440 .platform_name = "msm-pcm-routing",
7441 .codec_name = "bolero_codec",
7442 .codec_dai_name = "tx_macro_tx1",
7443 .no_pcm = 1,
7444 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7445 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7446 .be_hw_params_fixup = msm_be_hw_params_fixup,
7447 .ignore_suspend = 1,
7448 .ops = &msm_cdc_dma_be_ops,
7449 },
7450 {
7451 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7452 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7453 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7454 .platform_name = "msm-pcm-routing",
7455 .codec_name = "bolero_codec",
7456 .codec_dai_name = "tx_macro_tx2",
7457 .no_pcm = 1,
7458 .dpcm_capture = 1,
7459 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7460 .be_hw_params_fixup = msm_be_hw_params_fixup,
7461 .ignore_suspend = 1,
7462 .ops = &msm_cdc_dma_be_ops,
7463 },
7464};
7465
7466static struct snd_soc_dai_link msm_sm6150_dai_links[
7467 ARRAY_SIZE(msm_common_dai_links) +
7468 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7469 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7470 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7471 ARRAY_SIZE(msm_common_be_dai_links) +
7472 ARRAY_SIZE(msm_tavil_be_dai_links) +
7473 ARRAY_SIZE(msm_wcn_be_dai_links) +
7474 ARRAY_SIZE(ext_disp_be_dai_link) +
7475 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7476 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7477 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7478 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7479
7480static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7481{
7482 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7483 struct snd_soc_pcm_runtime *rtd;
7484 int ret = 0;
7485 void *mbhc_calibration;
7486
7487 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7488 if (!rtd) {
7489 dev_err(card->dev,
7490 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7491 __func__, be_dl_name);
7492 ret = -EINVAL;
7493 goto err_pcm_runtime;
7494 }
7495
7496 mbhc_calibration = def_wcd_mbhc_cal();
7497 if (!mbhc_calibration) {
7498 ret = -ENOMEM;
7499 goto err_mbhc_cal;
7500 }
7501 wcd_mbhc_cfg.calibration = mbhc_calibration;
7502 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7503 if (ret) {
7504 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7505 __func__, ret);
7506 goto err_hs_detect;
7507 }
7508 return 0;
7509
7510err_hs_detect:
7511 kfree(mbhc_calibration);
7512err_mbhc_cal:
7513err_pcm_runtime:
7514 return ret;
7515}
7516
7517
7518static int msm_populate_dai_link_component_of_node(
7519 struct snd_soc_card *card)
7520{
7521 int i, index, ret = 0;
7522 struct device *cdev = card->dev;
7523 struct snd_soc_dai_link *dai_link = card->dai_link;
7524 struct device_node *np;
7525
7526 if (!cdev) {
7527 pr_err("%s: Sound card device memory NULL\n", __func__);
7528 return -ENODEV;
7529 }
7530
7531 for (i = 0; i < card->num_links; i++) {
7532 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7533 continue;
7534
7535 /* populate platform_of_node for snd card dai links */
7536 if (dai_link[i].platform_name &&
7537 !dai_link[i].platform_of_node) {
7538 index = of_property_match_string(cdev->of_node,
7539 "asoc-platform-names",
7540 dai_link[i].platform_name);
7541 if (index < 0) {
7542 pr_err("%s: No match found for platform name: %s\n",
7543 __func__, dai_link[i].platform_name);
7544 ret = index;
7545 goto err;
7546 }
7547 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7548 index);
7549 if (!np) {
7550 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7551 __func__, dai_link[i].platform_name,
7552 index);
7553 ret = -ENODEV;
7554 goto err;
7555 }
7556 dai_link[i].platform_of_node = np;
7557 dai_link[i].platform_name = NULL;
7558 }
7559
7560 /* populate cpu_of_node for snd card dai links */
7561 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7562 index = of_property_match_string(cdev->of_node,
7563 "asoc-cpu-names",
7564 dai_link[i].cpu_dai_name);
7565 if (index >= 0) {
7566 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7567 index);
7568 if (!np) {
7569 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7570 __func__,
7571 dai_link[i].cpu_dai_name);
7572 ret = -ENODEV;
7573 goto err;
7574 }
7575 dai_link[i].cpu_of_node = np;
7576 dai_link[i].cpu_dai_name = NULL;
7577 }
7578 }
7579
7580 /* populate codec_of_node for snd card dai links */
7581 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7582 index = of_property_match_string(cdev->of_node,
7583 "asoc-codec-names",
7584 dai_link[i].codec_name);
7585 if (index < 0)
7586 continue;
7587 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7588 index);
7589 if (!np) {
7590 pr_err("%s: retrieving phandle for codec %s failed\n",
7591 __func__, dai_link[i].codec_name);
7592 ret = -ENODEV;
7593 goto err;
7594 }
7595 dai_link[i].codec_of_node = np;
7596 dai_link[i].codec_name = NULL;
7597 }
7598 }
7599
7600err:
7601 return ret;
7602}
7603
7604static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7605{
7606 int ret = 0;
7607 struct snd_soc_codec *codec = rtd->codec;
7608
7609 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7610 ARRAY_SIZE(msm_tavil_snd_controls));
7611 if (ret < 0) {
7612 dev_err(codec->dev,
7613 "%s: add_codec_controls failed, err = %d\n",
7614 __func__, ret);
7615 return ret;
7616 }
7617
7618 return 0;
7619}
7620
7621static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7622 struct snd_pcm_hw_params *params)
7623{
7624 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7625 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7626
7627 int ret = 0;
7628 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7629 151};
7630 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7631 134, 135, 136, 137, 138, 139,
7632 140, 141, 142, 143};
7633
7634 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7635 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7636 slim_rx_cfg[SLIM_RX_0].channels,
7637 rx_ch);
7638 if (ret < 0)
7639 pr_err("%s: RX failed to set cpu chan map error %d\n",
7640 __func__, ret);
7641 } else {
7642 ret = snd_soc_dai_set_channel_map(cpu_dai,
7643 slim_tx_cfg[SLIM_TX_0].channels,
7644 tx_ch, 0, 0);
7645 if (ret < 0)
7646 pr_err("%s: TX failed to set cpu chan map error %d\n",
7647 __func__, ret);
7648 }
7649
7650 return ret;
7651}
7652
7653static struct snd_soc_ops msm_stub_be_ops = {
7654 .hw_params = msm_snd_stub_hw_params,
7655};
7656
7657static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7658
7659 /* FrontEnd DAI Links */
7660 {
7661 .name = "MSMSTUB Media1",
7662 .stream_name = "MultiMedia1",
7663 .cpu_dai_name = "MultiMedia1",
7664 .platform_name = "msm-pcm-dsp.0",
7665 .dynamic = 1,
7666 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7667 .dpcm_playback = 1,
7668 .dpcm_capture = 1,
7669 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7670 SND_SOC_DPCM_TRIGGER_POST},
7671 .codec_dai_name = "snd-soc-dummy-dai",
7672 .codec_name = "snd-soc-dummy",
7673 .ignore_suspend = 1,
7674 /* this dainlink has playback support */
7675 .ignore_pmdown_time = 1,
7676 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7677 },
7678};
7679
7680static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7681
7682 /* Backend DAI Links */
7683 {
7684 .name = LPASS_BE_SLIMBUS_0_RX,
7685 .stream_name = "Slimbus Playback",
7686 .cpu_dai_name = "msm-dai-q6-dev.16384",
7687 .platform_name = "msm-pcm-routing",
7688 .codec_name = "msm-stub-codec.1",
7689 .codec_dai_name = "msm-stub-rx",
7690 .no_pcm = 1,
7691 .dpcm_playback = 1,
7692 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7693 .init = &msm_audrx_stub_init,
7694 .be_hw_params_fixup = msm_be_hw_params_fixup,
7695 .ignore_pmdown_time = 1, /* dai link has playback support */
7696 .ignore_suspend = 1,
7697 .ops = &msm_stub_be_ops,
7698 },
7699 {
7700 .name = LPASS_BE_SLIMBUS_0_TX,
7701 .stream_name = "Slimbus Capture",
7702 .cpu_dai_name = "msm-dai-q6-dev.16385",
7703 .platform_name = "msm-pcm-routing",
7704 .codec_name = "msm-stub-codec.1",
7705 .codec_dai_name = "msm-stub-tx",
7706 .no_pcm = 1,
7707 .dpcm_capture = 1,
7708 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7709 .be_hw_params_fixup = msm_be_hw_params_fixup,
7710 .ignore_suspend = 1,
7711 .ops = &msm_stub_be_ops,
7712 },
7713};
7714
7715static struct snd_soc_dai_link msm_stub_dai_links[
7716 ARRAY_SIZE(msm_stub_fe_dai_links) +
7717 ARRAY_SIZE(msm_stub_be_dai_links)];
7718
7719struct snd_soc_card snd_soc_card_stub_msm = {
7720 .name = "sm6150-stub-snd-card",
7721};
7722
7723static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7724 { .compatible = "qcom,sm6150-asoc-snd",
7725 .data = "codec"},
7726 { .compatible = "qcom,sm6150-asoc-snd-stub",
7727 .data = "stub_codec"},
7728 {},
7729};
7730
7731static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7732{
7733 struct snd_soc_card *card = NULL;
7734 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7735 int total_links = 0, rc = 0;
7736 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7737 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7738 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7739 const struct of_device_id *match;
7740
7741 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7742 if (!match) {
7743 dev_err(dev, "%s: No DT match found for sound card\n",
7744 __func__);
7745 return NULL;
7746 }
7747
7748 if (!strcmp(match->data, "codec")) {
7749 card = &snd_soc_card_sm6150_msm;
7750 memcpy(msm_sm6150_dai_links + total_links,
7751 msm_common_dai_links,
7752 sizeof(msm_common_dai_links));
7753
7754 total_links += ARRAY_SIZE(msm_common_dai_links);
7755
7756 memcpy(msm_sm6150_dai_links + total_links,
7757 msm_common_misc_fe_dai_links,
7758 sizeof(msm_common_misc_fe_dai_links));
7759
7760 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7761
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7762 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7763 &tavil_codec);
7764 if (rc) {
7765 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7766 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7767 } else {
7768 if (tavil_codec) {
7769 card->late_probe =
7770 msm_snd_card_tavil_late_probe;
7771 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7772 msm_tavil_fe_dai_links,
7773 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7774 total_links +=
7775 ARRAY_SIZE(msm_tavil_fe_dai_links);
7776 }
7777 }
7778
7779 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7780 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7781 msm_bolero_fe_dai_links,
7782 sizeof(msm_bolero_fe_dai_links));
7783 total_links +=
7784 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7785 }
7786
7787 memcpy(msm_sm6150_dai_links + total_links,
7788 msm_common_be_dai_links,
7789 sizeof(msm_common_be_dai_links));
7790
7791 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7792
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7793 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7794 memcpy(msm_sm6150_dai_links + total_links,
7795 msm_tavil_be_dai_links,
7796 sizeof(msm_tavil_be_dai_links));
7797 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7798 } else {
7799 memcpy(msm_sm6150_dai_links + total_links,
7800 msm_wsa_cdc_dma_be_dai_links,
7801 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7802 total_links +=
7803 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7804
7805 memcpy(msm_sm6150_dai_links + total_links,
7806 msm_rx_tx_cdc_dma_be_dai_links,
7807 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7808 total_links +=
7809 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7810 }
7811
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7812 rc = of_property_read_u32(dev->of_node,
7813 "qcom,ext-disp-audio-rx",
7814 &ext_disp_audio_intf);
7815 if (rc) {
7816 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7817 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7818 } else {
Rohit kumare5a1d4f2018-09-17 11:36:25 +0530[diff] [blame]7819 if (ext_disp_audio_intf) {
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7820 memcpy(msm_sm6150_dai_links + total_links,
7821 ext_disp_be_dai_link,
7822 sizeof(ext_disp_be_dai_link));
7823 total_links +=
7824 ARRAY_SIZE(ext_disp_be_dai_link);
7825 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7826 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7827
7828 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7829 &mi2s_audio_intf);
7830 if (rc) {
7831 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7832 __func__);
7833 } else {
7834 if (mi2s_audio_intf) {
7835 memcpy(msm_sm6150_dai_links + total_links,
7836 msm_mi2s_be_dai_links,
7837 sizeof(msm_mi2s_be_dai_links));
7838 total_links +=
7839 ARRAY_SIZE(msm_mi2s_be_dai_links);
7840 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7841 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7842
7843
7844 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7845 &wcn_btfm_intf);
7846 if (rc) {
7847 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7848 __func__);
7849 } else {
7850 if (wcn_btfm_intf) {
7851 memcpy(msm_sm6150_dai_links + total_links,
7852 msm_wcn_be_dai_links,
7853 sizeof(msm_wcn_be_dai_links));
7854 total_links +=
7855 ARRAY_SIZE(msm_wcn_be_dai_links);
7856 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7857 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7858
7859 rc = of_property_read_u32(dev->of_node,
7860 "qcom,auxpcm-audio-intf",
7861 &auxpcm_audio_intf);
7862 if (rc) {
7863 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7864 __func__);
7865 } else {
7866 if (auxpcm_audio_intf) {
7867 memcpy(msm_sm6150_dai_links + total_links,
7868 msm_auxpcm_be_dai_links,
7869 sizeof(msm_auxpcm_be_dai_links));
7870 total_links +=
7871 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7872 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7873 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7874
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7875 dailink = msm_sm6150_dai_links;
7876 } else if (!strcmp(match->data, "stub_codec")) {
7877 card = &snd_soc_card_stub_msm;
7878
7879 memcpy(msm_stub_dai_links + total_links,
7880 msm_stub_fe_dai_links,
7881 sizeof(msm_stub_fe_dai_links));
7882 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7883
7884 memcpy(msm_stub_dai_links + total_links,
7885 msm_stub_be_dai_links,
7886 sizeof(msm_stub_be_dai_links));
7887 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7888
7889 dailink = msm_stub_dai_links;
7890 }
7891
7892 if (card) {
7893 card->dai_link = dailink;
7894 card->num_links = total_links;
7895 }
7896
7897 return card;
7898}
7899
7900static int msm_wsa881x_init(struct snd_soc_component *component)
7901{
7902 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7903 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7904 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7905 SPKR_L_BOOST, SPKR_L_VI};
7906 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7907 SPKR_R_BOOST, SPKR_R_VI};
7908 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7909 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7910 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7911 struct msm_asoc_mach_data *pdata;
7912 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7913 struct snd_card *card = component->card->snd_card;
7914 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7915 int ret = 0;
7916
7917 if (!codec) {
7918 pr_err("%s codec is NULL\n", __func__);
7919 return -EINVAL;
7920 }
7921
7922 dapm = snd_soc_codec_get_dapm(codec);
7923
7924 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7925 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
7926 __func__, codec->component.name);
7927 wsa881x_set_channel_map(codec, &spkleft_ports[0],
7928 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7929 &ch_rate[0], &spkleft_port_types[0]);
7930 if (dapm->component) {
7931 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7932 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7933 }
7934 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7935 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
7936 __func__, codec->component.name);
7937 wsa881x_set_channel_map(codec, &spkright_ports[0],
7938 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7939 &ch_rate[0], &spkright_port_types[0]);
7940 if (dapm->component) {
7941 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7942 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7943 }
7944 } else {
7945 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
7946 codec->component.name);
7947 ret = -EINVAL;
7948 goto err;
7949 }
7950 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7951 if (!pdata->codec_root) {
7952 entry = snd_info_create_subdir(card->module, "codecs",
7953 card->proc_root);
7954 if (!entry) {
7955 pr_err("%s: Cannot create codecs module entry\n",
7956 __func__);
7957 ret = 0;
7958 goto err;
7959 }
7960 pdata->codec_root = entry;
7961 }
7962 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7963 codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7964err:
7965 return ret;
7966}
7967
7968static int msm_aux_codec_init(struct snd_soc_component *component)
7969{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7970 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7971 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]7972 int ret = 0;
7973 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7974 struct snd_info_entry *entry;
7975 struct snd_card *card = component->card->snd_card;
7976 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7977
7978 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7979 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7980 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7981 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7982 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7983 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7984 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7985 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7986 snd_soc_dapm_sync(dapm);
7987
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7988 pdata = snd_soc_card_get_drvdata(component->card);
7989 if (!pdata->codec_root) {
7990 entry = snd_info_create_subdir(card->module, "codecs",
7991 card->proc_root);
7992 if (!entry) {
7993 pr_err("%s: Cannot create codecs module entry\n",
7994 __func__);
7995 ret = 0;
7996 goto codec_root_err;
7997 }
7998 pdata->codec_root = entry;
7999 }
8000 wcd937x_info_create_codec_entry(pdata->codec_root, codec);
8001codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]8002 mbhc_calibration = def_wcd_mbhc_cal();
8003 if (!mbhc_calibration) {
8004 return -ENOMEM;
8005 }
8006 wcd_mbhc_cfg.calibration = mbhc_calibration;
8007 ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
8008
8009 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8010}
8011
8012static int msm_init_aux_dev(struct platform_device *pdev,
8013 struct snd_soc_card *card)
8014{
8015 struct device_node *wsa_of_node;
8016 struct device_node *aux_codec_of_node;
8017 u32 wsa_max_devs;
8018 u32 wsa_dev_cnt;
8019 u32 codec_aux_dev_cnt = 0;
8020 int i;
8021 struct msm_wsa881x_dev_info *wsa881x_dev_info;
8022 struct aux_codec_dev_info *aux_cdc_dev_info;
8023 const char *auxdev_name_prefix[1];
8024 char *dev_name_str = NULL;
8025 int found = 0;
8026 int codecs_found = 0;
8027 int ret = 0;
8028
8029 /* Get maximum WSA device count for this platform */
8030 ret = of_property_read_u32(pdev->dev.of_node,
8031 "qcom,wsa-max-devs", &wsa_max_devs);
8032 if (ret) {
8033 dev_info(&pdev->dev,
8034 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8035 __func__, pdev->dev.of_node->full_name, ret);
8036 wsa_max_devs = 0;
8037 goto codec_aux_dev;
8038 }
8039 if (wsa_max_devs == 0) {
8040 dev_warn(&pdev->dev,
8041 "%s: Max WSA devices is 0 for this target?\n",
8042 __func__);
8043 goto codec_aux_dev;
8044 }
8045
8046 /* Get count of WSA device phandles for this platform */
8047 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8048 "qcom,wsa-devs", NULL);
8049 if (wsa_dev_cnt == -ENOENT) {
8050 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8051 __func__);
8052 goto err;
8053 } else if (wsa_dev_cnt <= 0) {
8054 dev_err(&pdev->dev,
8055 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8056 __func__, wsa_dev_cnt);
8057 ret = -EINVAL;
8058 goto err;
8059 }
8060
8061 /*
8062 * Expect total phandles count to be NOT less than maximum possible
8063 * WSA count. However, if it is less, then assign same value to
8064 * max count as well.
8065 */
8066 if (wsa_dev_cnt < wsa_max_devs) {
8067 dev_dbg(&pdev->dev,
8068 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8069 __func__, wsa_max_devs, wsa_dev_cnt);
8070 wsa_max_devs = wsa_dev_cnt;
8071 }
8072
8073 /* Make sure prefix string passed for each WSA device */
8074 ret = of_property_count_strings(pdev->dev.of_node,
8075 "qcom,wsa-aux-dev-prefix");
8076 if (ret != wsa_dev_cnt) {
8077 dev_err(&pdev->dev,
8078 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8079 __func__, wsa_dev_cnt, ret);
8080 ret = -EINVAL;
8081 goto err;
8082 }
8083
8084 /*
8085 * Alloc mem to store phandle and index info of WSA device, if already
8086 * registered with ALSA core
8087 */
8088 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8089 sizeof(struct msm_wsa881x_dev_info),
8090 GFP_KERNEL);
8091 if (!wsa881x_dev_info) {
8092 ret = -ENOMEM;
8093 goto err;
8094 }
8095
8096 /*
8097 * search and check whether all WSA devices are already
8098 * registered with ALSA core or not. If found a node, store
8099 * the node and the index in a local array of struct for later
8100 * use.
8101 */
8102 for (i = 0; i < wsa_dev_cnt; i++) {
8103 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8104 "qcom,wsa-devs", i);
8105 if (unlikely(!wsa_of_node)) {
8106 /* we should not be here */
8107 dev_err(&pdev->dev,
8108 "%s: wsa dev node is not present\n",
8109 __func__);
8110 ret = -EINVAL;
8111 goto err;
8112 }
8113 if (soc_find_component(wsa_of_node, NULL)) {
8114 /* WSA device registered with ALSA core */
8115 wsa881x_dev_info[found].of_node = wsa_of_node;
8116 wsa881x_dev_info[found].index = i;
8117 found++;
8118 if (found == wsa_max_devs)
8119 break;
8120 }
8121 }
8122
8123 if (found < wsa_max_devs) {
8124 dev_dbg(&pdev->dev,
8125 "%s: failed to find %d components. Found only %d\n",
8126 __func__, wsa_max_devs, found);
8127 return -EPROBE_DEFER;
8128 }
8129 dev_info(&pdev->dev,
8130 "%s: found %d wsa881x devices registered with ALSA core\n",
8131 __func__, found);
8132
8133codec_aux_dev:
8134 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8135 /* Get count of aux codec device phandles for this platform */
8136 codec_aux_dev_cnt = of_count_phandle_with_args(
8137 pdev->dev.of_node,
8138 "qcom,codec-aux-devs", NULL);
8139 if (codec_aux_dev_cnt == -ENOENT) {
8140 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8141 __func__);
8142 goto err;
8143 } else if (codec_aux_dev_cnt <= 0) {
8144 dev_err(&pdev->dev,
8145 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8146 __func__, codec_aux_dev_cnt);
8147 ret = -EINVAL;
8148 goto err;
8149 }
8150
8151 /*
8152 * Alloc mem to store phandle and index info of aux codec
8153 * if already registered with ALSA core
8154 */
8155 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8156 sizeof(struct aux_codec_dev_info),
8157 GFP_KERNEL);
8158 if (!aux_cdc_dev_info) {
8159 ret = -ENOMEM;
8160 goto err;
8161 }
8162
8163 /*
8164 * search and check whether all aux codecs are already
8165 * registered with ALSA core or not. If found a node, store
8166 * the node and the index in a local array of struct for later
8167 * use.
8168 */
8169 for (i = 0; i < codec_aux_dev_cnt; i++) {
8170 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8171 "qcom,codec-aux-devs", i);
8172 if (unlikely(!aux_codec_of_node)) {
8173 /* we should not be here */
8174 dev_err(&pdev->dev,
8175 "%s: aux codec dev node is not present\n",
8176 __func__);
8177 ret = -EINVAL;
8178 goto err;
8179 }
8180 if (soc_find_component(aux_codec_of_node, NULL)) {
8181 /* AUX codec registered with ALSA core */
8182 aux_cdc_dev_info[codecs_found].of_node =
8183 aux_codec_of_node;
8184 aux_cdc_dev_info[codecs_found].index = i;
8185 codecs_found++;
8186 }
8187 }
8188
8189 if (codecs_found < codec_aux_dev_cnt) {
8190 dev_dbg(&pdev->dev,
8191 "%s: failed to find %d components. Found only %d\n",
8192 __func__, codec_aux_dev_cnt, codecs_found);
8193 return -EPROBE_DEFER;
8194 }
8195 dev_info(&pdev->dev,
8196 "%s: found %d AUX codecs registered with ALSA core\n",
8197 __func__, codecs_found);
8198
8199 }
8200
8201 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8202 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8203
8204 /* Alloc array of AUX devs struct */
8205 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8206 sizeof(struct snd_soc_aux_dev),
8207 GFP_KERNEL);
8208 if (!msm_aux_dev) {
8209 ret = -ENOMEM;
8210 goto err;
8211 }
8212
8213 /* Alloc array of codec conf struct */
8214 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8215 sizeof(struct snd_soc_codec_conf),
8216 GFP_KERNEL);
8217 if (!msm_codec_conf) {
8218 ret = -ENOMEM;
8219 goto err;
8220 }
8221
8222 for (i = 0; i < wsa_max_devs; i++) {
8223 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8224 GFP_KERNEL);
8225 if (!dev_name_str) {
8226 ret = -ENOMEM;
8227 goto err;
8228 }
8229
8230 ret = of_property_read_string_index(pdev->dev.of_node,
8231 "qcom,wsa-aux-dev-prefix",
8232 wsa881x_dev_info[i].index,
8233 auxdev_name_prefix);
8234 if (ret) {
8235 dev_err(&pdev->dev,
8236 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8237 __func__, ret);
8238 ret = -EINVAL;
8239 goto err;
8240 }
8241
8242 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8243 msm_aux_dev[i].name = dev_name_str;
8244 msm_aux_dev[i].codec_name = NULL;
8245 msm_aux_dev[i].codec_of_node =
8246 wsa881x_dev_info[i].of_node;
8247 msm_aux_dev[i].init = msm_wsa881x_init;
8248 msm_codec_conf[i].dev_name = NULL;
8249 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8250 msm_codec_conf[i].of_node =
8251 wsa881x_dev_info[i].of_node;
8252 }
8253
8254 for (i = 0; i < codec_aux_dev_cnt; i++) {
8255 msm_aux_dev[wsa_max_devs + i].name = NULL;
8256 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8257 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8258 aux_cdc_dev_info[i].of_node;
8259 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8260 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8261 msm_codec_conf[wsa_max_devs + i].name_prefix =
8262 NULL;
8263 msm_codec_conf[wsa_max_devs + i].of_node =
8264 aux_cdc_dev_info[i].of_node;
8265 }
8266
8267 card->codec_conf = msm_codec_conf;
8268 card->aux_dev = msm_aux_dev;
8269err:
8270 return ret;
8271}
8272
8273static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8274{
8275 int count;
8276 u32 mi2s_master_slave[MI2S_MAX];
8277 int ret;
8278
8279 for (count = 0; count < MI2S_MAX; count++) {
8280 mutex_init(&mi2s_intf_conf[count].lock);
8281 mi2s_intf_conf[count].ref_cnt = 0;
8282 }
8283
8284 ret = of_property_read_u32_array(pdev->dev.of_node,
8285 "qcom,msm-mi2s-master",
8286 mi2s_master_slave, MI2S_MAX);
8287 if (ret) {
8288 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8289 __func__);
8290 } else {
8291 for (count = 0; count < MI2S_MAX; count++) {
8292 mi2s_intf_conf[count].msm_is_mi2s_master =
8293 mi2s_master_slave[count];
8294 }
8295 }
8296}
8297
8298static void msm_i2s_auxpcm_deinit(void)
8299{
8300 int count;
8301
8302 for (count = 0; count < MI2S_MAX; count++) {
8303 mutex_destroy(&mi2s_intf_conf[count].lock);
8304 mi2s_intf_conf[count].ref_cnt = 0;
8305 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8306 }
8307}
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8308
8309static int sm6150_ssr_enable(struct device *dev, void *data)
8310{
8311 struct platform_device *pdev = to_platform_device(dev);
8312 struct snd_soc_card *card = platform_get_drvdata(pdev);
8313 struct msm_asoc_mach_data *pdata;
8314 int ret = 0;
8315
8316 if (!card) {
8317 dev_err(dev, "%s: card is NULL\n", __func__);
8318 ret = -EINVAL;
8319 goto err;
8320 }
8321
8322 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8323 pdata = snd_soc_card_get_drvdata(card);
8324 if (!pdata->is_afe_config_done) {
8325 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8326 struct snd_soc_pcm_runtime *rtd;
8327
8328 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8329 if (!rtd) {
8330 dev_err(dev,
8331 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8332 __func__, be_dl_name);
8333 ret = -EINVAL;
8334 goto err;
8335 }
8336 ret = msm_afe_set_config(rtd->codec);
8337 if (ret)
8338 dev_err(dev, "%s: Failed to set AFE config. err %d\n",
8339 __func__, ret);
8340 else
8341 pdata->is_afe_config_done = true;
8342 }
8343 }
8344 snd_soc_card_change_online_state(card, 1);
8345 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8346
8347err:
8348 return ret;
8349}
8350
8351static void sm6150_ssr_disable(struct device *dev, void *data)
8352{
8353 struct platform_device *pdev = to_platform_device(dev);
8354 struct snd_soc_card *card = platform_get_drvdata(pdev);
8355 struct msm_asoc_mach_data *pdata;
8356
8357 if (!card) {
8358 dev_err(dev, "%s: card is NULL\n", __func__);
8359 return;
8360 }
8361
8362 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8363 snd_soc_card_change_online_state(card, 0);
8364
8365 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8366 pdata = snd_soc_card_get_drvdata(card);
8367 msm_afe_clear_config();
8368 pdata->is_afe_config_done = false;
8369 }
8370}
8371
8372static const struct snd_event_ops sm6150_ssr_ops = {
8373 .enable = sm6150_ssr_enable,
8374 .disable = sm6150_ssr_disable,
8375};
8376
8377static int msm_audio_ssr_compare(struct device *dev, void *data)
8378{
8379 struct device_node *node = data;
8380
8381 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8382 __func__, dev->of_node, node);
8383 return (dev->of_node && dev->of_node == node);
8384}
8385
8386static int msm_audio_ssr_register(struct device *dev)
8387{
8388 struct device_node *np = dev->of_node;
8389 struct snd_event_clients *ssr_clients = NULL;
8390 struct device_node *node;
8391 int ret;
8392 int i;
8393
8394 for (i = 0; ; i++) {
8395 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8396 if (!node)
8397 break;
8398 snd_event_mstr_add_client(&ssr_clients,
8399 msm_audio_ssr_compare, node);
8400 }
8401
8402 ret = snd_event_master_register(dev, &sm6150_ssr_ops,
8403 ssr_clients, NULL);
8404 if (!ret)
8405 snd_event_notify(dev, SND_EVENT_UP);
8406
8407 return ret;
8408}
8409
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8410static int msm_asoc_machine_probe(struct platform_device *pdev)
8411{
8412 struct snd_soc_card *card;
8413 struct msm_asoc_mach_data *pdata;
8414 const char *mbhc_audio_jack_type = NULL;
8415 int ret;
8416
8417 if (!pdev->dev.of_node) {
8418 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8419 return -EINVAL;
8420 }
8421
8422 pdata = devm_kzalloc(&pdev->dev,
8423 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8424 if (!pdata)
8425 return -ENOMEM;
8426
8427 card = populate_snd_card_dailinks(&pdev->dev);
8428 if (!card) {
8429 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8430 ret = -EINVAL;
8431 goto err;
8432 }
8433 card->dev = &pdev->dev;
8434 platform_set_drvdata(pdev, card);
8435 snd_soc_card_set_drvdata(card, pdata);
8436
8437 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8438 if (ret) {
8439 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8440 ret);
8441 goto err;
8442 }
8443
8444 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8445 if (ret) {
8446 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8447 ret);
8448 goto err;
8449 }
8450
8451 ret = msm_populate_dai_link_component_of_node(card);
8452 if (ret) {
8453 ret = -EPROBE_DEFER;
8454 goto err;
8455 }
8456
8457 ret = msm_init_aux_dev(pdev, card);
8458 if (ret)
8459 goto err;
8460
8461 ret = devm_snd_soc_register_card(&pdev->dev, card);
8462 if (ret == -EPROBE_DEFER) {
8463 if (codec_reg_done)
8464 ret = -EINVAL;
8465 goto err;
8466 } else if (ret) {
8467 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8468 ret);
8469 goto err;
8470 }
8471 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8472
8473 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8474 "qcom,hph-en1-gpio", 0);
8475 if (!pdata->hph_en1_gpio_p) {
8476 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8477 "qcom,hph-en1-gpio",
8478 pdev->dev.of_node->full_name);
8479 }
8480
8481 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8482 "qcom,hph-en0-gpio", 0);
8483 if (!pdata->hph_en0_gpio_p) {
8484 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8485 "qcom,hph-en0-gpio",
8486 pdev->dev.of_node->full_name);
8487 }
8488
8489 ret = of_property_read_string(pdev->dev.of_node,
8490 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8491 if (ret) {
8492 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8493 "qcom,mbhc-audio-jack-type",
8494 pdev->dev.of_node->full_name);
8495 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8496 } else {
8497 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8498 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8499 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8500 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8501 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8502 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8503 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8504 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8505 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8506 } else {
8507 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8508 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8509 }
8510 }
8511 /*
8512 * Parse US-Euro gpio info from DT. Report no error if us-euro
8513 * entry is not found in DT file as some targets do not support
8514 * US-Euro detection
8515 */
8516 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8517 "qcom,us-euro-gpios", 0);
8518 if (!pdata->us_euro_gpio_p) {
8519 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8520 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8521 } else {
8522 dev_dbg(&pdev->dev, "%s detected\n",
8523 "qcom,us-euro-gpios");
8524 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8525 }
Vatsal Bucha6cb17a02018-08-07 11:07:04 +0530[diff] [blame]8526
8527 if (wcd_mbhc_cfg.enable_usbc_analog) {
8528 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8529
8530 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8531 "fsa4480-i2c-handle", 0);
8532 if (!pdata->fsa_handle)
8533 dev_err(&pdev->dev,
8534 "property %s not detected in node %s\n",
8535 "fsa4480-i2c-handle",
8536 pdev->dev.of_node->full_name);
8537 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8538 /* Parse pinctrl info from devicetree */
8539 ret = msm_get_pinctrl(pdev);
8540 if (!ret) {
8541 pr_debug("%s: pinctrl parsing successful\n", __func__);
8542 } else {
8543 dev_dbg(&pdev->dev,
8544 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8545 __func__, ret);
8546 ret = 0;
8547 }
8548
8549 msm_i2s_auxpcm_init(pdev);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8550 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8551 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8552 "qcom,cdc-dmic01-gpios",
8553 0);
8554 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8555 "qcom,cdc-dmic23-gpios",
8556 0);
8557 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8558
8559 ret = msm_audio_ssr_register(&pdev->dev);
8560 if (ret)
8561 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8562 __func__, ret);
8563
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8564err:
8565 return ret;
8566}
8567
8568static int msm_asoc_machine_remove(struct platform_device *pdev)
8569{
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8570 snd_event_master_deregister(&pdev->dev);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8571 msm_i2s_auxpcm_deinit();
8572
8573 return 0;
8574}
8575
8576static struct platform_driver sm6150_asoc_machine_driver = {
8577 .driver = {
8578 .name = DRV_NAME,
8579 .owner = THIS_MODULE,
8580 .pm = &snd_soc_pm_ops,
8581 .of_match_table = sm6150_asoc_machine_of_match,
8582 },
8583 .probe = msm_asoc_machine_probe,
8584 .remove = msm_asoc_machine_remove,
8585};
8586module_platform_driver(sm6150_asoc_machine_driver);
8587
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8588MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8589MODULE_LICENSE("GPL v2");
8590MODULE_ALIAS("platform:" DRV_NAME);
8591MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);