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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 58ff6ed45b2f677d162b1b45ba4f6aa7fd0e4470 / . / asoc / sm6150.c
blob: 184960582be6c2f8903266adc71f84988c65a8ce [file] [log] [blame]
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/of_gpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/input.h>
23#include <linux/of_device.h>
24#include <linux/pm_qos.h>
25#include <sound/core.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/info.h>
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]31#include <soc/snd_event.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]32#include <dsp/q6afe-v2.h>
33#include <dsp/q6core.h>
34#include "device_event.h"
35#include "msm-pcm-routing-v2.h"
36#include "codecs/msm-cdc-pinctrl.h"
37#include "codecs/wcd934x/wcd934x.h"
38#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]39#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]40#include "codecs/wsa881x.h"
41#include "codecs/bolero/bolero-cdc.h"
42#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]43#include "codecs/bolero/wsa-macro.h"
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]44#include "codecs/wcd937x/internal.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]45
46#define DRV_NAME "sm6150-asoc-snd"
47
48#define __CHIPSET__ "SM6150 "
49#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
50
51#define SAMPLING_RATE_8KHZ 8000
52#define SAMPLING_RATE_11P025KHZ 11025
53#define SAMPLING_RATE_16KHZ 16000
54#define SAMPLING_RATE_22P05KHZ 22050
55#define SAMPLING_RATE_32KHZ 32000
56#define SAMPLING_RATE_44P1KHZ 44100
57#define SAMPLING_RATE_48KHZ 48000
58#define SAMPLING_RATE_88P2KHZ 88200
59#define SAMPLING_RATE_96KHZ 96000
60#define SAMPLING_RATE_176P4KHZ 176400
61#define SAMPLING_RATE_192KHZ 192000
62#define SAMPLING_RATE_352P8KHZ 352800
63#define SAMPLING_RATE_384KHZ 384000
64
65#define WCD9XXX_MBHC_DEF_BUTTONS 8
66#define WCD9XXX_MBHC_DEF_RLOADS 5
67#define CODEC_EXT_CLK_RATE 9600000
68#define ADSP_STATE_READY_TIMEOUT_MS 3000
69#define DEV_NAME_STR_LEN 32
70
71#define WSA8810_NAME_1 "wsa881x.20170211"
72#define WSA8810_NAME_2 "wsa881x.20170212"
73#define WCN_CDC_SLIM_RX_CH_MAX 2
74#define WCN_CDC_SLIM_TX_CH_MAX 3
75#define TDM_CHANNEL_MAX 8
76
77#define ADSP_STATE_READY_TIMEOUT_MS 3000
78#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
79#define MSM_HIFI_ON 1
80
81enum {
82 SLIM_RX_0 = 0,
83 SLIM_RX_1,
84 SLIM_RX_2,
85 SLIM_RX_3,
86 SLIM_RX_4,
87 SLIM_RX_5,
88 SLIM_RX_6,
89 SLIM_RX_7,
90 SLIM_RX_MAX,
91};
92enum {
93 SLIM_TX_0 = 0,
94 SLIM_TX_1,
95 SLIM_TX_2,
96 SLIM_TX_3,
97 SLIM_TX_4,
98 SLIM_TX_5,
99 SLIM_TX_6,
100 SLIM_TX_7,
101 SLIM_TX_8,
102 SLIM_TX_MAX,
103};
104
105enum {
106 PRIM_MI2S = 0,
107 SEC_MI2S,
108 TERT_MI2S,
109 QUAT_MI2S,
110 QUIN_MI2S,
111 MI2S_MAX,
112};
113
114enum {
115 PRIM_AUX_PCM = 0,
116 SEC_AUX_PCM,
117 TERT_AUX_PCM,
118 QUAT_AUX_PCM,
119 QUIN_AUX_PCM,
120 AUX_PCM_MAX,
121};
122
123enum {
124 WSA_CDC_DMA_RX_0 = 0,
125 WSA_CDC_DMA_RX_1,
126 RX_CDC_DMA_RX_0,
127 RX_CDC_DMA_RX_1,
128 RX_CDC_DMA_RX_2,
129 RX_CDC_DMA_RX_3,
130 RX_CDC_DMA_RX_5,
131 CDC_DMA_RX_MAX,
132};
133
134enum {
135 WSA_CDC_DMA_TX_0 = 0,
136 WSA_CDC_DMA_TX_1,
137 WSA_CDC_DMA_TX_2,
138 TX_CDC_DMA_TX_0,
139 TX_CDC_DMA_TX_3,
140 TX_CDC_DMA_TX_4,
141 CDC_DMA_TX_MAX,
142};
143
144struct mi2s_conf {
145 struct mutex lock;
146 u32 ref_cnt;
147 u32 msm_is_mi2s_master;
148};
149
150static u32 mi2s_ebit_clk[MI2S_MAX] = {
151 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
152 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
153 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
154 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
155 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
156};
157
158struct dev_config {
159 u32 sample_rate;
160 u32 bit_format;
161 u32 channels;
162};
163
164enum {
165 DP_RX_IDX = 0,
166 EXT_DISP_RX_IDX_MAX,
167};
168
169struct msm_wsa881x_dev_info {
170 struct device_node *of_node;
171 u32 index;
172};
173
174struct aux_codec_dev_info {
175 struct device_node *of_node;
176 u32 index;
177};
178
179enum pinctrl_pin_state {
180 STATE_DISABLE = 0, /* All pins are in sleep state */
181 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
182 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
183};
184
185struct msm_pinctrl_info {
186 struct pinctrl *pinctrl;
187 struct pinctrl_state *mi2s_disable;
188 struct pinctrl_state *tdm_disable;
189 struct pinctrl_state *mi2s_active;
190 struct pinctrl_state *tdm_active;
191 enum pinctrl_pin_state curr_state;
192};
193
194struct msm_asoc_mach_data {
195 struct snd_info_entry *codec_root;
196 struct msm_pinctrl_info pinctrl_info;
197 int usbc_en2_gpio; /* used by gpio driver API */
198 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
199 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
200 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
201 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
202 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
203 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]204 bool is_afe_config_done;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]205};
206
207struct msm_asoc_wcd93xx_codec {
208 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
209 enum afe_config_type config_type);
210};
211
212static const char *const pin_states[] = {"sleep", "i2s-active",
213 "tdm-active"};
214
215static struct snd_soc_card snd_soc_card_sm6150_msm;
216
217enum {
218 TDM_0 = 0,
219 TDM_1,
220 TDM_2,
221 TDM_3,
222 TDM_4,
223 TDM_5,
224 TDM_6,
225 TDM_7,
226 TDM_PORT_MAX,
227};
228
229enum {
230 TDM_PRI = 0,
231 TDM_SEC,
232 TDM_TERT,
233 TDM_QUAT,
234 TDM_QUIN,
235 TDM_INTERFACE_MAX,
236};
237
238struct tdm_port {
239 u32 mode;
240 u32 channel;
241};
242
243/* TDM default config */
244static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
245 { /* PRI TDM */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
253 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
254 },
255 { /* SEC TDM */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
263 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
264 },
265 { /* TERT TDM */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
274 },
275 { /* QUAT TDM */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
284 },
285 { /* QUIN TDM */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
294 }
295
296};
297
298/* TDM default config */
299static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
300 { /* PRI TDM */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
309 },
310 { /* SEC TDM */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
319 },
320 { /* TERT TDM */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
329 },
330 { /* QUAT TDM */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
339 },
340 { /* QUIN TDM */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
349 }
350};
351
352
353/* Default configuration of slimbus channels */
354static struct dev_config slim_rx_cfg[] = {
355 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
362 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
363};
364
365static struct dev_config slim_tx_cfg[] = {
366 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
372 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
373 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
374 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
375};
376
377/* Default configuration of Codec DMA Interface Tx */
378static struct dev_config cdc_dma_rx_cfg[] = {
379 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
383 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
384 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
385 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
386};
387
388/* Default configuration of Codec DMA Interface Rx */
389static struct dev_config cdc_dma_tx_cfg[] = {
390 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
395 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
396};
397
398/* Default configuration of external display BE */
399static struct dev_config ext_disp_rx_cfg[] = {
400 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
401};
402
403static struct dev_config usb_rx_cfg = {
404 .sample_rate = SAMPLING_RATE_48KHZ,
405 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
406 .channels = 2,
407};
408
409static struct dev_config usb_tx_cfg = {
410 .sample_rate = SAMPLING_RATE_48KHZ,
411 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
412 .channels = 1,
413};
414
415static struct dev_config proxy_rx_cfg = {
416 .sample_rate = SAMPLING_RATE_48KHZ,
417 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
418 .channels = 2,
419};
420
421/* Default configuration of MI2S channels */
422static struct dev_config mi2s_rx_cfg[] = {
423 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
424 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
425 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
426 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
427 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
428};
429
430static struct dev_config mi2s_tx_cfg[] = {
431 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
435 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
436};
437
438static struct dev_config aux_pcm_rx_cfg[] = {
439 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
442 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
443 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
444};
445
446static struct dev_config aux_pcm_tx_cfg[] = {
447 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
449 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
450 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
451 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
452};
453static int msm_vi_feed_tx_ch = 2;
454static const char *const slim_rx_ch_text[] = {"One", "Two"};
455static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
456 "Five", "Six", "Seven",
457 "Eight"};
458static const char *const vi_feed_ch_text[] = {"One", "Two"};
459static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
460 "S32_LE"};
461static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
462 "S24_3LE"};
463static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
464 "KHZ_32", "KHZ_44P1", "KHZ_48",
465 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
466 "KHZ_192", "KHZ_352P8", "KHZ_384"};
467static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
468 "KHZ_44P1", "KHZ_48",
469 "KHZ_88P2", "KHZ_96"};
470static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
471 "Five", "Six", "Seven",
472 "Eight"};
473static char const *ch_text[] = {"Two", "Three", "Four", "Five",
474 "Six", "Seven", "Eight"};
475static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
476 "KHZ_16", "KHZ_22P05",
477 "KHZ_32", "KHZ_44P1", "KHZ_48",
478 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
479 "KHZ_192", "KHZ_352P8", "KHZ_384"};
480static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
481 "KHZ_192", "KHZ_32", "KHZ_44P1",
482 "KHZ_88P2", "KHZ_176P4" };
483static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
484 "Five", "Six", "Seven", "Eight"};
485static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
486static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
487 "KHZ_48", "KHZ_176P4",
488 "KHZ_352P8"};
489static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
490static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
491 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
492 "KHZ_48", "KHZ_96", "KHZ_192"};
493static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
494 "Five", "Six", "Seven",
495 "Eight"};
496static const char *const hifi_text[] = {"Off", "On"};
497static const char *const qos_text[] = {"Disable", "Enable"};
498
499static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
500static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
501 "Five", "Six", "Seven",
502 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]503static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
504 "KHZ_16", "KHZ_22P05",
505 "KHZ_32", "KHZ_44P1", "KHZ_48",
506 "KHZ_88P2", "KHZ_96",
507 "KHZ_176P4", "KHZ_192",
508 "KHZ_352P8", "KHZ_384"};
509
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]510
511static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
513static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
514static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
515static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
516static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
517static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
518static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
519static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
520static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
521static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
522static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
523static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
524static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
525static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
526static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
527static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
528static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
529static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
533static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
537static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
538 ext_disp_sample_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
540static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
541static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
543static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
544static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
558static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
565static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
566static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
567static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
568static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
569static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
570static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
571static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
572static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
574static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
575static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
576static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
577static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
578static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
579static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
580static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
586static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
587static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
590static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
592static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
593static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
595static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
596static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
597static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
598static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
599static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
600static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
601static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
602static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
603static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
604static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
605static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
606 cdc_dma_sample_rate_text);
607static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
608 cdc_dma_sample_rate_text);
609static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
610 cdc_dma_sample_rate_text);
611static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
612 cdc_dma_sample_rate_text);
613static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
614 cdc_dma_sample_rate_text);
615static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
616 cdc_dma_sample_rate_text);
617static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
618 cdc_dma_sample_rate_text);
619static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
620 cdc_dma_sample_rate_text);
621static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
622 cdc_dma_sample_rate_text);
623static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
624 cdc_dma_sample_rate_text);
625static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
626 cdc_dma_sample_rate_text);
627static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
628 cdc_dma_sample_rate_text);
629static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
630 cdc_dma_sample_rate_text);
631
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]632static int msm_hifi_control;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]633static bool codec_reg_done;
634static struct snd_soc_aux_dev *msm_aux_dev;
635static struct snd_soc_codec_conf *msm_codec_conf;
636static struct msm_asoc_wcd93xx_codec msm_codec_fn;
637
638static int dmic_0_1_gpio_cnt;
639static int dmic_2_3_gpio_cnt;
640
641static void *def_wcd_mbhc_cal(void);
642static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
643 int enable, bool dapm);
644static int msm_wsa881x_init(struct snd_soc_component *component);
645static int msm_aux_codec_init(struct snd_soc_component *component);
646
647/*
648 * Need to report LINEIN
649 * if R/L channel impedance is larger than 5K ohm
650 */
651static struct wcd_mbhc_config wcd_mbhc_cfg = {
652 .read_fw_bin = false,
653 .calibration = NULL,
654 .detect_extn_cable = true,
655 .mono_stero_detection = false,
656 .swap_gnd_mic = NULL,
657 .hs_ext_micbias = true,
658 .key_code[0] = KEY_MEDIA,
659 .key_code[1] = KEY_VOICECOMMAND,
660 .key_code[2] = KEY_VOLUMEUP,
661 .key_code[3] = KEY_VOLUMEDOWN,
662 .key_code[4] = 0,
663 .key_code[5] = 0,
664 .key_code[6] = 0,
665 .key_code[7] = 0,
666 .linein_th = 5000,
667 .moisture_en = true,
668 .mbhc_micbias = MIC_BIAS_2,
669 .anc_micbias = MIC_BIAS_2,
670 .enable_anc_mic_detect = false,
671};
672
673static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
674 {"MIC BIAS1", NULL, "MCLK TX"},
675 {"MIC BIAS2", NULL, "MCLK TX"},
676 {"MIC BIAS3", NULL, "MCLK TX"},
677 {"MIC BIAS4", NULL, "MCLK TX"},
678};
679
680static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
681 {
682 AFE_API_VERSION_I2S_CONFIG,
683 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
684 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
685 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
686 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
687 0,
688 },
689 {
690 AFE_API_VERSION_I2S_CONFIG,
691 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
692 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
693 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
694 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
695 0,
696 },
697 {
698 AFE_API_VERSION_I2S_CONFIG,
699 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
700 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
701 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
702 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
703 0,
704 },
705 {
706 AFE_API_VERSION_I2S_CONFIG,
707 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
708 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
709 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
710 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
711 0,
712 },
713 {
714 AFE_API_VERSION_I2S_CONFIG,
715 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
716 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
717 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
718 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
719 0,
720 }
721
722};
723
724static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
725
726static int slim_get_sample_rate_val(int sample_rate)
727{
728 int sample_rate_val = 0;
729
730 switch (sample_rate) {
731 case SAMPLING_RATE_8KHZ:
732 sample_rate_val = 0;
733 break;
734 case SAMPLING_RATE_16KHZ:
735 sample_rate_val = 1;
736 break;
737 case SAMPLING_RATE_32KHZ:
738 sample_rate_val = 2;
739 break;
740 case SAMPLING_RATE_44P1KHZ:
741 sample_rate_val = 3;
742 break;
743 case SAMPLING_RATE_48KHZ:
744 sample_rate_val = 4;
745 break;
746 case SAMPLING_RATE_88P2KHZ:
747 sample_rate_val = 5;
748 break;
749 case SAMPLING_RATE_96KHZ:
750 sample_rate_val = 6;
751 break;
752 case SAMPLING_RATE_176P4KHZ:
753 sample_rate_val = 7;
754 break;
755 case SAMPLING_RATE_192KHZ:
756 sample_rate_val = 8;
757 break;
758 case SAMPLING_RATE_352P8KHZ:
759 sample_rate_val = 9;
760 break;
761 case SAMPLING_RATE_384KHZ:
762 sample_rate_val = 10;
763 break;
764 default:
765 sample_rate_val = 4;
766 break;
767 }
768 return sample_rate_val;
769}
770
771static int slim_get_sample_rate(int value)
772{
773 int sample_rate = 0;
774
775 switch (value) {
776 case 0:
777 sample_rate = SAMPLING_RATE_8KHZ;
778 break;
779 case 1:
780 sample_rate = SAMPLING_RATE_16KHZ;
781 break;
782 case 2:
783 sample_rate = SAMPLING_RATE_32KHZ;
784 break;
785 case 3:
786 sample_rate = SAMPLING_RATE_44P1KHZ;
787 break;
788 case 4:
789 sample_rate = SAMPLING_RATE_48KHZ;
790 break;
791 case 5:
792 sample_rate = SAMPLING_RATE_88P2KHZ;
793 break;
794 case 6:
795 sample_rate = SAMPLING_RATE_96KHZ;
796 break;
797 case 7:
798 sample_rate = SAMPLING_RATE_176P4KHZ;
799 break;
800 case 8:
801 sample_rate = SAMPLING_RATE_192KHZ;
802 break;
803 case 9:
804 sample_rate = SAMPLING_RATE_352P8KHZ;
805 break;
806 case 10:
807 sample_rate = SAMPLING_RATE_384KHZ;
808 break;
809 default:
810 sample_rate = SAMPLING_RATE_48KHZ;
811 break;
812 }
813 return sample_rate;
814}
815
816static int slim_get_bit_format_val(int bit_format)
817{
818 int val = 0;
819
820 switch (bit_format) {
821 case SNDRV_PCM_FORMAT_S32_LE:
822 val = 3;
823 break;
824 case SNDRV_PCM_FORMAT_S24_3LE:
825 val = 2;
826 break;
827 case SNDRV_PCM_FORMAT_S24_LE:
828 val = 1;
829 break;
830 case SNDRV_PCM_FORMAT_S16_LE:
831 default:
832 val = 0;
833 break;
834 }
835 return val;
836}
837
838static int slim_get_bit_format(int val)
839{
840 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
841
842 switch (val) {
843 case 0:
844 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
845 break;
846 case 1:
847 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
848 break;
849 case 2:
850 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
851 break;
852 case 3:
853 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
854 break;
855 default:
856 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
857 break;
858 }
859 return bit_fmt;
860}
861
862static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
863{
864 int port_id = 0;
865
866 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
867 port_id = SLIM_RX_0;
868 } else if (strnstr(kcontrol->id.name,
869 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
870 port_id = SLIM_RX_2;
871 } else if (strnstr(kcontrol->id.name,
872 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
873 port_id = SLIM_RX_5;
874 } else if (strnstr(kcontrol->id.name,
875 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
876 port_id = SLIM_RX_6;
877 } else if (strnstr(kcontrol->id.name,
878 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
879 port_id = SLIM_TX_0;
880 } else if (strnstr(kcontrol->id.name,
881 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
882 port_id = SLIM_TX_1;
883 } else {
884 pr_err("%s: unsupported channel: %s\n",
885 __func__, kcontrol->id.name);
886 return -EINVAL;
887 }
888
889 return port_id;
890}
891
892static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
893 struct snd_ctl_elem_value *ucontrol)
894{
895 int ch_num = slim_get_port_idx(kcontrol);
896
897 if (ch_num < 0)
898 return ch_num;
899
900 ucontrol->value.enumerated.item[0] =
901 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
902
903 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
904 ch_num, slim_rx_cfg[ch_num].sample_rate,
905 ucontrol->value.enumerated.item[0]);
906
907 return 0;
908}
909
910static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
911 struct snd_ctl_elem_value *ucontrol)
912{
913 int ch_num = slim_get_port_idx(kcontrol);
914
915 if (ch_num < 0)
916 return ch_num;
917
918 slim_rx_cfg[ch_num].sample_rate =
919 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
920
921 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
922 ch_num, slim_rx_cfg[ch_num].sample_rate,
923 ucontrol->value.enumerated.item[0]);
924
925 return 0;
926}
927
928static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
929 struct snd_ctl_elem_value *ucontrol)
930{
931 int ch_num = slim_get_port_idx(kcontrol);
932
933 if (ch_num < 0)
934 return ch_num;
935
936 ucontrol->value.enumerated.item[0] =
937 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
938
939 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
940 ch_num, slim_tx_cfg[ch_num].sample_rate,
941 ucontrol->value.enumerated.item[0]);
942
943 return 0;
944}
945
946static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
947 struct snd_ctl_elem_value *ucontrol)
948{
949 int sample_rate = 0;
950 int ch_num = slim_get_port_idx(kcontrol);
951
952 if (ch_num < 0)
953 return ch_num;
954
955 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
956 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
957 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
958 __func__, sample_rate);
959 return -EINVAL;
960 }
961 slim_tx_cfg[ch_num].sample_rate = sample_rate;
962
963 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
964 ch_num, slim_tx_cfg[ch_num].sample_rate,
965 ucontrol->value.enumerated.item[0]);
966
967 return 0;
968}
969
970static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
971 struct snd_ctl_elem_value *ucontrol)
972{
973 int ch_num = slim_get_port_idx(kcontrol);
974
975 if (ch_num < 0)
976 return ch_num;
977
978 ucontrol->value.enumerated.item[0] =
979 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
980
981 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
982 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
983 ucontrol->value.enumerated.item[0]);
984
985 return 0;
986}
987
988static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
989 struct snd_ctl_elem_value *ucontrol)
990{
991 int ch_num = slim_get_port_idx(kcontrol);
992
993 if (ch_num < 0)
994 return ch_num;
995
996 slim_rx_cfg[ch_num].bit_format =
997 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
998
999 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1000 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1001 ucontrol->value.enumerated.item[0]);
1002
1003 return 0;
1004}
1005
1006static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1007 struct snd_ctl_elem_value *ucontrol)
1008{
1009 int ch_num = slim_get_port_idx(kcontrol);
1010
1011 if (ch_num < 0)
1012 return ch_num;
1013
1014 ucontrol->value.enumerated.item[0] =
1015 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1016
1017 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1018 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1019 ucontrol->value.enumerated.item[0]);
1020
1021 return 0;
1022}
1023
1024static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1025 struct snd_ctl_elem_value *ucontrol)
1026{
1027 int ch_num = slim_get_port_idx(kcontrol);
1028
1029 if (ch_num < 0)
1030 return ch_num;
1031
1032 slim_tx_cfg[ch_num].bit_format =
1033 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1034
1035 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1036 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1037 ucontrol->value.enumerated.item[0]);
1038
1039 return 0;
1040}
1041
1042static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1043 struct snd_ctl_elem_value *ucontrol)
1044{
1045 int ch_num = slim_get_port_idx(kcontrol);
1046
1047 if (ch_num < 0)
1048 return ch_num;
1049
1050 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1051 ch_num, slim_rx_cfg[ch_num].channels);
1052 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1053
1054 return 0;
1055}
1056
1057static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1058 struct snd_ctl_elem_value *ucontrol)
1059{
1060 int ch_num = slim_get_port_idx(kcontrol);
1061
1062 if (ch_num < 0)
1063 return ch_num;
1064
1065 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1066 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1067 ch_num, slim_rx_cfg[ch_num].channels);
1068
1069 return 1;
1070}
1071
1072static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1073 struct snd_ctl_elem_value *ucontrol)
1074{
1075 int ch_num = slim_get_port_idx(kcontrol);
1076
1077 if (ch_num < 0)
1078 return ch_num;
1079
1080 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1081 ch_num, slim_tx_cfg[ch_num].channels);
1082 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1083
1084 return 0;
1085}
1086
1087static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1088 struct snd_ctl_elem_value *ucontrol)
1089{
1090 int ch_num = slim_get_port_idx(kcontrol);
1091
1092 if (ch_num < 0)
1093 return ch_num;
1094
1095 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1096 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1097 ch_num, slim_tx_cfg[ch_num].channels);
1098
1099 return 1;
1100}
1101
1102static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1104{
1105 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1106 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1107 ucontrol->value.integer.value[0]);
1108 return 0;
1109}
1110
1111static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1112 struct snd_ctl_elem_value *ucontrol)
1113{
1114 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1115
1116 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1117 return 1;
1118}
1119
1120static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1121 struct snd_ctl_elem_value *ucontrol)
1122{
1123 /*
1124 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1125 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1126 * value.
1127 */
1128 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1129 case SAMPLING_RATE_96KHZ:
1130 ucontrol->value.integer.value[0] = 5;
1131 break;
1132 case SAMPLING_RATE_88P2KHZ:
1133 ucontrol->value.integer.value[0] = 4;
1134 break;
1135 case SAMPLING_RATE_48KHZ:
1136 ucontrol->value.integer.value[0] = 3;
1137 break;
1138 case SAMPLING_RATE_44P1KHZ:
1139 ucontrol->value.integer.value[0] = 2;
1140 break;
1141 case SAMPLING_RATE_16KHZ:
1142 ucontrol->value.integer.value[0] = 1;
1143 break;
1144 case SAMPLING_RATE_8KHZ:
1145 default:
1146 ucontrol->value.integer.value[0] = 0;
1147 break;
1148 }
1149 pr_debug("%s: sample rate = %d\n", __func__,
1150 slim_rx_cfg[SLIM_RX_7].sample_rate);
1151
1152 return 0;
1153}
1154
1155static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1156 struct snd_ctl_elem_value *ucontrol)
1157{
1158 switch (ucontrol->value.integer.value[0]) {
1159 case 1:
1160 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1161 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1162 break;
1163 case 2:
1164 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1165 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1166 break;
1167 case 3:
1168 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1169 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1170 break;
1171 case 4:
1172 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1173 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1174 break;
1175 case 5:
1176 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1177 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1178 break;
1179 case 0:
1180 default:
1181 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1182 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1183 break;
1184 }
1185 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1186 __func__,
1187 slim_rx_cfg[SLIM_RX_7].sample_rate,
1188 slim_tx_cfg[SLIM_TX_7].sample_rate,
1189 ucontrol->value.enumerated.item[0]);
1190
1191 return 0;
1192}
1193
1194static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1195{
1196 int idx = 0;
1197
1198 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1199 sizeof("WSA_CDC_DMA_RX_0")))
1200 idx = WSA_CDC_DMA_RX_0;
1201 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1202 sizeof("WSA_CDC_DMA_RX_0")))
1203 idx = WSA_CDC_DMA_RX_1;
1204 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1205 sizeof("RX_CDC_DMA_RX_0")))
1206 idx = RX_CDC_DMA_RX_0;
1207 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1208 sizeof("RX_CDC_DMA_RX_1")))
1209 idx = RX_CDC_DMA_RX_1;
1210 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1211 sizeof("RX_CDC_DMA_RX_2")))
1212 idx = RX_CDC_DMA_RX_2;
1213 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1214 sizeof("RX_CDC_DMA_RX_3")))
1215 idx = RX_CDC_DMA_RX_3;
1216 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1217 sizeof("RX_CDC_DMA_RX_5")))
1218 idx = RX_CDC_DMA_RX_5;
1219 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1220 sizeof("WSA_CDC_DMA_TX_0")))
1221 idx = WSA_CDC_DMA_TX_0;
1222 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1223 sizeof("WSA_CDC_DMA_TX_1")))
1224 idx = WSA_CDC_DMA_TX_1;
1225 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1226 sizeof("WSA_CDC_DMA_TX_2")))
1227 idx = WSA_CDC_DMA_TX_2;
1228 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1229 sizeof("TX_CDC_DMA_TX_0")))
1230 idx = TX_CDC_DMA_TX_0;
1231 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1232 sizeof("TX_CDC_DMA_TX_3")))
1233 idx = TX_CDC_DMA_TX_3;
1234 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1235 sizeof("TX_CDC_DMA_TX_4")))
1236 idx = TX_CDC_DMA_TX_4;
1237 else {
1238 pr_err("%s: unsupported channel: %s\n",
1239 __func__, kcontrol->id.name);
1240 return -EINVAL;
1241 }
1242
1243 return idx;
1244}
1245
1246static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1247 struct snd_ctl_elem_value *ucontrol)
1248{
1249 int ch_num = cdc_dma_get_port_idx(kcontrol);
1250
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1251 if (ch_num < 0) {
1252 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1253 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1254 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1255
1256 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1257 cdc_dma_rx_cfg[ch_num].channels - 1);
1258 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1259 return 0;
1260}
1261
1262static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1263 struct snd_ctl_elem_value *ucontrol)
1264{
1265 int ch_num = cdc_dma_get_port_idx(kcontrol);
1266
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1267 if (ch_num < 0) {
1268 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1269 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1270 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1271
1272 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1273
1274 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1275 cdc_dma_rx_cfg[ch_num].channels);
1276 return 1;
1277}
1278
1279static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1280 struct snd_ctl_elem_value *ucontrol)
1281{
1282 int ch_num = cdc_dma_get_port_idx(kcontrol);
1283
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1284 if (ch_num < 0) {
1285 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1286 return ch_num;
1287 }
1288
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1289 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1290 case SNDRV_PCM_FORMAT_S32_LE:
1291 ucontrol->value.integer.value[0] = 3;
1292 break;
1293 case SNDRV_PCM_FORMAT_S24_3LE:
1294 ucontrol->value.integer.value[0] = 2;
1295 break;
1296 case SNDRV_PCM_FORMAT_S24_LE:
1297 ucontrol->value.integer.value[0] = 1;
1298 break;
1299 case SNDRV_PCM_FORMAT_S16_LE:
1300 default:
1301 ucontrol->value.integer.value[0] = 0;
1302 break;
1303 }
1304
1305 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1306 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1307 ucontrol->value.integer.value[0]);
1308 return 0;
1309}
1310
1311static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1312 struct snd_ctl_elem_value *ucontrol)
1313{
1314 int rc = 0;
1315 int ch_num = cdc_dma_get_port_idx(kcontrol);
1316
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1317 if (ch_num < 0) {
1318 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1319 return ch_num;
1320 }
1321
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1322 switch (ucontrol->value.integer.value[0]) {
1323 case 3:
1324 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1325 break;
1326 case 2:
1327 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1328 break;
1329 case 1:
1330 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1331 break;
1332 case 0:
1333 default:
1334 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1335 break;
1336 }
1337 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1338 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1339 ucontrol->value.integer.value[0]);
1340
1341 return rc;
1342}
1343
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1344
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1345static int cdc_dma_get_sample_rate_val(int sample_rate)
1346{
1347 int sample_rate_val = 0;
1348
1349 switch (sample_rate) {
1350 case SAMPLING_RATE_8KHZ:
1351 sample_rate_val = 0;
1352 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1353 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1354 sample_rate_val = 1;
1355 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1356 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1357 sample_rate_val = 2;
1358 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1359 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1360 sample_rate_val = 3;
1361 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1362 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1363 sample_rate_val = 4;
1364 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1365 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1366 sample_rate_val = 5;
1367 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1368 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1369 sample_rate_val = 6;
1370 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1371 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1372 sample_rate_val = 7;
1373 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1374 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1375 sample_rate_val = 8;
1376 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1377 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1378 sample_rate_val = 9;
1379 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1380 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1381 sample_rate_val = 10;
1382 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1383 case SAMPLING_RATE_352P8KHZ:
1384 sample_rate_val = 11;
1385 break;
1386 case SAMPLING_RATE_384KHZ:
1387 sample_rate_val = 12;
1388 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1389 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1390 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1391 break;
1392 }
1393 return sample_rate_val;
1394}
1395
1396static int cdc_dma_get_sample_rate(int value)
1397{
1398 int sample_rate = 0;
1399
1400 switch (value) {
1401 case 0:
1402 sample_rate = SAMPLING_RATE_8KHZ;
1403 break;
1404 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1405 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1406 break;
1407 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1408 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1409 break;
1410 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1411 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1412 break;
1413 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1414 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1415 break;
1416 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1417 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1418 break;
1419 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1420 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1421 break;
1422 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1423 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1424 break;
1425 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1426 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1427 break;
1428 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1429 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1430 break;
1431 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1432 sample_rate = SAMPLING_RATE_192KHZ;
1433 break;
1434 case 11:
1435 sample_rate = SAMPLING_RATE_352P8KHZ;
1436 break;
1437 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1438 sample_rate = SAMPLING_RATE_384KHZ;
1439 break;
1440 default:
1441 sample_rate = SAMPLING_RATE_48KHZ;
1442 break;
1443 }
1444 return sample_rate;
1445}
1446
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1447static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1448 struct snd_ctl_elem_value *ucontrol)
1449{
1450 int ch_num = cdc_dma_get_port_idx(kcontrol);
1451
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1452 if (ch_num < 0) {
1453 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1454 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1455 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1456
1457 ucontrol->value.enumerated.item[0] =
1458 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1459
1460 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1461 cdc_dma_rx_cfg[ch_num].sample_rate);
1462 return 0;
1463}
1464
1465static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1466 struct snd_ctl_elem_value *ucontrol)
1467{
1468 int ch_num = cdc_dma_get_port_idx(kcontrol);
1469
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1470 if (ch_num < 0) {
1471 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1472 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1473 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1474
1475 cdc_dma_rx_cfg[ch_num].sample_rate =
1476 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1477
1478
1479 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1480 __func__, ucontrol->value.enumerated.item[0],
1481 cdc_dma_rx_cfg[ch_num].sample_rate);
1482 return 0;
1483}
1484
1485static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1486 struct snd_ctl_elem_value *ucontrol)
1487{
1488 int ch_num = cdc_dma_get_port_idx(kcontrol);
1489
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1490 if (ch_num < 0) {
1491 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1492 return ch_num;
1493 }
1494
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1495 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1496 cdc_dma_tx_cfg[ch_num].channels);
1497 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1498 return 0;
1499}
1500
1501static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1502 struct snd_ctl_elem_value *ucontrol)
1503{
1504 int ch_num = cdc_dma_get_port_idx(kcontrol);
1505
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1506 if (ch_num < 0) {
1507 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1508 return ch_num;
1509 }
1510
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1511 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1512
1513 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1514 cdc_dma_tx_cfg[ch_num].channels);
1515 return 1;
1516}
1517
1518static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1519 struct snd_ctl_elem_value *ucontrol)
1520{
1521 int sample_rate_val;
1522 int ch_num = cdc_dma_get_port_idx(kcontrol);
1523
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1524 if (ch_num < 0) {
1525 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1526 return ch_num;
1527 }
1528
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1529 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1530 case SAMPLING_RATE_384KHZ:
1531 sample_rate_val = 12;
1532 break;
1533 case SAMPLING_RATE_352P8KHZ:
1534 sample_rate_val = 11;
1535 break;
1536 case SAMPLING_RATE_192KHZ:
1537 sample_rate_val = 10;
1538 break;
1539 case SAMPLING_RATE_176P4KHZ:
1540 sample_rate_val = 9;
1541 break;
1542 case SAMPLING_RATE_96KHZ:
1543 sample_rate_val = 8;
1544 break;
1545 case SAMPLING_RATE_88P2KHZ:
1546 sample_rate_val = 7;
1547 break;
1548 case SAMPLING_RATE_48KHZ:
1549 sample_rate_val = 6;
1550 break;
1551 case SAMPLING_RATE_44P1KHZ:
1552 sample_rate_val = 5;
1553 break;
1554 case SAMPLING_RATE_32KHZ:
1555 sample_rate_val = 4;
1556 break;
1557 case SAMPLING_RATE_22P05KHZ:
1558 sample_rate_val = 3;
1559 break;
1560 case SAMPLING_RATE_16KHZ:
1561 sample_rate_val = 2;
1562 break;
1563 case SAMPLING_RATE_11P025KHZ:
1564 sample_rate_val = 1;
1565 break;
1566 case SAMPLING_RATE_8KHZ:
1567 sample_rate_val = 0;
1568 break;
1569 default:
1570 sample_rate_val = 6;
1571 break;
1572 }
1573
1574 ucontrol->value.integer.value[0] = sample_rate_val;
1575 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1576 cdc_dma_tx_cfg[ch_num].sample_rate);
1577 return 0;
1578}
1579
1580static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1581 struct snd_ctl_elem_value *ucontrol)
1582{
1583 int ch_num = cdc_dma_get_port_idx(kcontrol);
1584
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1585 if (ch_num < 0) {
1586 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1587 return ch_num;
1588 }
1589
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1590 switch (ucontrol->value.integer.value[0]) {
1591 case 12:
1592 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1593 break;
1594 case 11:
1595 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1596 break;
1597 case 10:
1598 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1599 break;
1600 case 9:
1601 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1602 break;
1603 case 8:
1604 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1605 break;
1606 case 7:
1607 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1608 break;
1609 case 6:
1610 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1611 break;
1612 case 5:
1613 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1614 break;
1615 case 4:
1616 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1617 break;
1618 case 3:
1619 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1620 break;
1621 case 2:
1622 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1623 break;
1624 case 1:
1625 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1626 break;
1627 case 0:
1628 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1629 break;
1630 default:
1631 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1632 break;
1633 }
1634
1635 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1636 __func__, ucontrol->value.integer.value[0],
1637 cdc_dma_tx_cfg[ch_num].sample_rate);
1638 return 0;
1639}
1640
1641static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1642 struct snd_ctl_elem_value *ucontrol)
1643{
1644 int ch_num = cdc_dma_get_port_idx(kcontrol);
1645
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1646 if (ch_num < 0) {
1647 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1648 return ch_num;
1649 }
1650
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1651 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1652 case SNDRV_PCM_FORMAT_S32_LE:
1653 ucontrol->value.integer.value[0] = 3;
1654 break;
1655 case SNDRV_PCM_FORMAT_S24_3LE:
1656 ucontrol->value.integer.value[0] = 2;
1657 break;
1658 case SNDRV_PCM_FORMAT_S24_LE:
1659 ucontrol->value.integer.value[0] = 1;
1660 break;
1661 case SNDRV_PCM_FORMAT_S16_LE:
1662 default:
1663 ucontrol->value.integer.value[0] = 0;
1664 break;
1665 }
1666
1667 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1668 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1669 ucontrol->value.integer.value[0]);
1670 return 0;
1671}
1672
1673static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1674 struct snd_ctl_elem_value *ucontrol)
1675{
1676 int rc = 0;
1677 int ch_num = cdc_dma_get_port_idx(kcontrol);
1678
Tanya Dixitd85e6f32018-09-14 16:06:20 +0530[diff] [blame]1679 if (ch_num < 0) {
1680 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1681 return ch_num;
1682 }
1683
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1684 switch (ucontrol->value.integer.value[0]) {
1685 case 3:
1686 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1687 break;
1688 case 2:
1689 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1690 break;
1691 case 1:
1692 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1693 break;
1694 case 0:
1695 default:
1696 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1697 break;
1698 }
1699 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1700 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1701 ucontrol->value.integer.value[0]);
1702
1703 return rc;
1704}
1705
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1706static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1707 struct snd_ctl_elem_value *ucontrol)
1708{
1709 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1710 usb_rx_cfg.channels);
1711 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1712 return 0;
1713}
1714
1715static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1716 struct snd_ctl_elem_value *ucontrol)
1717{
1718 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1719
1720 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1721 return 1;
1722}
1723
1724static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1725 struct snd_ctl_elem_value *ucontrol)
1726{
1727 int sample_rate_val;
1728
1729 switch (usb_rx_cfg.sample_rate) {
1730 case SAMPLING_RATE_384KHZ:
1731 sample_rate_val = 12;
1732 break;
1733 case SAMPLING_RATE_352P8KHZ:
1734 sample_rate_val = 11;
1735 break;
1736 case SAMPLING_RATE_192KHZ:
1737 sample_rate_val = 10;
1738 break;
1739 case SAMPLING_RATE_176P4KHZ:
1740 sample_rate_val = 9;
1741 break;
1742 case SAMPLING_RATE_96KHZ:
1743 sample_rate_val = 8;
1744 break;
1745 case SAMPLING_RATE_88P2KHZ:
1746 sample_rate_val = 7;
1747 break;
1748 case SAMPLING_RATE_48KHZ:
1749 sample_rate_val = 6;
1750 break;
1751 case SAMPLING_RATE_44P1KHZ:
1752 sample_rate_val = 5;
1753 break;
1754 case SAMPLING_RATE_32KHZ:
1755 sample_rate_val = 4;
1756 break;
1757 case SAMPLING_RATE_22P05KHZ:
1758 sample_rate_val = 3;
1759 break;
1760 case SAMPLING_RATE_16KHZ:
1761 sample_rate_val = 2;
1762 break;
1763 case SAMPLING_RATE_11P025KHZ:
1764 sample_rate_val = 1;
1765 break;
1766 case SAMPLING_RATE_8KHZ:
1767 default:
1768 sample_rate_val = 0;
1769 break;
1770 }
1771
1772 ucontrol->value.integer.value[0] = sample_rate_val;
1773 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1774 usb_rx_cfg.sample_rate);
1775 return 0;
1776}
1777
1778static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1779 struct snd_ctl_elem_value *ucontrol)
1780{
1781 switch (ucontrol->value.integer.value[0]) {
1782 case 12:
1783 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1784 break;
1785 case 11:
1786 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1787 break;
1788 case 10:
1789 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1790 break;
1791 case 9:
1792 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1793 break;
1794 case 8:
1795 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1796 break;
1797 case 7:
1798 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1799 break;
1800 case 6:
1801 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1802 break;
1803 case 5:
1804 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1805 break;
1806 case 4:
1807 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1808 break;
1809 case 3:
1810 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1811 break;
1812 case 2:
1813 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1814 break;
1815 case 1:
1816 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1817 break;
1818 case 0:
1819 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1820 break;
1821 default:
1822 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1823 break;
1824 }
1825
1826 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1827 __func__, ucontrol->value.integer.value[0],
1828 usb_rx_cfg.sample_rate);
1829 return 0;
1830}
1831
1832static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1833 struct snd_ctl_elem_value *ucontrol)
1834{
1835 switch (usb_rx_cfg.bit_format) {
1836 case SNDRV_PCM_FORMAT_S32_LE:
1837 ucontrol->value.integer.value[0] = 3;
1838 break;
1839 case SNDRV_PCM_FORMAT_S24_3LE:
1840 ucontrol->value.integer.value[0] = 2;
1841 break;
1842 case SNDRV_PCM_FORMAT_S24_LE:
1843 ucontrol->value.integer.value[0] = 1;
1844 break;
1845 case SNDRV_PCM_FORMAT_S16_LE:
1846 default:
1847 ucontrol->value.integer.value[0] = 0;
1848 break;
1849 }
1850
1851 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1852 __func__, usb_rx_cfg.bit_format,
1853 ucontrol->value.integer.value[0]);
1854 return 0;
1855}
1856
1857static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1858 struct snd_ctl_elem_value *ucontrol)
1859{
1860 int rc = 0;
1861
1862 switch (ucontrol->value.integer.value[0]) {
1863 case 3:
1864 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1865 break;
1866 case 2:
1867 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1868 break;
1869 case 1:
1870 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1871 break;
1872 case 0:
1873 default:
1874 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1875 break;
1876 }
1877 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1878 __func__, usb_rx_cfg.bit_format,
1879 ucontrol->value.integer.value[0]);
1880
1881 return rc;
1882}
1883
1884static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1885 struct snd_ctl_elem_value *ucontrol)
1886{
1887 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1888 usb_tx_cfg.channels);
1889 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1890 return 0;
1891}
1892
1893static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1894 struct snd_ctl_elem_value *ucontrol)
1895{
1896 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1897
1898 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1899 return 1;
1900}
1901
1902static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1903 struct snd_ctl_elem_value *ucontrol)
1904{
1905 int sample_rate_val;
1906
1907 switch (usb_tx_cfg.sample_rate) {
1908 case SAMPLING_RATE_384KHZ:
1909 sample_rate_val = 12;
1910 break;
1911 case SAMPLING_RATE_352P8KHZ:
1912 sample_rate_val = 11;
1913 break;
1914 case SAMPLING_RATE_192KHZ:
1915 sample_rate_val = 10;
1916 break;
1917 case SAMPLING_RATE_176P4KHZ:
1918 sample_rate_val = 9;
1919 break;
1920 case SAMPLING_RATE_96KHZ:
1921 sample_rate_val = 8;
1922 break;
1923 case SAMPLING_RATE_88P2KHZ:
1924 sample_rate_val = 7;
1925 break;
1926 case SAMPLING_RATE_48KHZ:
1927 sample_rate_val = 6;
1928 break;
1929 case SAMPLING_RATE_44P1KHZ:
1930 sample_rate_val = 5;
1931 break;
1932 case SAMPLING_RATE_32KHZ:
1933 sample_rate_val = 4;
1934 break;
1935 case SAMPLING_RATE_22P05KHZ:
1936 sample_rate_val = 3;
1937 break;
1938 case SAMPLING_RATE_16KHZ:
1939 sample_rate_val = 2;
1940 break;
1941 case SAMPLING_RATE_11P025KHZ:
1942 sample_rate_val = 1;
1943 break;
1944 case SAMPLING_RATE_8KHZ:
1945 sample_rate_val = 0;
1946 break;
1947 default:
1948 sample_rate_val = 6;
1949 break;
1950 }
1951
1952 ucontrol->value.integer.value[0] = sample_rate_val;
1953 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1954 usb_tx_cfg.sample_rate);
1955 return 0;
1956}
1957
1958static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1959 struct snd_ctl_elem_value *ucontrol)
1960{
1961 switch (ucontrol->value.integer.value[0]) {
1962 case 12:
1963 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1964 break;
1965 case 11:
1966 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1967 break;
1968 case 10:
1969 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1970 break;
1971 case 9:
1972 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1973 break;
1974 case 8:
1975 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1976 break;
1977 case 7:
1978 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1979 break;
1980 case 6:
1981 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1982 break;
1983 case 5:
1984 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1985 break;
1986 case 4:
1987 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1988 break;
1989 case 3:
1990 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1991 break;
1992 case 2:
1993 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1994 break;
1995 case 1:
1996 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1997 break;
1998 case 0:
1999 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
2000 break;
2001 default:
2002 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2003 break;
2004 }
2005
2006 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
2007 __func__, ucontrol->value.integer.value[0],
2008 usb_tx_cfg.sample_rate);
2009 return 0;
2010}
2011
2012static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
2013 struct snd_ctl_elem_value *ucontrol)
2014{
2015 switch (usb_tx_cfg.bit_format) {
2016 case SNDRV_PCM_FORMAT_S32_LE:
2017 ucontrol->value.integer.value[0] = 3;
2018 break;
2019 case SNDRV_PCM_FORMAT_S24_3LE:
2020 ucontrol->value.integer.value[0] = 2;
2021 break;
2022 case SNDRV_PCM_FORMAT_S24_LE:
2023 ucontrol->value.integer.value[0] = 1;
2024 break;
2025 case SNDRV_PCM_FORMAT_S16_LE:
2026 default:
2027 ucontrol->value.integer.value[0] = 0;
2028 break;
2029 }
2030
2031 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2032 __func__, usb_tx_cfg.bit_format,
2033 ucontrol->value.integer.value[0]);
2034 return 0;
2035}
2036
2037static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
2038 struct snd_ctl_elem_value *ucontrol)
2039{
2040 int rc = 0;
2041
2042 switch (ucontrol->value.integer.value[0]) {
2043 case 3:
2044 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2045 break;
2046 case 2:
2047 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2048 break;
2049 case 1:
2050 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2051 break;
2052 case 0:
2053 default:
2054 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2055 break;
2056 }
2057 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2058 __func__, usb_tx_cfg.bit_format,
2059 ucontrol->value.integer.value[0]);
2060
2061 return rc;
2062}
2063
2064static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2065{
2066 int idx;
2067
2068 if (strnstr(kcontrol->id.name, "Display Port RX",
2069 sizeof("Display Port RX"))) {
2070 idx = DP_RX_IDX;
2071 } else {
2072 pr_err("%s: unsupported BE: %s\n",
2073 __func__, kcontrol->id.name);
2074 idx = -EINVAL;
2075 }
2076
2077 return idx;
2078}
2079
2080static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2081 struct snd_ctl_elem_value *ucontrol)
2082{
2083 int idx = ext_disp_get_port_idx(kcontrol);
2084
2085 if (idx < 0)
2086 return idx;
2087
2088 switch (ext_disp_rx_cfg[idx].bit_format) {
2089 case SNDRV_PCM_FORMAT_S24_3LE:
2090 ucontrol->value.integer.value[0] = 2;
2091 break;
2092 case SNDRV_PCM_FORMAT_S24_LE:
2093 ucontrol->value.integer.value[0] = 1;
2094 break;
2095 case SNDRV_PCM_FORMAT_S16_LE:
2096 default:
2097 ucontrol->value.integer.value[0] = 0;
2098 break;
2099 }
2100
2101 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2102 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2103 ucontrol->value.integer.value[0]);
2104 return 0;
2105}
2106
2107static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2108 struct snd_ctl_elem_value *ucontrol)
2109{
2110 int idx = ext_disp_get_port_idx(kcontrol);
2111
2112 if (idx < 0)
2113 return idx;
2114
2115 switch (ucontrol->value.integer.value[0]) {
2116 case 2:
2117 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2118 break;
2119 case 1:
2120 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2121 break;
2122 case 0:
2123 default:
2124 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2125 break;
2126 }
2127 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2128 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2129 ucontrol->value.integer.value[0]);
2130
2131 return 0;
2132}
2133
2134static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2135 struct snd_ctl_elem_value *ucontrol)
2136{
2137 int idx = ext_disp_get_port_idx(kcontrol);
2138
2139 if (idx < 0)
2140 return idx;
2141
2142 ucontrol->value.integer.value[0] =
2143 ext_disp_rx_cfg[idx].channels - 2;
2144
2145 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2146 idx, ext_disp_rx_cfg[idx].channels);
2147
2148 return 0;
2149}
2150
2151static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2152 struct snd_ctl_elem_value *ucontrol)
2153{
2154 int idx = ext_disp_get_port_idx(kcontrol);
2155
2156 if (idx < 0)
2157 return idx;
2158
2159 ext_disp_rx_cfg[idx].channels =
2160 ucontrol->value.integer.value[0] + 2;
2161
2162 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2163 idx, ext_disp_rx_cfg[idx].channels);
2164 return 1;
2165}
2166
2167static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2168 struct snd_ctl_elem_value *ucontrol)
2169{
2170 int sample_rate_val;
2171 int idx = ext_disp_get_port_idx(kcontrol);
2172
2173 if (idx < 0)
2174 return idx;
2175
2176 switch (ext_disp_rx_cfg[idx].sample_rate) {
2177 case SAMPLING_RATE_176P4KHZ:
2178 sample_rate_val = 6;
2179 break;
2180
2181 case SAMPLING_RATE_88P2KHZ:
2182 sample_rate_val = 5;
2183 break;
2184
2185 case SAMPLING_RATE_44P1KHZ:
2186 sample_rate_val = 4;
2187 break;
2188
2189 case SAMPLING_RATE_32KHZ:
2190 sample_rate_val = 3;
2191 break;
2192
2193 case SAMPLING_RATE_192KHZ:
2194 sample_rate_val = 2;
2195 break;
2196
2197 case SAMPLING_RATE_96KHZ:
2198 sample_rate_val = 1;
2199 break;
2200
2201 case SAMPLING_RATE_48KHZ:
2202 default:
2203 sample_rate_val = 0;
2204 break;
2205 }
2206
2207 ucontrol->value.integer.value[0] = sample_rate_val;
2208 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2209 idx, ext_disp_rx_cfg[idx].sample_rate);
2210
2211 return 0;
2212}
2213
2214static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2215 struct snd_ctl_elem_value *ucontrol)
2216{
2217 int idx = ext_disp_get_port_idx(kcontrol);
2218
2219 if (idx < 0)
2220 return idx;
2221
2222 switch (ucontrol->value.integer.value[0]) {
2223 case 6:
2224 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2225 break;
2226 case 5:
2227 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2228 break;
2229 case 4:
2230 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2231 break;
2232 case 3:
2233 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2234 break;
2235 case 2:
2236 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2237 break;
2238 case 1:
2239 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2240 break;
2241 case 0:
2242 default:
2243 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2244 break;
2245 }
2246
2247 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2248 __func__, ucontrol->value.integer.value[0], idx,
2249 ext_disp_rx_cfg[idx].sample_rate);
2250 return 0;
2251}
2252
2253static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2254 struct snd_ctl_elem_value *ucontrol)
2255{
2256 pr_debug("%s: proxy_rx channels = %d\n",
2257 __func__, proxy_rx_cfg.channels);
2258 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2259
2260 return 0;
2261}
2262
2263static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2264 struct snd_ctl_elem_value *ucontrol)
2265{
2266 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2267 pr_debug("%s: proxy_rx channels = %d\n",
2268 __func__, proxy_rx_cfg.channels);
2269
2270 return 1;
2271}
2272
2273static int tdm_get_sample_rate(int value)
2274{
2275 int sample_rate = 0;
2276
2277 switch (value) {
2278 case 0:
2279 sample_rate = SAMPLING_RATE_8KHZ;
2280 break;
2281 case 1:
2282 sample_rate = SAMPLING_RATE_16KHZ;
2283 break;
2284 case 2:
2285 sample_rate = SAMPLING_RATE_32KHZ;
2286 break;
2287 case 3:
2288 sample_rate = SAMPLING_RATE_48KHZ;
2289 break;
2290 case 4:
2291 sample_rate = SAMPLING_RATE_176P4KHZ;
2292 break;
2293 case 5:
2294 sample_rate = SAMPLING_RATE_352P8KHZ;
2295 break;
2296 default:
2297 sample_rate = SAMPLING_RATE_48KHZ;
2298 break;
2299 }
2300 return sample_rate;
2301}
2302
2303static int aux_pcm_get_sample_rate(int value)
2304{
2305 int sample_rate;
2306
2307 switch (value) {
2308 case 1:
2309 sample_rate = SAMPLING_RATE_16KHZ;
2310 break;
2311 case 0:
2312 default:
2313 sample_rate = SAMPLING_RATE_8KHZ;
2314 break;
2315 }
2316 return sample_rate;
2317}
2318
2319static int tdm_get_sample_rate_val(int sample_rate)
2320{
2321 int sample_rate_val = 0;
2322
2323 switch (sample_rate) {
2324 case SAMPLING_RATE_8KHZ:
2325 sample_rate_val = 0;
2326 break;
2327 case SAMPLING_RATE_16KHZ:
2328 sample_rate_val = 1;
2329 break;
2330 case SAMPLING_RATE_32KHZ:
2331 sample_rate_val = 2;
2332 break;
2333 case SAMPLING_RATE_48KHZ:
2334 sample_rate_val = 3;
2335 break;
2336 case SAMPLING_RATE_176P4KHZ:
2337 sample_rate_val = 4;
2338 break;
2339 case SAMPLING_RATE_352P8KHZ:
2340 sample_rate_val = 5;
2341 break;
2342 default:
2343 sample_rate_val = 3;
2344 break;
2345 }
2346 return sample_rate_val;
2347}
2348
2349static int aux_pcm_get_sample_rate_val(int sample_rate)
2350{
2351 int sample_rate_val;
2352
2353 switch (sample_rate) {
2354 case SAMPLING_RATE_16KHZ:
2355 sample_rate_val = 1;
2356 break;
2357 case SAMPLING_RATE_8KHZ:
2358 default:
2359 sample_rate_val = 0;
2360 break;
2361 }
2362 return sample_rate_val;
2363}
2364
2365static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2366 struct tdm_port *port)
2367{
2368 if (port) {
2369 if (strnstr(kcontrol->id.name, "PRI",
2370 sizeof(kcontrol->id.name))) {
2371 port->mode = TDM_PRI;
2372 } else if (strnstr(kcontrol->id.name, "SEC",
2373 sizeof(kcontrol->id.name))) {
2374 port->mode = TDM_SEC;
2375 } else if (strnstr(kcontrol->id.name, "TERT",
2376 sizeof(kcontrol->id.name))) {
2377 port->mode = TDM_TERT;
2378 } else if (strnstr(kcontrol->id.name, "QUAT",
2379 sizeof(kcontrol->id.name))) {
2380 port->mode = TDM_QUAT;
2381 } else if (strnstr(kcontrol->id.name, "QUIN",
2382 sizeof(kcontrol->id.name))) {
2383 port->mode = TDM_QUIN;
2384 } else {
2385 pr_err("%s: unsupported mode in: %s\n",
2386 __func__, kcontrol->id.name);
2387 return -EINVAL;
2388 }
2389
2390 if (strnstr(kcontrol->id.name, "RX_0",
2391 sizeof(kcontrol->id.name)) ||
2392 strnstr(kcontrol->id.name, "TX_0",
2393 sizeof(kcontrol->id.name))) {
2394 port->channel = TDM_0;
2395 } else if (strnstr(kcontrol->id.name, "RX_1",
2396 sizeof(kcontrol->id.name)) ||
2397 strnstr(kcontrol->id.name, "TX_1",
2398 sizeof(kcontrol->id.name))) {
2399 port->channel = TDM_1;
2400 } else if (strnstr(kcontrol->id.name, "RX_2",
2401 sizeof(kcontrol->id.name)) ||
2402 strnstr(kcontrol->id.name, "TX_2",
2403 sizeof(kcontrol->id.name))) {
2404 port->channel = TDM_2;
2405 } else if (strnstr(kcontrol->id.name, "RX_3",
2406 sizeof(kcontrol->id.name)) ||
2407 strnstr(kcontrol->id.name, "TX_3",
2408 sizeof(kcontrol->id.name))) {
2409 port->channel = TDM_3;
2410 } else if (strnstr(kcontrol->id.name, "RX_4",
2411 sizeof(kcontrol->id.name)) ||
2412 strnstr(kcontrol->id.name, "TX_4",
2413 sizeof(kcontrol->id.name))) {
2414 port->channel = TDM_4;
2415 } else if (strnstr(kcontrol->id.name, "RX_5",
2416 sizeof(kcontrol->id.name)) ||
2417 strnstr(kcontrol->id.name, "TX_5",
2418 sizeof(kcontrol->id.name))) {
2419 port->channel = TDM_5;
2420 } else if (strnstr(kcontrol->id.name, "RX_6",
2421 sizeof(kcontrol->id.name)) ||
2422 strnstr(kcontrol->id.name, "TX_6",
2423 sizeof(kcontrol->id.name))) {
2424 port->channel = TDM_6;
2425 } else if (strnstr(kcontrol->id.name, "RX_7",
2426 sizeof(kcontrol->id.name)) ||
2427 strnstr(kcontrol->id.name, "TX_7",
2428 sizeof(kcontrol->id.name))) {
2429 port->channel = TDM_7;
2430 } else {
2431 pr_err("%s: unsupported channel in: %s\n",
2432 __func__, kcontrol->id.name);
2433 return -EINVAL;
2434 }
2435 } else {
2436 return -EINVAL;
2437 }
2438 return 0;
2439}
2440
2441static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2442 struct snd_ctl_elem_value *ucontrol)
2443{
2444 struct tdm_port port;
2445 int ret = tdm_get_port_idx(kcontrol, &port);
2446
2447 if (ret) {
2448 pr_err("%s: unsupported control: %s\n",
2449 __func__, kcontrol->id.name);
2450 } else {
2451 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2452 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2453
2454 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2455 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2456 ucontrol->value.enumerated.item[0]);
2457 }
2458 return ret;
2459}
2460
2461static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2462 struct snd_ctl_elem_value *ucontrol)
2463{
2464 struct tdm_port port;
2465 int ret = tdm_get_port_idx(kcontrol, &port);
2466
2467 if (ret) {
2468 pr_err("%s: unsupported control: %s\n",
2469 __func__, kcontrol->id.name);
2470 } else {
2471 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2472 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2473
2474 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2475 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2476 ucontrol->value.enumerated.item[0]);
2477 }
2478 return ret;
2479}
2480
2481static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2482 struct snd_ctl_elem_value *ucontrol)
2483{
2484 struct tdm_port port;
2485 int ret = tdm_get_port_idx(kcontrol, &port);
2486
2487 if (ret) {
2488 pr_err("%s: unsupported control: %s\n",
2489 __func__, kcontrol->id.name);
2490 } else {
2491 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2492 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2493
2494 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2495 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2496 ucontrol->value.enumerated.item[0]);
2497 }
2498 return ret;
2499}
2500
2501static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2502 struct snd_ctl_elem_value *ucontrol)
2503{
2504 struct tdm_port port;
2505 int ret = tdm_get_port_idx(kcontrol, &port);
2506
2507 if (ret) {
2508 pr_err("%s: unsupported control: %s\n",
2509 __func__, kcontrol->id.name);
2510 } else {
2511 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2512 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2513
2514 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2515 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2516 ucontrol->value.enumerated.item[0]);
2517 }
2518 return ret;
2519}
2520
2521static int tdm_get_format(int value)
2522{
2523 int format = 0;
2524
2525 switch (value) {
2526 case 0:
2527 format = SNDRV_PCM_FORMAT_S16_LE;
2528 break;
2529 case 1:
2530 format = SNDRV_PCM_FORMAT_S24_LE;
2531 break;
2532 case 2:
2533 format = SNDRV_PCM_FORMAT_S32_LE;
2534 break;
2535 default:
2536 format = SNDRV_PCM_FORMAT_S16_LE;
2537 break;
2538 }
2539 return format;
2540}
2541
2542static int tdm_get_format_val(int format)
2543{
2544 int value = 0;
2545
2546 switch (format) {
2547 case SNDRV_PCM_FORMAT_S16_LE:
2548 value = 0;
2549 break;
2550 case SNDRV_PCM_FORMAT_S24_LE:
2551 value = 1;
2552 break;
2553 case SNDRV_PCM_FORMAT_S32_LE:
2554 value = 2;
2555 break;
2556 default:
2557 value = 0;
2558 break;
2559 }
2560 return value;
2561}
2562
2563static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2564 struct snd_ctl_elem_value *ucontrol)
2565{
2566 struct tdm_port port;
2567 int ret = tdm_get_port_idx(kcontrol, &port);
2568
2569 if (ret) {
2570 pr_err("%s: unsupported control: %s\n",
2571 __func__, kcontrol->id.name);
2572 } else {
2573 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2574 tdm_rx_cfg[port.mode][port.channel].bit_format);
2575
2576 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2577 tdm_rx_cfg[port.mode][port.channel].bit_format,
2578 ucontrol->value.enumerated.item[0]);
2579 }
2580 return ret;
2581}
2582
2583static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2584 struct snd_ctl_elem_value *ucontrol)
2585{
2586 struct tdm_port port;
2587 int ret = tdm_get_port_idx(kcontrol, &port);
2588
2589 if (ret) {
2590 pr_err("%s: unsupported control: %s\n",
2591 __func__, kcontrol->id.name);
2592 } else {
2593 tdm_rx_cfg[port.mode][port.channel].bit_format =
2594 tdm_get_format(ucontrol->value.enumerated.item[0]);
2595
2596 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2597 tdm_rx_cfg[port.mode][port.channel].bit_format,
2598 ucontrol->value.enumerated.item[0]);
2599 }
2600 return ret;
2601}
2602
2603static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2604 struct snd_ctl_elem_value *ucontrol)
2605{
2606 struct tdm_port port;
2607 int ret = tdm_get_port_idx(kcontrol, &port);
2608
2609 if (ret) {
2610 pr_err("%s: unsupported control: %s\n",
2611 __func__, kcontrol->id.name);
2612 } else {
2613 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2614 tdm_tx_cfg[port.mode][port.channel].bit_format);
2615
2616 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2617 tdm_tx_cfg[port.mode][port.channel].bit_format,
2618 ucontrol->value.enumerated.item[0]);
2619 }
2620 return ret;
2621}
2622
2623static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2624 struct snd_ctl_elem_value *ucontrol)
2625{
2626 struct tdm_port port;
2627 int ret = tdm_get_port_idx(kcontrol, &port);
2628
2629 if (ret) {
2630 pr_err("%s: unsupported control: %s\n",
2631 __func__, kcontrol->id.name);
2632 } else {
2633 tdm_tx_cfg[port.mode][port.channel].bit_format =
2634 tdm_get_format(ucontrol->value.enumerated.item[0]);
2635
2636 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2637 tdm_tx_cfg[port.mode][port.channel].bit_format,
2638 ucontrol->value.enumerated.item[0]);
2639 }
2640 return ret;
2641}
2642
2643static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2644 struct snd_ctl_elem_value *ucontrol)
2645{
2646 struct tdm_port port;
2647 int ret = tdm_get_port_idx(kcontrol, &port);
2648
2649 if (ret) {
2650 pr_err("%s: unsupported control: %s\n",
2651 __func__, kcontrol->id.name);
2652 } else {
2653
2654 ucontrol->value.enumerated.item[0] =
2655 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2656
2657 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2658 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2659 ucontrol->value.enumerated.item[0]);
2660 }
2661 return ret;
2662}
2663
2664static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2665 struct snd_ctl_elem_value *ucontrol)
2666{
2667 struct tdm_port port;
2668 int ret = tdm_get_port_idx(kcontrol, &port);
2669
2670 if (ret) {
2671 pr_err("%s: unsupported control: %s\n",
2672 __func__, kcontrol->id.name);
2673 } else {
2674 tdm_rx_cfg[port.mode][port.channel].channels =
2675 ucontrol->value.enumerated.item[0] + 1;
2676
2677 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2678 tdm_rx_cfg[port.mode][port.channel].channels,
2679 ucontrol->value.enumerated.item[0] + 1);
2680 }
2681 return ret;
2682}
2683
2684static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2685 struct snd_ctl_elem_value *ucontrol)
2686{
2687 struct tdm_port port;
2688 int ret = tdm_get_port_idx(kcontrol, &port);
2689
2690 if (ret) {
2691 pr_err("%s: unsupported control: %s\n",
2692 __func__, kcontrol->id.name);
2693 } else {
2694 ucontrol->value.enumerated.item[0] =
2695 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2696
2697 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2698 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2699 ucontrol->value.enumerated.item[0]);
2700 }
2701 return ret;
2702}
2703
2704static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2705 struct snd_ctl_elem_value *ucontrol)
2706{
2707 struct tdm_port port;
2708 int ret = tdm_get_port_idx(kcontrol, &port);
2709
2710 if (ret) {
2711 pr_err("%s: unsupported control: %s\n",
2712 __func__, kcontrol->id.name);
2713 } else {
2714 tdm_tx_cfg[port.mode][port.channel].channels =
2715 ucontrol->value.enumerated.item[0] + 1;
2716
2717 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2718 tdm_tx_cfg[port.mode][port.channel].channels,
2719 ucontrol->value.enumerated.item[0] + 1);
2720 }
2721 return ret;
2722}
2723
2724static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2725{
2726 int idx;
2727
2728 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2729 sizeof("PRIM_AUX_PCM"))) {
2730 idx = PRIM_AUX_PCM;
2731 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2732 sizeof("SEC_AUX_PCM"))) {
2733 idx = SEC_AUX_PCM;
2734 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2735 sizeof("TERT_AUX_PCM"))) {
2736 idx = TERT_AUX_PCM;
2737 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2738 sizeof("QUAT_AUX_PCM"))) {
2739 idx = QUAT_AUX_PCM;
2740 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2741 sizeof("QUIN_AUX_PCM"))) {
2742 idx = QUIN_AUX_PCM;
2743 } else {
2744 pr_err("%s: unsupported port: %s\n",
2745 __func__, kcontrol->id.name);
2746 idx = -EINVAL;
2747 }
2748
2749 return idx;
2750}
2751
2752static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2753 struct snd_ctl_elem_value *ucontrol)
2754{
2755 int idx = aux_pcm_get_port_idx(kcontrol);
2756
2757 if (idx < 0)
2758 return idx;
2759
2760 aux_pcm_rx_cfg[idx].sample_rate =
2761 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2762
2763 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2764 idx, aux_pcm_rx_cfg[idx].sample_rate,
2765 ucontrol->value.enumerated.item[0]);
2766
2767 return 0;
2768}
2769
2770static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2771 struct snd_ctl_elem_value *ucontrol)
2772{
2773 int idx = aux_pcm_get_port_idx(kcontrol);
2774
2775 if (idx < 0)
2776 return idx;
2777
2778 ucontrol->value.enumerated.item[0] =
2779 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2780
2781 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2782 idx, aux_pcm_rx_cfg[idx].sample_rate,
2783 ucontrol->value.enumerated.item[0]);
2784
2785 return 0;
2786}
2787
2788static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2789 struct snd_ctl_elem_value *ucontrol)
2790{
2791 int idx = aux_pcm_get_port_idx(kcontrol);
2792
2793 if (idx < 0)
2794 return idx;
2795
2796 aux_pcm_tx_cfg[idx].sample_rate =
2797 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2798
2799 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2800 idx, aux_pcm_tx_cfg[idx].sample_rate,
2801 ucontrol->value.enumerated.item[0]);
2802
2803 return 0;
2804}
2805
2806static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2807 struct snd_ctl_elem_value *ucontrol)
2808{
2809 int idx = aux_pcm_get_port_idx(kcontrol);
2810
2811 if (idx < 0)
2812 return idx;
2813
2814 ucontrol->value.enumerated.item[0] =
2815 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2816
2817 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2818 idx, aux_pcm_tx_cfg[idx].sample_rate,
2819 ucontrol->value.enumerated.item[0]);
2820
2821 return 0;
2822}
2823
2824static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2825{
2826 int idx;
2827
2828 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2829 sizeof("PRIM_MI2S_RX"))) {
2830 idx = PRIM_MI2S;
2831 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2832 sizeof("SEC_MI2S_RX"))) {
2833 idx = SEC_MI2S;
2834 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2835 sizeof("TERT_MI2S_RX"))) {
2836 idx = TERT_MI2S;
2837 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2838 sizeof("QUAT_MI2S_RX"))) {
2839 idx = QUAT_MI2S;
2840 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2841 sizeof("QUIN_MI2S_RX"))) {
2842 idx = QUIN_MI2S;
2843 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2844 sizeof("PRIM_MI2S_TX"))) {
2845 idx = PRIM_MI2S;
2846 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2847 sizeof("SEC_MI2S_TX"))) {
2848 idx = SEC_MI2S;
2849 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2850 sizeof("TERT_MI2S_TX"))) {
2851 idx = TERT_MI2S;
2852 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2853 sizeof("QUAT_MI2S_TX"))) {
2854 idx = QUAT_MI2S;
2855 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2856 sizeof("QUIN_MI2S_TX"))) {
2857 idx = QUIN_MI2S;
2858 } else {
2859 pr_err("%s: unsupported channel: %s\n",
2860 __func__, kcontrol->id.name);
2861 idx = -EINVAL;
2862 }
2863
2864 return idx;
2865}
2866
2867static int mi2s_get_sample_rate_val(int sample_rate)
2868{
2869 int sample_rate_val;
2870
2871 switch (sample_rate) {
2872 case SAMPLING_RATE_8KHZ:
2873 sample_rate_val = 0;
2874 break;
2875 case SAMPLING_RATE_11P025KHZ:
2876 sample_rate_val = 1;
2877 break;
2878 case SAMPLING_RATE_16KHZ:
2879 sample_rate_val = 2;
2880 break;
2881 case SAMPLING_RATE_22P05KHZ:
2882 sample_rate_val = 3;
2883 break;
2884 case SAMPLING_RATE_32KHZ:
2885 sample_rate_val = 4;
2886 break;
2887 case SAMPLING_RATE_44P1KHZ:
2888 sample_rate_val = 5;
2889 break;
2890 case SAMPLING_RATE_48KHZ:
2891 sample_rate_val = 6;
2892 break;
2893 case SAMPLING_RATE_96KHZ:
2894 sample_rate_val = 7;
2895 break;
2896 case SAMPLING_RATE_192KHZ:
2897 sample_rate_val = 8;
2898 break;
2899 default:
2900 sample_rate_val = 6;
2901 break;
2902 }
2903 return sample_rate_val;
2904}
2905
2906static int mi2s_get_sample_rate(int value)
2907{
2908 int sample_rate;
2909
2910 switch (value) {
2911 case 0:
2912 sample_rate = SAMPLING_RATE_8KHZ;
2913 break;
2914 case 1:
2915 sample_rate = SAMPLING_RATE_11P025KHZ;
2916 break;
2917 case 2:
2918 sample_rate = SAMPLING_RATE_16KHZ;
2919 break;
2920 case 3:
2921 sample_rate = SAMPLING_RATE_22P05KHZ;
2922 break;
2923 case 4:
2924 sample_rate = SAMPLING_RATE_32KHZ;
2925 break;
2926 case 5:
2927 sample_rate = SAMPLING_RATE_44P1KHZ;
2928 break;
2929 case 6:
2930 sample_rate = SAMPLING_RATE_48KHZ;
2931 break;
2932 case 7:
2933 sample_rate = SAMPLING_RATE_96KHZ;
2934 break;
2935 case 8:
2936 sample_rate = SAMPLING_RATE_192KHZ;
2937 break;
2938 default:
2939 sample_rate = SAMPLING_RATE_48KHZ;
2940 break;
2941 }
2942 return sample_rate;
2943}
2944
2945static int mi2s_auxpcm_get_format(int value)
2946{
2947 int format;
2948
2949 switch (value) {
2950 case 0:
2951 format = SNDRV_PCM_FORMAT_S16_LE;
2952 break;
2953 case 1:
2954 format = SNDRV_PCM_FORMAT_S24_LE;
2955 break;
2956 case 2:
2957 format = SNDRV_PCM_FORMAT_S24_3LE;
2958 break;
2959 case 3:
2960 format = SNDRV_PCM_FORMAT_S32_LE;
2961 break;
2962 default:
2963 format = SNDRV_PCM_FORMAT_S16_LE;
2964 break;
2965 }
2966 return format;
2967}
2968
2969static int mi2s_auxpcm_get_format_value(int format)
2970{
2971 int value;
2972
2973 switch (format) {
2974 case SNDRV_PCM_FORMAT_S16_LE:
2975 value = 0;
2976 break;
2977 case SNDRV_PCM_FORMAT_S24_LE:
2978 value = 1;
2979 break;
2980 case SNDRV_PCM_FORMAT_S24_3LE:
2981 value = 2;
2982 break;
2983 case SNDRV_PCM_FORMAT_S32_LE:
2984 value = 3;
2985 break;
2986 default:
2987 value = 0;
2988 break;
2989 }
2990 return value;
2991}
2992
2993static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2994 struct snd_ctl_elem_value *ucontrol)
2995{
2996 int idx = mi2s_get_port_idx(kcontrol);
2997
2998 if (idx < 0)
2999 return idx;
3000
3001 mi2s_rx_cfg[idx].sample_rate =
3002 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3003
3004 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3005 idx, mi2s_rx_cfg[idx].sample_rate,
3006 ucontrol->value.enumerated.item[0]);
3007
3008 return 0;
3009}
3010
3011static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3012 struct snd_ctl_elem_value *ucontrol)
3013{
3014 int idx = mi2s_get_port_idx(kcontrol);
3015
3016 if (idx < 0)
3017 return idx;
3018
3019 ucontrol->value.enumerated.item[0] =
3020 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
3021
3022 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3023 idx, mi2s_rx_cfg[idx].sample_rate,
3024 ucontrol->value.enumerated.item[0]);
3025
3026 return 0;
3027}
3028
3029static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3030 struct snd_ctl_elem_value *ucontrol)
3031{
3032 int idx = mi2s_get_port_idx(kcontrol);
3033
3034 if (idx < 0)
3035 return idx;
3036
3037 mi2s_tx_cfg[idx].sample_rate =
3038 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3039
3040 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3041 idx, mi2s_tx_cfg[idx].sample_rate,
3042 ucontrol->value.enumerated.item[0]);
3043
3044 return 0;
3045}
3046
3047static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3048 struct snd_ctl_elem_value *ucontrol)
3049{
3050 int idx = mi2s_get_port_idx(kcontrol);
3051
3052 if (idx < 0)
3053 return idx;
3054
3055 ucontrol->value.enumerated.item[0] =
3056 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3057
3058 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3059 idx, mi2s_tx_cfg[idx].sample_rate,
3060 ucontrol->value.enumerated.item[0]);
3061
3062 return 0;
3063}
3064
3065static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3066 struct snd_ctl_elem_value *ucontrol)
3067{
3068 int idx = mi2s_get_port_idx(kcontrol);
3069
3070 if (idx < 0)
3071 return idx;
3072
3073 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3074 idx, mi2s_rx_cfg[idx].channels);
3075 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3076
3077 return 0;
3078}
3079
3080static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3081 struct snd_ctl_elem_value *ucontrol)
3082{
3083 int idx = mi2s_get_port_idx(kcontrol);
3084
3085 if (idx < 0)
3086 return idx;
3087
3088 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3089 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3090 idx, mi2s_rx_cfg[idx].channels);
3091
3092 return 1;
3093}
3094
3095static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3096 struct snd_ctl_elem_value *ucontrol)
3097{
3098 int idx = mi2s_get_port_idx(kcontrol);
3099
3100 if (idx < 0)
3101 return idx;
3102
3103 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3104 idx, mi2s_tx_cfg[idx].channels);
3105 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3106
3107 return 0;
3108}
3109
3110static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3111 struct snd_ctl_elem_value *ucontrol)
3112{
3113 int idx = mi2s_get_port_idx(kcontrol);
3114
3115 if (idx < 0)
3116 return idx;
3117
3118 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3119 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3120 idx, mi2s_tx_cfg[idx].channels);
3121
3122 return 1;
3123}
3124
3125static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3126 struct snd_ctl_elem_value *ucontrol)
3127{
3128 int idx = mi2s_get_port_idx(kcontrol);
3129
3130 if (idx < 0)
3131 return idx;
3132
3133 ucontrol->value.enumerated.item[0] =
3134 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3135
3136 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3137 idx, mi2s_rx_cfg[idx].bit_format,
3138 ucontrol->value.enumerated.item[0]);
3139
3140 return 0;
3141}
3142
3143static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3144 struct snd_ctl_elem_value *ucontrol)
3145{
3146 int idx = mi2s_get_port_idx(kcontrol);
3147
3148 if (idx < 0)
3149 return idx;
3150
3151 mi2s_rx_cfg[idx].bit_format =
3152 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3153
3154 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3155 idx, mi2s_rx_cfg[idx].bit_format,
3156 ucontrol->value.enumerated.item[0]);
3157
3158 return 0;
3159}
3160
3161static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3162 struct snd_ctl_elem_value *ucontrol)
3163{
3164 int idx = mi2s_get_port_idx(kcontrol);
3165
3166 if (idx < 0)
3167 return idx;
3168
3169 ucontrol->value.enumerated.item[0] =
3170 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3171
3172 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3173 idx, mi2s_tx_cfg[idx].bit_format,
3174 ucontrol->value.enumerated.item[0]);
3175
3176 return 0;
3177}
3178
3179static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3180 struct snd_ctl_elem_value *ucontrol)
3181{
3182 int idx = mi2s_get_port_idx(kcontrol);
3183
3184 if (idx < 0)
3185 return idx;
3186
3187 mi2s_tx_cfg[idx].bit_format =
3188 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3189
3190 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3191 idx, mi2s_tx_cfg[idx].bit_format,
3192 ucontrol->value.enumerated.item[0]);
3193
3194 return 0;
3195}
3196
3197static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3198 struct snd_ctl_elem_value *ucontrol)
3199{
3200 int idx = aux_pcm_get_port_idx(kcontrol);
3201
3202 if (idx < 0)
3203 return idx;
3204
3205 ucontrol->value.enumerated.item[0] =
3206 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3207
3208 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3209 idx, aux_pcm_rx_cfg[idx].bit_format,
3210 ucontrol->value.enumerated.item[0]);
3211
3212 return 0;
3213}
3214
3215static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3216 struct snd_ctl_elem_value *ucontrol)
3217{
3218 int idx = aux_pcm_get_port_idx(kcontrol);
3219
3220 if (idx < 0)
3221 return idx;
3222
3223 aux_pcm_rx_cfg[idx].bit_format =
3224 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3225
3226 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3227 idx, aux_pcm_rx_cfg[idx].bit_format,
3228 ucontrol->value.enumerated.item[0]);
3229
3230 return 0;
3231}
3232
3233static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3234 struct snd_ctl_elem_value *ucontrol)
3235{
3236 int idx = aux_pcm_get_port_idx(kcontrol);
3237
3238 if (idx < 0)
3239 return idx;
3240
3241 ucontrol->value.enumerated.item[0] =
3242 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3243
3244 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3245 idx, aux_pcm_tx_cfg[idx].bit_format,
3246 ucontrol->value.enumerated.item[0]);
3247
3248 return 0;
3249}
3250
3251static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3252 struct snd_ctl_elem_value *ucontrol)
3253{
3254 int idx = aux_pcm_get_port_idx(kcontrol);
3255
3256 if (idx < 0)
3257 return idx;
3258
3259 aux_pcm_tx_cfg[idx].bit_format =
3260 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3261
3262 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3263 idx, aux_pcm_tx_cfg[idx].bit_format,
3264 ucontrol->value.enumerated.item[0]);
3265
3266 return 0;
3267}
3268
3269static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3270{
3271 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3272 struct snd_soc_card *card = codec->component.card;
3273 struct msm_asoc_mach_data *pdata =
3274 snd_soc_card_get_drvdata(card);
3275
3276 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3277 msm_hifi_control);
3278
3279 if (!pdata || !pdata->hph_en1_gpio_p) {
3280 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3281 return -EINVAL;
3282 }
3283 if (msm_hifi_control == MSM_HIFI_ON) {
3284 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3285 /* 5msec delay needed as per HW requirement */
3286 usleep_range(5000, 5010);
3287 } else {
3288 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3289 }
3290 snd_soc_dapm_sync(dapm);
3291
3292 return 0;
3293}
3294
3295static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3296 struct snd_ctl_elem_value *ucontrol)
3297{
3298 pr_debug("%s: msm_hifi_control = %d\n",
3299 __func__, msm_hifi_control);
3300 ucontrol->value.integer.value[0] = msm_hifi_control;
3301
3302 return 0;
3303}
3304
3305static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3306 struct snd_ctl_elem_value *ucontrol)
3307{
3308 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3309
3310 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3311 __func__, ucontrol->value.integer.value[0]);
3312
3313 msm_hifi_control = ucontrol->value.integer.value[0];
3314 msm_hifi_ctrl(codec);
3315
3316 return 0;
3317}
3318
3319static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3320 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3321 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3322 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3323 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3324 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3325 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3326 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3327 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3328 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3329 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3330 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3331 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3332 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3333 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3334 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3335 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3336 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3337 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3338 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3339 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3340 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3341 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3342 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3343 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3344 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3345 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3346 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3347 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3348 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3349 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3350 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3351 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3352 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3353 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3354 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3355 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3356 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3357 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3358 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3359 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3360 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3361 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3362 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3363 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3364 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3365 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3366 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3367 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3368 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3369 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3370 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3371 wsa_cdc_dma_rx_0_sample_rate,
3372 cdc_dma_rx_sample_rate_get,
3373 cdc_dma_rx_sample_rate_put),
3374 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3375 wsa_cdc_dma_rx_1_sample_rate,
3376 cdc_dma_rx_sample_rate_get,
3377 cdc_dma_rx_sample_rate_put),
3378 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3379 rx_cdc_dma_rx_0_sample_rate,
3380 cdc_dma_rx_sample_rate_get,
3381 cdc_dma_rx_sample_rate_put),
3382 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3383 rx_cdc_dma_rx_1_sample_rate,
3384 cdc_dma_rx_sample_rate_get,
3385 cdc_dma_rx_sample_rate_put),
3386 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3387 rx_cdc_dma_rx_2_sample_rate,
3388 cdc_dma_rx_sample_rate_get,
3389 cdc_dma_rx_sample_rate_put),
3390 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3391 rx_cdc_dma_rx_3_sample_rate,
3392 cdc_dma_rx_sample_rate_get,
3393 cdc_dma_rx_sample_rate_put),
3394 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3395 rx_cdc_dma_rx_5_sample_rate,
3396 cdc_dma_rx_sample_rate_get,
3397 cdc_dma_rx_sample_rate_put),
3398 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3399 wsa_cdc_dma_tx_0_sample_rate,
3400 cdc_dma_tx_sample_rate_get,
3401 cdc_dma_tx_sample_rate_put),
3402 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3403 wsa_cdc_dma_tx_1_sample_rate,
3404 cdc_dma_tx_sample_rate_get,
3405 cdc_dma_tx_sample_rate_put),
3406 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3407 wsa_cdc_dma_tx_2_sample_rate,
3408 cdc_dma_tx_sample_rate_get,
3409 cdc_dma_tx_sample_rate_put),
3410 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3411 tx_cdc_dma_tx_0_sample_rate,
3412 cdc_dma_tx_sample_rate_get,
3413 cdc_dma_tx_sample_rate_put),
3414 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3415 tx_cdc_dma_tx_3_sample_rate,
3416 cdc_dma_tx_sample_rate_get,
3417 cdc_dma_tx_sample_rate_put),
3418 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3419 tx_cdc_dma_tx_4_sample_rate,
3420 cdc_dma_tx_sample_rate_get,
3421 cdc_dma_tx_sample_rate_put),
3422};
3423
3424static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3425 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3426 slim_rx_ch_get, slim_rx_ch_put),
3427 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3428 slim_rx_ch_get, slim_rx_ch_put),
3429 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3430 slim_tx_ch_get, slim_tx_ch_put),
3431 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3432 slim_tx_ch_get, slim_tx_ch_put),
3433 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3434 slim_rx_ch_get, slim_rx_ch_put),
3435 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3436 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3437 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3438 slim_rx_bit_format_get, slim_rx_bit_format_put),
3439 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3440 slim_rx_bit_format_get, slim_rx_bit_format_put),
3441 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3442 slim_rx_bit_format_get, slim_rx_bit_format_put),
3443 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3444 slim_tx_bit_format_get, slim_tx_bit_format_put),
3445 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3446 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3447 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3448 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3449 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3450 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3451 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3452 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3453 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3454 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3455};
3456
3457static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3458 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3459 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3460 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3461 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3462 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3463 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3464 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3465 proxy_rx_ch_get, proxy_rx_ch_put),
3466 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3467 usb_audio_rx_format_get, usb_audio_rx_format_put),
3468 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3469 usb_audio_tx_format_get, usb_audio_tx_format_put),
3470 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3471 ext_disp_rx_format_get, ext_disp_rx_format_put),
3472 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3473 usb_audio_rx_sample_rate_get,
3474 usb_audio_rx_sample_rate_put),
3475 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3476 usb_audio_tx_sample_rate_get,
3477 usb_audio_tx_sample_rate_put),
3478 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3479 ext_disp_rx_sample_rate_get,
3480 ext_disp_rx_sample_rate_put),
3481 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3482 tdm_rx_sample_rate_get,
3483 tdm_rx_sample_rate_put),
3484 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3485 tdm_tx_sample_rate_get,
3486 tdm_tx_sample_rate_put),
3487 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3488 tdm_rx_format_get,
3489 tdm_rx_format_put),
3490 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3491 tdm_tx_format_get,
3492 tdm_tx_format_put),
3493 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3494 tdm_rx_ch_get,
3495 tdm_rx_ch_put),
3496 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3497 tdm_tx_ch_get,
3498 tdm_tx_ch_put),
3499 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3500 tdm_rx_sample_rate_get,
3501 tdm_rx_sample_rate_put),
3502 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3503 tdm_tx_sample_rate_get,
3504 tdm_tx_sample_rate_put),
3505 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3506 tdm_rx_format_get,
3507 tdm_rx_format_put),
3508 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3509 tdm_tx_format_get,
3510 tdm_tx_format_put),
3511 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3512 tdm_rx_ch_get,
3513 tdm_rx_ch_put),
3514 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3515 tdm_tx_ch_get,
3516 tdm_tx_ch_put),
3517 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3518 tdm_rx_sample_rate_get,
3519 tdm_rx_sample_rate_put),
3520 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3521 tdm_tx_sample_rate_get,
3522 tdm_tx_sample_rate_put),
3523 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3524 tdm_rx_format_get,
3525 tdm_rx_format_put),
3526 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3527 tdm_tx_format_get,
3528 tdm_tx_format_put),
3529 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3530 tdm_rx_ch_get,
3531 tdm_rx_ch_put),
3532 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3533 tdm_tx_ch_get,
3534 tdm_tx_ch_put),
3535 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3536 tdm_rx_sample_rate_get,
3537 tdm_rx_sample_rate_put),
3538 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3539 tdm_tx_sample_rate_get,
3540 tdm_tx_sample_rate_put),
3541 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3542 tdm_rx_format_get,
3543 tdm_rx_format_put),
3544 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3545 tdm_tx_format_get,
3546 tdm_tx_format_put),
3547 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3548 tdm_rx_ch_get,
3549 tdm_rx_ch_put),
3550 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3551 tdm_tx_ch_get,
3552 tdm_tx_ch_put),
3553 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3554 tdm_rx_sample_rate_get,
3555 tdm_rx_sample_rate_put),
3556 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3557 tdm_tx_sample_rate_get,
3558 tdm_tx_sample_rate_put),
3559 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3560 tdm_rx_format_get,
3561 tdm_rx_format_put),
3562 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3563 tdm_tx_format_get,
3564 tdm_tx_format_put),
3565 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3566 tdm_rx_ch_get,
3567 tdm_rx_ch_put),
3568 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3569 tdm_tx_ch_get,
3570 tdm_tx_ch_put),
3571 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3572 aux_pcm_rx_sample_rate_get,
3573 aux_pcm_rx_sample_rate_put),
3574 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3575 aux_pcm_rx_sample_rate_get,
3576 aux_pcm_rx_sample_rate_put),
3577 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3578 aux_pcm_rx_sample_rate_get,
3579 aux_pcm_rx_sample_rate_put),
3580 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3581 aux_pcm_rx_sample_rate_get,
3582 aux_pcm_rx_sample_rate_put),
3583 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3584 aux_pcm_rx_sample_rate_get,
3585 aux_pcm_rx_sample_rate_put),
3586 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3587 aux_pcm_tx_sample_rate_get,
3588 aux_pcm_tx_sample_rate_put),
3589 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3590 aux_pcm_tx_sample_rate_get,
3591 aux_pcm_tx_sample_rate_put),
3592 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3593 aux_pcm_tx_sample_rate_get,
3594 aux_pcm_tx_sample_rate_put),
3595 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3596 aux_pcm_tx_sample_rate_get,
3597 aux_pcm_tx_sample_rate_put),
3598 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3599 aux_pcm_tx_sample_rate_get,
3600 aux_pcm_tx_sample_rate_put),
3601 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3602 mi2s_rx_sample_rate_get,
3603 mi2s_rx_sample_rate_put),
3604 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3605 mi2s_rx_sample_rate_get,
3606 mi2s_rx_sample_rate_put),
3607 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3608 mi2s_rx_sample_rate_get,
3609 mi2s_rx_sample_rate_put),
3610 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3611 mi2s_rx_sample_rate_get,
3612 mi2s_rx_sample_rate_put),
3613 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3614 mi2s_rx_sample_rate_get,
3615 mi2s_rx_sample_rate_put),
3616 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3617 mi2s_tx_sample_rate_get,
3618 mi2s_tx_sample_rate_put),
3619 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3620 mi2s_tx_sample_rate_get,
3621 mi2s_tx_sample_rate_put),
3622 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3623 mi2s_tx_sample_rate_get,
3624 mi2s_tx_sample_rate_put),
3625 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3626 mi2s_tx_sample_rate_get,
3627 mi2s_tx_sample_rate_put),
3628 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3629 mi2s_tx_sample_rate_get,
3630 mi2s_tx_sample_rate_put),
3631 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3632 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3633 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3634 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3635 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3636 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3637 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3638 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3639 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3640 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3641 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3642 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3643 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3644 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3645 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3646 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3647 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3648 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3649 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3650 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3651 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3652 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3653 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3654 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3655 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3656 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3657 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3658 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3659 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3660 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3661 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3662 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3663 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3664 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3665 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3666 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3667 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3668 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3669 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3670 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3671 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3672 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3673 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3674 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3675 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3676 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3677 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3678 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3679 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3680 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3681 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3682 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3683 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3684 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3685 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3686 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3687 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3688 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3689 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3690 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3691 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3692 msm_hifi_put),
3693 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3694 msm_bt_sample_rate_get,
3695 msm_bt_sample_rate_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +0530[diff] [blame]3696 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3697 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3698};
3699
3700static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3701 int enable, bool dapm)
3702{
3703 int ret = 0;
3704
3705 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3706 ret = tavil_cdc_mclk_enable(codec, enable);
3707 } else {
3708 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3709 __func__);
3710 ret = -EINVAL;
3711 }
3712 return ret;
3713}
3714
3715static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3716 int enable, bool dapm)
3717{
3718 int ret = 0;
3719
3720 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3721 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3722 } else {
3723 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3724 __func__);
3725 ret = -EINVAL;
3726 }
3727
3728 return ret;
3729}
3730
3731static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3732 struct snd_kcontrol *kcontrol, int event)
3733{
3734 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3735
3736 pr_debug("%s: event = %d\n", __func__, event);
3737
3738 switch (event) {
3739 case SND_SOC_DAPM_PRE_PMU:
3740 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3741 case SND_SOC_DAPM_POST_PMD:
3742 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3743 }
3744 return 0;
3745}
3746
3747static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3748 struct snd_kcontrol *kcontrol, int event)
3749{
3750 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3751
3752 pr_debug("%s: event = %d\n", __func__, event);
3753
3754 switch (event) {
3755 case SND_SOC_DAPM_PRE_PMU:
3756 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3757 case SND_SOC_DAPM_POST_PMD:
3758 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3759 }
3760 return 0;
3761}
3762
3763static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3764 struct snd_kcontrol *k, int event)
3765{
3766 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3767 struct snd_soc_card *card = codec->component.card;
3768 struct msm_asoc_mach_data *pdata =
3769 snd_soc_card_get_drvdata(card);
3770
3771 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3772 __func__, msm_hifi_control);
3773
3774 if (!pdata || !pdata->hph_en0_gpio_p) {
3775 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3776 return -EINVAL;
3777 }
3778
3779 if (msm_hifi_control != MSM_HIFI_ON) {
3780 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3781 __func__);
3782 return 0;
3783 }
3784
3785 switch (event) {
3786 case SND_SOC_DAPM_POST_PMU:
3787 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3788 break;
3789 case SND_SOC_DAPM_PRE_PMD:
3790 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3791 break;
3792 }
3793
3794 return 0;
3795}
3796
3797static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3798
3799 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3800 msm_mclk_event,
3801 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3802
3803 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3804 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3805
3806 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3807 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3808 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3809 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3810 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3811 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3812 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3813 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3814
3815 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3816 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3817 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3818 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3819 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3820 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3821};
3822
3823static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3824 struct snd_kcontrol *kcontrol, int event)
3825{
3826 struct msm_asoc_mach_data *pdata = NULL;
3827 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3828 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]3829 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3830 int *dmic_gpio_cnt;
3831 struct device_node *dmic_gpio;
3832 char *wname;
3833
3834 wname = strpbrk(w->name, "0123");
3835 if (!wname) {
3836 dev_err(codec->dev, "%s: widget not found\n", __func__);
3837 return -EINVAL;
3838 }
3839
3840 ret = kstrtouint(wname, 10, &dmic_idx);
3841 if (ret < 0) {
3842 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3843 __func__);
3844 return -EINVAL;
3845 }
3846
3847 pdata = snd_soc_card_get_drvdata(codec->component.card);
3848
3849 switch (dmic_idx) {
3850 case 0:
3851 case 1:
3852 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3853 dmic_gpio = pdata->dmic01_gpio_p;
3854 break;
3855 case 2:
3856 case 3:
3857 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
3858 dmic_gpio = pdata->dmic23_gpio_p;
3859 break;
3860 default:
3861 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
3862 __func__);
3863 return -EINVAL;
3864 }
3865
3866 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
3867 __func__, event, dmic_idx, *dmic_gpio_cnt);
3868
3869 switch (event) {
3870 case SND_SOC_DAPM_PRE_PMU:
3871 (*dmic_gpio_cnt)++;
3872 if (*dmic_gpio_cnt == 1) {
3873 ret = msm_cdc_pinctrl_select_active_state(
3874 dmic_gpio);
3875 if (ret < 0) {
3876 pr_err("%s: gpio set cannot be activated %sd",
3877 __func__, "dmic_gpio");
3878 return ret;
3879 }
3880 }
3881
3882 break;
3883 case SND_SOC_DAPM_POST_PMD:
3884 (*dmic_gpio_cnt)--;
3885 if (*dmic_gpio_cnt == 0) {
3886 ret = msm_cdc_pinctrl_select_sleep_state(
3887 dmic_gpio);
3888 if (ret < 0) {
3889 pr_err("%s: gpio set cannot be de-activated %sd",
3890 __func__, "dmic_gpio");
3891 return ret;
3892 }
3893 }
3894 break;
3895 default:
3896 pr_err("%s: invalid DAPM event %d\n", __func__, event);
3897 return -EINVAL;
3898 }
3899 return 0;
3900}
3901
3902static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
3903 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
3904 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
3905 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
3906 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
3907 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
3908 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
3909 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
3910 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
3911};
3912
3913static inline int param_is_mask(int p)
3914{
3915 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
3916 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
3917}
3918
3919static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
3920 int n)
3921{
3922 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
3923}
3924
3925static void param_set_mask(struct snd_pcm_hw_params *p, int n,
3926 unsigned int bit)
3927{
3928 if (bit >= SNDRV_MASK_MAX)
3929 return;
3930 if (param_is_mask(n)) {
3931 struct snd_mask *m = param_to_mask(p, n);
3932
3933 m->bits[0] = 0;
3934 m->bits[1] = 0;
3935 m->bits[bit >> 5] |= (1 << (bit & 31));
3936 }
3937}
3938
3939static int msm_slim_get_ch_from_beid(int32_t be_id)
3940{
3941 int ch_id = 0;
3942
3943 switch (be_id) {
3944 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
3945 ch_id = SLIM_RX_0;
3946 break;
3947 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
3948 ch_id = SLIM_RX_1;
3949 break;
3950 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
3951 ch_id = SLIM_RX_2;
3952 break;
3953 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
3954 ch_id = SLIM_RX_3;
3955 break;
3956 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
3957 ch_id = SLIM_RX_4;
3958 break;
3959 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
3960 ch_id = SLIM_RX_6;
3961 break;
3962 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
3963 ch_id = SLIM_TX_0;
3964 break;
3965 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
3966 ch_id = SLIM_TX_3;
3967 break;
3968 default:
3969 ch_id = SLIM_RX_0;
3970 break;
3971 }
3972
3973 return ch_id;
3974}
3975
3976static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3977{
3978 int idx = 0;
3979
3980 switch (be_id) {
3981 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3982 idx = WSA_CDC_DMA_RX_0;
3983 break;
3984 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3985 idx = WSA_CDC_DMA_TX_0;
3986 break;
3987 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3988 idx = WSA_CDC_DMA_RX_1;
3989 break;
3990 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3991 idx = WSA_CDC_DMA_TX_1;
3992 break;
3993 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3994 idx = WSA_CDC_DMA_TX_2;
3995 break;
3996 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3997 idx = RX_CDC_DMA_RX_0;
3998 break;
3999 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4000 idx = RX_CDC_DMA_RX_1;
4001 break;
4002 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4003 idx = RX_CDC_DMA_RX_2;
4004 break;
4005 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4006 idx = RX_CDC_DMA_RX_3;
4007 break;
4008 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4009 idx = RX_CDC_DMA_RX_5;
4010 break;
4011 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4012 idx = TX_CDC_DMA_TX_0;
4013 break;
4014 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4015 idx = TX_CDC_DMA_TX_3;
4016 break;
4017 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
4018 idx = TX_CDC_DMA_TX_4;
4019 break;
4020 default:
4021 idx = RX_CDC_DMA_RX_0;
4022 break;
4023 }
4024
4025 return idx;
4026}
4027
4028static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4029{
4030 int idx = -EINVAL;
4031
4032 switch (be_id) {
4033 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4034 idx = DP_RX_IDX;
4035 break;
4036 default:
4037 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4038 idx = -EINVAL;
4039 break;
4040 }
4041
4042 return idx;
4043}
4044
4045static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4046 struct snd_pcm_hw_params *params)
4047{
4048 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4049 struct snd_interval *rate = hw_param_interval(params,
4050 SNDRV_PCM_HW_PARAM_RATE);
4051 struct snd_interval *channels = hw_param_interval(params,
4052 SNDRV_PCM_HW_PARAM_CHANNELS);
4053 int rc = 0;
4054 int idx;
4055 void *config = NULL;
4056 struct snd_soc_codec *codec = NULL;
4057
4058 pr_debug("%s: format = %d, rate = %d\n",
4059 __func__, params_format(params), params_rate(params));
4060
4061 switch (dai_link->id) {
4062 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4063 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4064 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4065 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4066 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4067 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4068 idx = msm_slim_get_ch_from_beid(dai_link->id);
4069 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4070 slim_rx_cfg[idx].bit_format);
4071 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4072 channels->min = channels->max = slim_rx_cfg[idx].channels;
4073 break;
4074
4075 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4076 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4077 idx = msm_slim_get_ch_from_beid(dai_link->id);
4078 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4079 slim_tx_cfg[idx].bit_format);
4080 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4081 channels->min = channels->max = slim_tx_cfg[idx].channels;
4082 break;
4083
4084 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4085 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4086 slim_tx_cfg[1].bit_format);
4087 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4088 channels->min = channels->max = slim_tx_cfg[1].channels;
4089 break;
4090
4091 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4092 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4093 SNDRV_PCM_FORMAT_S32_LE);
4094 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4095 channels->min = channels->max = msm_vi_feed_tx_ch;
4096 break;
4097
4098 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4099 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4100 slim_rx_cfg[5].bit_format);
4101 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4102 channels->min = channels->max = slim_rx_cfg[5].channels;
4103 break;
4104
4105 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4106 codec = rtd->codec;
4107 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4108 channels->min = channels->max = 1;
4109
4110 config = msm_codec_fn.get_afe_config_fn(codec,
4111 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4112 if (config) {
4113 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4114 config, SLIMBUS_5_TX);
4115 if (rc)
4116 pr_err("%s: Failed to set slimbus slave port config %d\n",
4117 __func__, rc);
4118 }
4119 break;
4120
4121 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4122 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4123 slim_rx_cfg[SLIM_RX_7].bit_format);
4124 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4125 channels->min = channels->max =
4126 slim_rx_cfg[SLIM_RX_7].channels;
4127 break;
4128
4129 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4130 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4131 channels->min = channels->max =
4132 slim_tx_cfg[SLIM_TX_7].channels;
4133 break;
4134
4135 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4136 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4137 channels->min = channels->max =
4138 slim_tx_cfg[SLIM_TX_8].channels;
4139 break;
4140
4141 case MSM_BACKEND_DAI_USB_RX:
4142 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4143 usb_rx_cfg.bit_format);
4144 rate->min = rate->max = usb_rx_cfg.sample_rate;
4145 channels->min = channels->max = usb_rx_cfg.channels;
4146 break;
4147
4148 case MSM_BACKEND_DAI_USB_TX:
4149 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4150 usb_tx_cfg.bit_format);
4151 rate->min = rate->max = usb_tx_cfg.sample_rate;
4152 channels->min = channels->max = usb_tx_cfg.channels;
4153 break;
4154
4155 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4156 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4157 if (idx < 0) {
4158 pr_err("%s: Incorrect ext disp idx %d\n",
4159 __func__, idx);
4160 rc = idx;
4161 goto done;
4162 }
4163
4164 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4165 ext_disp_rx_cfg[idx].bit_format);
4166 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4167 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4168 break;
4169
4170 case MSM_BACKEND_DAI_AFE_PCM_RX:
4171 channels->min = channels->max = proxy_rx_cfg.channels;
4172 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4173 break;
4174
4175 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4176 channels->min = channels->max =
4177 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4178 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4179 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4180 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4181 break;
4182
4183 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4184 channels->min = channels->max =
4185 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4186 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4187 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4188 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4189 break;
4190
4191 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4192 channels->min = channels->max =
4193 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4194 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4195 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4196 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4197 break;
4198
4199 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4200 channels->min = channels->max =
4201 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4202 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4203 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4204 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4205 break;
4206
4207 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4208 channels->min = channels->max =
4209 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4210 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4211 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4212 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4213 break;
4214
4215 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4216 channels->min = channels->max =
4217 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4218 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4219 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4220 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4221 break;
4222
4223 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4224 channels->min = channels->max =
4225 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4226 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4227 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4228 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4229 break;
4230
4231 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4232 channels->min = channels->max =
4233 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4234 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4235 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4236 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4237 break;
4238
4239 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4240 channels->min = channels->max =
4241 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4242 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4243 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4244 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4245 break;
4246
4247 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4248 channels->min = channels->max =
4249 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4250 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4251 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4252 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4253 break;
4254
4255
4256 case MSM_BACKEND_DAI_AUXPCM_RX:
4257 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4258 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4259 rate->min = rate->max =
4260 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4261 channels->min = channels->max =
4262 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4263 break;
4264
4265 case MSM_BACKEND_DAI_AUXPCM_TX:
4266 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4267 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4268 rate->min = rate->max =
4269 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4270 channels->min = channels->max =
4271 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4272 break;
4273
4274 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4275 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4276 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4277 rate->min = rate->max =
4278 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4279 channels->min = channels->max =
4280 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4281 break;
4282
4283 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4284 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4285 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4286 rate->min = rate->max =
4287 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4288 channels->min = channels->max =
4289 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4290 break;
4291
4292 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4293 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4294 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4295 rate->min = rate->max =
4296 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4297 channels->min = channels->max =
4298 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4299 break;
4300
4301 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4302 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4303 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4304 rate->min = rate->max =
4305 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4306 channels->min = channels->max =
4307 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4308 break;
4309
4310 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4311 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4312 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4313 rate->min = rate->max =
4314 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4315 channels->min = channels->max =
4316 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4317 break;
4318
4319 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4320 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4321 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4322 rate->min = rate->max =
4323 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4324 channels->min = channels->max =
4325 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4326 break;
4327
4328 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4329 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4330 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4331 rate->min = rate->max =
4332 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4333 channels->min = channels->max =
4334 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4335 break;
4336
4337 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4338 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4339 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4340 rate->min = rate->max =
4341 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4342 channels->min = channels->max =
4343 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4344 break;
4345
4346 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4347 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4348 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4349 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4350 channels->min = channels->max =
4351 mi2s_rx_cfg[PRIM_MI2S].channels;
4352 break;
4353
4354 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4355 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4356 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4357 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4358 channels->min = channels->max =
4359 mi2s_tx_cfg[PRIM_MI2S].channels;
4360 break;
4361
4362 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4363 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4364 mi2s_rx_cfg[SEC_MI2S].bit_format);
4365 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4366 channels->min = channels->max =
4367 mi2s_rx_cfg[SEC_MI2S].channels;
4368 break;
4369
4370 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4371 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4372 mi2s_tx_cfg[SEC_MI2S].bit_format);
4373 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4374 channels->min = channels->max =
4375 mi2s_tx_cfg[SEC_MI2S].channels;
4376 break;
4377
4378 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4379 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4380 mi2s_rx_cfg[TERT_MI2S].bit_format);
4381 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4382 channels->min = channels->max =
4383 mi2s_rx_cfg[TERT_MI2S].channels;
4384 break;
4385
4386 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4387 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4388 mi2s_tx_cfg[TERT_MI2S].bit_format);
4389 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4390 channels->min = channels->max =
4391 mi2s_tx_cfg[TERT_MI2S].channels;
4392 break;
4393
4394 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4395 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4396 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4397 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4398 channels->min = channels->max =
4399 mi2s_rx_cfg[QUAT_MI2S].channels;
4400 break;
4401
4402 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4403 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4404 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4405 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4406 channels->min = channels->max =
4407 mi2s_tx_cfg[QUAT_MI2S].channels;
4408 break;
4409
4410 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4411 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4412 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4413 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4414 channels->min = channels->max =
4415 mi2s_rx_cfg[QUIN_MI2S].channels;
4416 break;
4417
4418 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4419 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4420 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4421 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4422 channels->min = channels->max =
4423 mi2s_tx_cfg[QUIN_MI2S].channels;
4424 break;
4425
4426 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4427 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4428 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4429 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4430 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4431 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4432 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4433 cdc_dma_rx_cfg[idx].bit_format);
4434 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4435 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4436 break;
4437
4438 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4439 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4440 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]4441 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4442 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4443 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4444 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4445 cdc_dma_tx_cfg[idx].bit_format);
4446 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4447 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4448 break;
4449
4450 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4451 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4452 SNDRV_PCM_FORMAT_S32_LE);
4453 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4454 channels->min = channels->max = msm_vi_feed_tx_ch;
4455 break;
4456
4457 default:
4458 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4459 break;
4460 }
4461
4462done:
4463 return rc;
4464}
4465
4466static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4467{
4468 int value = 0;
4469 bool ret = 0;
4470 struct snd_soc_card *card = codec->component.card;
4471 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4472 struct pinctrl_state *en2_pinctrl_active;
4473 struct pinctrl_state *en2_pinctrl_sleep;
4474
4475 if (!pdata->usbc_en2_gpio_p) {
4476 if (active) {
4477 /* if active and usbc_en2_gpio undefined, get pin */
4478 pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
4479 if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
4480 dev_err(card->dev,
4481 "%s: Can't get EN2 gpio pinctrl:%ld\n",
4482 __func__,
4483 PTR_ERR(pdata->usbc_en2_gpio_p));
4484 pdata->usbc_en2_gpio_p = NULL;
4485 return false;
4486 }
4487 } else {
4488 /* if not active and usbc_en2_gpio undefined, return */
4489 return false;
4490 }
4491 }
4492
4493 pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
4494 "qcom,usbc-analog-en2-gpio", 0);
4495 if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
4496 dev_err(card->dev, "%s, property %s not in node %s",
4497 __func__, "qcom,usbc-analog-en2-gpio",
4498 card->dev->of_node->full_name);
4499 return false;
4500 }
4501
4502 en2_pinctrl_active = pinctrl_lookup_state(
4503 pdata->usbc_en2_gpio_p, "aud_active");
4504 if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
4505 dev_err(card->dev,
4506 "%s: Cannot get aud_active pinctrl state:%ld\n",
4507 __func__, PTR_ERR(en2_pinctrl_active));
4508 ret = false;
4509 goto err_lookup_state;
4510 }
4511
4512 en2_pinctrl_sleep = pinctrl_lookup_state(
4513 pdata->usbc_en2_gpio_p, "aud_sleep");
4514 if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
4515 dev_err(card->dev,
4516 "%s: Cannot get aud_sleep pinctrl state:%ld\n",
4517 __func__, PTR_ERR(en2_pinctrl_sleep));
4518 ret = false;
4519 goto err_lookup_state;
4520 }
4521
4522 /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
4523 if (active) {
4524 dev_dbg(codec->dev, "%s: enter\n", __func__);
4525 if (pdata->usbc_en2_gpio_p) {
4526 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4527 if (value)
4528 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4529 en2_pinctrl_sleep);
4530 else
4531 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4532 en2_pinctrl_active);
4533 } else if (pdata->usbc_en2_gpio >= 0) {
4534 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4535 gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
4536 }
4537 pr_debug("%s: swap select switch %d to %d\n", __func__,
4538 value, !value);
4539 ret = true;
4540 } else {
4541 /* if not active, release usbc_en2_gpio_p pin */
4542 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4543 en2_pinctrl_sleep);
4544 }
4545
4546err_lookup_state:
4547 devm_pinctrl_put(pdata->usbc_en2_gpio_p);
4548 pdata->usbc_en2_gpio_p = NULL;
4549 return ret;
4550}
4551
4552static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4553{
4554 int value = 0;
4555 bool ret = false;
4556 struct snd_soc_card *card;
4557 struct msm_asoc_mach_data *pdata;
4558
4559 if (!codec) {
4560 pr_err("%s codec is NULL\n", __func__);
4561 return false;
4562 }
4563 card = codec->component.card;
4564 pdata = snd_soc_card_get_drvdata(card);
4565
4566 if (!pdata)
4567 return false;
4568
4569 if (wcd_mbhc_cfg.enable_usbc_analog)
4570 return msm_usbc_swap_gnd_mic(codec, active);
4571
4572 /* if usbc is not defined, swap using us_euro_gpio_p */
4573 if (pdata->us_euro_gpio_p) {
4574 value = msm_cdc_pinctrl_get_state(
4575 pdata->us_euro_gpio_p);
4576 if (value)
4577 msm_cdc_pinctrl_select_sleep_state(
4578 pdata->us_euro_gpio_p);
4579 else
4580 msm_cdc_pinctrl_select_active_state(
4581 pdata->us_euro_gpio_p);
4582 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4583 __func__, value, !value);
4584 ret = true;
4585 }
4586 return ret;
4587}
4588
4589static int msm_afe_set_config(struct snd_soc_codec *codec)
4590{
4591 int ret = 0;
4592 void *config_data = NULL;
4593
4594 if (!msm_codec_fn.get_afe_config_fn) {
4595 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4596 __func__);
4597 return -EINVAL;
4598 }
4599
4600 config_data = msm_codec_fn.get_afe_config_fn(codec,
4601 AFE_CDC_REGISTERS_CONFIG);
4602 if (config_data) {
4603 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4604 if (ret) {
4605 dev_err(codec->dev,
4606 "%s: Failed to set codec registers config %d\n",
4607 __func__, ret);
4608 return ret;
4609 }
4610 }
4611
4612 config_data = msm_codec_fn.get_afe_config_fn(codec,
4613 AFE_CDC_REGISTER_PAGE_CONFIG);
4614 if (config_data) {
4615 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4616 0);
4617 if (ret)
4618 dev_err(codec->dev,
4619 "%s: Failed to set cdc register page config\n",
4620 __func__);
4621 }
4622
4623 config_data = msm_codec_fn.get_afe_config_fn(codec,
4624 AFE_SLIMBUS_SLAVE_CONFIG);
4625 if (config_data) {
4626 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4627 if (ret) {
4628 dev_err(codec->dev,
4629 "%s: Failed to set slimbus slave config %d\n",
4630 __func__, ret);
4631 return ret;
4632 }
4633 }
4634
4635 return 0;
4636}
4637
4638static void msm_afe_clear_config(void)
4639{
4640 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4641 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4642}
4643
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4644static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4645{
4646 int ret = 0;
4647 void *config_data;
4648 struct snd_soc_codec *codec = rtd->codec;
4649 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4650 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4651 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4652 struct snd_soc_component *aux_comp;
4653 struct snd_card *card;
4654 struct snd_info_entry *entry;
4655 struct msm_asoc_mach_data *pdata =
4656 snd_soc_card_get_drvdata(rtd->card);
4657
4658 /*
4659 * Codec SLIMBUS configuration
4660 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4661 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4662 * TX14, TX15, TX16
4663 */
4664 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4665 150, 151};
4666 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4667 134, 135, 136, 137, 138, 139,
4668 140, 141, 142, 143};
4669
4670 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4671
4672 rtd->pmdown_time = 0;
4673
4674 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4675 ARRAY_SIZE(msm_tavil_snd_controls));
4676 if (ret < 0) {
4677 pr_err("%s: add_codec_controls failed, err %d\n",
4678 __func__, ret);
4679 return ret;
4680 }
4681
4682 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4683 ARRAY_SIZE(msm_common_snd_controls));
4684 if (ret < 0) {
4685 pr_err("%s: add_codec_controls failed, err %d\n",
4686 __func__, ret);
4687 return ret;
4688 }
4689
4690 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4691 ARRAY_SIZE(msm_dapm_widgets_tavil));
4692
4693 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4694 ARRAY_SIZE(wcd_audio_paths_tavil));
4695
4696 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4697 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4698 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4699 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4700 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4701 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4702 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4703 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4704 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4705 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4706 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4707 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4708 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4709 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4710 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4711 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4712 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4713 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4714 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4715 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4716 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4717 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4718 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4719 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4720 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4721 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4722 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4723
4724 snd_soc_dapm_sync(dapm);
4725
4726 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4727 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4728
4729 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4730
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]4731 ret = msm_afe_set_config(codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4732 if (ret) {
4733 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4734 goto err;
4735 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]4736 pdata->is_afe_config_done = true;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4737
4738 config_data = msm_codec_fn.get_afe_config_fn(codec,
4739 AFE_AANC_VERSION);
4740 if (config_data) {
4741 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4742 if (ret) {
4743 pr_err("%s: Failed to set aanc version %d\n",
4744 __func__, ret);
4745 goto err;
4746 }
4747 }
4748
4749 /*
4750 * Send speaker configuration only for WSA8810.
4751 * Default configuration is for WSA8815.
4752 */
4753 pr_debug("%s: Number of aux devices: %d\n",
4754 __func__, rtd->card->num_aux_devs);
4755 if (rtd->card->num_aux_devs &&
4756 !list_empty(&rtd->card->aux_comp_list)) {
4757 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4758 struct snd_soc_component, card_aux_list);
4759 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4760 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4761 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4762 tavil_set_spkr_gain_offset(rtd->codec,
4763 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4764 }
4765 }
4766
4767 card = rtd->card->snd_card;
4768 entry = snd_info_create_subdir(card->module, "codecs",
4769 card->proc_root);
4770 if (!entry) {
4771 pr_debug("%s: Cannot create codecs module entry\n",
4772 __func__);
4773 ret = 0;
4774 goto err;
4775 }
4776 pdata->codec_root = entry;
4777 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4778
4779 codec_reg_done = true;
4780 return 0;
4781err:
4782 return ret;
4783}
4784
4785static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4786{
4787 int ret = 0;
4788 struct snd_soc_codec *codec = rtd->codec;
4789 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4790 struct snd_card *card;
4791 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4792 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4793 struct msm_asoc_mach_data *pdata =
4794 snd_soc_card_get_drvdata(rtd->card);
4795
4796 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
4797 ARRAY_SIZE(msm_int_snd_controls));
4798 if (ret < 0) {
4799 pr_err("%s: add_codec_controls failed: %d\n",
4800 __func__, ret);
4801 return ret;
4802 }
4803 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4804 ARRAY_SIZE(msm_common_snd_controls));
4805 if (ret < 0) {
4806 pr_err("%s: add common snd controls failed: %d\n",
4807 __func__, ret);
4808 return ret;
4809 }
4810
4811 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4812 ARRAY_SIZE(msm_int_dapm_widgets));
4813
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4814 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4815 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4816 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4817 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4818
4819 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4820 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4821 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4822 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4823
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4824 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4825 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4826 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4827 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4828
4829 snd_soc_dapm_sync(dapm);
4830
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4831 /*
4832 * Send speaker configuration only for WSA8810.
4833 * Default configuration is for WSA8815.
4834 */
4835 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
4836 __func__, rtd->card->num_aux_devs);
4837 if (rtd->card->num_aux_devs &&
4838 !list_empty(&rtd->card->component_dev_list)) {
4839 aux_comp = list_first_entry(
4840 &rtd->card->component_dev_list,
4841 struct snd_soc_component,
4842 card_aux_list);
4843 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4844 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4845 wsa_macro_set_spkr_mode(rtd->codec,
4846 WSA_MACRO_SPKR_MODE_1);
4847 wsa_macro_set_spkr_gain_offset(rtd->codec,
4848 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4849 }
4850 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4851 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]4852 if (!pdata->codec_root) {
4853 entry = snd_info_create_subdir(card->module, "codecs",
4854 card->proc_root);
4855 if (!entry) {
4856 pr_debug("%s: Cannot create codecs module entry\n",
4857 __func__);
4858 ret = 0;
4859 goto err;
4860 }
4861 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4862 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4863 bolero_info_create_codec_entry(pdata->codec_root, codec);
4864 codec_reg_done = true;
4865 return 0;
4866err:
4867 return ret;
4868}
4869
4870static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4871{
4872 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4873 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4874 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4875
4876 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4877 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4878}
4879
4880static void *def_wcd_mbhc_cal(void)
4881{
4882 void *wcd_mbhc_cal;
4883 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4884 u16 *btn_high;
4885
4886 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4887 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4888 if (!wcd_mbhc_cal)
4889 return NULL;
4890
4891#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
4892 S(v_hs_max, 1600);
4893#undef S
4894#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
4895 S(num_btn, WCD_MBHC_DEF_BUTTONS);
4896#undef S
4897
4898 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4899 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4900 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4901
4902 btn_high[0] = 75;
4903 btn_high[1] = 150;
4904 btn_high[2] = 237;
4905 btn_high[3] = 500;
4906 btn_high[4] = 500;
4907 btn_high[5] = 500;
4908 btn_high[6] = 500;
4909 btn_high[7] = 500;
4910
4911 return wcd_mbhc_cal;
4912}
4913
4914static int msm_snd_hw_params(struct snd_pcm_substream *substream,
4915 struct snd_pcm_hw_params *params)
4916{
4917 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4918 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4919 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4920 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4921
4922 int ret = 0;
4923 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
4924 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4925 u32 user_set_tx_ch = 0;
4926 u32 rx_ch_count;
4927
4928 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4929 ret = snd_soc_dai_get_channel_map(codec_dai,
4930 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4931 if (ret < 0) {
4932 pr_err("%s: failed to get codec chan map, err:%d\n",
4933 __func__, ret);
4934 goto err;
4935 }
4936 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
4937 pr_debug("%s: rx_5_ch=%d\n", __func__,
4938 slim_rx_cfg[5].channels);
4939 rx_ch_count = slim_rx_cfg[5].channels;
4940 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
4941 pr_debug("%s: rx_2_ch=%d\n", __func__,
4942 slim_rx_cfg[2].channels);
4943 rx_ch_count = slim_rx_cfg[2].channels;
4944 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
4945 pr_debug("%s: rx_6_ch=%d\n", __func__,
4946 slim_rx_cfg[6].channels);
4947 rx_ch_count = slim_rx_cfg[6].channels;
4948 } else {
4949 pr_debug("%s: rx_0_ch=%d\n", __func__,
4950 slim_rx_cfg[0].channels);
4951 rx_ch_count = slim_rx_cfg[0].channels;
4952 }
4953 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4954 rx_ch_count, rx_ch);
4955 if (ret < 0) {
4956 pr_err("%s: failed to set cpu chan map, err:%d\n",
4957 __func__, ret);
4958 goto err;
4959 }
4960 } else {
4961
4962 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
4963 codec_dai->name, codec_dai->id, user_set_tx_ch);
4964 ret = snd_soc_dai_get_channel_map(codec_dai,
4965 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4966 if (ret < 0) {
4967 pr_err("%s: failed to get tx codec chan map, err:%d\n",
4968 __func__, ret);
4969 goto err;
4970 }
4971 /* For <codec>_tx1 case */
4972 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
4973 user_set_tx_ch = slim_tx_cfg[0].channels;
4974 /* For <codec>_tx3 case */
4975 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
4976 user_set_tx_ch = slim_tx_cfg[1].channels;
4977 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
4978 user_set_tx_ch = msm_vi_feed_tx_ch;
4979 else
4980 user_set_tx_ch = tx_ch_cnt;
4981
4982 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
4983 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
4984 tx_ch_cnt, dai_link->id);
4985
4986 ret = snd_soc_dai_set_channel_map(cpu_dai,
4987 user_set_tx_ch, tx_ch, 0, 0);
4988 if (ret < 0)
4989 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
4990 __func__, ret);
4991 }
4992
4993err:
4994 return ret;
4995}
4996
4997
4998static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4999 struct snd_pcm_hw_params *params)
5000{
5001 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5002 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5003 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5004 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5005
5006 int ret = 0;
5007 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5008 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5009 u32 user_set_tx_ch = 0;
5010 u32 user_set_rx_ch = 0;
5011 u32 ch_id;
5012
5013 ret = snd_soc_dai_get_channel_map(codec_dai,
5014 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5015 &rx_ch_cdc_dma);
5016 if (ret < 0) {
5017 pr_err("%s: failed to get codec chan map, err:%d\n",
5018 __func__, ret);
5019 goto err;
5020 }
5021
5022 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5023 switch (dai_link->id) {
5024 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5025 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5026 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5027 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5028 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5029 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5030 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5031 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5032 {
5033 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5034 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5035 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5036 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5037 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5038 user_set_rx_ch, &rx_ch_cdc_dma);
5039 if (ret < 0) {
5040 pr_err("%s: failed to set cpu chan map, err:%d\n",
5041 __func__, ret);
5042 goto err;
5043 }
5044
5045 }
5046 break;
5047 }
5048 } else {
5049 switch (dai_link->id) {
5050 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5051 {
5052 user_set_tx_ch = msm_vi_feed_tx_ch;
5053 }
5054 break;
5055 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5056 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5057 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5058 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5059 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5060 {
5061 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5062 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5063 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5064 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5065 }
5066 break;
5067 }
5068
5069 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5070 &tx_ch_cdc_dma, 0, 0);
5071 if (ret < 0) {
5072 pr_err("%s: failed to set cpu chan map, err:%d\n",
5073 __func__, ret);
5074 goto err;
5075 }
5076 }
5077
5078err:
5079 return ret;
5080}
5081
5082static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5083 struct snd_pcm_hw_params *params)
5084{
5085 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5086 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5087 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5088 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5089 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5090 unsigned int num_tx_ch = 0;
5091 unsigned int num_rx_ch = 0;
5092 int ret = 0;
5093
5094 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5095 num_rx_ch = params_channels(params);
5096 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5097 codec_dai->name, codec_dai->id, num_rx_ch);
5098 ret = snd_soc_dai_get_channel_map(codec_dai,
5099 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5100 if (ret < 0) {
5101 pr_err("%s: failed to get codec chan map, err:%d\n",
5102 __func__, ret);
5103 goto err;
5104 }
5105 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5106 num_rx_ch, rx_ch);
5107 if (ret < 0) {
5108 pr_err("%s: failed to set cpu chan map, err:%d\n",
5109 __func__, ret);
5110 goto err;
5111 }
5112 } else {
5113 num_tx_ch = params_channels(params);
5114 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5115 codec_dai->name, codec_dai->id, num_tx_ch);
5116 ret = snd_soc_dai_get_channel_map(codec_dai,
5117 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5118 if (ret < 0) {
5119 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5120 __func__, ret);
5121 goto err;
5122 }
5123 ret = snd_soc_dai_set_channel_map(cpu_dai,
5124 num_tx_ch, tx_ch, 0, 0);
5125 if (ret < 0) {
5126 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5127 __func__, ret);
5128 goto err;
5129 }
5130 }
5131
5132err:
5133 return ret;
5134}
5135
5136static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5137 struct snd_pcm_hw_params *params)
5138{
5139 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5140 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5141 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5142 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5143 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5144 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5145 int ret;
5146
5147 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5148 codec_dai->name, codec_dai->id);
5149 ret = snd_soc_dai_get_channel_map(codec_dai,
5150 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5151 if (ret) {
5152 dev_err(rtd->dev,
5153 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5154 __func__, ret);
5155 goto err;
5156 }
5157
5158 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5159 __func__, tx_ch_cnt, dai_link->id);
5160
5161 ret = snd_soc_dai_set_channel_map(cpu_dai,
5162 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5163 if (ret)
5164 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5165 __func__, ret);
5166
5167err:
5168 return ret;
5169}
5170
5171static int msm_get_port_id(int be_id)
5172{
5173 int afe_port_id;
5174
5175 switch (be_id) {
5176 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5177 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5178 break;
5179 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5180 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5181 break;
5182 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5183 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5184 break;
5185 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5186 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5187 break;
5188 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5189 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5190 break;
5191 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5192 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5193 break;
5194 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5195 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5196 break;
5197 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5198 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5199 break;
5200 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5201 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5202 break;
5203 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5204 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5205 break;
5206 default:
5207 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5208 afe_port_id = -EINVAL;
5209 }
5210
5211 return afe_port_id;
5212}
5213
5214static u32 get_mi2s_bits_per_sample(u32 bit_format)
5215{
5216 u32 bit_per_sample;
5217
5218 switch (bit_format) {
5219 case SNDRV_PCM_FORMAT_S32_LE:
5220 case SNDRV_PCM_FORMAT_S24_3LE:
5221 case SNDRV_PCM_FORMAT_S24_LE:
5222 bit_per_sample = 32;
5223 break;
5224 case SNDRV_PCM_FORMAT_S16_LE:
5225 default:
5226 bit_per_sample = 16;
5227 break;
5228 }
5229
5230 return bit_per_sample;
5231}
5232
5233static void update_mi2s_clk_val(int dai_id, int stream)
5234{
5235 u32 bit_per_sample;
5236
5237 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5238 bit_per_sample =
5239 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5240 mi2s_clk[dai_id].clk_freq_in_hz =
5241 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5242 } else {
5243 bit_per_sample =
5244 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5245 mi2s_clk[dai_id].clk_freq_in_hz =
5246 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5247 }
5248}
5249
5250static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5251{
5252 int ret = 0;
5253 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5254 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5255 int port_id = 0;
5256 int index = cpu_dai->id;
5257
5258 port_id = msm_get_port_id(rtd->dai_link->id);
5259 if (port_id < 0) {
5260 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5261 ret = port_id;
5262 goto err;
5263 }
5264
5265 if (enable) {
5266 update_mi2s_clk_val(index, substream->stream);
5267 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5268 mi2s_clk[index].clk_freq_in_hz);
5269 }
5270
5271 mi2s_clk[index].enable = enable;
5272 ret = afe_set_lpass_clock_v2(port_id,
5273 &mi2s_clk[index]);
5274 if (ret < 0) {
5275 dev_err(rtd->card->dev,
5276 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5277 __func__, port_id, ret);
5278 goto err;
5279 }
5280
5281err:
5282 return ret;
5283}
5284
5285static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5286 enum pinctrl_pin_state new_state)
5287{
5288 int ret = 0;
5289 int curr_state = 0;
5290
5291 if (pinctrl_info == NULL) {
5292 pr_err("%s: pinctrl_info is NULL\n", __func__);
5293 ret = -EINVAL;
5294 goto err;
5295 }
5296
5297 if (pinctrl_info->pinctrl == NULL) {
5298 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5299 ret = -EINVAL;
5300 goto err;
5301 }
5302
5303 curr_state = pinctrl_info->curr_state;
5304 pinctrl_info->curr_state = new_state;
5305 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5306 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5307
5308 if (curr_state == pinctrl_info->curr_state) {
5309 pr_debug("%s: Already in same state\n", __func__);
5310 goto err;
5311 }
5312
5313 if (curr_state != STATE_DISABLE &&
5314 pinctrl_info->curr_state != STATE_DISABLE) {
5315 pr_debug("%s: state already active cannot switch\n", __func__);
5316 ret = -EIO;
5317 goto err;
5318 }
5319
5320 switch (pinctrl_info->curr_state) {
5321 case STATE_MI2S_ACTIVE:
5322 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5323 pinctrl_info->mi2s_active);
5324 if (ret) {
5325 pr_err("%s: MI2S state select failed with %d\n",
5326 __func__, ret);
5327 ret = -EIO;
5328 goto err;
5329 }
5330 break;
5331 case STATE_TDM_ACTIVE:
5332 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5333 pinctrl_info->tdm_active);
5334 if (ret) {
5335 pr_err("%s: TDM state select failed with %d\n",
5336 __func__, ret);
5337 ret = -EIO;
5338 goto err;
5339 }
5340 break;
5341 case STATE_DISABLE:
5342 if (curr_state == STATE_MI2S_ACTIVE) {
5343 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5344 pinctrl_info->mi2s_disable);
5345 } else {
5346 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5347 pinctrl_info->tdm_disable);
5348 }
5349 if (ret) {
5350 pr_err("%s: state disable failed with %d\n",
5351 __func__, ret);
5352 ret = -EIO;
5353 goto err;
5354 }
5355 break;
5356 default:
5357 pr_err("%s: TLMM pin state is invalid\n", __func__);
5358 return -EINVAL;
5359 }
5360
5361err:
5362 return ret;
5363}
5364
5365static int msm_get_pinctrl(struct platform_device *pdev)
5366{
5367 struct snd_soc_card *card = platform_get_drvdata(pdev);
5368 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5369 struct msm_pinctrl_info *pinctrl_info = NULL;
5370 struct pinctrl *pinctrl;
5371 int ret = 0;
5372
5373 pinctrl_info = &pdata->pinctrl_info;
5374
5375 if (pinctrl_info == NULL) {
5376 pr_err("%s: pinctrl_info is NULL\n", __func__);
5377 return -EINVAL;
5378 }
5379
5380 pinctrl = devm_pinctrl_get(&pdev->dev);
5381 if (IS_ERR_OR_NULL(pinctrl)) {
5382 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5383 return -EINVAL;
5384 }
5385 pinctrl_info->pinctrl = pinctrl;
5386
5387 /* get all the states handles from Device Tree */
5388 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5389 "quat-mi2s-sleep");
5390 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5391 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5392 goto err;
5393 }
5394 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5395 "quat-mi2s-active");
5396 if (IS_ERR(pinctrl_info->mi2s_active)) {
5397 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5398 goto err;
5399 }
5400 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5401 "quat-tdm-sleep");
5402 if (IS_ERR(pinctrl_info->tdm_disable)) {
5403 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5404 goto err;
5405 }
5406 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5407 "quat-tdm-active");
5408 if (IS_ERR(pinctrl_info->tdm_active)) {
5409 pr_err("%s: could not get tdm_active pinstate\n",
5410 __func__);
5411 goto err;
5412 }
5413 /* Reset the TLMM pins to a default state */
5414 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5415 pinctrl_info->mi2s_disable);
5416 if (ret != 0) {
5417 pr_err("%s: Disable TLMM pins failed with %d\n",
5418 __func__, ret);
5419 ret = -EIO;
5420 goto err;
5421 }
5422 pinctrl_info->curr_state = STATE_DISABLE;
5423
5424 return 0;
5425
5426err:
5427 devm_pinctrl_put(pinctrl);
5428 pinctrl_info->pinctrl = NULL;
5429 return -EINVAL;
5430}
5431
5432static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5433 struct snd_pcm_hw_params *params)
5434{
5435 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5436 struct snd_interval *rate = hw_param_interval(params,
5437 SNDRV_PCM_HW_PARAM_RATE);
5438 struct snd_interval *channels = hw_param_interval(params,
5439 SNDRV_PCM_HW_PARAM_CHANNELS);
5440
5441 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5442 channels->min = channels->max =
5443 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5444 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5445 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5446 rate->min = rate->max =
5447 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5448 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5449 channels->min = channels->max =
5450 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5451 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5452 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5453 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5454 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5455 channels->min = channels->max =
5456 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5457 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5458 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5459 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5460 } else {
5461 pr_err("%s: dai id 0x%x not supported\n",
5462 __func__, cpu_dai->id);
5463 return -EINVAL;
5464 }
5465
5466 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5467 __func__, cpu_dai->id, channels->max, rate->max,
5468 params_format(params));
5469
5470 return 0;
5471}
5472
5473static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5474 struct snd_pcm_hw_params *params)
5475{
5476 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5477 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5478 int ret = 0;
5479 int slot_width = 32;
5480 int channels, slots;
5481 unsigned int slot_mask, rate, clk_freq;
5482 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5483
5484 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5485
5486 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5487 switch (cpu_dai->id) {
5488 case AFE_PORT_ID_PRIMARY_TDM_RX:
5489 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5490 break;
5491 case AFE_PORT_ID_SECONDARY_TDM_RX:
5492 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5493 break;
5494 case AFE_PORT_ID_TERTIARY_TDM_RX:
5495 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5496 break;
5497 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5498 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5499 break;
5500 case AFE_PORT_ID_QUINARY_TDM_RX:
5501 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5502 break;
5503 case AFE_PORT_ID_PRIMARY_TDM_TX:
5504 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5505 break;
5506 case AFE_PORT_ID_SECONDARY_TDM_TX:
5507 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5508 break;
5509 case AFE_PORT_ID_TERTIARY_TDM_TX:
5510 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5511 break;
5512 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5513 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5514 break;
5515 case AFE_PORT_ID_QUINARY_TDM_TX:
5516 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5517 break;
5518
5519 default:
5520 pr_err("%s: dai id 0x%x not supported\n",
5521 __func__, cpu_dai->id);
5522 return -EINVAL;
5523 }
5524
5525 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5526 /*2 slot config - bits 0 and 1 set for the first two slots */
5527 slot_mask = 0x0000FFFF >> (16-slots);
5528 channels = slots;
5529
5530 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5531 __func__, slot_width, slots);
5532
5533 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5534 slots, slot_width);
5535 if (ret < 0) {
5536 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5537 __func__, ret);
5538 goto end;
5539 }
5540
5541 ret = snd_soc_dai_set_channel_map(cpu_dai,
5542 0, NULL, channels, slot_offset);
5543 if (ret < 0) {
5544 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5545 __func__, ret);
5546 goto end;
5547 }
5548 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5549 /*2 slot config - bits 0 and 1 set for the first two slots */
5550 slot_mask = 0x0000FFFF >> (16-slots);
5551 channels = slots;
5552
5553 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5554 __func__, slot_width, slots);
5555
5556 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5557 slots, slot_width);
5558 if (ret < 0) {
5559 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5560 __func__, ret);
5561 goto end;
5562 }
5563
5564 ret = snd_soc_dai_set_channel_map(cpu_dai,
5565 channels, slot_offset, 0, NULL);
5566 if (ret < 0) {
5567 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5568 __func__, ret);
5569 goto end;
5570 }
5571 } else {
5572 ret = -EINVAL;
5573 pr_err("%s: invalid use case, err:%d\n",
5574 __func__, ret);
5575 goto end;
5576 }
5577
5578 rate = params_rate(params);
5579 clk_freq = rate * slot_width * slots;
5580 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5581 if (ret < 0)
5582 pr_err("%s: failed to set tdm clk, err:%d\n",
5583 __func__, ret);
5584
5585end:
5586 return ret;
5587}
5588
5589static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5590{
5591 int ret = 0;
5592 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5593 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5594 struct snd_soc_card *card = rtd->card;
5595 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5596 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5597
5598 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5599 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5600 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5601 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5602 if (ret)
5603 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5604 __func__, ret);
5605 }
5606
5607 return ret;
5608}
5609
5610static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5611{
5612 int ret = 0;
5613 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5614 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5615 struct snd_soc_card *card = rtd->card;
5616 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5617 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5618
5619 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5620 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5621 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5622 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5623 if (ret)
5624 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5625 __func__, ret);
5626 }
5627}
5628
5629static struct snd_soc_ops sm6150_tdm_be_ops = {
5630 .hw_params = sm6150_tdm_snd_hw_params,
5631 .startup = sm6150_tdm_snd_startup,
5632 .shutdown = sm6150_tdm_snd_shutdown
5633};
5634
5635static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5636{
5637 cpumask_t mask;
5638
5639 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5640 pm_qos_remove_request(&substream->latency_pm_qos_req);
5641
5642 cpumask_clear(&mask);
5643 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5644 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5645 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5646
5647 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5648
5649 pm_qos_add_request(&substream->latency_pm_qos_req,
5650 PM_QOS_CPU_DMA_LATENCY,
5651 MSM_LL_QOS_VALUE);
5652 return 0;
5653}
5654
5655static struct snd_soc_ops msm_fe_qos_ops = {
5656 .prepare = msm_fe_qos_prepare,
5657};
5658
5659static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5660{
5661 int ret = 0;
5662 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5663 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5664 int index = cpu_dai->id;
5665 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5666 struct snd_soc_card *card = rtd->card;
5667 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5668 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5669 int ret_pinctrl = 0;
5670
5671 dev_dbg(rtd->card->dev,
5672 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5673 __func__, substream->name, substream->stream,
5674 cpu_dai->name, cpu_dai->id);
5675
5676 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5677 ret = -EINVAL;
5678 dev_err(rtd->card->dev,
5679 "%s: CPU DAI id (%d) out of range\n",
5680 __func__, cpu_dai->id);
5681 goto err;
5682 }
5683 /*
5684 * Mutex protection in case the same MI2S
5685 * interface using for both TX and RX so
5686 * that the same clock won't be enable twice.
5687 */
5688 mutex_lock(&mi2s_intf_conf[index].lock);
5689 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5690 /* Check if msm needs to provide the clock to the interface */
5691 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5692 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5693 fmt = SND_SOC_DAIFMT_CBM_CFM;
5694 }
5695 ret = msm_mi2s_set_sclk(substream, true);
5696 if (ret < 0) {
5697 dev_err(rtd->card->dev,
5698 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5699 __func__, ret);
5700 goto clean_up;
5701 }
5702
5703 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5704 if (ret < 0) {
5705 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5706 __func__, index, ret);
5707 goto clk_off;
5708 }
5709 if (index == QUAT_MI2S) {
5710 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5711 STATE_MI2S_ACTIVE);
5712 if (ret_pinctrl)
5713 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5714 __func__, ret_pinctrl);
5715 }
5716 }
5717clk_off:
5718 if (ret < 0)
5719 msm_mi2s_set_sclk(substream, false);
5720clean_up:
5721 if (ret < 0)
5722 mi2s_intf_conf[index].ref_cnt--;
5723 mutex_unlock(&mi2s_intf_conf[index].lock);
5724err:
5725 return ret;
5726}
5727
5728static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5729{
5730 int ret;
5731 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5732 int index = rtd->cpu_dai->id;
5733 struct snd_soc_card *card = rtd->card;
5734 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5735 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5736 int ret_pinctrl = 0;
5737
5738 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5739 substream->name, substream->stream);
5740 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5741 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5742 return;
5743 }
5744
5745 mutex_lock(&mi2s_intf_conf[index].lock);
5746 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5747 ret = msm_mi2s_set_sclk(substream, false);
5748 if (ret < 0)
5749 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5750 __func__, index, ret);
5751 if (index == QUAT_MI2S) {
5752 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5753 STATE_DISABLE);
5754 if (ret_pinctrl)
5755 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5756 __func__, ret_pinctrl);
5757 }
5758 }
5759 mutex_unlock(&mi2s_intf_conf[index].lock);
5760}
5761
5762static struct snd_soc_ops msm_mi2s_be_ops = {
5763 .startup = msm_mi2s_snd_startup,
5764 .shutdown = msm_mi2s_snd_shutdown,
5765};
5766
5767static struct snd_soc_ops msm_cdc_dma_be_ops = {
5768 .hw_params = msm_snd_cdc_dma_hw_params,
5769};
5770
5771static struct snd_soc_ops msm_be_ops = {
5772 .hw_params = msm_snd_hw_params,
5773};
5774
5775static struct snd_soc_ops msm_slimbus_2_be_ops = {
5776 .hw_params = msm_slimbus_2_hw_params,
5777};
5778
5779static struct snd_soc_ops msm_wcn_ops = {
5780 .hw_params = msm_wcn_hw_params,
5781};
5782
5783
5784/* Digital audio interface glue - connects codec <---> CPU */
5785static struct snd_soc_dai_link msm_common_dai_links[] = {
5786 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5787 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5788 .name = MSM_DAILINK_NAME(Media1),
5789 .stream_name = "MultiMedia1",
5790 .cpu_dai_name = "MultiMedia1",
5791 .platform_name = "msm-pcm-dsp.0",
5792 .dynamic = 1,
5793 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5794 .dpcm_playback = 1,
5795 .dpcm_capture = 1,
5796 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5797 SND_SOC_DPCM_TRIGGER_POST},
5798 .codec_dai_name = "snd-soc-dummy-dai",
5799 .codec_name = "snd-soc-dummy",
5800 .ignore_suspend = 1,
5801 /* this dainlink has playback support */
5802 .ignore_pmdown_time = 1,
5803 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5804 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5805 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5806 .name = MSM_DAILINK_NAME(Media2),
5807 .stream_name = "MultiMedia2",
5808 .cpu_dai_name = "MultiMedia2",
5809 .platform_name = "msm-pcm-dsp.0",
5810 .dynamic = 1,
5811 .dpcm_playback = 1,
5812 .dpcm_capture = 1,
5813 .codec_dai_name = "snd-soc-dummy-dai",
5814 .codec_name = "snd-soc-dummy",
5815 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5816 SND_SOC_DPCM_TRIGGER_POST},
5817 .ignore_suspend = 1,
5818 /* this dainlink has playback support */
5819 .ignore_pmdown_time = 1,
5820 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5821 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5822 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5823 .name = "VoiceMMode1",
5824 .stream_name = "VoiceMMode1",
5825 .cpu_dai_name = "VoiceMMode1",
5826 .platform_name = "msm-pcm-voice",
5827 .dynamic = 1,
5828 .dpcm_playback = 1,
5829 .dpcm_capture = 1,
5830 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5831 SND_SOC_DPCM_TRIGGER_POST},
5832 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5833 .ignore_suspend = 1,
5834 .ignore_pmdown_time = 1,
5835 .codec_dai_name = "snd-soc-dummy-dai",
5836 .codec_name = "snd-soc-dummy",
5837 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5838 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5839 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5840 .name = "MSM VoIP",
5841 .stream_name = "VoIP",
5842 .cpu_dai_name = "VoIP",
5843 .platform_name = "msm-voip-dsp",
5844 .dynamic = 1,
5845 .dpcm_playback = 1,
5846 .dpcm_capture = 1,
5847 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5848 SND_SOC_DPCM_TRIGGER_POST},
5849 .codec_dai_name = "snd-soc-dummy-dai",
5850 .codec_name = "snd-soc-dummy",
5851 .ignore_suspend = 1,
5852 /* this dainlink has playback support */
5853 .ignore_pmdown_time = 1,
5854 .id = MSM_FRONTEND_DAI_VOIP,
5855 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5856 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5857 .name = MSM_DAILINK_NAME(ULL),
5858 .stream_name = "MultiMedia3",
5859 .cpu_dai_name = "MultiMedia3",
5860 .platform_name = "msm-pcm-dsp.2",
5861 .dynamic = 1,
5862 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5863 .dpcm_playback = 1,
5864 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5865 SND_SOC_DPCM_TRIGGER_POST},
5866 .codec_dai_name = "snd-soc-dummy-dai",
5867 .codec_name = "snd-soc-dummy",
5868 .ignore_suspend = 1,
5869 /* this dainlink has playback support */
5870 .ignore_pmdown_time = 1,
5871 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5872 },
5873 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5874 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5875 .name = "SLIMBUS_0 Hostless",
5876 .stream_name = "SLIMBUS_0 Hostless",
5877 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5878 .platform_name = "msm-pcm-hostless",
5879 .dynamic = 1,
5880 .dpcm_playback = 1,
5881 .dpcm_capture = 1,
5882 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5883 SND_SOC_DPCM_TRIGGER_POST},
5884 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5885 .ignore_suspend = 1,
5886 /* this dailink has playback support */
5887 .ignore_pmdown_time = 1,
5888 .codec_dai_name = "snd-soc-dummy-dai",
5889 .codec_name = "snd-soc-dummy",
5890 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5891 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5892 .name = "MSM AFE-PCM RX",
5893 .stream_name = "AFE-PROXY RX",
5894 .cpu_dai_name = "msm-dai-q6-dev.241",
5895 .codec_name = "msm-stub-codec.1",
5896 .codec_dai_name = "msm-stub-rx",
5897 .platform_name = "msm-pcm-afe",
5898 .dpcm_playback = 1,
5899 .ignore_suspend = 1,
5900 /* this dainlink has playback support */
5901 .ignore_pmdown_time = 1,
5902 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5903 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5904 .name = "MSM AFE-PCM TX",
5905 .stream_name = "AFE-PROXY TX",
5906 .cpu_dai_name = "msm-dai-q6-dev.240",
5907 .codec_name = "msm-stub-codec.1",
5908 .codec_dai_name = "msm-stub-tx",
5909 .platform_name = "msm-pcm-afe",
5910 .dpcm_capture = 1,
5911 .ignore_suspend = 1,
5912 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5913 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5914 .name = MSM_DAILINK_NAME(Compress1),
5915 .stream_name = "Compress1",
5916 .cpu_dai_name = "MultiMedia4",
5917 .platform_name = "msm-compress-dsp",
5918 .dynamic = 1,
5919 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5920 .dpcm_playback = 1,
5921 .dpcm_capture = 1,
5922 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5923 SND_SOC_DPCM_TRIGGER_POST},
5924 .codec_dai_name = "snd-soc-dummy-dai",
5925 .codec_name = "snd-soc-dummy",
5926 .ignore_suspend = 1,
5927 .ignore_pmdown_time = 1,
5928 /* this dainlink has playback support */
5929 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5930 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5931 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5932 .name = "AUXPCM Hostless",
5933 .stream_name = "AUXPCM Hostless",
5934 .cpu_dai_name = "AUXPCM_HOSTLESS",
5935 .platform_name = "msm-pcm-hostless",
5936 .dynamic = 1,
5937 .dpcm_playback = 1,
5938 .dpcm_capture = 1,
5939 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5940 SND_SOC_DPCM_TRIGGER_POST},
5941 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5942 .ignore_suspend = 1,
5943 /* this dainlink has playback support */
5944 .ignore_pmdown_time = 1,
5945 .codec_dai_name = "snd-soc-dummy-dai",
5946 .codec_name = "snd-soc-dummy",
5947 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5948 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5949 .name = "SLIMBUS_1 Hostless",
5950 .stream_name = "SLIMBUS_1 Hostless",
5951 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
5952 .platform_name = "msm-pcm-hostless",
5953 .dynamic = 1,
5954 .dpcm_playback = 1,
5955 .dpcm_capture = 1,
5956 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5957 SND_SOC_DPCM_TRIGGER_POST},
5958 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5959 .ignore_suspend = 1,
5960 /* this dailink has playback support */
5961 .ignore_pmdown_time = 1,
5962 .codec_dai_name = "snd-soc-dummy-dai",
5963 .codec_name = "snd-soc-dummy",
5964 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5965 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5966 .name = "SLIMBUS_3 Hostless",
5967 .stream_name = "SLIMBUS_3 Hostless",
5968 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
5969 .platform_name = "msm-pcm-hostless",
5970 .dynamic = 1,
5971 .dpcm_playback = 1,
5972 .dpcm_capture = 1,
5973 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5974 SND_SOC_DPCM_TRIGGER_POST},
5975 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5976 .ignore_suspend = 1,
5977 /* this dailink has playback support */
5978 .ignore_pmdown_time = 1,
5979 .codec_dai_name = "snd-soc-dummy-dai",
5980 .codec_name = "snd-soc-dummy",
5981 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5982 {/* hw:x,12 */
5983 .name = "SLIMBUS_7 Hostless",
5984 .stream_name = "SLIMBUS_7 Hostless",
5985 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5986 .platform_name = "msm-pcm-hostless",
5987 .dynamic = 1,
5988 .dpcm_playback = 1,
5989 .dpcm_capture = 1,
5990 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5991 SND_SOC_DPCM_TRIGGER_POST},
5992 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5993 .ignore_suspend = 1,
5994 /* this dailink has playback support */
5995 .ignore_pmdown_time = 1,
5996 .codec_dai_name = "snd-soc-dummy-dai",
5997 .codec_name = "snd-soc-dummy",
5998 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5999 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6000 .name = MSM_DAILINK_NAME(LowLatency),
6001 .stream_name = "MultiMedia5",
6002 .cpu_dai_name = "MultiMedia5",
6003 .platform_name = "msm-pcm-dsp.1",
6004 .dynamic = 1,
6005 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6006 .dpcm_playback = 1,
6007 .dpcm_capture = 1,
6008 .codec_dai_name = "snd-soc-dummy-dai",
6009 .codec_name = "snd-soc-dummy",
6010 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6011 SND_SOC_DPCM_TRIGGER_POST},
6012 .ignore_suspend = 1,
6013 /* this dainlink has playback support */
6014 .ignore_pmdown_time = 1,
6015 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6016 .ops = &msm_fe_qos_ops,
6017 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6018 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6019 .name = "Listen 1 Audio Service",
6020 .stream_name = "Listen 1 Audio Service",
6021 .cpu_dai_name = "LSM1",
6022 .platform_name = "msm-lsm-client",
6023 .dynamic = 1,
6024 .dpcm_capture = 1,
6025 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6026 SND_SOC_DPCM_TRIGGER_POST },
6027 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6028 .ignore_suspend = 1,
6029 .codec_dai_name = "snd-soc-dummy-dai",
6030 .codec_name = "snd-soc-dummy",
6031 .id = MSM_FRONTEND_DAI_LSM1,
6032 },
6033 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6034 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6035 .name = MSM_DAILINK_NAME(Compress2),
6036 .stream_name = "Compress2",
6037 .cpu_dai_name = "MultiMedia7",
6038 .platform_name = "msm-compress-dsp",
6039 .dynamic = 1,
6040 .dpcm_playback = 1,
6041 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6042 SND_SOC_DPCM_TRIGGER_POST},
6043 .codec_dai_name = "snd-soc-dummy-dai",
6044 .codec_name = "snd-soc-dummy",
6045 .ignore_suspend = 1,
6046 .ignore_pmdown_time = 1,
6047 /* this dainlink has playback support */
6048 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6049 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6050 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6051 .name = MSM_DAILINK_NAME(MultiMedia10),
6052 .stream_name = "MultiMedia10",
6053 .cpu_dai_name = "MultiMedia10",
6054 .platform_name = "msm-pcm-dsp.1",
6055 .dynamic = 1,
6056 .dpcm_playback = 1,
6057 .dpcm_capture = 1,
6058 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6059 SND_SOC_DPCM_TRIGGER_POST},
6060 .codec_dai_name = "snd-soc-dummy-dai",
6061 .codec_name = "snd-soc-dummy",
6062 .ignore_suspend = 1,
6063 .ignore_pmdown_time = 1,
6064 /* this dainlink has playback support */
6065 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6066 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6067 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6068 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6069 .stream_name = "MM_NOIRQ",
6070 .cpu_dai_name = "MultiMedia8",
6071 .platform_name = "msm-pcm-dsp-noirq",
6072 .dynamic = 1,
6073 .dpcm_playback = 1,
6074 .dpcm_capture = 1,
6075 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6076 SND_SOC_DPCM_TRIGGER_POST},
6077 .codec_dai_name = "snd-soc-dummy-dai",
6078 .codec_name = "snd-soc-dummy",
6079 .ignore_suspend = 1,
6080 .ignore_pmdown_time = 1,
6081 /* this dainlink has playback support */
6082 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6083 .ops = &msm_fe_qos_ops,
6084 },
6085 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6086 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6087 .name = "HDMI_RX_HOSTLESS",
6088 .stream_name = "HDMI_RX_HOSTLESS",
6089 .cpu_dai_name = "HDMI_HOSTLESS",
6090 .platform_name = "msm-pcm-hostless",
6091 .dynamic = 1,
6092 .dpcm_playback = 1,
6093 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6094 SND_SOC_DPCM_TRIGGER_POST},
6095 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6096 .ignore_suspend = 1,
6097 .ignore_pmdown_time = 1,
6098 .codec_dai_name = "snd-soc-dummy-dai",
6099 .codec_name = "snd-soc-dummy",
6100 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6101 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6102 .name = "VoiceMMode2",
6103 .stream_name = "VoiceMMode2",
6104 .cpu_dai_name = "VoiceMMode2",
6105 .platform_name = "msm-pcm-voice",
6106 .dynamic = 1,
6107 .dpcm_playback = 1,
6108 .dpcm_capture = 1,
6109 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6110 SND_SOC_DPCM_TRIGGER_POST},
6111 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6112 .ignore_suspend = 1,
6113 .ignore_pmdown_time = 1,
6114 .codec_dai_name = "snd-soc-dummy-dai",
6115 .codec_name = "snd-soc-dummy",
6116 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6117 },
6118 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6119 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6120 .name = "Listen 2 Audio Service",
6121 .stream_name = "Listen 2 Audio Service",
6122 .cpu_dai_name = "LSM2",
6123 .platform_name = "msm-lsm-client",
6124 .dynamic = 1,
6125 .dpcm_capture = 1,
6126 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6127 SND_SOC_DPCM_TRIGGER_POST },
6128 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6129 .ignore_suspend = 1,
6130 .codec_dai_name = "snd-soc-dummy-dai",
6131 .codec_name = "snd-soc-dummy",
6132 .id = MSM_FRONTEND_DAI_LSM2,
6133 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6134 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6135 .name = "Listen 3 Audio Service",
6136 .stream_name = "Listen 3 Audio Service",
6137 .cpu_dai_name = "LSM3",
6138 .platform_name = "msm-lsm-client",
6139 .dynamic = 1,
6140 .dpcm_capture = 1,
6141 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6142 SND_SOC_DPCM_TRIGGER_POST },
6143 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6144 .ignore_suspend = 1,
6145 .codec_dai_name = "snd-soc-dummy-dai",
6146 .codec_name = "snd-soc-dummy",
6147 .id = MSM_FRONTEND_DAI_LSM3,
6148 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6149 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6150 .name = "Listen 4 Audio Service",
6151 .stream_name = "Listen 4 Audio Service",
6152 .cpu_dai_name = "LSM4",
6153 .platform_name = "msm-lsm-client",
6154 .dynamic = 1,
6155 .dpcm_capture = 1,
6156 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6157 SND_SOC_DPCM_TRIGGER_POST },
6158 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6159 .ignore_suspend = 1,
6160 .codec_dai_name = "snd-soc-dummy-dai",
6161 .codec_name = "snd-soc-dummy",
6162 .id = MSM_FRONTEND_DAI_LSM4,
6163 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6164 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6165 .name = "Listen 5 Audio Service",
6166 .stream_name = "Listen 5 Audio Service",
6167 .cpu_dai_name = "LSM5",
6168 .platform_name = "msm-lsm-client",
6169 .dynamic = 1,
6170 .dpcm_capture = 1,
6171 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6172 SND_SOC_DPCM_TRIGGER_POST },
6173 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6174 .ignore_suspend = 1,
6175 .codec_dai_name = "snd-soc-dummy-dai",
6176 .codec_name = "snd-soc-dummy",
6177 .id = MSM_FRONTEND_DAI_LSM5,
6178 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6179 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6180 .name = "Listen 6 Audio Service",
6181 .stream_name = "Listen 6 Audio Service",
6182 .cpu_dai_name = "LSM6",
6183 .platform_name = "msm-lsm-client",
6184 .dynamic = 1,
6185 .dpcm_capture = 1,
6186 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6187 SND_SOC_DPCM_TRIGGER_POST },
6188 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6189 .ignore_suspend = 1,
6190 .codec_dai_name = "snd-soc-dummy-dai",
6191 .codec_name = "snd-soc-dummy",
6192 .id = MSM_FRONTEND_DAI_LSM6,
6193 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6194 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6195 .name = "Listen 7 Audio Service",
6196 .stream_name = "Listen 7 Audio Service",
6197 .cpu_dai_name = "LSM7",
6198 .platform_name = "msm-lsm-client",
6199 .dynamic = 1,
6200 .dpcm_capture = 1,
6201 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6202 SND_SOC_DPCM_TRIGGER_POST },
6203 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6204 .ignore_suspend = 1,
6205 .codec_dai_name = "snd-soc-dummy-dai",
6206 .codec_name = "snd-soc-dummy",
6207 .id = MSM_FRONTEND_DAI_LSM7,
6208 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6209 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6210 .name = "Listen 8 Audio Service",
6211 .stream_name = "Listen 8 Audio Service",
6212 .cpu_dai_name = "LSM8",
6213 .platform_name = "msm-lsm-client",
6214 .dynamic = 1,
6215 .dpcm_capture = 1,
6216 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6217 SND_SOC_DPCM_TRIGGER_POST },
6218 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6219 .ignore_suspend = 1,
6220 .codec_dai_name = "snd-soc-dummy-dai",
6221 .codec_name = "snd-soc-dummy",
6222 .id = MSM_FRONTEND_DAI_LSM8,
6223 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6224 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6225 .name = MSM_DAILINK_NAME(Media9),
6226 .stream_name = "MultiMedia9",
6227 .cpu_dai_name = "MultiMedia9",
6228 .platform_name = "msm-pcm-dsp.0",
6229 .dynamic = 1,
6230 .dpcm_playback = 1,
6231 .dpcm_capture = 1,
6232 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6233 SND_SOC_DPCM_TRIGGER_POST},
6234 .codec_dai_name = "snd-soc-dummy-dai",
6235 .codec_name = "snd-soc-dummy",
6236 .ignore_suspend = 1,
6237 /* this dainlink has playback support */
6238 .ignore_pmdown_time = 1,
6239 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6240 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6241 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6242 .name = MSM_DAILINK_NAME(Compress4),
6243 .stream_name = "Compress4",
6244 .cpu_dai_name = "MultiMedia11",
6245 .platform_name = "msm-compress-dsp",
6246 .dynamic = 1,
6247 .dpcm_playback = 1,
6248 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6249 SND_SOC_DPCM_TRIGGER_POST},
6250 .codec_dai_name = "snd-soc-dummy-dai",
6251 .codec_name = "snd-soc-dummy",
6252 .ignore_suspend = 1,
6253 .ignore_pmdown_time = 1,
6254 /* this dainlink has playback support */
6255 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6256 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6257 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6258 .name = MSM_DAILINK_NAME(Compress5),
6259 .stream_name = "Compress5",
6260 .cpu_dai_name = "MultiMedia12",
6261 .platform_name = "msm-compress-dsp",
6262 .dynamic = 1,
6263 .dpcm_playback = 1,
6264 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6265 SND_SOC_DPCM_TRIGGER_POST},
6266 .codec_dai_name = "snd-soc-dummy-dai",
6267 .codec_name = "snd-soc-dummy",
6268 .ignore_suspend = 1,
6269 .ignore_pmdown_time = 1,
6270 /* this dainlink has playback support */
6271 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6272 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6273 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6274 .name = MSM_DAILINK_NAME(Compress6),
6275 .stream_name = "Compress6",
6276 .cpu_dai_name = "MultiMedia13",
6277 .platform_name = "msm-compress-dsp",
6278 .dynamic = 1,
6279 .dpcm_playback = 1,
6280 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6281 SND_SOC_DPCM_TRIGGER_POST},
6282 .codec_dai_name = "snd-soc-dummy-dai",
6283 .codec_name = "snd-soc-dummy",
6284 .ignore_suspend = 1,
6285 .ignore_pmdown_time = 1,
6286 /* this dainlink has playback support */
6287 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6288 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6289 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6290 .name = MSM_DAILINK_NAME(Compress7),
6291 .stream_name = "Compress7",
6292 .cpu_dai_name = "MultiMedia14",
6293 .platform_name = "msm-compress-dsp",
6294 .dynamic = 1,
6295 .dpcm_playback = 1,
6296 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6297 SND_SOC_DPCM_TRIGGER_POST},
6298 .codec_dai_name = "snd-soc-dummy-dai",
6299 .codec_name = "snd-soc-dummy",
6300 .ignore_suspend = 1,
6301 .ignore_pmdown_time = 1,
6302 /* this dainlink has playback support */
6303 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6304 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6305 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6306 .name = MSM_DAILINK_NAME(Compress8),
6307 .stream_name = "Compress8",
6308 .cpu_dai_name = "MultiMedia15",
6309 .platform_name = "msm-compress-dsp",
6310 .dynamic = 1,
6311 .dpcm_playback = 1,
6312 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6313 SND_SOC_DPCM_TRIGGER_POST},
6314 .codec_dai_name = "snd-soc-dummy-dai",
6315 .codec_name = "snd-soc-dummy",
6316 .ignore_suspend = 1,
6317 .ignore_pmdown_time = 1,
6318 /* this dainlink has playback support */
6319 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6320 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6321 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6322 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6323 .stream_name = "MM_NOIRQ_2",
6324 .cpu_dai_name = "MultiMedia16",
6325 .platform_name = "msm-pcm-dsp-noirq",
6326 .dynamic = 1,
6327 .dpcm_playback = 1,
6328 .dpcm_capture = 1,
6329 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6330 SND_SOC_DPCM_TRIGGER_POST},
6331 .codec_dai_name = "snd-soc-dummy-dai",
6332 .codec_name = "snd-soc-dummy",
6333 .ignore_suspend = 1,
6334 .ignore_pmdown_time = 1,
6335 /* this dainlink has playback support */
6336 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6337 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6338 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6339 .name = "SLIMBUS_8 Hostless",
6340 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6341 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6342 .platform_name = "msm-pcm-hostless",
6343 .dynamic = 1,
6344 .dpcm_capture = 1,
6345 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6346 SND_SOC_DPCM_TRIGGER_POST},
6347 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6348 .ignore_suspend = 1,
6349 .codec_dai_name = "snd-soc-dummy-dai",
6350 .codec_name = "snd-soc-dummy",
6351 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6352 {/* hw:x,35 */
6353 .name = "CDC_DMA Hostless",
6354 .stream_name = "CDC_DMA Hostless",
6355 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6356 .platform_name = "msm-pcm-hostless",
6357 .dynamic = 1,
6358 .dpcm_playback = 1,
6359 .dpcm_capture = 1,
6360 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6361 SND_SOC_DPCM_TRIGGER_POST},
6362 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6363 .ignore_suspend = 1,
6364 /* this dailink has playback support */
6365 .ignore_pmdown_time = 1,
6366 .codec_dai_name = "snd-soc-dummy-dai",
6367 .codec_name = "snd-soc-dummy",
6368 },
6369 {/* hw:x,36 */
6370 .name = "TX3_CDC_DMA Hostless",
6371 .stream_name = "TX3_CDC_DMA Hostless",
6372 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6373 .platform_name = "msm-pcm-hostless",
6374 .dynamic = 1,
6375 .dpcm_capture = 1,
6376 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6377 SND_SOC_DPCM_TRIGGER_POST},
6378 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6379 .ignore_suspend = 1,
6380 .codec_dai_name = "snd-soc-dummy-dai",
6381 .codec_name = "snd-soc-dummy",
6382 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6383};
6384
6385
6386static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6387 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6388 .name = LPASS_BE_SLIMBUS_4_TX,
6389 .stream_name = "Slimbus4 Capture",
6390 .cpu_dai_name = "msm-dai-q6-dev.16393",
6391 .platform_name = "msm-pcm-hostless",
6392 .codec_name = "tavil_codec",
6393 .codec_dai_name = "tavil_vifeedback",
6394 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6395 .be_hw_params_fixup = msm_be_hw_params_fixup,
6396 .ops = &msm_be_ops,
6397 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6398 .ignore_suspend = 1,
6399 },
6400 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6401 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6402 .name = "SLIMBUS_2 Hostless Playback",
6403 .stream_name = "SLIMBUS_2 Hostless Playback",
6404 .cpu_dai_name = "msm-dai-q6-dev.16388",
6405 .platform_name = "msm-pcm-hostless",
6406 .codec_name = "tavil_codec",
6407 .codec_dai_name = "tavil_rx2",
6408 .ignore_suspend = 1,
6409 .ignore_pmdown_time = 1,
6410 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6411 .ops = &msm_slimbus_2_be_ops,
6412 },
6413 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6414 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6415 .name = "SLIMBUS_2 Hostless Capture",
6416 .stream_name = "SLIMBUS_2 Hostless Capture",
6417 .cpu_dai_name = "msm-dai-q6-dev.16389",
6418 .platform_name = "msm-pcm-hostless",
6419 .codec_name = "tavil_codec",
6420 .codec_dai_name = "tavil_tx2",
6421 .ignore_suspend = 1,
6422 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6423 .ops = &msm_slimbus_2_be_ops,
6424 },
6425};
6426
6427static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6428 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6429 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6430 .stream_name = "WSA CDC DMA0 Capture",
6431 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6432 .platform_name = "msm-pcm-hostless",
6433 .codec_name = "bolero_codec",
6434 .codec_dai_name = "wsa_macro_vifeedback",
6435 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6436 .be_hw_params_fixup = msm_be_hw_params_fixup,
6437 .ignore_suspend = 1,
6438 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6439 .ops = &msm_cdc_dma_be_ops,
6440 },
6441};
6442
6443static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6444 {
6445 .name = MSM_DAILINK_NAME(ASM Loopback),
6446 .stream_name = "MultiMedia6",
6447 .cpu_dai_name = "MultiMedia6",
6448 .platform_name = "msm-pcm-loopback",
6449 .dynamic = 1,
6450 .dpcm_playback = 1,
6451 .dpcm_capture = 1,
6452 .codec_dai_name = "snd-soc-dummy-dai",
6453 .codec_name = "snd-soc-dummy",
6454 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6455 SND_SOC_DPCM_TRIGGER_POST},
6456 .ignore_suspend = 1,
6457 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6458 .ignore_pmdown_time = 1,
6459 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6460 },
6461 {
6462 .name = "USB Audio Hostless",
6463 .stream_name = "USB Audio Hostless",
6464 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6465 .platform_name = "msm-pcm-hostless",
6466 .dynamic = 1,
6467 .dpcm_playback = 1,
6468 .dpcm_capture = 1,
6469 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6470 SND_SOC_DPCM_TRIGGER_POST},
6471 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6472 .ignore_suspend = 1,
6473 .ignore_pmdown_time = 1,
6474 .codec_dai_name = "snd-soc-dummy-dai",
6475 .codec_name = "snd-soc-dummy",
6476 },
6477};
6478
6479static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6480 /* Backend AFE DAI Links */
6481 {
6482 .name = LPASS_BE_AFE_PCM_RX,
6483 .stream_name = "AFE Playback",
6484 .cpu_dai_name = "msm-dai-q6-dev.224",
6485 .platform_name = "msm-pcm-routing",
6486 .codec_name = "msm-stub-codec.1",
6487 .codec_dai_name = "msm-stub-rx",
6488 .no_pcm = 1,
6489 .dpcm_playback = 1,
6490 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6491 .be_hw_params_fixup = msm_be_hw_params_fixup,
6492 /* this dainlink has playback support */
6493 .ignore_pmdown_time = 1,
6494 .ignore_suspend = 1,
6495 },
6496 {
6497 .name = LPASS_BE_AFE_PCM_TX,
6498 .stream_name = "AFE Capture",
6499 .cpu_dai_name = "msm-dai-q6-dev.225",
6500 .platform_name = "msm-pcm-routing",
6501 .codec_name = "msm-stub-codec.1",
6502 .codec_dai_name = "msm-stub-tx",
6503 .no_pcm = 1,
6504 .dpcm_capture = 1,
6505 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6506 .be_hw_params_fixup = msm_be_hw_params_fixup,
6507 .ignore_suspend = 1,
6508 },
6509 /* Incall Record Uplink BACK END DAI Link */
6510 {
6511 .name = LPASS_BE_INCALL_RECORD_TX,
6512 .stream_name = "Voice Uplink Capture",
6513 .cpu_dai_name = "msm-dai-q6-dev.32772",
6514 .platform_name = "msm-pcm-routing",
6515 .codec_name = "msm-stub-codec.1",
6516 .codec_dai_name = "msm-stub-tx",
6517 .no_pcm = 1,
6518 .dpcm_capture = 1,
6519 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6520 .be_hw_params_fixup = msm_be_hw_params_fixup,
6521 .ignore_suspend = 1,
6522 },
6523 /* Incall Record Downlink BACK END DAI Link */
6524 {
6525 .name = LPASS_BE_INCALL_RECORD_RX,
6526 .stream_name = "Voice Downlink Capture",
6527 .cpu_dai_name = "msm-dai-q6-dev.32771",
6528 .platform_name = "msm-pcm-routing",
6529 .codec_name = "msm-stub-codec.1",
6530 .codec_dai_name = "msm-stub-tx",
6531 .no_pcm = 1,
6532 .dpcm_capture = 1,
6533 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6534 .be_hw_params_fixup = msm_be_hw_params_fixup,
6535 .ignore_suspend = 1,
6536 },
6537 /* Incall Music BACK END DAI Link */
6538 {
6539 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6540 .stream_name = "Voice Farend Playback",
6541 .cpu_dai_name = "msm-dai-q6-dev.32773",
6542 .platform_name = "msm-pcm-routing",
6543 .codec_name = "msm-stub-codec.1",
6544 .codec_dai_name = "msm-stub-rx",
6545 .no_pcm = 1,
6546 .dpcm_playback = 1,
6547 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6548 .be_hw_params_fixup = msm_be_hw_params_fixup,
6549 .ignore_suspend = 1,
6550 .ignore_pmdown_time = 1,
6551 },
6552 /* Incall Music 2 BACK END DAI Link */
6553 {
6554 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6555 .stream_name = "Voice2 Farend Playback",
6556 .cpu_dai_name = "msm-dai-q6-dev.32770",
6557 .platform_name = "msm-pcm-routing",
6558 .codec_name = "msm-stub-codec.1",
6559 .codec_dai_name = "msm-stub-rx",
6560 .no_pcm = 1,
6561 .dpcm_playback = 1,
6562 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6563 .be_hw_params_fixup = msm_be_hw_params_fixup,
6564 .ignore_suspend = 1,
6565 .ignore_pmdown_time = 1,
6566 },
6567 {
6568 .name = LPASS_BE_USB_AUDIO_RX,
6569 .stream_name = "USB Audio Playback",
6570 .cpu_dai_name = "msm-dai-q6-dev.28672",
6571 .platform_name = "msm-pcm-routing",
6572 .codec_name = "msm-stub-codec.1",
6573 .codec_dai_name = "msm-stub-rx",
6574 .no_pcm = 1,
6575 .dpcm_playback = 1,
6576 .id = MSM_BACKEND_DAI_USB_RX,
6577 .be_hw_params_fixup = msm_be_hw_params_fixup,
6578 .ignore_pmdown_time = 1,
6579 .ignore_suspend = 1,
6580 },
6581 {
6582 .name = LPASS_BE_USB_AUDIO_TX,
6583 .stream_name = "USB Audio Capture",
6584 .cpu_dai_name = "msm-dai-q6-dev.28673",
6585 .platform_name = "msm-pcm-routing",
6586 .codec_name = "msm-stub-codec.1",
6587 .codec_dai_name = "msm-stub-tx",
6588 .no_pcm = 1,
6589 .dpcm_capture = 1,
6590 .id = MSM_BACKEND_DAI_USB_TX,
6591 .be_hw_params_fixup = msm_be_hw_params_fixup,
6592 .ignore_suspend = 1,
6593 },
6594 {
6595 .name = LPASS_BE_PRI_TDM_RX_0,
6596 .stream_name = "Primary TDM0 Playback",
6597 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6598 .platform_name = "msm-pcm-routing",
6599 .codec_name = "msm-stub-codec.1",
6600 .codec_dai_name = "msm-stub-rx",
6601 .no_pcm = 1,
6602 .dpcm_playback = 1,
6603 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6604 .be_hw_params_fixup = msm_be_hw_params_fixup,
6605 .ops = &sm6150_tdm_be_ops,
6606 .ignore_suspend = 1,
6607 .ignore_pmdown_time = 1,
6608 },
6609 {
6610 .name = LPASS_BE_PRI_TDM_TX_0,
6611 .stream_name = "Primary TDM0 Capture",
6612 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6613 .platform_name = "msm-pcm-routing",
6614 .codec_name = "msm-stub-codec.1",
6615 .codec_dai_name = "msm-stub-tx",
6616 .no_pcm = 1,
6617 .dpcm_capture = 1,
6618 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6619 .be_hw_params_fixup = msm_be_hw_params_fixup,
6620 .ops = &sm6150_tdm_be_ops,
6621 .ignore_suspend = 1,
6622 },
6623 {
6624 .name = LPASS_BE_SEC_TDM_RX_0,
6625 .stream_name = "Secondary TDM0 Playback",
6626 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6627 .platform_name = "msm-pcm-routing",
6628 .codec_name = "msm-stub-codec.1",
6629 .codec_dai_name = "msm-stub-rx",
6630 .no_pcm = 1,
6631 .dpcm_playback = 1,
6632 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6633 .be_hw_params_fixup = msm_be_hw_params_fixup,
6634 .ops = &sm6150_tdm_be_ops,
6635 .ignore_suspend = 1,
6636 .ignore_pmdown_time = 1,
6637 },
6638 {
6639 .name = LPASS_BE_SEC_TDM_TX_0,
6640 .stream_name = "Secondary TDM0 Capture",
6641 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6642 .platform_name = "msm-pcm-routing",
6643 .codec_name = "msm-stub-codec.1",
6644 .codec_dai_name = "msm-stub-tx",
6645 .no_pcm = 1,
6646 .dpcm_capture = 1,
6647 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6648 .be_hw_params_fixup = msm_be_hw_params_fixup,
6649 .ops = &sm6150_tdm_be_ops,
6650 .ignore_suspend = 1,
6651 },
6652 {
6653 .name = LPASS_BE_TERT_TDM_RX_0,
6654 .stream_name = "Tertiary TDM0 Playback",
6655 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6656 .platform_name = "msm-pcm-routing",
6657 .codec_name = "msm-stub-codec.1",
6658 .codec_dai_name = "msm-stub-rx",
6659 .no_pcm = 1,
6660 .dpcm_playback = 1,
6661 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6662 .be_hw_params_fixup = msm_be_hw_params_fixup,
6663 .ops = &sm6150_tdm_be_ops,
6664 .ignore_suspend = 1,
6665 .ignore_pmdown_time = 1,
6666 },
6667 {
6668 .name = LPASS_BE_TERT_TDM_TX_0,
6669 .stream_name = "Tertiary TDM0 Capture",
6670 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6671 .platform_name = "msm-pcm-routing",
6672 .codec_name = "msm-stub-codec.1",
6673 .codec_dai_name = "msm-stub-tx",
6674 .no_pcm = 1,
6675 .dpcm_capture = 1,
6676 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6677 .be_hw_params_fixup = msm_be_hw_params_fixup,
6678 .ops = &sm6150_tdm_be_ops,
6679 .ignore_suspend = 1,
6680 },
6681 {
6682 .name = LPASS_BE_QUAT_TDM_RX_0,
6683 .stream_name = "Quaternary TDM0 Playback",
6684 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6685 .platform_name = "msm-pcm-routing",
6686 .codec_name = "msm-stub-codec.1",
6687 .codec_dai_name = "msm-stub-rx",
6688 .no_pcm = 1,
6689 .dpcm_playback = 1,
6690 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6691 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6692 .ops = &sm6150_tdm_be_ops,
6693 .ignore_suspend = 1,
6694 .ignore_pmdown_time = 1,
6695 },
6696 {
6697 .name = LPASS_BE_QUAT_TDM_TX_0,
6698 .stream_name = "Quaternary TDM0 Capture",
6699 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6700 .platform_name = "msm-pcm-routing",
6701 .codec_name = "msm-stub-codec.1",
6702 .codec_dai_name = "msm-stub-tx",
6703 .no_pcm = 1,
6704 .dpcm_capture = 1,
6705 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6706 .be_hw_params_fixup = msm_be_hw_params_fixup,
6707 .ops = &sm6150_tdm_be_ops,
6708 .ignore_suspend = 1,
6709 },
6710};
6711
6712static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6713 {
6714 .name = LPASS_BE_SLIMBUS_0_RX,
6715 .stream_name = "Slimbus Playback",
6716 .cpu_dai_name = "msm-dai-q6-dev.16384",
6717 .platform_name = "msm-pcm-routing",
6718 .codec_name = "tavil_codec",
6719 .codec_dai_name = "tavil_rx1",
6720 .no_pcm = 1,
6721 .dpcm_playback = 1,
6722 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6723 .init = &msm_audrx_tavil_init,
6724 .be_hw_params_fixup = msm_be_hw_params_fixup,
6725 /* this dainlink has playback support */
6726 .ignore_pmdown_time = 1,
6727 .ignore_suspend = 1,
6728 .ops = &msm_be_ops,
6729 },
6730 {
6731 .name = LPASS_BE_SLIMBUS_0_TX,
6732 .stream_name = "Slimbus Capture",
6733 .cpu_dai_name = "msm-dai-q6-dev.16385",
6734 .platform_name = "msm-pcm-routing",
6735 .codec_name = "tavil_codec",
6736 .codec_dai_name = "tavil_tx1",
6737 .no_pcm = 1,
6738 .dpcm_capture = 1,
6739 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6740 .be_hw_params_fixup = msm_be_hw_params_fixup,
6741 .ignore_suspend = 1,
6742 .ops = &msm_be_ops,
6743 },
6744 {
6745 .name = LPASS_BE_SLIMBUS_1_RX,
6746 .stream_name = "Slimbus1 Playback",
6747 .cpu_dai_name = "msm-dai-q6-dev.16386",
6748 .platform_name = "msm-pcm-routing",
6749 .codec_name = "tavil_codec",
6750 .codec_dai_name = "tavil_rx1",
6751 .no_pcm = 1,
6752 .dpcm_playback = 1,
6753 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6754 .be_hw_params_fixup = msm_be_hw_params_fixup,
6755 .ops = &msm_be_ops,
6756 /* dai link has playback support */
6757 .ignore_pmdown_time = 1,
6758 .ignore_suspend = 1,
6759 },
6760 {
6761 .name = LPASS_BE_SLIMBUS_1_TX,
6762 .stream_name = "Slimbus1 Capture",
6763 .cpu_dai_name = "msm-dai-q6-dev.16387",
6764 .platform_name = "msm-pcm-routing",
6765 .codec_name = "tavil_codec",
6766 .codec_dai_name = "tavil_tx3",
6767 .no_pcm = 1,
6768 .dpcm_capture = 1,
6769 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6770 .be_hw_params_fixup = msm_be_hw_params_fixup,
6771 .ops = &msm_be_ops,
6772 .ignore_suspend = 1,
6773 },
6774 {
6775 .name = LPASS_BE_SLIMBUS_2_RX,
6776 .stream_name = "Slimbus2 Playback",
6777 .cpu_dai_name = "msm-dai-q6-dev.16388",
6778 .platform_name = "msm-pcm-routing",
6779 .codec_name = "tavil_codec",
6780 .codec_dai_name = "tavil_rx2",
6781 .no_pcm = 1,
6782 .dpcm_playback = 1,
6783 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6784 .be_hw_params_fixup = msm_be_hw_params_fixup,
6785 .ops = &msm_be_ops,
6786 .ignore_pmdown_time = 1,
6787 .ignore_suspend = 1,
6788 },
6789 {
6790 .name = LPASS_BE_SLIMBUS_3_RX,
6791 .stream_name = "Slimbus3 Playback",
6792 .cpu_dai_name = "msm-dai-q6-dev.16390",
6793 .platform_name = "msm-pcm-routing",
6794 .codec_name = "tavil_codec",
6795 .codec_dai_name = "tavil_rx1",
6796 .no_pcm = 1,
6797 .dpcm_playback = 1,
6798 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6799 .be_hw_params_fixup = msm_be_hw_params_fixup,
6800 .ops = &msm_be_ops,
6801 /* dai link has playback support */
6802 .ignore_pmdown_time = 1,
6803 .ignore_suspend = 1,
6804 },
6805 {
6806 .name = LPASS_BE_SLIMBUS_3_TX,
6807 .stream_name = "Slimbus3 Capture",
6808 .cpu_dai_name = "msm-dai-q6-dev.16391",
6809 .platform_name = "msm-pcm-routing",
6810 .codec_name = "tavil_codec",
6811 .codec_dai_name = "tavil_tx1",
6812 .no_pcm = 1,
6813 .dpcm_capture = 1,
6814 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6815 .be_hw_params_fixup = msm_be_hw_params_fixup,
6816 .ops = &msm_be_ops,
6817 .ignore_suspend = 1,
6818 },
6819 {
6820 .name = LPASS_BE_SLIMBUS_4_RX,
6821 .stream_name = "Slimbus4 Playback",
6822 .cpu_dai_name = "msm-dai-q6-dev.16392",
6823 .platform_name = "msm-pcm-routing",
6824 .codec_name = "tavil_codec",
6825 .codec_dai_name = "tavil_rx1",
6826 .no_pcm = 1,
6827 .dpcm_playback = 1,
6828 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6829 .be_hw_params_fixup = msm_be_hw_params_fixup,
6830 .ops = &msm_be_ops,
6831 /* dai link has playback support */
6832 .ignore_pmdown_time = 1,
6833 .ignore_suspend = 1,
6834 },
6835 {
6836 .name = LPASS_BE_SLIMBUS_5_RX,
6837 .stream_name = "Slimbus5 Playback",
6838 .cpu_dai_name = "msm-dai-q6-dev.16394",
6839 .platform_name = "msm-pcm-routing",
6840 .codec_name = "tavil_codec",
6841 .codec_dai_name = "tavil_rx3",
6842 .no_pcm = 1,
6843 .dpcm_playback = 1,
6844 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6845 .be_hw_params_fixup = msm_be_hw_params_fixup,
6846 .ops = &msm_be_ops,
6847 /* dai link has playback support */
6848 .ignore_pmdown_time = 1,
6849 .ignore_suspend = 1,
6850 },
6851 /* MAD BE */
6852 {
6853 .name = LPASS_BE_SLIMBUS_5_TX,
6854 .stream_name = "Slimbus5 Capture",
6855 .cpu_dai_name = "msm-dai-q6-dev.16395",
6856 .platform_name = "msm-pcm-routing",
6857 .codec_name = "tavil_codec",
6858 .codec_dai_name = "tavil_mad1",
6859 .no_pcm = 1,
6860 .dpcm_capture = 1,
6861 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6862 .be_hw_params_fixup = msm_be_hw_params_fixup,
6863 .ops = &msm_be_ops,
6864 .ignore_suspend = 1,
6865 },
6866 {
6867 .name = LPASS_BE_SLIMBUS_6_RX,
6868 .stream_name = "Slimbus6 Playback",
6869 .cpu_dai_name = "msm-dai-q6-dev.16396",
6870 .platform_name = "msm-pcm-routing",
6871 .codec_name = "tavil_codec",
6872 .codec_dai_name = "tavil_rx4",
6873 .no_pcm = 1,
6874 .dpcm_playback = 1,
6875 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6876 .be_hw_params_fixup = msm_be_hw_params_fixup,
6877 .ops = &msm_be_ops,
6878 /* dai link has playback support */
6879 .ignore_pmdown_time = 1,
6880 .ignore_suspend = 1,
6881 },
6882 /* Slimbus VI Recording */
6883 {
6884 .name = LPASS_BE_SLIMBUS_TX_VI,
6885 .stream_name = "Slimbus4 Capture",
6886 .cpu_dai_name = "msm-dai-q6-dev.16393",
6887 .platform_name = "msm-pcm-routing",
6888 .codec_name = "tavil_codec",
6889 .codec_dai_name = "tavil_vifeedback",
6890 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6891 .be_hw_params_fixup = msm_be_hw_params_fixup,
6892 .ops = &msm_be_ops,
6893 .ignore_suspend = 1,
6894 .no_pcm = 1,
6895 .dpcm_capture = 1,
6896 },
6897};
6898
6899static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6900 {
6901 .name = LPASS_BE_SLIMBUS_7_RX,
6902 .stream_name = "Slimbus7 Playback",
6903 .cpu_dai_name = "msm-dai-q6-dev.16398",
6904 .platform_name = "msm-pcm-routing",
6905 .codec_name = "btfmslim_slave",
6906 /* BT codec driver determines capabilities based on
6907 * dai name, bt codecdai name should always contains
6908 * supported usecase information
6909 */
6910 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6911 .no_pcm = 1,
6912 .dpcm_playback = 1,
6913 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6914 .be_hw_params_fixup = msm_be_hw_params_fixup,
6915 .ops = &msm_wcn_ops,
6916 /* dai link has playback support */
6917 .ignore_pmdown_time = 1,
6918 .ignore_suspend = 1,
6919 },
6920 {
6921 .name = LPASS_BE_SLIMBUS_7_TX,
6922 .stream_name = "Slimbus7 Capture",
6923 .cpu_dai_name = "msm-dai-q6-dev.16399",
6924 .platform_name = "msm-pcm-routing",
6925 .codec_name = "btfmslim_slave",
6926 .codec_dai_name = "btfm_bt_sco_slim_tx",
6927 .no_pcm = 1,
6928 .dpcm_capture = 1,
6929 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6930 .be_hw_params_fixup = msm_be_hw_params_fixup,
6931 .ops = &msm_wcn_ops,
6932 .ignore_suspend = 1,
6933 },
6934 {
6935 .name = LPASS_BE_SLIMBUS_8_TX,
6936 .stream_name = "Slimbus8 Capture",
6937 .cpu_dai_name = "msm-dai-q6-dev.16401",
6938 .platform_name = "msm-pcm-routing",
6939 .codec_name = "btfmslim_slave",
6940 .codec_dai_name = "btfm_fm_slim_tx",
6941 .no_pcm = 1,
6942 .dpcm_capture = 1,
6943 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6944 .be_hw_params_fixup = msm_be_hw_params_fixup,
6945 .init = &msm_wcn_init,
6946 .ops = &msm_wcn_ops,
6947 .ignore_suspend = 1,
6948 },
6949};
6950
6951static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6952 /* DISP PORT BACK END DAI Link */
6953 {
6954 .name = LPASS_BE_DISPLAY_PORT,
6955 .stream_name = "Display Port Playback",
6956 .cpu_dai_name = "msm-dai-q6-dp.24608",
6957 .platform_name = "msm-pcm-routing",
6958 .codec_name = "msm-ext-disp-audio-codec-rx",
6959 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6960 .no_pcm = 1,
6961 .dpcm_playback = 1,
6962 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6963 .be_hw_params_fixup = msm_be_hw_params_fixup,
6964 .ignore_pmdown_time = 1,
6965 .ignore_suspend = 1,
6966 },
6967};
6968
6969static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6970 {
6971 .name = LPASS_BE_PRI_MI2S_RX,
6972 .stream_name = "Primary MI2S Playback",
6973 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6974 .platform_name = "msm-pcm-routing",
6975 .codec_name = "msm-stub-codec.1",
6976 .codec_dai_name = "msm-stub-rx",
6977 .no_pcm = 1,
6978 .dpcm_playback = 1,
6979 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6980 .be_hw_params_fixup = msm_be_hw_params_fixup,
6981 .ops = &msm_mi2s_be_ops,
6982 .ignore_suspend = 1,
6983 .ignore_pmdown_time = 1,
6984 },
6985 {
6986 .name = LPASS_BE_PRI_MI2S_TX,
6987 .stream_name = "Primary MI2S Capture",
6988 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6989 .platform_name = "msm-pcm-routing",
6990 .codec_name = "msm-stub-codec.1",
6991 .codec_dai_name = "msm-stub-tx",
6992 .no_pcm = 1,
6993 .dpcm_capture = 1,
6994 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6995 .be_hw_params_fixup = msm_be_hw_params_fixup,
6996 .ops = &msm_mi2s_be_ops,
6997 .ignore_suspend = 1,
6998 },
6999 {
7000 .name = LPASS_BE_SEC_MI2S_RX,
7001 .stream_name = "Secondary MI2S Playback",
7002 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7003 .platform_name = "msm-pcm-routing",
7004 .codec_name = "msm-stub-codec.1",
7005 .codec_dai_name = "msm-stub-rx",
7006 .no_pcm = 1,
7007 .dpcm_playback = 1,
7008 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7009 .be_hw_params_fixup = msm_be_hw_params_fixup,
7010 .ops = &msm_mi2s_be_ops,
7011 .ignore_suspend = 1,
7012 .ignore_pmdown_time = 1,
7013 },
7014 {
7015 .name = LPASS_BE_SEC_MI2S_TX,
7016 .stream_name = "Secondary MI2S Capture",
7017 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7018 .platform_name = "msm-pcm-routing",
7019 .codec_name = "msm-stub-codec.1",
7020 .codec_dai_name = "msm-stub-tx",
7021 .no_pcm = 1,
7022 .dpcm_capture = 1,
7023 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7024 .be_hw_params_fixup = msm_be_hw_params_fixup,
7025 .ops = &msm_mi2s_be_ops,
7026 .ignore_suspend = 1,
7027 },
7028 {
7029 .name = LPASS_BE_TERT_MI2S_RX,
7030 .stream_name = "Tertiary MI2S Playback",
7031 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7032 .platform_name = "msm-pcm-routing",
7033 .codec_name = "msm-stub-codec.1",
7034 .codec_dai_name = "msm-stub-rx",
7035 .no_pcm = 1,
7036 .dpcm_playback = 1,
7037 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7038 .be_hw_params_fixup = msm_be_hw_params_fixup,
7039 .ops = &msm_mi2s_be_ops,
7040 .ignore_suspend = 1,
7041 .ignore_pmdown_time = 1,
7042 },
7043 {
7044 .name = LPASS_BE_TERT_MI2S_TX,
7045 .stream_name = "Tertiary MI2S Capture",
7046 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7047 .platform_name = "msm-pcm-routing",
7048 .codec_name = "msm-stub-codec.1",
7049 .codec_dai_name = "msm-stub-tx",
7050 .no_pcm = 1,
7051 .dpcm_capture = 1,
7052 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7053 .be_hw_params_fixup = msm_be_hw_params_fixup,
7054 .ops = &msm_mi2s_be_ops,
7055 .ignore_suspend = 1,
7056 },
7057 {
7058 .name = LPASS_BE_QUAT_MI2S_RX,
7059 .stream_name = "Quaternary MI2S Playback",
7060 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7061 .platform_name = "msm-pcm-routing",
7062 .codec_name = "msm-stub-codec.1",
7063 .codec_dai_name = "msm-stub-rx",
7064 .no_pcm = 1,
7065 .dpcm_playback = 1,
7066 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7067 .be_hw_params_fixup = msm_be_hw_params_fixup,
7068 .ops = &msm_mi2s_be_ops,
7069 .ignore_suspend = 1,
7070 .ignore_pmdown_time = 1,
7071 },
7072 {
7073 .name = LPASS_BE_QUAT_MI2S_TX,
7074 .stream_name = "Quaternary MI2S Capture",
7075 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7076 .platform_name = "msm-pcm-routing",
7077 .codec_name = "msm-stub-codec.1",
7078 .codec_dai_name = "msm-stub-tx",
7079 .no_pcm = 1,
7080 .dpcm_capture = 1,
7081 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7082 .be_hw_params_fixup = msm_be_hw_params_fixup,
7083 .ops = &msm_mi2s_be_ops,
7084 .ignore_suspend = 1,
7085 },
7086 {
7087 .name = LPASS_BE_QUIN_MI2S_RX,
7088 .stream_name = "Quinary MI2S Playback",
7089 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7090 .platform_name = "msm-pcm-routing",
7091 .codec_name = "msm-stub-codec.1",
7092 .codec_dai_name = "msm-stub-rx",
7093 .no_pcm = 1,
7094 .dpcm_playback = 1,
7095 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7096 .be_hw_params_fixup = msm_be_hw_params_fixup,
7097 .ops = &msm_mi2s_be_ops,
7098 .ignore_suspend = 1,
7099 .ignore_pmdown_time = 1,
7100 },
7101 {
7102 .name = LPASS_BE_QUIN_MI2S_TX,
7103 .stream_name = "Quinary MI2S Capture",
7104 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7105 .platform_name = "msm-pcm-routing",
7106 .codec_name = "msm-stub-codec.1",
7107 .codec_dai_name = "msm-stub-tx",
7108 .no_pcm = 1,
7109 .dpcm_capture = 1,
7110 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7111 .be_hw_params_fixup = msm_be_hw_params_fixup,
7112 .ops = &msm_mi2s_be_ops,
7113 .ignore_suspend = 1,
7114 },
7115
7116};
7117
7118static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7119 /* Primary AUX PCM Backend DAI Links */
7120 {
7121 .name = LPASS_BE_AUXPCM_RX,
7122 .stream_name = "AUX PCM Playback",
7123 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7124 .platform_name = "msm-pcm-routing",
7125 .codec_name = "msm-stub-codec.1",
7126 .codec_dai_name = "msm-stub-rx",
7127 .no_pcm = 1,
7128 .dpcm_playback = 1,
7129 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7130 .be_hw_params_fixup = msm_be_hw_params_fixup,
7131 .ignore_pmdown_time = 1,
7132 .ignore_suspend = 1,
7133 },
7134 {
7135 .name = LPASS_BE_AUXPCM_TX,
7136 .stream_name = "AUX PCM Capture",
7137 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7138 .platform_name = "msm-pcm-routing",
7139 .codec_name = "msm-stub-codec.1",
7140 .codec_dai_name = "msm-stub-tx",
7141 .no_pcm = 1,
7142 .dpcm_capture = 1,
7143 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7144 .be_hw_params_fixup = msm_be_hw_params_fixup,
7145 .ignore_suspend = 1,
7146 },
7147 /* Secondary AUX PCM Backend DAI Links */
7148 {
7149 .name = LPASS_BE_SEC_AUXPCM_RX,
7150 .stream_name = "Sec AUX PCM Playback",
7151 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7152 .platform_name = "msm-pcm-routing",
7153 .codec_name = "msm-stub-codec.1",
7154 .codec_dai_name = "msm-stub-rx",
7155 .no_pcm = 1,
7156 .dpcm_playback = 1,
7157 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7158 .be_hw_params_fixup = msm_be_hw_params_fixup,
7159 .ignore_pmdown_time = 1,
7160 .ignore_suspend = 1,
7161 },
7162 {
7163 .name = LPASS_BE_SEC_AUXPCM_TX,
7164 .stream_name = "Sec AUX PCM Capture",
7165 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7166 .platform_name = "msm-pcm-routing",
7167 .codec_name = "msm-stub-codec.1",
7168 .codec_dai_name = "msm-stub-tx",
7169 .no_pcm = 1,
7170 .dpcm_capture = 1,
7171 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7172 .be_hw_params_fixup = msm_be_hw_params_fixup,
7173 .ignore_suspend = 1,
7174 },
7175 /* Tertiary AUX PCM Backend DAI Links */
7176 {
7177 .name = LPASS_BE_TERT_AUXPCM_RX,
7178 .stream_name = "Tert AUX PCM Playback",
7179 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7180 .platform_name = "msm-pcm-routing",
7181 .codec_name = "msm-stub-codec.1",
7182 .codec_dai_name = "msm-stub-rx",
7183 .no_pcm = 1,
7184 .dpcm_playback = 1,
7185 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7186 .be_hw_params_fixup = msm_be_hw_params_fixup,
7187 .ignore_suspend = 1,
7188 },
7189 {
7190 .name = LPASS_BE_TERT_AUXPCM_TX,
7191 .stream_name = "Tert AUX PCM Capture",
7192 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7193 .platform_name = "msm-pcm-routing",
7194 .codec_name = "msm-stub-codec.1",
7195 .codec_dai_name = "msm-stub-tx",
7196 .no_pcm = 1,
7197 .dpcm_capture = 1,
7198 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7199 .be_hw_params_fixup = msm_be_hw_params_fixup,
7200 .ignore_suspend = 1,
7201 },
7202 /* Quaternary AUX PCM Backend DAI Links */
7203 {
7204 .name = LPASS_BE_QUAT_AUXPCM_RX,
7205 .stream_name = "Quat AUX PCM Playback",
7206 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7207 .platform_name = "msm-pcm-routing",
7208 .codec_name = "msm-stub-codec.1",
7209 .codec_dai_name = "msm-stub-rx",
7210 .no_pcm = 1,
7211 .dpcm_playback = 1,
7212 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7213 .be_hw_params_fixup = msm_be_hw_params_fixup,
7214 .ignore_pmdown_time = 1,
7215 .ignore_suspend = 1,
7216 },
7217 {
7218 .name = LPASS_BE_QUAT_AUXPCM_TX,
7219 .stream_name = "Quat AUX PCM Capture",
7220 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7221 .platform_name = "msm-pcm-routing",
7222 .codec_name = "msm-stub-codec.1",
7223 .codec_dai_name = "msm-stub-tx",
7224 .no_pcm = 1,
7225 .dpcm_capture = 1,
7226 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7227 .be_hw_params_fixup = msm_be_hw_params_fixup,
7228 .ignore_suspend = 1,
7229 },
7230 /* Quinary AUX PCM Backend DAI Links */
7231 {
7232 .name = LPASS_BE_QUIN_AUXPCM_RX,
7233 .stream_name = "Quin AUX PCM Playback",
7234 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7235 .platform_name = "msm-pcm-routing",
7236 .codec_name = "msm-stub-codec.1",
7237 .codec_dai_name = "msm-stub-rx",
7238 .no_pcm = 1,
7239 .dpcm_playback = 1,
7240 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7241 .be_hw_params_fixup = msm_be_hw_params_fixup,
7242 .ignore_pmdown_time = 1,
7243 .ignore_suspend = 1,
7244 },
7245 {
7246 .name = LPASS_BE_QUIN_AUXPCM_TX,
7247 .stream_name = "Quin AUX PCM Capture",
7248 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7249 .platform_name = "msm-pcm-routing",
7250 .codec_name = "msm-stub-codec.1",
7251 .codec_dai_name = "msm-stub-tx",
7252 .no_pcm = 1,
7253 .dpcm_capture = 1,
7254 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7255 .be_hw_params_fixup = msm_be_hw_params_fixup,
7256 .ignore_suspend = 1,
7257 },
7258};
7259
7260static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7261 /* WSA CDC DMA Backend DAI Links */
7262 {
7263 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7264 .stream_name = "WSA CDC DMA0 Playback",
7265 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7266 .platform_name = "msm-pcm-routing",
7267 .codec_name = "bolero_codec",
7268 .codec_dai_name = "wsa_macro_rx1",
7269 .no_pcm = 1,
7270 .dpcm_playback = 1,
7271 .init = &msm_int_audrx_init,
7272 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7273 .be_hw_params_fixup = msm_be_hw_params_fixup,
7274 .ignore_pmdown_time = 1,
7275 .ignore_suspend = 1,
7276 .ops = &msm_cdc_dma_be_ops,
7277 },
7278 {
7279 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7280 .stream_name = "WSA CDC DMA1 Playback",
7281 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7282 .platform_name = "msm-pcm-routing",
7283 .codec_name = "bolero_codec",
7284 .codec_dai_name = "wsa_macro_rx_mix",
7285 .no_pcm = 1,
7286 .dpcm_playback = 1,
7287 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7288 .be_hw_params_fixup = msm_be_hw_params_fixup,
7289 .ignore_pmdown_time = 1,
7290 .ignore_suspend = 1,
7291 .ops = &msm_cdc_dma_be_ops,
7292 },
7293 {
7294 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7295 .stream_name = "WSA CDC DMA1 Capture",
7296 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7297 .platform_name = "msm-pcm-routing",
7298 .codec_name = "bolero_codec",
7299 .codec_dai_name = "wsa_macro_echo",
7300 .no_pcm = 1,
7301 .dpcm_capture = 1,
7302 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7303 .be_hw_params_fixup = msm_be_hw_params_fixup,
7304 .ignore_suspend = 1,
7305 .ops = &msm_cdc_dma_be_ops,
7306 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7307};
7308
7309static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7310 /* RX CDC DMA Backend DAI Links */
7311 {
7312 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7313 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7314 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7315 .platform_name = "msm-pcm-routing",
7316 .codec_name = "bolero_codec",
7317 .codec_dai_name = "rx_macro_rx1",
7318 .no_pcm = 1,
7319 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7320 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7321 .be_hw_params_fixup = msm_be_hw_params_fixup,
7322 .ignore_pmdown_time = 1,
7323 .ignore_suspend = 1,
7324 .ops = &msm_cdc_dma_be_ops,
7325 },
7326 {
7327 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7328 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7329 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7330 .platform_name = "msm-pcm-routing",
7331 .codec_name = "bolero_codec",
7332 .codec_dai_name = "rx_macro_rx2",
7333 .no_pcm = 1,
7334 .dpcm_playback = 1,
7335 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7336 .be_hw_params_fixup = msm_be_hw_params_fixup,
7337 .ignore_pmdown_time = 1,
7338 .ignore_suspend = 1,
7339 .ops = &msm_cdc_dma_be_ops,
7340 },
7341 {
7342 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7343 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7344 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7345 .platform_name = "msm-pcm-routing",
7346 .codec_name = "bolero_codec",
7347 .codec_dai_name = "rx_macro_rx3",
7348 .no_pcm = 1,
7349 .dpcm_playback = 1,
7350 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7351 .be_hw_params_fixup = msm_be_hw_params_fixup,
7352 .ignore_pmdown_time = 1,
7353 .ignore_suspend = 1,
7354 .ops = &msm_cdc_dma_be_ops,
7355 },
7356 {
7357 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7358 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7359 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7360 .platform_name = "msm-pcm-routing",
7361 .codec_name = "bolero_codec",
7362 .codec_dai_name = "rx_macro_rx4",
7363 .no_pcm = 1,
7364 .dpcm_playback = 1,
7365 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7366 .be_hw_params_fixup = msm_be_hw_params_fixup,
7367 .ignore_pmdown_time = 1,
7368 .ignore_suspend = 1,
7369 .ops = &msm_cdc_dma_be_ops,
7370 },
7371 /* TX CDC DMA Backend DAI Links */
7372 {
7373 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7374 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7375 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7376 .platform_name = "msm-pcm-routing",
7377 .codec_name = "bolero_codec",
7378 .codec_dai_name = "tx_macro_tx1",
7379 .no_pcm = 1,
7380 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7381 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7382 .be_hw_params_fixup = msm_be_hw_params_fixup,
7383 .ignore_suspend = 1,
7384 .ops = &msm_cdc_dma_be_ops,
7385 },
7386 {
7387 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7388 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7389 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7390 .platform_name = "msm-pcm-routing",
7391 .codec_name = "bolero_codec",
7392 .codec_dai_name = "tx_macro_tx2",
7393 .no_pcm = 1,
7394 .dpcm_capture = 1,
7395 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7396 .be_hw_params_fixup = msm_be_hw_params_fixup,
7397 .ignore_suspend = 1,
7398 .ops = &msm_cdc_dma_be_ops,
7399 },
7400};
7401
7402static struct snd_soc_dai_link msm_sm6150_dai_links[
7403 ARRAY_SIZE(msm_common_dai_links) +
7404 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7405 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7406 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7407 ARRAY_SIZE(msm_common_be_dai_links) +
7408 ARRAY_SIZE(msm_tavil_be_dai_links) +
7409 ARRAY_SIZE(msm_wcn_be_dai_links) +
7410 ARRAY_SIZE(ext_disp_be_dai_link) +
7411 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7412 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7413 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7414 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7415
7416static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7417{
7418 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7419 struct snd_soc_pcm_runtime *rtd;
7420 int ret = 0;
7421 void *mbhc_calibration;
7422
7423 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7424 if (!rtd) {
7425 dev_err(card->dev,
7426 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7427 __func__, be_dl_name);
7428 ret = -EINVAL;
7429 goto err_pcm_runtime;
7430 }
7431
7432 mbhc_calibration = def_wcd_mbhc_cal();
7433 if (!mbhc_calibration) {
7434 ret = -ENOMEM;
7435 goto err_mbhc_cal;
7436 }
7437 wcd_mbhc_cfg.calibration = mbhc_calibration;
7438 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7439 if (ret) {
7440 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7441 __func__, ret);
7442 goto err_hs_detect;
7443 }
7444 return 0;
7445
7446err_hs_detect:
7447 kfree(mbhc_calibration);
7448err_mbhc_cal:
7449err_pcm_runtime:
7450 return ret;
7451}
7452
7453
7454static int msm_populate_dai_link_component_of_node(
7455 struct snd_soc_card *card)
7456{
7457 int i, index, ret = 0;
7458 struct device *cdev = card->dev;
7459 struct snd_soc_dai_link *dai_link = card->dai_link;
7460 struct device_node *np;
7461
7462 if (!cdev) {
7463 pr_err("%s: Sound card device memory NULL\n", __func__);
7464 return -ENODEV;
7465 }
7466
7467 for (i = 0; i < card->num_links; i++) {
7468 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7469 continue;
7470
7471 /* populate platform_of_node for snd card dai links */
7472 if (dai_link[i].platform_name &&
7473 !dai_link[i].platform_of_node) {
7474 index = of_property_match_string(cdev->of_node,
7475 "asoc-platform-names",
7476 dai_link[i].platform_name);
7477 if (index < 0) {
7478 pr_err("%s: No match found for platform name: %s\n",
7479 __func__, dai_link[i].platform_name);
7480 ret = index;
7481 goto err;
7482 }
7483 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7484 index);
7485 if (!np) {
7486 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7487 __func__, dai_link[i].platform_name,
7488 index);
7489 ret = -ENODEV;
7490 goto err;
7491 }
7492 dai_link[i].platform_of_node = np;
7493 dai_link[i].platform_name = NULL;
7494 }
7495
7496 /* populate cpu_of_node for snd card dai links */
7497 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7498 index = of_property_match_string(cdev->of_node,
7499 "asoc-cpu-names",
7500 dai_link[i].cpu_dai_name);
7501 if (index >= 0) {
7502 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7503 index);
7504 if (!np) {
7505 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7506 __func__,
7507 dai_link[i].cpu_dai_name);
7508 ret = -ENODEV;
7509 goto err;
7510 }
7511 dai_link[i].cpu_of_node = np;
7512 dai_link[i].cpu_dai_name = NULL;
7513 }
7514 }
7515
7516 /* populate codec_of_node for snd card dai links */
7517 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7518 index = of_property_match_string(cdev->of_node,
7519 "asoc-codec-names",
7520 dai_link[i].codec_name);
7521 if (index < 0)
7522 continue;
7523 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7524 index);
7525 if (!np) {
7526 pr_err("%s: retrieving phandle for codec %s failed\n",
7527 __func__, dai_link[i].codec_name);
7528 ret = -ENODEV;
7529 goto err;
7530 }
7531 dai_link[i].codec_of_node = np;
7532 dai_link[i].codec_name = NULL;
7533 }
7534 }
7535
7536err:
7537 return ret;
7538}
7539
7540static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7541{
7542 int ret = 0;
7543 struct snd_soc_codec *codec = rtd->codec;
7544
7545 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7546 ARRAY_SIZE(msm_tavil_snd_controls));
7547 if (ret < 0) {
7548 dev_err(codec->dev,
7549 "%s: add_codec_controls failed, err = %d\n",
7550 __func__, ret);
7551 return ret;
7552 }
7553
7554 return 0;
7555}
7556
7557static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7558 struct snd_pcm_hw_params *params)
7559{
7560 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7561 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7562
7563 int ret = 0;
7564 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7565 151};
7566 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7567 134, 135, 136, 137, 138, 139,
7568 140, 141, 142, 143};
7569
7570 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7571 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7572 slim_rx_cfg[SLIM_RX_0].channels,
7573 rx_ch);
7574 if (ret < 0)
7575 pr_err("%s: RX failed to set cpu chan map error %d\n",
7576 __func__, ret);
7577 } else {
7578 ret = snd_soc_dai_set_channel_map(cpu_dai,
7579 slim_tx_cfg[SLIM_TX_0].channels,
7580 tx_ch, 0, 0);
7581 if (ret < 0)
7582 pr_err("%s: TX failed to set cpu chan map error %d\n",
7583 __func__, ret);
7584 }
7585
7586 return ret;
7587}
7588
7589static struct snd_soc_ops msm_stub_be_ops = {
7590 .hw_params = msm_snd_stub_hw_params,
7591};
7592
7593static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7594
7595 /* FrontEnd DAI Links */
7596 {
7597 .name = "MSMSTUB Media1",
7598 .stream_name = "MultiMedia1",
7599 .cpu_dai_name = "MultiMedia1",
7600 .platform_name = "msm-pcm-dsp.0",
7601 .dynamic = 1,
7602 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7603 .dpcm_playback = 1,
7604 .dpcm_capture = 1,
7605 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7606 SND_SOC_DPCM_TRIGGER_POST},
7607 .codec_dai_name = "snd-soc-dummy-dai",
7608 .codec_name = "snd-soc-dummy",
7609 .ignore_suspend = 1,
7610 /* this dainlink has playback support */
7611 .ignore_pmdown_time = 1,
7612 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7613 },
7614};
7615
7616static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7617
7618 /* Backend DAI Links */
7619 {
7620 .name = LPASS_BE_SLIMBUS_0_RX,
7621 .stream_name = "Slimbus Playback",
7622 .cpu_dai_name = "msm-dai-q6-dev.16384",
7623 .platform_name = "msm-pcm-routing",
7624 .codec_name = "msm-stub-codec.1",
7625 .codec_dai_name = "msm-stub-rx",
7626 .no_pcm = 1,
7627 .dpcm_playback = 1,
7628 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7629 .init = &msm_audrx_stub_init,
7630 .be_hw_params_fixup = msm_be_hw_params_fixup,
7631 .ignore_pmdown_time = 1, /* dai link has playback support */
7632 .ignore_suspend = 1,
7633 .ops = &msm_stub_be_ops,
7634 },
7635 {
7636 .name = LPASS_BE_SLIMBUS_0_TX,
7637 .stream_name = "Slimbus Capture",
7638 .cpu_dai_name = "msm-dai-q6-dev.16385",
7639 .platform_name = "msm-pcm-routing",
7640 .codec_name = "msm-stub-codec.1",
7641 .codec_dai_name = "msm-stub-tx",
7642 .no_pcm = 1,
7643 .dpcm_capture = 1,
7644 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7645 .be_hw_params_fixup = msm_be_hw_params_fixup,
7646 .ignore_suspend = 1,
7647 .ops = &msm_stub_be_ops,
7648 },
7649};
7650
7651static struct snd_soc_dai_link msm_stub_dai_links[
7652 ARRAY_SIZE(msm_stub_fe_dai_links) +
7653 ARRAY_SIZE(msm_stub_be_dai_links)];
7654
7655struct snd_soc_card snd_soc_card_stub_msm = {
7656 .name = "sm6150-stub-snd-card",
7657};
7658
7659static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7660 { .compatible = "qcom,sm6150-asoc-snd",
7661 .data = "codec"},
7662 { .compatible = "qcom,sm6150-asoc-snd-stub",
7663 .data = "stub_codec"},
7664 {},
7665};
7666
7667static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7668{
7669 struct snd_soc_card *card = NULL;
7670 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7671 int total_links = 0, rc = 0;
7672 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7673 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7674 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7675 const struct of_device_id *match;
7676
7677 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7678 if (!match) {
7679 dev_err(dev, "%s: No DT match found for sound card\n",
7680 __func__);
7681 return NULL;
7682 }
7683
7684 if (!strcmp(match->data, "codec")) {
7685 card = &snd_soc_card_sm6150_msm;
7686 memcpy(msm_sm6150_dai_links + total_links,
7687 msm_common_dai_links,
7688 sizeof(msm_common_dai_links));
7689
7690 total_links += ARRAY_SIZE(msm_common_dai_links);
7691
7692 memcpy(msm_sm6150_dai_links + total_links,
7693 msm_common_misc_fe_dai_links,
7694 sizeof(msm_common_misc_fe_dai_links));
7695
7696 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7697
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7698 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7699 &tavil_codec);
7700 if (rc) {
7701 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7702 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7703 } else {
7704 if (tavil_codec) {
7705 card->late_probe =
7706 msm_snd_card_tavil_late_probe;
7707 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7708 msm_tavil_fe_dai_links,
7709 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7710 total_links +=
7711 ARRAY_SIZE(msm_tavil_fe_dai_links);
7712 }
7713 }
7714
7715 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7716 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7717 msm_bolero_fe_dai_links,
7718 sizeof(msm_bolero_fe_dai_links));
7719 total_links +=
7720 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7721 }
7722
7723 memcpy(msm_sm6150_dai_links + total_links,
7724 msm_common_be_dai_links,
7725 sizeof(msm_common_be_dai_links));
7726
7727 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7728
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7729 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7730 memcpy(msm_sm6150_dai_links + total_links,
7731 msm_tavil_be_dai_links,
7732 sizeof(msm_tavil_be_dai_links));
7733 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7734 } else {
7735 memcpy(msm_sm6150_dai_links + total_links,
7736 msm_wsa_cdc_dma_be_dai_links,
7737 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7738 total_links +=
7739 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7740
7741 memcpy(msm_sm6150_dai_links + total_links,
7742 msm_rx_tx_cdc_dma_be_dai_links,
7743 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7744 total_links +=
7745 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7746 }
7747
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7748 rc = of_property_read_u32(dev->of_node,
7749 "qcom,ext-disp-audio-rx",
7750 &ext_disp_audio_intf);
7751 if (rc) {
7752 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7753 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7754 } else {
Rohit kumare5a1d4f2018-09-17 11:36:25 +0530[diff] [blame]7755 if (ext_disp_audio_intf) {
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7756 memcpy(msm_sm6150_dai_links + total_links,
7757 ext_disp_be_dai_link,
7758 sizeof(ext_disp_be_dai_link));
7759 total_links +=
7760 ARRAY_SIZE(ext_disp_be_dai_link);
7761 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7762 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7763
7764 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7765 &mi2s_audio_intf);
7766 if (rc) {
7767 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7768 __func__);
7769 } else {
7770 if (mi2s_audio_intf) {
7771 memcpy(msm_sm6150_dai_links + total_links,
7772 msm_mi2s_be_dai_links,
7773 sizeof(msm_mi2s_be_dai_links));
7774 total_links +=
7775 ARRAY_SIZE(msm_mi2s_be_dai_links);
7776 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7777 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7778
7779
7780 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7781 &wcn_btfm_intf);
7782 if (rc) {
7783 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7784 __func__);
7785 } else {
7786 if (wcn_btfm_intf) {
7787 memcpy(msm_sm6150_dai_links + total_links,
7788 msm_wcn_be_dai_links,
7789 sizeof(msm_wcn_be_dai_links));
7790 total_links +=
7791 ARRAY_SIZE(msm_wcn_be_dai_links);
7792 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7793 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7794
7795 rc = of_property_read_u32(dev->of_node,
7796 "qcom,auxpcm-audio-intf",
7797 &auxpcm_audio_intf);
7798 if (rc) {
7799 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7800 __func__);
7801 } else {
7802 if (auxpcm_audio_intf) {
7803 memcpy(msm_sm6150_dai_links + total_links,
7804 msm_auxpcm_be_dai_links,
7805 sizeof(msm_auxpcm_be_dai_links));
7806 total_links +=
7807 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7808 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7809 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7810
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7811 dailink = msm_sm6150_dai_links;
7812 } else if (!strcmp(match->data, "stub_codec")) {
7813 card = &snd_soc_card_stub_msm;
7814
7815 memcpy(msm_stub_dai_links + total_links,
7816 msm_stub_fe_dai_links,
7817 sizeof(msm_stub_fe_dai_links));
7818 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7819
7820 memcpy(msm_stub_dai_links + total_links,
7821 msm_stub_be_dai_links,
7822 sizeof(msm_stub_be_dai_links));
7823 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7824
7825 dailink = msm_stub_dai_links;
7826 }
7827
7828 if (card) {
7829 card->dai_link = dailink;
7830 card->num_links = total_links;
7831 }
7832
7833 return card;
7834}
7835
7836static int msm_wsa881x_init(struct snd_soc_component *component)
7837{
7838 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7839 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7840 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7841 SPKR_L_BOOST, SPKR_L_VI};
7842 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7843 SPKR_R_BOOST, SPKR_R_VI};
7844 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7845 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7846 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7847 struct msm_asoc_mach_data *pdata;
7848 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7849 struct snd_card *card = component->card->snd_card;
7850 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7851 int ret = 0;
7852
7853 if (!codec) {
7854 pr_err("%s codec is NULL\n", __func__);
7855 return -EINVAL;
7856 }
7857
7858 dapm = snd_soc_codec_get_dapm(codec);
7859
7860 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7861 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
7862 __func__, codec->component.name);
7863 wsa881x_set_channel_map(codec, &spkleft_ports[0],
7864 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7865 &ch_rate[0], &spkleft_port_types[0]);
7866 if (dapm->component) {
7867 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7868 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7869 }
7870 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7871 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
7872 __func__, codec->component.name);
7873 wsa881x_set_channel_map(codec, &spkright_ports[0],
7874 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7875 &ch_rate[0], &spkright_port_types[0]);
7876 if (dapm->component) {
7877 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7878 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7879 }
7880 } else {
7881 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
7882 codec->component.name);
7883 ret = -EINVAL;
7884 goto err;
7885 }
7886 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7887 if (!pdata->codec_root) {
7888 entry = snd_info_create_subdir(card->module, "codecs",
7889 card->proc_root);
7890 if (!entry) {
7891 pr_err("%s: Cannot create codecs module entry\n",
7892 __func__);
7893 ret = 0;
7894 goto err;
7895 }
7896 pdata->codec_root = entry;
7897 }
7898 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7899 codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7900err:
7901 return ret;
7902}
7903
7904static int msm_aux_codec_init(struct snd_soc_component *component)
7905{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7906 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7907 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]7908 int ret = 0;
7909 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7910 struct snd_info_entry *entry;
7911 struct snd_card *card = component->card->snd_card;
7912 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7913
7914 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7915 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7916 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7917 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7918 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7919 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7920 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7921 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7922 snd_soc_dapm_sync(dapm);
7923
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7924 pdata = snd_soc_card_get_drvdata(component->card);
7925 if (!pdata->codec_root) {
7926 entry = snd_info_create_subdir(card->module, "codecs",
7927 card->proc_root);
7928 if (!entry) {
7929 pr_err("%s: Cannot create codecs module entry\n",
7930 __func__);
7931 ret = 0;
7932 goto codec_root_err;
7933 }
7934 pdata->codec_root = entry;
7935 }
7936 wcd937x_info_create_codec_entry(pdata->codec_root, codec);
7937codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]7938 mbhc_calibration = def_wcd_mbhc_cal();
7939 if (!mbhc_calibration) {
7940 return -ENOMEM;
7941 }
7942 wcd_mbhc_cfg.calibration = mbhc_calibration;
7943 ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
7944
7945 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7946}
7947
7948static int msm_init_aux_dev(struct platform_device *pdev,
7949 struct snd_soc_card *card)
7950{
7951 struct device_node *wsa_of_node;
7952 struct device_node *aux_codec_of_node;
7953 u32 wsa_max_devs;
7954 u32 wsa_dev_cnt;
7955 u32 codec_aux_dev_cnt = 0;
7956 int i;
7957 struct msm_wsa881x_dev_info *wsa881x_dev_info;
7958 struct aux_codec_dev_info *aux_cdc_dev_info;
7959 const char *auxdev_name_prefix[1];
7960 char *dev_name_str = NULL;
7961 int found = 0;
7962 int codecs_found = 0;
7963 int ret = 0;
7964
7965 /* Get maximum WSA device count for this platform */
7966 ret = of_property_read_u32(pdev->dev.of_node,
7967 "qcom,wsa-max-devs", &wsa_max_devs);
7968 if (ret) {
7969 dev_info(&pdev->dev,
7970 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7971 __func__, pdev->dev.of_node->full_name, ret);
7972 wsa_max_devs = 0;
7973 goto codec_aux_dev;
7974 }
7975 if (wsa_max_devs == 0) {
7976 dev_warn(&pdev->dev,
7977 "%s: Max WSA devices is 0 for this target?\n",
7978 __func__);
7979 goto codec_aux_dev;
7980 }
7981
7982 /* Get count of WSA device phandles for this platform */
7983 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7984 "qcom,wsa-devs", NULL);
7985 if (wsa_dev_cnt == -ENOENT) {
7986 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7987 __func__);
7988 goto err;
7989 } else if (wsa_dev_cnt <= 0) {
7990 dev_err(&pdev->dev,
7991 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7992 __func__, wsa_dev_cnt);
7993 ret = -EINVAL;
7994 goto err;
7995 }
7996
7997 /*
7998 * Expect total phandles count to be NOT less than maximum possible
7999 * WSA count. However, if it is less, then assign same value to
8000 * max count as well.
8001 */
8002 if (wsa_dev_cnt < wsa_max_devs) {
8003 dev_dbg(&pdev->dev,
8004 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8005 __func__, wsa_max_devs, wsa_dev_cnt);
8006 wsa_max_devs = wsa_dev_cnt;
8007 }
8008
8009 /* Make sure prefix string passed for each WSA device */
8010 ret = of_property_count_strings(pdev->dev.of_node,
8011 "qcom,wsa-aux-dev-prefix");
8012 if (ret != wsa_dev_cnt) {
8013 dev_err(&pdev->dev,
8014 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8015 __func__, wsa_dev_cnt, ret);
8016 ret = -EINVAL;
8017 goto err;
8018 }
8019
8020 /*
8021 * Alloc mem to store phandle and index info of WSA device, if already
8022 * registered with ALSA core
8023 */
8024 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8025 sizeof(struct msm_wsa881x_dev_info),
8026 GFP_KERNEL);
8027 if (!wsa881x_dev_info) {
8028 ret = -ENOMEM;
8029 goto err;
8030 }
8031
8032 /*
8033 * search and check whether all WSA devices are already
8034 * registered with ALSA core or not. If found a node, store
8035 * the node and the index in a local array of struct for later
8036 * use.
8037 */
8038 for (i = 0; i < wsa_dev_cnt; i++) {
8039 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8040 "qcom,wsa-devs", i);
8041 if (unlikely(!wsa_of_node)) {
8042 /* we should not be here */
8043 dev_err(&pdev->dev,
8044 "%s: wsa dev node is not present\n",
8045 __func__);
8046 ret = -EINVAL;
8047 goto err;
8048 }
8049 if (soc_find_component(wsa_of_node, NULL)) {
8050 /* WSA device registered with ALSA core */
8051 wsa881x_dev_info[found].of_node = wsa_of_node;
8052 wsa881x_dev_info[found].index = i;
8053 found++;
8054 if (found == wsa_max_devs)
8055 break;
8056 }
8057 }
8058
8059 if (found < wsa_max_devs) {
8060 dev_dbg(&pdev->dev,
8061 "%s: failed to find %d components. Found only %d\n",
8062 __func__, wsa_max_devs, found);
8063 return -EPROBE_DEFER;
8064 }
8065 dev_info(&pdev->dev,
8066 "%s: found %d wsa881x devices registered with ALSA core\n",
8067 __func__, found);
8068
8069codec_aux_dev:
8070 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8071 /* Get count of aux codec device phandles for this platform */
8072 codec_aux_dev_cnt = of_count_phandle_with_args(
8073 pdev->dev.of_node,
8074 "qcom,codec-aux-devs", NULL);
8075 if (codec_aux_dev_cnt == -ENOENT) {
8076 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8077 __func__);
8078 goto err;
8079 } else if (codec_aux_dev_cnt <= 0) {
8080 dev_err(&pdev->dev,
8081 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8082 __func__, codec_aux_dev_cnt);
8083 ret = -EINVAL;
8084 goto err;
8085 }
8086
8087 /*
8088 * Alloc mem to store phandle and index info of aux codec
8089 * if already registered with ALSA core
8090 */
8091 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8092 sizeof(struct aux_codec_dev_info),
8093 GFP_KERNEL);
8094 if (!aux_cdc_dev_info) {
8095 ret = -ENOMEM;
8096 goto err;
8097 }
8098
8099 /*
8100 * search and check whether all aux codecs are already
8101 * registered with ALSA core or not. If found a node, store
8102 * the node and the index in a local array of struct for later
8103 * use.
8104 */
8105 for (i = 0; i < codec_aux_dev_cnt; i++) {
8106 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8107 "qcom,codec-aux-devs", i);
8108 if (unlikely(!aux_codec_of_node)) {
8109 /* we should not be here */
8110 dev_err(&pdev->dev,
8111 "%s: aux codec dev node is not present\n",
8112 __func__);
8113 ret = -EINVAL;
8114 goto err;
8115 }
8116 if (soc_find_component(aux_codec_of_node, NULL)) {
8117 /* AUX codec registered with ALSA core */
8118 aux_cdc_dev_info[codecs_found].of_node =
8119 aux_codec_of_node;
8120 aux_cdc_dev_info[codecs_found].index = i;
8121 codecs_found++;
8122 }
8123 }
8124
8125 if (codecs_found < codec_aux_dev_cnt) {
8126 dev_dbg(&pdev->dev,
8127 "%s: failed to find %d components. Found only %d\n",
8128 __func__, codec_aux_dev_cnt, codecs_found);
8129 return -EPROBE_DEFER;
8130 }
8131 dev_info(&pdev->dev,
8132 "%s: found %d AUX codecs registered with ALSA core\n",
8133 __func__, codecs_found);
8134
8135 }
8136
8137 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8138 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8139
8140 /* Alloc array of AUX devs struct */
8141 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8142 sizeof(struct snd_soc_aux_dev),
8143 GFP_KERNEL);
8144 if (!msm_aux_dev) {
8145 ret = -ENOMEM;
8146 goto err;
8147 }
8148
8149 /* Alloc array of codec conf struct */
8150 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8151 sizeof(struct snd_soc_codec_conf),
8152 GFP_KERNEL);
8153 if (!msm_codec_conf) {
8154 ret = -ENOMEM;
8155 goto err;
8156 }
8157
8158 for (i = 0; i < wsa_max_devs; i++) {
8159 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8160 GFP_KERNEL);
8161 if (!dev_name_str) {
8162 ret = -ENOMEM;
8163 goto err;
8164 }
8165
8166 ret = of_property_read_string_index(pdev->dev.of_node,
8167 "qcom,wsa-aux-dev-prefix",
8168 wsa881x_dev_info[i].index,
8169 auxdev_name_prefix);
8170 if (ret) {
8171 dev_err(&pdev->dev,
8172 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8173 __func__, ret);
8174 ret = -EINVAL;
8175 goto err;
8176 }
8177
8178 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8179 msm_aux_dev[i].name = dev_name_str;
8180 msm_aux_dev[i].codec_name = NULL;
8181 msm_aux_dev[i].codec_of_node =
8182 wsa881x_dev_info[i].of_node;
8183 msm_aux_dev[i].init = msm_wsa881x_init;
8184 msm_codec_conf[i].dev_name = NULL;
8185 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8186 msm_codec_conf[i].of_node =
8187 wsa881x_dev_info[i].of_node;
8188 }
8189
8190 for (i = 0; i < codec_aux_dev_cnt; i++) {
8191 msm_aux_dev[wsa_max_devs + i].name = NULL;
8192 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8193 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8194 aux_cdc_dev_info[i].of_node;
8195 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8196 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8197 msm_codec_conf[wsa_max_devs + i].name_prefix =
8198 NULL;
8199 msm_codec_conf[wsa_max_devs + i].of_node =
8200 aux_cdc_dev_info[i].of_node;
8201 }
8202
8203 card->codec_conf = msm_codec_conf;
8204 card->aux_dev = msm_aux_dev;
8205err:
8206 return ret;
8207}
8208
8209static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8210{
8211 int count;
8212 u32 mi2s_master_slave[MI2S_MAX];
8213 int ret;
8214
8215 for (count = 0; count < MI2S_MAX; count++) {
8216 mutex_init(&mi2s_intf_conf[count].lock);
8217 mi2s_intf_conf[count].ref_cnt = 0;
8218 }
8219
8220 ret = of_property_read_u32_array(pdev->dev.of_node,
8221 "qcom,msm-mi2s-master",
8222 mi2s_master_slave, MI2S_MAX);
8223 if (ret) {
8224 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8225 __func__);
8226 } else {
8227 for (count = 0; count < MI2S_MAX; count++) {
8228 mi2s_intf_conf[count].msm_is_mi2s_master =
8229 mi2s_master_slave[count];
8230 }
8231 }
8232}
8233
8234static void msm_i2s_auxpcm_deinit(void)
8235{
8236 int count;
8237
8238 for (count = 0; count < MI2S_MAX; count++) {
8239 mutex_destroy(&mi2s_intf_conf[count].lock);
8240 mi2s_intf_conf[count].ref_cnt = 0;
8241 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8242 }
8243}
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8244
8245static int sm6150_ssr_enable(struct device *dev, void *data)
8246{
8247 struct platform_device *pdev = to_platform_device(dev);
8248 struct snd_soc_card *card = platform_get_drvdata(pdev);
8249 struct msm_asoc_mach_data *pdata;
8250 int ret = 0;
8251
8252 if (!card) {
8253 dev_err(dev, "%s: card is NULL\n", __func__);
8254 ret = -EINVAL;
8255 goto err;
8256 }
8257
8258 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8259 pdata = snd_soc_card_get_drvdata(card);
8260 if (!pdata->is_afe_config_done) {
8261 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8262 struct snd_soc_pcm_runtime *rtd;
8263
8264 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8265 if (!rtd) {
8266 dev_err(dev,
8267 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8268 __func__, be_dl_name);
8269 ret = -EINVAL;
8270 goto err;
8271 }
8272 ret = msm_afe_set_config(rtd->codec);
8273 if (ret)
8274 dev_err(dev, "%s: Failed to set AFE config. err %d\n",
8275 __func__, ret);
8276 else
8277 pdata->is_afe_config_done = true;
8278 }
8279 }
8280 snd_soc_card_change_online_state(card, 1);
8281 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8282
8283err:
8284 return ret;
8285}
8286
8287static void sm6150_ssr_disable(struct device *dev, void *data)
8288{
8289 struct platform_device *pdev = to_platform_device(dev);
8290 struct snd_soc_card *card = platform_get_drvdata(pdev);
8291 struct msm_asoc_mach_data *pdata;
8292
8293 if (!card) {
8294 dev_err(dev, "%s: card is NULL\n", __func__);
8295 return;
8296 }
8297
8298 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8299 snd_soc_card_change_online_state(card, 0);
8300
8301 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8302 pdata = snd_soc_card_get_drvdata(card);
8303 msm_afe_clear_config();
8304 pdata->is_afe_config_done = false;
8305 }
8306}
8307
8308static const struct snd_event_ops sm6150_ssr_ops = {
8309 .enable = sm6150_ssr_enable,
8310 .disable = sm6150_ssr_disable,
8311};
8312
8313static int msm_audio_ssr_compare(struct device *dev, void *data)
8314{
8315 struct device_node *node = data;
8316
8317 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8318 __func__, dev->of_node, node);
8319 return (dev->of_node && dev->of_node == node);
8320}
8321
8322static int msm_audio_ssr_register(struct device *dev)
8323{
8324 struct device_node *np = dev->of_node;
8325 struct snd_event_clients *ssr_clients = NULL;
8326 struct device_node *node;
8327 int ret;
8328 int i;
8329
8330 for (i = 0; ; i++) {
8331 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8332 if (!node)
8333 break;
8334 snd_event_mstr_add_client(&ssr_clients,
8335 msm_audio_ssr_compare, node);
8336 }
8337
8338 ret = snd_event_master_register(dev, &sm6150_ssr_ops,
8339 ssr_clients, NULL);
8340 if (!ret)
8341 snd_event_notify(dev, SND_EVENT_UP);
8342
8343 return ret;
8344}
8345
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8346static int msm_asoc_machine_probe(struct platform_device *pdev)
8347{
8348 struct snd_soc_card *card;
8349 struct msm_asoc_mach_data *pdata;
8350 const char *mbhc_audio_jack_type = NULL;
8351 int ret;
8352
8353 if (!pdev->dev.of_node) {
8354 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8355 return -EINVAL;
8356 }
8357
8358 pdata = devm_kzalloc(&pdev->dev,
8359 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8360 if (!pdata)
8361 return -ENOMEM;
8362
8363 card = populate_snd_card_dailinks(&pdev->dev);
8364 if (!card) {
8365 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8366 ret = -EINVAL;
8367 goto err;
8368 }
8369 card->dev = &pdev->dev;
8370 platform_set_drvdata(pdev, card);
8371 snd_soc_card_set_drvdata(card, pdata);
8372
8373 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8374 if (ret) {
8375 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8376 ret);
8377 goto err;
8378 }
8379
8380 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8381 if (ret) {
8382 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8383 ret);
8384 goto err;
8385 }
8386
8387 ret = msm_populate_dai_link_component_of_node(card);
8388 if (ret) {
8389 ret = -EPROBE_DEFER;
8390 goto err;
8391 }
8392
8393 ret = msm_init_aux_dev(pdev, card);
8394 if (ret)
8395 goto err;
8396
8397 ret = devm_snd_soc_register_card(&pdev->dev, card);
8398 if (ret == -EPROBE_DEFER) {
8399 if (codec_reg_done)
8400 ret = -EINVAL;
8401 goto err;
8402 } else if (ret) {
8403 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8404 ret);
8405 goto err;
8406 }
8407 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8408
8409 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8410 "qcom,hph-en1-gpio", 0);
8411 if (!pdata->hph_en1_gpio_p) {
8412 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8413 "qcom,hph-en1-gpio",
8414 pdev->dev.of_node->full_name);
8415 }
8416
8417 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8418 "qcom,hph-en0-gpio", 0);
8419 if (!pdata->hph_en0_gpio_p) {
8420 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8421 "qcom,hph-en0-gpio",
8422 pdev->dev.of_node->full_name);
8423 }
8424
8425 ret = of_property_read_string(pdev->dev.of_node,
8426 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8427 if (ret) {
8428 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8429 "qcom,mbhc-audio-jack-type",
8430 pdev->dev.of_node->full_name);
8431 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8432 } else {
8433 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8434 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8435 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8436 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8437 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8438 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8439 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8440 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8441 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8442 } else {
8443 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8444 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8445 }
8446 }
8447 /*
8448 * Parse US-Euro gpio info from DT. Report no error if us-euro
8449 * entry is not found in DT file as some targets do not support
8450 * US-Euro detection
8451 */
8452 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8453 "qcom,us-euro-gpios", 0);
8454 if (!pdata->us_euro_gpio_p) {
8455 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8456 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8457 } else {
8458 dev_dbg(&pdev->dev, "%s detected\n",
8459 "qcom,us-euro-gpios");
8460 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8461 }
8462 /* Parse pinctrl info from devicetree */
8463 ret = msm_get_pinctrl(pdev);
8464 if (!ret) {
8465 pr_debug("%s: pinctrl parsing successful\n", __func__);
8466 } else {
8467 dev_dbg(&pdev->dev,
8468 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8469 __func__, ret);
8470 ret = 0;
8471 }
8472
8473 msm_i2s_auxpcm_init(pdev);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8474 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8475 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8476 "qcom,cdc-dmic01-gpios",
8477 0);
8478 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8479 "qcom,cdc-dmic23-gpios",
8480 0);
8481 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8482
8483 ret = msm_audio_ssr_register(&pdev->dev);
8484 if (ret)
8485 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8486 __func__, ret);
8487
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8488err:
8489 return ret;
8490}
8491
8492static int msm_asoc_machine_remove(struct platform_device *pdev)
8493{
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame]8494 snd_event_master_deregister(&pdev->dev);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8495 msm_i2s_auxpcm_deinit();
8496
8497 return 0;
8498}
8499
8500static struct platform_driver sm6150_asoc_machine_driver = {
8501 .driver = {
8502 .name = DRV_NAME,
8503 .owner = THIS_MODULE,
8504 .pm = &snd_soc_pm_ops,
8505 .of_match_table = sm6150_asoc_machine_of_match,
8506 },
8507 .probe = msm_asoc_machine_probe,
8508 .remove = msm_asoc_machine_remove,
8509};
8510module_platform_driver(sm6150_asoc_machine_driver);
8511
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8512MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8513MODULE_LICENSE("GPL v2");
8514MODULE_ALIAS("platform:" DRV_NAME);
8515MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);