Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1 | /* |
Nirav Shah | 8e93027 | 2018-07-10 16:28:21 +0530 | [diff] [blame] | 2 | * Copyright (c) 2013-2019 The Linux Foundation. All rights reserved. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3 | * |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 4 | * Permission to use, copy, modify, and/or distribute this software for |
| 5 | * any purpose with or without fee is hereby granted, provided that the |
| 6 | * above copyright notice and this permission notice appear in all |
| 7 | * copies. |
| 8 | * |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 10 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 11 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 12 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 13 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 14 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 15 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 16 | * PERFORMANCE OF THIS SOFTWARE. |
| 17 | */ |
| 18 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 19 | #include "targcfg.h" |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 20 | #include "qdf_lock.h" |
| 21 | #include "qdf_status.h" |
| 22 | #include "qdf_status.h" |
| 23 | #include <qdf_atomic.h> /* qdf_atomic_read */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 24 | #include <targaddrs.h> |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 25 | #include "hif_io32.h" |
| 26 | #include <hif.h> |
Pratik Gandhi | 034cb7c | 2017-11-10 16:46:06 +0530 | [diff] [blame] | 27 | #include <target_type.h> |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 28 | #include "regtable.h" |
| 29 | #define ATH_MODULE_NAME hif |
| 30 | #include <a_debug.h> |
| 31 | #include "hif_main.h" |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 32 | #include "ce_api.h" |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 33 | #include "qdf_trace.h" |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 34 | #include "pld_common.h" |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 35 | #include "hif_debug.h" |
| 36 | #include "ce_internal.h" |
| 37 | #include "ce_reg.h" |
| 38 | #include "ce_assignment.h" |
| 39 | #include "ce_tasklet.h" |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 40 | #include "qdf_module.h" |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 41 | |
| 42 | #define CE_POLL_TIMEOUT 10 /* ms */ |
| 43 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 44 | #define AGC_DUMP 1 |
| 45 | #define CHANINFO_DUMP 2 |
| 46 | #define BB_WATCHDOG_DUMP 3 |
| 47 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 48 | #define PCIE_ACCESS_DUMP 4 |
| 49 | #endif |
| 50 | #include "mp_dev.h" |
| 51 | |
Basamma Yakkanahalli | b85768e | 2019-04-27 05:24:00 +0530 | [diff] [blame] | 52 | #if (defined(QCA_WIFI_QCA8074) || defined(QCA_WIFI_QCA6290) || \ |
| 53 | defined(QCA_WIFI_QCA6018)) && !defined(QCA_WIFI_SUPPORT_SRNG) |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 54 | #define QCA_WIFI_SUPPORT_SRNG |
| 55 | #endif |
| 56 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 57 | /* Forward references */ |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 58 | QDF_STATUS hif_post_recv_buffers_for_pipe(struct HIF_CE_pipe_info *pipe_info); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 59 | |
| 60 | /* |
| 61 | * Fix EV118783, poll to check whether a BMI response comes |
| 62 | * other than waiting for the interruption which may be lost. |
| 63 | */ |
| 64 | /* #define BMI_RSP_POLLING */ |
| 65 | #define BMI_RSP_TO_MILLISEC 1000 |
| 66 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 67 | #ifdef CONFIG_BYPASS_QMI |
| 68 | #define BYPASS_QMI 1 |
| 69 | #else |
| 70 | #define BYPASS_QMI 0 |
| 71 | #endif |
| 72 | |
Akshay Kosigi | 181b2f5 | 2018-11-26 17:02:54 +0530 | [diff] [blame] | 73 | #ifdef ENABLE_10_4_FW_HDR |
| 74 | #if (ENABLE_10_4_FW_HDR == 1) |
Houston Hoffman | abd0077 | 2016-05-06 17:02:48 -0700 | [diff] [blame] | 75 | #define WDI_IPA_SERVICE_GROUP 5 |
| 76 | #define WDI_IPA_TX_SVC MAKE_SERVICE_ID(WDI_IPA_SERVICE_GROUP, 0) |
| 77 | #define HTT_DATA2_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP, 1) |
| 78 | #define HTT_DATA3_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP, 2) |
Akshay Kosigi | 181b2f5 | 2018-11-26 17:02:54 +0530 | [diff] [blame] | 79 | #endif /* ENABLE_10_4_FW_HDR == 1 */ |
Pratik Gandhi | 424c62e | 2016-08-23 19:47:09 +0530 | [diff] [blame] | 80 | #endif /* ENABLE_10_4_FW_HDR */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 81 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 82 | QDF_STATUS hif_post_recv_buffers(struct hif_softc *scn); |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 83 | static void hif_config_rri_on_ddr(struct hif_softc *scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 84 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 85 | /** |
| 86 | * hif_target_access_log_dump() - dump access log |
| 87 | * |
| 88 | * dump access log |
| 89 | * |
| 90 | * Return: n/a |
| 91 | */ |
| 92 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 93 | static void hif_target_access_log_dump(void) |
| 94 | { |
| 95 | hif_target_dump_access_log(); |
| 96 | } |
| 97 | #endif |
| 98 | |
| 99 | |
| 100 | void hif_trigger_dump(struct hif_opaque_softc *hif_ctx, |
| 101 | uint8_t cmd_id, bool start) |
| 102 | { |
| 103 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 104 | |
| 105 | switch (cmd_id) { |
| 106 | case AGC_DUMP: |
| 107 | if (start) |
| 108 | priv_start_agc(scn); |
| 109 | else |
| 110 | priv_dump_agc(scn); |
| 111 | break; |
| 112 | case CHANINFO_DUMP: |
| 113 | if (start) |
| 114 | priv_start_cap_chaninfo(scn); |
| 115 | else |
| 116 | priv_dump_chaninfo(scn); |
| 117 | break; |
| 118 | case BB_WATCHDOG_DUMP: |
| 119 | priv_dump_bbwatchdog(scn); |
| 120 | break; |
| 121 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 122 | case PCIE_ACCESS_DUMP: |
| 123 | hif_target_access_log_dump(); |
| 124 | break; |
| 125 | #endif |
| 126 | default: |
| 127 | HIF_ERROR("%s: Invalid htc dump command", __func__); |
| 128 | break; |
| 129 | } |
| 130 | } |
| 131 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 132 | static void ce_poll_timeout(void *arg) |
| 133 | { |
| 134 | struct CE_state *CE_state = (struct CE_state *)arg; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 135 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 136 | if (CE_state->timer_inited) { |
| 137 | ce_per_engine_service(CE_state->scn, CE_state->id); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 138 | qdf_timer_mod(&CE_state->poll_timer, CE_POLL_TIMEOUT); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 139 | } |
| 140 | } |
| 141 | |
| 142 | static unsigned int roundup_pwr2(unsigned int n) |
| 143 | { |
| 144 | int i; |
| 145 | unsigned int test_pwr2; |
| 146 | |
| 147 | if (!(n & (n - 1))) |
| 148 | return n; /* already a power of 2 */ |
| 149 | |
| 150 | test_pwr2 = 4; |
| 151 | for (i = 0; i < 29; i++) { |
| 152 | if (test_pwr2 > n) |
| 153 | return test_pwr2; |
| 154 | test_pwr2 = test_pwr2 << 1; |
| 155 | } |
| 156 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 157 | QDF_ASSERT(0); /* n too large */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 158 | return 0; |
| 159 | } |
| 160 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 161 | #define ADRASTEA_SRC_WR_INDEX_OFFSET 0x3C |
| 162 | #define ADRASTEA_DST_WR_INDEX_OFFSET 0x40 |
| 163 | |
| 164 | static struct shadow_reg_cfg target_shadow_reg_cfg_map[] = { |
| 165 | { 0, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 166 | { 3, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 167 | { 4, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 168 | { 5, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 169 | { 7, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 170 | { 1, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 171 | { 2, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 172 | { 7, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 173 | { 8, ADRASTEA_DST_WR_INDEX_OFFSET}, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 174 | #ifdef QCA_WIFI_3_0_ADRASTEA |
| 175 | { 9, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 176 | { 10, ADRASTEA_DST_WR_INDEX_OFFSET}, |
Nirav Shah | 75cc5c8 | 2016-05-25 10:52:38 +0530 | [diff] [blame] | 177 | { 11, ADRASTEA_DST_WR_INDEX_OFFSET}, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 178 | #endif |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 179 | }; |
| 180 | |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 181 | #ifdef QCN7605_SUPPORT |
| 182 | static struct shadow_reg_cfg target_shadow_reg_cfg_map_qcn7605[] = { |
| 183 | { 0, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 184 | { 4, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 185 | { 5, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 186 | { 3, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 187 | { 1, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 188 | { 2, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 189 | { 7, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 190 | { 8, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 191 | }; |
| 192 | #endif |
| 193 | |
Nirav Shah | 0d0cce8 | 2018-01-17 17:00:31 +0530 | [diff] [blame] | 194 | #ifdef WLAN_FEATURE_EPPING |
Vishwajith Upendra | 70efc75 | 2016-04-18 11:23:49 -0700 | [diff] [blame] | 195 | static struct shadow_reg_cfg target_shadow_reg_cfg_epping[] = { |
| 196 | { 0, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 197 | { 3, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 198 | { 4, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 199 | { 7, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 200 | { 1, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 201 | { 2, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 202 | { 5, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 203 | { 7, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 204 | { 8, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 205 | }; |
Nirav Shah | 0d0cce8 | 2018-01-17 17:00:31 +0530 | [diff] [blame] | 206 | #endif |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 207 | |
| 208 | /* CE_PCI TABLE */ |
| 209 | /* |
| 210 | * NOTE: the table below is out of date, though still a useful reference. |
| 211 | * Refer to target_service_to_ce_map and hif_map_service_to_pipe for the actual |
| 212 | * mapping of HTC services to HIF pipes. |
| 213 | */ |
| 214 | /* |
| 215 | * This authoritative table defines Copy Engine configuration and the mapping |
| 216 | * of services/endpoints to CEs. A subset of this information is passed to |
| 217 | * the Target during startup as a prerequisite to entering BMI phase. |
| 218 | * See: |
| 219 | * target_service_to_ce_map - Target-side mapping |
| 220 | * hif_map_service_to_pipe - Host-side mapping |
| 221 | * target_ce_config - Target-side configuration |
| 222 | * host_ce_config - Host-side configuration |
| 223 | ============================================================================ |
| 224 | Purpose | Service / Endpoint | CE | Dire | Xfer | Xfer |
| 225 | | | | ctio | Size | Frequency |
| 226 | | | | n | | |
| 227 | ============================================================================ |
| 228 | tx | HTT_DATA (downlink) | CE 0 | h->t | medium - | very frequent |
| 229 | descriptor | | | | O(100B) | and regular |
| 230 | download | | | | | |
| 231 | ---------------------------------------------------------------------------- |
| 232 | rx | HTT_DATA (uplink) | CE 1 | t->h | small - | frequent and |
| 233 | indication | | | | O(10B) | regular |
| 234 | upload | | | | | |
| 235 | ---------------------------------------------------------------------------- |
| 236 | MSDU | DATA_BK (uplink) | CE 2 | t->h | large - | rare |
| 237 | upload | | | | O(1000B) | (frequent |
| 238 | e.g. noise | | | | | during IP1.0 |
| 239 | packets | | | | | testing) |
| 240 | ---------------------------------------------------------------------------- |
| 241 | MSDU | DATA_BK (downlink) | CE 3 | h->t | large - | very rare |
| 242 | download | | | | O(1000B) | (frequent |
| 243 | e.g. | | | | | during IP1.0 |
| 244 | misdirecte | | | | | testing) |
| 245 | d EAPOL | | | | | |
| 246 | packets | | | | | |
| 247 | ---------------------------------------------------------------------------- |
| 248 | n/a | DATA_BE, DATA_VI | CE 2 | t->h | | never(?) |
| 249 | | DATA_VO (uplink) | | | | |
| 250 | ---------------------------------------------------------------------------- |
| 251 | n/a | DATA_BE, DATA_VI | CE 3 | h->t | | never(?) |
| 252 | | DATA_VO (downlink) | | | | |
| 253 | ---------------------------------------------------------------------------- |
| 254 | WMI events | WMI_CONTROL (uplink) | CE 4 | t->h | medium - | infrequent |
| 255 | | | | | O(100B) | |
| 256 | ---------------------------------------------------------------------------- |
| 257 | WMI | WMI_CONTROL | CE 5 | h->t | medium - | infrequent |
| 258 | messages | (downlink) | | | O(100B) | |
| 259 | | | | | | |
| 260 | ---------------------------------------------------------------------------- |
| 261 | n/a | HTC_CTRL_RSVD, | CE 1 | t->h | | never(?) |
| 262 | | HTC_RAW_STREAMS | | | | |
| 263 | | (uplink) | | | | |
| 264 | ---------------------------------------------------------------------------- |
| 265 | n/a | HTC_CTRL_RSVD, | CE 0 | h->t | | never(?) |
| 266 | | HTC_RAW_STREAMS | | | | |
| 267 | | (downlink) | | | | |
| 268 | ---------------------------------------------------------------------------- |
| 269 | diag | none (raw CE) | CE 7 | t<>h | 4 | Diag Window |
| 270 | | | | | | infrequent |
| 271 | ============================================================================ |
| 272 | */ |
| 273 | |
| 274 | /* |
| 275 | * Map from service/endpoint to Copy Engine. |
| 276 | * This table is derived from the CE_PCI TABLE, above. |
| 277 | * It is passed to the Target at startup for use by firmware. |
| 278 | */ |
| 279 | static struct service_to_pipe target_service_to_ce_map_wlan[] = { |
| 280 | { |
| 281 | WMI_DATA_VO_SVC, |
| 282 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 283 | 3, |
| 284 | }, |
| 285 | { |
| 286 | WMI_DATA_VO_SVC, |
| 287 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 288 | 2, |
| 289 | }, |
| 290 | { |
| 291 | WMI_DATA_BK_SVC, |
| 292 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 293 | 3, |
| 294 | }, |
| 295 | { |
| 296 | WMI_DATA_BK_SVC, |
| 297 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 298 | 2, |
| 299 | }, |
| 300 | { |
| 301 | WMI_DATA_BE_SVC, |
| 302 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 303 | 3, |
| 304 | }, |
| 305 | { |
| 306 | WMI_DATA_BE_SVC, |
| 307 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 308 | 2, |
| 309 | }, |
| 310 | { |
| 311 | WMI_DATA_VI_SVC, |
| 312 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 313 | 3, |
| 314 | }, |
| 315 | { |
| 316 | WMI_DATA_VI_SVC, |
| 317 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 318 | 2, |
| 319 | }, |
| 320 | { |
| 321 | WMI_CONTROL_SVC, |
| 322 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 323 | 3, |
| 324 | }, |
| 325 | { |
| 326 | WMI_CONTROL_SVC, |
| 327 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 328 | 2, |
| 329 | }, |
| 330 | { |
| 331 | HTC_CTRL_RSVD_SVC, |
| 332 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 333 | 0, /* could be moved to 3 (share with WMI) */ |
| 334 | }, |
| 335 | { |
| 336 | HTC_CTRL_RSVD_SVC, |
| 337 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 338 | 2, |
| 339 | }, |
| 340 | { |
| 341 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 342 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 343 | 0, |
| 344 | }, |
| 345 | { |
| 346 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 347 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 348 | 2, |
| 349 | }, |
| 350 | { |
| 351 | HTT_DATA_MSG_SVC, |
| 352 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 353 | 4, |
| 354 | }, |
| 355 | { |
| 356 | HTT_DATA_MSG_SVC, |
| 357 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 358 | 1, |
| 359 | }, |
| 360 | { |
| 361 | WDI_IPA_TX_SVC, |
| 362 | PIPEDIR_OUT, /* in = DL = target -> host */ |
| 363 | 5, |
| 364 | }, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 365 | #if defined(QCA_WIFI_3_0_ADRASTEA) |
| 366 | { |
| 367 | HTT_DATA2_MSG_SVC, |
| 368 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 369 | 9, |
| 370 | }, |
| 371 | { |
| 372 | HTT_DATA3_MSG_SVC, |
| 373 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 374 | 10, |
| 375 | }, |
Nirav Shah | 75cc5c8 | 2016-05-25 10:52:38 +0530 | [diff] [blame] | 376 | { |
| 377 | PACKET_LOG_SVC, |
| 378 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 379 | 11, |
| 380 | }, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 381 | #endif |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 382 | /* (Additions here) */ |
| 383 | |
| 384 | { /* Must be last */ |
| 385 | 0, |
| 386 | 0, |
| 387 | 0, |
| 388 | }, |
| 389 | }; |
| 390 | |
Houston Hoffman | 88c896f | 2016-12-14 09:56:35 -0800 | [diff] [blame] | 391 | /* PIPEDIR_OUT = HOST to Target */ |
| 392 | /* PIPEDIR_IN = TARGET to HOST */ |
Pratik Gandhi | 7846150 | 2018-02-05 17:22:41 +0530 | [diff] [blame] | 393 | #if (defined(QCA_WIFI_QCA8074)) |
Balamurugan Mahalingam | 20802b2 | 2017-05-02 19:11:38 +0530 | [diff] [blame] | 394 | static struct service_to_pipe target_service_to_ce_map_qca8074[] = { |
| 395 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 396 | { WMI_DATA_VO_SVC, PIPEDIR_IN, 2, }, |
| 397 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 398 | { WMI_DATA_BK_SVC, PIPEDIR_IN, 2, }, |
| 399 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 400 | { WMI_DATA_BE_SVC, PIPEDIR_IN, 2, }, |
| 401 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 402 | { WMI_DATA_VI_SVC, PIPEDIR_IN, 2, }, |
| 403 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 404 | { WMI_CONTROL_SVC, PIPEDIR_IN, 2, }, |
| 405 | { WMI_CONTROL_SVC_WMAC1, PIPEDIR_OUT, 7}, |
| 406 | { WMI_CONTROL_SVC_WMAC1, PIPEDIR_IN, 2}, |
| 407 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 408 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 1, }, |
| 409 | { HTC_RAW_STREAMS_SVC, PIPEDIR_OUT, 0}, |
| 410 | { HTC_RAW_STREAMS_SVC, PIPEDIR_IN, 1 }, |
| 411 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 412 | { HTT_DATA_MSG_SVC, PIPEDIR_IN, 1, }, |
Balamurugan Mahalingam | dcb5226 | 2017-08-16 19:16:45 +0530 | [diff] [blame] | 413 | { PACKET_LOG_SVC, PIPEDIR_IN, 5, }, |
Balamurugan Mahalingam | 20802b2 | 2017-05-02 19:11:38 +0530 | [diff] [blame] | 414 | /* (Additions here) */ |
| 415 | { 0, 0, 0, }, |
| 416 | }; |
Pratik Gandhi | 7846150 | 2018-02-05 17:22:41 +0530 | [diff] [blame] | 417 | #else |
| 418 | static struct service_to_pipe target_service_to_ce_map_qca8074[] = { |
| 419 | }; |
| 420 | #endif |
Balamurugan Mahalingam | 20802b2 | 2017-05-02 19:11:38 +0530 | [diff] [blame] | 421 | |
Kiran Venkatappa | f3e6bf1 | 2018-09-11 15:06:26 +0530 | [diff] [blame] | 422 | #if (defined(QCA_WIFI_QCA8074V2)) |
| 423 | static struct service_to_pipe target_service_to_ce_map_qca8074_v2[] = { |
| 424 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 425 | { WMI_DATA_VO_SVC, PIPEDIR_IN, 2, }, |
| 426 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 427 | { WMI_DATA_BK_SVC, PIPEDIR_IN, 2, }, |
| 428 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 429 | { WMI_DATA_BE_SVC, PIPEDIR_IN, 2, }, |
| 430 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 431 | { WMI_DATA_VI_SVC, PIPEDIR_IN, 2, }, |
| 432 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 433 | { WMI_CONTROL_SVC, PIPEDIR_IN, 2, }, |
| 434 | { WMI_CONTROL_SVC_WMAC1, PIPEDIR_OUT, 7}, |
| 435 | { WMI_CONTROL_SVC_WMAC1, PIPEDIR_IN, 2}, |
| 436 | { WMI_CONTROL_SVC_WMAC2, PIPEDIR_OUT, 9}, |
| 437 | { WMI_CONTROL_SVC_WMAC2, PIPEDIR_IN, 2}, |
| 438 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 439 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 1, }, |
| 440 | { HTC_RAW_STREAMS_SVC, PIPEDIR_OUT, 0}, |
| 441 | { HTC_RAW_STREAMS_SVC, PIPEDIR_IN, 1 }, |
| 442 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 443 | { HTT_DATA_MSG_SVC, PIPEDIR_IN, 1, }, |
| 444 | { PACKET_LOG_SVC, PIPEDIR_IN, 5, }, |
| 445 | /* (Additions here) */ |
| 446 | { 0, 0, 0, }, |
| 447 | }; |
| 448 | #else |
| 449 | static struct service_to_pipe target_service_to_ce_map_qca8074_v2[] = { |
| 450 | }; |
| 451 | #endif |
| 452 | |
Basamma Yakkanahalli | 30265f8 | 2018-10-08 14:46:43 +0530 | [diff] [blame] | 453 | #if (defined(QCA_WIFI_QCA6018)) |
| 454 | static struct service_to_pipe target_service_to_ce_map_qca6018[] = { |
| 455 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 456 | { WMI_DATA_VO_SVC, PIPEDIR_IN, 2, }, |
| 457 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 458 | { WMI_DATA_BK_SVC, PIPEDIR_IN, 2, }, |
| 459 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 460 | { WMI_DATA_BE_SVC, PIPEDIR_IN, 2, }, |
| 461 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 462 | { WMI_DATA_VI_SVC, PIPEDIR_IN, 2, }, |
| 463 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 464 | { WMI_CONTROL_SVC, PIPEDIR_IN, 2, }, |
| 465 | { WMI_CONTROL_SVC_WMAC1, PIPEDIR_OUT, 7}, |
| 466 | { WMI_CONTROL_SVC_WMAC1, PIPEDIR_IN, 2}, |
| 467 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 468 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 1, }, |
| 469 | { HTC_RAW_STREAMS_SVC, PIPEDIR_OUT, 0}, |
| 470 | { HTC_RAW_STREAMS_SVC, PIPEDIR_IN, 1 }, |
| 471 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 472 | { HTT_DATA_MSG_SVC, PIPEDIR_IN, 1, }, |
| 473 | { PACKET_LOG_SVC, PIPEDIR_IN, 5, }, |
| 474 | /* (Additions here) */ |
| 475 | { 0, 0, 0, }, |
| 476 | }; |
| 477 | #else |
| 478 | static struct service_to_pipe target_service_to_ce_map_qca6018[] = { |
| 479 | }; |
| 480 | #endif |
| 481 | |
Nandha Kishore Easwaran | 5d3475b | 2019-06-27 11:38:53 +0530 | [diff] [blame] | 482 | #if (defined(QCA_WIFI_QCN9000)) |
| 483 | static struct service_to_pipe target_service_to_ce_map_qcn9000[] = { |
| 484 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 485 | { WMI_DATA_VO_SVC, PIPEDIR_IN, 2, }, |
| 486 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 487 | { WMI_DATA_BK_SVC, PIPEDIR_IN, 2, }, |
| 488 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 489 | { WMI_DATA_BE_SVC, PIPEDIR_IN, 2, }, |
| 490 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 491 | { WMI_DATA_VI_SVC, PIPEDIR_IN, 2, }, |
| 492 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 493 | { WMI_CONTROL_SVC, PIPEDIR_IN, 2, }, |
| 494 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 495 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 1, }, |
| 496 | { HTC_RAW_STREAMS_SVC, PIPEDIR_OUT, 0}, |
| 497 | { HTC_RAW_STREAMS_SVC, PIPEDIR_IN, 1 }, |
| 498 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 499 | { HTT_DATA_MSG_SVC, PIPEDIR_IN, 1, }, |
| 500 | { PACKET_LOG_SVC, PIPEDIR_IN, 5, }, |
| 501 | /* (Additions here) */ |
| 502 | { 0, 0, 0, }, |
| 503 | }; |
| 504 | #else |
| 505 | static struct service_to_pipe target_service_to_ce_map_qcn9000[] = { |
| 506 | }; |
| 507 | #endif |
| 508 | |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 509 | /* PIPEDIR_OUT = HOST to Target */ |
| 510 | /* PIPEDIR_IN = TARGET to HOST */ |
| 511 | #ifdef QCN7605_SUPPORT |
| 512 | static struct service_to_pipe target_service_to_ce_map_qcn7605[] = { |
| 513 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 0, }, |
| 514 | { WMI_DATA_VO_SVC, PIPEDIR_IN, 2, }, |
| 515 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 0, }, |
| 516 | { WMI_DATA_BK_SVC, PIPEDIR_IN, 2, }, |
| 517 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 0, }, |
| 518 | { WMI_DATA_BE_SVC, PIPEDIR_IN, 2, }, |
| 519 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 0, }, |
| 520 | { WMI_DATA_VI_SVC, PIPEDIR_IN, 2, }, |
| 521 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 0, }, |
| 522 | { WMI_CONTROL_SVC, PIPEDIR_IN, 2, }, |
| 523 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 524 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 2, }, |
| 525 | { HTC_RAW_STREAMS_SVC, PIPEDIR_OUT, 0, }, |
| 526 | { HTC_RAW_STREAMS_SVC, PIPEDIR_IN, 2, }, |
| 527 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 528 | { HTT_DATA_MSG_SVC, PIPEDIR_IN, 1, }, |
| 529 | { HTT_DATA2_MSG_SVC, PIPEDIR_IN, 3, }, |
| 530 | #ifdef IPA_OFFLOAD |
| 531 | { WDI_IPA_TX_SVC, PIPEDIR_OUT, 5, }, |
| 532 | #else |
| 533 | { HTT_DATA3_MSG_SVC, PIPEDIR_IN, 8, }, |
| 534 | #endif |
| 535 | { PACKET_LOG_SVC, PIPEDIR_IN, 7, }, |
| 536 | /* (Additions here) */ |
| 537 | { 0, 0, 0, }, |
| 538 | }; |
| 539 | #endif |
| 540 | |
Pratik Gandhi | 7846150 | 2018-02-05 17:22:41 +0530 | [diff] [blame] | 541 | #if (defined(QCA_WIFI_QCA6290)) |
Akshay Kosigi | 181b2f5 | 2018-11-26 17:02:54 +0530 | [diff] [blame] | 542 | #ifdef QCA_6290_AP_MODE |
Houston Hoffman | 88c896f | 2016-12-14 09:56:35 -0800 | [diff] [blame] | 543 | static struct service_to_pipe target_service_to_ce_map_qca6290[] = { |
| 544 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 545 | { WMI_DATA_VO_SVC, PIPEDIR_IN , 2, }, |
| 546 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 547 | { WMI_DATA_BK_SVC, PIPEDIR_IN , 2, }, |
| 548 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 549 | { WMI_DATA_BE_SVC, PIPEDIR_IN , 2, }, |
| 550 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 551 | { WMI_DATA_VI_SVC, PIPEDIR_IN , 2, }, |
| 552 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 553 | { WMI_CONTROL_SVC, PIPEDIR_IN , 2, }, |
| 554 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 555 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN , 2, }, |
| 556 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 557 | { HTT_DATA_MSG_SVC, PIPEDIR_IN , 1, }, |
Nandha Kishore Easwaran | 51f80b8 | 2018-02-21 12:04:34 +0530 | [diff] [blame] | 558 | { WMI_CONTROL_SVC_WMAC1, PIPEDIR_OUT, 7}, |
| 559 | { WMI_CONTROL_SVC_WMAC1, PIPEDIR_IN, 2}, |
Nandha Kishore Easwaran | ac0b96e | 2018-03-20 21:56:01 +0530 | [diff] [blame] | 560 | { PACKET_LOG_SVC, PIPEDIR_IN, 5, }, |
Houston Hoffman | 88c896f | 2016-12-14 09:56:35 -0800 | [diff] [blame] | 561 | /* (Additions here) */ |
| 562 | { 0, 0, 0, }, |
| 563 | }; |
Nandha Kishore Easwaran | 51f80b8 | 2018-02-21 12:04:34 +0530 | [diff] [blame] | 564 | #else |
| 565 | static struct service_to_pipe target_service_to_ce_map_qca6290[] = { |
| 566 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 567 | { WMI_DATA_VO_SVC, PIPEDIR_IN, 2, }, |
| 568 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 569 | { WMI_DATA_BK_SVC, PIPEDIR_IN, 2, }, |
| 570 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 571 | { WMI_DATA_BE_SVC, PIPEDIR_IN, 2, }, |
| 572 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 573 | { WMI_DATA_VI_SVC, PIPEDIR_IN, 2, }, |
| 574 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 575 | { WMI_CONTROL_SVC, PIPEDIR_IN, 2, }, |
| 576 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 577 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 2, }, |
| 578 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 579 | { HTT_DATA_MSG_SVC, PIPEDIR_IN, 1, }, |
| 580 | /* (Additions here) */ |
| 581 | { 0, 0, 0, }, |
| 582 | }; |
| 583 | #endif |
Pratik Gandhi | 7846150 | 2018-02-05 17:22:41 +0530 | [diff] [blame] | 584 | #else |
| 585 | static struct service_to_pipe target_service_to_ce_map_qca6290[] = { |
| 586 | }; |
| 587 | #endif |
Houston Hoffman | 88c896f | 2016-12-14 09:56:35 -0800 | [diff] [blame] | 588 | |
Venkata Sharath Chandra Manchala | 79860aa | 2018-06-12 15:16:36 -0700 | [diff] [blame] | 589 | #if (defined(QCA_WIFI_QCA6390)) |
| 590 | static struct service_to_pipe target_service_to_ce_map_qca6390[] = { |
| 591 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 592 | { WMI_DATA_VO_SVC, PIPEDIR_IN, 2, }, |
| 593 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 594 | { WMI_DATA_BK_SVC, PIPEDIR_IN, 2, }, |
| 595 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 596 | { WMI_DATA_BE_SVC, PIPEDIR_IN, 2, }, |
| 597 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 598 | { WMI_DATA_VI_SVC, PIPEDIR_IN, 2, }, |
| 599 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 600 | { WMI_CONTROL_SVC, PIPEDIR_IN, 2, }, |
| 601 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 602 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 2, }, |
| 603 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 604 | { HTT_DATA_MSG_SVC, PIPEDIR_IN, 1, }, |
Venkata Sharath Chandra Manchala | cad74ad | 2019-01-28 11:36:47 -0800 | [diff] [blame] | 605 | { PACKET_LOG_SVC, PIPEDIR_IN, 5, }, |
Venkata Sharath Chandra Manchala | 79860aa | 2018-06-12 15:16:36 -0700 | [diff] [blame] | 606 | /* (Additions here) */ |
| 607 | { 0, 0, 0, }, |
| 608 | }; |
| 609 | #else |
| 610 | static struct service_to_pipe target_service_to_ce_map_qca6390[] = { |
| 611 | }; |
| 612 | #endif |
| 613 | |
Mohit Khanna | 973308a | 2019-05-13 18:31:33 -0700 | [diff] [blame^] | 614 | static struct service_to_pipe target_service_to_ce_map_qca6490[] = { |
| 615 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 616 | { WMI_DATA_VO_SVC, PIPEDIR_IN, 2, }, |
| 617 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 618 | { WMI_DATA_BK_SVC, PIPEDIR_IN, 2, }, |
| 619 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 620 | { WMI_DATA_BE_SVC, PIPEDIR_IN, 2, }, |
| 621 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 622 | { WMI_DATA_VI_SVC, PIPEDIR_IN, 2, }, |
| 623 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 624 | { WMI_CONTROL_SVC, PIPEDIR_IN, 2, }, |
| 625 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 626 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 2, }, |
| 627 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 628 | { HTT_DATA_MSG_SVC, PIPEDIR_IN, 1, }, |
| 629 | { PACKET_LOG_SVC, PIPEDIR_IN, 5, }, |
| 630 | /* (Additions here) */ |
| 631 | { 0, 0, 0, }, |
| 632 | }; |
| 633 | |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 634 | static struct service_to_pipe target_service_to_ce_map_ar900b[] = { |
| 635 | { |
| 636 | WMI_DATA_VO_SVC, |
| 637 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 638 | 3, |
| 639 | }, |
| 640 | { |
| 641 | WMI_DATA_VO_SVC, |
| 642 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 643 | 2, |
| 644 | }, |
| 645 | { |
| 646 | WMI_DATA_BK_SVC, |
| 647 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 648 | 3, |
| 649 | }, |
| 650 | { |
| 651 | WMI_DATA_BK_SVC, |
| 652 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 653 | 2, |
| 654 | }, |
| 655 | { |
| 656 | WMI_DATA_BE_SVC, |
| 657 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 658 | 3, |
| 659 | }, |
| 660 | { |
| 661 | WMI_DATA_BE_SVC, |
| 662 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 663 | 2, |
| 664 | }, |
| 665 | { |
| 666 | WMI_DATA_VI_SVC, |
| 667 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 668 | 3, |
| 669 | }, |
| 670 | { |
| 671 | WMI_DATA_VI_SVC, |
| 672 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 673 | 2, |
| 674 | }, |
| 675 | { |
| 676 | WMI_CONTROL_SVC, |
| 677 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 678 | 3, |
| 679 | }, |
| 680 | { |
| 681 | WMI_CONTROL_SVC, |
| 682 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 683 | 2, |
| 684 | }, |
| 685 | { |
| 686 | HTC_CTRL_RSVD_SVC, |
| 687 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 688 | 0, /* could be moved to 3 (share with WMI) */ |
| 689 | }, |
| 690 | { |
| 691 | HTC_CTRL_RSVD_SVC, |
| 692 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 693 | 1, |
| 694 | }, |
| 695 | { |
| 696 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 697 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 698 | 0, |
| 699 | }, |
| 700 | { |
| 701 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 702 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 703 | 1, |
| 704 | }, |
| 705 | { |
| 706 | HTT_DATA_MSG_SVC, |
| 707 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 708 | 4, |
| 709 | }, |
Nirav Shah | 77250fa | 2018-03-11 14:56:22 +0530 | [diff] [blame] | 710 | #ifdef WLAN_FEATURE_FASTPATH |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 711 | { |
| 712 | HTT_DATA_MSG_SVC, |
| 713 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 714 | 5, |
| 715 | }, |
| 716 | #else /* WLAN_FEATURE_FASTPATH */ |
| 717 | { |
| 718 | HTT_DATA_MSG_SVC, |
| 719 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 720 | 1, |
| 721 | }, |
| 722 | #endif /* WLAN_FEATURE_FASTPATH */ |
| 723 | |
| 724 | /* (Additions here) */ |
| 725 | |
| 726 | { /* Must be last */ |
| 727 | 0, |
| 728 | 0, |
| 729 | 0, |
| 730 | }, |
| 731 | }; |
| 732 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 733 | static struct shadow_reg_cfg *target_shadow_reg_cfg = target_shadow_reg_cfg_map; |
| 734 | static int shadow_cfg_sz = sizeof(target_shadow_reg_cfg_map); |
| 735 | |
Nirav Shah | 0d0cce8 | 2018-01-17 17:00:31 +0530 | [diff] [blame] | 736 | #ifdef WLAN_FEATURE_EPPING |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 737 | static struct service_to_pipe target_service_to_ce_map_wlan_epping[] = { |
| 738 | {WMI_DATA_VO_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 739 | {WMI_DATA_VO_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 740 | {WMI_DATA_BK_SVC, PIPEDIR_OUT, 4,}, /* out = UL = host -> target */ |
| 741 | {WMI_DATA_BK_SVC, PIPEDIR_IN, 1,}, /* in = DL = target -> host */ |
| 742 | {WMI_DATA_BE_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 743 | {WMI_DATA_BE_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 744 | {WMI_DATA_VI_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 745 | {WMI_DATA_VI_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 746 | {WMI_CONTROL_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 747 | {WMI_CONTROL_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 748 | {HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0,}, /* out = UL = host -> target */ |
| 749 | {HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 750 | {HTC_RAW_STREAMS_SVC, PIPEDIR_OUT, 0,}, /* out = UL = host -> target */ |
| 751 | {HTC_RAW_STREAMS_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 752 | {HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4,}, /* out = UL = host -> target */ |
| 753 | {HTT_DATA_MSG_SVC, PIPEDIR_IN, 1,}, /* in = DL = target -> host */ |
| 754 | {0, 0, 0,}, /* Must be last */ |
| 755 | }; |
| 756 | |
Nirav Shah | 0d0cce8 | 2018-01-17 17:00:31 +0530 | [diff] [blame] | 757 | void hif_select_epping_service_to_pipe_map(struct service_to_pipe |
| 758 | **tgt_svc_map_to_use, |
| 759 | uint32_t *sz_tgt_svc_map_to_use) |
| 760 | { |
| 761 | *tgt_svc_map_to_use = target_service_to_ce_map_wlan_epping; |
| 762 | *sz_tgt_svc_map_to_use = |
| 763 | sizeof(target_service_to_ce_map_wlan_epping); |
| 764 | } |
| 765 | #endif |
| 766 | |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 767 | #ifdef QCN7605_SUPPORT |
| 768 | static inline |
| 769 | void hif_select_ce_map_qcn7605(struct service_to_pipe **tgt_svc_map_to_use, |
| 770 | uint32_t *sz_tgt_svc_map_to_use) |
| 771 | { |
| 772 | *tgt_svc_map_to_use = target_service_to_ce_map_qcn7605; |
| 773 | *sz_tgt_svc_map_to_use = sizeof(target_service_to_ce_map_qcn7605); |
| 774 | } |
| 775 | #else |
| 776 | static inline |
| 777 | void hif_select_ce_map_qcn7605(struct service_to_pipe **tgt_svc_map_to_use, |
| 778 | uint32_t *sz_tgt_svc_map_to_use) |
| 779 | { |
| 780 | HIF_ERROR("%s: QCN7605 not supported", __func__); |
| 781 | } |
| 782 | #endif |
| 783 | |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 784 | static void hif_select_service_to_pipe_map(struct hif_softc *scn, |
| 785 | struct service_to_pipe **tgt_svc_map_to_use, |
| 786 | uint32_t *sz_tgt_svc_map_to_use) |
| 787 | { |
| 788 | uint32_t mode = hif_get_conparam(scn); |
| 789 | struct hif_target_info *tgt_info = &scn->target_info; |
| 790 | |
| 791 | if (QDF_IS_EPPING_ENABLED(mode)) { |
Nirav Shah | 0d0cce8 | 2018-01-17 17:00:31 +0530 | [diff] [blame] | 792 | hif_select_epping_service_to_pipe_map(tgt_svc_map_to_use, |
| 793 | sz_tgt_svc_map_to_use); |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 794 | } else { |
| 795 | switch (tgt_info->target_type) { |
| 796 | default: |
| 797 | *tgt_svc_map_to_use = target_service_to_ce_map_wlan; |
| 798 | *sz_tgt_svc_map_to_use = |
| 799 | sizeof(target_service_to_ce_map_wlan); |
| 800 | break; |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 801 | case TARGET_TYPE_QCN7605: |
| 802 | hif_select_ce_map_qcn7605(tgt_svc_map_to_use, |
| 803 | sz_tgt_svc_map_to_use); |
| 804 | break; |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 805 | case TARGET_TYPE_AR900B: |
| 806 | case TARGET_TYPE_QCA9984: |
| 807 | case TARGET_TYPE_IPQ4019: |
| 808 | case TARGET_TYPE_QCA9888: |
| 809 | case TARGET_TYPE_AR9888: |
| 810 | case TARGET_TYPE_AR9888V2: |
| 811 | *tgt_svc_map_to_use = target_service_to_ce_map_ar900b; |
| 812 | *sz_tgt_svc_map_to_use = |
| 813 | sizeof(target_service_to_ce_map_ar900b); |
| 814 | break; |
| 815 | case TARGET_TYPE_QCA6290: |
| 816 | *tgt_svc_map_to_use = target_service_to_ce_map_qca6290; |
| 817 | *sz_tgt_svc_map_to_use = |
| 818 | sizeof(target_service_to_ce_map_qca6290); |
| 819 | break; |
Venkata Sharath Chandra Manchala | 79860aa | 2018-06-12 15:16:36 -0700 | [diff] [blame] | 820 | case TARGET_TYPE_QCA6390: |
| 821 | *tgt_svc_map_to_use = target_service_to_ce_map_qca6390; |
| 822 | *sz_tgt_svc_map_to_use = |
| 823 | sizeof(target_service_to_ce_map_qca6390); |
| 824 | break; |
Mohit Khanna | 973308a | 2019-05-13 18:31:33 -0700 | [diff] [blame^] | 825 | case TARGET_TYPE_QCA6490: |
| 826 | *tgt_svc_map_to_use = target_service_to_ce_map_qca6490; |
| 827 | *sz_tgt_svc_map_to_use = |
| 828 | sizeof(target_service_to_ce_map_qca6490); |
| 829 | break; |
Balamurugan Mahalingam | 20802b2 | 2017-05-02 19:11:38 +0530 | [diff] [blame] | 830 | case TARGET_TYPE_QCA8074: |
| 831 | *tgt_svc_map_to_use = target_service_to_ce_map_qca8074; |
| 832 | *sz_tgt_svc_map_to_use = |
| 833 | sizeof(target_service_to_ce_map_qca8074); |
| 834 | break; |
Kiran Venkatappa | f3e6bf1 | 2018-09-11 15:06:26 +0530 | [diff] [blame] | 835 | case TARGET_TYPE_QCA8074V2: |
| 836 | *tgt_svc_map_to_use = |
| 837 | target_service_to_ce_map_qca8074_v2; |
| 838 | *sz_tgt_svc_map_to_use = |
| 839 | sizeof(target_service_to_ce_map_qca8074_v2); |
| 840 | break; |
Basamma Yakkanahalli | 30265f8 | 2018-10-08 14:46:43 +0530 | [diff] [blame] | 841 | case TARGET_TYPE_QCA6018: |
| 842 | *tgt_svc_map_to_use = |
| 843 | target_service_to_ce_map_qca6018; |
| 844 | *sz_tgt_svc_map_to_use = |
| 845 | sizeof(target_service_to_ce_map_qca6018); |
| 846 | break; |
Nandha Kishore Easwaran | 5d3475b | 2019-06-27 11:38:53 +0530 | [diff] [blame] | 847 | case TARGET_TYPE_QCN9000: |
| 848 | *tgt_svc_map_to_use = |
| 849 | target_service_to_ce_map_qcn9000; |
| 850 | *sz_tgt_svc_map_to_use = |
| 851 | sizeof(target_service_to_ce_map_qcn9000); |
| 852 | break; |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 853 | } |
| 854 | } |
| 855 | } |
| 856 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 857 | /** |
| 858 | * ce_mark_datapath() - marks the ce_state->htt_rx_data accordingly |
| 859 | * @ce_state : pointer to the state context of the CE |
| 860 | * |
| 861 | * Description: |
| 862 | * Sets htt_rx_data attribute of the state structure if the |
| 863 | * CE serves one of the HTT DATA services. |
| 864 | * |
| 865 | * Return: |
| 866 | * false (attribute set to false) |
| 867 | * true (attribute set to true); |
| 868 | */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 869 | static bool ce_mark_datapath(struct CE_state *ce_state) |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 870 | { |
| 871 | struct service_to_pipe *svc_map; |
Kiran Venkatappa | c068709 | 2017-04-13 16:45:03 +0530 | [diff] [blame] | 872 | uint32_t map_sz, map_len; |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 873 | int i; |
| 874 | bool rc = false; |
| 875 | |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 876 | if (ce_state) { |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 877 | hif_select_service_to_pipe_map(ce_state->scn, &svc_map, |
| 878 | &map_sz); |
Houston Hoffman | 55fcf5a | 2016-09-27 23:21:51 -0700 | [diff] [blame] | 879 | |
Kiran Venkatappa | c068709 | 2017-04-13 16:45:03 +0530 | [diff] [blame] | 880 | map_len = map_sz / sizeof(struct service_to_pipe); |
| 881 | for (i = 0; i < map_len; i++) { |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 882 | if ((svc_map[i].pipenum == ce_state->id) && |
| 883 | ((svc_map[i].service_id == HTT_DATA_MSG_SVC) || |
| 884 | (svc_map[i].service_id == HTT_DATA2_MSG_SVC) || |
| 885 | (svc_map[i].service_id == HTT_DATA3_MSG_SVC))) { |
| 886 | /* HTT CEs are unidirectional */ |
| 887 | if (svc_map[i].pipedir == PIPEDIR_IN) |
| 888 | ce_state->htt_rx_data = true; |
| 889 | else |
| 890 | ce_state->htt_tx_data = true; |
| 891 | rc = true; |
| 892 | } |
| 893 | } |
| 894 | } |
| 895 | return rc; |
| 896 | } |
| 897 | |
Houston Hoffman | 4780817 | 2016-05-06 10:04:21 -0700 | [diff] [blame] | 898 | /** |
| 899 | * ce_ring_test_initial_indexes() - tests the initial ce ring indexes |
| 900 | * @ce_id: ce in question |
| 901 | * @ring: ring state being examined |
| 902 | * @type: "src_ring" or "dest_ring" string for identifying the ring |
| 903 | * |
| 904 | * Warns on non-zero index values. |
| 905 | * Causes a kernel panic if the ring is not empty durring initialization. |
| 906 | */ |
| 907 | static void ce_ring_test_initial_indexes(int ce_id, struct CE_ring_state *ring, |
| 908 | char *type) |
| 909 | { |
| 910 | if (ring->write_index != 0 || ring->sw_index != 0) |
| 911 | HIF_ERROR("ce %d, %s, initial sw_index = %d, initial write_index =%d", |
| 912 | ce_id, type, ring->sw_index, ring->write_index); |
| 913 | if (ring->write_index != ring->sw_index) |
| 914 | QDF_BUG(0); |
| 915 | } |
| 916 | |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 917 | #ifdef IPA_OFFLOAD |
| 918 | /** |
| 919 | * ce_alloc_desc_ring() - Allocate copyengine descriptor ring |
| 920 | * @scn: softc instance |
| 921 | * @ce_id: ce in question |
| 922 | * @base_addr: pointer to copyengine ring base address |
| 923 | * @ce_ring: copyengine instance |
| 924 | * @nentries: number of entries should be allocated |
| 925 | * @desc_size: ce desc size |
| 926 | * |
| 927 | * Return: QDF_STATUS_SUCCESS - for success |
| 928 | */ |
| 929 | static QDF_STATUS ce_alloc_desc_ring(struct hif_softc *scn, unsigned int CE_id, |
| 930 | qdf_dma_addr_t *base_addr, |
| 931 | struct CE_ring_state *ce_ring, |
| 932 | unsigned int nentries, uint32_t desc_size) |
| 933 | { |
Mohit Khanna | ba7a798 | 2018-03-21 22:06:25 -0700 | [diff] [blame] | 934 | if ((CE_id == HIF_PCI_IPA_UC_ASSIGNED_CE) && |
| 935 | !ce_srng_based(scn)) { |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 936 | if (!scn->ipa_ce_ring) { |
Mohit Khanna | ba7a798 | 2018-03-21 22:06:25 -0700 | [diff] [blame] | 937 | scn->ipa_ce_ring = qdf_mem_shared_mem_alloc( |
| 938 | scn->qdf_dev, |
| 939 | nentries * desc_size + CE_DESC_RING_ALIGN); |
| 940 | if (!scn->ipa_ce_ring) { |
| 941 | HIF_ERROR( |
| 942 | "%s: Failed to allocate memory for IPA ce ring", |
| 943 | __func__); |
| 944 | return QDF_STATUS_E_NOMEM; |
| 945 | } |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 946 | } |
| 947 | *base_addr = qdf_mem_get_dma_addr(scn->qdf_dev, |
| 948 | &scn->ipa_ce_ring->mem_info); |
| 949 | ce_ring->base_addr_owner_space_unaligned = |
| 950 | scn->ipa_ce_ring->vaddr; |
| 951 | } else { |
| 952 | ce_ring->base_addr_owner_space_unaligned = |
| 953 | qdf_mem_alloc_consistent(scn->qdf_dev, |
| 954 | scn->qdf_dev->dev, |
| 955 | (nentries * desc_size + |
| 956 | CE_DESC_RING_ALIGN), |
| 957 | base_addr); |
| 958 | if (!ce_ring->base_addr_owner_space_unaligned) { |
| 959 | HIF_ERROR("%s: Failed to allocate DMA memory for ce ring id : %u", |
| 960 | __func__, CE_id); |
| 961 | return QDF_STATUS_E_NOMEM; |
| 962 | } |
| 963 | } |
| 964 | return QDF_STATUS_SUCCESS; |
| 965 | } |
| 966 | |
| 967 | /** |
| 968 | * ce_free_desc_ring() - Frees copyengine descriptor ring |
| 969 | * @scn: softc instance |
| 970 | * @ce_id: ce in question |
| 971 | * @ce_ring: copyengine instance |
| 972 | * @desc_size: ce desc size |
| 973 | * |
| 974 | * Return: None |
| 975 | */ |
| 976 | static void ce_free_desc_ring(struct hif_softc *scn, unsigned int CE_id, |
| 977 | struct CE_ring_state *ce_ring, uint32_t desc_size) |
| 978 | { |
Mohit Khanna | ba7a798 | 2018-03-21 22:06:25 -0700 | [diff] [blame] | 979 | if ((CE_id == HIF_PCI_IPA_UC_ASSIGNED_CE) && |
| 980 | !ce_srng_based(scn)) { |
| 981 | if (scn->ipa_ce_ring) { |
| 982 | qdf_mem_shared_mem_free(scn->qdf_dev, |
| 983 | scn->ipa_ce_ring); |
| 984 | scn->ipa_ce_ring = NULL; |
| 985 | } |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 986 | ce_ring->base_addr_owner_space_unaligned = NULL; |
| 987 | } else { |
| 988 | qdf_mem_free_consistent(scn->qdf_dev, scn->qdf_dev->dev, |
| 989 | ce_ring->nentries * desc_size + CE_DESC_RING_ALIGN, |
| 990 | ce_ring->base_addr_owner_space_unaligned, |
| 991 | ce_ring->base_addr_CE_space, 0); |
| 992 | ce_ring->base_addr_owner_space_unaligned = NULL; |
| 993 | } |
| 994 | } |
| 995 | #else |
| 996 | static QDF_STATUS ce_alloc_desc_ring(struct hif_softc *scn, unsigned int CE_id, |
| 997 | qdf_dma_addr_t *base_addr, |
| 998 | struct CE_ring_state *ce_ring, |
| 999 | unsigned int nentries, uint32_t desc_size) |
| 1000 | { |
| 1001 | ce_ring->base_addr_owner_space_unaligned = |
| 1002 | qdf_mem_alloc_consistent(scn->qdf_dev, scn->qdf_dev->dev, |
| 1003 | (nentries * desc_size + |
| 1004 | CE_DESC_RING_ALIGN), base_addr); |
| 1005 | if (!ce_ring->base_addr_owner_space_unaligned) { |
| 1006 | HIF_ERROR("%s: Failed to allocate DMA memory for ce ring id : %u", |
| 1007 | __func__, CE_id); |
| 1008 | return QDF_STATUS_E_NOMEM; |
| 1009 | } |
| 1010 | return QDF_STATUS_SUCCESS; |
| 1011 | } |
| 1012 | |
| 1013 | static void ce_free_desc_ring(struct hif_softc *scn, unsigned int CE_id, |
| 1014 | struct CE_ring_state *ce_ring, uint32_t desc_size) |
| 1015 | { |
| 1016 | qdf_mem_free_consistent(scn->qdf_dev, scn->qdf_dev->dev, |
| 1017 | ce_ring->nentries * desc_size + CE_DESC_RING_ALIGN, |
| 1018 | ce_ring->base_addr_owner_space_unaligned, |
| 1019 | ce_ring->base_addr_CE_space, 0); |
| 1020 | ce_ring->base_addr_owner_space_unaligned = NULL; |
| 1021 | } |
| 1022 | #endif /* IPA_OFFLOAD */ |
| 1023 | |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 1024 | /* |
| 1025 | * TODO: Need to explore the possibility of having this as part of a |
| 1026 | * target context instead of a global array. |
| 1027 | */ |
| 1028 | static struct ce_ops* (*ce_attach_register[CE_MAX_TARGET_TYPE])(void); |
| 1029 | |
| 1030 | void ce_service_register_module(enum ce_target_type target_type, |
| 1031 | struct ce_ops* (*ce_attach)(void)) |
| 1032 | { |
| 1033 | if (target_type < CE_MAX_TARGET_TYPE) |
| 1034 | ce_attach_register[target_type] = ce_attach; |
| 1035 | } |
| 1036 | |
| 1037 | qdf_export_symbol(ce_service_register_module); |
| 1038 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1039 | /** |
| 1040 | * ce_srng_based() - Does this target use srng |
| 1041 | * @ce_state : pointer to the state context of the CE |
| 1042 | * |
| 1043 | * Description: |
| 1044 | * returns true if the target is SRNG based |
| 1045 | * |
| 1046 | * Return: |
| 1047 | * false (attribute set to false) |
| 1048 | * true (attribute set to true); |
| 1049 | */ |
| 1050 | bool ce_srng_based(struct hif_softc *scn) |
| 1051 | { |
| 1052 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
| 1053 | struct hif_target_info *tgt_info = hif_get_target_info_handle(hif_hdl); |
| 1054 | |
| 1055 | switch (tgt_info->target_type) { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1056 | case TARGET_TYPE_QCA8074: |
Venkateswara Swamy Bandaru | dbacd5e | 2018-08-07 13:01:50 +0530 | [diff] [blame] | 1057 | case TARGET_TYPE_QCA8074V2: |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 1058 | case TARGET_TYPE_QCA6290: |
Venkata Sharath Chandra Manchala | 79860aa | 2018-06-12 15:16:36 -0700 | [diff] [blame] | 1059 | case TARGET_TYPE_QCA6390: |
Mohit Khanna | 973308a | 2019-05-13 18:31:33 -0700 | [diff] [blame^] | 1060 | case TARGET_TYPE_QCA6490: |
Basamma Yakkanahalli | 5f7cfd4 | 2018-11-02 15:52:37 +0530 | [diff] [blame] | 1061 | case TARGET_TYPE_QCA6018: |
Nandha Kishore Easwaran | 5d3475b | 2019-06-27 11:38:53 +0530 | [diff] [blame] | 1062 | case TARGET_TYPE_QCN9000: |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1063 | return true; |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1064 | default: |
| 1065 | return false; |
| 1066 | } |
| 1067 | return false; |
| 1068 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 1069 | qdf_export_symbol(ce_srng_based); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1070 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 1071 | #ifdef QCA_WIFI_SUPPORT_SRNG |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1072 | static struct ce_ops *ce_services_attach(struct hif_softc *scn) |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1073 | { |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 1074 | struct ce_ops *ops = NULL; |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1075 | |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 1076 | if (ce_srng_based(scn)) { |
| 1077 | if (ce_attach_register[CE_SVC_SRNG]) |
| 1078 | ops = ce_attach_register[CE_SVC_SRNG](); |
| 1079 | } else if (ce_attach_register[CE_SVC_LEGACY]) { |
| 1080 | ops = ce_attach_register[CE_SVC_LEGACY](); |
| 1081 | } |
| 1082 | |
| 1083 | return ops; |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1084 | } |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 1085 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 1086 | |
Venkata Sharath Chandra Manchala | 837d323 | 2017-01-18 15:11:56 -0800 | [diff] [blame] | 1087 | #else /* QCA_LITHIUM */ |
| 1088 | static struct ce_ops *ce_services_attach(struct hif_softc *scn) |
| 1089 | { |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 1090 | if (ce_attach_register[CE_SVC_LEGACY]) |
| 1091 | return ce_attach_register[CE_SVC_LEGACY](); |
| 1092 | |
| 1093 | return NULL; |
Venkata Sharath Chandra Manchala | 837d323 | 2017-01-18 15:11:56 -0800 | [diff] [blame] | 1094 | } |
| 1095 | #endif /* QCA_LITHIUM */ |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1096 | |
Houston Hoffman | 403c2df | 2017-01-27 12:51:15 -0800 | [diff] [blame] | 1097 | static void hif_prepare_hal_shadow_register_cfg(struct hif_softc *scn, |
Houston Hoffman | 10fedfc | 2017-01-23 15:23:09 -0800 | [diff] [blame] | 1098 | struct pld_shadow_reg_v2_cfg **shadow_config, |
| 1099 | int *num_shadow_registers_configured) { |
| 1100 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 1101 | |
| 1102 | return hif_state->ce_services->ce_prepare_shadow_register_v2_cfg( |
| 1103 | scn, shadow_config, num_shadow_registers_configured); |
| 1104 | } |
| 1105 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1106 | static inline uint32_t ce_get_desc_size(struct hif_softc *scn, |
| 1107 | uint8_t ring_type) |
| 1108 | { |
| 1109 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 1110 | |
| 1111 | return hif_state->ce_services->ce_get_desc_size(ring_type); |
| 1112 | } |
| 1113 | |
| 1114 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1115 | static struct CE_ring_state *ce_alloc_ring_state(struct CE_state *CE_state, |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1116 | uint8_t ring_type, uint32_t nentries) |
| 1117 | { |
| 1118 | uint32_t ce_nbytes; |
| 1119 | char *ptr; |
| 1120 | qdf_dma_addr_t base_addr; |
| 1121 | struct CE_ring_state *ce_ring; |
| 1122 | uint32_t desc_size; |
| 1123 | struct hif_softc *scn = CE_state->scn; |
| 1124 | |
| 1125 | ce_nbytes = sizeof(struct CE_ring_state) |
| 1126 | + (nentries * sizeof(void *)); |
| 1127 | ptr = qdf_mem_malloc(ce_nbytes); |
| 1128 | if (!ptr) |
| 1129 | return NULL; |
| 1130 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1131 | ce_ring = (struct CE_ring_state *)ptr; |
| 1132 | ptr += sizeof(struct CE_ring_state); |
| 1133 | ce_ring->nentries = nentries; |
| 1134 | ce_ring->nentries_mask = nentries - 1; |
| 1135 | |
| 1136 | ce_ring->low_water_mark_nentries = 0; |
| 1137 | ce_ring->high_water_mark_nentries = nentries; |
| 1138 | ce_ring->per_transfer_context = (void **)ptr; |
| 1139 | |
| 1140 | desc_size = ce_get_desc_size(scn, ring_type); |
| 1141 | |
| 1142 | /* Legacy platforms that do not support cache |
| 1143 | * coherent DMA are unsupported |
| 1144 | */ |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 1145 | if (ce_alloc_desc_ring(scn, CE_state->id, &base_addr, |
| 1146 | ce_ring, nentries, |
| 1147 | desc_size) != |
| 1148 | QDF_STATUS_SUCCESS) { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1149 | HIF_ERROR("%s: ring has no DMA mem", |
| 1150 | __func__); |
Alok Kumar | fea70e3 | 2018-09-21 15:42:06 +0530 | [diff] [blame] | 1151 | qdf_mem_free(ce_ring); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1152 | return NULL; |
| 1153 | } |
| 1154 | ce_ring->base_addr_CE_space_unaligned = base_addr; |
| 1155 | |
| 1156 | /* Correctly initialize memory to 0 to |
| 1157 | * prevent garbage data crashing system |
| 1158 | * when download firmware |
| 1159 | */ |
| 1160 | qdf_mem_zero(ce_ring->base_addr_owner_space_unaligned, |
| 1161 | nentries * desc_size + |
| 1162 | CE_DESC_RING_ALIGN); |
| 1163 | |
| 1164 | if (ce_ring->base_addr_CE_space_unaligned & (CE_DESC_RING_ALIGN - 1)) { |
| 1165 | |
| 1166 | ce_ring->base_addr_CE_space = |
| 1167 | (ce_ring->base_addr_CE_space_unaligned + |
| 1168 | CE_DESC_RING_ALIGN - 1) & ~(CE_DESC_RING_ALIGN - 1); |
| 1169 | |
| 1170 | ce_ring->base_addr_owner_space = (void *) |
| 1171 | (((size_t) ce_ring->base_addr_owner_space_unaligned + |
| 1172 | CE_DESC_RING_ALIGN - 1) & ~(CE_DESC_RING_ALIGN - 1)); |
| 1173 | } else { |
| 1174 | ce_ring->base_addr_CE_space = |
| 1175 | ce_ring->base_addr_CE_space_unaligned; |
| 1176 | ce_ring->base_addr_owner_space = |
| 1177 | ce_ring->base_addr_owner_space_unaligned; |
| 1178 | } |
| 1179 | |
| 1180 | return ce_ring; |
| 1181 | } |
| 1182 | |
Yun Park | 3fb3644 | 2017-08-17 17:37:53 -0700 | [diff] [blame] | 1183 | static int ce_ring_setup(struct hif_softc *scn, uint8_t ring_type, |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1184 | uint32_t ce_id, struct CE_ring_state *ring, |
| 1185 | struct CE_attr *attr) |
| 1186 | { |
| 1187 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 1188 | |
Yun Park | 3fb3644 | 2017-08-17 17:37:53 -0700 | [diff] [blame] | 1189 | return hif_state->ce_services->ce_ring_setup(scn, ring_type, ce_id, |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1190 | ring, attr); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1191 | } |
| 1192 | |
Houston Hoffman | cbcd839 | 2017-02-08 17:43:13 -0800 | [diff] [blame] | 1193 | int hif_ce_bus_early_suspend(struct hif_softc *scn) |
| 1194 | { |
| 1195 | uint8_t ul_pipe, dl_pipe; |
| 1196 | int ce_id, status, ul_is_polled, dl_is_polled; |
| 1197 | struct CE_state *ce_state; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1198 | |
Houston Hoffman | cbcd839 | 2017-02-08 17:43:13 -0800 | [diff] [blame] | 1199 | status = hif_map_service_to_pipe(&scn->osc, WMI_CONTROL_SVC, |
| 1200 | &ul_pipe, &dl_pipe, |
| 1201 | &ul_is_polled, &dl_is_polled); |
| 1202 | if (status) { |
| 1203 | HIF_ERROR("%s: pipe_mapping failure", __func__); |
| 1204 | return status; |
| 1205 | } |
| 1206 | |
| 1207 | for (ce_id = 0; ce_id < scn->ce_count; ce_id++) { |
| 1208 | if (ce_id == ul_pipe) |
| 1209 | continue; |
| 1210 | if (ce_id == dl_pipe) |
| 1211 | continue; |
| 1212 | |
| 1213 | ce_state = scn->ce_id_to_state[ce_id]; |
| 1214 | qdf_spin_lock_bh(&ce_state->ce_index_lock); |
| 1215 | if (ce_state->state == CE_RUNNING) |
| 1216 | ce_state->state = CE_PAUSED; |
| 1217 | qdf_spin_unlock_bh(&ce_state->ce_index_lock); |
| 1218 | } |
| 1219 | |
| 1220 | return status; |
| 1221 | } |
| 1222 | |
| 1223 | int hif_ce_bus_late_resume(struct hif_softc *scn) |
| 1224 | { |
| 1225 | int ce_id; |
| 1226 | struct CE_state *ce_state; |
Nirav Shah | eeb9962 | 2018-09-11 13:50:08 +0530 | [diff] [blame] | 1227 | int write_index = 0; |
Houston Hoffman | cbcd839 | 2017-02-08 17:43:13 -0800 | [diff] [blame] | 1228 | bool index_updated; |
| 1229 | |
| 1230 | for (ce_id = 0; ce_id < scn->ce_count; ce_id++) { |
| 1231 | ce_state = scn->ce_id_to_state[ce_id]; |
| 1232 | qdf_spin_lock_bh(&ce_state->ce_index_lock); |
| 1233 | if (ce_state->state == CE_PENDING) { |
| 1234 | write_index = ce_state->src_ring->write_index; |
| 1235 | CE_SRC_RING_WRITE_IDX_SET(scn, ce_state->ctrl_addr, |
| 1236 | write_index); |
| 1237 | ce_state->state = CE_RUNNING; |
| 1238 | index_updated = true; |
| 1239 | } else { |
| 1240 | index_updated = false; |
| 1241 | } |
| 1242 | |
| 1243 | if (ce_state->state == CE_PAUSED) |
| 1244 | ce_state->state = CE_RUNNING; |
| 1245 | qdf_spin_unlock_bh(&ce_state->ce_index_lock); |
| 1246 | |
| 1247 | if (index_updated) |
| 1248 | hif_record_ce_desc_event(scn, ce_id, |
| 1249 | RESUME_WRITE_INDEX_UPDATE, |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1250 | NULL, NULL, write_index, 0); |
Houston Hoffman | cbcd839 | 2017-02-08 17:43:13 -0800 | [diff] [blame] | 1251 | } |
| 1252 | |
| 1253 | return 0; |
| 1254 | } |
| 1255 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 1256 | /** |
| 1257 | * ce_oom_recovery() - try to recover rx ce from oom condition |
| 1258 | * @context: CE_state of the CE with oom rx ring |
| 1259 | * |
Jeff Johnson | 1002ca5 | 2018-05-12 11:29:24 -0700 | [diff] [blame] | 1260 | * the executing work Will continue to be rescheduled until |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 1261 | * at least 1 descriptor is successfully posted to the rx ring. |
| 1262 | * |
| 1263 | * return: none |
| 1264 | */ |
| 1265 | static void ce_oom_recovery(void *context) |
| 1266 | { |
| 1267 | struct CE_state *ce_state = context; |
| 1268 | struct hif_softc *scn = ce_state->scn; |
| 1269 | struct HIF_CE_state *ce_softc = HIF_GET_CE_STATE(scn); |
| 1270 | struct HIF_CE_pipe_info *pipe_info = |
| 1271 | &ce_softc->pipe_info[ce_state->id]; |
| 1272 | |
| 1273 | hif_post_recv_buffers_for_pipe(pipe_info); |
| 1274 | } |
| 1275 | |
Pavankumar Nandeshwar | 7eddedd | 2018-10-25 16:57:08 +0530 | [diff] [blame] | 1276 | #ifdef HIF_CE_DEBUG_DATA_BUF |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1277 | /** |
| 1278 | * alloc_mem_ce_debug_hist_data() - Allocate mem for the data pointed by |
| 1279 | * the CE descriptors. |
| 1280 | * Allocate HIF_CE_HISTORY_MAX records by CE_DEBUG_MAX_DATA_BUF_SIZE |
| 1281 | * @scn: hif scn handle |
| 1282 | * ce_id: Copy Engine Id |
| 1283 | * |
| 1284 | * Return: QDF_STATUS |
| 1285 | */ |
| 1286 | QDF_STATUS alloc_mem_ce_debug_hist_data(struct hif_softc *scn, uint32_t ce_id) |
| 1287 | { |
| 1288 | struct hif_ce_desc_event *event = NULL; |
| 1289 | struct hif_ce_desc_event *hist_ev = NULL; |
| 1290 | uint32_t index = 0; |
| 1291 | |
| 1292 | hist_ev = |
| 1293 | (struct hif_ce_desc_event *)scn->hif_ce_desc_hist.hist_ev[ce_id]; |
| 1294 | |
| 1295 | if (!hist_ev) |
| 1296 | return QDF_STATUS_E_NOMEM; |
| 1297 | |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1298 | scn->hif_ce_desc_hist.data_enable[ce_id] = true; |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1299 | for (index = 0; index < HIF_CE_HISTORY_MAX; index++) { |
| 1300 | event = &hist_ev[index]; |
| 1301 | event->data = |
| 1302 | (uint8_t *)qdf_mem_malloc(CE_DEBUG_MAX_DATA_BUF_SIZE); |
Venkata Sharath Chandra Manchala | 34a2ef6 | 2019-10-05 02:30:19 -0700 | [diff] [blame] | 1303 | if (!event->data) { |
| 1304 | hif_err_rl("ce debug data alloc failed"); |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1305 | return QDF_STATUS_E_NOMEM; |
Venkata Sharath Chandra Manchala | 34a2ef6 | 2019-10-05 02:30:19 -0700 | [diff] [blame] | 1306 | } |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1307 | } |
| 1308 | return QDF_STATUS_SUCCESS; |
| 1309 | } |
| 1310 | |
| 1311 | /** |
| 1312 | * free_mem_ce_debug_hist_data() - Free mem of the data pointed by |
| 1313 | * the CE descriptors. |
| 1314 | * @scn: hif scn handle |
| 1315 | * ce_id: Copy Engine Id |
| 1316 | * |
| 1317 | * Return: |
| 1318 | */ |
| 1319 | void free_mem_ce_debug_hist_data(struct hif_softc *scn, uint32_t ce_id) |
| 1320 | { |
| 1321 | struct hif_ce_desc_event *event = NULL; |
| 1322 | struct hif_ce_desc_event *hist_ev = NULL; |
| 1323 | uint32_t index = 0; |
| 1324 | |
| 1325 | hist_ev = |
| 1326 | (struct hif_ce_desc_event *)scn->hif_ce_desc_hist.hist_ev[ce_id]; |
| 1327 | |
| 1328 | if (!hist_ev) |
| 1329 | return; |
| 1330 | |
| 1331 | for (index = 0; index < HIF_CE_HISTORY_MAX; index++) { |
| 1332 | event = &hist_ev[index]; |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 1333 | if (event->data) |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1334 | qdf_mem_free(event->data); |
| 1335 | event->data = NULL; |
| 1336 | event = NULL; |
| 1337 | } |
Venkata Sharath Chandra Manchala | 34a2ef6 | 2019-10-05 02:30:19 -0700 | [diff] [blame] | 1338 | |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1339 | } |
| 1340 | #endif /* HIF_CE_DEBUG_DATA_BUF */ |
| 1341 | |
Akshay Kosigi | af98d7c | 2019-04-08 17:50:05 +0530 | [diff] [blame] | 1342 | #ifndef HIF_CE_DEBUG_DATA_DYNAMIC_BUF |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1343 | #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1344 | struct hif_ce_desc_event hif_ce_desc_history[CE_COUNT_MAX][HIF_CE_HISTORY_MAX]; |
| 1345 | |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1346 | /** |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1347 | * alloc_mem_ce_debug_history() - Allocate CE descriptor history |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1348 | * @scn: hif scn handle |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1349 | * @ce_id: Copy Engine Id |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1350 | * @src_nentries: source ce ring entries |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1351 | * Return: QDF_STATUS |
| 1352 | */ |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1353 | static QDF_STATUS |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1354 | alloc_mem_ce_debug_history(struct hif_softc *scn, unsigned int ce_id, |
| 1355 | uint32_t src_nentries) |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1356 | { |
| 1357 | struct ce_desc_hist *ce_hist = &scn->hif_ce_desc_hist; |
| 1358 | |
| 1359 | ce_hist->hist_ev[ce_id] = hif_ce_desc_history[ce_id]; |
| 1360 | ce_hist->enable[ce_id] = 1; |
| 1361 | |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1362 | if (src_nentries) |
| 1363 | alloc_mem_ce_debug_hist_data(scn, ce_id); |
| 1364 | else |
| 1365 | ce_hist->data_enable[ce_id] = false; |
| 1366 | |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1367 | return QDF_STATUS_SUCCESS; |
| 1368 | } |
| 1369 | |
| 1370 | /** |
| 1371 | * free_mem_ce_debug_history() - Free CE descriptor history |
| 1372 | * @scn: hif scn handle |
| 1373 | * @ce_id: Copy Engine Id |
| 1374 | * |
| 1375 | * Return: None |
| 1376 | */ |
| 1377 | static void free_mem_ce_debug_history(struct hif_softc *scn, unsigned int ce_id) |
| 1378 | { |
| 1379 | struct ce_desc_hist *ce_hist = &scn->hif_ce_desc_hist; |
| 1380 | |
| 1381 | ce_hist->enable[ce_id] = 0; |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1382 | if (ce_hist->data_enable[ce_id]) { |
| 1383 | ce_hist->data_enable[ce_id] = false; |
| 1384 | free_mem_ce_debug_hist_data(scn, ce_id); |
| 1385 | } |
Venkata Sharath Chandra Manchala | 34a2ef6 | 2019-10-05 02:30:19 -0700 | [diff] [blame] | 1386 | ce_hist->hist_ev[ce_id] = NULL; |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1387 | } |
| 1388 | #else |
| 1389 | static inline QDF_STATUS |
| 1390 | alloc_mem_ce_debug_history(struct hif_softc *scn, unsigned int CE_id, |
| 1391 | uint32_t src_nentries) |
| 1392 | { |
| 1393 | return QDF_STATUS_SUCCESS; |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1394 | } |
| 1395 | |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1396 | static inline void |
| 1397 | free_mem_ce_debug_history(struct hif_softc *scn, unsigned int CE_id) { } |
| 1398 | #endif /* (HIF_CONFIG_SLUB_DEBUG_ON) || (HIF_CE_DEBUG_DATA_BUF) */ |
Akshay Kosigi | af98d7c | 2019-04-08 17:50:05 +0530 | [diff] [blame] | 1399 | #else |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1400 | #if defined(HIF_CE_DEBUG_DATA_BUF) |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1401 | |
| 1402 | static QDF_STATUS |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1403 | alloc_mem_ce_debug_history(struct hif_softc *scn, unsigned int CE_id, |
| 1404 | uint32_t src_nentries) |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1405 | { |
| 1406 | scn->hif_ce_desc_hist.hist_ev[CE_id] = (struct hif_ce_desc_event *) |
| 1407 | qdf_mem_malloc(HIF_CE_HISTORY_MAX * sizeof(struct hif_ce_desc_event)); |
| 1408 | |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 1409 | if (!scn->hif_ce_desc_hist.hist_ev[CE_id]) { |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1410 | scn->hif_ce_desc_hist.enable[CE_id] = 0; |
| 1411 | return QDF_STATUS_E_NOMEM; |
| 1412 | } else { |
| 1413 | scn->hif_ce_desc_hist.enable[CE_id] = 1; |
| 1414 | return QDF_STATUS_SUCCESS; |
| 1415 | } |
| 1416 | } |
| 1417 | |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1418 | static void free_mem_ce_debug_history(struct hif_softc *scn, unsigned int CE_id) |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1419 | { |
| 1420 | struct ce_desc_hist *ce_hist = &scn->hif_ce_desc_hist; |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1421 | struct hif_ce_desc_event *hist_ev = ce_hist->hist_ev[CE_id]; |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1422 | |
| 1423 | if (!hist_ev) |
| 1424 | return; |
| 1425 | |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1426 | if (ce_hist->data_enable[CE_id]) { |
| 1427 | ce_hist->data_enable[CE_id] = false; |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1428 | free_mem_ce_debug_hist_data(scn, CE_id); |
| 1429 | } |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1430 | |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1431 | ce_hist->enable[CE_id] = 0; |
| 1432 | qdf_mem_free(ce_hist->hist_ev[CE_id]); |
| 1433 | ce_hist->hist_ev[CE_id] = NULL; |
| 1434 | } |
| 1435 | |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1436 | #else |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1437 | |
| 1438 | static inline QDF_STATUS |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1439 | alloc_mem_ce_debug_history(struct hif_softc *scn, unsigned int CE_id, |
| 1440 | uint32_t src_nentries) |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1441 | { |
| 1442 | return QDF_STATUS_SUCCESS; |
| 1443 | } |
| 1444 | |
| 1445 | static inline void |
| 1446 | free_mem_ce_debug_history(struct hif_softc *scn, unsigned int CE_id) { } |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1447 | #endif /* HIF_CE_DEBUG_DATA_BUF */ |
Akshay Kosigi | af98d7c | 2019-04-08 17:50:05 +0530 | [diff] [blame] | 1448 | #endif /* HIF_CE_DEBUG_DATA_DYNAMIC_BUF */ |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1449 | |
Pavankumar Nandeshwar | 7eddedd | 2018-10-25 16:57:08 +0530 | [diff] [blame] | 1450 | #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1451 | /** |
| 1452 | * reset_ce_debug_history() - reset the index and ce id used for dumping the |
| 1453 | * CE records on the console using sysfs. |
| 1454 | * @scn: hif scn handle |
| 1455 | * |
| 1456 | * Return: |
| 1457 | */ |
| 1458 | static inline void reset_ce_debug_history(struct hif_softc *scn) |
| 1459 | { |
| 1460 | struct ce_desc_hist *ce_hist = &scn->hif_ce_desc_hist; |
| 1461 | /* Initialise the CE debug history sysfs interface inputs ce_id and |
| 1462 | * index. Disable data storing |
| 1463 | */ |
| 1464 | ce_hist->hist_index = 0; |
| 1465 | ce_hist->hist_id = 0; |
| 1466 | } |
Pavankumar Nandeshwar | 7eddedd | 2018-10-25 16:57:08 +0530 | [diff] [blame] | 1467 | #else /* defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) */ |
Dustin Brown | 2f75087 | 2018-10-17 12:16:20 -0700 | [diff] [blame] | 1468 | static inline void reset_ce_debug_history(struct hif_softc *scn) { } |
Pavankumar Nandeshwar | 7eddedd | 2018-10-25 16:57:08 +0530 | [diff] [blame] | 1469 | #endif /*defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) */ |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1470 | |
Nandha Kishore Easwaran | 7cdaae2 | 2018-07-30 15:02:51 +0530 | [diff] [blame] | 1471 | void ce_enable_polling(void *cestate) |
| 1472 | { |
| 1473 | struct CE_state *CE_state = (struct CE_state *)cestate; |
| 1474 | |
| 1475 | if (CE_state && CE_state->attr_flags & CE_ATTR_ENABLE_POLL) |
| 1476 | CE_state->timer_inited = true; |
| 1477 | } |
| 1478 | |
| 1479 | void ce_disable_polling(void *cestate) |
| 1480 | { |
| 1481 | struct CE_state *CE_state = (struct CE_state *)cestate; |
| 1482 | |
| 1483 | if (CE_state && CE_state->attr_flags & CE_ATTR_ENABLE_POLL) |
| 1484 | CE_state->timer_inited = false; |
| 1485 | } |
| 1486 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1487 | /* |
| 1488 | * Initialize a Copy Engine based on caller-supplied attributes. |
| 1489 | * This may be called once to initialize both source and destination |
| 1490 | * rings or it may be called twice for separate source and destination |
| 1491 | * initialization. It may be that only one side or the other is |
| 1492 | * initialized by software/firmware. |
Houston Hoffman | 233e909 | 2015-09-02 13:37:21 -0700 | [diff] [blame] | 1493 | * |
| 1494 | * This should be called durring the initialization sequence before |
| 1495 | * interupts are enabled, so we don't have to worry about thread safety. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1496 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1497 | struct CE_handle *ce_init(struct hif_softc *scn, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1498 | unsigned int CE_id, struct CE_attr *attr) |
| 1499 | { |
| 1500 | struct CE_state *CE_state; |
| 1501 | uint32_t ctrl_addr; |
| 1502 | unsigned int nentries; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1503 | bool malloc_CE_state = false; |
| 1504 | bool malloc_src_ring = false; |
Yun Park | 3fb3644 | 2017-08-17 17:37:53 -0700 | [diff] [blame] | 1505 | int status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1506 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1507 | QDF_ASSERT(CE_id < scn->ce_count); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1508 | ctrl_addr = CE_BASE_ADDRESS(CE_id); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1509 | CE_state = scn->ce_id_to_state[CE_id]; |
| 1510 | |
| 1511 | if (!CE_state) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1512 | CE_state = |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1513 | (struct CE_state *)qdf_mem_malloc(sizeof(*CE_state)); |
Madhvapathi Sriram | bfb0112 | 2019-01-07 09:17:29 +0530 | [diff] [blame] | 1514 | if (!CE_state) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1515 | return NULL; |
Madhvapathi Sriram | bfb0112 | 2019-01-07 09:17:29 +0530 | [diff] [blame] | 1516 | |
Houston Hoffman | 233e909 | 2015-09-02 13:37:21 -0700 | [diff] [blame] | 1517 | malloc_CE_state = true; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1518 | qdf_spinlock_create(&CE_state->ce_index_lock); |
Houston Hoffman | 233e909 | 2015-09-02 13:37:21 -0700 | [diff] [blame] | 1519 | |
| 1520 | CE_state->id = CE_id; |
| 1521 | CE_state->ctrl_addr = ctrl_addr; |
| 1522 | CE_state->state = CE_RUNNING; |
| 1523 | CE_state->attr_flags = attr->flags; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1524 | } |
| 1525 | CE_state->scn = scn; |
Aditya Sathish | 80bbaef | 2018-10-25 10:02:05 +0530 | [diff] [blame] | 1526 | CE_state->service = ce_engine_service_reg; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1527 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1528 | qdf_atomic_init(&CE_state->rx_pending); |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 1529 | if (!attr) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1530 | /* Already initialized; caller wants the handle */ |
| 1531 | return (struct CE_handle *)CE_state; |
| 1532 | } |
| 1533 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1534 | if (CE_state->src_sz_max) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1535 | QDF_ASSERT(CE_state->src_sz_max == attr->src_sz_max); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1536 | else |
| 1537 | CE_state->src_sz_max = attr->src_sz_max; |
| 1538 | |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1539 | ce_init_ce_desc_event_log(scn, CE_id, |
| 1540 | attr->src_nentries + attr->dest_nentries); |
Houston Hoffman | 68e837e | 2015-12-04 12:57:24 -0800 | [diff] [blame] | 1541 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1542 | /* source ring setup */ |
| 1543 | nentries = attr->src_nentries; |
| 1544 | if (nentries) { |
| 1545 | struct CE_ring_state *src_ring; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1546 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1547 | nentries = roundup_pwr2(nentries); |
| 1548 | if (CE_state->src_ring) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1549 | QDF_ASSERT(CE_state->src_ring->nentries == nentries); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1550 | } else { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1551 | src_ring = CE_state->src_ring = |
| 1552 | ce_alloc_ring_state(CE_state, |
| 1553 | CE_RING_SRC, |
| 1554 | nentries); |
| 1555 | if (!src_ring) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1556 | /* cannot allocate src ring. If the |
| 1557 | * CE_state is allocated locally free |
| 1558 | * CE_State and return error. |
| 1559 | */ |
| 1560 | HIF_ERROR("%s: src ring has no mem", __func__); |
| 1561 | if (malloc_CE_state) { |
| 1562 | /* allocated CE_state locally */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1563 | qdf_mem_free(CE_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1564 | malloc_CE_state = false; |
| 1565 | } |
| 1566 | return NULL; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1567 | } |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1568 | /* we can allocate src ring. Mark that the src ring is |
| 1569 | * allocated locally |
| 1570 | */ |
| 1571 | malloc_src_ring = true; |
| 1572 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1573 | /* |
| 1574 | * Also allocate a shadow src ring in |
| 1575 | * regular mem to use for faster access. |
| 1576 | */ |
| 1577 | src_ring->shadow_base_unaligned = |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1578 | qdf_mem_malloc(nentries * |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1579 | sizeof(struct CE_src_desc) + |
| 1580 | CE_DESC_RING_ALIGN); |
Madhvapathi Sriram | bfb0112 | 2019-01-07 09:17:29 +0530 | [diff] [blame] | 1581 | if (!src_ring->shadow_base_unaligned) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1582 | goto error_no_dma_mem; |
Madhvapathi Sriram | bfb0112 | 2019-01-07 09:17:29 +0530 | [diff] [blame] | 1583 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1584 | src_ring->shadow_base = (struct CE_src_desc *) |
| 1585 | (((size_t) src_ring->shadow_base_unaligned + |
| 1586 | CE_DESC_RING_ALIGN - 1) & |
| 1587 | ~(CE_DESC_RING_ALIGN - 1)); |
| 1588 | |
Yun Park | 3fb3644 | 2017-08-17 17:37:53 -0700 | [diff] [blame] | 1589 | status = ce_ring_setup(scn, CE_RING_SRC, CE_id, |
| 1590 | src_ring, attr); |
| 1591 | if (status < 0) |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1592 | goto error_target_access; |
Houston Hoffman | f789c66 | 2016-04-12 15:39:04 -0700 | [diff] [blame] | 1593 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1594 | ce_ring_test_initial_indexes(CE_id, src_ring, |
| 1595 | "src_ring"); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1596 | } |
| 1597 | } |
| 1598 | |
| 1599 | /* destination ring setup */ |
| 1600 | nentries = attr->dest_nentries; |
| 1601 | if (nentries) { |
| 1602 | struct CE_ring_state *dest_ring; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1603 | |
| 1604 | nentries = roundup_pwr2(nentries); |
| 1605 | if (CE_state->dest_ring) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1606 | QDF_ASSERT(CE_state->dest_ring->nentries == nentries); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1607 | } else { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1608 | dest_ring = CE_state->dest_ring = |
| 1609 | ce_alloc_ring_state(CE_state, |
| 1610 | CE_RING_DEST, |
| 1611 | nentries); |
| 1612 | if (!dest_ring) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1613 | /* cannot allocate dst ring. If the CE_state |
| 1614 | * or src ring is allocated locally free |
| 1615 | * CE_State and src ring and return error. |
| 1616 | */ |
| 1617 | HIF_ERROR("%s: dest ring has no mem", |
| 1618 | __func__); |
Poddar, Siddarth | 55d6da0 | 2017-03-31 18:42:54 +0530 | [diff] [blame] | 1619 | goto error_no_dma_mem; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1620 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1621 | |
Yun Park | 3fb3644 | 2017-08-17 17:37:53 -0700 | [diff] [blame] | 1622 | status = ce_ring_setup(scn, CE_RING_DEST, CE_id, |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1623 | dest_ring, attr); |
Yun Park | 3fb3644 | 2017-08-17 17:37:53 -0700 | [diff] [blame] | 1624 | if (status < 0) |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1625 | goto error_target_access; |
Houston Hoffman | 4780817 | 2016-05-06 10:04:21 -0700 | [diff] [blame] | 1626 | |
| 1627 | ce_ring_test_initial_indexes(CE_id, dest_ring, |
| 1628 | "dest_ring"); |
| 1629 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1630 | /* For srng based target, init status ring here */ |
| 1631 | if (ce_srng_based(CE_state->scn)) { |
| 1632 | CE_state->status_ring = |
| 1633 | ce_alloc_ring_state(CE_state, |
| 1634 | CE_RING_STATUS, |
| 1635 | nentries); |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 1636 | if (!CE_state->status_ring) { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1637 | /*Allocation failed. Cleanup*/ |
| 1638 | qdf_mem_free(CE_state->dest_ring); |
| 1639 | if (malloc_src_ring) { |
| 1640 | qdf_mem_free |
| 1641 | (CE_state->src_ring); |
| 1642 | CE_state->src_ring = NULL; |
| 1643 | malloc_src_ring = false; |
| 1644 | } |
| 1645 | if (malloc_CE_state) { |
| 1646 | /* allocated CE_state locally */ |
| 1647 | scn->ce_id_to_state[CE_id] = |
| 1648 | NULL; |
| 1649 | qdf_mem_free(CE_state); |
| 1650 | malloc_CE_state = false; |
| 1651 | } |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1652 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1653 | return NULL; |
| 1654 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1655 | |
Yun Park | 3fb3644 | 2017-08-17 17:37:53 -0700 | [diff] [blame] | 1656 | status = ce_ring_setup(scn, CE_RING_STATUS, |
| 1657 | CE_id, CE_state->status_ring, |
| 1658 | attr); |
| 1659 | if (status < 0) |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1660 | goto error_target_access; |
| 1661 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1662 | } |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 1663 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1664 | /* epping */ |
| 1665 | /* poll timer */ |
Nandha Kishore Easwaran | 7cdaae2 | 2018-07-30 15:02:51 +0530 | [diff] [blame] | 1666 | if (CE_state->attr_flags & CE_ATTR_ENABLE_POLL) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1667 | qdf_timer_init(scn->qdf_dev, |
Nandha Kishore Easwaran | 7cdaae2 | 2018-07-30 15:02:51 +0530 | [diff] [blame] | 1668 | &CE_state->poll_timer, |
| 1669 | ce_poll_timeout, |
| 1670 | CE_state, |
| 1671 | QDF_TIMER_TYPE_WAKE_APPS); |
| 1672 | ce_enable_polling(CE_state); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1673 | qdf_timer_mod(&CE_state->poll_timer, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1674 | CE_POLL_TIMEOUT); |
| 1675 | } |
| 1676 | } |
| 1677 | } |
| 1678 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1679 | if (!ce_srng_based(scn)) { |
| 1680 | /* Enable CE error interrupts */ |
| 1681 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 1682 | goto error_target_access; |
| 1683 | CE_ERROR_INTR_ENABLE(scn, ctrl_addr); |
| 1684 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 1685 | goto error_target_access; |
| 1686 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1687 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 1688 | qdf_create_work(scn->qdf_dev, &CE_state->oom_allocation_work, |
| 1689 | ce_oom_recovery, CE_state); |
| 1690 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 1691 | /* update the htt_data attribute */ |
| 1692 | ce_mark_datapath(CE_state); |
Houston Hoffman | b01db18 | 2017-03-13 14:38:09 -0700 | [diff] [blame] | 1693 | scn->ce_id_to_state[CE_id] = CE_state; |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 1694 | |
Venkata Sharath Chandra Manchala | ec01bbc | 2019-04-25 13:31:34 -0700 | [diff] [blame] | 1695 | alloc_mem_ce_debug_history(scn, CE_id, attr->src_nentries); |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1696 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1697 | return (struct CE_handle *)CE_state; |
| 1698 | |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1699 | error_target_access: |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1700 | error_no_dma_mem: |
| 1701 | ce_fini((struct CE_handle *)CE_state); |
| 1702 | return NULL; |
| 1703 | } |
| 1704 | |
Aditya Sathish | 80bbaef | 2018-10-25 10:02:05 +0530 | [diff] [blame] | 1705 | /** |
| 1706 | * hif_is_polled_mode_enabled - API to query if polling is enabled on all CEs |
| 1707 | * @hif_ctx: HIF Context |
| 1708 | * |
| 1709 | * API to check if polling is enabled on all CEs. Returns true when polling |
| 1710 | * is enabled on all CEs. |
| 1711 | * |
| 1712 | * Return: bool |
| 1713 | */ |
| 1714 | bool hif_is_polled_mode_enabled(struct hif_opaque_softc *hif_ctx) |
| 1715 | { |
| 1716 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 1717 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 1718 | struct CE_attr *attr; |
| 1719 | int id; |
| 1720 | |
| 1721 | for (id = 0; id < scn->ce_count; id++) { |
| 1722 | attr = &hif_state->host_ce_config[id]; |
| 1723 | if (attr && (attr->dest_nentries) && |
| 1724 | !(attr->flags & CE_ATTR_ENABLE_POLL)) |
| 1725 | return false; |
| 1726 | } |
| 1727 | return true; |
| 1728 | } |
| 1729 | qdf_export_symbol(hif_is_polled_mode_enabled); |
| 1730 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1731 | #ifdef WLAN_FEATURE_FASTPATH |
| 1732 | /** |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1733 | * hif_enable_fastpath() Update that we have enabled fastpath mode |
| 1734 | * @hif_ctx: HIF context |
| 1735 | * |
| 1736 | * For use in data path |
| 1737 | * |
| 1738 | * Retrun: void |
| 1739 | */ |
| 1740 | void hif_enable_fastpath(struct hif_opaque_softc *hif_ctx) |
| 1741 | { |
| 1742 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 1743 | |
Houston Hoffman | d63cd74 | 2016-12-05 11:59:56 -0800 | [diff] [blame] | 1744 | if (ce_srng_based(scn)) { |
| 1745 | HIF_INFO("%s, srng rings do not support fastpath", __func__); |
| 1746 | return; |
| 1747 | } |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 1748 | HIF_DBG("%s, Enabling fastpath mode", __func__); |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1749 | scn->fastpath_mode_on = true; |
| 1750 | } |
| 1751 | |
| 1752 | /** |
| 1753 | * hif_is_fastpath_mode_enabled - API to query if fasthpath mode is enabled |
| 1754 | * @hif_ctx: HIF Context |
| 1755 | * |
| 1756 | * For use in data path to skip HTC |
| 1757 | * |
| 1758 | * Return: bool |
| 1759 | */ |
| 1760 | bool hif_is_fastpath_mode_enabled(struct hif_opaque_softc *hif_ctx) |
| 1761 | { |
| 1762 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 1763 | |
| 1764 | return scn->fastpath_mode_on; |
| 1765 | } |
| 1766 | |
Nandha Kishore Easwaran | 7cdaae2 | 2018-07-30 15:02:51 +0530 | [diff] [blame] | 1767 | /** |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1768 | * hif_get_ce_handle - API to get CE handle for FastPath mode |
| 1769 | * @hif_ctx: HIF Context |
| 1770 | * @id: CopyEngine Id |
| 1771 | * |
| 1772 | * API to return CE handle for fastpath mode |
| 1773 | * |
| 1774 | * Return: void |
| 1775 | */ |
| 1776 | void *hif_get_ce_handle(struct hif_opaque_softc *hif_ctx, int id) |
| 1777 | { |
| 1778 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 1779 | |
| 1780 | return scn->ce_id_to_state[id]; |
| 1781 | } |
Aditya Sathish | 80bbaef | 2018-10-25 10:02:05 +0530 | [diff] [blame] | 1782 | qdf_export_symbol(hif_get_ce_handle); |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1783 | |
| 1784 | /** |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1785 | * ce_h2t_tx_ce_cleanup() Place holder function for H2T CE cleanup. |
| 1786 | * No processing is required inside this function. |
| 1787 | * @ce_hdl: Cope engine handle |
| 1788 | * Using an assert, this function makes sure that, |
| 1789 | * the TX CE has been processed completely. |
Houston Hoffman | 9a831ef | 2015-09-03 14:42:40 -0700 | [diff] [blame] | 1790 | * |
| 1791 | * This is called while dismantling CE structures. No other thread |
Jeff Johnson | 1002ca5 | 2018-05-12 11:29:24 -0700 | [diff] [blame] | 1792 | * should be using these structures while dismantling is occurring |
Houston Hoffman | 9a831ef | 2015-09-03 14:42:40 -0700 | [diff] [blame] | 1793 | * therfore no locking is needed. |
| 1794 | * |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1795 | * Return: none |
| 1796 | */ |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1797 | void ce_h2t_tx_ce_cleanup(struct CE_handle *ce_hdl) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1798 | { |
| 1799 | struct CE_state *ce_state = (struct CE_state *)ce_hdl; |
| 1800 | struct CE_ring_state *src_ring = ce_state->src_ring; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1801 | struct hif_softc *sc = ce_state->scn; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1802 | uint32_t sw_index, write_index; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1803 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1804 | if (hif_is_nss_wifi_enabled(sc)) |
| 1805 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1806 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 1807 | if (sc->fastpath_mode_on && ce_state->htt_tx_data) { |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 1808 | HIF_DBG("%s %d Fastpath mode ON, Cleaning up HTT Tx CE", |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1809 | __func__, __LINE__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1810 | sw_index = src_ring->sw_index; |
| 1811 | write_index = src_ring->sw_index; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1812 | |
| 1813 | /* At this point Tx CE should be clean */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1814 | qdf_assert_always(sw_index == write_index); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1815 | } |
| 1816 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1817 | |
| 1818 | /** |
| 1819 | * ce_t2h_msg_ce_cleanup() - Cleanup buffers on the t2h datapath msg queue. |
| 1820 | * @ce_hdl: Handle to CE |
| 1821 | * |
| 1822 | * These buffers are never allocated on the fly, but |
| 1823 | * are allocated only once during HIF start and freed |
| 1824 | * only once during HIF stop. |
| 1825 | * NOTE: |
| 1826 | * The assumption here is there is no in-flight DMA in progress |
| 1827 | * currently, so that buffers can be freed up safely. |
| 1828 | * |
| 1829 | * Return: NONE |
| 1830 | */ |
| 1831 | void ce_t2h_msg_ce_cleanup(struct CE_handle *ce_hdl) |
| 1832 | { |
| 1833 | struct CE_state *ce_state = (struct CE_state *)ce_hdl; |
| 1834 | struct CE_ring_state *dst_ring = ce_state->dest_ring; |
| 1835 | qdf_nbuf_t nbuf; |
| 1836 | int i; |
| 1837 | |
Houston Hoffman | 7fe51b1 | 2016-11-14 18:01:05 -0800 | [diff] [blame] | 1838 | if (ce_state->scn->fastpath_mode_on == false) |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1839 | return; |
Houston Hoffman | 7fe51b1 | 2016-11-14 18:01:05 -0800 | [diff] [blame] | 1840 | |
| 1841 | if (!ce_state->htt_rx_data) |
| 1842 | return; |
| 1843 | |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1844 | /* |
| 1845 | * when fastpath_mode is on and for datapath CEs. Unlike other CE's, |
| 1846 | * this CE is completely full: does not leave one blank space, to |
| 1847 | * distinguish between empty queue & full queue. So free all the |
| 1848 | * entries. |
| 1849 | */ |
| 1850 | for (i = 0; i < dst_ring->nentries; i++) { |
| 1851 | nbuf = dst_ring->per_transfer_context[i]; |
| 1852 | |
| 1853 | /* |
| 1854 | * The reasons for doing this check are: |
| 1855 | * 1) Protect against calling cleanup before allocating buffers |
| 1856 | * 2) In a corner case, FASTPATH_mode_on may be set, but we |
| 1857 | * could have a partially filled ring, because of a memory |
| 1858 | * allocation failure in the middle of allocating ring. |
| 1859 | * This check accounts for that case, checking |
| 1860 | * fastpath_mode_on flag or started flag would not have |
| 1861 | * covered that case. This is not in performance path, |
| 1862 | * so OK to do this. |
| 1863 | */ |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1864 | if (nbuf) { |
| 1865 | qdf_nbuf_unmap_single(ce_state->scn->qdf_dev, nbuf, |
| 1866 | QDF_DMA_FROM_DEVICE); |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1867 | qdf_nbuf_free(nbuf); |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1868 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1869 | } |
| 1870 | } |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1871 | |
| 1872 | /** |
| 1873 | * hif_update_fastpath_recv_bufs_cnt() - Increments the Rx buf count by 1 |
| 1874 | * @scn: HIF handle |
| 1875 | * |
| 1876 | * Datapath Rx CEs are special case, where we reuse all the message buffers. |
| 1877 | * Hence we have to post all the entries in the pipe, even, in the beginning |
| 1878 | * unlike for other CE pipes where one less than dest_nentries are filled in |
| 1879 | * the beginning. |
| 1880 | * |
| 1881 | * Return: None |
| 1882 | */ |
| 1883 | static void hif_update_fastpath_recv_bufs_cnt(struct hif_softc *scn) |
| 1884 | { |
| 1885 | int pipe_num; |
| 1886 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 1887 | |
| 1888 | if (scn->fastpath_mode_on == false) |
| 1889 | return; |
| 1890 | |
| 1891 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 1892 | struct HIF_CE_pipe_info *pipe_info = |
| 1893 | &hif_state->pipe_info[pipe_num]; |
| 1894 | struct CE_state *ce_state = |
| 1895 | scn->ce_id_to_state[pipe_info->pipe_num]; |
| 1896 | |
| 1897 | if (ce_state->htt_rx_data) |
| 1898 | atomic_inc(&pipe_info->recv_bufs_needed); |
| 1899 | } |
| 1900 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1901 | #else |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1902 | static inline void hif_update_fastpath_recv_bufs_cnt(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1903 | { |
| 1904 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1905 | |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1906 | static inline bool ce_is_fastpath_enabled(struct hif_softc *scn) |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1907 | { |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1908 | return false; |
| 1909 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1910 | #endif /* WLAN_FEATURE_FASTPATH */ |
| 1911 | |
| 1912 | void ce_fini(struct CE_handle *copyeng) |
| 1913 | { |
| 1914 | struct CE_state *CE_state = (struct CE_state *)copyeng; |
| 1915 | unsigned int CE_id = CE_state->id; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1916 | struct hif_softc *scn = CE_state->scn; |
Kiran Venkatappa | ae1a370 | 2017-12-29 21:08:10 +0530 | [diff] [blame] | 1917 | uint32_t desc_size; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1918 | |
Balamurugan Mahalingam | f6d3035 | 2018-01-31 16:17:24 +0530 | [diff] [blame] | 1919 | bool inited = CE_state->timer_inited; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1920 | CE_state->state = CE_UNUSED; |
| 1921 | scn->ce_id_to_state[CE_id] = NULL; |
Balamurugan Mahalingam | f6d3035 | 2018-01-31 16:17:24 +0530 | [diff] [blame] | 1922 | /* Set the flag to false first to stop processing in ce_poll_timeout */ |
Nandha Kishore Easwaran | 7cdaae2 | 2018-07-30 15:02:51 +0530 | [diff] [blame] | 1923 | ce_disable_polling(CE_state); |
| 1924 | |
Dhanashri Atre | 991ee4d | 2017-05-03 19:03:10 -0700 | [diff] [blame] | 1925 | qdf_lro_deinit(CE_state->lro_data); |
| 1926 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1927 | if (CE_state->src_ring) { |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1928 | /* Cleanup the datapath Tx ring */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1929 | ce_h2t_tx_ce_cleanup(copyeng); |
| 1930 | |
Kiran Venkatappa | ae1a370 | 2017-12-29 21:08:10 +0530 | [diff] [blame] | 1931 | desc_size = ce_get_desc_size(scn, CE_RING_SRC); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1932 | if (CE_state->src_ring->shadow_base_unaligned) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1933 | qdf_mem_free(CE_state->src_ring->shadow_base_unaligned); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1934 | if (CE_state->src_ring->base_addr_owner_space_unaligned) |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 1935 | ce_free_desc_ring(scn, CE_state->id, |
| 1936 | CE_state->src_ring, |
| 1937 | desc_size); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1938 | qdf_mem_free(CE_state->src_ring); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1939 | } |
| 1940 | if (CE_state->dest_ring) { |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1941 | /* Cleanup the datapath Rx ring */ |
| 1942 | ce_t2h_msg_ce_cleanup(copyeng); |
| 1943 | |
Kiran Venkatappa | ae1a370 | 2017-12-29 21:08:10 +0530 | [diff] [blame] | 1944 | desc_size = ce_get_desc_size(scn, CE_RING_DEST); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1945 | if (CE_state->dest_ring->base_addr_owner_space_unaligned) |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 1946 | ce_free_desc_ring(scn, CE_state->id, |
| 1947 | CE_state->dest_ring, |
| 1948 | desc_size); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1949 | qdf_mem_free(CE_state->dest_ring); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1950 | |
| 1951 | /* epping */ |
Balamurugan Mahalingam | f6d3035 | 2018-01-31 16:17:24 +0530 | [diff] [blame] | 1952 | if (inited) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1953 | qdf_timer_free(&CE_state->poll_timer); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1954 | } |
| 1955 | } |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 1956 | if ((ce_srng_based(CE_state->scn)) && (CE_state->status_ring)) { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1957 | /* Cleanup the datapath Tx ring */ |
| 1958 | ce_h2t_tx_ce_cleanup(copyeng); |
| 1959 | |
| 1960 | if (CE_state->status_ring->shadow_base_unaligned) |
| 1961 | qdf_mem_free( |
| 1962 | CE_state->status_ring->shadow_base_unaligned); |
| 1963 | |
Kiran Venkatappa | ae1a370 | 2017-12-29 21:08:10 +0530 | [diff] [blame] | 1964 | desc_size = ce_get_desc_size(scn, CE_RING_STATUS); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1965 | if (CE_state->status_ring->base_addr_owner_space_unaligned) |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 1966 | ce_free_desc_ring(scn, CE_state->id, |
| 1967 | CE_state->status_ring, |
| 1968 | desc_size); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1969 | qdf_mem_free(CE_state->status_ring); |
| 1970 | } |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 1971 | |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 1972 | free_mem_ce_debug_history(scn, CE_id); |
| 1973 | reset_ce_debug_history(scn); |
| 1974 | ce_deinit_ce_desc_event_log(scn, CE_id); |
| 1975 | |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 1976 | qdf_spinlock_destroy(&CE_state->ce_index_lock); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1977 | qdf_mem_free(CE_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1978 | } |
| 1979 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1980 | void hif_detach_htc(struct hif_opaque_softc *hif_ctx) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1981 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1982 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1983 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1984 | qdf_mem_zero(&hif_state->msg_callbacks_pending, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1985 | sizeof(hif_state->msg_callbacks_pending)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1986 | qdf_mem_zero(&hif_state->msg_callbacks_current, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1987 | sizeof(hif_state->msg_callbacks_current)); |
| 1988 | } |
| 1989 | |
| 1990 | /* Send the first nbytes bytes of the buffer */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1991 | QDF_STATUS |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1992 | hif_send_head(struct hif_opaque_softc *hif_ctx, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1993 | uint8_t pipe, unsigned int transfer_id, unsigned int nbytes, |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1994 | qdf_nbuf_t nbuf, unsigned int data_attr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1995 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1996 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1997 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1998 | struct HIF_CE_pipe_info *pipe_info = &(hif_state->pipe_info[pipe]); |
| 1999 | struct CE_handle *ce_hdl = pipe_info->ce_hdl; |
| 2000 | int bytes = nbytes, nfrags = 0; |
| 2001 | struct ce_sendlist sendlist; |
| 2002 | int status, i = 0; |
| 2003 | unsigned int mux_id = 0; |
| 2004 | |
Santosh Anbu | dbfae9b | 2018-07-12 15:40:49 +0530 | [diff] [blame] | 2005 | if (nbytes > qdf_nbuf_len(nbuf)) { |
| 2006 | HIF_ERROR("%s: nbytes:%d nbuf_len:%d", __func__, nbytes, |
| 2007 | (uint32_t)qdf_nbuf_len(nbuf)); |
| 2008 | QDF_ASSERT(0); |
| 2009 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2010 | |
| 2011 | transfer_id = |
| 2012 | (mux_id & MUX_ID_MASK) | |
| 2013 | (transfer_id & TRANSACTION_ID_MASK); |
| 2014 | data_attr &= DESC_DATA_FLAG_MASK; |
| 2015 | /* |
| 2016 | * The common case involves sending multiple fragments within a |
| 2017 | * single download (the tx descriptor and the tx frame header). |
| 2018 | * So, optimize for the case of multiple fragments by not even |
| 2019 | * checking whether it's necessary to use a sendlist. |
| 2020 | * The overhead of using a sendlist for a single buffer download |
| 2021 | * is not a big deal, since it happens rarely (for WMI messages). |
| 2022 | */ |
| 2023 | ce_sendlist_init(&sendlist); |
| 2024 | do { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2025 | qdf_dma_addr_t frag_paddr; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2026 | int frag_bytes; |
| 2027 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2028 | frag_paddr = qdf_nbuf_get_frag_paddr(nbuf, nfrags); |
| 2029 | frag_bytes = qdf_nbuf_get_frag_len(nbuf, nfrags); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2030 | /* |
| 2031 | * Clear the packet offset for all but the first CE desc. |
| 2032 | */ |
| 2033 | if (i++ > 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2034 | data_attr &= ~QDF_CE_TX_PKT_OFFSET_BIT_M; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2035 | |
| 2036 | status = ce_sendlist_buf_add(&sendlist, frag_paddr, |
| 2037 | frag_bytes > |
| 2038 | bytes ? bytes : frag_bytes, |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2039 | qdf_nbuf_get_frag_is_wordstream |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2040 | (nbuf, |
| 2041 | nfrags) ? 0 : |
| 2042 | CE_SEND_FLAG_SWAP_DISABLE, |
| 2043 | data_attr); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2044 | if (status != QDF_STATUS_SUCCESS) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2045 | HIF_ERROR("%s: error, frag_num %d larger than limit", |
| 2046 | __func__, nfrags); |
| 2047 | return status; |
| 2048 | } |
| 2049 | bytes -= frag_bytes; |
| 2050 | nfrags++; |
| 2051 | } while (bytes > 0); |
| 2052 | |
| 2053 | /* Make sure we have resources to handle this request */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2054 | qdf_spin_lock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2055 | if (pipe_info->num_sends_allowed < nfrags) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2056 | qdf_spin_unlock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2057 | ce_pkt_error_count_incr(hif_state, HIF_PIPE_NO_RESOURCE); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2058 | return QDF_STATUS_E_RESOURCES; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2059 | } |
| 2060 | pipe_info->num_sends_allowed -= nfrags; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2061 | qdf_spin_unlock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2062 | |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 2063 | if (qdf_unlikely(!ce_hdl)) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2064 | HIF_ERROR("%s: error CE handle is null", __func__); |
| 2065 | return A_ERROR; |
| 2066 | } |
| 2067 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2068 | QDF_NBUF_UPDATE_TX_PKT_COUNT(nbuf, QDF_NBUF_TX_PKT_HIF); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2069 | DPTRACE(qdf_dp_trace(nbuf, QDF_DP_TRACE_HIF_PACKET_PTR_RECORD, |
Nandha Kishore Easwaran | e43583f | 2017-05-15 21:01:13 +0530 | [diff] [blame] | 2070 | QDF_TRACE_DEFAULT_PDEV_ID, qdf_nbuf_data_addr(nbuf), |
| 2071 | sizeof(qdf_nbuf_data(nbuf)), QDF_TX)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2072 | status = ce_sendlist_send(ce_hdl, nbuf, &sendlist, transfer_id); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2073 | QDF_ASSERT(status == QDF_STATUS_SUCCESS); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2074 | |
| 2075 | return status; |
| 2076 | } |
| 2077 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2078 | void hif_send_complete_check(struct hif_opaque_softc *hif_ctx, uint8_t pipe, |
| 2079 | int force) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2080 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2081 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2082 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2083 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2084 | if (!force) { |
| 2085 | int resources; |
| 2086 | /* |
| 2087 | * Decide whether to actually poll for completions, or just |
| 2088 | * wait for a later chance. If there seem to be plenty of |
| 2089 | * resources left, then just wait, since checking involves |
| 2090 | * reading a CE register, which is a relatively expensive |
| 2091 | * operation. |
| 2092 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2093 | resources = hif_get_free_queue_number(hif_ctx, pipe); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2094 | /* |
| 2095 | * If at least 50% of the total resources are still available, |
| 2096 | * don't bother checking again yet. |
| 2097 | */ |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2098 | if (resources > (hif_state->host_ce_config[pipe].src_nentries >> |
| 2099 | 1)) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2100 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2101 | } |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 2102 | #if ATH_11AC_TXCOMPACT |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2103 | ce_per_engine_servicereap(scn, pipe); |
| 2104 | #else |
| 2105 | ce_per_engine_service(scn, pipe); |
| 2106 | #endif |
| 2107 | } |
| 2108 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2109 | uint16_t |
| 2110 | hif_get_free_queue_number(struct hif_opaque_softc *hif_ctx, uint8_t pipe) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2111 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2112 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2113 | struct HIF_CE_pipe_info *pipe_info = &(hif_state->pipe_info[pipe]); |
| 2114 | uint16_t rv; |
| 2115 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2116 | qdf_spin_lock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2117 | rv = pipe_info->num_sends_allowed; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2118 | qdf_spin_unlock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2119 | return rv; |
| 2120 | } |
| 2121 | |
| 2122 | /* Called by lower (CE) layer when a send to Target completes. */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 2123 | static void |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2124 | hif_pci_ce_send_done(struct CE_handle *copyeng, void *ce_context, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2125 | void *transfer_context, qdf_dma_addr_t CE_data, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2126 | unsigned int nbytes, unsigned int transfer_id, |
| 2127 | unsigned int sw_index, unsigned int hw_index, |
| 2128 | unsigned int toeplitz_hash_result) |
| 2129 | { |
| 2130 | struct HIF_CE_pipe_info *pipe_info = |
| 2131 | (struct HIF_CE_pipe_info *)ce_context; |
| 2132 | struct HIF_CE_state *hif_state = pipe_info->HIF_CE_state; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2133 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2134 | unsigned int sw_idx = sw_index, hw_idx = hw_index; |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 2135 | struct hif_msg_callbacks *msg_callbacks = |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 2136 | &pipe_info->pipe_callbacks; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2137 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2138 | do { |
| 2139 | /* |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 2140 | * The upper layer callback will be triggered |
| 2141 | * when last fragment is complteted. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2142 | */ |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 2143 | if (transfer_context != CE_SENDLIST_ITEM_CTXT) { |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 2144 | if (scn->target_status == TARGET_STATUS_RESET) { |
| 2145 | |
| 2146 | qdf_nbuf_unmap_single(scn->qdf_dev, |
| 2147 | transfer_context, |
| 2148 | QDF_DMA_TO_DEVICE); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2149 | qdf_nbuf_free(transfer_context); |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 2150 | } else |
Houston Hoffman | 49794a3 | 2015-12-21 12:14:56 -0800 | [diff] [blame] | 2151 | msg_callbacks->txCompletionHandler( |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 2152 | msg_callbacks->Context, |
| 2153 | transfer_context, transfer_id, |
| 2154 | toeplitz_hash_result); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2155 | } |
| 2156 | |
Pavankumar Nandeshwar | 5bdd94b | 2018-09-05 18:16:21 +0530 | [diff] [blame] | 2157 | qdf_spin_lock_bh(&pipe_info->completion_freeq_lock); |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 2158 | pipe_info->num_sends_allowed++; |
Pavankumar Nandeshwar | 5bdd94b | 2018-09-05 18:16:21 +0530 | [diff] [blame] | 2159 | qdf_spin_unlock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2160 | } while (ce_completed_send_next(copyeng, |
| 2161 | &ce_context, &transfer_context, |
| 2162 | &CE_data, &nbytes, &transfer_id, |
| 2163 | &sw_idx, &hw_idx, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2164 | &toeplitz_hash_result) == QDF_STATUS_SUCCESS); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2165 | } |
| 2166 | |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 2167 | /** |
| 2168 | * hif_ce_do_recv(): send message from copy engine to upper layers |
| 2169 | * @msg_callbacks: structure containing callback and callback context |
| 2170 | * @netbuff: skb containing message |
| 2171 | * @nbytes: number of bytes in the message |
| 2172 | * @pipe_info: used for the pipe_number info |
| 2173 | * |
Jeff Johnson | dc9c559 | 2018-05-06 15:40:42 -0700 | [diff] [blame] | 2174 | * Checks the packet length, configures the length in the netbuff, |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 2175 | * and calls the upper layer callback. |
| 2176 | * |
| 2177 | * return: None |
| 2178 | */ |
| 2179 | static inline void hif_ce_do_recv(struct hif_msg_callbacks *msg_callbacks, |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2180 | qdf_nbuf_t netbuf, int nbytes, |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 2181 | struct HIF_CE_pipe_info *pipe_info) { |
| 2182 | if (nbytes <= pipe_info->buf_sz) { |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2183 | qdf_nbuf_set_pktlen(netbuf, nbytes); |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 2184 | msg_callbacks-> |
| 2185 | rxCompletionHandler(msg_callbacks->Context, |
| 2186 | netbuf, pipe_info->pipe_num); |
| 2187 | } else { |
Jeff Johnson | b945021 | 2017-09-18 10:12:38 -0700 | [diff] [blame] | 2188 | HIF_ERROR("%s: Invalid Rx msg buf:%pK nbytes:%d", |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 2189 | __func__, netbuf, nbytes); |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 2190 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2191 | qdf_nbuf_free(netbuf); |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 2192 | } |
| 2193 | } |
| 2194 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2195 | /* Called by lower (CE) layer when data is received from the Target. */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 2196 | static void |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2197 | hif_pci_ce_recv_data(struct CE_handle *copyeng, void *ce_context, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2198 | void *transfer_context, qdf_dma_addr_t CE_data, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2199 | unsigned int nbytes, unsigned int transfer_id, |
| 2200 | unsigned int flags) |
| 2201 | { |
| 2202 | struct HIF_CE_pipe_info *pipe_info = |
| 2203 | (struct HIF_CE_pipe_info *)ce_context; |
| 2204 | struct HIF_CE_state *hif_state = pipe_info->HIF_CE_state; |
Houston Hoffman | 18c7fc5 | 2015-09-02 11:44:42 -0700 | [diff] [blame] | 2205 | struct CE_state *ce_state = (struct CE_state *) copyeng; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2206 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Yue Ma | ac6b275 | 2019-05-08 17:17:12 -0700 | [diff] [blame] | 2207 | struct hif_opaque_softc *hif_ctx = GET_HIF_OPAQUE_HDL(scn); |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 2208 | struct hif_msg_callbacks *msg_callbacks = |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 2209 | &pipe_info->pipe_callbacks; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2210 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2211 | do { |
Yue Ma | ac6b275 | 2019-05-08 17:17:12 -0700 | [diff] [blame] | 2212 | hif_pm_runtime_mark_last_busy(hif_ctx); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2213 | qdf_nbuf_unmap_single(scn->qdf_dev, |
| 2214 | (qdf_nbuf_t) transfer_context, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2215 | QDF_DMA_FROM_DEVICE); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2216 | |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 2217 | atomic_inc(&pipe_info->recv_bufs_needed); |
| 2218 | hif_post_recv_buffers_for_pipe(pipe_info); |
Komal Seelam | 6ee5590 | 2016-04-11 17:11:07 +0530 | [diff] [blame] | 2219 | if (scn->target_status == TARGET_STATUS_RESET) |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2220 | qdf_nbuf_free(transfer_context); |
Houston Hoffman | 49794a3 | 2015-12-21 12:14:56 -0800 | [diff] [blame] | 2221 | else |
| 2222 | hif_ce_do_recv(msg_callbacks, transfer_context, |
Houston Hoffman | 9c0f80a | 2015-09-28 18:36:36 -0700 | [diff] [blame] | 2223 | nbytes, pipe_info); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2224 | |
| 2225 | /* Set up force_break flag if num of receices reaches |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2226 | * MAX_NUM_OF_RECEIVES |
| 2227 | */ |
Houston Hoffman | 5bf441a | 2015-09-02 11:52:10 -0700 | [diff] [blame] | 2228 | ce_state->receive_count++; |
Houston Hoffman | 0565272 | 2016-04-29 16:58:59 -0700 | [diff] [blame] | 2229 | if (qdf_unlikely(hif_ce_service_should_yield(scn, ce_state))) { |
Houston Hoffman | 18c7fc5 | 2015-09-02 11:44:42 -0700 | [diff] [blame] | 2230 | ce_state->force_break = 1; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2231 | break; |
| 2232 | } |
| 2233 | } while (ce_completed_recv_next(copyeng, &ce_context, &transfer_context, |
| 2234 | &CE_data, &nbytes, &transfer_id, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2235 | &flags) == QDF_STATUS_SUCCESS); |
Houston Hoffman | f460785 | 2015-12-17 17:14:40 -0800 | [diff] [blame] | 2236 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2237 | } |
| 2238 | |
| 2239 | /* TBDXXX: Set CE High Watermark; invoke txResourceAvailHandler in response */ |
| 2240 | |
| 2241 | void |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2242 | hif_post_init(struct hif_opaque_softc *hif_ctx, void *unused, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2243 | struct hif_msg_callbacks *callbacks) |
| 2244 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2245 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2246 | |
| 2247 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 2248 | spin_lock_init(&pcie_access_log_lock); |
| 2249 | #endif |
| 2250 | /* Save callbacks for later installation */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2251 | qdf_mem_copy(&hif_state->msg_callbacks_pending, callbacks, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2252 | sizeof(hif_state->msg_callbacks_pending)); |
| 2253 | |
| 2254 | } |
| 2255 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 2256 | static int hif_completion_thread_startup(struct HIF_CE_state *hif_state) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2257 | { |
| 2258 | struct CE_handle *ce_diag = hif_state->ce_diag; |
| 2259 | int pipe_num; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2260 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Houston Hoffman | 9c12f7f | 2015-09-28 16:52:14 -0700 | [diff] [blame] | 2261 | struct hif_msg_callbacks *hif_msg_callbacks = |
| 2262 | &hif_state->msg_callbacks_current; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2263 | |
| 2264 | /* daemonize("hif_compl_thread"); */ |
| 2265 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2266 | if (scn->ce_count == 0) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 2267 | HIF_ERROR("%s: Invalid ce_count", __func__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2268 | return -EINVAL; |
| 2269 | } |
Houston Hoffman | 9c12f7f | 2015-09-28 16:52:14 -0700 | [diff] [blame] | 2270 | |
| 2271 | if (!hif_msg_callbacks || |
| 2272 | !hif_msg_callbacks->rxCompletionHandler || |
| 2273 | !hif_msg_callbacks->txCompletionHandler) { |
| 2274 | HIF_ERROR("%s: no completion handler registered", __func__); |
| 2275 | return -EFAULT; |
| 2276 | } |
| 2277 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2278 | A_TARGET_ACCESS_LIKELY(scn); |
| 2279 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 2280 | struct CE_attr attr; |
| 2281 | struct HIF_CE_pipe_info *pipe_info; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2282 | |
| 2283 | pipe_info = &hif_state->pipe_info[pipe_num]; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2284 | if (pipe_info->ce_hdl == ce_diag) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2285 | continue; /* Handle Diagnostic CE specially */ |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2286 | attr = hif_state->host_ce_config[pipe_num]; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2287 | if (attr.src_nentries) { |
| 2288 | /* pipe used to send to target */ |
Jeff Johnson | b945021 | 2017-09-18 10:12:38 -0700 | [diff] [blame] | 2289 | HIF_DBG("%s: pipe_num:%d pipe_info:0x%pK", |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2290 | __func__, pipe_num, pipe_info); |
| 2291 | ce_send_cb_register(pipe_info->ce_hdl, |
| 2292 | hif_pci_ce_send_done, pipe_info, |
| 2293 | attr.flags & CE_ATTR_DISABLE_INTR); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2294 | pipe_info->num_sends_allowed = attr.src_nentries - 1; |
| 2295 | } |
| 2296 | if (attr.dest_nentries) { |
| 2297 | /* pipe used to receive from target */ |
| 2298 | ce_recv_cb_register(pipe_info->ce_hdl, |
| 2299 | hif_pci_ce_recv_data, pipe_info, |
| 2300 | attr.flags & CE_ATTR_DISABLE_INTR); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2301 | } |
Houston Hoffman | 6666df7 | 2015-11-30 16:48:35 -0800 | [diff] [blame] | 2302 | |
| 2303 | if (attr.src_nentries) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2304 | qdf_spinlock_create(&pipe_info->completion_freeq_lock); |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 2305 | |
| 2306 | qdf_mem_copy(&pipe_info->pipe_callbacks, hif_msg_callbacks, |
| 2307 | sizeof(pipe_info->pipe_callbacks)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2308 | } |
Houston Hoffman | 6666df7 | 2015-11-30 16:48:35 -0800 | [diff] [blame] | 2309 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2310 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 2311 | return 0; |
| 2312 | } |
| 2313 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2314 | /* |
| 2315 | * Install pending msg callbacks. |
| 2316 | * |
| 2317 | * TBDXXX: This hack is needed because upper layers install msg callbacks |
| 2318 | * for use with HTC before BMI is done; yet this HIF implementation |
| 2319 | * needs to continue to use BMI msg callbacks. Really, upper layers |
| 2320 | * should not register HTC callbacks until AFTER BMI phase. |
| 2321 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2322 | static void hif_msg_callbacks_install(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2323 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2324 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2325 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2326 | qdf_mem_copy(&hif_state->msg_callbacks_current, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2327 | &hif_state->msg_callbacks_pending, |
| 2328 | sizeof(hif_state->msg_callbacks_pending)); |
| 2329 | } |
| 2330 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2331 | void hif_get_default_pipe(struct hif_opaque_softc *hif_hdl, uint8_t *ULPipe, |
| 2332 | uint8_t *DLPipe) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2333 | { |
| 2334 | int ul_is_polled, dl_is_polled; |
| 2335 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2336 | (void)hif_map_service_to_pipe(hif_hdl, HTC_CTRL_RSVD_SVC, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2337 | ULPipe, DLPipe, &ul_is_polled, &dl_is_polled); |
| 2338 | } |
| 2339 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2340 | /** |
| 2341 | * hif_dump_pipe_debug_count() - Log error count |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2342 | * @scn: hif_softc pointer. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2343 | * |
| 2344 | * Output the pipe error counts of each pipe to log file |
| 2345 | * |
| 2346 | * Return: N/A |
| 2347 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2348 | void hif_dump_pipe_debug_count(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2349 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2350 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2351 | int pipe_num; |
| 2352 | |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 2353 | if (!hif_state) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2354 | HIF_ERROR("%s hif_state is NULL", __func__); |
| 2355 | return; |
| 2356 | } |
| 2357 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 2358 | struct HIF_CE_pipe_info *pipe_info; |
| 2359 | |
| 2360 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2361 | |
| 2362 | if (pipe_info->nbuf_alloc_err_count > 0 || |
| 2363 | pipe_info->nbuf_dma_err_count > 0 || |
| 2364 | pipe_info->nbuf_ce_enqueue_err_count) |
| 2365 | HIF_ERROR( |
| 2366 | "%s: pipe_id = %d, recv_bufs_needed = %d, nbuf_alloc_err_count = %u, nbuf_dma_err_count = %u, nbuf_ce_enqueue_err_count = %u", |
| 2367 | __func__, pipe_info->pipe_num, |
| 2368 | atomic_read(&pipe_info->recv_bufs_needed), |
| 2369 | pipe_info->nbuf_alloc_err_count, |
| 2370 | pipe_info->nbuf_dma_err_count, |
| 2371 | pipe_info->nbuf_ce_enqueue_err_count); |
| 2372 | } |
| 2373 | } |
| 2374 | |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 2375 | static void hif_post_recv_buffers_failure(struct HIF_CE_pipe_info *pipe_info, |
| 2376 | void *nbuf, uint32_t *error_cnt, |
| 2377 | enum hif_ce_event_type failure_type, |
| 2378 | const char *failure_type_string) |
| 2379 | { |
| 2380 | int bufs_needed_tmp = atomic_inc_return(&pipe_info->recv_bufs_needed); |
| 2381 | struct CE_state *CE_state = (struct CE_state *)pipe_info->ce_hdl; |
| 2382 | struct hif_softc *scn = HIF_GET_SOFTC(pipe_info->HIF_CE_state); |
| 2383 | int ce_id = CE_state->id; |
| 2384 | uint32_t error_cnt_tmp; |
| 2385 | |
| 2386 | qdf_spin_lock_bh(&pipe_info->recv_bufs_needed_lock); |
| 2387 | error_cnt_tmp = ++(*error_cnt); |
| 2388 | qdf_spin_unlock_bh(&pipe_info->recv_bufs_needed_lock); |
Himanshu Agarwal | 38cea4a | 2017-03-30 19:02:52 +0530 | [diff] [blame] | 2389 | HIF_DBG("%s: pipe_num %d, needed %d, err_cnt = %u, fail_type = %s", |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 2390 | __func__, pipe_info->pipe_num, bufs_needed_tmp, error_cnt_tmp, |
| 2391 | failure_type_string); |
| 2392 | hif_record_ce_desc_event(scn, ce_id, failure_type, |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 2393 | NULL, nbuf, bufs_needed_tmp, 0); |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 2394 | /* if we fail to allocate the last buffer for an rx pipe, |
| 2395 | * there is no trigger to refill the ce and we will |
| 2396 | * eventually crash |
| 2397 | */ |
Himanshu Agarwal | bedeed9 | 2017-03-21 14:05:10 +0530 | [diff] [blame] | 2398 | if (bufs_needed_tmp == CE_state->dest_ring->nentries - 1) |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 2399 | qdf_sched_work(scn->qdf_dev, &CE_state->oom_allocation_work); |
Himanshu Agarwal | bedeed9 | 2017-03-21 14:05:10 +0530 | [diff] [blame] | 2400 | |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 2401 | } |
| 2402 | |
| 2403 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 2404 | |
| 2405 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2406 | QDF_STATUS hif_post_recv_buffers_for_pipe(struct HIF_CE_pipe_info *pipe_info) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2407 | { |
| 2408 | struct CE_handle *ce_hdl; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2409 | qdf_size_t buf_sz; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2410 | struct hif_softc *scn = HIF_GET_SOFTC(pipe_info->HIF_CE_state); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2411 | QDF_STATUS status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2412 | uint32_t bufs_posted = 0; |
| 2413 | |
| 2414 | buf_sz = pipe_info->buf_sz; |
| 2415 | if (buf_sz == 0) { |
| 2416 | /* Unused Copy Engine */ |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2417 | return QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2418 | } |
| 2419 | |
| 2420 | ce_hdl = pipe_info->ce_hdl; |
| 2421 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2422 | qdf_spin_lock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2423 | while (atomic_read(&pipe_info->recv_bufs_needed) > 0) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2424 | qdf_dma_addr_t CE_data; /* CE space buffer address */ |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2425 | qdf_nbuf_t nbuf; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2426 | |
| 2427 | atomic_dec(&pipe_info->recv_bufs_needed); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2428 | qdf_spin_unlock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2429 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2430 | nbuf = qdf_nbuf_alloc(scn->qdf_dev, buf_sz, 0, 4, false); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2431 | if (!nbuf) { |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 2432 | hif_post_recv_buffers_failure(pipe_info, nbuf, |
| 2433 | &pipe_info->nbuf_alloc_err_count, |
| 2434 | HIF_RX_NBUF_ALLOC_FAILURE, |
| 2435 | "HIF_RX_NBUF_ALLOC_FAILURE"); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2436 | return QDF_STATUS_E_NOMEM; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2437 | } |
| 2438 | |
| 2439 | /* |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2440 | * qdf_nbuf_peek_header(nbuf, &data, &unused); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2441 | * CE_data = dma_map_single(dev, data, buf_sz, ); |
| 2442 | * DMA_FROM_DEVICE); |
| 2443 | */ |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2444 | status = qdf_nbuf_map_single(scn->qdf_dev, nbuf, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2445 | QDF_DMA_FROM_DEVICE); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2446 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2447 | if (qdf_unlikely(status != QDF_STATUS_SUCCESS)) { |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 2448 | hif_post_recv_buffers_failure(pipe_info, nbuf, |
| 2449 | &pipe_info->nbuf_dma_err_count, |
| 2450 | HIF_RX_NBUF_MAP_FAILURE, |
| 2451 | "HIF_RX_NBUF_MAP_FAILURE"); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2452 | qdf_nbuf_free(nbuf); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2453 | return status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2454 | } |
| 2455 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2456 | CE_data = qdf_nbuf_get_frag_paddr(nbuf, 0); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2457 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2458 | qdf_mem_dma_sync_single_for_device(scn->qdf_dev, CE_data, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2459 | buf_sz, DMA_FROM_DEVICE); |
| 2460 | status = ce_recv_buf_enqueue(ce_hdl, (void *)nbuf, CE_data); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2461 | if (qdf_unlikely(status != QDF_STATUS_SUCCESS)) { |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 2462 | hif_post_recv_buffers_failure(pipe_info, nbuf, |
| 2463 | &pipe_info->nbuf_ce_enqueue_err_count, |
| 2464 | HIF_RX_NBUF_ENQUEUE_FAILURE, |
| 2465 | "HIF_RX_NBUF_ENQUEUE_FAILURE"); |
| 2466 | |
Govind Singh | 4fcafd4 | 2016-08-08 12:37:31 +0530 | [diff] [blame] | 2467 | qdf_nbuf_unmap_single(scn->qdf_dev, nbuf, |
| 2468 | QDF_DMA_FROM_DEVICE); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2469 | qdf_nbuf_free(nbuf); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2470 | return status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2471 | } |
| 2472 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2473 | qdf_spin_lock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2474 | bufs_posted++; |
| 2475 | } |
| 2476 | pipe_info->nbuf_alloc_err_count = |
Houston Hoffman | 5693683 | 2016-03-16 12:16:24 -0700 | [diff] [blame] | 2477 | (pipe_info->nbuf_alloc_err_count > bufs_posted) ? |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2478 | pipe_info->nbuf_alloc_err_count - bufs_posted : 0; |
| 2479 | pipe_info->nbuf_dma_err_count = |
Houston Hoffman | 5693683 | 2016-03-16 12:16:24 -0700 | [diff] [blame] | 2480 | (pipe_info->nbuf_dma_err_count > bufs_posted) ? |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2481 | pipe_info->nbuf_dma_err_count - bufs_posted : 0; |
| 2482 | pipe_info->nbuf_ce_enqueue_err_count = |
Houston Hoffman | 5693683 | 2016-03-16 12:16:24 -0700 | [diff] [blame] | 2483 | (pipe_info->nbuf_ce_enqueue_err_count > bufs_posted) ? |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 2484 | pipe_info->nbuf_ce_enqueue_err_count - bufs_posted : 0; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2485 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2486 | qdf_spin_unlock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2487 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2488 | return QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2489 | } |
| 2490 | |
| 2491 | /* |
| 2492 | * Try to post all desired receive buffers for all pipes. |
Govind Singh | caa850e | 2017-04-20 16:41:36 +0530 | [diff] [blame] | 2493 | * Returns 0 for non fastpath rx copy engine as |
| 2494 | * oom_allocation_work will be scheduled to recover any |
| 2495 | * failures, non-zero if unable to completely replenish |
| 2496 | * receive buffers for fastpath rx Copy engine. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2497 | */ |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2498 | QDF_STATUS hif_post_recv_buffers(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2499 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2500 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2501 | int pipe_num; |
Aditya Sathish | 61f7fa3 | 2018-03-27 17:16:33 +0530 | [diff] [blame] | 2502 | struct CE_state *ce_state = NULL; |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2503 | QDF_STATUS qdf_status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2504 | |
| 2505 | A_TARGET_ACCESS_LIKELY(scn); |
| 2506 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 2507 | struct HIF_CE_pipe_info *pipe_info; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2508 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2509 | ce_state = scn->ce_id_to_state[pipe_num]; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2510 | pipe_info = &hif_state->pipe_info[pipe_num]; |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2511 | |
| 2512 | if (hif_is_nss_wifi_enabled(scn) && |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2513 | ce_state && (ce_state->htt_rx_data)) |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2514 | continue; |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2515 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2516 | qdf_status = hif_post_recv_buffers_for_pipe(pipe_info); |
Aditya Sathish | 61f7fa3 | 2018-03-27 17:16:33 +0530 | [diff] [blame] | 2517 | if (!QDF_IS_STATUS_SUCCESS(qdf_status) && ce_state && |
Govind Singh | caa850e | 2017-04-20 16:41:36 +0530 | [diff] [blame] | 2518 | ce_state->htt_rx_data && |
| 2519 | scn->fastpath_mode_on) { |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2520 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 2521 | return qdf_status; |
Govind Singh | caa850e | 2017-04-20 16:41:36 +0530 | [diff] [blame] | 2522 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2523 | } |
| 2524 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2525 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 2526 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2527 | return QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2528 | } |
| 2529 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2530 | QDF_STATUS hif_start(struct hif_opaque_softc *hif_ctx) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2531 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2532 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2533 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2534 | QDF_STATUS qdf_status = QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2535 | |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 2536 | hif_update_fastpath_recv_bufs_cnt(scn); |
| 2537 | |
Houston Hoffman | 9c12f7f | 2015-09-28 16:52:14 -0700 | [diff] [blame] | 2538 | hif_msg_callbacks_install(scn); |
| 2539 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2540 | if (hif_completion_thread_startup(hif_state)) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2541 | return QDF_STATUS_E_FAILURE; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2542 | |
Houston Hoffman | 271951f | 2016-11-12 15:24:27 -0800 | [diff] [blame] | 2543 | /* enable buffer cleanup */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2544 | hif_state->started = true; |
| 2545 | |
Houston Hoffman | 271951f | 2016-11-12 15:24:27 -0800 | [diff] [blame] | 2546 | /* Post buffers once to start things off. */ |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2547 | qdf_status = hif_post_recv_buffers(scn); |
| 2548 | if (!QDF_IS_STATUS_SUCCESS(qdf_status)) { |
Houston Hoffman | 271951f | 2016-11-12 15:24:27 -0800 | [diff] [blame] | 2549 | /* cleanup is done in hif_ce_disable */ |
| 2550 | HIF_ERROR("%s:failed to post buffers", __func__); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2551 | return qdf_status; |
Houston Hoffman | 271951f | 2016-11-12 15:24:27 -0800 | [diff] [blame] | 2552 | } |
| 2553 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame] | 2554 | return qdf_status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2555 | } |
| 2556 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 2557 | static void hif_recv_buffer_cleanup_on_pipe(struct HIF_CE_pipe_info *pipe_info) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2558 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2559 | struct hif_softc *scn; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2560 | struct CE_handle *ce_hdl; |
| 2561 | uint32_t buf_sz; |
| 2562 | struct HIF_CE_state *hif_state; |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2563 | qdf_nbuf_t netbuf; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2564 | qdf_dma_addr_t CE_data; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2565 | void *per_CE_context; |
| 2566 | |
| 2567 | buf_sz = pipe_info->buf_sz; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2568 | /* Unused Copy Engine */ |
| 2569 | if (buf_sz == 0) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2570 | return; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2571 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2572 | |
| 2573 | hif_state = pipe_info->HIF_CE_state; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2574 | if (!hif_state->started) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2575 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2576 | |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2577 | scn = HIF_GET_SOFTC(hif_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2578 | ce_hdl = pipe_info->ce_hdl; |
| 2579 | |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 2580 | if (!scn->qdf_dev) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2581 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2582 | while (ce_revoke_recv_next |
| 2583 | (ce_hdl, &per_CE_context, (void **)&netbuf, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2584 | &CE_data) == QDF_STATUS_SUCCESS) { |
Govind Singh | caa850e | 2017-04-20 16:41:36 +0530 | [diff] [blame] | 2585 | if (netbuf) { |
| 2586 | qdf_nbuf_unmap_single(scn->qdf_dev, netbuf, |
| 2587 | QDF_DMA_FROM_DEVICE); |
| 2588 | qdf_nbuf_free(netbuf); |
| 2589 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2590 | } |
| 2591 | } |
| 2592 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 2593 | static void hif_send_buffer_cleanup_on_pipe(struct HIF_CE_pipe_info *pipe_info) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2594 | { |
| 2595 | struct CE_handle *ce_hdl; |
| 2596 | struct HIF_CE_state *hif_state; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2597 | struct hif_softc *scn; |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2598 | qdf_nbuf_t netbuf; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2599 | void *per_CE_context; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2600 | qdf_dma_addr_t CE_data; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2601 | unsigned int nbytes; |
| 2602 | unsigned int id; |
| 2603 | uint32_t buf_sz; |
| 2604 | uint32_t toeplitz_hash_result; |
| 2605 | |
| 2606 | buf_sz = pipe_info->buf_sz; |
| 2607 | if (buf_sz == 0) { |
| 2608 | /* Unused Copy Engine */ |
| 2609 | return; |
| 2610 | } |
| 2611 | |
| 2612 | hif_state = pipe_info->HIF_CE_state; |
| 2613 | if (!hif_state->started) { |
| 2614 | return; |
| 2615 | } |
| 2616 | |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2617 | scn = HIF_GET_SOFTC(hif_state); |
| 2618 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2619 | ce_hdl = pipe_info->ce_hdl; |
| 2620 | |
| 2621 | while (ce_cancel_send_next |
| 2622 | (ce_hdl, &per_CE_context, |
| 2623 | (void **)&netbuf, &CE_data, &nbytes, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2624 | &id, &toeplitz_hash_result) == QDF_STATUS_SUCCESS) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2625 | if (netbuf != CE_SENDLIST_ITEM_CTXT) { |
| 2626 | /* |
| 2627 | * Packets enqueued by htt_h2t_ver_req_msg() and |
| 2628 | * htt_h2t_rx_ring_cfg_msg_ll() have already been |
| 2629 | * freed in htt_htc_misc_pkt_pool_free() in |
| 2630 | * wlantl_close(), so do not free them here again |
Houston Hoffman | 29573d9 | 2015-10-20 17:49:44 -0700 | [diff] [blame] | 2631 | * by checking whether it's the endpoint |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2632 | * which they are queued in. |
| 2633 | */ |
Nirav Shah | d7f9159 | 2016-04-21 14:18:43 +0530 | [diff] [blame] | 2634 | if (id == scn->htc_htt_tx_endpoint) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2635 | return; |
Nirav Shah | d7f9159 | 2016-04-21 14:18:43 +0530 | [diff] [blame] | 2636 | /* Indicate the completion to higher |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2637 | * layer to free the buffer |
| 2638 | */ |
| 2639 | if (pipe_info->pipe_callbacks.txCompletionHandler) |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 2640 | pipe_info->pipe_callbacks. |
| 2641 | txCompletionHandler(pipe_info-> |
| 2642 | pipe_callbacks.Context, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2643 | netbuf, id, toeplitz_hash_result); |
| 2644 | } |
| 2645 | } |
| 2646 | } |
| 2647 | |
| 2648 | /* |
| 2649 | * Cleanup residual buffers for device shutdown: |
| 2650 | * buffers that were enqueued for receive |
| 2651 | * buffers that were to be sent |
| 2652 | * Note: Buffers that had completed but which were |
| 2653 | * not yet processed are on a completion queue. They |
| 2654 | * are handled when the completion thread shuts down. |
| 2655 | */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 2656 | static void hif_buffer_cleanup(struct HIF_CE_state *hif_state) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2657 | { |
| 2658 | int pipe_num; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2659 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2660 | struct CE_state *ce_state; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2661 | |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2662 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2663 | struct HIF_CE_pipe_info *pipe_info; |
| 2664 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2665 | ce_state = scn->ce_id_to_state[pipe_num]; |
| 2666 | if (hif_is_nss_wifi_enabled(scn) && ce_state && |
| 2667 | ((ce_state->htt_tx_data) || |
| 2668 | (ce_state->htt_rx_data))) { |
| 2669 | continue; |
| 2670 | } |
| 2671 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2672 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2673 | hif_recv_buffer_cleanup_on_pipe(pipe_info); |
| 2674 | hif_send_buffer_cleanup_on_pipe(pipe_info); |
| 2675 | } |
| 2676 | } |
| 2677 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2678 | void hif_flush_surprise_remove(struct hif_opaque_softc *hif_ctx) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2679 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2680 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2681 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2682 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2683 | hif_buffer_cleanup(hif_state); |
| 2684 | } |
| 2685 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 2686 | static void hif_destroy_oom_work(struct hif_softc *scn) |
| 2687 | { |
| 2688 | struct CE_state *ce_state; |
| 2689 | int ce_id; |
| 2690 | |
| 2691 | for (ce_id = 0; ce_id < scn->ce_count; ce_id++) { |
| 2692 | ce_state = scn->ce_id_to_state[ce_id]; |
| 2693 | if (ce_state) |
| 2694 | qdf_destroy_work(scn->qdf_dev, |
| 2695 | &ce_state->oom_allocation_work); |
| 2696 | } |
| 2697 | } |
| 2698 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 2699 | void hif_ce_stop(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2700 | { |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 2701 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2702 | int pipe_num; |
| 2703 | |
Houston Hoffman | a69581e | 2016-11-14 18:03:19 -0800 | [diff] [blame] | 2704 | /* |
| 2705 | * before cleaning up any memory, ensure irq & |
| 2706 | * bottom half contexts will not be re-entered |
| 2707 | */ |
Houston Hoffman | 7622cd3 | 2017-04-06 14:17:49 -0700 | [diff] [blame] | 2708 | hif_disable_isr(&scn->osc); |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 2709 | hif_destroy_oom_work(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2710 | scn->hif_init_done = false; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2711 | |
| 2712 | /* |
| 2713 | * At this point, asynchronous threads are stopped, |
| 2714 | * The Target should not DMA nor interrupt, Host code may |
| 2715 | * not initiate anything more. So we just need to clean |
| 2716 | * up Host-side state. |
| 2717 | */ |
| 2718 | |
| 2719 | if (scn->athdiag_procfs_inited) { |
| 2720 | athdiag_procfs_remove(); |
| 2721 | scn->athdiag_procfs_inited = false; |
| 2722 | } |
| 2723 | |
| 2724 | hif_buffer_cleanup(hif_state); |
| 2725 | |
| 2726 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 2727 | struct HIF_CE_pipe_info *pipe_info; |
Poddar, Siddarth | 725e9f5 | 2017-07-19 15:18:28 +0530 | [diff] [blame] | 2728 | struct CE_attr attr; |
| 2729 | struct CE_handle *ce_diag = hif_state->ce_diag; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2730 | |
| 2731 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2732 | if (pipe_info->ce_hdl) { |
Poddar, Siddarth | 725e9f5 | 2017-07-19 15:18:28 +0530 | [diff] [blame] | 2733 | if (pipe_info->ce_hdl != ce_diag) { |
| 2734 | attr = hif_state->host_ce_config[pipe_num]; |
| 2735 | if (attr.src_nentries) |
| 2736 | qdf_spinlock_destroy(&pipe_info-> |
| 2737 | completion_freeq_lock); |
| 2738 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2739 | ce_fini(pipe_info->ce_hdl); |
| 2740 | pipe_info->ce_hdl = NULL; |
| 2741 | pipe_info->buf_sz = 0; |
Poddar, Siddarth | 725e9f5 | 2017-07-19 15:18:28 +0530 | [diff] [blame] | 2742 | qdf_spinlock_destroy(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2743 | } |
| 2744 | } |
| 2745 | |
| 2746 | if (hif_state->sleep_timer_init) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2747 | qdf_timer_stop(&hif_state->sleep_timer); |
| 2748 | qdf_timer_free(&hif_state->sleep_timer); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2749 | hif_state->sleep_timer_init = false; |
| 2750 | } |
| 2751 | |
| 2752 | hif_state->started = false; |
| 2753 | } |
| 2754 | |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 2755 | static void hif_get_shadow_reg_cfg(struct hif_softc *scn, |
| 2756 | struct shadow_reg_cfg |
| 2757 | **target_shadow_reg_cfg_ret, |
| 2758 | uint32_t *shadow_cfg_sz_ret) |
| 2759 | { |
Nirav Shah | 3e6e04b | 2018-07-20 12:00:34 +0530 | [diff] [blame] | 2760 | if (target_shadow_reg_cfg_ret) |
| 2761 | *target_shadow_reg_cfg_ret = target_shadow_reg_cfg; |
| 2762 | if (shadow_cfg_sz_ret) |
| 2763 | *shadow_cfg_sz_ret = shadow_cfg_sz; |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 2764 | } |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2765 | |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2766 | /** |
| 2767 | * hif_get_target_ce_config() - get copy engine configuration |
| 2768 | * @target_ce_config_ret: basic copy engine configuration |
| 2769 | * @target_ce_config_sz_ret: size of the basic configuration in bytes |
| 2770 | * @target_service_to_ce_map_ret: service mapping for the copy engines |
| 2771 | * @target_service_to_ce_map_sz_ret: size of the mapping in bytes |
| 2772 | * @target_shadow_reg_cfg_ret: shadow register configuration |
| 2773 | * @shadow_cfg_sz_ret: size of the shadow register configuration in bytes |
| 2774 | * |
| 2775 | * providing accessor to these values outside of this file. |
| 2776 | * currently these are stored in static pointers to const sections. |
| 2777 | * there are multiple configurations that are selected from at compile time. |
| 2778 | * Runtime selection would need to consider mode, target type and bus type. |
| 2779 | * |
| 2780 | * Return: return by parameter. |
| 2781 | */ |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2782 | void hif_get_target_ce_config(struct hif_softc *scn, |
| 2783 | struct CE_pipe_config **target_ce_config_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2784 | uint32_t *target_ce_config_sz_ret, |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2785 | struct service_to_pipe **target_service_to_ce_map_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2786 | uint32_t *target_service_to_ce_map_sz_ret, |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2787 | struct shadow_reg_cfg **target_shadow_reg_cfg_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2788 | uint32_t *shadow_cfg_sz_ret) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2789 | { |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2790 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 2791 | |
| 2792 | *target_ce_config_ret = hif_state->target_ce_config; |
| 2793 | *target_ce_config_sz_ret = hif_state->target_ce_config_sz; |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2794 | |
| 2795 | hif_select_service_to_pipe_map(scn, target_service_to_ce_map_ret, |
| 2796 | target_service_to_ce_map_sz_ret); |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 2797 | hif_get_shadow_reg_cfg(scn, target_shadow_reg_cfg_ret, |
| 2798 | shadow_cfg_sz_ret); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2799 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2800 | |
Houston Hoffman | f60a348 | 2017-01-31 10:45:07 -0800 | [diff] [blame] | 2801 | #ifdef CONFIG_SHADOW_V2 |
Houston Hoffman | 403c2df | 2017-01-27 12:51:15 -0800 | [diff] [blame] | 2802 | static void hif_print_hal_shadow_register_cfg(struct pld_wlan_enable_cfg *cfg) |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 2803 | { |
| 2804 | int i; |
| 2805 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | 648ce11 | 2018-07-02 16:41:39 +0530 | [diff] [blame] | 2806 | "%s: num_config %d", __func__, cfg->num_shadow_reg_v2_cfg); |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 2807 | |
| 2808 | for (i = 0; i < cfg->num_shadow_reg_v2_cfg; i++) { |
| 2809 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO, |
Aditya Sathish | 648ce11 | 2018-07-02 16:41:39 +0530 | [diff] [blame] | 2810 | "%s: i %d, val %x", __func__, i, |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 2811 | cfg->shadow_reg_v2_cfg[i].addr); |
| 2812 | } |
| 2813 | } |
| 2814 | |
Houston Hoffman | f60a348 | 2017-01-31 10:45:07 -0800 | [diff] [blame] | 2815 | #else |
| 2816 | static void hif_print_hal_shadow_register_cfg(struct pld_wlan_enable_cfg *cfg) |
| 2817 | { |
| 2818 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | 648ce11 | 2018-07-02 16:41:39 +0530 | [diff] [blame] | 2819 | "%s: CONFIG_SHADOW_V2 not defined", __func__); |
Houston Hoffman | f60a348 | 2017-01-31 10:45:07 -0800 | [diff] [blame] | 2820 | } |
| 2821 | #endif |
| 2822 | |
Nirav Shah | bc8daa4 | 2018-07-09 16:27:42 +0530 | [diff] [blame] | 2823 | #ifdef ADRASTEA_RRI_ON_DDR |
| 2824 | /** |
| 2825 | * hif_get_src_ring_read_index(): Called to get the SRRI |
| 2826 | * |
| 2827 | * @scn: hif_softc pointer |
| 2828 | * @CE_ctrl_addr: base address of the CE whose RRI is to be read |
| 2829 | * |
| 2830 | * This function returns the SRRI to the caller. For CEs that |
| 2831 | * dont have interrupts enabled, we look at the DDR based SRRI |
| 2832 | * |
| 2833 | * Return: SRRI |
| 2834 | */ |
| 2835 | inline unsigned int hif_get_src_ring_read_index(struct hif_softc *scn, |
| 2836 | uint32_t CE_ctrl_addr) |
| 2837 | { |
| 2838 | struct CE_attr attr; |
| 2839 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 2840 | |
| 2841 | attr = hif_state->host_ce_config[COPY_ENGINE_ID(CE_ctrl_addr)]; |
| 2842 | if (attr.flags & CE_ATTR_DISABLE_INTR) { |
| 2843 | return CE_SRC_RING_READ_IDX_GET_FROM_DDR(scn, CE_ctrl_addr); |
| 2844 | } else { |
| 2845 | if (TARGET_REGISTER_ACCESS_ALLOWED(scn)) |
| 2846 | return A_TARGET_READ(scn, |
| 2847 | (CE_ctrl_addr) + CURRENT_SRRI_ADDRESS); |
| 2848 | else |
| 2849 | return CE_SRC_RING_READ_IDX_GET_FROM_DDR(scn, |
| 2850 | CE_ctrl_addr); |
| 2851 | } |
| 2852 | } |
| 2853 | |
| 2854 | /** |
| 2855 | * hif_get_dst_ring_read_index(): Called to get the DRRI |
| 2856 | * |
| 2857 | * @scn: hif_softc pointer |
| 2858 | * @CE_ctrl_addr: base address of the CE whose RRI is to be read |
| 2859 | * |
| 2860 | * This function returns the DRRI to the caller. For CEs that |
| 2861 | * dont have interrupts enabled, we look at the DDR based DRRI |
| 2862 | * |
| 2863 | * Return: DRRI |
| 2864 | */ |
| 2865 | inline unsigned int hif_get_dst_ring_read_index(struct hif_softc *scn, |
| 2866 | uint32_t CE_ctrl_addr) |
| 2867 | { |
| 2868 | struct CE_attr attr; |
| 2869 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 2870 | |
| 2871 | attr = hif_state->host_ce_config[COPY_ENGINE_ID(CE_ctrl_addr)]; |
| 2872 | |
| 2873 | if (attr.flags & CE_ATTR_DISABLE_INTR) { |
| 2874 | return CE_DEST_RING_READ_IDX_GET_FROM_DDR(scn, CE_ctrl_addr); |
| 2875 | } else { |
| 2876 | if (TARGET_REGISTER_ACCESS_ALLOWED(scn)) |
| 2877 | return A_TARGET_READ(scn, |
| 2878 | (CE_ctrl_addr) + CURRENT_DRRI_ADDRESS); |
| 2879 | else |
| 2880 | return CE_DEST_RING_READ_IDX_GET_FROM_DDR(scn, |
| 2881 | CE_ctrl_addr); |
| 2882 | } |
| 2883 | } |
| 2884 | |
| 2885 | /** |
| 2886 | * hif_alloc_rri_on_ddr() - Allocate memory for rri on ddr |
| 2887 | * @scn: hif_softc pointer |
| 2888 | * |
| 2889 | * Return: qdf status |
| 2890 | */ |
| 2891 | static inline QDF_STATUS hif_alloc_rri_on_ddr(struct hif_softc *scn) |
| 2892 | { |
| 2893 | qdf_dma_addr_t paddr_rri_on_ddr = 0; |
| 2894 | |
| 2895 | scn->vaddr_rri_on_ddr = |
| 2896 | (uint32_t *)qdf_mem_alloc_consistent(scn->qdf_dev, |
| 2897 | scn->qdf_dev->dev, (CE_COUNT * sizeof(uint32_t)), |
| 2898 | &paddr_rri_on_ddr); |
| 2899 | |
| 2900 | if (!scn->vaddr_rri_on_ddr) { |
| 2901 | hif_err("dmaable page alloc fail"); |
| 2902 | return QDF_STATUS_E_NOMEM; |
| 2903 | } |
| 2904 | |
| 2905 | scn->paddr_rri_on_ddr = paddr_rri_on_ddr; |
| 2906 | |
| 2907 | qdf_mem_zero(scn->vaddr_rri_on_ddr, CE_COUNT * sizeof(uint32_t)); |
| 2908 | |
| 2909 | return QDF_STATUS_SUCCESS; |
| 2910 | } |
| 2911 | #endif |
| 2912 | |
| 2913 | #if (!defined(QCN7605_SUPPORT)) && defined(ADRASTEA_RRI_ON_DDR) |
| 2914 | /** |
| 2915 | * hif_config_rri_on_ddr(): Configure the RRI on DDR mechanism |
| 2916 | * |
| 2917 | * @scn: hif_softc pointer |
| 2918 | * |
| 2919 | * This function allocates non cached memory on ddr and sends |
| 2920 | * the physical address of this memory to the CE hardware. The |
| 2921 | * hardware updates the RRI on this particular location. |
| 2922 | * |
| 2923 | * Return: None |
| 2924 | */ |
| 2925 | static inline void hif_config_rri_on_ddr(struct hif_softc *scn) |
| 2926 | { |
| 2927 | unsigned int i; |
| 2928 | uint32_t high_paddr, low_paddr; |
| 2929 | |
| 2930 | if (hif_alloc_rri_on_ddr(scn) != QDF_STATUS_SUCCESS) |
| 2931 | return; |
| 2932 | |
| 2933 | low_paddr = BITS0_TO_31(scn->paddr_rri_on_ddr); |
| 2934 | high_paddr = BITS32_TO_35(scn->paddr_rri_on_ddr); |
| 2935 | |
| 2936 | HIF_DBG("%s using srri and drri from DDR", __func__); |
| 2937 | |
| 2938 | WRITE_CE_DDR_ADDRESS_FOR_RRI_LOW(scn, low_paddr); |
| 2939 | WRITE_CE_DDR_ADDRESS_FOR_RRI_HIGH(scn, high_paddr); |
| 2940 | |
| 2941 | for (i = 0; i < CE_COUNT; i++) |
| 2942 | CE_IDX_UPD_EN_SET(scn, CE_BASE_ADDRESS(i)); |
| 2943 | } |
| 2944 | #else |
| 2945 | /** |
| 2946 | * hif_config_rri_on_ddr(): Configure the RRI on DDR mechanism |
| 2947 | * |
| 2948 | * @scn: hif_softc pointer |
| 2949 | * |
| 2950 | * This is a dummy implementation for platforms that don't |
| 2951 | * support this functionality. |
| 2952 | * |
| 2953 | * Return: None |
| 2954 | */ |
| 2955 | static inline void hif_config_rri_on_ddr(struct hif_softc *scn) |
| 2956 | { |
| 2957 | } |
| 2958 | #endif |
| 2959 | |
| 2960 | /** |
| 2961 | * hif_update_rri_over_ddr_config() - update rri_over_ddr config for |
| 2962 | * QMI command |
| 2963 | * @scn: hif context |
| 2964 | * @cfg: wlan enable config |
| 2965 | * |
| 2966 | * In case of Genoa, rri_over_ddr memory configuration is passed |
| 2967 | * to firmware through QMI configure command. |
| 2968 | */ |
| 2969 | #if defined(QCN7605_SUPPORT) && defined(ADRASTEA_RRI_ON_DDR) |
| 2970 | static void hif_update_rri_over_ddr_config(struct hif_softc *scn, |
| 2971 | struct pld_wlan_enable_cfg *cfg) |
| 2972 | { |
| 2973 | if (hif_alloc_rri_on_ddr(scn) != QDF_STATUS_SUCCESS) |
| 2974 | return; |
| 2975 | |
| 2976 | cfg->rri_over_ddr_cfg_valid = true; |
| 2977 | cfg->rri_over_ddr_cfg.base_addr_low = |
| 2978 | BITS0_TO_31(scn->paddr_rri_on_ddr); |
| 2979 | cfg->rri_over_ddr_cfg.base_addr_high = |
| 2980 | BITS32_TO_35(scn->paddr_rri_on_ddr); |
| 2981 | } |
| 2982 | #else |
| 2983 | static void hif_update_rri_over_ddr_config(struct hif_softc *scn, |
| 2984 | struct pld_wlan_enable_cfg *cfg) |
| 2985 | { |
| 2986 | } |
| 2987 | #endif |
| 2988 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2989 | /** |
| 2990 | * hif_wlan_enable(): call the platform driver to enable wlan |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 2991 | * @scn: HIF Context |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2992 | * |
| 2993 | * This function passes the con_mode and CE configuration to |
| 2994 | * platform driver to enable wlan. |
| 2995 | * |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2996 | * Return: linux error code |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2997 | */ |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2998 | int hif_wlan_enable(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2999 | { |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3000 | struct pld_wlan_enable_cfg cfg; |
| 3001 | enum pld_driver_mode mode; |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 3002 | uint32_t con_mode = hif_get_conparam(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3003 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 3004 | hif_get_target_ce_config(scn, |
| 3005 | (struct CE_pipe_config **)&cfg.ce_tgt_cfg, |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 3006 | &cfg.num_ce_tgt_cfg, |
| 3007 | (struct service_to_pipe **)&cfg.ce_svc_cfg, |
| 3008 | &cfg.num_ce_svc_pipe_cfg, |
| 3009 | (struct shadow_reg_cfg **)&cfg.shadow_reg_cfg, |
| 3010 | &cfg.num_shadow_reg_cfg); |
| 3011 | |
| 3012 | /* translate from structure size to array size */ |
| 3013 | cfg.num_ce_tgt_cfg /= sizeof(struct CE_pipe_config); |
| 3014 | cfg.num_ce_svc_pipe_cfg /= sizeof(struct service_to_pipe); |
| 3015 | cfg.num_shadow_reg_cfg /= sizeof(struct shadow_reg_cfg); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3016 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 3017 | hif_prepare_hal_shadow_register_cfg(scn, &cfg.shadow_reg_v2_cfg, |
| 3018 | &cfg.num_shadow_reg_v2_cfg); |
| 3019 | |
| 3020 | hif_print_hal_shadow_register_cfg(&cfg); |
| 3021 | |
Nirav Shah | bc8daa4 | 2018-07-09 16:27:42 +0530 | [diff] [blame] | 3022 | hif_update_rri_over_ddr_config(scn, &cfg); |
| 3023 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3024 | if (QDF_GLOBAL_FTM_MODE == con_mode) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3025 | mode = PLD_FTM; |
Balamurugan Mahalingam | 1666dd3 | 2017-09-14 15:19:42 +0530 | [diff] [blame] | 3026 | else if (QDF_GLOBAL_COLDBOOT_CALIB_MODE == con_mode) |
| 3027 | mode = PLD_COLDBOOT_CALIBRATION; |
Vignesh Viswanathan | 7c974c2 | 2019-07-24 15:24:03 +0530 | [diff] [blame] | 3028 | else if (QDF_GLOBAL_FTM_COLDBOOT_CALIB_MODE == con_mode) |
| 3029 | mode = PLD_FTM_COLDBOOT_CALIBRATION; |
Houston Hoffman | 75ef5a5 | 2016-04-14 17:15:49 -0700 | [diff] [blame] | 3030 | else if (QDF_IS_EPPING_ENABLED(con_mode)) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3031 | mode = PLD_EPPING; |
Peng Xu | 7b96253 | 2015-10-02 17:17:03 -0700 | [diff] [blame] | 3032 | else |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3033 | mode = PLD_MISSION; |
Peng Xu | 7b96253 | 2015-10-02 17:17:03 -0700 | [diff] [blame] | 3034 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 3035 | if (BYPASS_QMI) |
| 3036 | return 0; |
| 3037 | else |
Vevek Venkatesan | 0ac9aaf | 2019-06-28 17:17:22 +0530 | [diff] [blame] | 3038 | return pld_wlan_enable(scn->qdf_dev->dev, &cfg, mode); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3039 | } |
| 3040 | |
Nirav Shah | 0d0cce8 | 2018-01-17 17:00:31 +0530 | [diff] [blame] | 3041 | #ifdef WLAN_FEATURE_EPPING |
| 3042 | |
Houston Hoffman | 75ef5a5 | 2016-04-14 17:15:49 -0700 | [diff] [blame] | 3043 | #define CE_EPPING_USES_IRQ true |
| 3044 | |
Nirav Shah | 0d0cce8 | 2018-01-17 17:00:31 +0530 | [diff] [blame] | 3045 | void hif_ce_prepare_epping_config(struct HIF_CE_state *hif_state) |
| 3046 | { |
| 3047 | if (CE_EPPING_USES_IRQ) |
| 3048 | hif_state->host_ce_config = host_ce_config_wlan_epping_irq; |
| 3049 | else |
| 3050 | hif_state->host_ce_config = host_ce_config_wlan_epping_poll; |
| 3051 | hif_state->target_ce_config = target_ce_config_wlan_epping; |
| 3052 | hif_state->target_ce_config_sz = sizeof(target_ce_config_wlan_epping); |
| 3053 | target_shadow_reg_cfg = target_shadow_reg_cfg_epping; |
| 3054 | shadow_cfg_sz = sizeof(target_shadow_reg_cfg_epping); |
| 3055 | } |
| 3056 | #endif |
| 3057 | |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 3058 | #ifdef QCN7605_SUPPORT |
| 3059 | static inline |
| 3060 | void hif_set_ce_config_qcn7605(struct hif_softc *scn, |
| 3061 | struct HIF_CE_state *hif_state) |
| 3062 | { |
| 3063 | hif_state->host_ce_config = host_ce_config_wlan_qcn7605; |
| 3064 | hif_state->target_ce_config = target_ce_config_wlan_qcn7605; |
| 3065 | hif_state->target_ce_config_sz = |
| 3066 | sizeof(target_ce_config_wlan_qcn7605); |
Nirav Shah | 3e6e04b | 2018-07-20 12:00:34 +0530 | [diff] [blame] | 3067 | target_shadow_reg_cfg = target_shadow_reg_cfg_map_qcn7605; |
| 3068 | shadow_cfg_sz = sizeof(target_shadow_reg_cfg_map_qcn7605); |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 3069 | scn->ce_count = QCN7605_CE_COUNT; |
| 3070 | } |
| 3071 | #else |
| 3072 | static inline |
| 3073 | void hif_set_ce_config_qcn7605(struct hif_softc *scn, |
| 3074 | struct HIF_CE_state *hif_state) |
| 3075 | { |
| 3076 | HIF_ERROR("QCN7605 not supported"); |
| 3077 | } |
| 3078 | #endif |
| 3079 | |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 3080 | #ifdef CE_SVC_CMN_INIT |
| 3081 | #ifdef QCA_WIFI_SUPPORT_SRNG |
| 3082 | static inline void hif_ce_service_init(void) |
| 3083 | { |
| 3084 | ce_service_srng_init(); |
| 3085 | } |
| 3086 | #else |
| 3087 | static inline void hif_ce_service_init(void) |
| 3088 | { |
| 3089 | ce_service_legacy_init(); |
| 3090 | } |
| 3091 | #endif |
| 3092 | #else |
| 3093 | static inline void hif_ce_service_init(void) |
| 3094 | { |
| 3095 | } |
| 3096 | #endif |
| 3097 | |
| 3098 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3099 | /** |
| 3100 | * hif_ce_prepare_config() - load the correct static tables. |
| 3101 | * @scn: hif context |
| 3102 | * |
| 3103 | * Epping uses different static attribute tables than mission mode. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3104 | */ |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3105 | void hif_ce_prepare_config(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3106 | { |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 3107 | uint32_t mode = hif_get_conparam(scn); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 3108 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
| 3109 | struct hif_target_info *tgt_info = hif_get_target_info_handle(hif_hdl); |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 3110 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 3111 | |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 3112 | hif_ce_service_init(); |
Houston Hoffman | 10fedfc | 2017-01-23 15:23:09 -0800 | [diff] [blame] | 3113 | hif_state->ce_services = ce_services_attach(scn); |
| 3114 | |
Houston Hoffman | 710af5a | 2016-11-22 21:59:03 -0800 | [diff] [blame] | 3115 | scn->ce_count = HOST_CE_COUNT; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3116 | /* if epping is enabled we need to use the epping configuration. */ |
Houston Hoffman | 75ef5a5 | 2016-04-14 17:15:49 -0700 | [diff] [blame] | 3117 | if (QDF_IS_EPPING_ENABLED(mode)) { |
Nirav Shah | 0d0cce8 | 2018-01-17 17:00:31 +0530 | [diff] [blame] | 3118 | hif_ce_prepare_epping_config(hif_state); |
Nirav Shah | 3e6e04b | 2018-07-20 12:00:34 +0530 | [diff] [blame] | 3119 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3120 | } |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 3121 | |
| 3122 | switch (tgt_info->target_type) { |
| 3123 | default: |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 3124 | hif_state->host_ce_config = host_ce_config_wlan; |
| 3125 | hif_state->target_ce_config = target_ce_config_wlan; |
| 3126 | hif_state->target_ce_config_sz = sizeof(target_ce_config_wlan); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 3127 | break; |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 3128 | case TARGET_TYPE_QCN7605: |
| 3129 | hif_set_ce_config_qcn7605(scn, hif_state); |
| 3130 | break; |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 3131 | case TARGET_TYPE_AR900B: |
| 3132 | case TARGET_TYPE_QCA9984: |
| 3133 | case TARGET_TYPE_IPQ4019: |
| 3134 | case TARGET_TYPE_QCA9888: |
Venkateswara Swamy Bandaru | 5432c1b | 2016-10-12 19:00:40 +0530 | [diff] [blame] | 3135 | if (hif_is_attribute_set(scn, HIF_LOWDESC_CE_NO_PKTLOG_CFG)) { |
| 3136 | hif_state->host_ce_config = |
| 3137 | host_lowdesc_ce_cfg_wlan_ar900b_nopktlog; |
| 3138 | } else if (hif_is_attribute_set(scn, HIF_LOWDESC_CE_CFG)) { |
| 3139 | hif_state->host_ce_config = |
| 3140 | host_lowdesc_ce_cfg_wlan_ar900b; |
| 3141 | } else { |
| 3142 | hif_state->host_ce_config = host_ce_config_wlan_ar900b; |
| 3143 | } |
| 3144 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 3145 | hif_state->target_ce_config = target_ce_config_wlan_ar900b; |
| 3146 | hif_state->target_ce_config_sz = |
| 3147 | sizeof(target_ce_config_wlan_ar900b); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 3148 | |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 3149 | break; |
| 3150 | |
| 3151 | case TARGET_TYPE_AR9888: |
| 3152 | case TARGET_TYPE_AR9888V2: |
Venkateswara Swamy Bandaru | 5432c1b | 2016-10-12 19:00:40 +0530 | [diff] [blame] | 3153 | if (hif_is_attribute_set(scn, HIF_LOWDESC_CE_CFG)) { |
| 3154 | hif_state->host_ce_config = host_lowdesc_ce_cfg_wlan_ar9888; |
| 3155 | } else { |
| 3156 | hif_state->host_ce_config = host_ce_config_wlan_ar9888; |
| 3157 | } |
| 3158 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 3159 | hif_state->target_ce_config = target_ce_config_wlan_ar9888; |
| 3160 | hif_state->target_ce_config_sz = |
| 3161 | sizeof(target_ce_config_wlan_ar9888); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 3162 | |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 3163 | break; |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 3164 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 3165 | case TARGET_TYPE_QCA8074: |
Venkateswara Swamy Bandaru | dbacd5e | 2018-08-07 13:01:50 +0530 | [diff] [blame] | 3166 | case TARGET_TYPE_QCA8074V2: |
Basamma Yakkanahalli | 5f7cfd4 | 2018-11-02 15:52:37 +0530 | [diff] [blame] | 3167 | case TARGET_TYPE_QCA6018: |
Karunakar Dasineni | f61cb07 | 2016-09-29 11:50:45 -0700 | [diff] [blame] | 3168 | if (scn->bus_type == QDF_BUS_TYPE_PCI) { |
| 3169 | hif_state->host_ce_config = |
| 3170 | host_ce_config_wlan_qca8074_pci; |
| 3171 | hif_state->target_ce_config = |
| 3172 | target_ce_config_wlan_qca8074_pci; |
| 3173 | hif_state->target_ce_config_sz = |
| 3174 | sizeof(target_ce_config_wlan_qca8074_pci); |
| 3175 | } else { |
| 3176 | hif_state->host_ce_config = host_ce_config_wlan_qca8074; |
| 3177 | hif_state->target_ce_config = |
| 3178 | target_ce_config_wlan_qca8074; |
| 3179 | hif_state->target_ce_config_sz = |
| 3180 | sizeof(target_ce_config_wlan_qca8074); |
| 3181 | } |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 3182 | break; |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 3183 | case TARGET_TYPE_QCA6290: |
| 3184 | hif_state->host_ce_config = host_ce_config_wlan_qca6290; |
| 3185 | hif_state->target_ce_config = target_ce_config_wlan_qca6290; |
| 3186 | hif_state->target_ce_config_sz = |
| 3187 | sizeof(target_ce_config_wlan_qca6290); |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 3188 | |
Houston Hoffman | 710af5a | 2016-11-22 21:59:03 -0800 | [diff] [blame] | 3189 | scn->ce_count = QCA_6290_CE_COUNT; |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 3190 | break; |
Nandha Kishore Easwaran | 5d3475b | 2019-06-27 11:38:53 +0530 | [diff] [blame] | 3191 | case TARGET_TYPE_QCN9000: |
| 3192 | hif_state->host_ce_config = host_ce_config_wlan_qcn9000; |
| 3193 | hif_state->target_ce_config = target_ce_config_wlan_qcn9000; |
| 3194 | hif_state->target_ce_config_sz = |
| 3195 | sizeof(target_ce_config_wlan_qcn9000); |
| 3196 | scn->ce_count = QCN_9000_CE_COUNT; |
| 3197 | break; |
Venkata Sharath Chandra Manchala | 79860aa | 2018-06-12 15:16:36 -0700 | [diff] [blame] | 3198 | case TARGET_TYPE_QCA6390: |
| 3199 | hif_state->host_ce_config = host_ce_config_wlan_qca6390; |
| 3200 | hif_state->target_ce_config = target_ce_config_wlan_qca6390; |
| 3201 | hif_state->target_ce_config_sz = |
| 3202 | sizeof(target_ce_config_wlan_qca6390); |
| 3203 | |
| 3204 | scn->ce_count = QCA_6390_CE_COUNT; |
| 3205 | break; |
Mohit Khanna | 973308a | 2019-05-13 18:31:33 -0700 | [diff] [blame^] | 3206 | case TARGET_TYPE_QCA6490: |
| 3207 | hif_state->host_ce_config = host_ce_config_wlan_qca6490; |
| 3208 | hif_state->target_ce_config = target_ce_config_wlan_qca6490; |
| 3209 | hif_state->target_ce_config_sz = |
| 3210 | sizeof(target_ce_config_wlan_qca6490); |
| 3211 | |
| 3212 | scn->ce_count = QCA_6490_CE_COUNT; |
| 3213 | break; |
hangtian | c572f5f | 2019-04-10 11:19:59 +0800 | [diff] [blame] | 3214 | case TARGET_TYPE_ADRASTEA: |
Surabhi Vishnoi | b30b917 | 2019-07-05 12:24:13 +0530 | [diff] [blame] | 3215 | if (hif_is_attribute_set(scn, HIF_LOWDESC_CE_NO_PKTLOG_CFG)) { |
hangtian | c572f5f | 2019-04-10 11:19:59 +0800 | [diff] [blame] | 3216 | hif_state->host_ce_config = |
| 3217 | host_lowdesc_ce_config_wlan_adrastea_nopktlog; |
Surabhi Vishnoi | b30b917 | 2019-07-05 12:24:13 +0530 | [diff] [blame] | 3218 | hif_state->target_ce_config = |
| 3219 | target_lowdesc_ce_config_wlan_adrastea_nopktlog; |
| 3220 | hif_state->target_ce_config_sz = |
| 3221 | sizeof(target_lowdesc_ce_config_wlan_adrastea_nopktlog); |
| 3222 | } else { |
hangtian | c572f5f | 2019-04-10 11:19:59 +0800 | [diff] [blame] | 3223 | hif_state->host_ce_config = |
| 3224 | host_ce_config_wlan_adrastea; |
Surabhi Vishnoi | b30b917 | 2019-07-05 12:24:13 +0530 | [diff] [blame] | 3225 | hif_state->target_ce_config = |
| 3226 | target_ce_config_wlan_adrastea; |
| 3227 | hif_state->target_ce_config_sz = |
hangtian | c572f5f | 2019-04-10 11:19:59 +0800 | [diff] [blame] | 3228 | sizeof(target_ce_config_wlan_adrastea); |
Surabhi Vishnoi | b30b917 | 2019-07-05 12:24:13 +0530 | [diff] [blame] | 3229 | } |
hangtian | c572f5f | 2019-04-10 11:19:59 +0800 | [diff] [blame] | 3230 | break; |
| 3231 | |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 3232 | } |
Yun park | c80eea7 | 2017-10-06 15:33:36 -0700 | [diff] [blame] | 3233 | QDF_BUG(scn->ce_count <= CE_COUNT_MAX); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3234 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3235 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3236 | /** |
| 3237 | * hif_ce_open() - do ce specific allocations |
| 3238 | * @hif_sc: pointer to hif context |
| 3239 | * |
| 3240 | * return: 0 for success or QDF_STATUS_E_NOMEM |
| 3241 | */ |
| 3242 | QDF_STATUS hif_ce_open(struct hif_softc *hif_sc) |
| 3243 | { |
| 3244 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_sc); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3245 | |
Venkateswara Swamy Bandaru | 9fd9af0 | 2016-09-20 20:27:31 +0530 | [diff] [blame] | 3246 | qdf_spinlock_create(&hif_state->irq_reg_lock); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3247 | qdf_spinlock_create(&hif_state->keep_awake_lock); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3248 | return QDF_STATUS_SUCCESS; |
| 3249 | } |
| 3250 | |
| 3251 | /** |
| 3252 | * hif_ce_close() - do ce specific free |
| 3253 | * @hif_sc: pointer to hif context |
| 3254 | */ |
| 3255 | void hif_ce_close(struct hif_softc *hif_sc) |
| 3256 | { |
Venkateswara Swamy Bandaru | 9fd9af0 | 2016-09-20 20:27:31 +0530 | [diff] [blame] | 3257 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_sc); |
| 3258 | |
| 3259 | qdf_spinlock_destroy(&hif_state->irq_reg_lock); |
Poddar, Siddarth | 725e9f5 | 2017-07-19 15:18:28 +0530 | [diff] [blame] | 3260 | qdf_spinlock_destroy(&hif_state->keep_awake_lock); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3261 | } |
| 3262 | |
| 3263 | /** |
| 3264 | * hif_unconfig_ce() - ensure resources from hif_config_ce are freed |
| 3265 | * @hif_sc: hif context |
| 3266 | * |
| 3267 | * uses state variables to support cleaning up when hif_config_ce fails. |
| 3268 | */ |
| 3269 | void hif_unconfig_ce(struct hif_softc *hif_sc) |
| 3270 | { |
| 3271 | int pipe_num; |
| 3272 | struct HIF_CE_pipe_info *pipe_info; |
| 3273 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_sc); |
Manjunathappa Prakash | a5a3086 | 2018-05-21 16:32:32 -0700 | [diff] [blame] | 3274 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(hif_sc); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3275 | |
| 3276 | for (pipe_num = 0; pipe_num < hif_sc->ce_count; pipe_num++) { |
| 3277 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 3278 | if (pipe_info->ce_hdl) { |
| 3279 | ce_unregister_irq(hif_state, (1 << pipe_num)); |
jitiphil | e393cf4 | 2018-07-30 14:14:48 +0530 | [diff] [blame] | 3280 | } |
| 3281 | } |
| 3282 | deinit_tasklet_workers(hif_hdl); |
| 3283 | for (pipe_num = 0; pipe_num < hif_sc->ce_count; pipe_num++) { |
| 3284 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 3285 | if (pipe_info->ce_hdl) { |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3286 | ce_fini(pipe_info->ce_hdl); |
| 3287 | pipe_info->ce_hdl = NULL; |
| 3288 | pipe_info->buf_sz = 0; |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 3289 | qdf_spinlock_destroy(&pipe_info->recv_bufs_needed_lock); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3290 | } |
| 3291 | } |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3292 | if (hif_sc->athdiag_procfs_inited) { |
| 3293 | athdiag_procfs_remove(); |
| 3294 | hif_sc->athdiag_procfs_inited = false; |
| 3295 | } |
| 3296 | } |
| 3297 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 3298 | #ifdef CONFIG_BYPASS_QMI |
Nirav Shah | 8e93027 | 2018-07-10 16:28:21 +0530 | [diff] [blame] | 3299 | #ifdef QCN7605_SUPPORT |
| 3300 | /** |
| 3301 | * hif_post_static_buf_to_target() - post static buffer to WLAN FW |
| 3302 | * @scn: pointer to HIF structure |
| 3303 | * |
| 3304 | * WLAN FW needs 2MB memory from DDR when QMI is disabled. |
| 3305 | * |
| 3306 | * Return: void |
| 3307 | */ |
| 3308 | static void hif_post_static_buf_to_target(struct hif_softc *scn) |
| 3309 | { |
| 3310 | void *target_va; |
| 3311 | phys_addr_t target_pa; |
| 3312 | struct ce_info *ce_info_ptr; |
| 3313 | uint32_t msi_data_start; |
| 3314 | uint32_t msi_data_count; |
| 3315 | uint32_t msi_irq_start; |
| 3316 | uint32_t i = 0; |
| 3317 | int ret; |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 3318 | |
Nirav Shah | 8e93027 | 2018-07-10 16:28:21 +0530 | [diff] [blame] | 3319 | target_va = qdf_mem_alloc_consistent(scn->qdf_dev, |
| 3320 | scn->qdf_dev->dev, |
| 3321 | FW_SHARED_MEM + |
| 3322 | sizeof(struct ce_info), |
| 3323 | &target_pa); |
| 3324 | if (!target_va) |
| 3325 | return; |
| 3326 | |
| 3327 | ce_info_ptr = (struct ce_info *)target_va; |
| 3328 | |
| 3329 | if (scn->vaddr_rri_on_ddr) { |
| 3330 | ce_info_ptr->rri_over_ddr_low_paddr = |
| 3331 | BITS0_TO_31(scn->paddr_rri_on_ddr); |
| 3332 | ce_info_ptr->rri_over_ddr_high_paddr = |
| 3333 | BITS32_TO_35(scn->paddr_rri_on_ddr); |
| 3334 | } |
| 3335 | |
| 3336 | ret = pld_get_user_msi_assignment(scn->qdf_dev->dev, "CE", |
| 3337 | &msi_data_count, &msi_data_start, |
| 3338 | &msi_irq_start); |
| 3339 | if (ret) { |
| 3340 | hif_err("Failed to get CE msi config"); |
| 3341 | return; |
| 3342 | } |
| 3343 | |
| 3344 | for (i = 0; i < CE_COUNT_MAX; i++) { |
| 3345 | ce_info_ptr->cfg[i].ce_id = i; |
| 3346 | ce_info_ptr->cfg[i].msi_vector = |
| 3347 | (i % msi_data_count) + msi_irq_start; |
| 3348 | } |
| 3349 | |
| 3350 | hif_write32_mb(scn, scn->mem + BYPASS_QMI_TEMP_REGISTER, target_pa); |
| 3351 | hif_info("target va %pK target pa %pa", target_va, &target_pa); |
| 3352 | } |
| 3353 | #else |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 3354 | /** |
| 3355 | * hif_post_static_buf_to_target() - post static buffer to WLAN FW |
| 3356 | * @scn: pointer to HIF structure |
| 3357 | * |
| 3358 | * WLAN FW needs 2MB memory from DDR when QMI is disabled. |
| 3359 | * |
| 3360 | * Return: void |
| 3361 | */ |
| 3362 | static void hif_post_static_buf_to_target(struct hif_softc *scn) |
| 3363 | { |
Hardik Kantilal Patel | c5dc5f2 | 2016-04-21 14:11:33 -0700 | [diff] [blame] | 3364 | void *target_va; |
| 3365 | phys_addr_t target_pa; |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 3366 | |
Hardik Kantilal Patel | c5dc5f2 | 2016-04-21 14:11:33 -0700 | [diff] [blame] | 3367 | target_va = qdf_mem_alloc_consistent(scn->qdf_dev, scn->qdf_dev->dev, |
| 3368 | FW_SHARED_MEM, &target_pa); |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 3369 | if (!target_va) { |
Hardik Kantilal Patel | c5dc5f2 | 2016-04-21 14:11:33 -0700 | [diff] [blame] | 3370 | HIF_TRACE("Memory allocation failed could not post target buf"); |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 3371 | return; |
| 3372 | } |
Nirav Shah | f1e3fb5 | 2018-06-12 14:39:34 +0530 | [diff] [blame] | 3373 | hif_write32_mb(scn, scn->mem + BYPASS_QMI_TEMP_REGISTER, target_pa); |
Hardik Kantilal Patel | c5dc5f2 | 2016-04-21 14:11:33 -0700 | [diff] [blame] | 3374 | HIF_TRACE("target va %pK target pa %pa", target_va, &target_pa); |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 3375 | } |
Nirav Shah | 8e93027 | 2018-07-10 16:28:21 +0530 | [diff] [blame] | 3376 | #endif |
| 3377 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 3378 | #else |
| 3379 | static inline void hif_post_static_buf_to_target(struct hif_softc *scn) |
| 3380 | { |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 3381 | } |
| 3382 | #endif |
| 3383 | |
Houston Hoffman | 579c02f | 2017-08-02 01:57:38 -0700 | [diff] [blame] | 3384 | static int hif_srng_sleep_state_adjust(struct hif_softc *scn, bool sleep_ok, |
| 3385 | bool wait_for_it) |
| 3386 | { |
| 3387 | /* todo */ |
| 3388 | return 0; |
| 3389 | } |
| 3390 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3391 | /** |
| 3392 | * hif_config_ce() - configure copy engines |
| 3393 | * @scn: hif context |
| 3394 | * |
| 3395 | * Prepares fw, copy engine hardware and host sw according |
| 3396 | * to the attributes selected by hif_ce_prepare_config. |
| 3397 | * |
| 3398 | * also calls athdiag_procfs_init |
| 3399 | * |
| 3400 | * return: 0 for success nonzero for failure. |
| 3401 | */ |
| 3402 | int hif_config_ce(struct hif_softc *scn) |
| 3403 | { |
| 3404 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 3405 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
| 3406 | struct HIF_CE_pipe_info *pipe_info; |
| 3407 | int pipe_num; |
Aditya Sathish | 61f7fa3 | 2018-03-27 17:16:33 +0530 | [diff] [blame] | 3408 | struct CE_state *ce_state = NULL; |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 3409 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3410 | #ifdef ADRASTEA_SHADOW_REGISTERS |
| 3411 | int i; |
| 3412 | #endif |
| 3413 | QDF_STATUS rv = QDF_STATUS_SUCCESS; |
| 3414 | |
| 3415 | scn->notice_send = true; |
Poddar, Siddarth | 1ea8292 | 2017-06-28 14:39:33 +0530 | [diff] [blame] | 3416 | scn->ce_service_max_rx_ind_flush = MSG_FLUSH_NUM; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3417 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 3418 | hif_post_static_buf_to_target(scn); |
| 3419 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3420 | hif_state->fw_indicator_address = FW_INDICATOR_ADDRESS; |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3421 | |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 3422 | hif_config_rri_on_ddr(scn); |
| 3423 | |
Houston Hoffman | 579c02f | 2017-08-02 01:57:38 -0700 | [diff] [blame] | 3424 | if (ce_srng_based(scn)) |
| 3425 | scn->bus_ops.hif_target_sleep_state_adjust = |
| 3426 | &hif_srng_sleep_state_adjust; |
| 3427 | |
c_cgodav | fda96ad | 2017-09-07 16:16:00 +0530 | [diff] [blame] | 3428 | /* Initialise the CE debug history sysfs interface inputs ce_id and |
| 3429 | * index. Disable data storing |
| 3430 | */ |
| 3431 | reset_ce_debug_history(scn); |
| 3432 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3433 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 3434 | struct CE_attr *attr; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 3435 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3436 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 3437 | pipe_info->pipe_num = pipe_num; |
| 3438 | pipe_info->HIF_CE_state = hif_state; |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 3439 | attr = &hif_state->host_ce_config[pipe_num]; |
Karunakar Dasineni | f61cb07 | 2016-09-29 11:50:45 -0700 | [diff] [blame] | 3440 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3441 | pipe_info->ce_hdl = ce_init(scn, pipe_num, attr); |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 3442 | ce_state = scn->ce_id_to_state[pipe_num]; |
Aditya Sathish | 61f7fa3 | 2018-03-27 17:16:33 +0530 | [diff] [blame] | 3443 | if (!ce_state) { |
| 3444 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 3445 | goto err; |
| 3446 | } |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 3447 | qdf_spinlock_create(&pipe_info->recv_bufs_needed_lock); |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 3448 | QDF_ASSERT(pipe_info->ce_hdl); |
| 3449 | if (!pipe_info->ce_hdl) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3450 | rv = QDF_STATUS_E_FAILURE; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3451 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 3452 | goto err; |
| 3453 | } |
| 3454 | |
Dhanashri Atre | 991ee4d | 2017-05-03 19:03:10 -0700 | [diff] [blame] | 3455 | ce_state->lro_data = qdf_lro_init(); |
| 3456 | |
Kiran Venkatappa | e17e3b6 | 2017-02-10 16:31:49 +0530 | [diff] [blame] | 3457 | if (attr->flags & CE_ATTR_DIAG) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3458 | /* Reserve the ultimate CE for |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 3459 | * Diagnostic Window support |
| 3460 | */ |
Houston Hoffman | c1d9a41 | 2016-03-30 21:07:57 -0700 | [diff] [blame] | 3461 | hif_state->ce_diag = pipe_info->ce_hdl; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3462 | continue; |
| 3463 | } |
| 3464 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 3465 | if (hif_is_nss_wifi_enabled(scn) && ce_state && |
| 3466 | (ce_state->htt_rx_data)) |
| 3467 | continue; |
| 3468 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3469 | pipe_info->buf_sz = (qdf_size_t) (attr->src_sz_max); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3470 | if (attr->dest_nentries > 0) { |
| 3471 | atomic_set(&pipe_info->recv_bufs_needed, |
| 3472 | init_buffer_count(attr->dest_nentries - 1)); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 3473 | /*SRNG based CE has one entry less */ |
| 3474 | if (ce_srng_based(scn)) |
| 3475 | atomic_dec(&pipe_info->recv_bufs_needed); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3476 | } else { |
| 3477 | atomic_set(&pipe_info->recv_bufs_needed, 0); |
| 3478 | } |
| 3479 | ce_tasklet_init(hif_state, (1 << pipe_num)); |
| 3480 | ce_register_irq(hif_state, (1 << pipe_num)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3481 | } |
| 3482 | |
| 3483 | if (athdiag_procfs_init(scn) != 0) { |
| 3484 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 3485 | goto err; |
| 3486 | } |
| 3487 | scn->athdiag_procfs_inited = true; |
| 3488 | |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 3489 | HIF_DBG("%s: ce_init done", __func__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3490 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3491 | init_tasklet_workers(hif_hdl); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3492 | |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 3493 | HIF_DBG("%s: X, ret = %d", __func__, rv); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3494 | |
| 3495 | #ifdef ADRASTEA_SHADOW_REGISTERS |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 3496 | HIF_DBG("%s, Using Shadow Registers instead of CE Registers", __func__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3497 | for (i = 0; i < NUM_SHADOW_REGISTERS; i++) { |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 3498 | HIF_DBG("%s Shadow Register%d is mapped to address %x", |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3499 | __func__, i, |
| 3500 | (A_TARGET_READ(scn, (SHADOW_ADDRESS(i))) << 2)); |
| 3501 | } |
| 3502 | #endif |
| 3503 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3504 | return rv != QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3505 | |
| 3506 | err: |
| 3507 | /* Failure, so clean up */ |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 3508 | hif_unconfig_ce(scn); |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 3509 | HIF_TRACE("%s: X, ret = %d", __func__, rv); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3510 | return QDF_STATUS_SUCCESS != QDF_STATUS_E_FAILURE; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3511 | } |
| 3512 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3513 | #ifdef IPA_OFFLOAD |
Leo Chang | d85f78d | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 3514 | /** |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3515 | * hif_ce_ipa_get_ce_resource() - get uc resource on hif |
Leo Chang | d85f78d | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 3516 | * @scn: bus context |
| 3517 | * @ce_sr_base_paddr: copyengine source ring base physical address |
| 3518 | * @ce_sr_ring_size: copyengine source ring size |
| 3519 | * @ce_reg_paddr: copyengine register physical address |
| 3520 | * |
| 3521 | * IPA micro controller data path offload feature enabled, |
| 3522 | * HIF should release copy engine related resource information to IPA UC |
| 3523 | * IPA UC will access hardware resource with released information |
| 3524 | * |
| 3525 | * Return: None |
| 3526 | */ |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3527 | void hif_ce_ipa_get_ce_resource(struct hif_softc *scn, |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 3528 | qdf_shared_mem_t **ce_sr, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3529 | uint32_t *ce_sr_ring_size, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3530 | qdf_dma_addr_t *ce_reg_paddr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3531 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 3532 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3533 | struct HIF_CE_pipe_info *pipe_info = |
| 3534 | &(hif_state->pipe_info[HIF_PCI_IPA_UC_ASSIGNED_CE]); |
| 3535 | struct CE_handle *ce_hdl = pipe_info->ce_hdl; |
| 3536 | |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 3537 | ce_ipa_get_resource(ce_hdl, ce_sr, ce_sr_ring_size, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3538 | ce_reg_paddr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3539 | } |
| 3540 | #endif /* IPA_OFFLOAD */ |
| 3541 | |
| 3542 | |
| 3543 | #ifdef ADRASTEA_SHADOW_REGISTERS |
| 3544 | |
| 3545 | /* |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 3546 | * Current shadow register config |
| 3547 | * |
| 3548 | * ----------------------------------------------------------- |
| 3549 | * Shadow Register | CE | src/dst write index |
| 3550 | * ----------------------------------------------------------- |
| 3551 | * 0 | 0 | src |
| 3552 | * 1 No Config - Doesn't point to anything |
| 3553 | * 2 No Config - Doesn't point to anything |
| 3554 | * 3 | 3 | src |
| 3555 | * 4 | 4 | src |
| 3556 | * 5 | 5 | src |
| 3557 | * 6 No Config - Doesn't point to anything |
| 3558 | * 7 | 7 | src |
| 3559 | * 8 No Config - Doesn't point to anything |
| 3560 | * 9 No Config - Doesn't point to anything |
| 3561 | * 10 No Config - Doesn't point to anything |
| 3562 | * 11 No Config - Doesn't point to anything |
| 3563 | * ----------------------------------------------------------- |
| 3564 | * 12 No Config - Doesn't point to anything |
| 3565 | * 13 | 1 | dst |
| 3566 | * 14 | 2 | dst |
| 3567 | * 15 No Config - Doesn't point to anything |
| 3568 | * 16 No Config - Doesn't point to anything |
| 3569 | * 17 No Config - Doesn't point to anything |
| 3570 | * 18 No Config - Doesn't point to anything |
| 3571 | * 19 | 7 | dst |
| 3572 | * 20 | 8 | dst |
| 3573 | * 21 No Config - Doesn't point to anything |
| 3574 | * 22 No Config - Doesn't point to anything |
| 3575 | * 23 No Config - Doesn't point to anything |
| 3576 | * ----------------------------------------------------------- |
| 3577 | * |
| 3578 | * |
| 3579 | * ToDo - Move shadow register config to following in the future |
| 3580 | * This helps free up a block of shadow registers towards the end. |
| 3581 | * Can be used for other purposes |
| 3582 | * |
| 3583 | * ----------------------------------------------------------- |
| 3584 | * Shadow Register | CE | src/dst write index |
| 3585 | * ----------------------------------------------------------- |
| 3586 | * 0 | 0 | src |
| 3587 | * 1 | 3 | src |
| 3588 | * 2 | 4 | src |
| 3589 | * 3 | 5 | src |
| 3590 | * 4 | 7 | src |
| 3591 | * ----------------------------------------------------------- |
| 3592 | * 5 | 1 | dst |
| 3593 | * 6 | 2 | dst |
| 3594 | * 7 | 7 | dst |
| 3595 | * 8 | 8 | dst |
| 3596 | * ----------------------------------------------------------- |
| 3597 | * 9 No Config - Doesn't point to anything |
| 3598 | * 12 No Config - Doesn't point to anything |
| 3599 | * 13 No Config - Doesn't point to anything |
| 3600 | * 14 No Config - Doesn't point to anything |
| 3601 | * 15 No Config - Doesn't point to anything |
| 3602 | * 16 No Config - Doesn't point to anything |
| 3603 | * 17 No Config - Doesn't point to anything |
| 3604 | * 18 No Config - Doesn't point to anything |
| 3605 | * 19 No Config - Doesn't point to anything |
| 3606 | * 20 No Config - Doesn't point to anything |
| 3607 | * 21 No Config - Doesn't point to anything |
| 3608 | * 22 No Config - Doesn't point to anything |
| 3609 | * 23 No Config - Doesn't point to anything |
| 3610 | * ----------------------------------------------------------- |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3611 | */ |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 3612 | #ifndef QCN7605_SUPPORT |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 3613 | u32 shadow_sr_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3614 | { |
| 3615 | u32 addr = 0; |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 3616 | u32 ce = COPY_ENGINE_ID(ctrl_addr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3617 | |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 3618 | switch (ce) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3619 | case 0: |
| 3620 | addr = SHADOW_VALUE0; |
| 3621 | break; |
| 3622 | case 3: |
| 3623 | addr = SHADOW_VALUE3; |
| 3624 | break; |
| 3625 | case 4: |
| 3626 | addr = SHADOW_VALUE4; |
| 3627 | break; |
| 3628 | case 5: |
| 3629 | addr = SHADOW_VALUE5; |
| 3630 | break; |
| 3631 | case 7: |
| 3632 | addr = SHADOW_VALUE7; |
| 3633 | break; |
| 3634 | default: |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 3635 | HIF_ERROR("invalid CE ctrl_addr (CE=%d)", ce); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3636 | QDF_ASSERT(0); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3637 | } |
| 3638 | return addr; |
| 3639 | |
| 3640 | } |
| 3641 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 3642 | u32 shadow_dst_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3643 | { |
| 3644 | u32 addr = 0; |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 3645 | u32 ce = COPY_ENGINE_ID(ctrl_addr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3646 | |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 3647 | switch (ce) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3648 | case 1: |
| 3649 | addr = SHADOW_VALUE13; |
| 3650 | break; |
| 3651 | case 2: |
| 3652 | addr = SHADOW_VALUE14; |
| 3653 | break; |
Vishwajith Upendra | 70efc75 | 2016-04-18 11:23:49 -0700 | [diff] [blame] | 3654 | case 5: |
| 3655 | addr = SHADOW_VALUE17; |
| 3656 | break; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3657 | case 7: |
| 3658 | addr = SHADOW_VALUE19; |
| 3659 | break; |
| 3660 | case 8: |
| 3661 | addr = SHADOW_VALUE20; |
| 3662 | break; |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 3663 | case 9: |
| 3664 | addr = SHADOW_VALUE21; |
| 3665 | break; |
| 3666 | case 10: |
| 3667 | addr = SHADOW_VALUE22; |
| 3668 | break; |
Nirav Shah | 75cc5c8 | 2016-05-25 10:52:38 +0530 | [diff] [blame] | 3669 | case 11: |
| 3670 | addr = SHADOW_VALUE23; |
| 3671 | break; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3672 | default: |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 3673 | HIF_ERROR("invalid CE ctrl_addr (CE=%d)", ce); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3674 | QDF_ASSERT(0); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3675 | } |
| 3676 | |
| 3677 | return addr; |
| 3678 | |
| 3679 | } |
Nirav Shah | 4c8b78a | 2018-06-12 11:49:35 +0530 | [diff] [blame] | 3680 | #else |
| 3681 | u32 shadow_sr_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr) |
| 3682 | { |
| 3683 | u32 addr = 0; |
| 3684 | u32 ce = COPY_ENGINE_ID(ctrl_addr); |
| 3685 | |
| 3686 | switch (ce) { |
| 3687 | case 0: |
| 3688 | addr = SHADOW_VALUE0; |
| 3689 | break; |
| 3690 | case 4: |
| 3691 | addr = SHADOW_VALUE4; |
| 3692 | break; |
| 3693 | case 5: |
| 3694 | addr = SHADOW_VALUE5; |
| 3695 | break; |
| 3696 | default: |
| 3697 | HIF_ERROR("invalid CE ctrl_addr (CE=%d)", ce); |
| 3698 | QDF_ASSERT(0); |
| 3699 | } |
| 3700 | return addr; |
| 3701 | } |
| 3702 | |
| 3703 | u32 shadow_dst_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr) |
| 3704 | { |
| 3705 | u32 addr = 0; |
| 3706 | u32 ce = COPY_ENGINE_ID(ctrl_addr); |
| 3707 | |
| 3708 | switch (ce) { |
| 3709 | case 1: |
| 3710 | addr = SHADOW_VALUE13; |
| 3711 | break; |
| 3712 | case 2: |
| 3713 | addr = SHADOW_VALUE14; |
| 3714 | break; |
| 3715 | case 3: |
| 3716 | addr = SHADOW_VALUE15; |
| 3717 | break; |
| 3718 | case 5: |
| 3719 | addr = SHADOW_VALUE17; |
| 3720 | break; |
| 3721 | case 7: |
| 3722 | addr = SHADOW_VALUE19; |
| 3723 | break; |
| 3724 | case 8: |
| 3725 | addr = SHADOW_VALUE20; |
| 3726 | break; |
| 3727 | case 9: |
| 3728 | addr = SHADOW_VALUE21; |
| 3729 | break; |
| 3730 | case 10: |
| 3731 | addr = SHADOW_VALUE22; |
| 3732 | break; |
| 3733 | case 11: |
| 3734 | addr = SHADOW_VALUE23; |
| 3735 | break; |
| 3736 | default: |
| 3737 | HIF_ERROR("invalid CE ctrl_addr (CE=%d)", ce); |
| 3738 | QDF_ASSERT(0); |
| 3739 | } |
| 3740 | |
| 3741 | return addr; |
| 3742 | } |
| 3743 | #endif |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3744 | #endif |
| 3745 | |
Dhanashri Atre | 65b674f | 2015-10-30 15:12:03 -0700 | [diff] [blame] | 3746 | #if defined(FEATURE_LRO) |
Manjunathappa Prakash | 2146da3 | 2016-10-13 14:47:47 -0700 | [diff] [blame] | 3747 | void *hif_ce_get_lro_ctx(struct hif_opaque_softc *hif_hdl, int ctx_id) |
| 3748 | { |
| 3749 | struct CE_state *ce_state; |
| 3750 | struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl); |
| 3751 | |
Manjunathappa Prakash | 2146da3 | 2016-10-13 14:47:47 -0700 | [diff] [blame] | 3752 | ce_state = scn->ce_id_to_state[ctx_id]; |
| 3753 | |
| 3754 | return ce_state->lro_data; |
| 3755 | } |
Dhanashri Atre | 65b674f | 2015-10-30 15:12:03 -0700 | [diff] [blame] | 3756 | #endif |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3757 | |
| 3758 | /** |
| 3759 | * hif_map_service_to_pipe() - returns the ce ids pertaining to |
| 3760 | * this service |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 3761 | * @scn: hif_softc pointer. |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3762 | * @svc_id: Service ID for which the mapping is needed. |
| 3763 | * @ul_pipe: address of the container in which ul pipe is returned. |
| 3764 | * @dl_pipe: address of the container in which dl pipe is returned. |
| 3765 | * @ul_is_polled: address of the container in which a bool |
| 3766 | * indicating if the UL CE for this service |
| 3767 | * is polled is returned. |
| 3768 | * @dl_is_polled: address of the container in which a bool |
| 3769 | * indicating if the DL CE for this service |
| 3770 | * is polled is returned. |
| 3771 | * |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 3772 | * Return: Indicates whether the service has been found in the table. |
| 3773 | * Upon return, ul_is_polled is updated only if ul_pipe is updated. |
| 3774 | * There will be warning logs if either leg has not been updated |
| 3775 | * because it missed the entry in the table (but this is not an err). |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3776 | */ |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 3777 | int hif_map_service_to_pipe(struct hif_opaque_softc *hif_hdl, uint16_t svc_id, |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3778 | uint8_t *ul_pipe, uint8_t *dl_pipe, int *ul_is_polled, |
| 3779 | int *dl_is_polled) |
| 3780 | { |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 3781 | int status = QDF_STATUS_E_INVAL; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3782 | unsigned int i; |
| 3783 | struct service_to_pipe element; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3784 | struct service_to_pipe *tgt_svc_map_to_use; |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 3785 | uint32_t sz_tgt_svc_map_to_use; |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 3786 | struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl); |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 3787 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 3788 | bool dl_updated = false; |
| 3789 | bool ul_updated = false; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3790 | |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 3791 | hif_select_service_to_pipe_map(scn, &tgt_svc_map_to_use, |
| 3792 | &sz_tgt_svc_map_to_use); |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3793 | |
| 3794 | *dl_is_polled = 0; /* polling for received messages not supported */ |
| 3795 | |
| 3796 | for (i = 0; i < (sz_tgt_svc_map_to_use/sizeof(element)); i++) { |
| 3797 | |
| 3798 | memcpy(&element, &tgt_svc_map_to_use[i], sizeof(element)); |
| 3799 | if (element.service_id == svc_id) { |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 3800 | if (element.pipedir == PIPEDIR_OUT) { |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3801 | *ul_pipe = element.pipenum; |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 3802 | *ul_is_polled = |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 3803 | (hif_state->host_ce_config[*ul_pipe].flags & |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 3804 | CE_ATTR_DISABLE_INTR) != 0; |
| 3805 | ul_updated = true; |
| 3806 | } else if (element.pipedir == PIPEDIR_IN) { |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3807 | *dl_pipe = element.pipenum; |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 3808 | dl_updated = true; |
| 3809 | } |
| 3810 | status = QDF_STATUS_SUCCESS; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3811 | } |
| 3812 | } |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 3813 | if (ul_updated == false) |
Dustin Brown | 1ec1510 | 2018-08-01 00:43:43 -0700 | [diff] [blame] | 3814 | HIF_DBG("ul pipe is NOT updated for service %d", svc_id); |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 3815 | if (dl_updated == false) |
Dustin Brown | 1ec1510 | 2018-08-01 00:43:43 -0700 | [diff] [blame] | 3816 | HIF_DBG("dl pipe is NOT updated for service %d", svc_id); |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 3817 | |
| 3818 | return status; |
| 3819 | } |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 3820 | |
| 3821 | #ifdef SHADOW_REG_DEBUG |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 3822 | inline uint32_t DEBUG_CE_SRC_RING_READ_IDX_GET(struct hif_softc *scn, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 3823 | uint32_t CE_ctrl_addr) |
| 3824 | { |
| 3825 | uint32_t read_from_hw, srri_from_ddr = 0; |
| 3826 | |
| 3827 | read_from_hw = A_TARGET_READ(scn, CE_ctrl_addr + CURRENT_SRRI_ADDRESS); |
| 3828 | |
| 3829 | srri_from_ddr = SRRI_FROM_DDR_ADDR(VADDR_FOR_CE(scn, CE_ctrl_addr)); |
| 3830 | |
| 3831 | if (read_from_hw != srri_from_ddr) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 3832 | HIF_ERROR("%s: error: read from ddr = %d actual read from register = %d, CE_MISC_INT_STATUS_GET = 0x%x", |
| 3833 | __func__, srri_from_ddr, read_from_hw, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 3834 | CE_MISC_INT_STATUS_GET(scn, CE_ctrl_addr)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3835 | QDF_ASSERT(0); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 3836 | } |
| 3837 | return srri_from_ddr; |
| 3838 | } |
| 3839 | |
| 3840 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 3841 | inline uint32_t DEBUG_CE_DEST_RING_READ_IDX_GET(struct hif_softc *scn, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 3842 | uint32_t CE_ctrl_addr) |
| 3843 | { |
| 3844 | uint32_t read_from_hw, drri_from_ddr = 0; |
| 3845 | |
| 3846 | read_from_hw = A_TARGET_READ(scn, CE_ctrl_addr + CURRENT_DRRI_ADDRESS); |
| 3847 | |
| 3848 | drri_from_ddr = DRRI_FROM_DDR_ADDR(VADDR_FOR_CE(scn, CE_ctrl_addr)); |
| 3849 | |
| 3850 | if (read_from_hw != drri_from_ddr) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 3851 | HIF_ERROR("error: read from ddr = %d actual read from register = %d, CE_MISC_INT_STATUS_GET = 0x%x", |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 3852 | drri_from_ddr, read_from_hw, |
| 3853 | CE_MISC_INT_STATUS_GET(scn, CE_ctrl_addr)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3854 | QDF_ASSERT(0); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 3855 | } |
| 3856 | return drri_from_ddr; |
| 3857 | } |
| 3858 | |
| 3859 | #endif |
| 3860 | |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3861 | /** |
| 3862 | * hif_dump_ce_registers() - dump ce registers |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 3863 | * @scn: hif_opaque_softc pointer. |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3864 | * |
| 3865 | * Output the copy engine registers |
| 3866 | * |
| 3867 | * Return: 0 for success or error code |
| 3868 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 3869 | int hif_dump_ce_registers(struct hif_softc *scn) |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3870 | { |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 3871 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3872 | uint32_t ce_reg_address = CE0_BASE_ADDRESS; |
Houston Hoffman | 6296c3e | 2016-07-12 18:43:32 -0700 | [diff] [blame] | 3873 | uint32_t ce_reg_values[CE_USEFUL_SIZE >> 2]; |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3874 | uint32_t ce_reg_word_size = CE_USEFUL_SIZE >> 2; |
| 3875 | uint16_t i; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3876 | QDF_STATUS status; |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3877 | |
Houston Hoffman | d6f946c | 2016-04-06 15:16:00 -0700 | [diff] [blame] | 3878 | for (i = 0; i < scn->ce_count; i++, ce_reg_address += CE_OFFSET) { |
Jeff Johnson | 8d639a0 | 2019-03-18 09:51:11 -0700 | [diff] [blame] | 3879 | if (!scn->ce_id_to_state[i]) { |
Houston Hoffman | d6f946c | 2016-04-06 15:16:00 -0700 | [diff] [blame] | 3880 | HIF_DBG("CE%d not used.", i); |
| 3881 | continue; |
| 3882 | } |
| 3883 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 3884 | status = hif_diag_read_mem(hif_hdl, ce_reg_address, |
Houston Hoffman | 6296c3e | 2016-07-12 18:43:32 -0700 | [diff] [blame] | 3885 | (uint8_t *) &ce_reg_values[0], |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3886 | ce_reg_word_size * sizeof(uint32_t)); |
| 3887 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3888 | if (status != QDF_STATUS_SUCCESS) { |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 3889 | HIF_ERROR("Dumping CE register failed!"); |
| 3890 | return -EACCES; |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3891 | } |
Venkateswara Swamy Bandaru | 772377c | 2016-10-03 14:17:28 +0530 | [diff] [blame] | 3892 | HIF_ERROR("CE%d=>\n", i); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3893 | qdf_trace_hex_dump(QDF_MODULE_ID_HIF, QDF_TRACE_LEVEL_DEBUG, |
Houston Hoffman | 6296c3e | 2016-07-12 18:43:32 -0700 | [diff] [blame] | 3894 | (uint8_t *) &ce_reg_values[0], |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3895 | ce_reg_word_size * sizeof(uint32_t)); |
Aditya Sathish | 648ce11 | 2018-07-02 16:41:39 +0530 | [diff] [blame] | 3896 | qdf_print("ADDR:[0x%08X], SR_WR_INDEX:%d", (ce_reg_address |
Venkateswara Swamy Bandaru | 772377c | 2016-10-03 14:17:28 +0530 | [diff] [blame] | 3897 | + SR_WR_INDEX_ADDRESS), |
| 3898 | ce_reg_values[SR_WR_INDEX_ADDRESS/4]); |
Aditya Sathish | 648ce11 | 2018-07-02 16:41:39 +0530 | [diff] [blame] | 3899 | qdf_print("ADDR:[0x%08X], CURRENT_SRRI:%d", (ce_reg_address |
Venkateswara Swamy Bandaru | 772377c | 2016-10-03 14:17:28 +0530 | [diff] [blame] | 3900 | + CURRENT_SRRI_ADDRESS), |
| 3901 | ce_reg_values[CURRENT_SRRI_ADDRESS/4]); |
Aditya Sathish | 648ce11 | 2018-07-02 16:41:39 +0530 | [diff] [blame] | 3902 | qdf_print("ADDR:[0x%08X], DST_WR_INDEX:%d", (ce_reg_address |
Venkateswara Swamy Bandaru | 772377c | 2016-10-03 14:17:28 +0530 | [diff] [blame] | 3903 | + DST_WR_INDEX_ADDRESS), |
| 3904 | ce_reg_values[DST_WR_INDEX_ADDRESS/4]); |
Aditya Sathish | 648ce11 | 2018-07-02 16:41:39 +0530 | [diff] [blame] | 3905 | qdf_print("ADDR:[0x%08X], CURRENT_DRRI:%d", (ce_reg_address |
Venkateswara Swamy Bandaru | 772377c | 2016-10-03 14:17:28 +0530 | [diff] [blame] | 3906 | + CURRENT_DRRI_ADDRESS), |
| 3907 | ce_reg_values[CURRENT_DRRI_ADDRESS/4]); |
Aditya Sathish | 648ce11 | 2018-07-02 16:41:39 +0530 | [diff] [blame] | 3908 | qdf_print("---"); |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3909 | } |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3910 | return 0; |
| 3911 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 3912 | qdf_export_symbol(hif_dump_ce_registers); |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 3913 | #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT |
| 3914 | struct hif_pipe_addl_info *hif_get_addl_pipe_info(struct hif_opaque_softc *osc, |
| 3915 | struct hif_pipe_addl_info *hif_info, uint32_t pipe) |
| 3916 | { |
| 3917 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3918 | struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn); |
| 3919 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(osc); |
| 3920 | struct HIF_CE_pipe_info *pipe_info = &(hif_state->pipe_info[pipe]); |
| 3921 | struct CE_handle *ce_hdl = pipe_info->ce_hdl; |
| 3922 | struct CE_state *ce_state = (struct CE_state *)ce_hdl; |
| 3923 | struct CE_ring_state *src_ring = ce_state->src_ring; |
| 3924 | struct CE_ring_state *dest_ring = ce_state->dest_ring; |
| 3925 | |
| 3926 | if (src_ring) { |
| 3927 | hif_info->ul_pipe.nentries = src_ring->nentries; |
| 3928 | hif_info->ul_pipe.nentries_mask = src_ring->nentries_mask; |
| 3929 | hif_info->ul_pipe.sw_index = src_ring->sw_index; |
| 3930 | hif_info->ul_pipe.write_index = src_ring->write_index; |
| 3931 | hif_info->ul_pipe.hw_index = src_ring->hw_index; |
| 3932 | hif_info->ul_pipe.base_addr_CE_space = |
| 3933 | src_ring->base_addr_CE_space; |
| 3934 | hif_info->ul_pipe.base_addr_owner_space = |
| 3935 | src_ring->base_addr_owner_space; |
| 3936 | } |
| 3937 | |
| 3938 | |
| 3939 | if (dest_ring) { |
| 3940 | hif_info->dl_pipe.nentries = dest_ring->nentries; |
| 3941 | hif_info->dl_pipe.nentries_mask = dest_ring->nentries_mask; |
| 3942 | hif_info->dl_pipe.sw_index = dest_ring->sw_index; |
| 3943 | hif_info->dl_pipe.write_index = dest_ring->write_index; |
| 3944 | hif_info->dl_pipe.hw_index = dest_ring->hw_index; |
| 3945 | hif_info->dl_pipe.base_addr_CE_space = |
| 3946 | dest_ring->base_addr_CE_space; |
| 3947 | hif_info->dl_pipe.base_addr_owner_space = |
| 3948 | dest_ring->base_addr_owner_space; |
| 3949 | } |
| 3950 | |
| 3951 | hif_info->pci_mem = pci_resource_start(sc->pdev, 0); |
| 3952 | hif_info->ctrl_addr = ce_state->ctrl_addr; |
| 3953 | |
| 3954 | return hif_info; |
| 3955 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 3956 | qdf_export_symbol(hif_get_addl_pipe_info); |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 3957 | |
| 3958 | uint32_t hif_set_nss_wifiol_mode(struct hif_opaque_softc *osc, uint32_t mode) |
| 3959 | { |
| 3960 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3961 | |
| 3962 | scn->nss_wifi_ol_mode = mode; |
| 3963 | return 0; |
| 3964 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 3965 | qdf_export_symbol(hif_set_nss_wifiol_mode); |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 3966 | #endif |
| 3967 | |
Venkateswara Swamy Bandaru | 5432c1b | 2016-10-12 19:00:40 +0530 | [diff] [blame] | 3968 | void hif_set_attribute(struct hif_opaque_softc *osc, uint8_t hif_attrib) |
| 3969 | { |
| 3970 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3971 | scn->hif_attribute = hif_attrib; |
| 3972 | } |
| 3973 | |
Yun Park | 3fb3644 | 2017-08-17 17:37:53 -0700 | [diff] [blame] | 3974 | |
| 3975 | /* disable interrupts (only applicable for legacy copy engine currently */ |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 3976 | void hif_disable_interrupt(struct hif_opaque_softc *osc, uint32_t pipe_num) |
| 3977 | { |
| 3978 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3979 | struct CE_state *CE_state = scn->ce_id_to_state[pipe_num]; |
| 3980 | uint32_t ctrl_addr = CE_state->ctrl_addr; |
| 3981 | |
| 3982 | Q_TARGET_ACCESS_BEGIN(scn); |
| 3983 | CE_COPY_COMPLETE_INTR_DISABLE(scn, ctrl_addr); |
| 3984 | Q_TARGET_ACCESS_END(scn); |
| 3985 | } |
Pratik Gandhi | dc82a77 | 2018-01-30 18:57:05 +0530 | [diff] [blame] | 3986 | qdf_export_symbol(hif_disable_interrupt); |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3987 | |
| 3988 | /** |
| 3989 | * hif_fw_event_handler() - hif fw event handler |
| 3990 | * @hif_state: pointer to hif ce state structure |
| 3991 | * |
| 3992 | * Process fw events and raise HTC callback to process fw events. |
| 3993 | * |
| 3994 | * Return: none |
| 3995 | */ |
| 3996 | static inline void hif_fw_event_handler(struct HIF_CE_state *hif_state) |
| 3997 | { |
| 3998 | struct hif_msg_callbacks *msg_callbacks = |
| 3999 | &hif_state->msg_callbacks_current; |
| 4000 | |
| 4001 | if (!msg_callbacks->fwEventHandler) |
| 4002 | return; |
| 4003 | |
| 4004 | msg_callbacks->fwEventHandler(msg_callbacks->Context, |
| 4005 | QDF_STATUS_E_FAILURE); |
| 4006 | } |
| 4007 | |
| 4008 | #ifndef QCA_WIFI_3_0 |
| 4009 | /** |
| 4010 | * hif_fw_interrupt_handler() - FW interrupt handler |
| 4011 | * @irq: irq number |
| 4012 | * @arg: the user pointer |
| 4013 | * |
| 4014 | * Called from the PCI interrupt handler when a |
| 4015 | * firmware-generated interrupt to the Host. |
| 4016 | * |
Yun Park | 3fb3644 | 2017-08-17 17:37:53 -0700 | [diff] [blame] | 4017 | * only registered for legacy ce devices |
| 4018 | * |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 4019 | * Return: status of handled irq |
| 4020 | */ |
| 4021 | irqreturn_t hif_fw_interrupt_handler(int irq, void *arg) |
| 4022 | { |
| 4023 | struct hif_softc *scn = arg; |
| 4024 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 4025 | uint32_t fw_indicator_address, fw_indicator; |
| 4026 | |
| 4027 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 4028 | return ATH_ISR_NOSCHED; |
| 4029 | |
| 4030 | fw_indicator_address = hif_state->fw_indicator_address; |
| 4031 | /* For sudden unplug this will return ~0 */ |
| 4032 | fw_indicator = A_TARGET_READ(scn, fw_indicator_address); |
| 4033 | |
| 4034 | if ((fw_indicator != ~0) && (fw_indicator & FW_IND_EVENT_PENDING)) { |
| 4035 | /* ACK: clear Target-side pending event */ |
| 4036 | A_TARGET_WRITE(scn, fw_indicator_address, |
| 4037 | fw_indicator & ~FW_IND_EVENT_PENDING); |
| 4038 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 4039 | return ATH_ISR_SCHED; |
| 4040 | |
| 4041 | if (hif_state->started) { |
| 4042 | hif_fw_event_handler(hif_state); |
| 4043 | } else { |
| 4044 | /* |
| 4045 | * Probable Target failure before we're prepared |
| 4046 | * to handle it. Generally unexpected. |
Lin Bai | e213787 | 2018-05-15 13:27:55 +0800 | [diff] [blame] | 4047 | * fw_indicator used as bitmap, and defined as below: |
| 4048 | * FW_IND_EVENT_PENDING 0x1 |
| 4049 | * FW_IND_INITIALIZED 0x2 |
| 4050 | * FW_IND_NEEDRECOVER 0x4 |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 4051 | */ |
| 4052 | AR_DEBUG_PRINTF(ATH_DEBUG_ERR, |
Lin Bai | e213787 | 2018-05-15 13:27:55 +0800 | [diff] [blame] | 4053 | ("%s: Early firmware event indicated 0x%x\n", |
| 4054 | __func__, fw_indicator)); |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 4055 | } |
| 4056 | } else { |
| 4057 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 4058 | return ATH_ISR_SCHED; |
| 4059 | } |
| 4060 | |
| 4061 | return ATH_ISR_SCHED; |
| 4062 | } |
| 4063 | #else |
| 4064 | irqreturn_t hif_fw_interrupt_handler(int irq, void *arg) |
| 4065 | { |
| 4066 | return ATH_ISR_SCHED; |
| 4067 | } |
| 4068 | #endif /* #ifdef QCA_WIFI_3_0 */ |
| 4069 | |
| 4070 | |
| 4071 | /** |
| 4072 | * hif_wlan_disable(): call the platform driver to disable wlan |
| 4073 | * @scn: HIF Context |
| 4074 | * |
| 4075 | * This function passes the con_mode to platform driver to disable |
| 4076 | * wlan. |
| 4077 | * |
| 4078 | * Return: void |
| 4079 | */ |
| 4080 | void hif_wlan_disable(struct hif_softc *scn) |
| 4081 | { |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 4082 | enum pld_driver_mode mode; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 4083 | uint32_t con_mode = hif_get_conparam(scn); |
| 4084 | |
Vinay Adella | 2a6bd8a | 2018-02-07 20:07:37 +0530 | [diff] [blame] | 4085 | if (scn->target_status == TARGET_STATUS_RESET) |
| 4086 | return; |
| 4087 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 4088 | if (QDF_GLOBAL_FTM_MODE == con_mode) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 4089 | mode = PLD_FTM; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 4090 | else if (QDF_IS_EPPING_ENABLED(con_mode)) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 4091 | mode = PLD_EPPING; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 4092 | else |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 4093 | mode = PLD_MISSION; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 4094 | |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 4095 | pld_wlan_disable(scn->qdf_dev->dev, mode); |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 4096 | } |
Dustin Brown | 6bdbda5 | 2016-09-27 15:52:30 -0700 | [diff] [blame] | 4097 | |
Dustin Brown | 6834d32 | 2017-03-20 15:02:48 -0700 | [diff] [blame] | 4098 | int hif_get_wake_ce_id(struct hif_softc *scn, uint8_t *ce_id) |
| 4099 | { |
| 4100 | QDF_STATUS status; |
| 4101 | uint8_t ul_pipe, dl_pipe; |
| 4102 | int ul_is_polled, dl_is_polled; |
| 4103 | |
| 4104 | /* DL pipe for HTC_CTRL_RSVD_SVC should map to the wake CE */ |
| 4105 | status = hif_map_service_to_pipe(GET_HIF_OPAQUE_HDL(scn), |
| 4106 | HTC_CTRL_RSVD_SVC, |
| 4107 | &ul_pipe, &dl_pipe, |
| 4108 | &ul_is_polled, &dl_is_polled); |
| 4109 | if (status) { |
| 4110 | HIF_ERROR("%s: failed to map pipe: %d", __func__, status); |
| 4111 | return qdf_status_to_os_return(status); |
| 4112 | } |
| 4113 | |
| 4114 | *ce_id = dl_pipe; |
| 4115 | |
| 4116 | return 0; |
| 4117 | } |