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Quentin Colombet2ad1f852016-02-11 17:44:59 +00001//===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.cpp - MIBuilder--*- C++ -*-==//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9/// \file
10/// This file implements the MachineIRBuidler class.
11//===----------------------------------------------------------------------===//
12#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
13
14#include "llvm/CodeGen/MachineFunction.h"
15#include "llvm/CodeGen/MachineInstr.h"
16#include "llvm/CodeGen/MachineInstrBuilder.h"
Tim Northover0f140c72016-09-09 11:46:34 +000017#include "llvm/CodeGen/MachineRegisterInfo.h"
Quentin Colombet2ad1f852016-02-11 17:44:59 +000018#include "llvm/Target/TargetInstrInfo.h"
Quentin Colombet8fd67182016-02-11 21:16:56 +000019#include "llvm/Target/TargetOpcodes.h"
Quentin Colombet2ad1f852016-02-11 17:44:59 +000020#include "llvm/Target/TargetSubtargetInfo.h"
21
22using namespace llvm;
23
Quentin Colombet000b5802016-03-11 17:27:51 +000024void MachineIRBuilder::setMF(MachineFunction &MF) {
Quentin Colombet2ad1f852016-02-11 17:44:59 +000025 this->MF = &MF;
26 this->MBB = nullptr;
Tim Northover0f140c72016-09-09 11:46:34 +000027 this->MRI = &MF.getRegInfo();
Quentin Colombet2ad1f852016-02-11 17:44:59 +000028 this->TII = MF.getSubtarget().getInstrInfo();
29 this->DL = DebugLoc();
Tim Northover05cc4852016-12-07 21:05:38 +000030 this->II = MachineBasicBlock::iterator();
Tim Northover438c77c2016-08-25 17:37:32 +000031 this->InsertedInstr = nullptr;
Quentin Colombet2ad1f852016-02-11 17:44:59 +000032}
33
Tim Northover05cc4852016-12-07 21:05:38 +000034void MachineIRBuilder::setMBB(MachineBasicBlock &MBB) {
Quentin Colombet2ad1f852016-02-11 17:44:59 +000035 this->MBB = &MBB;
Tim Northover05cc4852016-12-07 21:05:38 +000036 this->II = MBB.end();
Quentin Colombet2ad1f852016-02-11 17:44:59 +000037 assert(&getMF() == MBB.getParent() &&
38 "Basic block is in a different function");
39}
40
Tim Northover05cc4852016-12-07 21:05:38 +000041void MachineIRBuilder::setInstr(MachineInstr &MI) {
Quentin Colombet2ad1f852016-02-11 17:44:59 +000042 assert(MI.getParent() && "Instruction is not part of a basic block");
Quentin Colombet91ebd712016-03-11 17:27:47 +000043 setMBB(*MI.getParent());
Tim Northover05cc4852016-12-07 21:05:38 +000044 this->II = MI.getIterator();
Quentin Colombet2ad1f852016-02-11 17:44:59 +000045}
46
Tim Northover05cc4852016-12-07 21:05:38 +000047void MachineIRBuilder::setInsertPt(MachineBasicBlock &MBB,
48 MachineBasicBlock::iterator II) {
49 assert(MBB.getParent() == &getMF() &&
50 "Basic block is in a different function");
51 this->MBB = &MBB;
52 this->II = II;
Quentin Colombet2ad1f852016-02-11 17:44:59 +000053}
54
Tim Northover438c77c2016-08-25 17:37:32 +000055void MachineIRBuilder::recordInsertions(
56 std::function<void(MachineInstr *)> Inserted) {
57 InsertedInstr = Inserted;
58}
59
60void MachineIRBuilder::stopRecordingInsertions() {
61 InsertedInstr = nullptr;
62}
63
Quentin Colombetf9b49342016-03-11 17:27:58 +000064//------------------------------------------------------------------------------
65// Build instruction variants.
66//------------------------------------------------------------------------------
Tim Northovercc5f7622016-07-26 16:45:26 +000067
Tim Northover0f140c72016-09-09 11:46:34 +000068MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opcode) {
Tim Northovera5e38fa2016-09-22 13:49:25 +000069 return insertInstr(buildInstrNoInsert(Opcode));
70}
71
72MachineInstrBuilder MachineIRBuilder::buildInstrNoInsert(unsigned Opcode) {
Tim Northovera51575f2016-07-29 17:43:52 +000073 MachineInstrBuilder MIB = BuildMI(getMF(), DL, getTII().get(Opcode));
Tim Northovera5e38fa2016-09-22 13:49:25 +000074 return MIB;
75}
76
77
78MachineInstrBuilder MachineIRBuilder::insertInstr(MachineInstrBuilder MIB) {
Tim Northovera51575f2016-07-29 17:43:52 +000079 getMBB().insert(getInsertPt(), MIB);
Tim Northover438c77c2016-08-25 17:37:32 +000080 if (InsertedInstr)
81 InsertedInstr(MIB);
Tim Northovera51575f2016-07-29 17:43:52 +000082 return MIB;
Quentin Colombet74d7d2f2016-02-11 18:53:28 +000083}
84
Tim Northover0f140c72016-09-09 11:46:34 +000085MachineInstrBuilder MachineIRBuilder::buildFrameIndex(unsigned Res, int Idx) {
Tim Northover1f8b1db2016-09-09 11:46:58 +000086 assert(MRI->getType(Res).isPointer() && "invalid operand type");
Tim Northover0f140c72016-09-09 11:46:34 +000087 return buildInstr(TargetOpcode::G_FRAME_INDEX)
Tim Northovera51575f2016-07-29 17:43:52 +000088 .addDef(Res)
89 .addFrameIndex(Idx);
Tim Northoverbd505462016-07-22 16:59:52 +000090}
Tim Northover33b07d62016-07-22 20:03:43 +000091
Tim Northover032548f2016-09-12 12:10:41 +000092MachineInstrBuilder MachineIRBuilder::buildGlobalValue(unsigned Res,
93 const GlobalValue *GV) {
94 assert(MRI->getType(Res).isPointer() && "invalid operand type");
95 assert(MRI->getType(Res).getAddressSpace() ==
96 GV->getType()->getAddressSpace() &&
97 "address space mismatch");
98
99 return buildInstr(TargetOpcode::G_GLOBAL_VALUE)
100 .addDef(Res)
101 .addGlobalAddress(GV);
102}
103
Tim Northover0f140c72016-09-09 11:46:34 +0000104MachineInstrBuilder MachineIRBuilder::buildAdd(unsigned Res, unsigned Op0,
105 unsigned Op1) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000106 assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
107 "invalid operand type");
108 assert(MRI->getType(Res) == MRI->getType(Op0) &&
109 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
110
Tim Northover0f140c72016-09-09 11:46:34 +0000111 return buildInstr(TargetOpcode::G_ADD)
Tim Northovera51575f2016-07-29 17:43:52 +0000112 .addDef(Res)
113 .addUse(Op0)
114 .addUse(Op1);
Tim Northover33b07d62016-07-22 20:03:43 +0000115}
116
Tim Northovera7653b32016-09-12 11:20:22 +0000117MachineInstrBuilder MachineIRBuilder::buildGEP(unsigned Res, unsigned Op0,
118 unsigned Op1) {
119 assert(MRI->getType(Res).isPointer() &&
120 MRI->getType(Res) == MRI->getType(Op0) && "type mismatch");
121 assert(MRI->getType(Op1).isScalar() && "invalid offset type");
122
123 return buildInstr(TargetOpcode::G_GEP)
124 .addDef(Res)
125 .addUse(Op0)
126 .addUse(Op1);
127}
128
Tim Northover0f140c72016-09-09 11:46:34 +0000129MachineInstrBuilder MachineIRBuilder::buildSub(unsigned Res, unsigned Op0,
130 unsigned Op1) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000131 assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
132 "invalid operand type");
133 assert(MRI->getType(Res) == MRI->getType(Op0) &&
134 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
135
Tim Northover0f140c72016-09-09 11:46:34 +0000136 return buildInstr(TargetOpcode::G_SUB)
Tim Northovercecee562016-08-26 17:46:13 +0000137 .addDef(Res)
138 .addUse(Op0)
139 .addUse(Op1);
140}
141
Tim Northover0f140c72016-09-09 11:46:34 +0000142MachineInstrBuilder MachineIRBuilder::buildMul(unsigned Res, unsigned Op0,
143 unsigned Op1) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000144 assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) &&
145 "invalid operand type");
146 assert(MRI->getType(Res) == MRI->getType(Op0) &&
147 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
148
Tim Northover0f140c72016-09-09 11:46:34 +0000149 return buildInstr(TargetOpcode::G_MUL)
Tim Northovercecee562016-08-26 17:46:13 +0000150 .addDef(Res)
151 .addUse(Op0)
152 .addUse(Op1);
153}
154
Tim Northovera51575f2016-07-29 17:43:52 +0000155MachineInstrBuilder MachineIRBuilder::buildBr(MachineBasicBlock &Dest) {
Tim Northover0f140c72016-09-09 11:46:34 +0000156 return buildInstr(TargetOpcode::G_BR).addMBB(&Dest);
Tim Northovercc5f7622016-07-26 16:45:26 +0000157}
158
Tim Northovera51575f2016-07-29 17:43:52 +0000159MachineInstrBuilder MachineIRBuilder::buildCopy(unsigned Res, unsigned Op) {
160 return buildInstr(TargetOpcode::COPY).addDef(Res).addUse(Op);
Tim Northover756eca32016-07-26 16:45:30 +0000161}
162
Tim Northover9267ac52016-12-05 21:47:07 +0000163MachineInstrBuilder MachineIRBuilder::buildConstant(unsigned Res,
164 const ConstantInt &Val) {
165 LLT Ty = MRI->getType(Res);
Tim Northover1f8b1db2016-09-09 11:46:58 +0000166
Sam McCall03435f52016-12-06 10:14:36 +0000167 assert((Ty.isScalar() || Ty.isPointer()) && "invalid operand type");
Tim Northover9267ac52016-12-05 21:47:07 +0000168
169 const ConstantInt *NewVal = &Val;
170 if (Ty.getSizeInBits() != Val.getBitWidth())
171 NewVal = ConstantInt::get(MF->getFunction()->getContext(),
172 Val.getValue().sextOrTrunc(Ty.getSizeInBits()));
173
174 return buildInstr(TargetOpcode::G_CONSTANT).addDef(Res).addCImm(NewVal);
175}
176
177MachineInstrBuilder MachineIRBuilder::buildConstant(unsigned Res,
178 int64_t Val) {
179 auto IntN = IntegerType::get(MF->getFunction()->getContext(),
180 MRI->getType(Res).getSizeInBits());
181 ConstantInt *CI = ConstantInt::get(IntN, Val, true);
182 return buildConstant(Res, *CI);
Tim Northover9656f142016-08-04 20:54:13 +0000183}
184
Tim Northover0f140c72016-09-09 11:46:34 +0000185MachineInstrBuilder MachineIRBuilder::buildFConstant(unsigned Res,
186 const ConstantFP &Val) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000187 assert(MRI->getType(Res).isScalar() && "invalid operand type");
188
Tim Northover0f140c72016-09-09 11:46:34 +0000189 return buildInstr(TargetOpcode::G_FCONSTANT).addDef(Res).addFPImm(&Val);
Tim Northoverb16734f2016-08-19 20:09:15 +0000190}
191
Tim Northover0f140c72016-09-09 11:46:34 +0000192MachineInstrBuilder MachineIRBuilder::buildBrCond(unsigned Tst,
Tim Northover69c2ba52016-07-29 17:58:00 +0000193 MachineBasicBlock &Dest) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000194 assert(MRI->getType(Tst).isScalar() && "invalid operand type");
195
Tim Northover0f140c72016-09-09 11:46:34 +0000196 return buildInstr(TargetOpcode::G_BRCOND).addUse(Tst).addMBB(&Dest);
Tim Northover69c2ba52016-07-29 17:58:00 +0000197}
198
Tim Northover0f140c72016-09-09 11:46:34 +0000199MachineInstrBuilder MachineIRBuilder::buildLoad(unsigned Res, unsigned Addr,
200 MachineMemOperand &MMO) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000201 assert(MRI->getType(Res).isValid() && "invalid operand type");
202 assert(MRI->getType(Addr).isPointer() && "invalid operand type");
203
Tim Northover0f140c72016-09-09 11:46:34 +0000204 return buildInstr(TargetOpcode::G_LOAD)
Tim Northovera51575f2016-07-29 17:43:52 +0000205 .addDef(Res)
206 .addUse(Addr)
207 .addMemOperand(&MMO);
Tim Northoverad2b7172016-07-26 20:23:26 +0000208}
209
Tim Northover0f140c72016-09-09 11:46:34 +0000210MachineInstrBuilder MachineIRBuilder::buildStore(unsigned Val, unsigned Addr,
211 MachineMemOperand &MMO) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000212 assert(MRI->getType(Val).isValid() && "invalid operand type");
213 assert(MRI->getType(Addr).isPointer() && "invalid operand type");
214
Tim Northover0f140c72016-09-09 11:46:34 +0000215 return buildInstr(TargetOpcode::G_STORE)
Tim Northovera51575f2016-07-29 17:43:52 +0000216 .addUse(Val)
217 .addUse(Addr)
218 .addMemOperand(&MMO);
Tim Northoverad2b7172016-07-26 20:23:26 +0000219}
220
Tim Northover0f140c72016-09-09 11:46:34 +0000221MachineInstrBuilder MachineIRBuilder::buildUAdde(unsigned Res,
222 unsigned CarryOut,
223 unsigned Op0, unsigned Op1,
224 unsigned CarryIn) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000225 assert(MRI->getType(Res).isScalar() && "invalid operand type");
226 assert(MRI->getType(Res) == MRI->getType(Op0) &&
227 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch");
228 assert(MRI->getType(CarryOut).isScalar() && "invalid operand type");
229 assert(MRI->getType(CarryOut) == MRI->getType(CarryIn) && "type mismatch");
230
Tim Northover0f140c72016-09-09 11:46:34 +0000231 return buildInstr(TargetOpcode::G_UADDE)
Tim Northover9656f142016-08-04 20:54:13 +0000232 .addDef(Res)
233 .addDef(CarryOut)
234 .addUse(Op0)
235 .addUse(Op1)
236 .addUse(CarryIn);
237}
238
Tim Northover0f140c72016-09-09 11:46:34 +0000239MachineInstrBuilder MachineIRBuilder::buildAnyExt(unsigned Res, unsigned Op) {
240 validateTruncExt(Res, Op, true);
241 return buildInstr(TargetOpcode::G_ANYEXT).addDef(Res).addUse(Op);
Tim Northover32335812016-08-04 18:35:11 +0000242}
243
Tim Northover0f140c72016-09-09 11:46:34 +0000244MachineInstrBuilder MachineIRBuilder::buildSExt(unsigned Res, unsigned Op) {
245 validateTruncExt(Res, Op, true);
246 return buildInstr(TargetOpcode::G_SEXT).addDef(Res).addUse(Op);
Tim Northover6cd4b232016-08-23 21:01:26 +0000247}
248
Tim Northover0f140c72016-09-09 11:46:34 +0000249MachineInstrBuilder MachineIRBuilder::buildZExt(unsigned Res, unsigned Op) {
250 validateTruncExt(Res, Op, true);
251 return buildInstr(TargetOpcode::G_ZEXT).addDef(Res).addUse(Op);
Tim Northover6cd4b232016-08-23 21:01:26 +0000252}
253
Tim Northovera7653b32016-09-12 11:20:22 +0000254MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc(unsigned Res,
255 unsigned Op) {
256 unsigned Opcode = TargetOpcode::COPY;
257 if (MRI->getType(Res).getSizeInBits() > MRI->getType(Op).getSizeInBits())
258 Opcode = TargetOpcode::G_SEXT;
259 else if (MRI->getType(Res).getSizeInBits() < MRI->getType(Op).getSizeInBits())
260 Opcode = TargetOpcode::G_TRUNC;
261
262 return buildInstr(Opcode).addDef(Res).addUse(Op);
263}
264
Tim Northover0f140c72016-09-09 11:46:34 +0000265MachineInstrBuilder MachineIRBuilder::buildExtract(ArrayRef<unsigned> Results,
Tim Northover26b76f22016-08-19 18:32:14 +0000266 ArrayRef<uint64_t> Indices,
Tim Northover0f140c72016-09-09 11:46:34 +0000267 unsigned Src) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000268#ifndef NDEBUG
Tim Northover0f140c72016-09-09 11:46:34 +0000269 assert(Results.size() == Indices.size() && "inconsistent number of regs");
Tim Northover26b76f22016-08-19 18:32:14 +0000270 assert(!Results.empty() && "invalid trivial extract");
Tim Northover991b12b2016-08-30 20:51:25 +0000271 assert(std::is_sorted(Indices.begin(), Indices.end()) &&
272 "extract offsets must be in ascending order");
Tim Northover33b07d62016-07-22 20:03:43 +0000273
Tim Northover1f8b1db2016-09-09 11:46:58 +0000274 assert(MRI->getType(Src).isValid() && "invalid operand type");
275 for (auto Res : Results)
276 assert(MRI->getType(Res).isValid() && "invalid operand type");
277#endif
278
Tim Northover26b76f22016-08-19 18:32:14 +0000279 auto MIB = BuildMI(getMF(), DL, getTII().get(TargetOpcode::G_EXTRACT));
Tim Northover33b07d62016-07-22 20:03:43 +0000280 for (auto Res : Results)
Tim Northovera51575f2016-07-29 17:43:52 +0000281 MIB.addDef(Res);
Tim Northover33b07d62016-07-22 20:03:43 +0000282
Tim Northovera51575f2016-07-29 17:43:52 +0000283 MIB.addUse(Src);
Tim Northover33b07d62016-07-22 20:03:43 +0000284
Tim Northover26b76f22016-08-19 18:32:14 +0000285 for (auto Idx : Indices)
Tim Northover33b07d62016-07-22 20:03:43 +0000286 MIB.addImm(Idx);
Tim Northover26b76f22016-08-19 18:32:14 +0000287
288 getMBB().insert(getInsertPt(), MIB);
Tim Northover438c77c2016-08-25 17:37:32 +0000289 if (InsertedInstr)
290 InsertedInstr(MIB);
Tim Northover26b76f22016-08-19 18:32:14 +0000291
Tim Northovera51575f2016-07-29 17:43:52 +0000292 return MIB;
Tim Northover33b07d62016-07-22 20:03:43 +0000293}
294
Tim Northover91c81732016-08-19 17:17:06 +0000295MachineInstrBuilder
Tim Northover0f140c72016-09-09 11:46:34 +0000296MachineIRBuilder::buildSequence(unsigned Res,
Tim Northover91c81732016-08-19 17:17:06 +0000297 ArrayRef<unsigned> Ops,
Tim Northoverb18ea162016-09-20 15:20:36 +0000298 ArrayRef<uint64_t> Indices) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000299#ifndef NDEBUG
Tim Northover0f140c72016-09-09 11:46:34 +0000300 assert(Ops.size() == Indices.size() && "incompatible args");
Tim Northover26b76f22016-08-19 18:32:14 +0000301 assert(!Ops.empty() && "invalid trivial sequence");
Tim Northover991b12b2016-08-30 20:51:25 +0000302 assert(std::is_sorted(Indices.begin(), Indices.end()) &&
303 "sequence offsets must be in ascending order");
Tim Northover91c81732016-08-19 17:17:06 +0000304
Tim Northover1f8b1db2016-09-09 11:46:58 +0000305 assert(MRI->getType(Res).isValid() && "invalid operand type");
306 for (auto Op : Ops)
307 assert(MRI->getType(Op).isValid() && "invalid operand type");
308#endif
309
Tim Northover0f140c72016-09-09 11:46:34 +0000310 MachineInstrBuilder MIB = buildInstr(TargetOpcode::G_SEQUENCE);
Tim Northovera51575f2016-07-29 17:43:52 +0000311 MIB.addDef(Res);
Tim Northover91c81732016-08-19 17:17:06 +0000312 for (unsigned i = 0; i < Ops.size(); ++i) {
313 MIB.addUse(Ops[i]);
Tim Northover26b76f22016-08-19 18:32:14 +0000314 MIB.addImm(Indices[i]);
Tim Northover91c81732016-08-19 17:17:06 +0000315 }
Tim Northovera51575f2016-07-29 17:43:52 +0000316 return MIB;
Tim Northover33b07d62016-07-22 20:03:43 +0000317}
Tim Northover5fb414d2016-07-29 22:32:36 +0000318
Tim Northover0f140c72016-09-09 11:46:34 +0000319MachineInstrBuilder MachineIRBuilder::buildIntrinsic(Intrinsic::ID ID,
Tim Northover5fb414d2016-07-29 22:32:36 +0000320 unsigned Res,
321 bool HasSideEffects) {
322 auto MIB =
323 buildInstr(HasSideEffects ? TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS
Tim Northover0f140c72016-09-09 11:46:34 +0000324 : TargetOpcode::G_INTRINSIC);
Tim Northover5fb414d2016-07-29 22:32:36 +0000325 if (Res)
326 MIB.addDef(Res);
327 MIB.addIntrinsicID(ID);
328 return MIB;
329}
Tim Northover32335812016-08-04 18:35:11 +0000330
Tim Northover0f140c72016-09-09 11:46:34 +0000331MachineInstrBuilder MachineIRBuilder::buildTrunc(unsigned Res, unsigned Op) {
332 validateTruncExt(Res, Op, false);
333 return buildInstr(TargetOpcode::G_TRUNC).addDef(Res).addUse(Op);
Tim Northover32335812016-08-04 18:35:11 +0000334}
Tim Northoverde3aea0412016-08-17 20:25:25 +0000335
Tim Northover0f140c72016-09-09 11:46:34 +0000336MachineInstrBuilder MachineIRBuilder::buildFPTrunc(unsigned Res, unsigned Op) {
337 validateTruncExt(Res, Op, false);
338 return buildInstr(TargetOpcode::G_FPTRUNC).addDef(Res).addUse(Op);
Tim Northovera11be042016-08-19 22:40:08 +0000339}
340
Tim Northover0f140c72016-09-09 11:46:34 +0000341MachineInstrBuilder MachineIRBuilder::buildICmp(CmpInst::Predicate Pred,
Tim Northoverde3aea0412016-08-17 20:25:25 +0000342 unsigned Res, unsigned Op0,
343 unsigned Op1) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000344#ifndef NDEBUG
Tim Northover1f8b1db2016-09-09 11:46:58 +0000345 assert(MRI->getType(Op0) == MRI->getType(Op0) && "type mismatch");
346 assert(CmpInst::isIntPredicate(Pred) && "invalid predicate");
Tim Northover4cf0a482016-09-15 10:40:38 +0000347 if (MRI->getType(Op0).isScalar() || MRI->getType(Op0).isPointer())
Tim Northover1f8b1db2016-09-09 11:46:58 +0000348 assert(MRI->getType(Res).isScalar() && "type mismatch");
349 else
350 assert(MRI->getType(Res).isVector() &&
351 MRI->getType(Res).getNumElements() ==
352 MRI->getType(Op0).getNumElements() &&
353 "type mismatch");
354#endif
355
Tim Northover0f140c72016-09-09 11:46:34 +0000356 return buildInstr(TargetOpcode::G_ICMP)
Tim Northoverde3aea0412016-08-17 20:25:25 +0000357 .addDef(Res)
358 .addPredicate(Pred)
359 .addUse(Op0)
360 .addUse(Op1);
361}
Tim Northover5a28c362016-08-19 20:09:07 +0000362
Tim Northover0f140c72016-09-09 11:46:34 +0000363MachineInstrBuilder MachineIRBuilder::buildFCmp(CmpInst::Predicate Pred,
Tim Northoverd5c23bc2016-08-19 20:48:16 +0000364 unsigned Res, unsigned Op0,
365 unsigned Op1) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000366#ifndef NDEBUG
367 assert((MRI->getType(Op0).isScalar() || MRI->getType(Op0).isVector()) &&
368 "invalid operand type");
369 assert(MRI->getType(Op0) == MRI->getType(Op1) && "type mismatch");
370 assert(CmpInst::isFPPredicate(Pred) && "invalid predicate");
371 if (MRI->getType(Op0).isScalar())
372 assert(MRI->getType(Res).isScalar() && "type mismatch");
373 else
374 assert(MRI->getType(Res).isVector() &&
375 MRI->getType(Res).getNumElements() ==
376 MRI->getType(Op0).getNumElements() &&
377 "type mismatch");
378#endif
379
Tim Northover0f140c72016-09-09 11:46:34 +0000380 return buildInstr(TargetOpcode::G_FCMP)
Tim Northoverd5c23bc2016-08-19 20:48:16 +0000381 .addDef(Res)
382 .addPredicate(Pred)
383 .addUse(Op0)
384 .addUse(Op1);
385}
386
Tim Northover0f140c72016-09-09 11:46:34 +0000387MachineInstrBuilder MachineIRBuilder::buildSelect(unsigned Res, unsigned Tst,
Tim Northover5a28c362016-08-19 20:09:07 +0000388 unsigned Op0, unsigned Op1) {
Tim Northover1f8b1db2016-09-09 11:46:58 +0000389#ifndef NDEBUG
Tim Northoverf50f2f32016-12-06 18:38:34 +0000390 LLT ResTy = MRI->getType(Res);
391 assert((ResTy.isScalar() || ResTy.isVector() || ResTy.isPointer()) &&
Tim Northover1f8b1db2016-09-09 11:46:58 +0000392 "invalid operand type");
Tim Northoverf50f2f32016-12-06 18:38:34 +0000393 assert(ResTy == MRI->getType(Op0) && ResTy == MRI->getType(Op1) &&
394 "type mismatch");
395 if (ResTy.isScalar() || ResTy.isPointer())
Tim Northover1f8b1db2016-09-09 11:46:58 +0000396 assert(MRI->getType(Tst).isScalar() && "type mismatch");
397 else
398 assert(MRI->getType(Tst).isVector() &&
399 MRI->getType(Tst).getNumElements() ==
400 MRI->getType(Op0).getNumElements() &&
401 "type mismatch");
402#endif
403
Tim Northover0f140c72016-09-09 11:46:34 +0000404 return buildInstr(TargetOpcode::G_SELECT)
Tim Northover5a28c362016-08-19 20:09:07 +0000405 .addDef(Res)
406 .addUse(Tst)
407 .addUse(Op0)
408 .addUse(Op1);
409}
Tim Northoverbdf67c92016-08-23 21:01:33 +0000410
Tim Northover0f140c72016-09-09 11:46:34 +0000411void MachineIRBuilder::validateTruncExt(unsigned Dst, unsigned Src,
412 bool IsExtend) {
Richard Smith418237b2016-08-23 22:14:15 +0000413#ifndef NDEBUG
Tim Northover0f140c72016-09-09 11:46:34 +0000414 LLT SrcTy = MRI->getType(Src);
415 LLT DstTy = MRI->getType(Dst);
Tim Northoverbdf67c92016-08-23 21:01:33 +0000416
417 if (DstTy.isVector()) {
418 assert(SrcTy.isVector() && "mismatched cast between vecot and non-vector");
419 assert(SrcTy.getNumElements() == DstTy.getNumElements() &&
420 "different number of elements in a trunc/ext");
421 } else
422 assert(DstTy.isScalar() && SrcTy.isScalar() && "invalid extend/trunc");
423
424 if (IsExtend)
425 assert(DstTy.getSizeInBits() > SrcTy.getSizeInBits() &&
426 "invalid narrowing extend");
427 else
428 assert(DstTy.getSizeInBits() < SrcTy.getSizeInBits() &&
429 "invalid widening trunc");
Richard Smith418237b2016-08-23 22:14:15 +0000430#endif
Tim Northoverbdf67c92016-08-23 21:01:33 +0000431}