blob: 46812e7ebd5ed2201e35803ee5e9ceb61b0a3277 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -07001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -070014/include/ "msm8226-ion.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -080015/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -070016/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -070017/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -070018/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -070019/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -070020/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -080021/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -080022/include/ "msm8226-coresight.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070023
24/ {
25 model = "Qualcomm MSM 8226";
26 compatible = "qcom,msm8226";
27 interrupt-parent = <&intc>;
28
29 intc: interrupt-controller@f9000000 {
30 compatible = "qcom,msm-qgic2";
31 interrupt-controller;
32 #interrupt-cells = <3>;
33 reg = <0xF9000000 0x1000>,
34 <0xF9002000 0x1000>;
35 };
36
37 msmgpio: gpio@fd510000 {
38 compatible = "qcom,msm-gpio";
39 interrupt-controller;
40 #interrupt-cells = <2>;
41 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080042 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070043 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080044 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080045 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080046 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070047 };
48
Gilad Avidovd59217c2013-02-01 13:45:59 -070049 aliases {
50 spi0 = &spi_0;
51 };
52
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070053 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080054 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070055 interrupts = <1 2 0 1 3 0>;
56 clock-frequency = <19200000>;
57 };
58
59 serial@f991f000 {
60 compatible = "qcom,msm-lsuart-v14";
61 reg = <0xf991f000 0x1000>;
62 interrupts = <0 109 0>;
63 status = "disabled";
64 };
65
66 serial@f995e000 {
67 compatible = "qcom,msm-lsuart-v14";
68 reg = <0xf995e000 0x1000>;
69 interrupts = <0 114 0>;
70 status = "disabled";
71 };
72
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -080073 qcom,msm-imem@fe805000 {
74 compatible = "qcom,msm-imem";
75 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
76 };
77
Yan He7c06ce32012-12-03 17:12:31 -080078 qcom,sps@f9984000 {
79 compatible = "qcom,msm_sps";
80 reg = <0xf9984000 0x15000>,
81 <0xf9999000 0xb000>;
82 interrupts = <0 94 0>;
83 };
84
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070085 usb@f9a55000 {
86 compatible = "qcom,hsusb-otg";
87 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +053088 interrupts = <0 134 0>, <0 140 0>;
89 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +053090 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -080091 HSUSB_1p8-supply = <&pm8226_l10>;
92 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +053093 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070094
95 qcom,hsusb-otg-phy-type = <2>;
96 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -080097 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070098 qcom,hsusb-otg-disable-reset;
Mayank Rana5403e2a2013-02-26 11:18:39 +053099
100 qcom,msm-bus,name = "usb2";
101 qcom,msm-bus,num-cases = <2>;
102 qcom,msm-bus,active-only = <0>;
103 qcom,msm-bus,num-paths = <1>;
104 qcom,msm-bus,vectors-KBps =
105 <87 512 0 0>,
106 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700107 };
108
Mayank Rana6bd9a272013-01-29 16:23:23 +0530109 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700110 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530111 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700112 };
113
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800114 wcd9xxx_intc: wcd9xxx-irq {
115 compatible = "qcom,wcd9xxx-irq";
116 interrupt-controller;
117 #interrupt-cells = <1>;
118 interrupt-parent = <&msmgpio>;
119 interrupts = <68 0>;
120 interrupt-names = "cdc-int";
121 };
122
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800123 slim@fe12f000 {
124 cell-index = <1>;
125 compatible = "qcom,slim-ngd";
126 reg = <0xfe12f000 0x35000>,
127 <0xfe104000 0x20000>;
128 reg-names = "slimbus_physical", "slimbus_bam_physical";
129 interrupts = <0 163 0>, <0 164 0>;
130 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800131
132 tapan_codec {
133 compatible = "qcom,tapan-slim-pgd";
134 elemental-addr = [00 01 E0 00 17 02];
135
136 interrupt-parent = <&wcd9xxx_intc>;
137 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
138 17 18 19 20 21 22 23 24 25 26 27 28>;
139 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
140
David Keitel7184c6e2013-02-11 13:23:04 -0800141 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800142 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
143 qcom,cdc-vdd-buck-current = <650000>;
144
David Keitel7184c6e2013-02-11 13:23:04 -0800145 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800146 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
147 qcom,cdc-vdd-h-current = <25000>;
148
David Keitel7184c6e2013-02-11 13:23:04 -0800149 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800150 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
151 qcom,cdc-vdd-px-current = <25000>;
152
David Keitel7184c6e2013-02-11 13:23:04 -0800153 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800154 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
155 qcom,cdc-vdd-a-1p2v-current = <10000>;
156
David Keitel7184c6e2013-02-11 13:23:04 -0800157 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800158 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
159 qcom,cdc-vdd-cx-current = <10000>;
160
161 qcom,cdc-micbias-ldoh-v = <0x3>;
162 qcom,cdc-micbias-cfilt1-mv = <1800>;
163 qcom,cdc-micbias-cfilt2-mv = <1800>;
164 qcom,cdc-micbias-cfilt3-mv = <1800>;
165
166 qcom,cdc-micbias1-cfilt-sel = <0x0>;
167 qcom,cdc-micbias2-cfilt-sel = <0x1>;
168 qcom,cdc-micbias3-cfilt-sel = <0x2>;
169
170 qcom,cdc-mclk-clk-rate = <9600000>;
171 qcom,cdc-slim-ifd = "tapan-slim-ifd";
172 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
173 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800174 };
175
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800176 qcom,msm-adsp-loader {
177 compatible = "qcom,adsp-loader";
178 qcom,adsp-state = <0>;
179 };
180
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800181 sound {
182 compatible = "qcom,msm8226-audio-tapan";
183 qcom,model = "msm8226-tapan-snd-card";
184
185 qcom,audio-routing =
186 "RX_BIAS", "MCLK",
187 "LDO_H", "MCLK",
188 "AMIC1", "MIC BIAS1 Internal1",
189 "MIC BIAS1 Internal1", "Handset Mic",
190 "AMIC2", "MIC BIAS2 External",
191 "MIC BIAS2 External", "Headset Mic",
192 "AMIC3", "MIC BIAS2 External",
193 "MIC BIAS2 External", "ANCRight Headset Mic",
194 "AMIC4", "MIC BIAS2 External",
195 "MIC BIAS2 External", "ANCLeft Headset Mic",
196 "DMIC1", "MIC BIAS1 External",
197 "MIC BIAS1 External", "Digital Mic1",
198 "DMIC2", "MIC BIAS1 External",
199 "MIC BIAS1 External", "Digital Mic2",
200 "DMIC3", "MIC BIAS3 External",
201 "MIC BIAS3 External", "Digital Mic3",
202 "DMIC4", "MIC BIAS3 External",
203 "MIC BIAS3 External", "Digital Mic4",
204 "DMIC5", "MIC BIAS4 External",
205 "MIC BIAS4 External", "Digital Mic5",
206 "DMIC6", "MIC BIAS4 External",
207 "MIC BIAS4 External", "Digital Mic6";
208 qcom,tapan-mclk-clk-freq = <9600000>;
209 };
210
211 qcom,msm-pcm {
212 compatible = "qcom,msm-pcm-dsp";
213 };
214
215 qcom,msm-pcm-routing {
216 compatible = "qcom,msm-pcm-routing";
217 };
218
219 qcom,msm-pcm-lpa {
220 compatible = "qcom,msm-pcm-lpa";
221 };
222
223 qcom,msm-compr-dsp {
224 compatible = "qcom,msm-compr-dsp";
225 };
226
227 qcom,msm-voip-dsp {
228 compatible = "qcom,msm-voip-dsp";
229 };
230
231 qcom,msm-pcm-voice {
232 compatible = "qcom,msm-pcm-voice";
233 };
234
235 qcom,msm-stub-codec {
236 compatible = "qcom,msm-stub-codec";
237 };
238
239 qcom,msm-dai-fe {
240 compatible = "qcom,msm-dai-fe";
241 };
242
243 qcom,msm-pcm-afe {
244 compatible = "qcom,msm-pcm-afe";
245 };
246
247 qcom,msm-dai-q6-hdmi {
248 compatible = "qcom,msm-dai-q6-hdmi";
249 qcom,msm-dai-q6-dev-id = <8>;
250 };
251
252 qcom,msm-dai-q6 {
253 compatible = "qcom,msm-dai-q6";
254 qcom,msm-dai-q6-sb-0-rx {
255 compatible = "qcom,msm-dai-q6-dev";
256 qcom,msm-dai-q6-dev-id = <16384>;
257 };
258
259 qcom,msm-dai-q6-sb-0-tx {
260 compatible = "qcom,msm-dai-q6-dev";
261 qcom,msm-dai-q6-dev-id = <16385>;
262 };
263
264 qcom,msm-dai-q6-sb-1-rx {
265 compatible = "qcom,msm-dai-q6-dev";
266 qcom,msm-dai-q6-dev-id = <16386>;
267 };
268
269 qcom,msm-dai-q6-sb-1-tx {
270 compatible = "qcom,msm-dai-q6-dev";
271 qcom,msm-dai-q6-dev-id = <16387>;
272 };
273
274 qcom,msm-dai-q6-sb-3-rx {
275 compatible = "qcom,msm-dai-q6-dev";
276 qcom,msm-dai-q6-dev-id = <16390>;
277 };
278
279 qcom,msm-dai-q6-sb-3-tx {
280 compatible = "qcom,msm-dai-q6-dev";
281 qcom,msm-dai-q6-dev-id = <16391>;
282 };
283
284 qcom,msm-dai-q6-sb-4-rx {
285 compatible = "qcom,msm-dai-q6-dev";
286 qcom,msm-dai-q6-dev-id = <16392>;
287 };
288
289 qcom,msm-dai-q6-sb-4-tx {
290 compatible = "qcom,msm-dai-q6-dev";
291 qcom,msm-dai-q6-dev-id = <16393>;
292 };
293
294 qcom,msm-dai-q6-bt-sco-rx {
295 compatible = "qcom,msm-dai-q6-dev";
296 qcom,msm-dai-q6-dev-id = <12288>;
297 };
298
299 qcom,msm-dai-q6-bt-sco-tx {
300 compatible = "qcom,msm-dai-q6-dev";
301 qcom,msm-dai-q6-dev-id = <12289>;
302 };
303
304 qcom,msm-dai-q6-int-fm-rx {
305 compatible = "qcom,msm-dai-q6-dev";
306 qcom,msm-dai-q6-dev-id = <12292>;
307 };
308
309 qcom,msm-dai-q6-int-fm-tx {
310 compatible = "qcom,msm-dai-q6-dev";
311 qcom,msm-dai-q6-dev-id = <12293>;
312 };
313
314 qcom,msm-dai-q6-be-afe-pcm-rx {
315 compatible = "qcom,msm-dai-q6-dev";
316 qcom,msm-dai-q6-dev-id = <224>;
317 };
318
319 qcom,msm-dai-q6-be-afe-pcm-tx {
320 compatible = "qcom,msm-dai-q6-dev";
321 qcom,msm-dai-q6-dev-id = <225>;
322 };
323
324 qcom,msm-dai-q6-afe-proxy-rx {
325 compatible = "qcom,msm-dai-q6-dev";
326 qcom,msm-dai-q6-dev-id = <241>;
327 };
328
329 qcom,msm-dai-q6-afe-proxy-tx {
330 compatible = "qcom,msm-dai-q6-dev";
331 qcom,msm-dai-q6-dev-id = <240>;
332 };
333 };
334
335 qcom,msm-pcm-hostless {
336 compatible = "qcom,msm-pcm-hostless";
337 };
338
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700339 qcom,wdt@f9017000 {
340 compatible = "qcom,msm-watchdog";
341 reg = <0xf9017000 0x1000>;
342 interrupts = <0 3 0>, <0 4 0>;
343 qcom,bark-time = <11000>;
344 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800345 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700346 };
347
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600348 qcom,smem@fa00000 {
349 compatible = "qcom,smem";
350 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800351 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600352 <0xfc428000 0x4000>;
353 reg-names = "smem", "irq-reg-base", "aux-mem1";
354
355 qcom,smd-modem {
356 compatible = "qcom,smd";
357 qcom,smd-edge = <0>;
358 qcom,smd-irq-offset = <0x8>;
359 qcom,smd-irq-bitmask = <0x1000>;
360 qcom,pil-string = "modem";
361 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800362 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600363
364 qcom,smsm-modem {
365 compatible = "qcom,smsm";
366 qcom,smsm-edge = <0>;
367 qcom,smsm-irq-offset = <0x8>;
368 qcom,smsm-irq-bitmask = <0x2000>;
369 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800370 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600371
372 qcom,smd-adsp {
373 compatible = "qcom,smd";
374 qcom,smd-edge = <1>;
375 qcom,smd-irq-offset = <0x8>;
376 qcom,smd-irq-bitmask = <0x100>;
377 qcom,pil-string = "adsp";
378 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800379 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600380
381 qcom,smsm-adsp {
382 compatible = "qcom,smsm";
383 qcom,smsm-edge = <1>;
384 qcom,smsm-irq-offset = <0x8>;
385 qcom,smsm-irq-bitmask = <0x200>;
386 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800387 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600388
389 qcom,smd-wcnss {
390 compatible = "qcom,smd";
391 qcom,smd-edge = <6>;
392 qcom,smd-irq-offset = <0x8>;
393 qcom,smd-irq-bitmask = <0x20000>;
394 qcom,pil-string = "wcnss";
395 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800396 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600397
398 qcom,smsm-wcnss {
399 compatible = "qcom,smsm";
400 qcom,smsm-edge = <6>;
401 qcom,smsm-irq-offset = <0x8>;
402 qcom,smsm-irq-bitmask = <0x80000>;
403 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800404 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600405
406 qcom,smd-rpm {
407 compatible = "qcom,smd";
408 qcom,smd-edge = <15>;
409 qcom,smd-irq-offset = <0x8>;
410 qcom,smd-irq-bitmask = <0x1>;
411 interrupts = <0 168 1>;
412 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800413 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600414 };
415
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700416 rpm_bus: qcom,rpm-smd {
417 compatible = "qcom,rpm-smd";
418 rpm-channel-name = "rpm_requests";
419 rpm-channel-type = <15>; /* SMD_APPS_RPM */
420 rpm-standalone;
421 };
422
Asutosh Das99912e62012-12-06 12:38:46 +0530423 sdcc1: qcom,sdcc@f9824000 {
424 cell-index = <1>; /* SDC1 eMMC slot */
425 compatible = "qcom,msm-sdcc";
426
Asutosh Das6b82fc52012-11-23 12:00:26 +0530427 reg = <0xf9824000 0x800>,
428 <0xf9824800 0x100>,
429 <0xf9804000 0x7000>;
430 reg-names = "core_mem", "dml_mem", "bam_mem";
431 interrupts = <0 123 0>, <0 137 0>;
432 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530433
434 qcom,bus-width = <8>;
435 status = "disabled";
436 };
437
438 sdcc2: qcom,sdcc@f98a4000 {
439 cell-index = <2>; /* SDC2 SD card slot */
440 compatible = "qcom,msm-sdcc";
441
Asutosh Das6b82fc52012-11-23 12:00:26 +0530442 reg = <0xf98a4000 0x800>,
443 <0xf98a4800 0x100>,
444 <0xf9884000 0x7000>;
445 reg-names = "core_mem", "dml_mem", "bam_mem";
446 interrupts = <0 125 0>, <0 220 0>;
447 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530448
449 qcom,bus-width = <4>;
450 status = "disabled";
451 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700452
453 spmi_bus: qcom,spmi@fc4c0000 {
454 cell-index = <0>;
455 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700456 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700457 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700458 <0Xfc4cb000 0x1000>,
459 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700460 /* 190,ee0_krait_hlos_spmi_periph_irq */
461 /* 187,channel_0_krait_hlos_trans_done_irq */
462 interrupts = <0 190 0>, <0 187 0>;
463 qcom,not-wakeup;
464 qcom,pmic-arb-ee = <0>;
465 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700466 };
467
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700468 i2c@f9926000 { /* BLSP-1 QUP-4 */
469 cell-index = <0>;
470 compatible = "qcom,i2c-qup";
471 reg = <0xf9926000 0x1000>;
472 #address-cells = <1>;
473 #size-cells = <0>;
474 reg-names = "qup_phys_addr";
475 interrupts = <0 98 0>;
476 interrupt-names = "qup_err_intr";
477 qcom,i2c-bus-freq = <100000>;
478 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700479
480 qcom,acpuclk@f9011050 {
481 compatible = "qcom,acpuclk-a7";
482 reg = <0xf9011050 0x8>;
483 reg-names = "rcg_base";
David Keitel7184c6e2013-02-11 13:23:04 -0800484 a7_cpu-supply = <&pm8226_s2>;
485 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700486 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700487
488 qcom,ocmem@fdd00000 {
489 compatible = "qcom,msm-ocmem";
490 reg = <0xfdd00000 0x2000>,
491 <0xfdd02000 0x2000>,
492 <0xfe039000 0x400>,
493 <0xfec00000 0x180000>;
494 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
495 interrupts = <0 76 0 0 77 0>;
496 interrupt-names = "ocmem_irq", "dm_irq";
497 qcom,ocmem-num-regions = <0x1>;
498 qcom,ocmem-num-macros = <0x2>;
499 qcom,resource-type = <0x706d636f>;
500 #address-cells = <1>;
501 #size-cells = <1>;
502 ranges = <0x0 0xfec00000 0x180000>;
503
504 partition@0 {
505 reg = <0x0 0x100000>;
506 qcom,ocmem-part-name = "graphics";
507 qcom,ocmem-part-min = <0x80000>;
508 };
509 };
510
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800511 qcom,venus@fdce0000 {
512 compatible = "qcom,pil-venus";
513 reg = <0xfdce0000 0x4000>,
514 <0xfdc80000 0x400>;
515 reg-names = "wrapper_base", "vbif_base";
516 vdd-supply = <&gdsc_venus>;
517
518 qcom,firmware-name = "venus";
519 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800520
521 qcom,pronto@fb21b000 {
522 compatible = "qcom,pil-pronto";
523 reg = <0xfb21b000 0x3000>,
524 <0xfc401700 0x4>,
525 <0xfd485300 0xc>;
526 reg-names = "pmu_base", "clk_base", "halt_base";
527 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800528 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800529
530 qcom,firmware-name = "wcnss";
531 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800532
Patrick Daly4df59842013-01-09 12:31:40 -0800533 qcom,lpass@fe200000 {
534 compatible = "qcom,pil-q6v5-lpass";
535 reg = <0xfe200000 0x00100>,
536 <0xfd485100 0x00010>;
537 reg-names = "qdsp6_base", "halt_base";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800538 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800539 interrupts = <0 162 1>;
540
541 qcom,firmware-name = "adsp";
542 };
543
Patrick Daly742337f2013-01-29 12:06:06 -0800544 qcom,mss@fc880000 {
545 compatible = "qcom,pil-q6v5-mss";
546 reg = <0xfc880000 0x100>,
547 <0xfd485000 0x400>,
548 <0xfc820000 0x020>,
549 <0xfc401680 0x004>,
550 <0x0d1fc000 0x4000>,
551 <0xfd485194 0x4>;
552 reg-names = "qdsp6_base", "halt_base", "rmb_base",
553 "restart_reg", "metadata_base", "cxrail_bhs_reg";
554
555 interrupts = <0 24 1>;
556 vdd_mss-supply = <&pm8226_s1>;
557 vdd_cx-supply = <&pm8226_s1_corner>;
558 vdd_mx-supply = <&pm8226_l3>;
559 vdd_pll-supply = <&pm8226_l8>;
560 qcom,vdd_pll = <1800000>;
561
562 qcom,is-loadable;
563 qcom,firmware-name = "mba";
564 qcom,pil-self-auth;
565 };
566
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800567 qcom,msm-mem-hole {
568 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800569 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800570 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800571
572 tsens: tsens@fc4a8000 {
573 compatible = "qcom,msm-tsens";
574 reg = <0xfc4a8000 0x2000>,
575 <0xfc4b8000 0x1000>;
576 reg-names = "tsens_physical", "tsens_eeprom_physical";
577 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800578 qcom,sensors = <4>;
579 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800580 qcom,calib-mode = "fuse_map2";
581 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700582
583 qcom,msm-thermal {
584 compatible = "qcom,msm-thermal";
585 qcom,sensor-id = <0>;
586 qcom,poll-ms = <250>;
587 qcom,limit-temp = <60>;
588 qcom,temp-hysteresis = <10>;
589 qcom,freq-step = <2>;
590 };
591
Gilad Avidovd59217c2013-02-01 13:45:59 -0700592 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
593 compatible = "qcom,spi-qup-v2";
594 #address-cells = <1>;
595 #size-cells = <0>;
596 reg-names = "spi_physical", "spi_bam_physical";
597 reg = <0xf9923000 0x1000>,
598 <0xf9904000 0xF000>;
599 interrupt-names = "spi_irq", "spi_bam_irq";
600 interrupts = <0 95 0>, <0 238 0>;
601 spi-max-frequency = <19200000>;
602
603 gpios = <&msmgpio 3 0>, /* CLK */
604 <&msmgpio 1 0>, /* MISO */
605 <&msmgpio 0 0>; /* MOSI */
606 cs-gpios = <&msmgpio 2 0>;
607
608 qcom,infinite-mode = <0>;
609 qcom,use-bam;
610 qcom,ver-reg-exists;
611 qcom,bam-consumer-pipe-index = <12>;
612 qcom,bam-producer-pipe-index = <13>;
613 };
614
Jeff Hugo72e10912013-03-05 11:17:38 -0700615 qcom,bam_dmux@fc834000 {
616 compatible = "qcom,bam_dmux";
617 reg = <0xfc834000 0x7000>;
618 interrupts = <0 29 1>;
619 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800620
621 qcom,msm-rtb {
622 compatible = "qcom,msm-rtb";
623 qcom,memory-reservation-type = "EBI1";
624 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
625 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700626};
David Collins37ddb972012-10-17 15:00:26 -0700627
Patrick Dalye8977aa2012-11-06 15:25:58 -0800628&gdsc_venus {
629 status = "ok";
630};
631
632&gdsc_mdss {
633 status = "ok";
634};
635
636&gdsc_jpeg {
637 status = "ok";
638};
639
640&gdsc_vfe {
641 status = "ok";
642};
643
644&gdsc_oxili_cx {
645 status = "ok";
646};
647
648&gdsc_usb_hsic {
649 status = "ok";
650};
651
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700652/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800653/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800654
655&pm8226_vadc {
656 chan@0 {
657 label = "usb_in";
658 reg = <0>;
659 qcom,decimation = <0>;
660 qcom,pre-div-channel-scaling = <4>;
661 qcom,calibration-type = "absolute";
662 qcom,scale-function = <0>;
663 qcom,hw-settle-time = <0>;
664 qcom,fast-avg-setup = <0>;
665 };
666
667 chan@2 {
668 label = "vchg_sns";
669 reg = <2>;
670 qcom,decimation = <0>;
671 qcom,pre-div-channel-scaling = <3>;
672 qcom,calibration-type = "absolute";
673 qcom,scale-function = <0>;
674 qcom,hw-settle-time = <0>;
675 qcom,fast-avg-setup = <0>;
676 };
677
678 chan@5 {
679 label = "vcoin";
680 reg = <5>;
681 qcom,decimation = <0>;
682 qcom,pre-div-channel-scaling = <1>;
683 qcom,calibration-type = "absolute";
684 qcom,scale-function = <0>;
685 qcom,hw-settle-time = <0>;
686 qcom,fast-avg-setup = <0>;
687 };
688
689 chan@6 {
690 label = "vbat_sns";
691 reg = <6>;
692 qcom,decimation = <0>;
693 qcom,pre-div-channel-scaling = <1>;
694 qcom,calibration-type = "absolute";
695 qcom,scale-function = <0>;
696 qcom,hw-settle-time = <0>;
697 qcom,fast-avg-setup = <0>;
698 };
699
700 chan@7 {
701 label = "vph_pwr";
702 reg = <7>;
703 qcom,decimation = <0>;
704 qcom,pre-div-channel-scaling = <1>;
705 qcom,calibration-type = "absolute";
706 qcom,scale-function = <0>;
707 qcom,hw-settle-time = <0>;
708 qcom,fast-avg-setup = <0>;
709 };
710
711 chan@30 {
712 label = "batt_therm";
713 reg = <0x30>;
714 qcom,decimation = <0>;
715 qcom,pre-div-channel-scaling = <0>;
716 qcom,calibration-type = "ratiometric";
717 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800718 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800719 qcom,fast-avg-setup = <0>;
720 };
721
722 chan@31 {
723 label = "batt_id";
724 reg = <0x31>;
725 qcom,decimation = <0>;
726 qcom,pre-div-channel-scaling = <0>;
727 qcom,calibration-type = "ratiometric";
728 qcom,scale-function = <0>;
729 qcom,hw-settle-time = <2>;
730 qcom,fast-avg-setup = <0>;
731 };
732
733 chan@b2 {
734 label = "xo_therm_pu2";
735 reg = <0xb2>;
736 qcom,decimation = <0>;
737 qcom,pre-div-channel-scaling = <0>;
738 qcom,calibration-type = "ratiometric";
739 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800740 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800741 qcom,fast-avg-setup = <0>;
742 };
David Keitelc51a7e52013-03-02 00:14:48 -0800743
744};
745
746&pm8226_chg {
747 status = "ok";
748
749 qcom,chg-charging-disabled;
750 qcom,chg-use-default-batt-values;
751
752 qcom,chg-chgr@1000 {
753 status = "ok";
754 };
755
756 qcom,chg-buck@1100 {
757 status = "ok";
758 };
759
760 qcom,chg-usb-chgpth@1300 {
761 status = "ok";
762 };
763
764 qcom,chg-boost@1500 {
765 status = "ok";
766 };
767
768 qcom,chg-misc@1600 {
769 status = "ok";
770 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800771};