Alkis Evlogimenos | 34d9bc9 | 2004-02-23 23:08:11 +0000 | [diff] [blame] | 1 | //===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the LLVM research group and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 10 | // This file implements the VirtRegMap class. |
| 11 | // |
| 12 | // It also contains implementations of the the Spiller interface, which, given a |
| 13 | // virtual register map and a machine function, eliminates all virtual |
| 14 | // references by replacing them with physical register references - adding spill |
Alkis Evlogimenos | 0d6c5b6 | 2004-02-24 08:58:30 +0000 | [diff] [blame] | 15 | // code as necessary. |
Alkis Evlogimenos | 34d9bc9 | 2004-02-23 23:08:11 +0000 | [diff] [blame] | 16 | // |
| 17 | //===----------------------------------------------------------------------===// |
| 18 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 19 | #define DEBUG_TYPE "spiller" |
Alkis Evlogimenos | 34d9bc9 | 2004-02-23 23:08:11 +0000 | [diff] [blame] | 20 | #include "VirtRegMap.h" |
Alkis Evlogimenos | 0d6c5b6 | 2004-02-24 08:58:30 +0000 | [diff] [blame] | 21 | #include "llvm/Function.h" |
Alkis Evlogimenos | 34d9bc9 | 2004-02-23 23:08:11 +0000 | [diff] [blame] | 22 | #include "llvm/CodeGen/MachineFrameInfo.h" |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 23 | #include "llvm/CodeGen/MachineFunction.h" |
| 24 | #include "llvm/CodeGen/SSARegMap.h" |
Alkis Evlogimenos | 34d9bc9 | 2004-02-23 23:08:11 +0000 | [diff] [blame] | 25 | #include "llvm/Target/TargetMachine.h" |
Alkis Evlogimenos | 0d6c5b6 | 2004-02-24 08:58:30 +0000 | [diff] [blame] | 26 | #include "llvm/Target/TargetInstrInfo.h" |
Reid Spencer | 551ccae | 2004-09-01 22:55:40 +0000 | [diff] [blame] | 27 | #include "llvm/Support/CommandLine.h" |
| 28 | #include "llvm/Support/Debug.h" |
Reid Spencer | 551ccae | 2004-09-01 22:55:40 +0000 | [diff] [blame] | 29 | #include "llvm/ADT/Statistic.h" |
| 30 | #include "llvm/ADT/STLExtras.h" |
Chris Lattner | 27f2916 | 2004-10-26 15:35:58 +0000 | [diff] [blame] | 31 | #include <algorithm> |
Chris Lattner | 2c2c6c6 | 2006-01-22 23:41:00 +0000 | [diff] [blame] | 32 | #include <iostream> |
Alkis Evlogimenos | 34d9bc9 | 2004-02-23 23:08:11 +0000 | [diff] [blame] | 33 | using namespace llvm; |
| 34 | |
| 35 | namespace { |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 36 | Statistic<> NumSpills("spiller", "Number of register spills"); |
| 37 | Statistic<> NumStores("spiller", "Number of stores added"); |
| 38 | Statistic<> NumLoads ("spiller", "Number of loads added"); |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 39 | Statistic<> NumReused("spiller", "Number of values reused"); |
Chris Lattner | 52b25db | 2004-10-01 19:47:12 +0000 | [diff] [blame] | 40 | Statistic<> NumDSE ("spiller", "Number of dead stores elided"); |
Chris Lattner | 1118d25 | 2006-02-03 02:02:59 +0000 | [diff] [blame] | 41 | Statistic<> NumDCE ("spiller", "Number of copies elided"); |
Alkis Evlogimenos | 0d6c5b6 | 2004-02-24 08:58:30 +0000 | [diff] [blame] | 42 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 43 | enum SpillerName { simple, local }; |
Alkis Evlogimenos | dd420e0 | 2004-03-01 23:18:15 +0000 | [diff] [blame] | 44 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 45 | cl::opt<SpillerName> |
| 46 | SpillerOpt("spiller", |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 47 | cl::desc("Spiller to use: (default: local)"), |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 48 | cl::Prefix, |
| 49 | cl::values(clEnumVal(simple, " simple spiller"), |
| 50 | clEnumVal(local, " local spiller"), |
| 51 | clEnumValEnd), |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 52 | cl::init(local)); |
Alkis Evlogimenos | 34d9bc9 | 2004-02-23 23:08:11 +0000 | [diff] [blame] | 53 | } |
| 54 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 55 | //===----------------------------------------------------------------------===// |
| 56 | // VirtRegMap implementation |
| 57 | //===----------------------------------------------------------------------===// |
| 58 | |
| 59 | void VirtRegMap::grow() { |
Chris Lattner | 7f690e6 | 2004-09-30 02:15:18 +0000 | [diff] [blame] | 60 | Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg()); |
| 61 | Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg()); |
Alkis Evlogimenos | 34d9bc9 | 2004-02-23 23:08:11 +0000 | [diff] [blame] | 62 | } |
| 63 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 64 | int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { |
| 65 | assert(MRegisterInfo::isVirtualRegister(virtReg)); |
Chris Lattner | 7f690e6 | 2004-09-30 02:15:18 +0000 | [diff] [blame] | 66 | assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 67 | "attempt to assign stack slot to already spilled register"); |
Chris Lattner | 7f690e6 | 2004-09-30 02:15:18 +0000 | [diff] [blame] | 68 | const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg); |
| 69 | int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(), |
| 70 | RC->getAlignment()); |
| 71 | Virt2StackSlotMap[virtReg] = frameIndex; |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 72 | ++NumSpills; |
| 73 | return frameIndex; |
| 74 | } |
| 75 | |
| 76 | void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) { |
| 77 | assert(MRegisterInfo::isVirtualRegister(virtReg)); |
Chris Lattner | 7f690e6 | 2004-09-30 02:15:18 +0000 | [diff] [blame] | 78 | assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 79 | "attempt to assign stack slot to already spilled register"); |
Chris Lattner | 7f690e6 | 2004-09-30 02:15:18 +0000 | [diff] [blame] | 80 | Virt2StackSlotMap[virtReg] = frameIndex; |
Alkis Evlogimenos | 38af59a | 2004-05-29 20:38:05 +0000 | [diff] [blame] | 81 | } |
| 82 | |
Chris Lattner | bec6a9e | 2004-10-01 23:15:36 +0000 | [diff] [blame] | 83 | void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, |
| 84 | unsigned OpNo, MachineInstr *NewMI) { |
| 85 | // Move previous memory references folded to new instruction. |
| 86 | MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI); |
Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 87 | for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI), |
Chris Lattner | bec6a9e | 2004-10-01 23:15:36 +0000 | [diff] [blame] | 88 | E = MI2VirtMap.end(); I != E && I->first == OldMI; ) { |
| 89 | MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second)); |
Chris Lattner | dbea973 | 2004-09-30 16:35:08 +0000 | [diff] [blame] | 90 | MI2VirtMap.erase(I++); |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 91 | } |
Chris Lattner | dbea973 | 2004-09-30 16:35:08 +0000 | [diff] [blame] | 92 | |
Chris Lattner | bec6a9e | 2004-10-01 23:15:36 +0000 | [diff] [blame] | 93 | ModRef MRInfo; |
| 94 | if (!OldMI->getOperand(OpNo).isDef()) { |
| 95 | assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?"); |
| 96 | MRInfo = isRef; |
| 97 | } else { |
| 98 | MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod; |
| 99 | } |
Alkis Evlogimenos | 5f37502 | 2004-03-01 20:05:10 +0000 | [diff] [blame] | 100 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 101 | // add new memory reference |
Chris Lattner | bec6a9e | 2004-10-01 23:15:36 +0000 | [diff] [blame] | 102 | MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo))); |
Alkis Evlogimenos | 5f37502 | 2004-03-01 20:05:10 +0000 | [diff] [blame] | 103 | } |
| 104 | |
Chris Lattner | 7f690e6 | 2004-09-30 02:15:18 +0000 | [diff] [blame] | 105 | void VirtRegMap::print(std::ostream &OS) const { |
| 106 | const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo(); |
Alkis Evlogimenos | 34d9bc9 | 2004-02-23 23:08:11 +0000 | [diff] [blame] | 107 | |
Chris Lattner | 7f690e6 | 2004-09-30 02:15:18 +0000 | [diff] [blame] | 108 | OS << "********** REGISTER MAP **********\n"; |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 109 | for (unsigned i = MRegisterInfo::FirstVirtualRegister, |
Chris Lattner | 7f690e6 | 2004-09-30 02:15:18 +0000 | [diff] [blame] | 110 | e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) { |
| 111 | if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) |
| 112 | OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n"; |
Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 113 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 114 | } |
| 115 | |
| 116 | for (unsigned i = MRegisterInfo::FirstVirtualRegister, |
Chris Lattner | 7f690e6 | 2004-09-30 02:15:18 +0000 | [diff] [blame] | 117 | e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) |
| 118 | if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT) |
| 119 | OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n"; |
| 120 | OS << '\n'; |
Alkis Evlogimenos | 34d9bc9 | 2004-02-23 23:08:11 +0000 | [diff] [blame] | 121 | } |
Alkis Evlogimenos | 0d6c5b6 | 2004-02-24 08:58:30 +0000 | [diff] [blame] | 122 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 123 | void VirtRegMap::dump() const { print(std::cerr); } |
Alkis Evlogimenos | dd420e0 | 2004-03-01 23:18:15 +0000 | [diff] [blame] | 124 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 125 | |
| 126 | //===----------------------------------------------------------------------===// |
| 127 | // Simple Spiller Implementation |
| 128 | //===----------------------------------------------------------------------===// |
| 129 | |
| 130 | Spiller::~Spiller() {} |
Alkis Evlogimenos | dd420e0 | 2004-03-01 23:18:15 +0000 | [diff] [blame] | 131 | |
Alkis Evlogimenos | 0d6c5b6 | 2004-02-24 08:58:30 +0000 | [diff] [blame] | 132 | namespace { |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 133 | struct SimpleSpiller : public Spiller { |
| 134 | bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap &VRM); |
| 135 | }; |
Alkis Evlogimenos | 0d6c5b6 | 2004-02-24 08:58:30 +0000 | [diff] [blame] | 136 | } |
| 137 | |
Chris Lattner | b0f31bf | 2005-01-23 22:45:13 +0000 | [diff] [blame] | 138 | bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, |
| 139 | const VirtRegMap &VRM) { |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 140 | DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n"); |
| 141 | DEBUG(std::cerr << "********** Function: " |
| 142 | << MF.getFunction()->getName() << '\n'); |
Chris Lattner | b0f31bf | 2005-01-23 22:45:13 +0000 | [diff] [blame] | 143 | const TargetMachine &TM = MF.getTarget(); |
| 144 | const MRegisterInfo &MRI = *TM.getRegisterInfo(); |
| 145 | bool *PhysRegsUsed = MF.getUsedPhysregs(); |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 146 | |
Chris Lattner | 4ea1b82 | 2004-09-30 02:33:48 +0000 | [diff] [blame] | 147 | // LoadedRegs - Keep track of which vregs are loaded, so that we only load |
| 148 | // each vreg once (in the case where a spilled vreg is used by multiple |
| 149 | // operands). This is always smaller than the number of operands to the |
| 150 | // current machine instr, so it should be small. |
| 151 | std::vector<unsigned> LoadedRegs; |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 152 | |
Chris Lattner | 0fc27cc | 2004-09-30 02:59:33 +0000 | [diff] [blame] | 153 | for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end(); |
| 154 | MBBI != E; ++MBBI) { |
| 155 | DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n"); |
| 156 | MachineBasicBlock &MBB = *MBBI; |
| 157 | for (MachineBasicBlock::iterator MII = MBB.begin(), |
| 158 | E = MBB.end(); MII != E; ++MII) { |
| 159 | MachineInstr &MI = *MII; |
| 160 | for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 161 | MachineOperand &MO = MI.getOperand(i); |
Chris Lattner | 886dd91 | 2005-04-04 21:35:34 +0000 | [diff] [blame] | 162 | if (MO.isRegister() && MO.getReg()) |
| 163 | if (MRegisterInfo::isVirtualRegister(MO.getReg())) { |
| 164 | unsigned VirtReg = MO.getReg(); |
| 165 | unsigned PhysReg = VRM.getPhys(VirtReg); |
| 166 | if (VRM.hasStackSlot(VirtReg)) { |
| 167 | int StackSlot = VRM.getStackSlot(VirtReg); |
Chris Lattner | bf9716b | 2005-09-30 01:29:00 +0000 | [diff] [blame] | 168 | const TargetRegisterClass* RC = |
| 169 | MF.getSSARegMap()->getRegClass(VirtReg); |
Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 170 | |
Chris Lattner | 886dd91 | 2005-04-04 21:35:34 +0000 | [diff] [blame] | 171 | if (MO.isUse() && |
| 172 | std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) |
| 173 | == LoadedRegs.end()) { |
Chris Lattner | bf9716b | 2005-09-30 01:29:00 +0000 | [diff] [blame] | 174 | MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); |
Chris Lattner | 886dd91 | 2005-04-04 21:35:34 +0000 | [diff] [blame] | 175 | LoadedRegs.push_back(VirtReg); |
| 176 | ++NumLoads; |
| 177 | DEBUG(std::cerr << '\t' << *prior(MII)); |
| 178 | } |
Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 179 | |
Chris Lattner | 886dd91 | 2005-04-04 21:35:34 +0000 | [diff] [blame] | 180 | if (MO.isDef()) { |
Chris Lattner | bf9716b | 2005-09-30 01:29:00 +0000 | [diff] [blame] | 181 | MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); |
Chris Lattner | 886dd91 | 2005-04-04 21:35:34 +0000 | [diff] [blame] | 182 | ++NumStores; |
| 183 | } |
Chris Lattner | 0fc27cc | 2004-09-30 02:59:33 +0000 | [diff] [blame] | 184 | } |
Chris Lattner | 886dd91 | 2005-04-04 21:35:34 +0000 | [diff] [blame] | 185 | PhysRegsUsed[PhysReg] = true; |
| 186 | MI.SetMachineOperandReg(i, PhysReg); |
| 187 | } else { |
| 188 | PhysRegsUsed[MO.getReg()] = true; |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 189 | } |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 190 | } |
Chris Lattner | 886dd91 | 2005-04-04 21:35:34 +0000 | [diff] [blame] | 191 | |
Chris Lattner | 477e455 | 2004-09-30 16:10:45 +0000 | [diff] [blame] | 192 | DEBUG(std::cerr << '\t' << MI); |
Chris Lattner | 4ea1b82 | 2004-09-30 02:33:48 +0000 | [diff] [blame] | 193 | LoadedRegs.clear(); |
Alkis Evlogimenos | dd420e0 | 2004-03-01 23:18:15 +0000 | [diff] [blame] | 194 | } |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 195 | } |
| 196 | return true; |
| 197 | } |
| 198 | |
| 199 | //===----------------------------------------------------------------------===// |
| 200 | // Local Spiller Implementation |
| 201 | //===----------------------------------------------------------------------===// |
| 202 | |
| 203 | namespace { |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 204 | /// LocalSpiller - This spiller does a simple pass over the machine basic |
| 205 | /// block to attempt to keep spills in registers as much as possible for |
| 206 | /// blocks that have low register pressure (the vreg may be spilled due to |
| 207 | /// register pressure in other blocks). |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 208 | class LocalSpiller : public Spiller { |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 209 | const MRegisterInfo *MRI; |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 210 | const TargetInstrInfo *TII; |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 211 | public: |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 212 | bool runOnMachineFunction(MachineFunction &MF, const VirtRegMap &VRM) { |
| 213 | MRI = MF.getTarget().getRegisterInfo(); |
| 214 | TII = MF.getTarget().getInstrInfo(); |
| 215 | DEBUG(std::cerr << "\n**** Local spiller rewriting function '" |
| 216 | << MF.getFunction()->getName() << "':\n"); |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 217 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 218 | for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); |
| 219 | MBB != E; ++MBB) |
| 220 | RewriteMBB(*MBB, VRM); |
| 221 | return true; |
| 222 | } |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 223 | private: |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 224 | void RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM); |
| 225 | void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots, |
Chris Lattner | 07cf141 | 2006-02-03 00:36:31 +0000 | [diff] [blame] | 226 | std::multimap<unsigned, int> &PhysRegs); |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 227 | void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots, |
Chris Lattner | 07cf141 | 2006-02-03 00:36:31 +0000 | [diff] [blame] | 228 | std::multimap<unsigned, int> &PhysRegs); |
| 229 | void ModifyStackSlot(int Slot, std::map<int, unsigned> &SpillSlots, |
| 230 | std::multimap<unsigned, int> &PhysRegs); |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 231 | }; |
| 232 | } |
| 233 | |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 234 | /// AvailableSpills - As the local spiller is scanning and rewriting an MBB from |
| 235 | /// top down, keep track of which spills slots are available in each register. |
Chris Lattner | 593c958 | 2006-02-03 23:28:46 +0000 | [diff] [blame] | 236 | /// |
| 237 | /// Note that not all physregs are created equal here. In particular, some |
| 238 | /// physregs are reloads that we are allowed to clobber or ignore at any time. |
| 239 | /// Other physregs are values that the register allocated program is using that |
| 240 | /// we cannot CHANGE, but we can read if we like. We keep track of this on a |
| 241 | /// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable |
| 242 | /// entries. The predicate 'canClobberPhysReg()' checks this bit and |
| 243 | /// addAvailable sets it if. |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 244 | class AvailableSpills { |
| 245 | const MRegisterInfo *MRI; |
| 246 | const TargetInstrInfo *TII; |
| 247 | |
| 248 | // SpillSlotsAvailable - This map keeps track of all of the spilled virtual |
| 249 | // register values that are still available, due to being loaded or stored to, |
| 250 | // but not invalidated yet. |
| 251 | std::map<int, unsigned> SpillSlotsAvailable; |
| 252 | |
| 253 | // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating |
| 254 | // which stack slot values are currently held by a physreg. This is used to |
| 255 | // invalidate entries in SpillSlotsAvailable when a physreg is modified. |
| 256 | std::multimap<unsigned, int> PhysRegsAvailable; |
| 257 | |
| 258 | void ClobberPhysRegOnly(unsigned PhysReg); |
| 259 | public: |
| 260 | AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii) |
| 261 | : MRI(mri), TII(tii) { |
| 262 | } |
| 263 | |
| 264 | /// getSpillSlotPhysReg - If the specified stack slot is available in a |
| 265 | /// physical register, return that PhysReg, otherwise return 0. |
| 266 | unsigned getSpillSlotPhysReg(int Slot) const { |
| 267 | std::map<int, unsigned>::const_iterator I = SpillSlotsAvailable.find(Slot); |
| 268 | if (I != SpillSlotsAvailable.end()) |
Chris Lattner | 593c958 | 2006-02-03 23:28:46 +0000 | [diff] [blame] | 269 | return I->second >> 1; // Remove the CanClobber bit. |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 270 | return 0; |
| 271 | } |
| 272 | |
| 273 | /// addAvailable - Mark that the specified stack slot is available in the |
Chris Lattner | 593c958 | 2006-02-03 23:28:46 +0000 | [diff] [blame] | 274 | /// specified physreg. If CanClobber is true, the physreg can be modified at |
| 275 | /// any time without changing the semantics of the program. |
| 276 | void addAvailable(int Slot, unsigned Reg, bool CanClobber = true) { |
Chris Lattner | 8666249 | 2006-02-03 23:50:46 +0000 | [diff] [blame] | 277 | // If this stack slot is thought to be available in some other physreg, |
| 278 | // remove its record. |
| 279 | ModifyStackSlot(Slot); |
| 280 | |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 281 | PhysRegsAvailable.insert(std::make_pair(Reg, Slot)); |
Jeff Cohen | 003cecb | 2006-02-04 03:27:39 +0000 | [diff] [blame^] | 282 | SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber; |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 283 | |
| 284 | DEBUG(std::cerr << "Remembering SS#" << Slot << " in physreg " |
| 285 | << MRI->getName(Reg) << "\n"); |
| 286 | } |
| 287 | |
Chris Lattner | 593c958 | 2006-02-03 23:28:46 +0000 | [diff] [blame] | 288 | /// canClobberPhysReg - Return true if the spiller is allowed to change the |
| 289 | /// value of the specified stackslot register if it desires. The specified |
| 290 | /// stack slot must be available in a physreg for this query to make sense. |
| 291 | bool canClobberPhysReg(int Slot) const { |
| 292 | assert(SpillSlotsAvailable.count(Slot) && "Slot not available!"); |
| 293 | return SpillSlotsAvailable.find(Slot)->second & 1; |
| 294 | } |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 295 | |
| 296 | /// ClobberPhysReg - This is called when the specified physreg changes |
| 297 | /// value. We use this to invalidate any info about stuff we thing lives in |
| 298 | /// it and any of its aliases. |
| 299 | void ClobberPhysReg(unsigned PhysReg); |
| 300 | |
| 301 | /// ModifyStackSlot - This method is called when the value in a stack slot |
| 302 | /// changes. This removes information about which register the previous value |
| 303 | /// for this slot lives in (as the previous value is dead now). |
| 304 | void ModifyStackSlot(int Slot); |
| 305 | }; |
| 306 | |
| 307 | /// ClobberPhysRegOnly - This is called when the specified physreg changes |
| 308 | /// value. We use this to invalidate any info about stuff we thing lives in it. |
| 309 | void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) { |
| 310 | std::multimap<unsigned, int>::iterator I = |
| 311 | PhysRegsAvailable.lower_bound(PhysReg); |
Chris Lattner | 07cf141 | 2006-02-03 00:36:31 +0000 | [diff] [blame] | 312 | while (I != PhysRegsAvailable.end() && I->first == PhysReg) { |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 313 | int Slot = I->second; |
Chris Lattner | 07cf141 | 2006-02-03 00:36:31 +0000 | [diff] [blame] | 314 | PhysRegsAvailable.erase(I++); |
Chris Lattner | 593c958 | 2006-02-03 23:28:46 +0000 | [diff] [blame] | 315 | assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg && |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 316 | "Bidirectional map mismatch!"); |
| 317 | SpillSlotsAvailable.erase(Slot); |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 318 | DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg) |
Chris Lattner | 07cf141 | 2006-02-03 00:36:31 +0000 | [diff] [blame] | 319 | << " clobbered, invalidating SS#" << Slot << "\n"); |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 320 | } |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 321 | } |
| 322 | |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 323 | /// ClobberPhysReg - This is called when the specified physreg changes |
| 324 | /// value. We use this to invalidate any info about stuff we thing lives in |
| 325 | /// it and any of its aliases. |
| 326 | void AvailableSpills::ClobberPhysReg(unsigned PhysReg) { |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 327 | for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS) |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 328 | ClobberPhysRegOnly(*AS); |
| 329 | ClobberPhysRegOnly(PhysReg); |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 330 | } |
| 331 | |
Chris Lattner | 07cf141 | 2006-02-03 00:36:31 +0000 | [diff] [blame] | 332 | /// ModifyStackSlot - This method is called when the value in a stack slot |
| 333 | /// changes. This removes information about which register the previous value |
| 334 | /// for this slot lives in (as the previous value is dead now). |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 335 | void AvailableSpills::ModifyStackSlot(int Slot) { |
| 336 | std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(Slot); |
| 337 | if (It == SpillSlotsAvailable.end()) return; |
Chris Lattner | 593c958 | 2006-02-03 23:28:46 +0000 | [diff] [blame] | 338 | unsigned Reg = It->second >> 1; |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 339 | SpillSlotsAvailable.erase(It); |
Chris Lattner | 07cf141 | 2006-02-03 00:36:31 +0000 | [diff] [blame] | 340 | |
| 341 | // This register may hold the value of multiple stack slots, only remove this |
| 342 | // stack slot from the set of values the register contains. |
| 343 | std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg); |
| 344 | for (; ; ++I) { |
| 345 | assert(I != PhysRegsAvailable.end() && I->first == Reg && |
| 346 | "Map inverse broken!"); |
| 347 | if (I->second == Slot) break; |
| 348 | } |
| 349 | PhysRegsAvailable.erase(I); |
| 350 | } |
| 351 | |
| 352 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 353 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 354 | // ReusedOp - For each reused operand, we keep track of a bit of information, in |
| 355 | // case we need to rollback upon processing a new operand. See comments below. |
| 356 | namespace { |
| 357 | struct ReusedOp { |
| 358 | // The MachineInstr operand that reused an available value. |
| 359 | unsigned Operand; |
Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 360 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 361 | // StackSlot - The spill slot of the value being reused. |
| 362 | unsigned StackSlot; |
Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 363 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 364 | // PhysRegReused - The physical register the value was available in. |
| 365 | unsigned PhysRegReused; |
Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 366 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 367 | // AssignedPhysReg - The physreg that was assigned for use by the reload. |
| 368 | unsigned AssignedPhysReg; |
Chris Lattner | 8a61a75 | 2005-10-06 17:19:06 +0000 | [diff] [blame] | 369 | |
| 370 | // VirtReg - The virtual register itself. |
| 371 | unsigned VirtReg; |
Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 372 | |
Chris Lattner | 8a61a75 | 2005-10-06 17:19:06 +0000 | [diff] [blame] | 373 | ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr, |
| 374 | unsigned vreg) |
| 375 | : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr), |
| 376 | VirtReg(vreg) {} |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 377 | }; |
| 378 | } |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 379 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 380 | |
| 381 | /// rewriteMBB - Keep track of which spills are available even after the |
| 382 | /// register allocator is done with them. If possible, avoid reloading vregs. |
| 383 | void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) { |
| 384 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 385 | DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n"); |
| 386 | |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 387 | // Spills - Keep track of which spilled values are available in physregs so |
| 388 | // that we can choose to reuse the physregs instead of emitting reloads. |
| 389 | AvailableSpills Spills(MRI, TII); |
| 390 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 391 | std::vector<ReusedOp> ReusedOperands; |
| 392 | |
| 393 | // DefAndUseVReg - When we see a def&use operand that is spilled, keep track |
| 394 | // of it. ".first" is the machine operand index (should always be 0 for now), |
| 395 | // and ".second" is the virtual register that is spilled. |
| 396 | std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg; |
| 397 | |
Chris Lattner | 52b25db | 2004-10-01 19:47:12 +0000 | [diff] [blame] | 398 | // MaybeDeadStores - When we need to write a value back into a stack slot, |
| 399 | // keep track of the inserted store. If the stack slot value is never read |
| 400 | // (because the value was used from some available register, for example), and |
| 401 | // subsequently stored to, the original store is dead. This map keeps track |
| 402 | // of inserted stores that are not used. If we see a subsequent store to the |
| 403 | // same stack slot, the original store is deleted. |
| 404 | std::map<int, MachineInstr*> MaybeDeadStores; |
| 405 | |
Chris Lattner | b0f31bf | 2005-01-23 22:45:13 +0000 | [diff] [blame] | 406 | bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs(); |
| 407 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 408 | for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); |
| 409 | MII != E; ) { |
| 410 | MachineInstr &MI = *MII; |
| 411 | MachineBasicBlock::iterator NextMII = MII; ++NextMII; |
| 412 | |
| 413 | ReusedOperands.clear(); |
| 414 | DefAndUseVReg.clear(); |
| 415 | |
| 416 | // Process all of the spilled uses and all non spilled reg references. |
| 417 | for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { |
| 418 | MachineOperand &MO = MI.getOperand(i); |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 419 | if (!MO.isRegister() || MO.getReg() == 0) |
| 420 | continue; // Ignore non-register operands. |
| 421 | |
| 422 | if (MRegisterInfo::isPhysicalRegister(MO.getReg())) { |
| 423 | // Ignore physregs for spilling, but remember that it is used by this |
| 424 | // function. |
Chris Lattner | 886dd91 | 2005-04-04 21:35:34 +0000 | [diff] [blame] | 425 | PhysRegsUsed[MO.getReg()] = true; |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 426 | continue; |
| 427 | } |
| 428 | |
| 429 | assert(MRegisterInfo::isVirtualRegister(MO.getReg()) && |
| 430 | "Not a virtual or a physical register?"); |
| 431 | |
| 432 | unsigned VirtReg = MO.getReg(); |
| 433 | if (!VRM.hasStackSlot(VirtReg)) { |
| 434 | // This virtual register was assigned a physreg! |
| 435 | unsigned Phys = VRM.getPhys(VirtReg); |
| 436 | PhysRegsUsed[Phys] = true; |
| 437 | MI.SetMachineOperandReg(i, Phys); |
| 438 | continue; |
| 439 | } |
| 440 | |
| 441 | // This virtual register is now known to be a spilled value. |
| 442 | if (!MO.isUse()) |
| 443 | continue; // Handle defs in the loop below (handle use&def here though) |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 444 | |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 445 | // If this is both a def and a use, we need to emit a store to the |
| 446 | // stack slot after the instruction. Keep track of D&U operands |
| 447 | // because we are about to change it to a physreg here. |
| 448 | if (MO.isDef()) { |
| 449 | // Remember that this was a def-and-use operand, and that the |
| 450 | // stack slot is live after this instruction executes. |
| 451 | DefAndUseVReg.push_back(std::make_pair(i, VirtReg)); |
| 452 | } |
| 453 | |
| 454 | int StackSlot = VRM.getStackSlot(VirtReg); |
| 455 | unsigned PhysReg; |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 456 | |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 457 | // Check to see if this stack slot is available. |
Chris Lattner | 593c958 | 2006-02-03 23:28:46 +0000 | [diff] [blame] | 458 | if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot)) && |
| 459 | // Don't reuse it for a def&use operand if we aren't allowed to change |
| 460 | // the physreg! |
| 461 | (!MO.isDef() || Spills.canClobberPhysReg(StackSlot))) { |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 462 | // If this stack slot value is already available, reuse it! |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 463 | DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg " |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 464 | << MRI->getName(PhysReg) << " for vreg" |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 465 | << VirtReg <<" instead of reloading into physreg " |
| 466 | << MRI->getName(VRM.getPhys(VirtReg)) << "\n"); |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 467 | MI.SetMachineOperandReg(i, PhysReg); |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 468 | |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 469 | // The only technical detail we have is that we don't know that |
| 470 | // PhysReg won't be clobbered by a reloaded stack slot that occurs |
| 471 | // later in the instruction. In particular, consider 'op V1, V2'. |
| 472 | // If V1 is available in physreg R0, we would choose to reuse it |
| 473 | // here, instead of reloading it into the register the allocator |
| 474 | // indicated (say R1). However, V2 might have to be reloaded |
| 475 | // later, and it might indicate that it needs to live in R0. When |
| 476 | // this occurs, we need to have information available that |
| 477 | // indicates it is safe to use R1 for the reload instead of R0. |
| 478 | // |
| 479 | // To further complicate matters, we might conflict with an alias, |
| 480 | // or R0 and R1 might not be compatible with each other. In this |
| 481 | // case, we actually insert a reload for V1 in R1, ensuring that |
| 482 | // we can get at R0 or its alias. |
| 483 | ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg, |
Chris Lattner | 8a61a75 | 2005-10-06 17:19:06 +0000 | [diff] [blame] | 484 | VRM.getPhys(VirtReg), VirtReg)); |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 485 | ++NumReused; |
| 486 | continue; |
| 487 | } |
| 488 | |
| 489 | // Otherwise, reload it and remember that we have it. |
| 490 | PhysReg = VRM.getPhys(VirtReg); |
Chris Lattner | 172c362 | 2006-01-04 06:47:48 +0000 | [diff] [blame] | 491 | assert(PhysReg && "Must map virtreg to physreg!"); |
Chris Lattner | bf9716b | 2005-09-30 01:29:00 +0000 | [diff] [blame] | 492 | const TargetRegisterClass* RC = |
| 493 | MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 494 | |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 495 | RecheckRegister: |
| 496 | // Note that, if we reused a register for a previous operand, the |
| 497 | // register we want to reload into might not actually be |
| 498 | // available. If this occurs, use the register indicated by the |
| 499 | // reuser. |
| 500 | if (!ReusedOperands.empty()) // This is most often empty. |
| 501 | for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro) |
| 502 | if (ReusedOperands[ro].PhysRegReused == PhysReg) { |
| 503 | // Yup, use the reload register that we didn't use before. |
| 504 | PhysReg = ReusedOperands[ro].AssignedPhysReg; |
| 505 | goto RecheckRegister; |
| 506 | } else { |
| 507 | ReusedOp &Op = ReusedOperands[ro]; |
| 508 | unsigned PRRU = Op.PhysRegReused; |
| 509 | if (MRI->areAliases(PRRU, PhysReg)) { |
| 510 | // Okay, we found out that an alias of a reused register |
| 511 | // was used. This isn't good because it means we have |
| 512 | // to undo a previous reuse. |
Chris Lattner | 8a61a75 | 2005-10-06 17:19:06 +0000 | [diff] [blame] | 513 | const TargetRegisterClass *AliasRC = |
| 514 | MBB.getParent()->getSSARegMap()->getRegClass(Op.VirtReg); |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 515 | MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg, |
Chris Lattner | 8a61a75 | 2005-10-06 17:19:06 +0000 | [diff] [blame] | 516 | Op.StackSlot, AliasRC); |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 517 | Spills.ClobberPhysReg(Op.AssignedPhysReg); |
| 518 | Spills.ClobberPhysReg(Op.PhysRegReused); |
| 519 | |
Chris Lattner | 52b25db | 2004-10-01 19:47:12 +0000 | [diff] [blame] | 520 | // Any stores to this stack slot are not dead anymore. |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 521 | MaybeDeadStores.erase(Op.StackSlot); |
Chris Lattner | 52b25db | 2004-10-01 19:47:12 +0000 | [diff] [blame] | 522 | |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 523 | MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg); |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 524 | |
| 525 | Spills.addAvailable(Op.StackSlot, Op.AssignedPhysReg); |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 526 | ++NumLoads; |
| 527 | DEBUG(std::cerr << '\t' << *prior(MII)); |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 528 | |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 529 | DEBUG(std::cerr << "Reuse undone!\n"); |
| 530 | ReusedOperands.erase(ReusedOperands.begin()+ro); |
| 531 | --NumReused; |
| 532 | goto ContinueReload; |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 533 | } |
| 534 | } |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 535 | ContinueReload: |
| 536 | PhysRegsUsed[PhysReg] = true; |
Chris Lattner | bf9716b | 2005-09-30 01:29:00 +0000 | [diff] [blame] | 537 | MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC); |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 538 | // This invalidates PhysReg. |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 539 | Spills.ClobberPhysReg(PhysReg); |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 540 | |
| 541 | // Any stores to this stack slot are not dead anymore. |
| 542 | MaybeDeadStores.erase(StackSlot); |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 543 | Spills.addAvailable(StackSlot, PhysReg); |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 544 | ++NumLoads; |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 545 | MI.SetMachineOperandReg(i, PhysReg); |
Chris Lattner | 50ea01e | 2005-09-09 20:29:51 +0000 | [diff] [blame] | 546 | DEBUG(std::cerr << '\t' << *prior(MII)); |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 547 | } |
| 548 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 549 | // Loop over all of the implicit defs, clearing them from our available |
| 550 | // sets. |
Chris Lattner | b0f31bf | 2005-01-23 22:45:13 +0000 | [diff] [blame] | 551 | for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode()); |
| 552 | *ImpDef; ++ImpDef) { |
| 553 | PhysRegsUsed[*ImpDef] = true; |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 554 | Spills.ClobberPhysReg(*ImpDef); |
Chris Lattner | b0f31bf | 2005-01-23 22:45:13 +0000 | [diff] [blame] | 555 | } |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 556 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 557 | DEBUG(std::cerr << '\t' << MI); |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 558 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 559 | // If we have folded references to memory operands, make sure we clear all |
| 560 | // physical registers that may contain the value of the spilled virtual |
| 561 | // register |
Chris Lattner | 8f1d640 | 2005-01-14 15:54:24 +0000 | [diff] [blame] | 562 | VirtRegMap::MI2VirtMapTy::const_iterator I, End; |
| 563 | for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) { |
Chris Lattner | bec6a9e | 2004-10-01 23:15:36 +0000 | [diff] [blame] | 564 | DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: " |
| 565 | << I->second.second); |
| 566 | unsigned VirtReg = I->second.first; |
| 567 | VirtRegMap::ModRef MR = I->second.second; |
Chris Lattner | cea8688 | 2005-09-19 06:56:21 +0000 | [diff] [blame] | 568 | if (!VRM.hasStackSlot(VirtReg)) { |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 569 | DEBUG(std::cerr << ": No stack slot!\n"); |
Chris Lattner | cea8688 | 2005-09-19 06:56:21 +0000 | [diff] [blame] | 570 | continue; |
| 571 | } |
| 572 | int SS = VRM.getStackSlot(VirtReg); |
| 573 | DEBUG(std::cerr << " - StackSlot: " << SS << "\n"); |
| 574 | |
| 575 | // If this folded instruction is just a use, check to see if it's a |
| 576 | // straight load from the virt reg slot. |
| 577 | if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) { |
| 578 | int FrameIdx; |
Chris Lattner | 4083960 | 2006-02-02 20:12:32 +0000 | [diff] [blame] | 579 | if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) { |
| 580 | // If this spill slot is available, turn it into a copy (or nothing) |
| 581 | // instead of leaving it as a load! |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 582 | unsigned InReg; |
| 583 | if (FrameIdx == SS && (InReg = Spills.getSpillSlotPhysReg(SS))) { |
Chris Lattner | cea8688 | 2005-09-19 06:56:21 +0000 | [diff] [blame] | 584 | DEBUG(std::cerr << "Promoted Load To Copy: " << MI); |
| 585 | MachineFunction &MF = *MBB.getParent(); |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 586 | if (DestReg != InReg) { |
| 587 | MRI->copyRegToReg(MBB, &MI, DestReg, InReg, |
Chris Lattner | cea8688 | 2005-09-19 06:56:21 +0000 | [diff] [blame] | 588 | MF.getSSARegMap()->getRegClass(VirtReg)); |
Chris Lattner | 22480c4 | 2005-10-05 18:30:19 +0000 | [diff] [blame] | 589 | // Revisit the copy so we make sure to notice the effects of the |
| 590 | // operation on the destreg (either needing to RA it if it's |
| 591 | // virtual or needing to clobber any values if it's physical). |
| 592 | NextMII = &MI; |
| 593 | --NextMII; // backtrack to the copy. |
Chris Lattner | cea8688 | 2005-09-19 06:56:21 +0000 | [diff] [blame] | 594 | } |
| 595 | MBB.erase(&MI); |
| 596 | goto ProcessNextInst; |
| 597 | } |
| 598 | } |
| 599 | } |
| 600 | |
| 601 | // If this reference is not a use, any previous store is now dead. |
| 602 | // Otherwise, the store to this stack slot is not dead anymore. |
| 603 | std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS); |
| 604 | if (MDSI != MaybeDeadStores.end()) { |
| 605 | if (MR & VirtRegMap::isRef) // Previous store is not dead. |
| 606 | MaybeDeadStores.erase(MDSI); |
| 607 | else { |
| 608 | // If we get here, the store is dead, nuke it now. |
| 609 | assert(MR == VirtRegMap::isMod && "Can't be modref!"); |
| 610 | MBB.erase(MDSI->second); |
| 611 | MaybeDeadStores.erase(MDSI); |
| 612 | ++NumDSE; |
| 613 | } |
| 614 | } |
| 615 | |
| 616 | // If the spill slot value is available, and this is a new definition of |
| 617 | // the value, the value is not available anymore. |
| 618 | if (MR & VirtRegMap::isMod) { |
Chris Lattner | 07cf141 | 2006-02-03 00:36:31 +0000 | [diff] [blame] | 619 | // Notice that the value in this stack slot has been modified. |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 620 | Spills.ModifyStackSlot(SS); |
Chris Lattner | cd81639 | 2006-02-02 23:29:36 +0000 | [diff] [blame] | 621 | |
| 622 | // If this is *just* a mod of the value, check to see if this is just a |
| 623 | // store to the spill slot (i.e. the spill got merged into the copy). If |
| 624 | // so, realize that the vreg is available now, and add the store to the |
| 625 | // MaybeDeadStore info. |
| 626 | int StackSlot; |
| 627 | if (!(MR & VirtRegMap::isRef)) { |
| 628 | if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) { |
| 629 | assert(MRegisterInfo::isPhysicalRegister(SrcReg) && |
| 630 | "Src hasn't been allocated yet?"); |
Chris Lattner | 07cf141 | 2006-02-03 00:36:31 +0000 | [diff] [blame] | 631 | // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark |
Chris Lattner | cd81639 | 2006-02-02 23:29:36 +0000 | [diff] [blame] | 632 | // this as a potentially dead store in case there is a subsequent |
| 633 | // store into the stack slot without a read from it. |
| 634 | MaybeDeadStores[StackSlot] = &MI; |
| 635 | |
Chris Lattner | cd81639 | 2006-02-02 23:29:36 +0000 | [diff] [blame] | 636 | // If the stack slot value was previously available in some other |
| 637 | // register, change it now. Otherwise, make the register available, |
| 638 | // in PhysReg. |
Chris Lattner | 593c958 | 2006-02-03 23:28:46 +0000 | [diff] [blame] | 639 | Spills.addAvailable(StackSlot, SrcReg, false /*don't clobber*/); |
Chris Lattner | cd81639 | 2006-02-02 23:29:36 +0000 | [diff] [blame] | 640 | } |
| 641 | } |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 642 | } |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 643 | } |
| 644 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 645 | // Process all of the spilled defs. |
| 646 | for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { |
| 647 | MachineOperand &MO = MI.getOperand(i); |
| 648 | if (MO.isRegister() && MO.getReg() && MO.isDef()) { |
| 649 | unsigned VirtReg = MO.getReg(); |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 650 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 651 | if (!MRegisterInfo::isVirtualRegister(VirtReg)) { |
| 652 | // Check to see if this is a def-and-use vreg operand that we do need |
| 653 | // to insert a store for. |
| 654 | bool OpTakenCareOf = false; |
| 655 | if (MO.isUse() && !DefAndUseVReg.empty()) { |
| 656 | for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau) |
| 657 | if (DefAndUseVReg[dau].first == i) { |
| 658 | VirtReg = DefAndUseVReg[dau].second; |
| 659 | OpTakenCareOf = true; |
| 660 | break; |
| 661 | } |
| 662 | } |
Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 663 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 664 | if (!OpTakenCareOf) { |
Chris Lattner | 109afed | 2006-02-03 03:16:14 +0000 | [diff] [blame] | 665 | // Check to see if this is a noop copy. If so, eliminate the |
| 666 | // instruction before considering the dest reg to be changed. |
| 667 | unsigned Src, Dst; |
| 668 | if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { |
| 669 | ++NumDCE; |
| 670 | DEBUG(std::cerr << "Removing now-noop copy: " << MI); |
| 671 | MBB.erase(&MI); |
| 672 | goto ProcessNextInst; |
| 673 | } |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 674 | Spills.ClobberPhysReg(VirtReg); |
Chris Lattner | 84e752a | 2006-02-03 03:06:49 +0000 | [diff] [blame] | 675 | continue; |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 676 | } |
Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 677 | } |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 678 | |
Chris Lattner | 84e752a | 2006-02-03 03:06:49 +0000 | [diff] [blame] | 679 | // The only vregs left are stack slot definitions. |
| 680 | int StackSlot = VRM.getStackSlot(VirtReg); |
| 681 | const TargetRegisterClass *RC = |
| 682 | MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); |
| 683 | unsigned PhysReg; |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 684 | |
Chris Lattner | 84e752a | 2006-02-03 03:06:49 +0000 | [diff] [blame] | 685 | // If this is a def&use operand, and we used a different physreg for |
| 686 | // it than the one assigned, make sure to execute the store from the |
| 687 | // correct physical register. |
| 688 | if (MO.getReg() == VirtReg) |
| 689 | PhysReg = VRM.getPhys(VirtReg); |
| 690 | else |
| 691 | PhysReg = MO.getReg(); |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 692 | |
Chris Lattner | 84e752a | 2006-02-03 03:06:49 +0000 | [diff] [blame] | 693 | PhysRegsUsed[PhysReg] = true; |
| 694 | MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); |
| 695 | DEBUG(std::cerr << "Store:\t" << *next(MII)); |
| 696 | MI.SetMachineOperandReg(i, PhysReg); |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 697 | |
Chris Lattner | 109afed | 2006-02-03 03:16:14 +0000 | [diff] [blame] | 698 | // Check to see if this is a noop copy. If so, eliminate the |
| 699 | // instruction before considering the dest reg to be changed. |
| 700 | { |
| 701 | unsigned Src, Dst; |
| 702 | if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) { |
| 703 | ++NumDCE; |
| 704 | DEBUG(std::cerr << "Removing now-noop copy: " << MI); |
| 705 | MBB.erase(&MI); |
| 706 | goto ProcessNextInst; |
| 707 | } |
| 708 | } |
| 709 | |
Chris Lattner | 84e752a | 2006-02-03 03:06:49 +0000 | [diff] [blame] | 710 | // If there is a dead store to this stack slot, nuke it now. |
| 711 | MachineInstr *&LastStore = MaybeDeadStores[StackSlot]; |
| 712 | if (LastStore) { |
| 713 | DEBUG(std::cerr << " Killed store:\t" << *LastStore); |
| 714 | ++NumDSE; |
| 715 | MBB.erase(LastStore); |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 716 | } |
Chris Lattner | 84e752a | 2006-02-03 03:06:49 +0000 | [diff] [blame] | 717 | LastStore = next(MII); |
| 718 | |
| 719 | // If the stack slot value was previously available in some other |
| 720 | // register, change it now. Otherwise, make the register available, |
| 721 | // in PhysReg. |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 722 | Spills.ModifyStackSlot(StackSlot); |
| 723 | Spills.ClobberPhysReg(PhysReg); |
Chris Lattner | 66cf80f | 2006-02-03 23:13:58 +0000 | [diff] [blame] | 724 | Spills.addAvailable(StackSlot, PhysReg); |
Chris Lattner | 84e752a | 2006-02-03 03:06:49 +0000 | [diff] [blame] | 725 | ++NumStores; |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 726 | } |
| 727 | } |
Chris Lattner | cea8688 | 2005-09-19 06:56:21 +0000 | [diff] [blame] | 728 | ProcessNextInst: |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 729 | MII = NextMII; |
| 730 | } |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 731 | } |
| 732 | |
| 733 | |
Chris Lattner | 7fb6434 | 2004-10-01 19:04:51 +0000 | [diff] [blame] | 734 | |
Chris Lattner | 8c4d88d | 2004-09-30 01:54:45 +0000 | [diff] [blame] | 735 | llvm::Spiller* llvm::createSpiller() { |
| 736 | switch (SpillerOpt) { |
| 737 | default: assert(0 && "Unreachable!"); |
| 738 | case local: |
| 739 | return new LocalSpiller(); |
| 740 | case simple: |
| 741 | return new SimpleSpiller(); |
| 742 | } |
Alkis Evlogimenos | 0d6c5b6 | 2004-02-24 08:58:30 +0000 | [diff] [blame] | 743 | } |