blob: 271542df8c6f1100d63548cfad8b8373620a8abe [file] [log] [blame]
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmann86eb1c62012-05-30 09:25:51 -070034#include <cutils/log.h>
35#include <hardware/gralloc.h>
36#include <hardware/hardware.h>
37#include <hardware/hwcomposer.h>
38#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070039#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070040#include <utils/Vector.h>
41
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070042#include <sync/sync.h>
43
Greg Hackmann86eb1c62012-05-30 09:25:51 -070044#include "ion.h"
45#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070046#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070047#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070048#include "exynos_v4l2.h"
49#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070050
Greg Hackmannf6f2e542012-07-16 16:10:27 -070051struct hwc_callback_entry {
52 void (*callback)(void *, private_handle_t *);
53 void *data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070054};
55typedef android::Vector<struct hwc_callback_entry> hwc_callback_queue_t;
56
Greg Hackmannf9509d32012-09-12 09:49:29 -070057const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070058const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmannf9509d32012-09-12 09:49:29 -070059const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070060const size_t GSC_W_ALIGNMENT = 16;
61const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070062const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
63const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
64 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann86eb1c62012-05-30 09:25:51 -070065
Erik Gilling87e707e2012-06-29 17:35:13 -070066struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070067
Greg Hackmann9130e702012-07-30 14:53:04 -070068struct exynos5_gsc_map_t {
69 enum {
70 GSC_NONE = 0,
71 GSC_M2M,
72 // TODO: GSC_LOCAL_PATH
73 } mode;
74 int idx;
75};
76
Greg Hackmann86eb1c62012-05-30 09:25:51 -070077struct exynos5_hwc_post_data_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070078 exynos5_hwc_composer_device_1_t *pdev;
79 int overlay_map[NUM_HW_WINDOWS];
Greg Hackmann9130e702012-07-30 14:53:04 -070080 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
Greg Hackmannf6f2e542012-07-16 16:10:27 -070081 hwc_layer_1_t overlays[NUM_HW_WINDOWS];
82 int num_overlays;
83 size_t fb_window;
84 int fence;
85 pthread_mutex_t completion_lock;
86 pthread_cond_t completion;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070087};
88
Greg Hackmann9130e702012-07-30 14:53:04 -070089const size_t NUM_GSC_DST_BUFS = 2;
90struct exynos5_gsc_data_t {
91 void *gsc;
92 exynos_gsc_img src_cfg;
93 exynos_gsc_img dst_cfg;
94 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
95 size_t current_buf;
96};
97
Erik Gilling87e707e2012-06-29 17:35:13 -070098struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070099 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700100
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700101 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -0700102 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700103 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700104
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700105 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700106 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -0700107 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700108 pthread_t vsync_thread;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700109
Benoit Goby8bad7e32012-08-16 14:17:14 -0700110 int hdmi_mixer0;
111 int hdmi_layer0;
112 int hdmi_layer1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700113 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700114 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700115 bool hdmi_blanked;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700116 void *hdmi_gsc;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700117 int hdmi_w;
118 int hdmi_h;
119 exynos_gsc_img hdmi_src;
120 exynos_gsc_img hdmi_dst;
Greg Hackmann9130e702012-07-30 14:53:04 -0700121
122 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700123
124 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
125 const void *last_handles[NUM_HW_WINDOWS];
126 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700127};
128
Greg Hackmann9130e702012-07-30 14:53:04 -0700129static void dump_handle(private_handle_t *h)
130{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700131 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
132 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700133}
134
Erik Gilling87e707e2012-06-29 17:35:13 -0700135static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700136{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700137 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
138 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
139 l->compositionType, l->flags, l->handle, l->transform,
140 l->blending,
141 l->sourceCrop.left,
142 l->sourceCrop.top,
143 l->sourceCrop.right,
144 l->sourceCrop.bottom,
145 l->displayFrame.left,
146 l->displayFrame.top,
147 l->displayFrame.right,
148 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700149
Greg Hackmann9130e702012-07-30 14:53:04 -0700150 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
151 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700152}
153
154static void dump_config(s3c_fb_win_config &c)
155{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700156 ALOGV("\tstate = %u", c.state);
157 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
158 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
159 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700160 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700161 c.fd, c.offset, c.stride,
162 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700163 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700164 }
165 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
166 ALOGV("\t\tcolor = %u", c.color);
167 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700168}
169
Greg Hackmann9130e702012-07-30 14:53:04 -0700170static void dump_gsc_img(exynos_gsc_img &c)
171{
172 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
173 c.x, c.y, c.w, c.h, c.fw, c.fh);
174 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
175 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
176}
177
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700178inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
179inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700180template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
181template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
182
183static bool is_transformed(const hwc_layer_1_t &layer)
184{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700185 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700186}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700187
Greg Hackmann9130e702012-07-30 14:53:04 -0700188static bool is_rotated(const hwc_layer_1_t &layer)
189{
190 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
191 (layer.transform & HAL_TRANSFORM_ROT_180);
192}
193
Erik Gilling87e707e2012-06-29 17:35:13 -0700194static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700195{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700196 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
197 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700198}
199
Benoit Goby8bad7e32012-08-16 14:17:14 -0700200static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
201{
202 return c1.x != c2.x ||
203 c1.y != c2.y ||
204 c1.w != c2.w ||
205 c1.h != c2.h ||
206 c1.format != c2.format ||
207 c1.rot != c2.rot ||
208 c1.cacheable != c2.cacheable ||
209 c1.drmMode != c2.drmMode;
210}
211
212static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
213{
214 return gsc_dst_cfg_changed(c1, c2) ||
215 c1.fw != c2.fw ||
216 c1.fh != c2.fh;
217}
218
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700219static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
220{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700221 switch (format) {
222 case HAL_PIXEL_FORMAT_RGBA_8888:
223 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
224 case HAL_PIXEL_FORMAT_RGBX_8888:
225 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
226 case HAL_PIXEL_FORMAT_RGBA_5551:
227 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700228
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700229 default:
230 return S3C_FB_PIXEL_FORMAT_MAX;
231 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700232}
233
234static bool exynos5_format_is_supported(int format)
235{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700236 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700237}
238
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700239static bool exynos5_format_is_rgb(int format)
240{
241 switch (format) {
242 case HAL_PIXEL_FORMAT_RGBA_8888:
243 case HAL_PIXEL_FORMAT_RGBX_8888:
244 case HAL_PIXEL_FORMAT_RGB_888:
245 case HAL_PIXEL_FORMAT_RGB_565:
246 case HAL_PIXEL_FORMAT_BGRA_8888:
247 case HAL_PIXEL_FORMAT_RGBA_5551:
248 case HAL_PIXEL_FORMAT_RGBA_4444:
249 return true;
250
251 default:
252 return false;
253 }
254}
255
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700256static bool exynos5_format_is_supported_by_gscaler(int format)
257{
Greg Hackmann9130e702012-07-30 14:53:04 -0700258 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700259 case HAL_PIXEL_FORMAT_RGBX_8888:
260 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700261 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700262 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700263 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700264 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700265
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700266 default:
267 return false;
268 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700269}
270
Greg Hackmann296668e2012-08-14 15:51:40 -0700271static bool exynos5_format_is_ycrcb(int format)
272{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700273 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700274}
275
Greg Hackmann9130e702012-07-30 14:53:04 -0700276static bool exynos5_format_requires_gscaler(int format)
277{
278 return exynos5_format_is_supported_by_gscaler(format) &&
279 format != HAL_PIXEL_FORMAT_RGBX_8888;
280}
281
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700282static uint8_t exynos5_format_to_bpp(int format)
283{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700284 switch (format) {
285 case HAL_PIXEL_FORMAT_RGBA_8888:
286 case HAL_PIXEL_FORMAT_RGBX_8888:
287 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700288
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700289 case HAL_PIXEL_FORMAT_RGBA_5551:
290 case HAL_PIXEL_FORMAT_RGBA_4444:
291 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700292
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700293 default:
294 ALOGW("unrecognized pixel format %u", format);
295 return 0;
296 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700297}
298
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700299static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
300 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700301{
302 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
303
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700304 int max_w = is_rotated(layer) ? 2048 : 4800;
305 int max_h = is_rotated(layer) ? 2048 : 3344;
Greg Hackmann9130e702012-07-30 14:53:04 -0700306
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700307 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
308 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
309 // HAL_TRANSFORM_ROT_180
Greg Hackmann9130e702012-07-30 14:53:04 -0700310
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700311 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
312 int dest_w, dest_h;
313 if (rot90or270) {
314 dest_w = HEIGHT(layer.displayFrame);
315 dest_h = WIDTH(layer.displayFrame);
316 } else {
317 dest_w = WIDTH(layer.displayFrame);
318 dest_h = HEIGHT(layer.displayFrame);
319 }
320 int max_downscale = local_path ? 4 : 16;
321 const int max_upscale = 8;
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700322
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700323 return exynos5_format_is_supported_by_gscaler(format) &&
324 handle->stride <= max_w &&
325 handle->stride % GSC_W_ALIGNMENT == 0 &&
326 src_w <= dest_w * max_downscale &&
327 dest_w <= src_w * max_upscale &&
328 handle->vstride <= max_h &&
329 handle->vstride % GSC_H_ALIGNMENT == 0 &&
330 src_h <= dest_h * max_downscale &&
331 dest_h <= src_h * max_upscale &&
332 // per 46.2
333 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
334 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
335 // per 46.3.1.6
Greg Hackmann9130e702012-07-30 14:53:04 -0700336}
337
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700338int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
339{
340 struct v4l2_dv_preset preset;
341 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700342 int index = 0;
343 bool found = false;
344 int ret;
345
Benoit Goby8bad7e32012-08-16 14:17:14 -0700346 if (ioctl(dev->hdmi_layer0, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700347 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
348 return -1;
349 }
350
351 while (true) {
352 enum_preset.index = index++;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700353 ret = ioctl(dev->hdmi_layer0, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700354
355 if (ret < 0) {
356 if (errno == EINVAL)
357 break;
358 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
359 return -1;
360 }
361
362 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
363 __func__, enum_preset.index, enum_preset.preset,
364 enum_preset.width, enum_preset.height, enum_preset.name);
365
366 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700367 dev->hdmi_w = enum_preset.width;
368 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700369 found = true;
370 }
371 }
372
373 return found ? 0 : -1;
374}
375
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700376static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
377{
378 switch (blending) {
379 case HWC_BLENDING_NONE:
380 return S3C_FB_BLENDING_NONE;
381 case HWC_BLENDING_PREMULT:
382 return S3C_FB_BLENDING_PREMULT;
383 case HWC_BLENDING_COVERAGE:
384 return S3C_FB_BLENDING_COVERAGE;
385
386 default:
387 return S3C_FB_BLENDING_MAX;
388 }
389}
390
391static bool exynos5_blending_is_supported(int32_t blending)
392{
393 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
394}
395
Benoit Goby8bad7e32012-08-16 14:17:14 -0700396static int hdmi_start_background(struct exynos5_hwc_composer_device_1_t *dev)
397{
398 struct v4l2_requestbuffers reqbuf;
399 struct v4l2_subdev_format sd_fmt;
400 struct v4l2_subdev_crop sd_crop;
401 struct v4l2_format fmt;
402 struct v4l2_buffer buffer;
403 struct v4l2_plane planes[1];
404
405 memset(&reqbuf, 0, sizeof(reqbuf));
406 memset(&sd_fmt, 0, sizeof(sd_fmt));
407 memset(&sd_crop, 0, sizeof(sd_crop));
408 memset(&fmt, 0, sizeof(fmt));
409 memset(&buffer, 0, sizeof(buffer));
410 memset(planes, 0, sizeof(planes));
411
412 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SINK;
413 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
414 sd_fmt.format.width = 1;
415 sd_fmt.format.height = 1;
416 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
417 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
418 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
419 return -1;
420 }
421
422 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SINK;
423 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
424 sd_crop.rect.left = 0;
425 sd_crop.rect.top = 0;
426 sd_crop.rect.width = 1;
427 sd_crop.rect.height = 1;
428 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
429 ALOGE("%s: set_crop failed pad=%d", __func__, sd_crop.pad);
430 return -1;
431 }
432
433 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
434 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
435 sd_fmt.format.width = dev->hdmi_w;
436 sd_fmt.format.height = dev->hdmi_h;
437 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
438 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
439 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
440 return -1;
441 }
442
443 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
444 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
445 sd_crop.rect.left = 0;
446 sd_crop.rect.top = 0;
447 sd_crop.rect.width = 1;
448 sd_crop.rect.height = 1;
449 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
450 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
451 return -1;
452 }
453
454 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
455 fmt.fmt.pix_mp.width = 1;
456 fmt.fmt.pix_mp.height = 1;
457 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
458 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
459 fmt.fmt.pix_mp.num_planes = 1;
460 if (exynos_v4l2_s_fmt(dev->hdmi_layer1, &fmt) < 0) {
461 ALOGE("%s::videodev set format failed", __func__);
462 return -1;
463 }
464
465 reqbuf.count = 1;
466 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
467 reqbuf.memory = V4L2_MEMORY_MMAP;
468
469 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
470 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
471 return -1;
472 }
473
474 if (reqbuf.count != 1) {
475 ALOGE("%s: didn't get buffer", __func__);
476 return -1;
477 }
478
479 memset(&buffer, 0, sizeof(buffer));
480 buffer.type = reqbuf.type;
481 buffer.memory = V4L2_MEMORY_MMAP;
482 buffer.length = 1;
483 buffer.m.planes = planes;
484 if (exynos_v4l2_querybuf(dev->hdmi_layer1, &buffer) < 0) {
485 ALOGE("%s: exynos_v4l2_querybuf failed %d", __func__, errno);
486 return -1;
487 }
488
489 void *start = mmap(NULL, planes[0].length, PROT_READ | PROT_WRITE,
490 MAP_SHARED, dev->hdmi_layer1, planes[0].m.mem_offset);
491 if (start == MAP_FAILED) {
492 ALOGE("%s: mmap failed %d", __func__, errno);
493 return -1;
494 }
495
496 memset(start, 0, planes[0].length);
497
498 munmap(start, planes[0].length);
499
500 if (exynos_v4l2_qbuf(dev->hdmi_layer1, &buffer) < 0) {
501 ALOGE("%s: exynos_v4l2_qbuf failed %d", __func__, errno);
502 return -1;
503 }
504
505 if (exynos_v4l2_streamon(dev->hdmi_layer1, buffer.type) < 0) {
506 ALOGE("%s:stream on failed", __func__);
507 return -1;
508 }
509
510 if (exynos_v4l2_s_ctrl(dev->hdmi_layer1, V4L2_CID_TV_LAYER_PRIO, 0) < 0) {
511 ALOGE("%s: s_ctrl LAYER_PRIO failed", __func__);
512 return -1;
513 }
514
515 return 0;
516}
517
518static int hdmi_stop_background(struct exynos5_hwc_composer_device_1_t *dev)
519{
520 struct v4l2_requestbuffers reqbuf;
521
522 if (exynos_v4l2_streamoff(dev->hdmi_layer1, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0) {
523 ALOGE("%s:stream off failed", __func__);
524 return -1;
525 }
526
527 memset(&reqbuf, 0, sizeof(reqbuf));
528 reqbuf.count = 0;
529 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
530 reqbuf.memory = V4L2_MEMORY_MMAP;
531 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
532 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
533 return -1;
534 }
535
536 return 0;
537}
538
Benoit Gobycdd61b32012-07-09 12:09:59 -0700539static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
540{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700541 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700542 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700543
Benoit Gobyad4e3582012-08-30 17:17:34 -0700544 if (dev->hdmi_blanked)
545 return 0;
546
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700547 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
548 if (!dev->hdmi_gsc) {
549 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
550 return -ENODEV;
551 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700552
Benoit Goby8bad7e32012-08-16 14:17:14 -0700553 memset(&dev->hdmi_src, 0, sizeof(dev->hdmi_src));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700554
Benoit Goby8bad7e32012-08-16 14:17:14 -0700555 if (hdmi_start_background(dev) < 0) {
556 ALOGE("%s: hdmi_start_background failed", __func__);
557 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700558 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700559
Benoit Goby8bad7e32012-08-16 14:17:14 -0700560 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700561 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700562}
563
564static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
565{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700566 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700567 return;
568 exynos_gsc_destroy(dev->hdmi_gsc);
Benoit Gobyad4e3582012-08-30 17:17:34 -0700569 hdmi_stop_background(dev);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700570 dev->hdmi_gsc = NULL;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700571 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700572}
573
Benoit Goby8bad7e32012-08-16 14:17:14 -0700574static int hdmi_configure(struct exynos5_hwc_composer_device_1_t *dev,
575 exynos_gsc_img &src_cfg,
576 exynos_gsc_img &dst_cfg)
577{
578 if (!gsc_src_cfg_changed(src_cfg, dev->hdmi_src)
579 && !gsc_dst_cfg_changed(dst_cfg, dev->hdmi_dst))
580 return 0;
581
582 ALOGV("HDMI source config:");
583 dump_gsc_img(src_cfg);
584 ALOGV("HDMI dest config:");
585 dump_gsc_img(dst_cfg);
586
587 exynos_gsc_stop_exclusive(dev->hdmi_gsc);
588
589 int ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_cfg, &dst_cfg);
590 if (ret < 0) {
591 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
592 return ret;
593 }
594
595 dev->hdmi_src = src_cfg;
596 dev->hdmi_dst = dst_cfg;
597 return ret;
598}
599
600static int hdmi_configure_handle(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *h)
601{
602 exynos_gsc_img src_cfg, dst_cfg;
603 memset(&src_cfg, 0, sizeof(src_cfg));
604 memset(&dst_cfg, 0, sizeof(dst_cfg));
605
606 src_cfg.w = src_cfg.fw = h->width;
607 src_cfg.h = src_cfg.fh = h->height;
608 src_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
609
610 dst_cfg.w = dst_cfg.fw = dev->hdmi_w;
611 dst_cfg.h = dst_cfg.fh = dev->hdmi_h;
612 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
613
614 return hdmi_configure(dev, src_cfg, dst_cfg);
615}
616
617static int hdmi_configure_layer(struct exynos5_hwc_composer_device_1_t *dev, hwc_layer_1_t &layer)
618{
619 exynos_gsc_img src_cfg, dst_cfg;
620 memset(&src_cfg, 0, sizeof(src_cfg));
621 memset(&dst_cfg, 0, sizeof(dst_cfg));
622 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
623
624 src_cfg.x = layer.sourceCrop.left;
625 src_cfg.y = layer.sourceCrop.top;
626 src_cfg.w = WIDTH(layer.sourceCrop);
627 src_cfg.fw = src_handle->stride;
628 src_cfg.h = HEIGHT(layer.sourceCrop);
629 src_cfg.fh = src_handle->vstride;
630 src_cfg.format = src_handle->format;
631
632 if (dev->hdmi_w * src_cfg.h < dev->hdmi_h * src_cfg.w) {
633 dst_cfg.w = dev->hdmi_w;
634 dst_cfg.fw = dev->hdmi_w;
635 dst_cfg.fh = dev->hdmi_h;
636 dst_cfg.h = dev->hdmi_w * src_cfg.h / src_cfg.w;
637 dst_cfg.y = (dev->hdmi_h - dst_cfg.h) / 2;
638 }
639 else {
640 dst_cfg.w = dev->hdmi_h * src_cfg.w / src_cfg.h;
641 dst_cfg.fw = dev->hdmi_w;
642 dst_cfg.h = dev->hdmi_h;
643 dst_cfg.fh = dev->hdmi_h;
644 dst_cfg.x = (dev->hdmi_w - dst_cfg.w) / 2;
645 }
646 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
647 dst_cfg.rot = layer.transform;
648
649 return hdmi_configure(dev, src_cfg, dst_cfg);
650}
651
652static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *h)
Benoit Gobycdd61b32012-07-09 12:09:59 -0700653{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700654 exynos_gsc_img src_info;
655 exynos_gsc_img dst_info;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700656
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700657 memset(&src_info, 0, sizeof(src_info));
658 memset(&dst_info, 0, sizeof(dst_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700659
Benoit Goby8bad7e32012-08-16 14:17:14 -0700660 src_info.yaddr = h->fd;
661 if (exynos5_format_is_ycrcb(h->format)) {
662 src_info.uaddr = h->fd2;
663 src_info.vaddr = h->fd1;
664 } else {
665 src_info.uaddr = h->fd1;
666 src_info.vaddr = h->fd2;
667 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700668
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700669 int ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_info, &dst_info);
670 if (ret < 0) {
671 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
672 return ret;
673 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700674
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700675 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700676}
677
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700678bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i)
679{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700680 if (layer.flags & HWC_SKIP_LAYER) {
681 ALOGV("\tlayer %u: skipping", i);
682 return false;
683 }
684
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700685 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700686
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700687 if (!handle) {
688 ALOGV("\tlayer %u: handle is NULL", i);
689 return false;
690 }
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700691 if (!exynos5_format_is_rgb(handle->format) &&
692 !exynos5_format_is_supported_by_gscaler(handle->format)) {
693 ALOGW("\tlayer %u: unexpected format %u", i, handle->format);
694 return false;
695 }
696
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700697 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700698 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700699 ALOGV("\tlayer %u: gscaler required but not supported", i);
700 return false;
701 }
702 } else {
703 if (!exynos5_format_is_supported(handle->format)) {
704 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
705 return false;
706 }
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700707 if (is_scaled(layer)) {
708 ALOGV("\tlayer %u: scaling not supported", i);
709 return false;
710 }
711 if (is_transformed(layer)) {
712 ALOGV("\tlayer %u: transformations not supported", i);
713 return false;
714 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700715 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700716 if (!exynos5_blending_is_supported(layer.blending)) {
717 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700718 return false;
719 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700720
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700721 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700722}
723
Greg Hackmann31991d52012-07-13 13:23:11 -0700724inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
725{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700726 return !(r1.left > r2.right ||
727 r1.right < r2.left ||
728 r1.top > r2.bottom ||
729 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700730}
731
732inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
733{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700734 hwc_rect i;
735 i.top = max(r1.top, r2.top);
736 i.bottom = min(r1.bottom, r2.bottom);
737 i.left = max(r1.left, r2.left);
738 i.right = min(r1.right, r2.right);
739 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700740}
741
Jesse Halle94046d2012-07-31 14:34:08 -0700742static int exynos5_prepare(hwc_composer_device_1_t *dev,
743 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700744{
Jesse Halle94046d2012-07-31 14:34:08 -0700745 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700746 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700747
Jesse Halle94046d2012-07-31 14:34:08 -0700748 ALOGV("preparing %u layers", displays[0]->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700749
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700750 exynos5_hwc_composer_device_1_t *pdev =
751 (exynos5_hwc_composer_device_1_t *)dev;
752 memset(pdev->bufs.overlays, 0, sizeof(pdev->bufs.overlays));
Greg Hackmann9130e702012-07-30 14:53:04 -0700753 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700754
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700755 bool force_fb = false;
756 if (pdev->hdmi_hpd) {
757 hdmi_enable(pdev);
758 force_fb = true;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700759 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
760 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
761 if (layer.flags & HWC_SKIP_LAYER)
762 continue;
763 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
764 if (handle->flags & GRALLOC_USAGE_EXTERNAL_DISP) {
765 force_fb = false;
766 break;
767 }
768 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700769 } else {
770 hdmi_disable(pdev);
771 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700772
Erik Gilling87e707e2012-06-29 17:35:13 -0700773 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
774 pdev->bufs.overlay_map[i] = -1;
775
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700776 bool fb_needed = false;
777 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700778
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700779 // find unsupported overlays
Jesse Halle94046d2012-07-31 14:34:08 -0700780 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
781 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700782
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700783 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
784 ALOGV("\tlayer %u: background supported", i);
Jesse Halle94046d2012-07-31 14:34:08 -0700785 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700786 continue;
787 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700788
Jesse Halle94046d2012-07-31 14:34:08 -0700789 if (exynos5_supports_overlay(displays[0]->hwLayers[i], i) && !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700790 ALOGV("\tlayer %u: overlay supported", i);
791 layer.compositionType = HWC_OVERLAY;
Jesse Halle94046d2012-07-31 14:34:08 -0700792 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700793 continue;
794 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700795
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700796 if (!fb_needed) {
797 first_fb = i;
798 fb_needed = true;
799 }
800 last_fb = i;
801 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700802
Jesse Halle94046d2012-07-31 14:34:08 -0700803 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700804 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700805
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700806 // can't composite overlays sandwiched between framebuffers
807 if (fb_needed)
808 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700809 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700810
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700811 // Incrementally try to add our supported layers to hardware windows.
812 // If adding a layer would violate a hardware constraint, force it
813 // into the framebuffer and try again. (Revisiting the entire list is
814 // necessary because adding a layer to the framebuffer can cause other
815 // windows to retroactively violate constraints.)
816 bool changed;
817 do {
818 android::Vector<hwc_rect> rects;
819 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700820 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700821
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700822 if (fb_needed) {
823 hwc_rect_t fb_rect;
824 fb_rect.top = fb_rect.left = 0;
825 fb_rect.right = pdev->gralloc_module->xres - 1;
826 fb_rect.bottom = pdev->gralloc_module->yres - 1;
827 pixels_left = MAX_PIXELS - pdev->gralloc_module->xres *
828 pdev->gralloc_module->yres;
829 windows_left = NUM_HW_WINDOWS - 1;
830 rects.push_back(fb_rect);
831 }
832 else {
833 pixels_left = MAX_PIXELS;
834 windows_left = NUM_HW_WINDOWS;
835 }
Benoit Goby8bad7e32012-08-16 14:17:14 -0700836 if (pdev->hdmi_enabled)
Greg Hackmann9130e702012-07-30 14:53:04 -0700837 gsc_left--;
838
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700839 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700840
Jesse Halle94046d2012-07-31 14:34:08 -0700841 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
842 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann9130e702012-07-30 14:53:04 -0700843 if (layer.flags & HWC_SKIP_LAYER)
844 continue;
845
846 private_handle_t *handle = private_handle_t::dynamicCast(
847 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700848
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700849 // we've already accounted for the framebuffer above
850 if (layer.compositionType == HWC_FRAMEBUFFER)
851 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700852
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700853 // only layer 0 can be HWC_BACKGROUND, so we can
854 // unconditionally allow it without extra checks
855 if (layer.compositionType == HWC_BACKGROUND) {
856 windows_left--;
857 continue;
858 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700859
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700860 size_t pixels_needed = WIDTH(layer.displayFrame) *
861 HEIGHT(layer.displayFrame);
862 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700863 bool gsc_required = exynos5_format_requires_gscaler(handle->format);
Greg Hackmann9130e702012-07-30 14:53:04 -0700864 if (gsc_required)
865 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700866
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700867 // hwc_rect_t right and bottom values are normally exclusive;
868 // the intersection logic is simpler if we make them inclusive
869 hwc_rect_t visible_rect = layer.displayFrame;
870 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700871
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700872 // no more than 2 layers can overlap on a given pixel
873 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
874 if (intersect(visible_rect, overlaps.itemAt(j)))
875 can_compose = false;
876 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700877
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700878 if (!can_compose) {
879 layer.compositionType = HWC_FRAMEBUFFER;
880 if (!fb_needed) {
881 first_fb = last_fb = i;
882 fb_needed = true;
883 }
884 else {
885 first_fb = min(i, first_fb);
886 last_fb = max(i, last_fb);
887 }
888 changed = true;
889 break;
890 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700891
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700892 for (size_t j = 0; j < rects.size(); j++) {
893 const hwc_rect_t &other_rect = rects.itemAt(j);
894 if (intersect(visible_rect, other_rect))
895 overlaps.push_back(intersection(visible_rect, other_rect));
896 }
897 rects.push_back(visible_rect);
898 pixels_left -= pixels_needed;
899 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700900 if (gsc_required)
901 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700902 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700903
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700904 if (changed)
905 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700906 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700907 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700908
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700909 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700910 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700911
Jesse Halle94046d2012-07-31 14:34:08 -0700912 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
913 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700914
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700915 if (fb_needed && i == first_fb) {
916 ALOGV("assigning framebuffer to window %u\n",
917 nextWindow);
918 nextWindow++;
919 continue;
920 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700921
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700922 if (layer.compositionType != HWC_FRAMEBUFFER) {
923 ALOGV("assigning layer %u to window %u", i, nextWindow);
924 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700925 if (layer.compositionType == HWC_OVERLAY) {
926 private_handle_t *handle =
927 private_handle_t::dynamicCast(layer.handle);
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700928 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann2ddbc742012-08-17 15:41:29 -0700929 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[nextGsc]);
Greg Hackmann3088b972012-09-12 15:07:23 -0700930 pdev->bufs.gsc_map[nextWindow].mode =
Greg Hackmann9130e702012-07-30 14:53:04 -0700931 exynos5_gsc_map_t::GSC_M2M;
Greg Hackmann3088b972012-09-12 15:07:23 -0700932 pdev->bufs.gsc_map[nextWindow].idx = nextGsc++;
Greg Hackmann9130e702012-07-30 14:53:04 -0700933 }
934 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700935 nextWindow++;
936 }
937 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700938
Greg Hackmann9130e702012-07-30 14:53:04 -0700939 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
940 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
941 if (pdev->gsc[i].dst_buf[j])
942 pdev->alloc_device->free(pdev->alloc_device,
943 pdev->gsc[i].dst_buf[j]);
944 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
945 }
946
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700947 if (fb_needed)
948 pdev->bufs.fb_window = first_fb;
949 else
950 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700951
Greg Hackmann9130e702012-07-30 14:53:04 -0700952 return 0;
953}
954
Greg Hackmann9130e702012-07-30 14:53:04 -0700955static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
956 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
957 int gsc_idx)
958{
959 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
960
961 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
962 buffer_handle_t dst_buf;
963 private_handle_t *dst_handle;
964 int ret = 0;
965
966 exynos_gsc_img src_cfg, dst_cfg;
967 memset(&src_cfg, 0, sizeof(src_cfg));
968 memset(&dst_cfg, 0, sizeof(dst_cfg));
969
970 src_cfg.x = layer.sourceCrop.left;
971 src_cfg.y = layer.sourceCrop.top;
972 src_cfg.w = WIDTH(layer.sourceCrop);
973 src_cfg.fw = src_handle->stride;
974 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -0700975 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -0700976 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -0700977 if (exynos5_format_is_ycrcb(src_handle->format)) {
978 src_cfg.uaddr = src_handle->fd2;
979 src_cfg.vaddr = src_handle->fd1;
980 } else {
981 src_cfg.uaddr = src_handle->fd1;
982 src_cfg.vaddr = src_handle->fd2;
983 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700984 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -0700985 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Greg Hackmann9130e702012-07-30 14:53:04 -0700986
987 dst_cfg.x = 0;
988 dst_cfg.y = 0;
989 dst_cfg.w = WIDTH(layer.displayFrame);
990 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmanna00c0432012-07-31 15:20:00 -0700991 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
Greg Hackmann9130e702012-07-30 14:53:04 -0700992 dst_cfg.rot = layer.transform;
Sanghee Kim6c195c52012-08-30 22:59:43 -0700993 dst_cfg.drmMode = src_cfg.drmMode;
Greg Hackmann9130e702012-07-30 14:53:04 -0700994
995 ALOGV("source configuration:");
996 dump_gsc_img(src_cfg);
997
998 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
999 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
1000 int dst_stride;
1001 int usage = GRALLOC_USAGE_SW_READ_NEVER |
1002 GRALLOC_USAGE_SW_WRITE_NEVER |
1003 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001004
1005 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
1006 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -07001007
1008 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
1009 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
1010
1011 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1012 if (gsc_data->dst_buf[i]) {
1013 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1014 gsc_data->dst_buf[i] = NULL;
1015 }
1016
1017 int ret = alloc_device->alloc(alloc_device, w, h,
1018 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1019 &dst_stride);
1020 if (ret < 0) {
1021 ALOGE("failed to allocate destination buffer: %s",
1022 strerror(-ret));
1023 goto err_alloc;
1024 }
1025 }
1026
1027 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001028 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001029
Greg Hackmann9130e702012-07-30 14:53:04 -07001030 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1031 dst_handle = private_handle_t::dynamicCast(dst_buf);
1032
1033 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001034 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001035 dst_cfg.yaddr = dst_handle->fd;
1036
1037 ALOGV("destination configuration:");
1038 dump_gsc_img(dst_cfg);
1039
Greg Hackmann2ddbc742012-08-17 15:41:29 -07001040 gsc_data->gsc = exynos_gsc_create_exclusive(AVAILABLE_GSC_UNITS[gsc_idx],
1041 GSC_M2M_MODE, GSC_DUMMY);
Greg Hackmann9130e702012-07-30 14:53:04 -07001042 if (!gsc_data->gsc) {
1043 ALOGE("failed to create gscaler handle");
1044 ret = -1;
1045 goto err_alloc;
1046 }
1047
1048 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1049 if (ret < 0) {
1050 ALOGE("failed to configure gscaler %u", gsc_idx);
1051 goto err_gsc_config;
1052 }
1053
1054 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1055 if (ret < 0) {
1056 ALOGE("failed to run gscaler %u", gsc_idx);
1057 goto err_gsc_config;
1058 }
1059
1060 gsc_data->src_cfg = src_cfg;
1061 gsc_data->dst_cfg = dst_cfg;
1062
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001063 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001064
1065err_gsc_config:
1066 exynos_gsc_destroy(gsc_data->gsc);
1067 gsc_data->gsc = NULL;
1068err_alloc:
1069 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1070 if (gsc_data->dst_buf[i]) {
1071 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1072 gsc_data->dst_buf[i] = NULL;
1073 }
1074 }
1075 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001076}
1077
1078static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001079 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001080 int32_t blending, s3c_fb_win_config &cfg)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001081{
1082 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1083 cfg.fd = handle->fd;
1084 cfg.x = displayFrame.left;
1085 cfg.y = displayFrame.top;
1086 cfg.w = WIDTH(displayFrame);
1087 cfg.h = HEIGHT(displayFrame);
1088 cfg.format = exynos5_format_to_s3c_format(handle->format);
1089 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1090 cfg.offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1091 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001092 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001093}
1094
Erik Gilling87e707e2012-06-29 17:35:13 -07001095static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001096 const private_module_t *gralloc_module)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001097{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001098 if (layer->compositionType == HWC_BACKGROUND) {
1099 hwc_color_t color = layer->backgroundColor;
1100 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1101 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1102 cfg.x = 0;
1103 cfg.y = 0;
1104 cfg.w = gralloc_module->xres;
1105 cfg.h = gralloc_module->yres;
1106 return;
1107 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001108
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001109 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001110 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
1111 layer->blending, cfg);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001112}
1113
1114static void exynos5_post_callback(void *data, private_handle_t *fb)
1115{
Benoit Goby8bad7e32012-08-16 14:17:14 -07001116 hwc_layer_1_t *hdmi_layer = NULL;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001117 exynos5_hwc_post_data_t *pdata = (exynos5_hwc_post_data_t *)data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001118
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001119 struct s3c_fb_win_config_data win_data;
1120 struct s3c_fb_win_config *config = win_data.config;
1121 memset(config, 0, sizeof(win_data.config));
Greg Hackmann9130e702012-07-30 14:53:04 -07001122
1123 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1124 if ( pdata->overlay_map[i] != -1) {
1125 hwc_layer_1_t &layer = pdata->overlays[i];
1126 private_handle_t *handle =
1127 private_handle_t::dynamicCast(layer.handle);
1128
1129 if (layer.acquireFenceFd != -1) {
1130 int err = sync_wait(layer.acquireFenceFd, 100);
1131 if (err != 0)
1132 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
1133 i, strerror(errno));
1134 close(layer.acquireFenceFd);
1135 }
1136
1137 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1138 int gsc_idx = pdata->gsc_map[i].idx;
1139 exynos5_config_gsc_m2m(layer, pdata->pdev->alloc_device,
1140 &pdata->pdev->gsc[gsc_idx], gsc_idx);
1141 }
1142 }
1143 }
1144
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001145 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1146 if (i == pdata->fb_window) {
1147 hwc_rect_t rect = { 0, 0, fb->width, fb->height };
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001148 int32_t blending = (i == 0) ? HWC_BLENDING_NONE :
1149 HWC_BLENDING_PREMULT;
1150 exynos5_config_handle(fb, rect, rect, blending, config[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001151 } else if ( pdata->overlay_map[i] != -1) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001152 hwc_layer_1_t &layer = pdata->overlays[i];
1153 private_handle_t *handle =
1154 private_handle_t::dynamicCast(layer.handle);
1155
1156 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1157 int gsc_idx = pdata->gsc_map[i].idx;
1158 exynos5_gsc_data_t &gsc = pdata->pdev->gsc[gsc_idx];
1159
1160 if (!gsc.gsc) {
1161 ALOGE("failed to queue gscaler %u input for layer %u",
1162 gsc_idx, i);
1163 continue;
1164 }
1165
1166 int err = exynos_gsc_stop_exclusive(gsc.gsc);
1167 exynos_gsc_destroy(gsc.gsc);
1168 gsc.gsc = NULL;
1169 if (err < 0) {
1170 ALOGE("failed to dequeue gscaler output for layer %u", i);
1171 continue;
1172 }
1173
1174 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1175 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1176 private_handle_t *dst_handle =
1177 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -07001178 hwc_rect_t sourceCrop = { 0, 0,
1179 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
1180 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001181 layer.displayFrame, layer.blending, config[i]);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001182
1183 if (handle->flags & GRALLOC_USAGE_EXTERNAL_DISP)
1184 hdmi_layer = &layer;
Greg Hackmann9130e702012-07-30 14:53:04 -07001185 }
1186 else {
1187 exynos5_config_overlay(&layer, config[i],
1188 pdata->pdev->gralloc_module);
Erik Gilling87e707e2012-06-29 17:35:13 -07001189 }
1190 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001191 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1192 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1193 config[i].blending = S3C_FB_BLENDING_NONE;
1194 }
1195
Greg Hackmann9130e702012-07-30 14:53:04 -07001196 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001197 dump_config(config[i]);
1198 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001199
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001200 int ret = ioctl(pdata->pdev->fd, S3CFB_WIN_CONFIG, &win_data);
1201 if (ret < 0)
1202 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %d", errno);
Greg Hackmann600867e2012-08-23 12:58:02 -07001203 else {
1204 memcpy(pdata->pdev->last_config, &win_data.config,
1205 sizeof(win_data.config));
1206 memcpy(pdata->pdev->last_gsc_map, pdata->gsc_map,
1207 sizeof(pdata->gsc_map));
1208 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1209 if (i == pdata->fb_window) {
1210 pdata->pdev->last_handles[i] = NULL;
1211 } else if (pdata->overlay_map[i] != -1) {
1212 hwc_layer_1_t &layer = pdata->overlays[i];
1213 pdata->pdev->last_handles[i] = layer.handle;
1214 }
1215 }
1216 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001217
Benoit Goby8bad7e32012-08-16 14:17:14 -07001218 if (pdata->pdev->hdmi_enabled) {
1219 if (hdmi_layer) {
1220 private_handle_t *handle =
1221 private_handle_t::dynamicCast(hdmi_layer->handle);
1222 hdmi_configure_layer(pdata->pdev, *hdmi_layer);
1223 hdmi_output(pdata->pdev, handle);
1224 } else {
1225 hdmi_configure_handle(pdata->pdev, fb);
1226 hdmi_output(pdata->pdev, fb);
1227 }
1228 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001229
Erik Gilling87e707e2012-06-29 17:35:13 -07001230 pthread_mutex_lock(&pdata->completion_lock);
1231 pdata->fence = win_data.fence;
1232 pthread_cond_signal(&pdata->completion);
1233 pthread_mutex_unlock(&pdata->completion_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001234}
1235
Jesse Halle94046d2012-07-31 14:34:08 -07001236static int exynos5_set(struct hwc_composer_device_1 *dev,
1237 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001238{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001239 exynos5_hwc_composer_device_1_t *pdev =
1240 (exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001241
Jesse Halle94046d2012-07-31 14:34:08 -07001242 if (!numDisplays || !displays || !displays[0] || !displays[0]->dpy || !displays[0]->sur)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001243 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001244
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001245 hwc_callback_queue_t *queue = NULL;
1246 pthread_mutex_t *lock = NULL;
1247 exynos5_hwc_post_data_t *data = NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001248
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001249 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1250 if (pdev->bufs.overlay_map[i] != -1) {
1251 pdev->bufs.overlays[i] =
1252 displays[0]->hwLayers[pdev->bufs.overlay_map[i]];
Erik Gilling87e707e2012-06-29 17:35:13 -07001253 }
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001254 }
Erik Gilling87e707e2012-06-29 17:35:13 -07001255
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001256 data = (exynos5_hwc_post_data_t *)
1257 malloc(sizeof(exynos5_hwc_post_data_t));
1258 memcpy(data, &pdev->bufs, sizeof(pdev->bufs));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001259
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001260 data->fence = -1;
1261 pthread_mutex_init(&data->completion_lock, NULL);
1262 pthread_cond_init(&data->completion, NULL);
Erik Gilling87e707e2012-06-29 17:35:13 -07001263
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001264 if (displays[0]->numHwLayers && pdev->bufs.fb_window == NO_FB_NEEDED) {
1265 exynos5_post_callback(data, NULL);
1266 } else {
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001267
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001268 struct hwc_callback_entry entry;
1269 entry.callback = exynos5_post_callback;
1270 entry.data = data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001271
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001272 queue = reinterpret_cast<hwc_callback_queue_t *>(
1273 pdev->gralloc_module->queue);
1274 lock = const_cast<pthread_mutex_t *>(
1275 &pdev->gralloc_module->queue_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001276
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001277 pthread_mutex_lock(lock);
1278 queue->push_front(entry);
1279 pthread_mutex_unlock(lock);
Erik Gilling87e707e2012-06-29 17:35:13 -07001280
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001281 EGLBoolean success = eglSwapBuffers((EGLDisplay)displays[0]->dpy,
1282 (EGLSurface)displays[0]->sur);
1283 if (!success) {
1284 ALOGE("HWC_EGL_ERROR");
1285 if (displays[0]) {
1286 pthread_mutex_lock(lock);
1287 queue->removeAt(0);
1288 pthread_mutex_unlock(lock);
1289 free(data);
Erik Gilling87e707e2012-06-29 17:35:13 -07001290 }
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001291 return HWC_EGL_ERROR;
Erik Gilling87e707e2012-06-29 17:35:13 -07001292 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001293 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001294
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001295
Erik Gilling87e707e2012-06-29 17:35:13 -07001296 pthread_mutex_lock(&data->completion_lock);
1297 while (data->fence == -1)
1298 pthread_cond_wait(&data->completion, &data->completion_lock);
1299 pthread_mutex_unlock(&data->completion_lock);
1300
1301 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1302 if (pdev->bufs.overlay_map[i] != -1) {
1303 int dup_fd = dup(data->fence);
1304 if (dup_fd < 0)
1305 ALOGW("release fence dup failed: %s", strerror(errno));
Jesse Halle94046d2012-07-31 14:34:08 -07001306 displays[0]->hwLayers[pdev->bufs.overlay_map[i]].releaseFenceFd = dup_fd;
Erik Gilling87e707e2012-06-29 17:35:13 -07001307 }
1308 }
1309 close(data->fence);
1310 free(data);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001311 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001312}
1313
Erik Gilling87e707e2012-06-29 17:35:13 -07001314static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001315 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001316{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001317 struct exynos5_hwc_composer_device_1_t* pdev =
1318 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001319 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001320}
1321
Erik Gilling87e707e2012-06-29 17:35:13 -07001322static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001323{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001324 struct exynos5_hwc_composer_device_1_t *pdev =
1325 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001326
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001327 switch (what) {
1328 case HWC_BACKGROUND_LAYER_SUPPORTED:
1329 // we support the background layer
1330 value[0] = 1;
1331 break;
1332 case HWC_VSYNC_PERIOD:
1333 // vsync period in nanosecond
1334 value[0] = 1000000000.0 / pdev->gralloc_module->fps;
1335 break;
1336 default:
1337 // unsupported query
1338 return -EINVAL;
1339 }
1340 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001341}
1342
Jesse Halle94046d2012-07-31 14:34:08 -07001343static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1344 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001345{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001346 struct exynos5_hwc_composer_device_1_t *pdev =
1347 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001348
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001349 switch (event) {
1350 case HWC_EVENT_VSYNC:
1351 __u32 val = !!enabled;
1352 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1353 if (err < 0) {
1354 ALOGE("vsync ioctl failed");
1355 return -errno;
1356 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001357
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001358 return 0;
1359 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001360
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001361 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001362}
1363
Benoit Gobycdd61b32012-07-09 12:09:59 -07001364static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001365 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001366{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001367 const char *s = buff;
1368 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001369
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001370 while (*s) {
1371 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1372 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001373
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001374 s += strlen(s) + 1;
1375 if (s - buff >= len)
1376 break;
1377 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001378
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001379 if (pdev->hdmi_hpd) {
1380 if (hdmi_get_config(pdev)) {
1381 ALOGE("Error reading HDMI configuration");
1382 pdev->hdmi_hpd = false;
1383 return;
1384 }
1385 }
1386
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001387 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001388 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001389 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001390
Jesse Hallda5a71d2012-08-21 12:12:55 -07001391 /* hwc_dev->procs is set right after the device is opened, but there is
1392 * still a race condition where a hotplug event might occur after the open
1393 * but before the procs are registered. */
1394 if (pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001395 pdev->procs->invalidate(pdev->procs);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001396}
1397
Greg Hackmann29724852012-07-23 15:31:10 -07001398static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001399{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001400 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001401 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001402
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001403 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1404 if (err < 0) {
1405 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1406 return;
1407 }
1408
Greg Hackmann29724852012-07-23 15:31:10 -07001409 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001410 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001411 if (err < 0) {
1412 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1413 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001414 }
Greg Hackmann29724852012-07-23 15:31:10 -07001415 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001416
Greg Hackmann29724852012-07-23 15:31:10 -07001417 errno = 0;
1418 uint64_t timestamp = strtoull(buf, NULL, 0);
1419 if (!errno)
1420 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001421}
1422
1423static void *hwc_vsync_thread(void *data)
1424{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001425 struct exynos5_hwc_composer_device_1_t *pdev =
1426 (struct exynos5_hwc_composer_device_1_t *)data;
1427 char uevent_desc[4096];
1428 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001429
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001430 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001431
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001432 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001433
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001434 char temp[4096];
1435 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1436 if (err < 0) {
1437 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1438 return NULL;
1439 }
1440
Greg Hackmann29724852012-07-23 15:31:10 -07001441 struct pollfd fds[2];
1442 fds[0].fd = pdev->vsync_fd;
1443 fds[0].events = POLLPRI;
1444 fds[1].fd = uevent_get_fd();
1445 fds[1].events = POLLIN;
1446
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001447 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001448 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001449
Greg Hackmann29724852012-07-23 15:31:10 -07001450 if (err > 0) {
1451 if (fds[0].revents & POLLPRI) {
1452 handle_vsync_event(pdev);
1453 }
1454 else if (fds[1].revents & POLLIN) {
1455 int len = uevent_next_event(uevent_desc,
1456 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001457
Greg Hackmann29724852012-07-23 15:31:10 -07001458 bool hdmi = !strcmp(uevent_desc,
1459 "change@/devices/virtual/switch/hdmi");
1460 if (hdmi)
1461 handle_hdmi_uevent(pdev, uevent_desc, len);
1462 }
1463 }
1464 else if (err == -1) {
1465 if (errno == EINTR)
1466 break;
1467 ALOGE("error in vsync thread: %s", strerror(errno));
1468 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001469 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001470
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001471 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001472}
1473
Jesse Halle94046d2012-07-31 14:34:08 -07001474static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001475{
1476 struct exynos5_hwc_composer_device_1_t *pdev =
1477 (struct exynos5_hwc_composer_device_1_t *)dev;
1478
1479 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1480 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1481 if (err < 0) {
1482 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1483 return -errno;
1484 }
1485
Benoit Gobyad4e3582012-08-30 17:17:34 -07001486 if (pdev->hdmi_hpd) {
1487 if (blank && !pdev->hdmi_blanked)
1488 hdmi_disable(pdev);
1489 pdev->hdmi_blanked = !!blank;
1490 }
1491
Colin Cross00359a82012-07-12 17:54:17 -07001492 return 0;
1493}
1494
Greg Hackmann600867e2012-08-23 12:58:02 -07001495static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1496{
1497 if (buff_len <= 0)
1498 return;
1499
1500 struct exynos5_hwc_composer_device_1_t *pdev =
1501 (struct exynos5_hwc_composer_device_1_t *)dev;
1502
1503 android::String8 result;
1504
Benoit Goby8bad7e32012-08-16 14:17:14 -07001505 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1506 if (pdev->hdmi_enabled)
1507 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001508 result.append(
1509 " type | handle | color | blend | format | position | size | gsc \n"
1510 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1511 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1512
1513 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1514 struct s3c_fb_win_config &config = pdev->last_config[i];
1515 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1516 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1517 "DISABLED", "-", "-", "-", "-", "-", "-");
1518 }
1519 else {
1520 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1521 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1522 "-", config.color, "-", "-");
1523 else {
1524 if (pdev->last_handles[i])
1525 result.appendFormat(" %8s | %8x", "OVERLAY", intptr_t(pdev->last_handles[i]));
1526 else
1527 result.appendFormat(" %8s | %8s", "FB", "-");
1528
1529 result.appendFormat(" | %8s | %5x | %6x", "-", config.blending,
1530 config.format);
1531 }
1532
1533 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1534 config.w, config.h);
1535 }
1536 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1537 result.appendFormat(" | %3s", "-");
1538 else
1539 result.appendFormat(" | %3d",
1540 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1541 result.append("\n");
1542 }
1543
1544 strlcpy(buff, result.string(), buff_len);
1545}
1546
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001547static int exynos5_close(hw_device_t* device);
1548
1549static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001550 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001551{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001552 int ret;
1553 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001554
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001555 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1556 return -EINVAL;
1557 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001558
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001559 struct exynos5_hwc_composer_device_1_t *dev;
1560 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1561 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001562
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001563 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1564 (const struct hw_module_t **)&dev->gralloc_module)) {
1565 ALOGE("failed to get gralloc hw module");
1566 ret = -EINVAL;
1567 goto err_get_module;
1568 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001569
Greg Hackmann9130e702012-07-30 14:53:04 -07001570 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1571 &dev->alloc_device)) {
1572 ALOGE("failed to open gralloc");
1573 ret = -EINVAL;
1574 goto err_get_module;
1575 }
1576
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001577 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1578 if (dev->fd < 0) {
1579 ALOGE("failed to open framebuffer");
1580 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001581 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001582 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001583
Benoit Goby8bad7e32012-08-16 14:17:14 -07001584 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
1585 if (dev->hdmi_layer0 < 0) {
1586 ALOGE("failed to open hdmi mixer0 subdev");
1587 ret = dev->hdmi_layer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001588 goto err_ioctl;
1589 }
1590
Benoit Goby8bad7e32012-08-16 14:17:14 -07001591 dev->hdmi_layer0 = open("/dev/video16", O_RDWR);
1592 if (dev->hdmi_layer0 < 0) {
1593 ALOGE("failed to open hdmi layer0 device");
1594 ret = dev->hdmi_layer0;
1595 goto err_mixer0;
1596 }
1597
1598 dev->hdmi_layer1 = open("/dev/video17", O_RDWR);
1599 if (dev->hdmi_layer1 < 0) {
1600 ALOGE("failed to open hdmi layer1 device");
1601 ret = dev->hdmi_layer1;
1602 goto err_hdmi0;
1603 }
1604
Greg Hackmann29724852012-07-23 15:31:10 -07001605 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1606 if (dev->vsync_fd < 0) {
1607 ALOGE("failed to open vsync attribute");
1608 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001609 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07001610 }
1611
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001612 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1613 if (sw_fd) {
1614 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001615 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001616 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001617 if (hdmi_get_config(dev)) {
1618 ALOGE("Error reading HDMI configuration");
1619 dev->hdmi_hpd = false;
1620 }
1621 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001622 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001623
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001624 dev->base.common.tag = HARDWARE_DEVICE_TAG;
1625 dev->base.common.version = HWC_DEVICE_API_VERSION_1_0;
1626 dev->base.common.module = const_cast<hw_module_t *>(module);
1627 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001628
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001629 dev->base.prepare = exynos5_prepare;
1630 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001631 dev->base.eventControl = exynos5_eventControl;
1632 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001633 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001634 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001635 dev->base.dump = exynos5_dump;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001636
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001637 dev->bufs.pdev = dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001638
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001639 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001640
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001641 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1642 if (ret) {
1643 ALOGE("failed to start vsync thread: %s", strerror(ret));
1644 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001645 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001646 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001647
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001648 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001649
Greg Hackmann29724852012-07-23 15:31:10 -07001650err_vsync:
1651 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001652err_mixer0:
1653 close(dev->hdmi_mixer0);
1654err_hdmi1:
1655 close(dev->hdmi_layer0);
1656err_hdmi0:
1657 close(dev->hdmi_layer1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001658err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001659 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001660err_open_fb:
1661 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001662err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001663 free(dev);
1664 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001665}
1666
1667static int exynos5_close(hw_device_t *device)
1668{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001669 struct exynos5_hwc_composer_device_1_t *dev =
1670 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001671 pthread_kill(dev->vsync_thread, SIGTERM);
1672 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001673 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1674 if (dev->gsc[i].gsc)
1675 exynos_gsc_destroy(dev->gsc[i].gsc);
1676 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1677 if (dev->gsc[i].dst_buf[j])
1678 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1679 }
1680 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001681 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001682 close(dev->hdmi_mixer0);
1683 close(dev->hdmi_layer0);
1684 close(dev->hdmi_layer1);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001685 close(dev->fd);
1686 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001687}
1688
1689static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001690 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001691};
1692
1693hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001694 common: {
1695 tag: HARDWARE_MODULE_TAG,
1696 module_api_version: HWC_MODULE_API_VERSION_0_1,
1697 hal_api_version: HARDWARE_HAL_API_VERSION,
1698 id: HWC_HARDWARE_MODULE_ID,
1699 name: "Samsung exynos5 hwcomposer module",
1700 author: "Google",
1701 methods: &exynos5_hwc_module_methods,
1702 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001703};