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Channagoud Kadabi31d648c2015-01-29 12:59:00 -08001/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <string.h>
30#include <stdlib.h>
31#include <debug.h>
32#include <reg.h>
33#include <mmc_sdhci.h>
34#include <sdhci.h>
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070035#include <sdhci_msm.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070036#include <partition_parser.h>
37#include <platform/iomap.h>
38#include <platform/timer.h>
vijay kumar4f4405f2014-08-08 11:49:53 +053039#include <platform.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070040
41extern void clock_init_mmc(uint32_t);
42extern void clock_config_mmc(uint32_t, uint32_t);
43
44/* data access time unit in ns */
45static const uint32_t taac_unit[] =
46{
47 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
48};
49
50/* data access time value x 10 */
51static const uint32_t taac_value[] =
52{
53 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
54};
55
56/* data transfer rate in kbit/s */
57static const uint32_t xfer_rate_unit[] =
58{
59 100, 1000, 10000, 100000, 0, 0, 0, 0
60};
61
62/* data transfer rate value x 10*/
63static const uint32_t xfer_rate_value[] =
64{
65 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80
66};
67
68/*
69 * Function: mmc decode and save csd
70 * Arg : Card structure & raw csd
71 * Return : 0 on Success, 1 on Failure
72 * Flow : Decodes CSD response received from the card.
73 * Note that we have defined only few of the CSD elements
74 * in csd structure. We'll only decode those values.
75 */
76static uint32_t mmc_decode_and_save_csd(struct mmc_card *card)
77{
78 uint32_t mmc_sizeof = 0;
79 uint32_t mmc_unit = 0;
80 uint32_t mmc_value = 0;
81 uint32_t mmc_temp = 0;
82 uint32_t *raw_csd = card->raw_csd;
83
84 struct mmc_csd mmc_csd;
85
86 mmc_sizeof = sizeof(uint32_t) * 8;
87
88 mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
89
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070090 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070091 /* Parse CSD according to SD card spec. */
92
93 /* CSD register is little bit differnet for CSD version 2.0 High
94 * Capacity and CSD version 1.0/2.0 Standard memory cards.
95 * In Version 2.0 some of the fields have fixed values and it's
96 * not necessary for host to refer these fields in CSD sent by
97 * card
98 */
99
100 if (mmc_csd.cmmc_structure == 1) {
101 /* CSD Version 2.0 */
102 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
103 /* Fixed value is 9 = 2^9 = 512 */
104 mmc_csd.write_blk_len = 512;
105 /* Fixed value is 9 = 512 */
106 mmc_csd.read_blk_len = 512;
107 /* Fixed value: 010b */
108 mmc_csd.r2w_factor = 0x2;
109 /* Not there in version 2.0 */
110 mmc_csd.c_size_mult = 0;
111 mmc_csd.c_size = UNPACK_BITS(raw_csd, 48, 22, mmc_sizeof);
112 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
113 * 100;
114
115 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
116 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
117 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
118 / 10;
119
120 mmc_csd.erase_blk_len = 1;
121 mmc_csd.read_blk_misalign = 0;
122 mmc_csd.write_blk_misalign = 0;
123 mmc_csd.read_blk_partial = 0;
124 mmc_csd.write_blk_partial = 0;
125
126 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
127 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
128 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
129 xfer_rate_unit[mmc_unit]) / 10;
130
131 mmc_csd.wp_grp_size = 0x0;
132 mmc_csd.wp_grp_enable = 0x0;
133 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
134 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
135
136 /* Calculate the card capcity */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700137 card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700138 } else {
139 /* CSD Version 1.0 */
140 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
141
142 mmc_temp = UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
143 mmc_csd.write_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
144 (1 << mmc_temp) : 512;
145
146 mmc_temp = UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
147 mmc_csd.read_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
148 (1 << mmc_temp) : 512;
149
150 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
151 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
152 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
153 / 10;
154
155 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
156 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
157 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
158 xfer_rate_unit[mmc_unit]) / 10;
159
160 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
161 * 100;
162
163 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
164 mmc_csd.sector_size = UNPACK_BITS(raw_csd, 39, 7, mmc_sizeof) + 1;
165
166 mmc_csd.erase_blk_len = UNPACK_BITS(raw_csd, 46, 1, mmc_sizeof);
167 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
168 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
169 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
170 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
171
172 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
173 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
174 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 7, mmc_sizeof);
175 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
176 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
177 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
178
179 /* Calculate the card capacity */
180 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700181 card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700182 }
183 } else {
184 /* Parse CSD according to MMC card spec. */
185 mmc_csd.spec_vers = UNPACK_BITS(raw_csd, 122, 4, mmc_sizeof);
186 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
187 mmc_csd.write_blk_len = 1 << UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
188 mmc_csd.read_blk_len = 1 << UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
189 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
190 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
191 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
192 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof) * 100;
193
194 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
195 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
196 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
197
198 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
199 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
200 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
201 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
202
203 /* Ignore -- no use of this value. */
204 mmc_csd.tran_speed = 0x00;
205
206 mmc_csd.erase_grp_size = UNPACK_BITS(raw_csd, 42, 5, mmc_sizeof);
207 mmc_csd.erase_grp_mult = UNPACK_BITS(raw_csd, 37, 5, mmc_sizeof);
208 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 5, mmc_sizeof);
209 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
210 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
211 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
212
213 /* Calculate the card capcity */
214 if (mmc_csd.c_size != 0xFFF) {
215 /* For cards less than or equal to 2GB */
216 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700217 card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700218 } else {
219 /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
220 * is used to calculate the size.
221 */
222 uint64_t sec_count;
223
224 sec_count = (card->ext_csd[MMC_SEC_COUNT4] << MMC_SEC_COUNT4_SHIFT)
225 | (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
226 | (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
227 | card->ext_csd[MMC_SEC_COUNT1];
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700228 card->capacity = sec_count * MMC_BLK_SZ;
229 }
230 }
231
232 /* save the information in card structure */
233 memcpy((struct mmc_csd *)&card->csd,(struct mmc_csd *)&mmc_csd,
234 sizeof(struct mmc_csd));
235
vijay kumar488e4842015-08-21 20:37:29 +0530236 if (MMC_CARD_MMC(card)) {
vijay kumar697dbfd2014-04-24 17:12:49 +0530237
vijay kumar488e4842015-08-21 20:37:29 +0530238 /* Calculate the wp grp size */
239 if (card->ext_csd[MMC_ERASE_GRP_DEF])
240 card->wp_grp_size = MMC_HC_ERASE_MULT * card->ext_csd[MMC_HC_ERASE_GRP_SIZE] / MMC_BLK_SZ;
241 else
242 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
243 * (card->csd.erase_grp_mult + 1);
244
245 card->rpmb_size = RPMB_PART_MIN_SIZE * card->ext_csd[RPMB_SIZE_MULT];
246 card->rel_wr_count = card->ext_csd[REL_WR_SEC_C];
247 }
248 else {
249 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
250 * (card->csd.erase_grp_mult + 1);
251 }
Channagoud Kadabi31d648c2015-01-29 12:59:00 -0800252
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700253 dprintf(SPEW, "Decoded CSD fields:\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700254 dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700255 dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700256 dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
257 dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
258 dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
259 dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
260 dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
261 dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
262 dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
263 dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
264 dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
265 dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
266 dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
267 dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
268 dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
269 dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
vijay kumar697dbfd2014-04-24 17:12:49 +0530270 dprintf(SPEW, "wp_grp_size: %u\n", card->wp_grp_size);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700271 dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
272
273 return 0;
274}
275
276/*
277 * Function: mmc decode & save cid
278 * Arg : card structure & raw cid
279 * Return : 0 on Success, 1 on Failure
280 * Flow : Decode CID sent by the card.
281 */
282static uint32_t mmc_decode_and_save_cid(struct mmc_card *card,
283 uint32_t *raw_cid)
284{
285 struct mmc_cid mmc_cid;
286 uint32_t mmc_sizeof = 0;
287 int i = 0;
288
289 if (!raw_cid) {
290 return 1;
291 }
292
293 mmc_sizeof = sizeof(uint32_t) * 8;
294
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700295 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700296 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
297 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
298
299 for (i = 0; i < 5; i++) {
300 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid,
301 (104 - 8 * (i + 1)),
302 8,
303 mmc_sizeof);
304 }
305 mmc_cid.pnm[5] = 0;
306 mmc_cid.pnm[6] = 0;
307
308 mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700309 mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700310 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
311 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
312 mmc_cid.year += 2000;
313 } else {
314 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
315 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
316
317 for (i = 0; i < 6; i++) {
318 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid, (104 - 8 * (i + 1)),
319 8, mmc_sizeof);
320 }
321 mmc_cid.pnm[6] = 0;
322
323 mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700324 mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700325 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
326 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
327 mmc_cid.year += 1997;
328 }
329
330 /* save it in card database */
331 memcpy((struct mmc_cid *)&card->cid,
332 (struct mmc_cid *)&mmc_cid, sizeof(struct mmc_cid));
333
334 dprintf(SPEW, "Decoded CID fields:\n");
335 dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid);
336 dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid);
337 dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm);
338 dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4),
339 (mmc_cid.prv & 0xF));
340 dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn);
341 dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year);
342
343 return 0;
344}
345
346/*
347 * Function: mmc reset cards
348 * Arg : host structure
349 * Return : 0 on Success, 1 on Failure
350 * Flow : Reset all the cards to idle condition (CMD 0)
351 */
352static uint8_t mmc_reset_card(struct sdhci_host *host)
353{
354 struct mmc_command cmd;
355
356 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
357
358 cmd.cmd_index = CMD0_GO_IDLE_STATE;
359 cmd.argument = 0;
360 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
361 cmd.resp_type = SDHCI_CMD_RESP_NONE;
362
363 /* send command */
364 return sdhci_send_command(host, &cmd);
365}
366
367/*
368 * Function: mmc operations command
369 * Arg : host & card structure
370 * Return : 0 on Success, 1 on Failure
371 * Flow : Send CMD1 to know whether the card supports host VDD profile or not.
372 */
373static uint32_t mmc_send_op_cond(struct sdhci_host *host, struct mmc_card *card)
374{
375 struct mmc_command cmd;
376 uint32_t mmc_resp = 0;
377 uint32_t mmc_ret = 0;
378 uint32_t mmc_retry = 0;
379
380 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
381
382 /* CMD1 format:
383 * [31] Busy bit
384 * [30:29] Access mode
385 * [28:24] reserved
386 * [23:15] 2.7-3.6
387 * [14:8] 2.0-2.6
388 * [7] 1.7-1.95
389 * [6:0] reserved
390 */
391
392 cmd.cmd_index = CMD1_SEND_OP_COND;
393 cmd.argument = card->ocr;
394 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
395 cmd.resp_type = SDHCI_CMD_RESP_R3;
396
397 do {
398 mmc_ret = sdhci_send_command(host, &cmd);
399 if (mmc_ret)
400 return mmc_ret;
401
402 /* Command returned success, now it's time to examine response */
403 mmc_resp = cmd.resp[0];
404
405 /* Check the response for busy status */
406 if (!(mmc_resp & MMC_OCR_BUSY)) {
407 mmc_retry++;
408 mdelay(1);
409 continue;
410 } else
411 break;
412 } while (mmc_retry < MMC_MAX_COMMAND_RETRY);
413
414 /* If we reached here after max retries, we failed to get OCR */
415 if (mmc_retry == MMC_MAX_COMMAND_RETRY && !(mmc_resp & MMC_OCR_BUSY)) {
416 dprintf(CRITICAL, "Card has busy status set. Init did not complete\n");
417 return 1;
418 }
419
420 /* Response contains card's ocr. Update card's information */
421 card->ocr = mmc_resp;
422
423 if (mmc_resp & MMC_OCR_SEC_MODE)
424 card->type = MMC_TYPE_MMCHC;
425 else
426 card->type = MMC_TYPE_STD_MMC;
427
428 return 0;
429}
430
431/*
432 * Function: mmc send cid
433 * Arg : host & card structure
434 * Return : 0 on Success, 1 on Failure
435 * Flow : Request any card to send its uniquie card identification
436 * (CID) number (CMD2).
437 */
438static uint32_t mmc_all_send_cid(struct sdhci_host *host, struct mmc_card *card)
439{
440 struct mmc_command cmd;
441 uint32_t mmc_ret = 0;
442
443 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
444
445 /* CMD2 Format:
446 * [31:0] stuff bits
447 */
448 cmd.cmd_index = CMD2_ALL_SEND_CID;
449 cmd.argument = 0;
450 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
451 cmd.resp_type = SDHCI_CMD_RESP_R2;
452
453 /* send command */
454 mmc_ret = sdhci_send_command(host, &cmd);
455 if (mmc_ret) {
456 return mmc_ret;
457 }
458
459 /* Response contains card's 128 bits CID register */
460 mmc_ret = mmc_decode_and_save_cid(card, cmd.resp);
461 if (mmc_ret) {
462 return mmc_ret;
463 }
464
465 return 0;
466}
467
468/*
469 * Function: mmc send relative address
470 * Arg : host & card structure
471 * Return : 0 on Success, 1 on Failure
472 * Flow : Ask card to send it's relative card address (RCA).
473 * This RCA number is shorter than CID and is used by
474 * the host to address the card in future (CMD3)
475 */
476static uint32_t mmc_send_relative_address(struct sdhci_host *host,
477 struct mmc_card *card)
478{
479 struct mmc_command cmd;
480 uint32_t mmc_ret = 0;
481
482 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
483
484 /* CMD3 Format:
485 * [31:0] stuff bits
486 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700487 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700488 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
489 cmd.argument = 0;
490 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
491 cmd.resp_type = SDHCI_CMD_RESP_R6;
492
493 /* send command */
494 mmc_ret = sdhci_send_command(host, &cmd);
495 if (mmc_ret)
496 return mmc_ret;
497
498 /* For sD, card will send RCA. Store it */
499 card->rca = (cmd.resp[0] >> 16);
500 } else {
501 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
502 cmd.argument = (MMC_RCA << 16);
503 card->rca = (cmd.argument >> 16);
504 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
505 cmd.resp_type = SDHCI_CMD_RESP_R6;
506
507 /* send command */
508 mmc_ret = sdhci_send_command(host, &cmd);
509 if (mmc_ret)
510 return mmc_ret;
511 }
512
513 return 0;
514}
515
516/*
517 * Function: mmc send csd
518 * Arg : host, card structure & o/p arg to store csd
519 * Return : 0 on Success, 1 on Failure
520 * Flow : Requests card to send it's CSD register's contents. (CMD9)
521 */
522static uint32_t mmc_send_csd(struct sdhci_host *host, struct mmc_card *card)
523{
524 struct mmc_command cmd;
525 uint32_t mmc_arg = 0;
526 uint32_t mmc_ret = 0;
527
528 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
529
530 /* CMD9 Format:
531 * [31:16] RCA
532 * [15:0] stuff bits
533 */
534 mmc_arg |= card->rca << 16;
535
536 cmd.cmd_index = CMD9_SEND_CSD;
537 cmd.argument = mmc_arg;
538 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
539 cmd.resp_type = SDHCI_CMD_RESP_R2;
540
541 /* send command */
542 mmc_ret = sdhci_send_command(host, &cmd);
543 if (mmc_ret)
544 return mmc_ret;
545
546 /* response contains the card csd */
547 memcpy(card->raw_csd, cmd.resp, sizeof(cmd.resp));
548
549 return 0;
550}
551
552/*
553 * Function: mmc select card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700554 * Arg : host, card structure
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700555 * Return : 0 on Success, 1 on Failure
556 * Flow : Selects a card by sending CMD7 to the card with its RCA.
557 * If RCA field is set as 0 ( or any other address ),
558 * the card will be de-selected. (CMD7)
559 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700560static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700561{
562 struct mmc_command cmd;
563 uint32_t mmc_arg = 0;
564 uint32_t mmc_ret = 0;
565
566 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
567
568 /* CMD7 Format:
569 * [31:16] RCA
570 * [15:0] stuff bits
571 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700572 mmc_arg |= card->rca << 16;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700573
574 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
575 cmd.argument = mmc_arg;
576 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
577
578 /* If we are deselecting card, we do not get response */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700579 if (card->rca) {
580 if (MMC_CARD_SD(card))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700581 cmd.resp_type = SDHCI_CMD_RESP_R1B;
582 else
583 cmd.resp_type = SDHCI_CMD_RESP_R1;
584 } else
585 cmd.resp_type = SDHCI_CMD_RESP_NONE;
586
587 /* send command */
588 mmc_ret = sdhci_send_command(host, &cmd);
589 if (mmc_ret)
590 return mmc_ret;
591
592 return 0;
593}
594
595/*
596 * Function: mmc set block len
597 * Arg : host, card structure & block length
598 * Return : 0 on Success, 1 on Failure
599 * Flow : Send command to set block length.
600 */
601static uint32_t mmc_set_block_len(struct sdhci_host *host,
602 struct mmc_card *card,
603 uint32_t block_len)
604{
605 struct mmc_command cmd;
606 uint32_t mmc_ret = 0;
607
608 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
609
610 /* CMD16 Format:
611 * [31:0] block length
612 */
613
614 cmd.cmd_index = CMD16_SET_BLOCKLEN;
615 cmd.argument = block_len;
616 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
617 cmd.resp_type = SDHCI_CMD_RESP_R1;
618
619 /* send command */
620 mmc_ret = sdhci_send_command(host, &cmd);
621 if (mmc_ret)
622 return mmc_ret;
623
624 /*
625 * If blocklength is larger than 512 bytes,
626 * the card sets BLOCK_LEN_ERROR bit.
627 */
628 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
629 dprintf(CRITICAL, "The block length is not supported by the card\n");
630 return 1;
631 }
632
633 return 0;
634}
635
636/*
637 * Function: mmc get card status
638 * Arg : host, card structure & o/p argument card status
639 * Return : 0 on Success, 1 on Failure
640 * Flow : Get the current status of the card
641 */
642static uint32_t mmc_get_card_status(struct sdhci_host *host,
643 struct mmc_card *card, uint32_t *status)
644{
645 struct mmc_command cmd;
646 uint32_t mmc_ret = 0;
647
648 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
649
650 /* CMD13 Format:
651 * [31:16] RCA
652 * [15:0] stuff bits
653 */
654 cmd.cmd_index = CMD13_SEND_STATUS;
655 cmd.argument = card->rca << 16;
656 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
657 cmd.resp_type = SDHCI_CMD_RESP_R1;
658
659 /* send command */
660 mmc_ret = sdhci_send_command(host, &cmd);
661 if (mmc_ret)
662 return mmc_ret;
663
664 /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
665 if ((cmd.resp[0] >> 31) & 0x01)
666 return 1;
667
668 *status = cmd.resp[0];
669 return 0;
670}
671
672/*
673 * Function: mmc get ext csd
674 * Arg : host, card structure & array to hold ext attributes
675 * Return : 0 on Success, 1 on Failure
676 * Flow : Send ext csd command & get the card attributes
677 */
678static uint32_t mmc_get_ext_csd(struct sdhci_host *host, struct mmc_card *card)
679{
680 struct mmc_command cmd;
681 uint32_t mmc_ret = 0;
682
683 card->ext_csd = memalign(CACHE_LINE, ROUNDUP(512, CACHE_LINE));
684
685 ASSERT(card->ext_csd);
686
687 memset(card->ext_csd, 0, sizeof(card->ext_csd));
688
689 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
690
691 /* CMD8 */
692 cmd.cmd_index = CMD8_SEND_EXT_CSD;
693 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
694 cmd.resp_type = SDHCI_CMD_RESP_R1;
695 cmd.data.data_ptr = card->ext_csd;
696 cmd.data.num_blocks = 1;
697 cmd.data_present = 0x1;
698 cmd.trans_mode = SDHCI_MMC_READ;
699
700 /* send command */
701 mmc_ret = sdhci_send_command(host, &cmd);
702 if (mmc_ret)
703 return mmc_ret;
704
705 return mmc_ret;
706}
707
708/*
709 * Function: mmc switch command
710 * Arg : Host, card structure, access mode, index & value to be set
711 * Return : 0 on Success, 1 on Failure
712 * Flow : Send switch command to the card to set the ext attribute @ index
713 */
714static uint32_t mmc_switch_cmd(struct sdhci_host *host, struct mmc_card *card,
715 uint32_t access, uint32_t index, uint32_t value)
716{
717
718 struct mmc_command cmd;
719 uint32_t mmc_ret = 0;
720 uint32_t mmc_status;
721
722 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
723
724 /* CMD6 Format:
725 * [31:26] set to 0
726 * [25:24] access
727 * [23:16] index
728 * [15:8] value
729 * [7:3] set to 0
730 * [2:0] cmd set
731 */
732 cmd.cmd_index = CMD6_SWITCH_FUNC;
733 cmd.argument |= (access << 24);
734 cmd.argument |= (index << 16);
735 cmd.argument |= (value << 8);
736 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
737 cmd.resp_type = SDHCI_CMD_RESP_R1B;
738
739 mmc_ret = sdhci_send_command(host, &cmd);
740 if (mmc_ret) {
741 dprintf(CRITICAL, "CMD6 send failed\n");
742 return mmc_ret;
743 }
744
745 /* Check if the card completed the switch command processing */
746 mmc_ret = mmc_get_card_status(host, card, &mmc_status);
747 if (mmc_ret) {
748 dprintf(CRITICAL, "Get card status failed\n");
749 return mmc_ret;
750 }
751
752 if (MMC_CARD_STATUS(mmc_status) != MMC_TRAN_STATE) {
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700753 dprintf(CRITICAL, "Switch cmd failed. Card not in tran state %x\n", mmc_status);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700754 mmc_ret = 1;
755 }
756
757 if (mmc_status & MMC_SWITCH_FUNC_ERR_FLAG) {
758 dprintf(CRITICAL, "Switch cmd failed. Switch Error.\n");
759 mmc_ret = 1;
760 }
761
762 return mmc_ret;
763}
764
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700765bool mmc_set_drv_type(struct sdhci_host *host, struct mmc_card *card, uint8_t drv_type)
766{
767 uint32_t ret = 0;
768 bool drv_type_changed = false;
769
770 uint32_t value = ((drv_type << 4) | MMC_HS200_TIMING);
771
vijay kumar488e4842015-08-21 20:37:29 +0530772 if (MMC_CARD_MMC(card)) {
Mayank Grover3e66b2b2016-12-07 15:16:29 +0530773 if (card->ext_csd[MMC_EXT_MMC_DRV_STRENGTH] & (1 << drv_type)){
vijay kumar488e4842015-08-21 20:37:29 +0530774 ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, value);
Mayank Grover3e66b2b2016-12-07 15:16:29 +0530775 if (!ret)
776 drv_type_changed = true;
777 }
vijay kumar488e4842015-08-21 20:37:29 +0530778 }
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700779 return drv_type_changed;
780}
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700781/*
782 * Function: mmc set bus width
783 * Arg : Host, card structure & width
784 * Return : 0 on Success, 1 on Failure
785 * Flow : Send switch command to set bus width
786 */
787static uint32_t mmc_set_bus_width(struct sdhci_host *host,
788 struct mmc_card *card,
789 uint32_t width)
790{
791 uint32_t mmc_ret = 0;
792
793 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
794 MMC_EXT_MMC_BUS_WIDTH, width);
795
796 if (mmc_ret) {
797 dprintf(CRITICAL, "Switch cmd failed\n");
798 return mmc_ret;
799 }
800
801 return 0;
802}
803
804
805/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700806 * Function: mmc card supports hs400 mode
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700807 * Arg : None
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700808 * Return : 1 if hs400 mode is supported, 0 otherwise
809 * Flow : Check the ext csd attributes of the card
810 */
811static uint8_t mmc_card_supports_hs400_mode(struct mmc_card *card)
812{
vijay kumar488e4842015-08-21 20:37:29 +0530813 if (MMC_CARD_MMC(card)) {
814 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS400_MODE)
815 return 1;
816 else
817 return 0;
818 }
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700819 else
820 return 0;
821}
822
823/*
824 * Function: mmc card supports hs200 mode
825 * Arg : None
826 * Return : 1 if HS200 mode is supported, 0 otherwise
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700827 * Flow : Check the ext csd attributes of the card
828 */
829static uint8_t mmc_card_supports_hs200_mode(struct mmc_card *card)
830{
vijay kumar488e4842015-08-21 20:37:29 +0530831 if (MMC_CARD_MMC(card)) {
832 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS200_MODE)
833 return 1;
834 else
835 return 0;
836 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700837 else
838 return 0;
839}
840
841/*
842 * Function: mmc card supports ddr mode
843 * Arg : None
844 * Return : 1 if DDR mode is supported, 0 otherwise
845 * Flow : Check the ext csd attributes of the card
846 */
847static uint8_t mmc_card_supports_ddr_mode(struct mmc_card *card)
848{
vijay kumar488e4842015-08-21 20:37:29 +0530849 if (MMC_CARD_MMC(card)) {
850 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_DDR_MODE)
851 return 1;
852 else
853 return 0;
854 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700855 else
856 return 0;
857}
858
859/*
860 * Function : Enable HS200 mode
861 * Arg : Host, card structure and bus width
862 * Return : 0 on Success, 1 on Failure
863 * Flow :
864 * - Set the bus width to 4/8 bit SDR as supported by the target & host
865 * - Set the HS_TIMING on ext_csd 185 for the card
866 */
867static uint32_t mmc_set_hs200_mode(struct sdhci_host *host,
868 struct mmc_card *card, uint32_t width)
869{
870 uint32_t mmc_ret = 0;
871
Channagoud Kadabie632e252014-03-31 15:26:00 -0700872 DBG("\n Enabling HS200 Mode Start\n");
873
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700874 /* Set 4/8 bit SDR bus width */
875 mmc_ret = mmc_set_bus_width(host, card, width);
876 if (mmc_ret) {
877 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
878 card->rca);
879 return mmc_ret;
880 }
881
882 /* Setting HS200 in HS_TIMING using EXT_CSD (CMD6) */
883 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS200_TIMING);
884
885 if (mmc_ret) {
886 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
887 return mmc_ret;
888 }
889
Channagoud Kadabi1dc6aab2013-11-20 12:46:15 -0800890 /* Enable SDR104 mode in controller */
891 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
892
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700893 /* Run the clock @ 400 Mhz */
Channagoud Kadabie9168e82014-01-28 21:33:34 -0800894 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700895 {
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700896 /* Save the timing value, before changing the clock */
897 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
Channagoud Kadabi86756c12014-03-12 17:16:39 -0700898 /*
899 * Set the MCI_CLK divider before changing the sdcc core
900 * core clk to ensure card receives no more than 200 MHZ
901 * clock frequency
902 */
903 sdhci_msm_set_mci_clk(host);
904 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700905 }
Channagoud Kadabi642ff552014-08-12 21:40:59 -0700906
907 /* Execute Tuning for hs200 mode */
908 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
909 dprintf(CRITICAL, "Tuning for hs200 failed\n");
910
911 /* Once the tuning is executed revert back the clock to 200MHZ
912 * and disable the MCI_CLK divider so that we can use SDHC clock
913 * divider to supply clock to the card
914 */
915 if (host->timing == MMC_HS400_TIMING)
916 {
917 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
918 sdhci_msm_set_mci_clk(host);
919 clock_config_mmc(host->msm_host->slot, MMC_CLK_192MHZ);
920 }
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700921 else
922 {
923 /* Save the timing value, before changing the clock */
924 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
925 }
926
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700927
Channagoud Kadabie632e252014-03-31 15:26:00 -0700928 DBG("\n Enabling HS200 Mode Done\n");
929
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700930 return mmc_ret;
931}
932
933/*
934 * Function: mmc set ddr mode
935 * Arg : Host & card structure
936 * Return : 0 on Success, 1 on Failure
937 * Flow : Set bus width for ddr mode & set controller in DDR mode
938*/
939static uint8_t mmc_set_ddr_mode(struct sdhci_host *host, struct mmc_card *card)
940{
941 uint8_t mmc_ret = 0;
942
Channagoud Kadabie632e252014-03-31 15:26:00 -0700943 DBG("\n Enabling DDR Mode Start\n");
944
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700945 /* Set width for 8 bit DDR mode by default */
946 mmc_ret = mmc_set_bus_width(host, card, DATA_DDR_BUS_WIDTH_8BIT);
947
948 if (mmc_ret) {
949 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
950 card->rca);
951 return mmc_ret;
952 }
953
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700954 /* Save the timing value, before changing the clock */
955 MMC_SAVE_TIMING(host, SDHCI_DDR50_MODE);
956
957 /* Set the DDR mode in controller */
958 sdhci_set_uhs_mode(host, SDHCI_DDR50_MODE);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700959
Channagoud Kadabie632e252014-03-31 15:26:00 -0700960 DBG("\n Enabling DDR Mode Done\n");
961
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700962 return 0;
963}
964
965/*
966 * Function: mmc set high speed interface
967 * Arg : Host & card structure
968 * Return : None
969 * Flow : Sets the sdcc clock & clock divider in the host controller
970 * Adjust the interface speed to optimal speed
971 */
972static uint32_t mmc_set_hs_interface(struct sdhci_host *host,
973 struct mmc_card *card)
974{
975 uint32_t mmc_ret = 0;
976
977 /* Setting HS_TIMING in EXT_CSD (CMD6) */
978 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
979 MMC_EXT_MMC_HS_TIMING, MMC_HS_TIMING);
980
981 if (mmc_ret) {
982 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
983 return mmc_ret;
984 }
985
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700986 /* Save the timing value, before changing the clock */
987 MMC_SAVE_TIMING(host, SDHCI_SDR25_MODE);
988
989 /* Set the SDR25 mode in controller */
990 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
991
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700992 return 0;
993}
994
995/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700996 * Function : Enable HS400 mode
997 * Arg : Host, card structure and bus width
998 * Return : 0 on Success, 1 on Failure
999 * Flow :
1000 * - Set the bus width to 8 bit DDR
1001 * - Set the HS_TIMING on ext_csd 185 for the card
1002 */
1003uint32_t mmc_set_hs400_mode(struct sdhci_host *host,
1004 struct mmc_card *card, uint32_t width)
1005{
1006 uint32_t mmc_ret = 0;
1007
1008 /*
1009 * Emmc 5.0 spec does not allow changing to hs400 mode directly
1010 * Need to follow the sequence to change to hs400 mode
1011 * 1. Enable HS200 mode, perform tuning
1012 * 2. Change to high speed mode
1013 * 3. Enable DDR mode
1014 * 4. Enable HS400 mode & execute tuning
1015 */
1016
Channagoud Kadabie632e252014-03-31 15:26:00 -07001017 DBG("\n Enabling HS400 Mode Start\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001018 /* HS400 mode is supported only in DDR 8-bit */
1019 if (width != DATA_BUS_WIDTH_8BIT)
1020 {
1021 dprintf(CRITICAL, "Bus width is not 8-bit, cannot switch to hs400: %u\n", width);
1022 return 1;
1023 }
1024
1025 /* 1.Enable HS200 mode */
1026 mmc_ret = mmc_set_hs200_mode(host, card, width);
1027
1028 if (mmc_ret)
1029 {
1030 dprintf(CRITICAL, "Failure Setting HS200 mode %s\t%d\n",__func__, __LINE__);
1031 return mmc_ret;
1032 }
1033
1034 /* 2. Enable High speed mode */
1035 /* This is needed to set the clock to a low value &
1036 * so that we can switch to hs_timing --> 0x1 */
1037 /* Save the timing value, before changing the clock */
1038 MMC_SAVE_TIMING(host, SDHCI_SDR12_MODE);
1039 sdhci_set_uhs_mode(host, SDHCI_SDR12_MODE);
1040
1041 /* 3. Set HS_TIMING to 0x1 */
1042 mmc_ret = mmc_set_hs_interface(host, card);
1043 if (mmc_ret)
1044 {
1045 dprintf(CRITICAL, "Error adjusting interface speed!:%s\t%d\n", __func__, __LINE__);
1046 return mmc_ret;
1047 }
1048
1049 /*4. Enable DDR mode */
1050 mmc_ret = mmc_set_ddr_mode(host, card);
1051 if (mmc_ret)
1052 {
1053 dprintf(CRITICAL, "Failure setting DDR mode:%s\t%d\n", __func__, __LINE__);
1054 return mmc_ret;
1055 }
1056
1057 /*5. Set hs400 timing */
1058 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS400_TIMING);
1059
1060 if (mmc_ret)
1061 {
1062 dprintf(CRITICAL, "Switch cmd returned failure %s\t%d\n",__func__, __LINE__);
1063 return mmc_ret;
1064 }
1065
1066 /* 6. Enable SDR104 mode in controller */
1067 /* Save the timing value, before changing the clock */
1068 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
1069 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
Channagoud Kadabi86756c12014-03-12 17:16:39 -07001070 /*
1071 * Enable HS400 mode
1072 */
1073 sdhci_msm_set_mci_clk(host);
Channagoud Kadabi642ff552014-08-12 21:40:59 -07001074 /* Set the clock back to 400 MHZ */
1075 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001076
1077 /* 7. Execute Tuning for hs400 mode */
Channagoud Kadabie106d1f2014-04-25 18:26:26 -07001078 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001079 dprintf(CRITICAL, "Tuning for hs400 failed\n");
1080
Channagoud Kadabie632e252014-03-31 15:26:00 -07001081 DBG("\n Enabling HS400 Mode Done\n");
1082
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001083 return mmc_ret;
1084}
1085
1086/*
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001087 * Function: mmc_host_init
1088 * Arg : mmc device structure
1089 * Return : 0 on success, 1 on Failure
1090 * Flow : Initialize the host contoller
1091 * Set the clock rate to 400 KHZ for init
1092 */
1093static uint8_t mmc_host_init(struct mmc_device *dev)
1094{
1095 uint8_t mmc_ret = 0;
1096
1097 struct sdhci_host *host;
1098 struct mmc_config_data *cfg;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001099 struct sdhci_msm_data *data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001100
1101 event_t sdhc_event;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001102
1103 host = &dev->host;
1104 cfg = &dev->config;
1105
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001106 event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
1107
1108 host->base = cfg->sdhc_base;
1109 host->sdhc_event = &sdhc_event;
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001110 host->caps.hs200_support = cfg->hs200_support;
Aparna Mallavarapue1cdd302014-03-07 07:12:44 +05301111 host->caps.hs400_support = cfg->hs400_support;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001112
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001113 data = (struct sdhci_msm_data *) malloc(sizeof(struct sdhci_msm_data));
1114 ASSERT(data);
1115
1116 data->sdhc_event = &sdhc_event;
1117 data->pwrctl_base = cfg->pwrctl_base;
1118 data->pwr_irq = cfg->pwr_irq;
1119 data->slot = cfg->slot;
Channagoud Kadabi17e69972014-10-13 11:42:24 -07001120 data->use_io_switch = cfg->use_io_switch;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001121
1122 host->msm_host = data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001123
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -07001124 /* Initialize any clocks needed for SDC controller */
1125 clock_init_mmc(cfg->slot);
1126
1127 clock_config_mmc(cfg->slot, cfg->max_clk_rate);
1128
Channagoud Kadabie632e252014-03-31 15:26:00 -07001129 /* Configure the CDC clocks needed for emmc storage
1130 * we use slot '1' for emmc
1131 */
1132 if (cfg->slot == 1)
1133 clock_config_cdc(cfg->slot);
1134
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001135 /*
1136 * MSM specific sdhc init
1137 */
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001138 sdhci_msm_init(host, data);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001139
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001140 /*
1141 * Initialize the controller, read the host capabilities
1142 * set power on mode
1143 */
1144 sdhci_init(host);
1145
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001146 /* Setup initial freq to 400KHz */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001147 mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
1148
1149 return mmc_ret;
1150}
1151
1152/*
1153 * Function: mmc identify card
1154 * Arg : host & card structure
1155 * Return : 0 on Success, 1 on Failure
1156 * Flow : Performs card identification process:
1157 * 1. Get card's unique identification number (CID)
1158 * 2. Get(for sd)/set (for mmc) relative card address (RCA)
1159 * 3. Select the card to put it in TRAN state
1160 */
1161static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
1162{
1163 uint32_t mmc_return = 0;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001164
1165 /* Ask card to send its unique card identification (CID) number (CMD2) */
1166 mmc_return = mmc_all_send_cid(host, card);
1167 if (mmc_return) {
1168 dprintf(CRITICAL,"Failure getting card's CID number!\n");
1169 return mmc_return;
1170 }
1171
1172 /* Ask card to send a relative card address (RCA) (CMD3) */
1173 mmc_return = mmc_send_relative_address(host, card);
1174 if (mmc_return) {
1175 dprintf(CRITICAL, "Failure getting card's RCA!\n");
1176 return mmc_return;
1177 }
1178
1179 /* Get card's CSD register (CMD9) */
1180 mmc_return = mmc_send_csd(host, card);
1181 if (mmc_return) {
1182 dprintf(CRITICAL,"Failure getting card's CSD information!\n");
1183 return mmc_return;
1184 }
1185
1186 /* Select the card (CMD7) */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001187 mmc_return = mmc_select_card(host, card);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001188 if (mmc_return) {
1189 dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
1190 return mmc_return;
1191 }
1192
1193 /* Set the card status as active */
1194 card->status = MMC_STATUS_ACTIVE;
1195
1196 return 0;
1197}
1198
1199/*
1200 * Function: mmc_reset_card_and_send_op
1201 * Arg : Host & Card structure
1202 * Return : 0 on Success, 1 on Failure
1203 * Flow : Routine to initialize MMC card. It resets a card to idle state,
1204 * verify operating voltage and set the card in ready state.
1205 */
1206static uint32_t mmc_reset_card_and_send_op(struct sdhci_host *host, struct mmc_card *card)
1207{
1208 uint32_t mmc_return = 0;
1209
1210 /* 1. Card Reset - CMD0 */
1211 mmc_return = mmc_reset_card(host);
1212 if (mmc_return) {
1213 dprintf(CRITICAL, "Failure resetting MMC cards!\n");
1214 return mmc_return;
1215 }
1216
1217 /* 2. Card Initialization process */
1218
1219 /*
1220 * Send CMD1 to identify and reject cards that do not match host's VDD range
1221 * profile. Cards sends its OCR register in response.
1222 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001223
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001224 mmc_return = mmc_send_op_cond(host, card);
1225
1226 /* OCR is not received, init could not complete */
1227 if (mmc_return) {
1228 dprintf(CRITICAL, "Failure getting OCR response from MMC Card\n");
1229 return mmc_return;
1230 }
1231
1232 return 0;
1233}
1234
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001235static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
1236{
1237 struct mmc_command cmd = {0};
1238
1239 cmd.cmd_index = CMD55_APP_CMD;
1240 cmd.argument = (card->rca << 16);
1241 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1242 cmd.resp_type = SDHCI_CMD_RESP_R1;
1243
1244 if (sdhci_send_command(host, &cmd))
1245 {
1246 dprintf(CRITICAL, "Failed Sending CMD55\n");
1247 return 1;
1248 }
1249 return 0;
1250}
1251
1252uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
1253{
1254 uint8_t i;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001255 struct mmc_command cmd;
1256
1257 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1258
1259 /* Use the SD card RCA 0x0 during init */
1260 card->rca = SD_CARD_RCA;
1261
1262 /* Send CMD8 for voltage check*/
1263 for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
1264 {
1265 cmd.cmd_index = CMD8_SEND_IF_COND;
1266 cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
1267 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1268 cmd.resp_type = SDHCI_CMD_RESP_R7;
1269
1270 if (sdhci_send_command(host, &cmd))
1271 {
1272 dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
1273 return 1;
1274 }
1275 else
1276 {
1277 /* If the command response echos the voltage back */
1278 if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
1279 break;
1280 }
1281 /* As per SDCC the spec try for max three times with
1282 * 1 ms delay
1283 */
1284 mdelay(1);
1285 }
1286
1287 if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
1288 {
1289 dprintf(CRITICAL, "Error: CMD8 response timed out\n");
1290 return 1;
1291 }
1292
1293 /* Send ACMD41 for OCR */
1294 for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
1295 {
1296 /* Send APP_CMD before ACMD41*/
1297 if (mmc_send_app_cmd(host, card))
1298 {
1299 dprintf(CRITICAL, "Failed sending App command\n");
1300 return 1;
1301 }
1302
1303 /* APP_CMD is successful, send ACMD41 now */
1304 cmd.cmd_index = ACMD41_SEND_OP_COND;
1305 cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
1306 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1307 cmd.resp_type = SDHCI_CMD_RESP_R3;
1308
1309 if (sdhci_send_command(host, &cmd))
1310 {
1311 dprintf(CRITICAL, "Failure sending ACMD41\n");
1312 return 1;
1313 }
1314 else
1315 {
1316 if (cmd.resp[0] & MMC_SD_DEV_READY)
1317 {
1318 if (cmd.resp[0] & (1 << 30))
1319 card->type = MMC_CARD_TYPE_SDHC;
1320 else
1321 card->type = MMC_CARD_TYPE_STD_SD;
1322
1323 break;
1324 }
1325 }
1326 /*
1327 * As per SDCC spec try for max 1 second
1328 */
1329 mdelay(50);
1330 }
1331
1332 if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
1333 {
1334 dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
1335 return 1;
1336 }
1337
1338 return 0;
1339}
1340
1341/*
1342 * Function to read SD card information from SD status
1343 */
1344static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
1345{
1346 BUF_DMA_ALIGN(raw_sd_status, 64);
1347 struct mmc_command cmd = {0};
1348 uint32_t sd_status[16];
1349 uint32_t *status = sd_status;
1350 uint32_t au_size;
1351 int i;
1352 int j;
1353
1354 if (mmc_send_app_cmd(host, card))
1355 {
1356 dprintf(CRITICAL, "Failed sending App command\n");
1357 return 1;
1358 }
1359
1360 cmd.cmd_index = ACMD13_SEND_SD_STATUS;
1361 cmd.argument = 0x0;
1362 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
Channagoud Kadabi57f37a82014-08-25 13:33:49 -07001363 cmd.resp_type = SDHCI_CMD_RESP_R1;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001364 cmd.trans_mode = SDHCI_MMC_READ;
1365 cmd.data_present = 0x1;
1366 cmd.data.data_ptr = raw_sd_status;
1367 cmd.data.num_blocks = 0x1;
1368 cmd.data.blk_sz = 0x40;
1369
1370 /* send command */
1371 if (sdhci_send_command(host, &cmd))
1372 return 1;
1373
1374 memcpy(sd_status, raw_sd_status, sizeof(sd_status));
1375
1376 for (i = 15, j = 0; i >=0 ; i--, j++)
1377 sd_status[i] = swap_endian32(sd_status[j]);
1378
1379 au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
1380 /* Card AU size in sectors */
1381 card->ssr.au_size = 1 << (au_size + 4);
1382 card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
vijay kumarb01d64c2015-08-21 20:37:29 +05301383 /*if num_aus is 0 then host should assign number of AU erased at a time*/
1384 if (!card->ssr.num_aus)
1385 card->ssr.num_aus = 0x10;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001386 return 0;
1387}
1388
1389/*
1390 * Function to read the SD CARD configuration register
1391 */
1392static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
1393{
1394 BUF_DMA_ALIGN(scr_resp, 8);
1395 struct mmc_command cmd = {0};
1396 uint32_t raw_scr[2];
1397
1398 /* Now read the SCR register */
1399 /* Send APP_CMD before ACMD51*/
1400 if (mmc_send_app_cmd(host, card))
1401 {
1402 dprintf(CRITICAL, "Failed sending App command\n");
1403 return 1;
1404 }
1405
1406 cmd.cmd_index = ACMD51_READ_CARD_SCR;
1407 cmd.argument = 0x0;
1408 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1409 cmd.resp_type = SDHCI_CMD_RESP_R1;
1410 cmd.trans_mode = SDHCI_MMC_READ;
1411 cmd.data_present = 0x1;
1412 cmd.data.data_ptr = scr_resp;
1413 cmd.data.num_blocks = 0x1;
1414 cmd.data.blk_sz = 0x8;
1415
1416 /* send command */
1417 if (sdhci_send_command(host, &cmd))
1418 return 1;
1419
1420 memcpy(raw_scr, scr_resp, sizeof(raw_scr));
1421
1422 card->raw_scr[0] = swap_endian32(raw_scr[0]);
1423 card->raw_scr[1] = swap_endian32(raw_scr[1]);
1424
1425 /*
1426 * Parse & Populate the SCR data as per sdcc spec
1427 */
1428 card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
1429 card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
1430 card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
1431 card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
1432
1433 return 0;
1434}
1435
1436/*
1437 * Function: mmc_set_sd_bus_width
1438 * Arg : host, device structure & width
1439 * Return : 0 on Success, 1 on Failure
1440 * Flow : Set the bus width for the card
1441 */
1442uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
1443{
1444 struct mmc_command cmd = {0};
1445
1446 /* Send APP_CMD before ACMD6*/
1447 if (mmc_send_app_cmd(host, card))
1448 {
1449 dprintf(CRITICAL, "Failed sending App command\n");
1450 return 1;
1451 }
1452
1453 cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
1454 cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
1455 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1456 cmd.resp_type = SDHCI_CMD_RESP_R1;
1457
1458 /* send command */
1459 if (sdhci_send_command(host, &cmd))
1460 return 1;
1461
1462 return 0;
1463}
1464
1465uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
1466{
1467 struct mmc_command cmd = {0};
1468 BUF_DMA_ALIGN(switch_resp, 64);
1469
1470 cmd.cmd_index = CMD6_SWITCH_FUNC;
1471 cmd.argument = MMC_SD_SWITCH_HS;
1472 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1473 cmd.resp_type = SDHCI_CMD_RESP_R1;
1474 cmd.trans_mode = SDHCI_MMC_READ;
1475 cmd.data_present = 0x1;
1476 cmd.data.data_ptr = switch_resp;
1477 cmd.data.num_blocks = 0x1;
1478 cmd.data.blk_sz = 0x40;
1479
1480 /* send command */
1481 if (sdhci_send_command(host, &cmd))
1482 return 1;
1483
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001484 /* Set the SDR25 mode in controller*/
1485 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
1486
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001487 return 0;
1488}
1489
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001490/*
1491 * Function: mmc_init_card
1492 * Arg : mmc device structure
1493 * Return : 0 on Success, 1 on Failure
1494 * Flow : Performs initialization and identification of eMMC cards connected
1495 * to the host.
1496 */
1497
1498static uint32_t mmc_card_init(struct mmc_device *dev)
1499{
1500 uint32_t mmc_return = 0;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001501 uint8_t bus_width = 0;
1502
1503 struct sdhci_host *host;
1504 struct mmc_card *card;
1505 struct mmc_config_data *cfg;
1506
1507 host = &dev->host;
1508 card = &dev->card;
1509 cfg = &dev->config;
1510
1511 /* Initialize MMC card structure */
1512 card->status = MMC_STATUS_INACTIVE;
1513
1514 /* TODO: Get the OCR params from target */
1515 card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
1516
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001517 /* Initialize the internal MMC */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001518 mmc_return = mmc_reset_card_and_send_op(host, card);
1519 if (mmc_return)
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001520 {
1521 dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
1522 /* Reset the card & get the OCR */
1523 mmc_return = mmc_sd_card_init(host, card);
1524 if (mmc_return)
1525 {
1526 dprintf(CRITICAL, "Failed to initialize SD card\n");
1527 return mmc_return;
1528 }
1529 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001530
1531 /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
1532 mmc_return = mmc_identify_card(host, card);
1533 if (mmc_return)
1534 return mmc_return;
1535
1536 /* set interface speed */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001537 if (MMC_CARD_SD(card))
1538 {
1539 mmc_return = mmc_sd_set_hs(host, card);
1540 if (mmc_return)
1541 {
1542 dprintf(CRITICAL, "Failed to set HS for SD card\n");
1543 return mmc_return;
1544 }
1545 }
1546 else
1547 {
1548 mmc_return = mmc_set_hs_interface(host, card);
1549 if (mmc_return) {
1550 dprintf(CRITICAL, "Error adjusting interface speed!\n");
1551 return mmc_return;
1552 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001553 }
1554
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001555 /* Now get the extended CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001556 if (MMC_CARD_MMC(card))
1557 {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001558 /* For MMC cards, also get the extended csd */
1559 mmc_return = mmc_get_ext_csd(host, card);
1560
1561 if (mmc_return) {
1562 dprintf(CRITICAL, "Failure getting card's ExtCSD information!\n");
1563 return mmc_return;
1564 }
1565 }
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001566 else
1567 {
1568 /*Read SCR for sd card */
1569 if (mmc_sd_get_card_scr(host, card))
1570 {
1571 dprintf(CRITICAL, "Failure getting card's SCR register\n");
1572 return 1;
1573 }
1574 /* Read SSR for the SD card */
1575 if (mmc_sd_get_card_ssr(host, card))
1576 {
1577 dprintf(CRITICAL, "Failed to get SSR from the card\n");
1578 return 1;
1579 }
1580 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001581
1582 /* Decode and save the CSD register */
1583 mmc_return = mmc_decode_and_save_csd(card);
1584 if (mmc_return) {
1585 dprintf(CRITICAL, "Failure decoding card's CSD information!\n");
1586 return mmc_return;
1587 }
1588
1589
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001590 if (MMC_CARD_MMC(card))
1591 {
1592 /* Set the bus width based on host, target capbilities */
1593 if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
1594 bus_width = DATA_BUS_WIDTH_8BIT;
1595 /*
1596 * Host contoller by default supports 4 bit & 1 bit mode.
1597 * No need to check for host support here
1598 */
1599 else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
1600 bus_width = DATA_BUS_WIDTH_4BIT;
1601 else
1602 bus_width = DATA_BUS_WIDTH_1BIT;
1603
1604 /* Set 4/8 bit SDR bus width in controller */
1605 mmc_return = sdhci_set_bus_width(host, bus_width);
1606
1607 if (mmc_return) {
1608 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
1609 return 1;
1610 }
1611
1612 /* Enable high speed mode in the follwing order:
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001613 * 1. HS400 mode if supported by host & card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001614 * 1. HS200 mode if supported by host & card
1615 * 2. DDR mode host, if supported by host & card
1616 * 3. Use normal speed mode with supported bus width
1617 */
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001618 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001619 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001620 dprintf(INFO, "SDHC Running in HS400 mode\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001621 mmc_return = mmc_set_hs400_mode(host, card, bus_width);
1622 if (mmc_return)
1623 {
1624 dprintf(CRITICAL, "Failure to set HS400 mode for Card(RCA:%x)\n",
1625 card->rca);
1626 return mmc_return;
1627 }
1628 }
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001629#if USE_TARGET_HS200_CAPS
1630 else if (host->caps.hs200_support && host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
1631#else
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001632 else if (host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001633#endif
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001634 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001635 dprintf(INFO, "SDHC Running in HS200 mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001636 mmc_return = mmc_set_hs200_mode(host, card, bus_width);
1637
1638 if (mmc_return) {
1639 dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
1640 card->rca);
1641 return mmc_return;
1642 }
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001643 } else if (host->caps.ddr_support && mmc_card_supports_ddr_mode(card)) {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001644 dprintf(INFO, "SDHC Running in DDR mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001645 mmc_return = mmc_set_ddr_mode(host, card);
1646
1647 if (mmc_return) {
1648 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
1649 card->rca);
1650 return mmc_return;
1651 }
1652 } else {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001653 dprintf(INFO, "SDHC Running in High Speed mode\n");
1654 /* Set HS_TIMING mode */
1655 mmc_return = mmc_set_hs_interface(host, card);
1656 if (mmc_return) {
1657 dprintf(CRITICAL, "Failure to enalbe HS mode for Card(RCA:%x)\n",
1658 card->rca);
1659 return mmc_return;
1660 }
1661 /* Set wide bus mode */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001662 mmc_return = mmc_set_bus_width(host, card, bus_width);
1663 if (mmc_return) {
1664 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
1665 card->rca);
1666 return mmc_return;
1667 }
1668 }
1669 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001670 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001671 {
1672 /* Check the supported bus width for the card from SCR register */
1673 if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
1674 bus_width = DATA_BUS_WIDTH_4BIT;
1675 else
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001676 bus_width = DATA_BUS_WIDTH_1BIT;
1677
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001678 mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
1679 if (mmc_return)
1680 {
1681 dprintf(CRITICAL, "Failed to set bus width for the card\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001682 return mmc_return;
1683 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001684
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001685 /* Set bit SDR bus width in controller */
1686 mmc_return = sdhci_set_bus_width(host, bus_width);
1687 if (mmc_return)
1688 {
1689 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001690 return mmc_return;
1691 }
1692 }
1693
1694
Channagoud Kadabi96c629e2013-09-10 14:21:30 -07001695 card->block_size = MMC_BLK_SZ;
1696
vijay kumar488e4842015-08-21 20:37:29 +05301697 if (MMC_CARD_MMC(card)) {
1698 /* Enable RST_n_FUNCTION */
1699 if (!card->ext_csd[MMC_EXT_CSD_RST_N_FUNC])
Channagoud Kadabifaf20f62014-10-21 22:22:37 -07001700 {
vijay kumar488e4842015-08-21 20:37:29 +05301701 mmc_return = mmc_switch_cmd(host, card, MMC_SET_BIT, MMC_EXT_CSD_RST_N_FUNC, RST_N_FUNC_ENABLE);
Channagoud Kadabifaf20f62014-10-21 22:22:37 -07001702
vijay kumar488e4842015-08-21 20:37:29 +05301703 if (mmc_return)
1704 {
1705 dprintf(CRITICAL, "Failed to enable RST_n_FUNCTION\n");
1706 return mmc_return;
1707 }
1708 }
1709
1710 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001711 return mmc_return;
1712}
1713
1714/*
1715 * Function: mmc display csd
1716 * Arg : None
1717 * Return : None
1718 * Flow : Displays the csd information
1719 */
1720static void mmc_display_csd(struct mmc_card *card)
1721{
1722 dprintf(SPEW, "erase_grpsize: %d\n", card->csd.erase_grp_size);
1723 dprintf(SPEW, "erase_grpmult: %d\n", card->csd.erase_grp_mult);
1724 dprintf(SPEW, "wp_grpsize: %d\n", card->csd.wp_grp_size);
1725 dprintf(SPEW, "wp_grpen: %d\n", card->csd.wp_grp_enable);
1726 dprintf(SPEW, "perm_wp: %d\n", card->csd.perm_wp);
1727 dprintf(SPEW, "temp_wp: %d\n", card->csd.temp_wp);
1728}
1729
1730/*
1731 * Function: mmc_init
1732 * Arg : MMC configuration data
1733 * Return : Pointer to mmc device
1734 * Flow : Entry point to MMC boot process
1735 * Initialize the sd host controller
1736 * Initialize the mmc card
1737 * Set the clock & high speed mode
1738 */
1739struct mmc_device *mmc_init(struct mmc_config_data *data)
1740{
1741 uint8_t mmc_ret = 0;
1742 struct mmc_device *dev;
1743
1744 dev = (struct mmc_device *) malloc (sizeof(struct mmc_device));
1745
1746 if (!dev) {
1747 dprintf(CRITICAL, "Error allocating mmc device\n");
1748 return NULL;
1749 }
1750
1751 ASSERT(data);
1752
1753 memcpy((void*)&dev->config, (void*)data, sizeof(struct mmc_config_data));
1754
1755 memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
1756
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001757 /* Initialize the host & clock */
1758 dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
1759
1760 mmc_ret = mmc_host_init(dev);
1761 if (mmc_ret) {
1762 dprintf(CRITICAL, "Error Initializing MMC host : %u\n", mmc_ret);
1763 return NULL;
1764 }
1765
1766 /* Initialize and identify cards connected to host */
1767 mmc_ret = mmc_card_init(dev);
1768 if (mmc_ret) {
1769 dprintf(CRITICAL, "Failed detecting MMC/SDC @ slot%d\n",
1770 dev->config.slot);
1771 return NULL;
1772 }
1773
1774 dprintf(INFO, "Done initialization of the card\n");
1775
1776 mmc_display_csd(&dev->card);
1777
1778 return dev;
1779}
1780
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001781static uint32_t mmc_parse_response(uint32_t resp)
1782{
1783 /* Trying to write beyond card capacity */
1784 if (resp & MMC_R1_ADDR_OUT_OF_RANGE) {
1785 dprintf(CRITICAL, "Attempting to read or write beyond the Device capacity\n");
1786 return 1;
1787 }
1788
1789 /* Misaligned address not matching block length */
1790 if (resp & MMC_R1_ADDR_ERR) {
1791 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1792 return 1;
1793 }
1794
1795 /* Invalid block length */
1796 if (resp & MMC_R1_BLOCK_LEN_ERR) {
1797 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1798 return 1;
1799 }
1800
1801 /* Tried to program write protected block */
1802 if (resp & MMC_R1_WP_VIOLATION) {
1803 dprintf(CRITICAL, "Attempt to program a write protected block\n");
1804 return 1;
1805 }
1806
1807 /* card controller error */
1808 if (resp & MMC_R1_CC_ERROR) {
1809 dprintf(CRITICAL, "Device error occurred, which is not related to the host command\n");
1810 return 1;
1811 }
1812
1813 /* Generic error */
1814 if (resp & MMC_R1_GENERIC_ERR) {
1815 dprintf(CRITICAL, "A generic Device error\n");
1816 return 1;
1817 }
1818
1819 /* Finally check for card in TRAN state */
1820 if (MMC_CARD_STATUS(resp) != MMC_TRAN_STATE) {
1821 dprintf(CRITICAL, "MMC card is not in TRAN state\n");
1822 return 1;
1823 }
1824
1825 return 0;
1826}
1827
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001828static uint32_t mmc_stop_command(struct mmc_device *dev)
1829{
1830 struct mmc_command cmd;
1831 uint32_t mmc_ret = 0;
1832
1833 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1834
1835 cmd.cmd_index = CMD12_STOP_TRANSMISSION;
1836 cmd.argument = (dev->card.rca << 16);
1837 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1838 cmd.resp_type = SDHCI_CMD_RESP_R1;
1839
1840 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1841 if(mmc_ret)
1842 {
1843 dprintf(CRITICAL, "Failed to send stop command\n");
1844 return mmc_ret;
1845 }
1846
1847 /* Response contains 32 bit Card status.
1848 * Parse the errors & provide relevant information */
1849
1850 return mmc_parse_response(cmd.resp[0]);
1851}
1852
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001853/*
1854 * Function: mmc sdhci read
1855 * Arg : mmc device structure, block address, number of blocks & destination
1856 * Return : 0 on Success, non zero on success
1857 * Flow : Fill in the command structure & send the command
1858 */
1859uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest,
1860 uint64_t blk_addr, uint32_t num_blocks)
1861{
1862 uint32_t mmc_ret = 0;
1863 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001864 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001865
1866 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1867
1868 /* CMD17/18 Format:
1869 * [31:0] Data Address
1870 */
1871 if (num_blocks == 1)
1872 cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
1873 else
1874 cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
1875
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001876 /*
1877 * Standard emmc cards use byte mode addressing
1878 * convert the block address to byte address before
1879 * sending the command
1880 */
1881 if (card->type == MMC_TYPE_STD_MMC)
1882 cmd.argument = blk_addr * card->block_size;
1883 else
1884 cmd.argument = blk_addr;
1885
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001886 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1887 cmd.resp_type = SDHCI_CMD_RESP_R1;
1888 cmd.trans_mode = SDHCI_MMC_READ;
1889 cmd.data_present = 0x1;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001890
1891 /* Use CMD23 If card supports CMD23:
1892 * For SD card use the value read from SCR register
1893 * For emmc by default use CMD23.
1894 * Also as per SDCC spec always use CMD23 to stop
1895 * multiblock read/write if UHS (Ultra High Speed) is
1896 * enabled
1897 */
1898 if (MMC_CARD_SD(card))
1899 cmd.cmd23_support = dev->card.scr.cmd23_support;
1900 else
1901 cmd.cmd23_support = 0x1;
1902
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001903 cmd.data.data_ptr = dest;
1904 cmd.data.num_blocks = num_blocks;
1905
1906 /* send command */
1907 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001908
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001909 /* For multi block read failures send stop command */
1910 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001911 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001912 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001913 }
1914
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001915 /*
1916 * Response contains 32 bit Card status.
1917 * Parse the errors & provide relevant information
1918 */
1919 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001920}
1921
1922/*
1923 * Function: mmc sdhci write
1924 * Arg : mmc device structure, block address, number of blocks & source
1925 * Return : 0 on Success, non zero on success
1926 * Flow : Fill in the command structure & send the command
1927 */
1928uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src,
1929 uint64_t blk_addr, uint32_t num_blocks)
1930{
1931 uint32_t mmc_ret = 0;
1932 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001933 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001934
1935 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1936
1937 /* CMD24/25 Format:
1938 * [31:0] Data Address
1939 */
1940
1941 if (num_blocks == 1)
1942 cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
1943 else
1944 cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
1945
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001946 /*
1947 * Standard emmc cards use byte mode addressing
1948 * convert the block address to byte address before
1949 * sending the command
1950 */
1951 if (card->type == MMC_TYPE_STD_MMC)
1952 cmd.argument = blk_addr * card->block_size;
1953 else
1954 cmd.argument = blk_addr;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001955 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1956 cmd.resp_type = SDHCI_CMD_RESP_R1;
1957 cmd.trans_mode = SDHCI_MMC_WRITE;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001958
1959 /* Use CMD23 If card supports CMD23:
1960 * For SD card use the value read from SCR register
1961 * For emmc by default use CMD23.
1962 * Also as per SDCC spec always use CMD23 to stop
1963 * multiblock read/write if UHS (Ultra High Speed) is
1964 * enabled
1965 */
1966 if (MMC_CARD_SD(card))
1967 cmd.cmd23_support = dev->card.scr.cmd23_support;
1968 else
1969 cmd.cmd23_support = 0x1;
1970
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001971 cmd.data_present = 0x1;
1972 cmd.data.data_ptr = src;
1973 cmd.data.num_blocks = num_blocks;
1974
1975 /* send command */
1976 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001977
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001978 /* For multi block write failures send stop command */
1979 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001980 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001981 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001982 }
1983
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001984 /*
1985 * Response contains 32 bit Card status.
1986 * Parse the errors & provide relevant information
1987 */
1988 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001989}
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001990
1991/*
1992 * Send the erase group start address using CMD35
1993 */
1994static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
1995{
1996 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001997 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001998
1999 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2000
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002001 if (MMC_CARD_MMC(card))
2002 cmd.cmd_index = CMD35_ERASE_GROUP_START;
2003 else
2004 cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
2005
vijay kumar1129e4e2014-03-28 11:24:48 +05302006 /*
2007 * Standard emmc cards use byte mode addressing
2008 * convert the block address to byte address before
2009 * sending the command
2010 */
2011 if (card->type == MMC_TYPE_STD_MMC)
2012 cmd.argument = erase_start * card->block_size;
2013 else
2014 cmd.argument = erase_start;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002015 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2016 cmd.resp_type = SDHCI_CMD_RESP_R1;
2017
2018 /* send command */
2019 if (sdhci_send_command(&dev->host, &cmd))
2020 return 1;
2021
2022 /*
2023 * CMD35 on failure returns address out of range error
2024 */
2025 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2026 {
2027 dprintf(CRITICAL, "Address for CMD35 is out of range\n");
2028 return 1;
2029 }
2030
2031 return 0;
2032}
2033
2034/*
2035 * Send the erase group end address using CMD36
2036 */
2037static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
2038{
2039 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002040 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002041
2042 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2043
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002044 if (MMC_CARD_MMC(card))
2045 cmd.cmd_index = CMD36_ERASE_GROUP_END;
2046 else
2047 cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
2048
vijay kumar1129e4e2014-03-28 11:24:48 +05302049 /*
2050 * Standard emmc cards use byte mode addressing
2051 * convert the block address to byte address before
2052 * sending the command
2053 */
2054 if (card->type == MMC_TYPE_STD_MMC)
2055 cmd.argument = erase_end * card->block_size;
2056 else
2057 cmd.argument = erase_end;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002058 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2059 cmd.resp_type = SDHCI_CMD_RESP_R1;
2060
2061 /* send command */
2062 if (sdhci_send_command(&dev->host, &cmd))
2063 return 1;
2064
2065 /*
2066 * CMD3 on failure returns address out of range error
2067 */
2068 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2069 {
2070 dprintf(CRITICAL, "Address for CMD36 is out of range\n");
2071 return 1;
2072 }
2073
2074 return 0;
2075}
2076
2077/*
2078 * Send the erase CMD38, to erase the selected erase groups
2079 */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002080static uint32_t mmc_send_erase(struct mmc_device *dev, uint64_t erase_timeout)
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002081{
2082 struct mmc_command cmd;
2083 uint32_t status;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002084 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002085
2086 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2087
2088 cmd.cmd_index = CMD38_ERASE;
2089 cmd.argument = 0x00000000;
2090 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2091 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002092 cmd.cmd_timeout = erase_timeout;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002093
2094 /* send command */
2095 if (sdhci_send_command(&dev->host, &cmd))
2096 return 1;
2097
2098 do
2099 {
2100 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2101 {
2102 dprintf(CRITICAL, "Failed to get card status after erase\n");
2103 return 1;
2104 }
2105 /* Check if the response of erase command has eras skip status set */
2106 if (status & MMC_R1_WP_ERASE_SKIP)
2107 dprintf(CRITICAL, "Write Protect set for the region, only partial space was erased\n");
2108
2109 retry++;
2110 udelay(1000);
2111 if (retry == MMC_MAX_CARD_STAT_RETRY)
2112 {
2113 dprintf(CRITICAL, "Card status check timed out after sending erase command\n");
2114 return 1;
2115 }
2116 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2117
2118
2119 return 0;
2120}
2121
2122
2123/*
2124 * Function: mmc sdhci erase
2125 * Arg : mmc device structure, block address and length
2126 * Return : 0 on Success, non zero on failure
2127 * Flow : Fill in the command structure & send the command
2128 */
2129uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len)
2130{
2131 uint32_t erase_unit_sz = 0;
2132 uint32_t erase_start;
2133 uint32_t erase_end;
2134 uint32_t blk_end;
2135 uint32_t num_erase_grps;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002136 uint64_t erase_timeout = 0;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002137 struct mmc_card *card;
2138
2139
2140 card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002141
2142 /*
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002143 * Calculate the erase unit size,
2144 * 1. Based on emmc 4.5 spec for emmc card
2145 * 2. Use SD Card Status info for SD cards
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002146 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002147 if (MMC_CARD_MMC(card))
2148 {
2149 /*
2150 * Calculate the erase unit size as per the emmc specification v4.5
2151 */
2152 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2153 erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
2154 else
2155 erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
2156 }
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002157 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002158 erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
2159
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002160
2161 /* Convert length in blocks */
2162 len = len / MMC_BLK_SZ;
2163
2164 if (len < erase_unit_sz)
2165 {
2166 dprintf(CRITICAL, "Requested length is less than min erase group size\n");
2167 return 1;
2168 }
2169
2170 /* Calculate erase groups based on the length in blocks */
2171 num_erase_grps = len / erase_unit_sz;
2172
2173 /* Start address of the erase range */
2174 erase_start = blk_addr;
2175
2176 /* Last address of the erase range */
2177 erase_end = blk_addr + ((num_erase_grps - 1) * erase_unit_sz);
2178
2179 /* Boundary check for overlap */
2180 blk_end = blk_addr + len;
2181
2182 if (erase_end > blk_end)
2183 {
2184 dprintf(CRITICAL, "The erase group overlaps the max requested for erase\n");
2185 erase_end -= erase_unit_sz;
2186 }
2187
2188 /* Send CMD35 for erase group start */
2189 if (mmc_send_erase_grp_start(dev, erase_start))
2190 {
2191 dprintf(CRITICAL, "Failed to send erase grp start address\n");
2192 return 1;
2193 }
2194
2195 /* Send CMD36 for erase group end */
2196 if (mmc_send_erase_grp_end(dev, erase_end))
2197 {
2198 dprintf(CRITICAL, "Failed to send erase grp end address\n");
2199 return 1;
2200 }
2201
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002202 /*
2203 * As per emmc 4.5 spec section 7.4.27, calculate the erase timeout
Channagoud Kadabi7491e6c2014-12-02 15:42:11 -08002204 * erase_timeout = 300ms * ERASE_TIMEOUT_MULT * num_erase_grps
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002205 */
vijay kumar488e4842015-08-21 20:37:29 +05302206 if (MMC_CARD_MMC(card))
2207 erase_timeout = (300 * 1000 * card->ext_csd[MMC_ERASE_TIMEOUT_MULT] * num_erase_grps);
2208 else
2209 erase_timeout = (300 * 1000 * num_erase_grps);
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002210
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002211 /* Send CMD38 to perform erase */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002212 if (mmc_send_erase(dev, erase_timeout))
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002213 {
2214 dprintf(CRITICAL, "Failed to erase the specified partition\n");
2215 return 1;
2216 }
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002217
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002218 return 0;
2219}
2220
2221/*
2222 * Function: mmc get wp status
2223 * Arg : mmc device structure, block address and buffer for getting wp status
2224 * Return : 0 on Success, 1 on Failure
2225 * Flow : Get the WP group status by sending CMD31
2226 */
2227uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status)
2228{
2229 struct mmc_command cmd;
2230
2231 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2232
2233 cmd.cmd_index = CMD31_SEND_WRITE_PROT_TYPE;
2234 cmd.argument = addr;
2235 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2236 cmd.resp_type = SDHCI_CMD_RESP_R1;
2237 cmd.trans_mode = SDHCI_MMC_READ;
2238 cmd.data_present = 0x1;
2239 cmd.data.data_ptr = wp_status;
2240 cmd.data.num_blocks = 0x1;
2241 cmd.data.blk_sz = 0x8;
2242
2243 if (sdhci_send_command(&dev->host, &cmd))
2244 {
2245 dprintf(CRITICAL, "Failed to get status of write protect bits\n");
2246 return 1;
2247 }
2248
2249 return 0;
2250}
2251
2252/*
2253 * Function: mmc set/clear WP on user area
2254 * Arg : mmc device structure, block address,len, & flag to set or clear
2255 * Return : 0 on success, 1 on failure
2256 * Flow : Function to set/clear power on write protect on user area
2257 */
2258
2259uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr)
2260{
2261 struct mmc_command cmd;
vijay kumar7420baa2014-05-02 12:01:49 +05302262 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002263 uint32_t wp_grp_size;
2264 uint32_t status;
2265 uint32_t num_wp_grps;
2266 uint32_t ret;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002267 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002268 uint32_t i;
2269
2270 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2271
2272 /* Convert len into blocks */
2273 len = len / MMC_BLK_SZ;
vijay kumar697dbfd2014-04-24 17:12:49 +05302274 wp_grp_size = dev->card.wp_grp_size;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002275
2276 /* Disable PERM WP */
2277 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PERM_WP_DIS);
2278
2279 if (ret)
2280 {
2281 dprintf(CRITICAL, "Failed to Disable PERM WP\n");
2282 return ret;
2283 }
2284
2285 /* Read the default values for user WP */
2286 ret = mmc_get_ext_csd(&dev->host, &dev->card);
2287
2288 if (ret)
2289 {
2290 dprintf(CRITICAL, "Failed to read ext csd for the card\n");
2291 return ret;
2292 }
2293
2294 /* Check if user power on WP is disabled or perm WP is enabled */
2295 if ((dev->card.ext_csd[MMC_USR_WP] & MMC_US_PWR_WP_DIS)
2296 || (dev->card.ext_csd[MMC_USR_WP] & MMC_US_PERM_WP_EN))
2297 {
2298 dprintf(CRITICAL, "Power on protection is disabled, cannot be set\n");
2299 return 1;
2300 }
2301
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002302 if (len < wp_grp_size)
2303 {
2304 dprintf(CRITICAL, "Length is less than min WP size, WP was not set\n");
2305 return 1;
2306 }
2307
2308 /* Set power on USER WP */
2309 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PWR_WP_EN);
2310
2311 if (ret)
2312 {
2313 dprintf(CRITICAL, "Failed to set power on WP for user\n");
2314 return ret;
2315 }
2316
2317 num_wp_grps = ROUNDUP(len, wp_grp_size) / wp_grp_size;
2318
2319 if (set_clr)
2320 cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
2321 else
2322 cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
2323
2324 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2325 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2326
2327 for(i = 0; i < num_wp_grps; i++)
2328 {
vijay kumar7420baa2014-05-02 12:01:49 +05302329 /*
2330 * Standard emmc cards use byte mode addressing
2331 * convert the block address to byte address before
2332 * sending the command
2333 */
2334 if (card->type == MMC_TYPE_STD_MMC)
2335 cmd.argument = (addr + (i * wp_grp_size)) * card->block_size;
2336 else
2337 cmd.argument = addr + (i * wp_grp_size);
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002338
2339 if (sdhci_send_command(&dev->host, &cmd))
2340 return 1;
2341
2342 /* CMD28/CMD29 On failure returns address out of range error */
2343 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2344 {
2345 dprintf(CRITICAL, "Address for CMD28/29 is out of range\n");
2346 return 1;
2347 }
2348
2349 /* Check the card status */
2350 do
2351 {
2352 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2353 {
2354 dprintf(CRITICAL, "Failed to get card status afterapplying write protect\n");
2355 return 1;
2356 }
2357
2358 /* Time out for WP command */
2359 retry++;
2360 udelay(1000);
2361 if (retry == MMC_MAX_CARD_STAT_RETRY)
2362 {
2363 dprintf(CRITICAL, "Card status timed out after sending write protect command\n");
2364 return 1;
2365 }
2366 } while (!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2367
2368 }
2369
2370 return 0;
2371}
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002372
2373/* Function to put the mmc card to sleep */
2374void mmc_put_card_to_sleep(struct mmc_device *dev)
2375{
2376 struct mmc_command cmd = {0};
2377 struct mmc_card *card = &dev->card;
2378
2379 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
2380 cmd.argument = 0x00000000;
2381 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2382 cmd.resp_type = SDHCI_CMD_RESP_NONE;
2383
2384 /* send command */
2385 if(sdhci_send_command(&dev->host, &cmd))
2386 {
2387 dprintf(CRITICAL, "card deselect error: %s\n", __func__);
2388 return;
2389 }
vijay kumarb01d64c2015-08-21 20:37:29 +05302390 if(MMC_CARD_MMC(card)){
2391 /*CMD5 is reserved in SD card */
2392 cmd.cmd_index = CMD5_SLEEP_AWAKE;
2393 cmd.argument = (card->rca << MMC_CARD_RCA_BIT) | MMC_CARD_SLEEP;
2394 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2395 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002396
vijay kumarb01d64c2015-08-21 20:37:29 +05302397 /* send command */
2398 if(sdhci_send_command(&dev->host, &cmd))
2399 dprintf(CRITICAL, "card sleep error: %s\n", __func__);
2400 }
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002401}
Channagoud Kadabi31d648c2015-01-29 12:59:00 -08002402
2403/*
2404 * Switch the partition access type to rpmb or default
2405 */
2406static uint32_t mmc_sdhci_switch_part(struct mmc_device *dev, uint32_t type)
2407{
2408 uint32_t part_access;
2409 uint32_t ret;
2410
2411 /* Clear the partition access */
2412 part_access = dev->card.ext_csd[MMC_PARTITION_CONFIG] & ~PARTITION_ACCESS_MASK;
2413 part_access |= type;
2414
2415 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_ACCESS_WRITE, MMC_PARTITION_CONFIG, part_access);
2416
2417 if (ret)
2418 {
2419 dprintf(CRITICAL, "Failed to switch partition to type: %u\n", type);
2420 return 1;
2421 }
2422
2423 dev->card.ext_csd[MMC_PARTITION_CONFIG] = part_access;
2424 return 0;
2425}
2426
2427static uint32_t mmc_sdhci_set_blk_cnt(struct mmc_device *dev, uint32_t blk_cnt, uint32_t rel_write)
2428{
2429 struct mmc_command cmd = {0};
2430
2431 cmd.cmd_index = CMD23_SET_BLOCK_COUNT;
2432 cmd.argument = blk_cnt & 0x0000ffff;
2433 cmd.argument |= rel_write;
2434 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2435 cmd.resp_type = SDHCI_CMD_RESP_R1;
2436
2437 if (sdhci_send_command(&dev->host, &cmd))
2438 {
2439 dprintf(CRITICAL, "Set block count failed: %s\n", __func__);
2440 return 1;
2441 }
2442
2443 return 0;
2444}
2445
2446uint32_t mmc_sdhci_rpmb_send(struct mmc_device *dev, struct mmc_command *cmd)
2447{
2448 int i;
2449 uint32_t retry = 5;
2450 uint32_t status;
2451 uint32_t rel_write = 0;
2452 uint32_t ret = 1;
2453
2454 ASSERT(cmd);
2455
2456 /* 1. Set the partition type to rpmb */
2457 if (mmc_sdhci_switch_part(dev, PART_ACCESS_RPMB))
2458 return 1;
2459
2460 for (i = 0; i < MAX_RPMB_CMDS; i++)
2461 {
2462 if (!cmd[i].cmd_index)
2463 break;
2464
2465 if (cmd[i].write_flag == true)
2466 rel_write = BIT(31);
2467 else
2468 rel_write = 0;
2469
2470 /* 2. Set the block count using cmd23 */
2471 if (mmc_sdhci_set_blk_cnt(dev, cmd[i].data.num_blocks, rel_write))
2472 goto err;
2473
2474 /* 3. Send the command */
2475 if (sdhci_send_command(&dev->host, &cmd[i]))
2476 goto err;
2477 do
2478 {
2479 /* 4. Poll for card status to ensure rpmb operation completeness */
2480 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2481 {
2482 dprintf(CRITICAL, "Failed to get card status after rpmb operations\n");
2483 goto err;
2484 }
2485
2486 retry--;
2487 udelay(500);
2488 if (!retry)
2489 {
2490 dprintf(CRITICAL, "Card status check timed out after rpmb operations\n");
2491 goto err;
2492 }
2493 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2494 }
2495
2496 /* If we reach here, that means success */
2497 ret = 0;
2498
2499err:
2500 /* 5. Switch the partition back to default type */
2501 if (mmc_sdhci_switch_part(dev, PART_ACCESS_DEFAULT))
2502 ret = 1;
2503
2504 return ret;
2505}