lijuang | 395b5e6 | 2015-11-19 17:39:44 +0800 | [diff] [blame] | 1 | /* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #include <debug.h> |
| 30 | #include <platform/iomap.h> |
| 31 | #include <reg.h> |
| 32 | #include <target.h> |
| 33 | #include <platform.h> |
| 34 | #include <uart_dm.h> |
| 35 | #include <mmc.h> |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 36 | #include <platform/gpio.h> |
| 37 | #include <dev/keys.h> |
| 38 | #include <spmi_v2.h> |
| 39 | #include <pm8x41.h> |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 40 | #include <board.h> |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 41 | #include <baseband.h> |
| 42 | #include <hsusb.h> |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 43 | #include <scm.h> |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 44 | #include <platform/gpio.h> |
| 45 | #include <platform/gpio.h> |
| 46 | #include <platform/irqs.h> |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 47 | #include <platform/clock.h> |
| 48 | #include <crypto5_wrapper.h> |
| 49 | #include <partition_parser.h> |
| 50 | #include <stdlib.h> |
lijuang | 3606df8 | 2015-09-02 21:14:43 +0800 | [diff] [blame] | 51 | #include <smem.h> |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 52 | |
Matthew Qin | f3ebf18 | 2014-04-08 11:38:14 +0800 | [diff] [blame] | 53 | #if LONG_PRESS_POWER_ON |
| 54 | #include <shutdown_detect.h> |
| 55 | #endif |
| 56 | |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 57 | #if PON_VIB_SUPPORT |
| 58 | #include <vibrator.h> |
| 59 | #endif |
| 60 | |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 61 | #define PMIC_ARB_CHANNEL_NUM 0 |
| 62 | #define PMIC_ARB_OWNER_ID 0 |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 63 | #define TLMM_VOL_UP_BTN_GPIO 107 |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 64 | |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 65 | #if PON_VIB_SUPPORT |
| 66 | #define VIBRATE_TIME 250 |
| 67 | #endif |
| 68 | |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 69 | #define CE1_INSTANCE 1 |
| 70 | #define CE_EE 1 |
| 71 | #define CE_FIFO_SIZE 64 |
| 72 | #define CE_READ_PIPE 3 |
| 73 | #define CE_WRITE_PIPE 2 |
| 74 | #define CE_READ_PIPE_LOCK_GRP 0 |
| 75 | #define CE_WRITE_PIPE_LOCK_GRP 0 |
| 76 | #define CE_ARRAY_SIZE 20 |
| 77 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 78 | static void set_sdc_power_ctrl(void); |
| 79 | |
| 80 | struct mmc_device *dev; |
| 81 | |
| 82 | static uint32_t mmc_pwrctl_base[] = |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 83 | { MSM_SDC1_BASE, MSM_SDC2_BASE }; |
| 84 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 85 | static uint32_t mmc_sdhci_base[] = |
| 86 | { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE }; |
| 87 | |
| 88 | static uint32_t mmc_sdc_pwrctl_irq[] = |
| 89 | { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ }; |
| 90 | |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 91 | void target_early_init(void) |
| 92 | { |
| 93 | #if WITH_DEBUG_UART |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 94 | uart_dm_init(2, 0, BLSP1_UART1_BASE); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 95 | #endif |
| 96 | } |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 97 | |
| 98 | void target_sdc_init() |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 99 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 100 | struct mmc_config_data config; |
| 101 | |
| 102 | /* Set drive strength & pull ctrl values */ |
| 103 | set_sdc_power_ctrl(); |
| 104 | |
| 105 | config.bus_width = DATA_BUS_WIDTH_8BIT; |
Aparna Mallavarapu | 53b0940 | 2014-03-26 14:46:43 +0530 | [diff] [blame] | 106 | config.max_clk_rate = MMC_CLK_177MHZ; |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 107 | |
| 108 | /* Try slot 1*/ |
| 109 | config.slot = 1; |
| 110 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 111 | config.pwrctl_base = mmc_pwrctl_base[config.slot - 1]; |
| 112 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 113 | config.hs400_support = 0; |
| 114 | |
| 115 | if (!(dev = mmc_init(&config))) { |
| 116 | /* Try slot 2 */ |
| 117 | config.slot = 2; |
Aparna Mallavarapu | 53b0940 | 2014-03-26 14:46:43 +0530 | [diff] [blame] | 118 | config.max_clk_rate = MMC_CLK_200MHZ; |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 119 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 120 | config.pwrctl_base = mmc_pwrctl_base[config.slot - 1]; |
| 121 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 122 | |
| 123 | if (!(dev = mmc_init(&config))) { |
| 124 | dprintf(CRITICAL, "mmc init failed!"); |
| 125 | ASSERT(0); |
| 126 | } |
| 127 | } |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 128 | } |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 129 | |
| 130 | void *target_mmc_device() |
| 131 | { |
| 132 | return (void *) dev; |
| 133 | } |
| 134 | |
| 135 | /* Return 1 if vol_up pressed */ |
lijuang | 2d2b8a0 | 2015-06-05 21:34:15 +0800 | [diff] [blame] | 136 | int target_volume_up() |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 137 | { |
lijuang | 2d2b8a0 | 2015-06-05 21:34:15 +0800 | [diff] [blame] | 138 | static uint8_t first_time = 0; |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 139 | uint8_t status = 0; |
| 140 | |
lijuang | 2d2b8a0 | 2015-06-05 21:34:15 +0800 | [diff] [blame] | 141 | if (!first_time) { |
| 142 | gpio_tlmm_config(TLMM_VOL_UP_BTN_GPIO, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA, GPIO_ENABLE); |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 143 | |
lijuang | 2d2b8a0 | 2015-06-05 21:34:15 +0800 | [diff] [blame] | 144 | /* Wait for the gpio config to take effect - debounce time */ |
| 145 | udelay(10000); |
| 146 | |
| 147 | first_time = 1; |
| 148 | } |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 149 | |
| 150 | /* Get status of GPIO */ |
| 151 | status = gpio_status(TLMM_VOL_UP_BTN_GPIO); |
| 152 | |
| 153 | /* Active low signal. */ |
| 154 | return !status; |
| 155 | } |
| 156 | |
| 157 | /* Return 1 if vol_down pressed */ |
| 158 | uint32_t target_volume_down() |
| 159 | { |
| 160 | /* Volume down button tied in with PMIC RESIN. */ |
| 161 | return pm8x41_resin_status(); |
| 162 | } |
| 163 | |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 164 | static void target_keystatus() |
| 165 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 166 | keys_init(); |
| 167 | |
| 168 | if(target_volume_down()) |
| 169 | keys_post_event(KEY_VOLUMEDOWN, 1); |
| 170 | |
| 171 | if(target_volume_up()) |
| 172 | keys_post_event(KEY_VOLUMEUP, 1); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 173 | } |
| 174 | |
| 175 | void target_init(void) |
| 176 | { |
| 177 | uint32_t base_addr; |
| 178 | uint8_t slot; |
| 179 | |
| 180 | dprintf(INFO, "target_init()\n"); |
| 181 | |
| 182 | spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID); |
| 183 | |
| 184 | target_keystatus(); |
| 185 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 186 | target_sdc_init(); |
| 187 | if (partition_read_table()) |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 188 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 189 | dprintf(CRITICAL, "Error reading the partition table info\n"); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 190 | ASSERT(0); |
| 191 | } |
Matthew Qin | f3ebf18 | 2014-04-08 11:38:14 +0800 | [diff] [blame] | 192 | |
| 193 | #if LONG_PRESS_POWER_ON |
| 194 | shutdown_detect(); |
| 195 | #endif |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 196 | |
| 197 | #if PON_VIB_SUPPORT |
| 198 | /* turn on vibrator to indicate that phone is booting up to end user */ |
| 199 | vib_timed_turn_on(VIBRATE_TIME); |
| 200 | #endif |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 201 | |
| 202 | if (target_use_signed_kernel()) |
| 203 | target_crypto_init_params(); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 204 | } |
| 205 | |
| 206 | void target_serialno(unsigned char *buf) |
| 207 | { |
| 208 | uint32_t serialno; |
| 209 | if (target_is_emmc_boot()) { |
| 210 | serialno = mmc_get_psn(); |
| 211 | snprintf((char *)buf, 13, "%x", serialno); |
| 212 | } |
| 213 | } |
| 214 | |
| 215 | unsigned board_machtype(void) |
| 216 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 217 | return LINUX_MACHTYPE_UNKNOWN; |
| 218 | } |
| 219 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 220 | /* Detect the target type */ |
| 221 | void target_detect(struct board_data *board) |
| 222 | { |
| 223 | /* |
| 224 | * already fill the board->target on board.c |
| 225 | */ |
| 226 | } |
| 227 | |
| 228 | void target_baseband_detect(struct board_data *board) |
| 229 | { |
| 230 | uint32_t platform; |
| 231 | |
| 232 | platform = board->platform; |
| 233 | switch(platform) |
| 234 | { |
| 235 | case MSM8916: |
Aparna Mallavarapu | 9b482a8 | 2014-06-02 21:18:34 +0530 | [diff] [blame] | 236 | case MSM8116: |
| 237 | case MSM8216: |
| 238 | case MSM8616: |
Aparna Mallavarapu | d81c99e | 2014-04-20 23:32:51 +0530 | [diff] [blame] | 239 | case MSM8939: |
| 240 | case MSM8236: |
| 241 | case MSM8636: |
Unnati Gandhi | ad17b72 | 2014-06-11 23:04:54 +0530 | [diff] [blame] | 242 | case MSM8936: |
Aparna Mallavarapu | 36cae9d | 2014-08-04 12:51:10 +0530 | [diff] [blame] | 243 | case MSM8239: |
vijay kumar | dd51c59 | 2015-01-05 12:46:28 +0530 | [diff] [blame] | 244 | case MSM8929: |
| 245 | case MSM8629: |
| 246 | case MSM8229: |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 247 | board->baseband = BASEBAND_MSM; |
| 248 | break; |
Aparna Mallavarapu | 9b482a8 | 2014-06-02 21:18:34 +0530 | [diff] [blame] | 249 | case APQ8016: |
Aparna Mallavarapu | d81c99e | 2014-04-20 23:32:51 +0530 | [diff] [blame] | 250 | case APQ8039: |
| 251 | case APQ8036: |
vijay kumar | dd51c59 | 2015-01-05 12:46:28 +0530 | [diff] [blame] | 252 | case APQ8029: |
Aparna Mallavarapu | d81c99e | 2014-04-20 23:32:51 +0530 | [diff] [blame] | 253 | board->baseband = BASEBAND_APQ; |
| 254 | break; |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 255 | default: |
| 256 | dprintf(CRITICAL, "Platform type: %u is not supported\n", platform); |
| 257 | ASSERT(0); |
| 258 | }; |
| 259 | } |
| 260 | |
| 261 | unsigned target_baseband() |
| 262 | { |
| 263 | return board_baseband(); |
| 264 | } |
| 265 | |
| 266 | int emmc_recovery_init(void) |
| 267 | { |
| 268 | return _emmc_recovery_init(); |
| 269 | } |
| 270 | |
| 271 | static void set_sdc_power_ctrl() |
| 272 | { |
| 273 | /* Drive strength configs for sdc pins */ |
| 274 | struct tlmm_cfgs sdc1_hdrv_cfg[] = |
| 275 | { |
vijay kumar | 34f5410 | 2014-10-27 21:55:47 +0530 | [diff] [blame] | 276 | { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, 0}, |
| 277 | { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, 0}, |
vijay kumar | f1d659c | 2015-03-17 19:54:14 +0530 | [diff] [blame] | 278 | { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK , 0}, |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 279 | }; |
| 280 | |
| 281 | /* Pull configs for sdc pins */ |
| 282 | struct tlmm_cfgs sdc1_pull_cfg[] = |
| 283 | { |
vijay kumar | 34f5410 | 2014-10-27 21:55:47 +0530 | [diff] [blame] | 284 | { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK, 0}, |
| 285 | { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, 0}, |
| 286 | { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, 0}, |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 287 | }; |
| 288 | |
| 289 | /* Set the drive strength & pull control values */ |
| 290 | tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg)); |
| 291 | tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg)); |
| 292 | } |
| 293 | |
| 294 | void target_usb_init(void) |
| 295 | { |
| 296 | uint32_t val; |
| 297 | |
| 298 | /* Select and enable external configuration with USB PHY */ |
| 299 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET); |
| 300 | |
| 301 | /* Enable sess_vld */ |
| 302 | val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN; |
| 303 | writel(val, USB_GENCONFIG_2); |
| 304 | |
| 305 | /* Enable external vbus configuration in the LINK */ |
| 306 | val = readl(USB_USBCMD); |
| 307 | val |= SESS_VLD_CTRL; |
| 308 | writel(val, USB_USBCMD); |
| 309 | } |
| 310 | |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 311 | uint8_t target_panel_auto_detect_enabled() |
| 312 | { |
| 313 | uint8_t ret = 0; |
| 314 | uint32_t hw_subtype = board_hardware_subtype(); |
| 315 | |
| 316 | switch(board_hardware_id()) { |
| 317 | case HW_PLATFORM_SURF: |
Vineet Bajaj | 5cd5b11 | 2015-02-09 16:13:30 +0530 | [diff] [blame] | 318 | case HW_PLATFORM_MTP: |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 319 | ret = 1; |
| 320 | break; |
| 321 | default: |
| 322 | ret = 0; |
| 323 | break; |
| 324 | } |
| 325 | return ret; |
| 326 | } |
| 327 | |
| 328 | static uint8_t splash_override; |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 329 | /* Returns 1 if target supports continuous splash screen. */ |
| 330 | int target_cont_splash_screen() |
| 331 | { |
| 332 | uint8_t splash_screen = 0; |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 333 | if (!splash_override) { |
| 334 | switch (board_hardware_id()) { |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 335 | case HW_PLATFORM_MTP: |
| 336 | case HW_PLATFORM_SURF: |
Mao Flynn | 8140947 | 2014-04-10 15:01:30 +0800 | [diff] [blame] | 337 | case HW_PLATFORM_QRD: |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 338 | splash_screen = 1; |
| 339 | break; |
| 340 | default: |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 341 | splash_screen = 0; |
| 342 | break; |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 343 | } |
| 344 | dprintf(SPEW, "Target_cont_splash=%d\n", splash_screen); |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 345 | } |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 346 | return splash_screen; |
| 347 | } |
| 348 | |
| 349 | void target_force_cont_splash_disable(uint8_t override) |
| 350 | { |
| 351 | splash_override = override; |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 352 | } |
| 353 | |
Zhenhua Huang | 9b8cb1c | 2014-04-11 15:23:05 +0800 | [diff] [blame] | 354 | unsigned target_pause_for_battery_charge(void) |
| 355 | { |
| 356 | uint8_t pon_reason = pm8x41_get_pon_reason(); |
| 357 | uint8_t is_cold_boot = pm8x41_get_is_cold_boot(); |
| 358 | dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__, |
| 359 | pon_reason, is_cold_boot); |
| 360 | /* In case of fastboot reboot,adb reboot or if we see the power key |
| 361 | * pressed we do not want go into charger mode. |
| 362 | * fastboot reboot is warm boot with PON hard reset bit not set |
| 363 | * adb reboot is a cold boot with PON hard reset bit set |
| 364 | */ |
| 365 | if (is_cold_boot && |
| 366 | (!(pon_reason & HARD_RST)) && |
| 367 | (!(pon_reason & KPDPWR_N)) && |
Zhenhua Huang | d01ef5f | 2015-02-16 11:22:10 +0800 | [diff] [blame] | 368 | ((pon_reason & USB_CHG) || (pon_reason & DC_CHG) || (pon_reason & CBLPWR_N))) |
Zhenhua Huang | 9b8cb1c | 2014-04-11 15:23:05 +0800 | [diff] [blame] | 369 | return 1; |
| 370 | else |
| 371 | return 0; |
| 372 | } |
| 373 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 374 | void target_usb_stop(void) |
| 375 | { |
| 376 | /* Disable VBUS mimicing in the controller. */ |
| 377 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR); |
| 378 | } |
| 379 | |
| 380 | |
| 381 | void target_uninit(void) |
| 382 | { |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 383 | #if PON_VIB_SUPPORT |
| 384 | /* wait for the vibrator timer is expried */ |
| 385 | wait_vib_timeout(); |
| 386 | #endif |
| 387 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 388 | mmc_put_card_to_sleep(dev); |
| 389 | sdhci_mode_disable(&dev->host); |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 390 | |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 391 | if (crypto_initialized()) |
| 392 | crypto_eng_cleanup(); |
Aparna Mallavarapu | 25aff01 | 2014-05-08 12:21:44 +0530 | [diff] [blame] | 393 | |
| 394 | if (target_is_ssd_enabled()) |
| 395 | clock_ce_disable(CE1_INSTANCE); |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 396 | } |
| 397 | |
| 398 | /* Do any target specific intialization needed before entering fastboot mode */ |
| 399 | void target_fastboot_init(void) |
| 400 | { |
| 401 | /* Set the BOOT_DONE flag in PM8916 */ |
| 402 | pm8x41_set_boot_done(); |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 403 | |
| 404 | if (target_is_ssd_enabled()) { |
| 405 | clock_ce_enable(CE1_INSTANCE); |
| 406 | target_load_ssd_keystore(); |
| 407 | } |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 408 | } |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 409 | |
lijuang | 395b5e6 | 2015-11-19 17:39:44 +0800 | [diff] [blame] | 410 | int set_download_mode(enum reboot_reason mode) |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 411 | { |
| 412 | int ret = 0; |
| 413 | ret = scm_dload_mode(mode); |
| 414 | |
| 415 | pm8x41_clear_pmic_watchdog(); |
| 416 | |
| 417 | return ret; |
| 418 | } |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 419 | |
| 420 | void target_load_ssd_keystore(void) |
| 421 | { |
| 422 | uint64_t ptn; |
| 423 | int index; |
| 424 | uint64_t size; |
| 425 | uint32_t *buffer = NULL; |
| 426 | |
| 427 | if (!target_is_ssd_enabled()) |
| 428 | return; |
| 429 | |
| 430 | index = partition_get_index("ssd"); |
| 431 | |
| 432 | ptn = partition_get_offset(index); |
| 433 | if (ptn == 0){ |
| 434 | dprintf(CRITICAL, "Error: ssd partition not found\n"); |
| 435 | return; |
| 436 | } |
| 437 | |
| 438 | size = partition_get_size(index); |
| 439 | if (size == 0) { |
| 440 | dprintf(CRITICAL, "Error: invalid ssd partition size\n"); |
| 441 | return; |
| 442 | } |
| 443 | |
| 444 | buffer = memalign(CACHE_LINE, ROUNDUP(size, CACHE_LINE)); |
| 445 | if (!buffer) { |
| 446 | dprintf(CRITICAL, "Error: allocating memory for ssd buffer\n"); |
| 447 | return; |
| 448 | } |
| 449 | |
| 450 | if (mmc_read(ptn, buffer, size)) { |
| 451 | dprintf(CRITICAL, "Error: cannot read data\n"); |
| 452 | free(buffer); |
| 453 | return; |
| 454 | } |
| 455 | |
| 456 | clock_ce_enable(CE1_INSTANCE); |
| 457 | scm_protect_keystore(buffer, size); |
| 458 | clock_ce_disable(CE1_INSTANCE); |
| 459 | free(buffer); |
| 460 | } |
| 461 | |
| 462 | crypto_engine_type board_ce_type(void) |
| 463 | { |
| 464 | return CRYPTO_ENGINE_TYPE_HW; |
| 465 | } |
| 466 | |
| 467 | /* Set up params for h/w CE. */ |
| 468 | void target_crypto_init_params() |
| 469 | { |
| 470 | struct crypto_init_params ce_params; |
| 471 | |
| 472 | /* Set up base addresses and instance. */ |
| 473 | ce_params.crypto_instance = CE1_INSTANCE; |
| 474 | ce_params.crypto_base = MSM_CE1_BASE; |
| 475 | ce_params.bam_base = MSM_CE1_BAM_BASE; |
| 476 | |
| 477 | /* Set up BAM config. */ |
| 478 | ce_params.bam_ee = CE_EE; |
| 479 | ce_params.pipes.read_pipe = CE_READ_PIPE; |
| 480 | ce_params.pipes.write_pipe = CE_WRITE_PIPE; |
| 481 | ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP; |
| 482 | ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP; |
| 483 | |
| 484 | /* Assign buffer sizes. */ |
| 485 | ce_params.num_ce = CE_ARRAY_SIZE; |
| 486 | ce_params.read_fifo_size = CE_FIFO_SIZE; |
| 487 | ce_params.write_fifo_size = CE_FIFO_SIZE; |
| 488 | |
| 489 | /* BAM is initialized by TZ for this platform. |
| 490 | * Do not do it again as the initialization address space |
| 491 | * is locked. |
| 492 | */ |
| 493 | ce_params.do_bam_init = 0; |
| 494 | |
| 495 | crypto_init_params(&ce_params); |
| 496 | } |
Aparna Mallavarapu | a115824 | 2014-05-23 14:47:44 +0530 | [diff] [blame] | 497 | |
| 498 | uint32_t target_get_hlos_subtype() |
| 499 | { |
| 500 | return board_hlos_subtype(); |
| 501 | } |
Channagoud Kadabi | b7dabeb | 2015-08-05 16:18:27 -0700 | [diff] [blame] | 502 | |
| 503 | void pmic_reset_configure(uint8_t reset_type) |
| 504 | { |
| 505 | pm8x41_reset_configure(reset_type); |
| 506 | } |
lijuang | 3606df8 | 2015-09-02 21:14:43 +0800 | [diff] [blame] | 507 | |
| 508 | uint32_t target_get_pmic() |
| 509 | { |
| 510 | return PMIC_IS_PM8916; |
| 511 | } |