Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1 | /* |
| 2 | * tps65910.c -- TI tps65910 |
| 3 | * |
| 4 | * Copyright 2010 Texas Instruments Inc. |
| 5 | * |
| 6 | * Author: Graeme Gregory <gg@slimlogic.co.uk> |
| 7 | * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/err.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/regulator/driver.h> |
| 22 | #include <linux/regulator/machine.h> |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 23 | #include <linux/slab.h> |
| 24 | #include <linux/gpio.h> |
| 25 | #include <linux/mfd/tps65910.h> |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 26 | #include <linux/regulator/of_regulator.h> |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 27 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 28 | #define TPS65910_SUPPLY_STATE_ENABLED 0x1 |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 29 | #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \ |
| 30 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \ |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 31 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \ |
| 32 | TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 33 | |
Thomas Weber | 91fe4d5 | 2012-02-17 17:46:21 +0100 | [diff] [blame] | 34 | /* supported VIO voltages in millivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 35 | static const u16 VIO_VSEL_table[] = { |
| 36 | 1500, 1800, 2500, 3300, |
| 37 | }; |
| 38 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 39 | /* VSEL tables for TPS65910 specific LDOs and dcdc's */ |
| 40 | |
Thomas Weber | 91fe4d5 | 2012-02-17 17:46:21 +0100 | [diff] [blame] | 41 | /* supported VDD3 voltages in millivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 42 | static const u16 VDD3_VSEL_table[] = { |
| 43 | 5000, |
| 44 | }; |
| 45 | |
Thomas Weber | 91fe4d5 | 2012-02-17 17:46:21 +0100 | [diff] [blame] | 46 | /* supported VDIG1 voltages in millivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 47 | static const u16 VDIG1_VSEL_table[] = { |
| 48 | 1200, 1500, 1800, 2700, |
| 49 | }; |
| 50 | |
Thomas Weber | 91fe4d5 | 2012-02-17 17:46:21 +0100 | [diff] [blame] | 51 | /* supported VDIG2 voltages in millivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 52 | static const u16 VDIG2_VSEL_table[] = { |
| 53 | 1000, 1100, 1200, 1800, |
| 54 | }; |
| 55 | |
Thomas Weber | 91fe4d5 | 2012-02-17 17:46:21 +0100 | [diff] [blame] | 56 | /* supported VPLL voltages in millivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 57 | static const u16 VPLL_VSEL_table[] = { |
| 58 | 1000, 1100, 1800, 2500, |
| 59 | }; |
| 60 | |
Thomas Weber | 91fe4d5 | 2012-02-17 17:46:21 +0100 | [diff] [blame] | 61 | /* supported VDAC voltages in millivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 62 | static const u16 VDAC_VSEL_table[] = { |
| 63 | 1800, 2600, 2800, 2850, |
| 64 | }; |
| 65 | |
Thomas Weber | 91fe4d5 | 2012-02-17 17:46:21 +0100 | [diff] [blame] | 66 | /* supported VAUX1 voltages in millivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 67 | static const u16 VAUX1_VSEL_table[] = { |
| 68 | 1800, 2500, 2800, 2850, |
| 69 | }; |
| 70 | |
Thomas Weber | 91fe4d5 | 2012-02-17 17:46:21 +0100 | [diff] [blame] | 71 | /* supported VAUX2 voltages in millivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 72 | static const u16 VAUX2_VSEL_table[] = { |
| 73 | 1800, 2800, 2900, 3300, |
| 74 | }; |
| 75 | |
Thomas Weber | 91fe4d5 | 2012-02-17 17:46:21 +0100 | [diff] [blame] | 76 | /* supported VAUX33 voltages in millivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 77 | static const u16 VAUX33_VSEL_table[] = { |
| 78 | 1800, 2000, 2800, 3300, |
| 79 | }; |
| 80 | |
Thomas Weber | 91fe4d5 | 2012-02-17 17:46:21 +0100 | [diff] [blame] | 81 | /* supported VMMC voltages in millivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 82 | static const u16 VMMC_VSEL_table[] = { |
| 83 | 1800, 2800, 3000, 3300, |
| 84 | }; |
| 85 | |
| 86 | struct tps_info { |
| 87 | const char *name; |
| 88 | unsigned min_uV; |
| 89 | unsigned max_uV; |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 90 | u8 n_voltages; |
| 91 | const u16 *voltage_table; |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 92 | int enable_time_us; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | static struct tps_info tps65910_regs[] = { |
| 96 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 97 | .name = "vrtc", |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 98 | .enable_time_us = 2200, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 99 | }, |
| 100 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 101 | .name = "vio", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 102 | .min_uV = 1500000, |
| 103 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 104 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
| 105 | .voltage_table = VIO_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 106 | .enable_time_us = 350, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 107 | }, |
| 108 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 109 | .name = "vdd1", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 110 | .min_uV = 600000, |
| 111 | .max_uV = 4500000, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 112 | .enable_time_us = 350, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 113 | }, |
| 114 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 115 | .name = "vdd2", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 116 | .min_uV = 600000, |
| 117 | .max_uV = 4500000, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 118 | .enable_time_us = 350, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 119 | }, |
| 120 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 121 | .name = "vdd3", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 122 | .min_uV = 5000000, |
| 123 | .max_uV = 5000000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 124 | .n_voltages = ARRAY_SIZE(VDD3_VSEL_table), |
| 125 | .voltage_table = VDD3_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 126 | .enable_time_us = 200, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 127 | }, |
| 128 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 129 | .name = "vdig1", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 130 | .min_uV = 1200000, |
| 131 | .max_uV = 2700000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 132 | .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table), |
| 133 | .voltage_table = VDIG1_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 134 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 135 | }, |
| 136 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 137 | .name = "vdig2", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 138 | .min_uV = 1000000, |
| 139 | .max_uV = 1800000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 140 | .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table), |
| 141 | .voltage_table = VDIG2_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 142 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 143 | }, |
| 144 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 145 | .name = "vpll", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 146 | .min_uV = 1000000, |
| 147 | .max_uV = 2500000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 148 | .n_voltages = ARRAY_SIZE(VPLL_VSEL_table), |
| 149 | .voltage_table = VPLL_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 150 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 151 | }, |
| 152 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 153 | .name = "vdac", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 154 | .min_uV = 1800000, |
| 155 | .max_uV = 2850000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 156 | .n_voltages = ARRAY_SIZE(VDAC_VSEL_table), |
| 157 | .voltage_table = VDAC_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 158 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 159 | }, |
| 160 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 161 | .name = "vaux1", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 162 | .min_uV = 1800000, |
| 163 | .max_uV = 2850000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 164 | .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table), |
| 165 | .voltage_table = VAUX1_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 166 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 167 | }, |
| 168 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 169 | .name = "vaux2", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 170 | .min_uV = 1800000, |
| 171 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 172 | .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table), |
| 173 | .voltage_table = VAUX2_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 174 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 175 | }, |
| 176 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 177 | .name = "vaux33", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 178 | .min_uV = 1800000, |
| 179 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 180 | .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table), |
| 181 | .voltage_table = VAUX33_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 182 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 183 | }, |
| 184 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 185 | .name = "vmmc", |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 186 | .min_uV = 1800000, |
| 187 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 188 | .n_voltages = ARRAY_SIZE(VMMC_VSEL_table), |
| 189 | .voltage_table = VMMC_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 190 | .enable_time_us = 100, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 191 | }, |
| 192 | }; |
| 193 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 194 | static struct tps_info tps65911_regs[] = { |
| 195 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 196 | .name = "vrtc", |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 197 | .enable_time_us = 2200, |
Laxman Dewangan | c2f8efd | 2012-01-18 20:46:56 +0530 | [diff] [blame] | 198 | }, |
| 199 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 200 | .name = "vio", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 201 | .min_uV = 1500000, |
| 202 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 203 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
| 204 | .voltage_table = VIO_VSEL_table, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 205 | .enable_time_us = 350, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 206 | }, |
| 207 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 208 | .name = "vdd1", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 209 | .min_uV = 600000, |
| 210 | .max_uV = 4500000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 211 | .n_voltages = 73, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 212 | .enable_time_us = 350, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 213 | }, |
| 214 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 215 | .name = "vdd2", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 216 | .min_uV = 600000, |
| 217 | .max_uV = 4500000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 218 | .n_voltages = 73, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 219 | .enable_time_us = 350, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 220 | }, |
| 221 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 222 | .name = "vddctrl", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 223 | .min_uV = 600000, |
| 224 | .max_uV = 1400000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 225 | .n_voltages = 65, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 226 | .enable_time_us = 900, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 227 | }, |
| 228 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 229 | .name = "ldo1", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 230 | .min_uV = 1000000, |
| 231 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 232 | .n_voltages = 47, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 233 | .enable_time_us = 420, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 234 | }, |
| 235 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 236 | .name = "ldo2", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 237 | .min_uV = 1000000, |
| 238 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 239 | .n_voltages = 47, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 240 | .enable_time_us = 420, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 241 | }, |
| 242 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 243 | .name = "ldo3", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 244 | .min_uV = 1000000, |
| 245 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 246 | .n_voltages = 24, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 247 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 248 | }, |
| 249 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 250 | .name = "ldo4", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 251 | .min_uV = 1000000, |
| 252 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 253 | .n_voltages = 47, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 254 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 255 | }, |
| 256 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 257 | .name = "ldo5", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 258 | .min_uV = 1000000, |
| 259 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 260 | .n_voltages = 24, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 261 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 262 | }, |
| 263 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 264 | .name = "ldo6", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 265 | .min_uV = 1000000, |
| 266 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 267 | .n_voltages = 24, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 268 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 269 | }, |
| 270 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 271 | .name = "ldo7", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 272 | .min_uV = 1000000, |
| 273 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 274 | .n_voltages = 24, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 275 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 276 | }, |
| 277 | { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 278 | .name = "ldo8", |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 279 | .min_uV = 1000000, |
| 280 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 281 | .n_voltages = 24, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 282 | .enable_time_us = 230, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 283 | }, |
| 284 | }; |
| 285 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 286 | #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits)) |
| 287 | static unsigned int tps65910_ext_sleep_control[] = { |
| 288 | 0, |
| 289 | EXT_CONTROL_REG_BITS(VIO, 1, 0), |
| 290 | EXT_CONTROL_REG_BITS(VDD1, 1, 1), |
| 291 | EXT_CONTROL_REG_BITS(VDD2, 1, 2), |
| 292 | EXT_CONTROL_REG_BITS(VDD3, 1, 3), |
| 293 | EXT_CONTROL_REG_BITS(VDIG1, 0, 1), |
| 294 | EXT_CONTROL_REG_BITS(VDIG2, 0, 2), |
| 295 | EXT_CONTROL_REG_BITS(VPLL, 0, 6), |
| 296 | EXT_CONTROL_REG_BITS(VDAC, 0, 7), |
| 297 | EXT_CONTROL_REG_BITS(VAUX1, 0, 3), |
| 298 | EXT_CONTROL_REG_BITS(VAUX2, 0, 4), |
| 299 | EXT_CONTROL_REG_BITS(VAUX33, 0, 5), |
| 300 | EXT_CONTROL_REG_BITS(VMMC, 0, 0), |
| 301 | }; |
| 302 | |
| 303 | static unsigned int tps65911_ext_sleep_control[] = { |
| 304 | 0, |
| 305 | EXT_CONTROL_REG_BITS(VIO, 1, 0), |
| 306 | EXT_CONTROL_REG_BITS(VDD1, 1, 1), |
| 307 | EXT_CONTROL_REG_BITS(VDD2, 1, 2), |
| 308 | EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3), |
| 309 | EXT_CONTROL_REG_BITS(LDO1, 0, 1), |
| 310 | EXT_CONTROL_REG_BITS(LDO2, 0, 2), |
| 311 | EXT_CONTROL_REG_BITS(LDO3, 0, 7), |
| 312 | EXT_CONTROL_REG_BITS(LDO4, 0, 6), |
| 313 | EXT_CONTROL_REG_BITS(LDO5, 0, 3), |
| 314 | EXT_CONTROL_REG_BITS(LDO6, 0, 0), |
| 315 | EXT_CONTROL_REG_BITS(LDO7, 0, 5), |
| 316 | EXT_CONTROL_REG_BITS(LDO8, 0, 4), |
| 317 | }; |
| 318 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 319 | struct tps65910_reg { |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 320 | struct regulator_desc *desc; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 321 | struct tps65910 *mfd; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 322 | struct regulator_dev **rdev; |
| 323 | struct tps_info **info; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 324 | struct mutex mutex; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 325 | int num_regulators; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 326 | int mode; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 327 | int (*get_ctrl_reg)(int); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 328 | unsigned int *ext_sleep_control; |
| 329 | unsigned int board_ext_control[TPS65910_NUM_REGS]; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 330 | }; |
| 331 | |
| 332 | static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg) |
| 333 | { |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 334 | unsigned int val; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 335 | int err; |
| 336 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 337 | err = tps65910_reg_read(pmic->mfd, reg, &val); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 338 | if (err) |
| 339 | return err; |
| 340 | |
| 341 | return val; |
| 342 | } |
| 343 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 344 | static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg, |
| 345 | u8 set_mask, u8 clear_mask) |
| 346 | { |
| 347 | int err, data; |
| 348 | |
| 349 | mutex_lock(&pmic->mutex); |
| 350 | |
| 351 | data = tps65910_read(pmic, reg); |
| 352 | if (data < 0) { |
| 353 | dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg); |
| 354 | err = data; |
| 355 | goto out; |
| 356 | } |
| 357 | |
| 358 | data &= ~clear_mask; |
| 359 | data |= set_mask; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 360 | err = tps65910_reg_write(pmic->mfd, reg, data); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 361 | if (err) |
| 362 | dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); |
| 363 | |
| 364 | out: |
| 365 | mutex_unlock(&pmic->mutex); |
| 366 | return err; |
| 367 | } |
| 368 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 369 | static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 370 | { |
| 371 | int data; |
| 372 | |
| 373 | mutex_lock(&pmic->mutex); |
| 374 | |
| 375 | data = tps65910_read(pmic, reg); |
| 376 | if (data < 0) |
| 377 | dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg); |
| 378 | |
| 379 | mutex_unlock(&pmic->mutex); |
| 380 | return data; |
| 381 | } |
| 382 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 383 | static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 384 | { |
| 385 | int err; |
| 386 | |
| 387 | mutex_lock(&pmic->mutex); |
| 388 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 389 | err = tps65910_reg_write(pmic->mfd, reg, val); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 390 | if (err < 0) |
| 391 | dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); |
| 392 | |
| 393 | mutex_unlock(&pmic->mutex); |
| 394 | return err; |
| 395 | } |
| 396 | |
| 397 | static int tps65910_get_ctrl_register(int id) |
| 398 | { |
| 399 | switch (id) { |
| 400 | case TPS65910_REG_VRTC: |
| 401 | return TPS65910_VRTC; |
| 402 | case TPS65910_REG_VIO: |
| 403 | return TPS65910_VIO; |
| 404 | case TPS65910_REG_VDD1: |
| 405 | return TPS65910_VDD1; |
| 406 | case TPS65910_REG_VDD2: |
| 407 | return TPS65910_VDD2; |
| 408 | case TPS65910_REG_VDD3: |
| 409 | return TPS65910_VDD3; |
| 410 | case TPS65910_REG_VDIG1: |
| 411 | return TPS65910_VDIG1; |
| 412 | case TPS65910_REG_VDIG2: |
| 413 | return TPS65910_VDIG2; |
| 414 | case TPS65910_REG_VPLL: |
| 415 | return TPS65910_VPLL; |
| 416 | case TPS65910_REG_VDAC: |
| 417 | return TPS65910_VDAC; |
| 418 | case TPS65910_REG_VAUX1: |
| 419 | return TPS65910_VAUX1; |
| 420 | case TPS65910_REG_VAUX2: |
| 421 | return TPS65910_VAUX2; |
| 422 | case TPS65910_REG_VAUX33: |
| 423 | return TPS65910_VAUX33; |
| 424 | case TPS65910_REG_VMMC: |
| 425 | return TPS65910_VMMC; |
| 426 | default: |
| 427 | return -EINVAL; |
| 428 | } |
| 429 | } |
| 430 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 431 | static int tps65911_get_ctrl_register(int id) |
| 432 | { |
| 433 | switch (id) { |
| 434 | case TPS65910_REG_VRTC: |
| 435 | return TPS65910_VRTC; |
| 436 | case TPS65910_REG_VIO: |
| 437 | return TPS65910_VIO; |
| 438 | case TPS65910_REG_VDD1: |
| 439 | return TPS65910_VDD1; |
| 440 | case TPS65910_REG_VDD2: |
| 441 | return TPS65910_VDD2; |
| 442 | case TPS65911_REG_VDDCTRL: |
| 443 | return TPS65911_VDDCTRL; |
| 444 | case TPS65911_REG_LDO1: |
| 445 | return TPS65911_LDO1; |
| 446 | case TPS65911_REG_LDO2: |
| 447 | return TPS65911_LDO2; |
| 448 | case TPS65911_REG_LDO3: |
| 449 | return TPS65911_LDO3; |
| 450 | case TPS65911_REG_LDO4: |
| 451 | return TPS65911_LDO4; |
| 452 | case TPS65911_REG_LDO5: |
| 453 | return TPS65911_LDO5; |
| 454 | case TPS65911_REG_LDO6: |
| 455 | return TPS65911_LDO6; |
| 456 | case TPS65911_REG_LDO7: |
| 457 | return TPS65911_LDO7; |
| 458 | case TPS65911_REG_LDO8: |
| 459 | return TPS65911_LDO8; |
| 460 | default: |
| 461 | return -EINVAL; |
| 462 | } |
| 463 | } |
| 464 | |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 465 | static int tps65910_enable_time(struct regulator_dev *dev) |
| 466 | { |
| 467 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 468 | int id = rdev_get_id(dev); |
| 469 | return pmic->info[id]->enable_time_us; |
| 470 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 471 | |
| 472 | static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode) |
| 473 | { |
| 474 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 475 | struct tps65910 *mfd = pmic->mfd; |
| 476 | int reg, value, id = rdev_get_id(dev); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 477 | |
| 478 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 479 | if (reg < 0) |
| 480 | return reg; |
| 481 | |
| 482 | switch (mode) { |
| 483 | case REGULATOR_MODE_NORMAL: |
| 484 | return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT, |
| 485 | LDO_ST_MODE_BIT); |
| 486 | case REGULATOR_MODE_IDLE: |
| 487 | value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 488 | return tps65910_reg_set_bits(mfd, reg, value); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 489 | case REGULATOR_MODE_STANDBY: |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 490 | return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 491 | } |
| 492 | |
| 493 | return -EINVAL; |
| 494 | } |
| 495 | |
| 496 | static unsigned int tps65910_get_mode(struct regulator_dev *dev) |
| 497 | { |
| 498 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 499 | int reg, value, id = rdev_get_id(dev); |
| 500 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 501 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 502 | if (reg < 0) |
| 503 | return reg; |
| 504 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 505 | value = tps65910_reg_read_locked(pmic, reg); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 506 | if (value < 0) |
| 507 | return value; |
| 508 | |
Axel Lin | 5859939 | 2012-03-13 07:15:27 +0800 | [diff] [blame] | 509 | if (!(value & LDO_ST_ON_BIT)) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 510 | return REGULATOR_MODE_STANDBY; |
| 511 | else if (value & LDO_ST_MODE_BIT) |
| 512 | return REGULATOR_MODE_IDLE; |
| 513 | else |
| 514 | return REGULATOR_MODE_NORMAL; |
| 515 | } |
| 516 | |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 517 | static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 518 | { |
| 519 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 520 | int id = rdev_get_id(dev); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 521 | int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 522 | |
| 523 | switch (id) { |
| 524 | case TPS65910_REG_VDD1: |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 525 | opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP); |
| 526 | mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 527 | mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 528 | srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 529 | sr = opvsel & VDD1_OP_CMD_MASK; |
| 530 | opvsel &= VDD1_OP_SEL_MASK; |
| 531 | srvsel &= VDD1_SR_SEL_MASK; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 532 | vselmax = 75; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 533 | break; |
| 534 | case TPS65910_REG_VDD2: |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 535 | opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP); |
| 536 | mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 537 | mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 538 | srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 539 | sr = opvsel & VDD2_OP_CMD_MASK; |
| 540 | opvsel &= VDD2_OP_SEL_MASK; |
| 541 | srvsel &= VDD2_SR_SEL_MASK; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 542 | vselmax = 75; |
| 543 | break; |
| 544 | case TPS65911_REG_VDDCTRL: |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 545 | opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP); |
| 546 | srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 547 | sr = opvsel & VDDCTRL_OP_CMD_MASK; |
| 548 | opvsel &= VDDCTRL_OP_SEL_MASK; |
| 549 | srvsel &= VDDCTRL_SR_SEL_MASK; |
| 550 | vselmax = 64; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 551 | break; |
| 552 | } |
| 553 | |
| 554 | /* multiplier 0 == 1 but 2,3 normal */ |
| 555 | if (!mult) |
| 556 | mult=1; |
| 557 | |
| 558 | if (sr) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 559 | /* normalise to valid range */ |
| 560 | if (srvsel < 3) |
| 561 | srvsel = 3; |
| 562 | if (srvsel > vselmax) |
| 563 | srvsel = vselmax; |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 564 | return srvsel - 3; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 565 | } else { |
| 566 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 567 | /* normalise to valid range*/ |
| 568 | if (opvsel < 3) |
| 569 | opvsel = 3; |
| 570 | if (opvsel > vselmax) |
| 571 | opvsel = vselmax; |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 572 | return opvsel - 3; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 573 | } |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 574 | return -EINVAL; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 575 | } |
| 576 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 577 | static int tps65910_get_voltage_sel(struct regulator_dev *dev) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 578 | { |
| 579 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 580 | int reg, value, id = rdev_get_id(dev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 581 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 582 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 583 | if (reg < 0) |
| 584 | return reg; |
| 585 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 586 | value = tps65910_reg_read_locked(pmic, reg); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 587 | if (value < 0) |
| 588 | return value; |
| 589 | |
| 590 | switch (id) { |
| 591 | case TPS65910_REG_VIO: |
| 592 | case TPS65910_REG_VDIG1: |
| 593 | case TPS65910_REG_VDIG2: |
| 594 | case TPS65910_REG_VPLL: |
| 595 | case TPS65910_REG_VDAC: |
| 596 | case TPS65910_REG_VAUX1: |
| 597 | case TPS65910_REG_VAUX2: |
| 598 | case TPS65910_REG_VAUX33: |
| 599 | case TPS65910_REG_VMMC: |
| 600 | value &= LDO_SEL_MASK; |
| 601 | value >>= LDO_SEL_SHIFT; |
| 602 | break; |
| 603 | default: |
| 604 | return -EINVAL; |
| 605 | } |
| 606 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 607 | return value; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 608 | } |
| 609 | |
| 610 | static int tps65910_get_voltage_vdd3(struct regulator_dev *dev) |
| 611 | { |
| 612 | return 5 * 1000 * 1000; |
| 613 | } |
| 614 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 615 | static int tps65911_get_voltage_sel(struct regulator_dev *dev) |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 616 | { |
| 617 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 618 | int id = rdev_get_id(dev); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 619 | u8 value, reg; |
| 620 | |
| 621 | reg = pmic->get_ctrl_reg(id); |
| 622 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 623 | value = tps65910_reg_read_locked(pmic, reg); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 624 | |
| 625 | switch (id) { |
| 626 | case TPS65911_REG_LDO1: |
| 627 | case TPS65911_REG_LDO2: |
| 628 | case TPS65911_REG_LDO4: |
| 629 | value &= LDO1_SEL_MASK; |
| 630 | value >>= LDO_SEL_SHIFT; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 631 | break; |
| 632 | case TPS65911_REG_LDO3: |
| 633 | case TPS65911_REG_LDO5: |
| 634 | case TPS65911_REG_LDO6: |
| 635 | case TPS65911_REG_LDO7: |
| 636 | case TPS65911_REG_LDO8: |
| 637 | value &= LDO3_SEL_MASK; |
| 638 | value >>= LDO_SEL_SHIFT; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 639 | break; |
| 640 | case TPS65910_REG_VIO: |
Laxman Dewangan | e882eae | 2012-02-17 18:56:11 +0530 | [diff] [blame] | 641 | value &= LDO_SEL_MASK; |
| 642 | value >>= LDO_SEL_SHIFT; |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 643 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 644 | default: |
| 645 | return -EINVAL; |
| 646 | } |
| 647 | |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 648 | return value; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 649 | } |
| 650 | |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 651 | static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev, |
| 652 | unsigned selector) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 653 | { |
| 654 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 655 | int id = rdev_get_id(dev), vsel; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 656 | int dcdc_mult = 0; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 657 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 658 | switch (id) { |
| 659 | case TPS65910_REG_VDD1: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 660 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 661 | if (dcdc_mult == 1) |
| 662 | dcdc_mult--; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 663 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 664 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 665 | tps65910_modify_bits(pmic, TPS65910_VDD1, |
| 666 | (dcdc_mult << VDD1_VGAIN_SEL_SHIFT), |
| 667 | VDD1_VGAIN_SEL_MASK); |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 668 | tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 669 | break; |
| 670 | case TPS65910_REG_VDD2: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 671 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 672 | if (dcdc_mult == 1) |
| 673 | dcdc_mult--; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 674 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 675 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 676 | tps65910_modify_bits(pmic, TPS65910_VDD2, |
| 677 | (dcdc_mult << VDD2_VGAIN_SEL_SHIFT), |
| 678 | VDD1_VGAIN_SEL_MASK); |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 679 | tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 680 | break; |
| 681 | case TPS65911_REG_VDDCTRL: |
Laxman Dewangan | c4632ae | 2012-03-07 16:39:05 +0530 | [diff] [blame] | 682 | vsel = selector + 3; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 683 | tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 684 | } |
| 685 | |
| 686 | return 0; |
| 687 | } |
| 688 | |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 689 | static int tps65910_set_voltage_sel(struct regulator_dev *dev, |
| 690 | unsigned selector) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 691 | { |
| 692 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 693 | int reg, id = rdev_get_id(dev); |
| 694 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 695 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 696 | if (reg < 0) |
| 697 | return reg; |
| 698 | |
| 699 | switch (id) { |
| 700 | case TPS65910_REG_VIO: |
| 701 | case TPS65910_REG_VDIG1: |
| 702 | case TPS65910_REG_VDIG2: |
| 703 | case TPS65910_REG_VPLL: |
| 704 | case TPS65910_REG_VDAC: |
| 705 | case TPS65910_REG_VAUX1: |
| 706 | case TPS65910_REG_VAUX2: |
| 707 | case TPS65910_REG_VAUX33: |
| 708 | case TPS65910_REG_VMMC: |
| 709 | return tps65910_modify_bits(pmic, reg, |
| 710 | (selector << LDO_SEL_SHIFT), LDO_SEL_MASK); |
| 711 | } |
| 712 | |
| 713 | return -EINVAL; |
| 714 | } |
| 715 | |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 716 | static int tps65911_set_voltage_sel(struct regulator_dev *dev, |
| 717 | unsigned selector) |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 718 | { |
| 719 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 720 | int reg, id = rdev_get_id(dev); |
| 721 | |
| 722 | reg = pmic->get_ctrl_reg(id); |
| 723 | if (reg < 0) |
| 724 | return reg; |
| 725 | |
| 726 | switch (id) { |
| 727 | case TPS65911_REG_LDO1: |
| 728 | case TPS65911_REG_LDO2: |
| 729 | case TPS65911_REG_LDO4: |
| 730 | return tps65910_modify_bits(pmic, reg, |
| 731 | (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK); |
| 732 | case TPS65911_REG_LDO3: |
| 733 | case TPS65911_REG_LDO5: |
| 734 | case TPS65911_REG_LDO6: |
| 735 | case TPS65911_REG_LDO7: |
| 736 | case TPS65911_REG_LDO8: |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 737 | return tps65910_modify_bits(pmic, reg, |
| 738 | (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK); |
Laxman Dewangan | e882eae | 2012-02-17 18:56:11 +0530 | [diff] [blame] | 739 | case TPS65910_REG_VIO: |
| 740 | return tps65910_modify_bits(pmic, reg, |
| 741 | (selector << LDO_SEL_SHIFT), LDO_SEL_MASK); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 742 | } |
| 743 | |
| 744 | return -EINVAL; |
| 745 | } |
| 746 | |
| 747 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 748 | static int tps65910_list_voltage_dcdc(struct regulator_dev *dev, |
| 749 | unsigned selector) |
| 750 | { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 751 | int volt, mult = 1, id = rdev_get_id(dev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 752 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 753 | switch (id) { |
| 754 | case TPS65910_REG_VDD1: |
| 755 | case TPS65910_REG_VDD2: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 756 | mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 757 | volt = VDD1_2_MIN_VOLT + |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 758 | (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 759 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 760 | case TPS65911_REG_VDDCTRL: |
| 761 | volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET); |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 762 | break; |
| 763 | default: |
| 764 | BUG(); |
| 765 | return -EINVAL; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 766 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 767 | |
| 768 | return volt * 100 * mult; |
| 769 | } |
| 770 | |
| 771 | static int tps65910_list_voltage(struct regulator_dev *dev, |
| 772 | unsigned selector) |
| 773 | { |
| 774 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 775 | int id = rdev_get_id(dev), voltage; |
| 776 | |
| 777 | if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC) |
| 778 | return -EINVAL; |
| 779 | |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 780 | if (selector >= pmic->info[id]->n_voltages) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 781 | return -EINVAL; |
| 782 | else |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 783 | voltage = pmic->info[id]->voltage_table[selector] * 1000; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 784 | |
| 785 | return voltage; |
| 786 | } |
| 787 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 788 | static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector) |
| 789 | { |
| 790 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 791 | int step_mv = 0, id = rdev_get_id(dev); |
| 792 | |
| 793 | switch(id) { |
| 794 | case TPS65911_REG_LDO1: |
| 795 | case TPS65911_REG_LDO2: |
| 796 | case TPS65911_REG_LDO4: |
| 797 | /* The first 5 values of the selector correspond to 1V */ |
| 798 | if (selector < 5) |
| 799 | selector = 0; |
| 800 | else |
| 801 | selector -= 4; |
| 802 | |
| 803 | step_mv = 50; |
| 804 | break; |
| 805 | case TPS65911_REG_LDO3: |
| 806 | case TPS65911_REG_LDO5: |
| 807 | case TPS65911_REG_LDO6: |
| 808 | case TPS65911_REG_LDO7: |
| 809 | case TPS65911_REG_LDO8: |
| 810 | /* The first 3 values of the selector correspond to 1V */ |
| 811 | if (selector < 3) |
| 812 | selector = 0; |
| 813 | else |
| 814 | selector -= 2; |
| 815 | |
| 816 | step_mv = 100; |
| 817 | break; |
| 818 | case TPS65910_REG_VIO: |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 819 | return pmic->info[id]->voltage_table[selector] * 1000; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 820 | default: |
| 821 | return -EINVAL; |
| 822 | } |
| 823 | |
| 824 | return (LDO_MIN_VOLT + selector * step_mv) * 1000; |
| 825 | } |
| 826 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 827 | /* Regulator ops (except VRTC) */ |
| 828 | static struct regulator_ops tps65910_ops_dcdc = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 829 | .is_enabled = regulator_is_enabled_regmap, |
| 830 | .enable = regulator_enable_regmap, |
| 831 | .disable = regulator_disable_regmap, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 832 | .enable_time = tps65910_enable_time, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 833 | .set_mode = tps65910_set_mode, |
| 834 | .get_mode = tps65910_get_mode, |
Laxman Dewangan | 18039e0 | 2012-03-14 13:00:58 +0530 | [diff] [blame] | 835 | .get_voltage_sel = tps65910_get_voltage_dcdc_sel, |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 836 | .set_voltage_sel = tps65910_set_voltage_dcdc_sel, |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame^] | 837 | .set_voltage_time_sel = regulator_set_voltage_time_sel, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 838 | .list_voltage = tps65910_list_voltage_dcdc, |
| 839 | }; |
| 840 | |
| 841 | static struct regulator_ops tps65910_ops_vdd3 = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 842 | .is_enabled = regulator_is_enabled_regmap, |
| 843 | .enable = regulator_enable_regmap, |
| 844 | .disable = regulator_disable_regmap, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 845 | .enable_time = tps65910_enable_time, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 846 | .set_mode = tps65910_set_mode, |
| 847 | .get_mode = tps65910_get_mode, |
| 848 | .get_voltage = tps65910_get_voltage_vdd3, |
| 849 | .list_voltage = tps65910_list_voltage, |
| 850 | }; |
| 851 | |
| 852 | static struct regulator_ops tps65910_ops = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 853 | .is_enabled = regulator_is_enabled_regmap, |
| 854 | .enable = regulator_enable_regmap, |
| 855 | .disable = regulator_disable_regmap, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 856 | .enable_time = tps65910_enable_time, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 857 | .set_mode = tps65910_set_mode, |
| 858 | .get_mode = tps65910_get_mode, |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 859 | .get_voltage_sel = tps65910_get_voltage_sel, |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 860 | .set_voltage_sel = tps65910_set_voltage_sel, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 861 | .list_voltage = tps65910_list_voltage, |
| 862 | }; |
| 863 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 864 | static struct regulator_ops tps65911_ops = { |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 865 | .is_enabled = regulator_is_enabled_regmap, |
| 866 | .enable = regulator_enable_regmap, |
| 867 | .disable = regulator_disable_regmap, |
Laxman Dewangan | 0651eed | 2012-03-13 11:35:20 +0530 | [diff] [blame] | 868 | .enable_time = tps65910_enable_time, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 869 | .set_mode = tps65910_set_mode, |
| 870 | .get_mode = tps65910_get_mode, |
Axel Lin | 1f904fd | 2012-05-09 09:22:47 +0800 | [diff] [blame] | 871 | .get_voltage_sel = tps65911_get_voltage_sel, |
Axel Lin | 94732b9 | 2012-03-09 10:22:20 +0800 | [diff] [blame] | 872 | .set_voltage_sel = tps65911_set_voltage_sel, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 873 | .list_voltage = tps65911_list_voltage, |
| 874 | }; |
| 875 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 876 | static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, |
| 877 | int id, int ext_sleep_config) |
| 878 | { |
| 879 | struct tps65910 *mfd = pmic->mfd; |
| 880 | u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF; |
| 881 | u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF); |
| 882 | int ret; |
| 883 | |
| 884 | /* |
| 885 | * Regulator can not be control from multiple external input EN1, EN2 |
| 886 | * and EN3 together. |
| 887 | */ |
| 888 | if (ext_sleep_config & EXT_SLEEP_CONTROL) { |
| 889 | int en_count; |
| 890 | en_count = ((ext_sleep_config & |
| 891 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0); |
| 892 | en_count += ((ext_sleep_config & |
| 893 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0); |
| 894 | en_count += ((ext_sleep_config & |
| 895 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 896 | en_count += ((ext_sleep_config & |
| 897 | TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 898 | if (en_count > 1) { |
| 899 | dev_err(mfd->dev, |
| 900 | "External sleep control flag is not proper\n"); |
| 901 | return -EINVAL; |
| 902 | } |
| 903 | } |
| 904 | |
| 905 | pmic->board_ext_control[id] = ext_sleep_config; |
| 906 | |
| 907 | /* External EN1 control */ |
| 908 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 909 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 910 | TPS65910_EN1_LDO_ASS + regoffs, bit_pos); |
| 911 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 912 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 913 | TPS65910_EN1_LDO_ASS + regoffs, bit_pos); |
| 914 | if (ret < 0) { |
| 915 | dev_err(mfd->dev, |
| 916 | "Error in configuring external control EN1\n"); |
| 917 | return ret; |
| 918 | } |
| 919 | |
| 920 | /* External EN2 control */ |
| 921 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 922 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 923 | TPS65910_EN2_LDO_ASS + regoffs, bit_pos); |
| 924 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 925 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 926 | TPS65910_EN2_LDO_ASS + regoffs, bit_pos); |
| 927 | if (ret < 0) { |
| 928 | dev_err(mfd->dev, |
| 929 | "Error in configuring external control EN2\n"); |
| 930 | return ret; |
| 931 | } |
| 932 | |
| 933 | /* External EN3 control for TPS65910 LDO only */ |
| 934 | if ((tps65910_chip_id(mfd) == TPS65910) && |
| 935 | (id >= TPS65910_REG_VDIG1)) { |
| 936 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 937 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 938 | TPS65910_EN3_LDO_ASS + regoffs, bit_pos); |
| 939 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 940 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 941 | TPS65910_EN3_LDO_ASS + regoffs, bit_pos); |
| 942 | if (ret < 0) { |
| 943 | dev_err(mfd->dev, |
| 944 | "Error in configuring external control EN3\n"); |
| 945 | return ret; |
| 946 | } |
| 947 | } |
| 948 | |
| 949 | /* Return if no external control is selected */ |
| 950 | if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) { |
| 951 | /* Clear all sleep controls */ |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 952 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 953 | TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); |
| 954 | if (!ret) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 955 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 956 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 957 | if (ret < 0) |
| 958 | dev_err(mfd->dev, |
| 959 | "Error in configuring SLEEP register\n"); |
| 960 | return ret; |
| 961 | } |
| 962 | |
| 963 | /* |
| 964 | * For regulator that has separate operational and sleep register make |
| 965 | * sure that operational is used and clear sleep register to turn |
| 966 | * regulator off when external control is inactive |
| 967 | */ |
| 968 | if ((id == TPS65910_REG_VDD1) || |
| 969 | (id == TPS65910_REG_VDD2) || |
| 970 | ((id == TPS65911_REG_VDDCTRL) && |
| 971 | (tps65910_chip_id(mfd) == TPS65911))) { |
| 972 | int op_reg_add = pmic->get_ctrl_reg(id) + 1; |
| 973 | int sr_reg_add = pmic->get_ctrl_reg(id) + 2; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 974 | int opvsel = tps65910_reg_read_locked(pmic, op_reg_add); |
| 975 | int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 976 | if (opvsel & VDD1_OP_CMD_MASK) { |
| 977 | u8 reg_val = srvsel & VDD1_OP_SEL_MASK; |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 978 | ret = tps65910_reg_write_locked(pmic, op_reg_add, |
| 979 | reg_val); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 980 | if (ret < 0) { |
| 981 | dev_err(mfd->dev, |
| 982 | "Error in configuring op register\n"); |
| 983 | return ret; |
| 984 | } |
| 985 | } |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 986 | ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 987 | if (ret < 0) { |
| 988 | dev_err(mfd->dev, "Error in settting sr register\n"); |
| 989 | return ret; |
| 990 | } |
| 991 | } |
| 992 | |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 993 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 994 | TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 995 | if (!ret) { |
| 996 | if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 997 | ret = tps65910_reg_set_bits(mfd, |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 998 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 999 | else |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 1000 | ret = tps65910_reg_clear_bits(mfd, |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 1001 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 1002 | } |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1003 | if (ret < 0) |
| 1004 | dev_err(mfd->dev, |
| 1005 | "Error in configuring SLEEP register\n"); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame] | 1006 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1007 | return ret; |
| 1008 | } |
| 1009 | |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1010 | #ifdef CONFIG_OF |
| 1011 | |
| 1012 | static struct of_regulator_match tps65910_matches[] = { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 1013 | { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] }, |
| 1014 | { .name = "vio", .driver_data = (void *) &tps65910_regs[1] }, |
| 1015 | { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] }, |
| 1016 | { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] }, |
| 1017 | { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] }, |
| 1018 | { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] }, |
| 1019 | { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] }, |
| 1020 | { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] }, |
| 1021 | { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] }, |
| 1022 | { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] }, |
| 1023 | { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] }, |
| 1024 | { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] }, |
| 1025 | { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] }, |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1026 | }; |
| 1027 | |
| 1028 | static struct of_regulator_match tps65911_matches[] = { |
Laxman Dewangan | 33a6943 | 2012-05-19 20:04:06 +0530 | [diff] [blame] | 1029 | { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] }, |
| 1030 | { .name = "vio", .driver_data = (void *) &tps65911_regs[1] }, |
| 1031 | { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] }, |
| 1032 | { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] }, |
| 1033 | { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] }, |
| 1034 | { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] }, |
| 1035 | { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] }, |
| 1036 | { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] }, |
| 1037 | { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] }, |
| 1038 | { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] }, |
| 1039 | { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] }, |
| 1040 | { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] }, |
| 1041 | { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] }, |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1042 | }; |
| 1043 | |
| 1044 | static struct tps65910_board *tps65910_parse_dt_reg_data( |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1045 | struct platform_device *pdev, |
| 1046 | struct of_regulator_match **tps65910_reg_matches) |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1047 | { |
| 1048 | struct tps65910_board *pmic_plat_data; |
| 1049 | struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); |
| 1050 | struct device_node *np = pdev->dev.parent->of_node; |
| 1051 | struct device_node *regulators; |
| 1052 | struct of_regulator_match *matches; |
| 1053 | unsigned int prop; |
| 1054 | int idx = 0, ret, count; |
| 1055 | |
| 1056 | pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data), |
| 1057 | GFP_KERNEL); |
| 1058 | |
| 1059 | if (!pmic_plat_data) { |
| 1060 | dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n"); |
| 1061 | return NULL; |
| 1062 | } |
| 1063 | |
| 1064 | regulators = of_find_node_by_name(np, "regulators"); |
Laxman Dewangan | 92ab953 | 2012-05-20 21:48:49 +0530 | [diff] [blame] | 1065 | if (!regulators) { |
| 1066 | dev_err(&pdev->dev, "regulator node not found\n"); |
| 1067 | return NULL; |
| 1068 | } |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1069 | |
| 1070 | switch (tps65910_chip_id(tps65910)) { |
| 1071 | case TPS65910: |
| 1072 | count = ARRAY_SIZE(tps65910_matches); |
| 1073 | matches = tps65910_matches; |
| 1074 | break; |
| 1075 | case TPS65911: |
| 1076 | count = ARRAY_SIZE(tps65911_matches); |
| 1077 | matches = tps65911_matches; |
| 1078 | break; |
| 1079 | default: |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1080 | dev_err(&pdev->dev, "Invalid tps chip version\n"); |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1081 | return NULL; |
| 1082 | } |
| 1083 | |
| 1084 | ret = of_regulator_match(pdev->dev.parent, regulators, matches, count); |
| 1085 | if (ret < 0) { |
| 1086 | dev_err(&pdev->dev, "Error parsing regulator init data: %d\n", |
| 1087 | ret); |
| 1088 | return NULL; |
| 1089 | } |
| 1090 | |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1091 | *tps65910_reg_matches = matches; |
| 1092 | |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1093 | for (idx = 0; idx < count; idx++) { |
| 1094 | if (!matches[idx].init_data || !matches[idx].of_node) |
| 1095 | continue; |
| 1096 | |
| 1097 | pmic_plat_data->tps65910_pmic_init_data[idx] = |
| 1098 | matches[idx].init_data; |
| 1099 | |
| 1100 | ret = of_property_read_u32(matches[idx].of_node, |
| 1101 | "ti,regulator-ext-sleep-control", &prop); |
| 1102 | if (!ret) |
| 1103 | pmic_plat_data->regulator_ext_sleep_control[idx] = prop; |
| 1104 | } |
| 1105 | |
| 1106 | return pmic_plat_data; |
| 1107 | } |
| 1108 | #else |
| 1109 | static inline struct tps65910_board *tps65910_parse_dt_reg_data( |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1110 | struct platform_device *pdev, |
| 1111 | struct of_regulator_match **tps65910_reg_matches) |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1112 | { |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1113 | *tps65910_reg_matches = NULL; |
Mark Brown | 74ea0e5 | 2012-06-15 19:04:33 +0100 | [diff] [blame] | 1114 | return NULL; |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1115 | } |
| 1116 | #endif |
| 1117 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1118 | static __devinit int tps65910_probe(struct platform_device *pdev) |
| 1119 | { |
| 1120 | struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1121 | struct regulator_config config = { }; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1122 | struct tps_info *info; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1123 | struct regulator_init_data *reg_data; |
| 1124 | struct regulator_dev *rdev; |
| 1125 | struct tps65910_reg *pmic; |
| 1126 | struct tps65910_board *pmic_plat_data; |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1127 | struct of_regulator_match *tps65910_reg_matches = NULL; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1128 | int i, err; |
| 1129 | |
| 1130 | pmic_plat_data = dev_get_platdata(tps65910->dev); |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1131 | if (!pmic_plat_data && tps65910->dev->of_node) |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1132 | pmic_plat_data = tps65910_parse_dt_reg_data(pdev, |
| 1133 | &tps65910_reg_matches); |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1134 | |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1135 | if (!pmic_plat_data) { |
| 1136 | dev_err(&pdev->dev, "Platform data not found\n"); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1137 | return -EINVAL; |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1138 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1139 | |
Axel Lin | 9eb0c42 | 2012-04-11 14:40:18 +0800 | [diff] [blame] | 1140 | pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1141 | if (!pmic) { |
| 1142 | dev_err(&pdev->dev, "Memory allocation failed for pmic\n"); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1143 | return -ENOMEM; |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1144 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1145 | |
| 1146 | mutex_init(&pmic->mutex); |
| 1147 | pmic->mfd = tps65910; |
| 1148 | platform_set_drvdata(pdev, pmic); |
| 1149 | |
| 1150 | /* Give control of all register to control port */ |
Rhyland Klein | 3f7e827 | 2012-05-08 11:42:38 -0700 | [diff] [blame] | 1151 | tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1152 | DEVCTRL_SR_CTL_I2C_SEL_MASK); |
| 1153 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1154 | switch(tps65910_chip_id(tps65910)) { |
| 1155 | case TPS65910: |
| 1156 | pmic->get_ctrl_reg = &tps65910_get_ctrl_register; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1157 | pmic->num_regulators = ARRAY_SIZE(tps65910_regs); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1158 | pmic->ext_sleep_control = tps65910_ext_sleep_control; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1159 | info = tps65910_regs; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 1160 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1161 | case TPS65911: |
| 1162 | pmic->get_ctrl_reg = &tps65911_get_ctrl_register; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1163 | pmic->num_regulators = ARRAY_SIZE(tps65911_regs); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1164 | pmic->ext_sleep_control = tps65911_ext_sleep_control; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1165 | info = tps65911_regs; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 1166 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1167 | default: |
Laxman Dewangan | 7e9a57e | 2012-05-20 21:48:48 +0530 | [diff] [blame] | 1168 | dev_err(&pdev->dev, "Invalid tps chip version\n"); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1169 | return -ENODEV; |
| 1170 | } |
| 1171 | |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1172 | pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators * |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1173 | sizeof(struct regulator_desc), GFP_KERNEL); |
| 1174 | if (!pmic->desc) { |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1175 | dev_err(&pdev->dev, "Memory alloc fails for desc\n"); |
| 1176 | return -ENOMEM; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1177 | } |
| 1178 | |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1179 | pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators * |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1180 | sizeof(struct tps_info *), GFP_KERNEL); |
| 1181 | if (!pmic->info) { |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1182 | dev_err(&pdev->dev, "Memory alloc fails for info\n"); |
| 1183 | return -ENOMEM; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1184 | } |
| 1185 | |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1186 | pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators * |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1187 | sizeof(struct regulator_dev *), GFP_KERNEL); |
| 1188 | if (!pmic->rdev) { |
Laxman Dewangan | 68d8c1c | 2012-05-19 20:04:09 +0530 | [diff] [blame] | 1189 | dev_err(&pdev->dev, "Memory alloc fails for rdev\n"); |
| 1190 | return -ENOMEM; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1191 | } |
| 1192 | |
Kyle Manna | c1fc148 | 2011-11-03 12:08:06 -0500 | [diff] [blame] | 1193 | for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS; |
| 1194 | i++, info++) { |
| 1195 | |
| 1196 | reg_data = pmic_plat_data->tps65910_pmic_init_data[i]; |
| 1197 | |
| 1198 | /* Regulator API handles empty constraints but not NULL |
| 1199 | * constraints */ |
| 1200 | if (!reg_data) |
| 1201 | continue; |
| 1202 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1203 | /* Register the regulators */ |
| 1204 | pmic->info[i] = info; |
| 1205 | |
| 1206 | pmic->desc[i].name = info->name; |
Axel Lin | 77fa44d | 2011-05-12 13:47:50 +0800 | [diff] [blame] | 1207 | pmic->desc[i].id = i; |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 1208 | pmic->desc[i].n_voltages = info->n_voltages; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1209 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1210 | if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) { |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1211 | pmic->desc[i].ops = &tps65910_ops_dcdc; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 1212 | pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE * |
| 1213 | VDD1_2_NUM_VOLT_COARSE; |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame^] | 1214 | pmic->desc[i].ramp_delay = 12500; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1215 | } else if (i == TPS65910_REG_VDD3) { |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame^] | 1216 | if (tps65910_chip_id(tps65910) == TPS65910) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1217 | pmic->desc[i].ops = &tps65910_ops_vdd3; |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame^] | 1218 | } else { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1219 | pmic->desc[i].ops = &tps65910_ops_dcdc; |
Axel Lin | 01bc3a1 | 2012-06-20 22:40:10 +0800 | [diff] [blame^] | 1220 | pmic->desc[i].ramp_delay = 5000; |
| 1221 | } |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1222 | } else { |
| 1223 | if (tps65910_chip_id(tps65910) == TPS65910) |
| 1224 | pmic->desc[i].ops = &tps65910_ops; |
| 1225 | else |
| 1226 | pmic->desc[i].ops = &tps65911_ops; |
| 1227 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1228 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1229 | err = tps65910_set_ext_sleep_config(pmic, i, |
| 1230 | pmic_plat_data->regulator_ext_sleep_control[i]); |
| 1231 | /* |
| 1232 | * Failing on regulator for configuring externally control |
| 1233 | * is not a serious issue, just throw warning. |
| 1234 | */ |
| 1235 | if (err < 0) |
| 1236 | dev_warn(tps65910->dev, |
| 1237 | "Failed to initialise ext control config\n"); |
| 1238 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1239 | pmic->desc[i].type = REGULATOR_VOLTAGE; |
| 1240 | pmic->desc[i].owner = THIS_MODULE; |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 1241 | pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i); |
| 1242 | pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1243 | |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1244 | config.dev = tps65910->dev; |
| 1245 | config.init_data = reg_data; |
| 1246 | config.driver_data = pmic; |
Axel Lin | a40a9c4 | 2012-04-17 14:34:46 +0800 | [diff] [blame] | 1247 | config.regmap = tps65910->regmap; |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1248 | |
Laxman Dewangan | 84df8c1 | 2012-05-20 21:48:50 +0530 | [diff] [blame] | 1249 | if (tps65910_reg_matches) |
| 1250 | config.of_node = tps65910_reg_matches[i].of_node; |
Rhyland Klein | 6790178 | 2012-05-08 11:42:41 -0700 | [diff] [blame] | 1251 | |
Mark Brown | c172708 | 2012-04-04 00:50:22 +0100 | [diff] [blame] | 1252 | rdev = regulator_register(&pmic->desc[i], &config); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1253 | if (IS_ERR(rdev)) { |
| 1254 | dev_err(tps65910->dev, |
| 1255 | "failed to register %s regulator\n", |
| 1256 | pdev->name); |
| 1257 | err = PTR_ERR(rdev); |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1258 | goto err_unregister_regulator; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1259 | } |
| 1260 | |
| 1261 | /* Save regulator for cleanup */ |
| 1262 | pmic->rdev[i] = rdev; |
| 1263 | } |
| 1264 | return 0; |
| 1265 | |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1266 | err_unregister_regulator: |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1267 | while (--i >= 0) |
| 1268 | regulator_unregister(pmic->rdev[i]); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1269 | return err; |
| 1270 | } |
| 1271 | |
| 1272 | static int __devexit tps65910_remove(struct platform_device *pdev) |
| 1273 | { |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1274 | struct tps65910_reg *pmic = platform_get_drvdata(pdev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1275 | int i; |
| 1276 | |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1277 | for (i = 0; i < pmic->num_regulators; i++) |
| 1278 | regulator_unregister(pmic->rdev[i]); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1279 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1280 | return 0; |
| 1281 | } |
| 1282 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1283 | static void tps65910_shutdown(struct platform_device *pdev) |
| 1284 | { |
| 1285 | struct tps65910_reg *pmic = platform_get_drvdata(pdev); |
| 1286 | int i; |
| 1287 | |
| 1288 | /* |
| 1289 | * Before bootloader jumps to kernel, it makes sure that required |
| 1290 | * external control signals are in desired state so that given rails |
| 1291 | * can be configure accordingly. |
| 1292 | * If rails are configured to be controlled from external control |
| 1293 | * then before shutting down/rebooting the system, the external |
| 1294 | * control configuration need to be remove from the rails so that |
| 1295 | * its output will be available as per register programming even |
| 1296 | * if external controls are removed. This is require when the POR |
| 1297 | * value of the control signals are not in active state and before |
| 1298 | * bootloader initializes it, the system requires the rail output |
| 1299 | * to be active for booting. |
| 1300 | */ |
| 1301 | for (i = 0; i < pmic->num_regulators; i++) { |
| 1302 | int err; |
| 1303 | if (!pmic->rdev[i]) |
| 1304 | continue; |
| 1305 | |
| 1306 | err = tps65910_set_ext_sleep_config(pmic, i, 0); |
| 1307 | if (err < 0) |
| 1308 | dev_err(&pdev->dev, |
| 1309 | "Error in clearing external control\n"); |
| 1310 | } |
| 1311 | } |
| 1312 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1313 | static struct platform_driver tps65910_driver = { |
| 1314 | .driver = { |
| 1315 | .name = "tps65910-pmic", |
| 1316 | .owner = THIS_MODULE, |
| 1317 | }, |
| 1318 | .probe = tps65910_probe, |
| 1319 | .remove = __devexit_p(tps65910_remove), |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1320 | .shutdown = tps65910_shutdown, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1321 | }; |
| 1322 | |
| 1323 | static int __init tps65910_init(void) |
| 1324 | { |
| 1325 | return platform_driver_register(&tps65910_driver); |
| 1326 | } |
| 1327 | subsys_initcall(tps65910_init); |
| 1328 | |
| 1329 | static void __exit tps65910_cleanup(void) |
| 1330 | { |
| 1331 | platform_driver_unregister(&tps65910_driver); |
| 1332 | } |
| 1333 | module_exit(tps65910_cleanup); |
| 1334 | |
| 1335 | MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); |
Axel Lin | ae0e654 | 2012-02-21 10:14:55 +0800 | [diff] [blame] | 1336 | MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver"); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1337 | MODULE_LICENSE("GPL v2"); |
| 1338 | MODULE_ALIAS("platform:tps65910-pmic"); |