blob: 004b048c5192979ce0e180d14824220eb271c9ab [file] [log] [blame]
Ben Gamari20172632009-02-17 20:08:50 -05001/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
Chris Wilsonf3cd4742009-10-13 22:20:20 +010030#include <linux/debugfs.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040032#include <linux/export.h>
Ben Gamari20172632009-02-17 20:08:50 -050033#include "drmP.h"
34#include "drm.h"
Simon Farnsworth4e5359c2010-09-01 17:47:52 +010035#include "intel_drv.h"
Chris Wilsone5c65262010-11-01 11:35:28 +000036#include "intel_ringbuffer.h"
Ben Gamari20172632009-02-17 20:08:50 -050037#include "i915_drm.h"
38#include "i915_drv.h"
39
40#define DRM_I915_RING_DEBUG 1
41
42
43#if defined(CONFIG_DEBUG_FS)
44
Chris Wilsonf13d3f72010-09-20 17:36:15 +010045enum {
Chris Wilson69dc4982010-10-19 10:36:51 +010046 ACTIVE_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010047 FLUSHING_LIST,
48 INACTIVE_LIST,
Chris Wilsond21d5972010-09-26 11:19:33 +010049 PINNED_LIST,
50 DEFERRED_FREE_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010051};
Ben Gamari433e12f2009-02-17 20:08:51 -050052
Chris Wilson70d39fe2010-08-25 16:03:34 +010053static const char *yesno(int v)
54{
55 return v ? "yes" : "no";
56}
57
58static int i915_capabilities(struct seq_file *m, void *data)
59{
60 struct drm_info_node *node = (struct drm_info_node *) m->private;
61 struct drm_device *dev = node->minor->dev;
62 const struct intel_device_info *info = INTEL_INFO(dev);
63
64 seq_printf(m, "gen: %d\n", info->gen);
Paulo Zanoni03d00ac2011-10-14 18:17:41 -030065 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
Chris Wilson70d39fe2010-08-25 16:03:34 +010066#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
67 B(is_mobile);
Chris Wilson70d39fe2010-08-25 16:03:34 +010068 B(is_i85x);
69 B(is_i915g);
Chris Wilson70d39fe2010-08-25 16:03:34 +010070 B(is_i945gm);
Chris Wilson70d39fe2010-08-25 16:03:34 +010071 B(is_g33);
72 B(need_gfx_hws);
73 B(is_g4x);
74 B(is_pineview);
75 B(is_broadwater);
76 B(is_crestline);
Chris Wilson70d39fe2010-08-25 16:03:34 +010077 B(has_fbc);
Chris Wilson70d39fe2010-08-25 16:03:34 +010078 B(has_pipe_cxsr);
79 B(has_hotplug);
80 B(cursor_needs_physical);
81 B(has_overlay);
82 B(overlay_needs_physical);
Chris Wilsona6c45cf2010-09-17 00:32:17 +010083 B(supports_tv);
Chris Wilson549f7362010-10-19 11:19:32 +010084 B(has_bsd_ring);
85 B(has_blt_ring);
Chris Wilson70d39fe2010-08-25 16:03:34 +010086#undef B
87
88 return 0;
89}
Ben Gamari433e12f2009-02-17 20:08:51 -050090
Chris Wilson05394f32010-11-08 19:18:58 +000091static const char *get_pin_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +000092{
Chris Wilson05394f32010-11-08 19:18:58 +000093 if (obj->user_pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000094 return "P";
Chris Wilson05394f32010-11-08 19:18:58 +000095 else if (obj->pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000096 return "p";
97 else
98 return " ";
99}
100
Chris Wilson05394f32010-11-08 19:18:58 +0000101static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +0000102{
Akshay Joshi0206e352011-08-16 15:34:10 -0400103 switch (obj->tiling_mode) {
104 default:
105 case I915_TILING_NONE: return " ";
106 case I915_TILING_X: return "X";
107 case I915_TILING_Y: return "Y";
108 }
Chris Wilsona6172a82009-02-11 14:26:38 +0000109}
110
Chris Wilson93dfb402011-03-29 16:59:50 -0700111static const char *cache_level_str(int type)
Chris Wilson08c18322011-01-10 00:00:24 +0000112{
113 switch (type) {
Chris Wilson93dfb402011-03-29 16:59:50 -0700114 case I915_CACHE_NONE: return " uncached";
115 case I915_CACHE_LLC: return " snooped (LLC)";
116 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
Chris Wilson08c18322011-01-10 00:00:24 +0000117 default: return "";
118 }
119}
120
Chris Wilson37811fc2010-08-25 22:45:57 +0100121static void
122describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
123{
Chris Wilson08c18322011-01-10 00:00:24 +0000124 seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s%s",
Chris Wilson37811fc2010-08-25 22:45:57 +0100125 &obj->base,
126 get_pin_flag(obj),
127 get_tiling_flag(obj),
128 obj->base.size,
129 obj->base.read_domains,
130 obj->base.write_domain,
131 obj->last_rendering_seqno,
Chris Wilsoncaea7472010-11-12 13:53:37 +0000132 obj->last_fenced_seqno,
Chris Wilson93dfb402011-03-29 16:59:50 -0700133 cache_level_str(obj->cache_level),
Chris Wilson37811fc2010-08-25 22:45:57 +0100134 obj->dirty ? " dirty" : "",
135 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
136 if (obj->base.name)
137 seq_printf(m, " (name: %d)", obj->base.name);
138 if (obj->fence_reg != I915_FENCE_REG_NONE)
139 seq_printf(m, " (fence: %d)", obj->fence_reg);
140 if (obj->gtt_space != NULL)
Chris Wilsona00b10c2010-09-24 21:15:47 +0100141 seq_printf(m, " (gtt offset: %08x, size: %08x)",
142 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
Chris Wilson6299f992010-11-24 12:23:44 +0000143 if (obj->pin_mappable || obj->fault_mappable) {
144 char s[3], *t = s;
145 if (obj->pin_mappable)
146 *t++ = 'p';
147 if (obj->fault_mappable)
148 *t++ = 'f';
149 *t = '\0';
150 seq_printf(m, " (%s mappable)", s);
151 }
Chris Wilson69dc4982010-10-19 10:36:51 +0100152 if (obj->ring != NULL)
153 seq_printf(m, " (%s)", obj->ring->name);
Chris Wilson37811fc2010-08-25 22:45:57 +0100154}
155
Ben Gamari433e12f2009-02-17 20:08:51 -0500156static int i915_gem_object_list_info(struct seq_file *m, void *data)
Ben Gamari20172632009-02-17 20:08:50 -0500157{
158 struct drm_info_node *node = (struct drm_info_node *) m->private;
Ben Gamari433e12f2009-02-17 20:08:51 -0500159 uintptr_t list = (uintptr_t) node->info_ent->data;
160 struct list_head *head;
Ben Gamari20172632009-02-17 20:08:50 -0500161 struct drm_device *dev = node->minor->dev;
162 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson05394f32010-11-08 19:18:58 +0000163 struct drm_i915_gem_object *obj;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100164 size_t total_obj_size, total_gtt_size;
165 int count, ret;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100166
167 ret = mutex_lock_interruptible(&dev->struct_mutex);
168 if (ret)
169 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500170
Ben Gamari433e12f2009-02-17 20:08:51 -0500171 switch (list) {
172 case ACTIVE_LIST:
173 seq_printf(m, "Active:\n");
Chris Wilson69dc4982010-10-19 10:36:51 +0100174 head = &dev_priv->mm.active_list;
Ben Gamari433e12f2009-02-17 20:08:51 -0500175 break;
176 case INACTIVE_LIST:
Ben Gamaria17458f2009-07-01 15:01:36 -0400177 seq_printf(m, "Inactive:\n");
Ben Gamari433e12f2009-02-17 20:08:51 -0500178 head = &dev_priv->mm.inactive_list;
179 break;
Chris Wilsonf13d3f72010-09-20 17:36:15 +0100180 case PINNED_LIST:
181 seq_printf(m, "Pinned:\n");
182 head = &dev_priv->mm.pinned_list;
183 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500184 case FLUSHING_LIST:
185 seq_printf(m, "Flushing:\n");
186 head = &dev_priv->mm.flushing_list;
187 break;
Chris Wilsond21d5972010-09-26 11:19:33 +0100188 case DEFERRED_FREE_LIST:
189 seq_printf(m, "Deferred free:\n");
190 head = &dev_priv->mm.deferred_free_list;
191 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500192 default:
Chris Wilsonde227ef2010-07-03 07:58:38 +0100193 mutex_unlock(&dev->struct_mutex);
194 return -EINVAL;
Ben Gamari433e12f2009-02-17 20:08:51 -0500195 }
196
Chris Wilson8f2480f2010-09-26 11:44:19 +0100197 total_obj_size = total_gtt_size = count = 0;
Chris Wilson05394f32010-11-08 19:18:58 +0000198 list_for_each_entry(obj, head, mm_list) {
Chris Wilson37811fc2010-08-25 22:45:57 +0100199 seq_printf(m, " ");
Chris Wilson05394f32010-11-08 19:18:58 +0000200 describe_obj(m, obj);
Eric Anholtf4ceda82009-02-17 23:53:41 -0800201 seq_printf(m, "\n");
Chris Wilson05394f32010-11-08 19:18:58 +0000202 total_obj_size += obj->base.size;
203 total_gtt_size += obj->gtt_space->size;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100204 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500205 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100206 mutex_unlock(&dev->struct_mutex);
Carl Worth5e118f42009-03-20 11:54:25 -0700207
Chris Wilson8f2480f2010-09-26 11:44:19 +0100208 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
209 count, total_obj_size, total_gtt_size);
Ben Gamari20172632009-02-17 20:08:50 -0500210 return 0;
211}
212
Chris Wilson6299f992010-11-24 12:23:44 +0000213#define count_objects(list, member) do { \
214 list_for_each_entry(obj, list, member) { \
215 size += obj->gtt_space->size; \
216 ++count; \
217 if (obj->map_and_fenceable) { \
218 mappable_size += obj->gtt_space->size; \
219 ++mappable_count; \
220 } \
221 } \
Akshay Joshi0206e352011-08-16 15:34:10 -0400222} while (0)
Chris Wilson6299f992010-11-24 12:23:44 +0000223
Chris Wilson73aa8082010-09-30 11:46:12 +0100224static int i915_gem_object_info(struct seq_file *m, void* data)
225{
226 struct drm_info_node *node = (struct drm_info_node *) m->private;
227 struct drm_device *dev = node->minor->dev;
228 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson6299f992010-11-24 12:23:44 +0000229 u32 count, mappable_count;
230 size_t size, mappable_size;
231 struct drm_i915_gem_object *obj;
Chris Wilson73aa8082010-09-30 11:46:12 +0100232 int ret;
233
234 ret = mutex_lock_interruptible(&dev->struct_mutex);
235 if (ret)
236 return ret;
237
Chris Wilson6299f992010-11-24 12:23:44 +0000238 seq_printf(m, "%u objects, %zu bytes\n",
239 dev_priv->mm.object_count,
240 dev_priv->mm.object_memory);
241
242 size = count = mappable_size = mappable_count = 0;
243 count_objects(&dev_priv->mm.gtt_list, gtt_list);
244 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
245 count, mappable_count, size, mappable_size);
246
247 size = count = mappable_size = mappable_count = 0;
248 count_objects(&dev_priv->mm.active_list, mm_list);
249 count_objects(&dev_priv->mm.flushing_list, mm_list);
250 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
251 count, mappable_count, size, mappable_size);
252
253 size = count = mappable_size = mappable_count = 0;
254 count_objects(&dev_priv->mm.pinned_list, mm_list);
255 seq_printf(m, " %u [%u] pinned objects, %zu [%zu] bytes\n",
256 count, mappable_count, size, mappable_size);
257
258 size = count = mappable_size = mappable_count = 0;
259 count_objects(&dev_priv->mm.inactive_list, mm_list);
260 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
261 count, mappable_count, size, mappable_size);
262
263 size = count = mappable_size = mappable_count = 0;
264 count_objects(&dev_priv->mm.deferred_free_list, mm_list);
265 seq_printf(m, " %u [%u] freed objects, %zu [%zu] bytes\n",
266 count, mappable_count, size, mappable_size);
267
268 size = count = mappable_size = mappable_count = 0;
269 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
270 if (obj->fault_mappable) {
271 size += obj->gtt_space->size;
272 ++count;
273 }
274 if (obj->pin_mappable) {
275 mappable_size += obj->gtt_space->size;
276 ++mappable_count;
277 }
278 }
279 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
280 mappable_count, mappable_size);
281 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
282 count, size);
283
284 seq_printf(m, "%zu [%zu] gtt total\n",
285 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
Chris Wilson73aa8082010-09-30 11:46:12 +0100286
287 mutex_unlock(&dev->struct_mutex);
288
289 return 0;
290}
291
Chris Wilson08c18322011-01-10 00:00:24 +0000292static int i915_gem_gtt_info(struct seq_file *m, void* data)
293{
294 struct drm_info_node *node = (struct drm_info_node *) m->private;
295 struct drm_device *dev = node->minor->dev;
296 struct drm_i915_private *dev_priv = dev->dev_private;
297 struct drm_i915_gem_object *obj;
298 size_t total_obj_size, total_gtt_size;
299 int count, ret;
300
301 ret = mutex_lock_interruptible(&dev->struct_mutex);
302 if (ret)
303 return ret;
304
305 total_obj_size = total_gtt_size = count = 0;
306 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
307 seq_printf(m, " ");
308 describe_obj(m, obj);
309 seq_printf(m, "\n");
310 total_obj_size += obj->base.size;
311 total_gtt_size += obj->gtt_space->size;
312 count++;
313 }
314
315 mutex_unlock(&dev->struct_mutex);
316
317 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
318 count, total_obj_size, total_gtt_size);
319
320 return 0;
321}
322
Chris Wilson73aa8082010-09-30 11:46:12 +0100323
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100324static int i915_gem_pageflip_info(struct seq_file *m, void *data)
325{
326 struct drm_info_node *node = (struct drm_info_node *) m->private;
327 struct drm_device *dev = node->minor->dev;
328 unsigned long flags;
329 struct intel_crtc *crtc;
330
331 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800332 const char pipe = pipe_name(crtc->pipe);
333 const char plane = plane_name(crtc->plane);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100334 struct intel_unpin_work *work;
335
336 spin_lock_irqsave(&dev->event_lock, flags);
337 work = crtc->unpin_work;
338 if (work == NULL) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800339 seq_printf(m, "No flip due on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100340 pipe, plane);
341 } else {
342 if (!work->pending) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800343 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100344 pipe, plane);
345 } else {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800346 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100347 pipe, plane);
348 }
349 if (work->enable_stall_check)
350 seq_printf(m, "Stall check enabled, ");
351 else
352 seq_printf(m, "Stall check waiting for page flip ioctl, ");
353 seq_printf(m, "%d prepares\n", work->pending);
354
355 if (work->old_fb_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000356 struct drm_i915_gem_object *obj = work->old_fb_obj;
357 if (obj)
358 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100359 }
360 if (work->pending_flip_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000361 struct drm_i915_gem_object *obj = work->pending_flip_obj;
362 if (obj)
363 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100364 }
365 }
366 spin_unlock_irqrestore(&dev->event_lock, flags);
367 }
368
369 return 0;
370}
371
Ben Gamari20172632009-02-17 20:08:50 -0500372static int i915_gem_request_info(struct seq_file *m, void *data)
373{
374 struct drm_info_node *node = (struct drm_info_node *) m->private;
375 struct drm_device *dev = node->minor->dev;
376 drm_i915_private_t *dev_priv = dev->dev_private;
377 struct drm_i915_gem_request *gem_request;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100378 int ret, count;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100379
380 ret = mutex_lock_interruptible(&dev->struct_mutex);
381 if (ret)
382 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500383
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100384 count = 0;
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000385 if (!list_empty(&dev_priv->ring[RCS].request_list)) {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100386 seq_printf(m, "Render requests:\n");
387 list_for_each_entry(gem_request,
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000388 &dev_priv->ring[RCS].request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100389 list) {
390 seq_printf(m, " %d @ %d\n",
391 gem_request->seqno,
392 (int) (jiffies - gem_request->emitted_jiffies));
393 }
394 count++;
395 }
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000396 if (!list_empty(&dev_priv->ring[VCS].request_list)) {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100397 seq_printf(m, "BSD requests:\n");
398 list_for_each_entry(gem_request,
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000399 &dev_priv->ring[VCS].request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100400 list) {
401 seq_printf(m, " %d @ %d\n",
402 gem_request->seqno,
403 (int) (jiffies - gem_request->emitted_jiffies));
404 }
405 count++;
406 }
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000407 if (!list_empty(&dev_priv->ring[BCS].request_list)) {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100408 seq_printf(m, "BLT requests:\n");
409 list_for_each_entry(gem_request,
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000410 &dev_priv->ring[BCS].request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100411 list) {
412 seq_printf(m, " %d @ %d\n",
413 gem_request->seqno,
414 (int) (jiffies - gem_request->emitted_jiffies));
415 }
416 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500417 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100418 mutex_unlock(&dev->struct_mutex);
419
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100420 if (count == 0)
421 seq_printf(m, "No requests\n");
422
Ben Gamari20172632009-02-17 20:08:50 -0500423 return 0;
424}
425
Chris Wilsonb2223492010-10-27 15:27:33 +0100426static void i915_ring_seqno_info(struct seq_file *m,
427 struct intel_ring_buffer *ring)
428{
429 if (ring->get_seqno) {
430 seq_printf(m, "Current sequence (%s): %d\n",
431 ring->name, ring->get_seqno(ring));
432 seq_printf(m, "Waiter sequence (%s): %d\n",
433 ring->name, ring->waiting_seqno);
434 seq_printf(m, "IRQ sequence (%s): %d\n",
435 ring->name, ring->irq_seqno);
436 }
437}
438
Ben Gamari20172632009-02-17 20:08:50 -0500439static int i915_gem_seqno_info(struct seq_file *m, void *data)
440{
441 struct drm_info_node *node = (struct drm_info_node *) m->private;
442 struct drm_device *dev = node->minor->dev;
443 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000444 int ret, i;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100445
446 ret = mutex_lock_interruptible(&dev->struct_mutex);
447 if (ret)
448 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500449
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000450 for (i = 0; i < I915_NUM_RINGS; i++)
451 i915_ring_seqno_info(m, &dev_priv->ring[i]);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100452
453 mutex_unlock(&dev->struct_mutex);
454
Ben Gamari20172632009-02-17 20:08:50 -0500455 return 0;
456}
457
458
459static int i915_interrupt_info(struct seq_file *m, void *data)
460{
461 struct drm_info_node *node = (struct drm_info_node *) m->private;
462 struct drm_device *dev = node->minor->dev;
463 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800464 int ret, i, pipe;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100465
466 ret = mutex_lock_interruptible(&dev->struct_mutex);
467 if (ret)
468 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500469
Eric Anholtbad720f2009-10-22 16:11:14 -0700470 if (!HAS_PCH_SPLIT(dev)) {
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800471 seq_printf(m, "Interrupt enable: %08x\n",
472 I915_READ(IER));
473 seq_printf(m, "Interrupt identity: %08x\n",
474 I915_READ(IIR));
475 seq_printf(m, "Interrupt mask: %08x\n",
476 I915_READ(IMR));
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800477 for_each_pipe(pipe)
478 seq_printf(m, "Pipe %c stat: %08x\n",
479 pipe_name(pipe),
480 I915_READ(PIPESTAT(pipe)));
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800481 } else {
482 seq_printf(m, "North Display Interrupt enable: %08x\n",
483 I915_READ(DEIER));
484 seq_printf(m, "North Display Interrupt identity: %08x\n",
485 I915_READ(DEIIR));
486 seq_printf(m, "North Display Interrupt mask: %08x\n",
487 I915_READ(DEIMR));
488 seq_printf(m, "South Display Interrupt enable: %08x\n",
489 I915_READ(SDEIER));
490 seq_printf(m, "South Display Interrupt identity: %08x\n",
491 I915_READ(SDEIIR));
492 seq_printf(m, "South Display Interrupt mask: %08x\n",
493 I915_READ(SDEIMR));
494 seq_printf(m, "Graphics Interrupt enable: %08x\n",
495 I915_READ(GTIER));
496 seq_printf(m, "Graphics Interrupt identity: %08x\n",
497 I915_READ(GTIIR));
498 seq_printf(m, "Graphics Interrupt mask: %08x\n",
499 I915_READ(GTIMR));
500 }
Ben Gamari20172632009-02-17 20:08:50 -0500501 seq_printf(m, "Interrupts received: %d\n",
502 atomic_read(&dev_priv->irq_received));
Chris Wilson9862e602011-01-04 22:22:17 +0000503 for (i = 0; i < I915_NUM_RINGS; i++) {
Jesse Barnesda64c6f2011-08-09 09:17:46 -0700504 if (IS_GEN6(dev) || IS_GEN7(dev)) {
Chris Wilson9862e602011-01-04 22:22:17 +0000505 seq_printf(m, "Graphics Interrupt mask (%s): %08x\n",
506 dev_priv->ring[i].name,
507 I915_READ_IMR(&dev_priv->ring[i]));
508 }
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000509 i915_ring_seqno_info(m, &dev_priv->ring[i]);
Chris Wilson9862e602011-01-04 22:22:17 +0000510 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100511 mutex_unlock(&dev->struct_mutex);
512
Ben Gamari20172632009-02-17 20:08:50 -0500513 return 0;
514}
515
Chris Wilsona6172a82009-02-11 14:26:38 +0000516static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
517{
518 struct drm_info_node *node = (struct drm_info_node *) m->private;
519 struct drm_device *dev = node->minor->dev;
520 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100521 int i, ret;
522
523 ret = mutex_lock_interruptible(&dev->struct_mutex);
524 if (ret)
525 return ret;
Chris Wilsona6172a82009-02-11 14:26:38 +0000526
527 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
528 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
529 for (i = 0; i < dev_priv->num_fence_regs; i++) {
Chris Wilson05394f32010-11-08 19:18:58 +0000530 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
Chris Wilsona6172a82009-02-11 14:26:38 +0000531
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100532 seq_printf(m, "Fenced object[%2d] = ", i);
533 if (obj == NULL)
534 seq_printf(m, "unused");
535 else
Chris Wilson05394f32010-11-08 19:18:58 +0000536 describe_obj(m, obj);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100537 seq_printf(m, "\n");
Chris Wilsona6172a82009-02-11 14:26:38 +0000538 }
539
Chris Wilson05394f32010-11-08 19:18:58 +0000540 mutex_unlock(&dev->struct_mutex);
Chris Wilsona6172a82009-02-11 14:26:38 +0000541 return 0;
542}
543
Ben Gamari20172632009-02-17 20:08:50 -0500544static int i915_hws_info(struct seq_file *m, void *data)
545{
546 struct drm_info_node *node = (struct drm_info_node *) m->private;
547 struct drm_device *dev = node->minor->dev;
548 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100549 struct intel_ring_buffer *ring;
Chris Wilson311bd682011-01-13 19:06:50 +0000550 const volatile u32 __iomem *hws;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100551 int i;
Ben Gamari20172632009-02-17 20:08:50 -0500552
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000553 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
Chris Wilson311bd682011-01-13 19:06:50 +0000554 hws = (volatile u32 __iomem *)ring->status_page.page_addr;
Ben Gamari20172632009-02-17 20:08:50 -0500555 if (hws == NULL)
556 return 0;
557
558 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
559 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
560 i * 4,
561 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
562 }
563 return 0;
564}
565
Chris Wilson5cdf5882010-09-27 15:51:07 +0100566static void i915_dump_object(struct seq_file *m,
567 struct io_mapping *mapping,
Chris Wilson05394f32010-11-08 19:18:58 +0000568 struct drm_i915_gem_object *obj)
Ben Gamari6911a9b2009-04-02 11:24:54 -0700569{
Chris Wilson5cdf5882010-09-27 15:51:07 +0100570 int page, page_count, i;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700571
Chris Wilson05394f32010-11-08 19:18:58 +0000572 page_count = obj->base.size / PAGE_SIZE;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700573 for (page = 0; page < page_count; page++) {
Chris Wilson5cdf5882010-09-27 15:51:07 +0100574 u32 *mem = io_mapping_map_wc(mapping,
Chris Wilson05394f32010-11-08 19:18:58 +0000575 obj->gtt_offset + page * PAGE_SIZE);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700576 for (i = 0; i < PAGE_SIZE; i += 4)
577 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
Chris Wilson5cdf5882010-09-27 15:51:07 +0100578 io_mapping_unmap(mem);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700579 }
580}
581
582static int i915_batchbuffer_info(struct seq_file *m, void *data)
583{
584 struct drm_info_node *node = (struct drm_info_node *) m->private;
585 struct drm_device *dev = node->minor->dev;
586 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson05394f32010-11-08 19:18:58 +0000587 struct drm_i915_gem_object *obj;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700588 int ret;
589
Chris Wilsonde227ef2010-07-03 07:58:38 +0100590 ret = mutex_lock_interruptible(&dev->struct_mutex);
591 if (ret)
592 return ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700593
Chris Wilson05394f32010-11-08 19:18:58 +0000594 list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
595 if (obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) {
596 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
597 i915_dump_object(m, dev_priv->mm.gtt_mapping, obj);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700598 }
599 }
600
Chris Wilsonde227ef2010-07-03 07:58:38 +0100601 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700602 return 0;
603}
604
605static int i915_ringbuffer_data(struct seq_file *m, void *data)
606{
607 struct drm_info_node *node = (struct drm_info_node *) m->private;
608 struct drm_device *dev = node->minor->dev;
609 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100610 struct intel_ring_buffer *ring;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100611 int ret;
612
613 ret = mutex_lock_interruptible(&dev->struct_mutex);
614 if (ret)
615 return ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700616
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000617 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
Chris Wilson05394f32010-11-08 19:18:58 +0000618 if (!ring->obj) {
Ben Gamari6911a9b2009-04-02 11:24:54 -0700619 seq_printf(m, "No ringbuffer setup\n");
Chris Wilsonde227ef2010-07-03 07:58:38 +0100620 } else {
Chris Wilson311bd682011-01-13 19:06:50 +0000621 const u8 __iomem *virt = ring->virtual_start;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100622 uint32_t off;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700623
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100624 for (off = 0; off < ring->size; off += 4) {
Chris Wilsonde227ef2010-07-03 07:58:38 +0100625 uint32_t *ptr = (uint32_t *)(virt + off);
626 seq_printf(m, "%08x : %08x\n", off, *ptr);
627 }
Ben Gamari6911a9b2009-04-02 11:24:54 -0700628 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100629 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700630
631 return 0;
632}
633
634static int i915_ringbuffer_info(struct seq_file *m, void *data)
635{
636 struct drm_info_node *node = (struct drm_info_node *) m->private;
637 struct drm_device *dev = node->minor->dev;
638 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100639 struct intel_ring_buffer *ring;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700640 int ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700641
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000642 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100643 if (ring->size == 0)
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000644 return 0;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100645
Ben Widawsky616fdb52011-10-05 11:44:54 -0700646 ret = mutex_lock_interruptible(&dev->struct_mutex);
647 if (ret)
648 return ret;
649
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100650 seq_printf(m, "Ring %s:\n", ring->name);
651 seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
652 seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
653 seq_printf(m, " Size : %08x\n", ring->size);
654 seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000655 seq_printf(m, " NOPID : %08x\n", I915_READ_NOPID(ring));
656 if (IS_GEN6(dev)) {
657 seq_printf(m, " Sync 0 : %08x\n", I915_READ_SYNC_0(ring));
658 seq_printf(m, " Sync 1 : %08x\n", I915_READ_SYNC_1(ring));
659 }
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100660 seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
661 seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
Ben Gamari6911a9b2009-04-02 11:24:54 -0700662
Ben Widawsky616fdb52011-10-05 11:44:54 -0700663 mutex_unlock(&dev->struct_mutex);
664
Ben Gamari6911a9b2009-04-02 11:24:54 -0700665 return 0;
666}
667
Chris Wilsone5c65262010-11-01 11:35:28 +0000668static const char *ring_str(int ring)
669{
670 switch (ring) {
Chris Wilson36850922010-11-23 08:49:38 +0000671 case RING_RENDER: return " render";
672 case RING_BSD: return " bsd";
673 case RING_BLT: return " blt";
Chris Wilsone5c65262010-11-01 11:35:28 +0000674 default: return "";
675 }
676}
677
Chris Wilson9df30792010-02-18 10:24:56 +0000678static const char *pin_flag(int pinned)
679{
680 if (pinned > 0)
681 return " P";
682 else if (pinned < 0)
683 return " p";
684 else
685 return "";
686}
687
688static const char *tiling_flag(int tiling)
689{
690 switch (tiling) {
691 default:
692 case I915_TILING_NONE: return "";
693 case I915_TILING_X: return " X";
694 case I915_TILING_Y: return " Y";
695 }
696}
697
698static const char *dirty_flag(int dirty)
699{
700 return dirty ? " dirty" : "";
701}
702
703static const char *purgeable_flag(int purgeable)
704{
705 return purgeable ? " purgeable" : "";
706}
707
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000708static void print_error_buffers(struct seq_file *m,
709 const char *name,
710 struct drm_i915_error_buffer *err,
711 int count)
712{
713 seq_printf(m, "%s [%d]:\n", name, count);
714
715 while (count--) {
Chris Wilson833bcb02011-01-12 12:14:13 +0000716 seq_printf(m, " %08x %8u %04x %04x %08x%s%s%s%s%s%s",
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000717 err->gtt_offset,
718 err->size,
719 err->read_domains,
720 err->write_domain,
721 err->seqno,
722 pin_flag(err->pinned),
723 tiling_flag(err->tiling),
724 dirty_flag(err->dirty),
725 purgeable_flag(err->purgeable),
Chris Wilsona779e5a2011-01-09 21:07:49 +0000726 ring_str(err->ring),
Chris Wilson93dfb402011-03-29 16:59:50 -0700727 cache_level_str(err->cache_level));
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000728
729 if (err->name)
730 seq_printf(m, " (name: %d)", err->name);
731 if (err->fence_reg != I915_FENCE_REG_NONE)
732 seq_printf(m, " (fence: %d)", err->fence_reg);
733
734 seq_printf(m, "\n");
735 err++;
736 }
737}
738
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700739static int i915_error_state(struct seq_file *m, void *unused)
740{
741 struct drm_info_node *node = (struct drm_info_node *) m->private;
742 struct drm_device *dev = node->minor->dev;
743 drm_i915_private_t *dev_priv = dev->dev_private;
744 struct drm_i915_error_state *error;
745 unsigned long flags;
Chris Wilson9df30792010-02-18 10:24:56 +0000746 int i, page, offset, elt;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700747
748 spin_lock_irqsave(&dev_priv->error_lock, flags);
749 if (!dev_priv->first_error) {
750 seq_printf(m, "no error state collected\n");
751 goto out;
752 }
753
754 error = dev_priv->first_error;
755
Jesse Barnes8a905232009-07-11 16:48:03 -0400756 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
757 error->time.tv_usec);
Chris Wilson9df30792010-02-18 10:24:56 +0000758 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100759 seq_printf(m, "EIR: 0x%08x\n", error->eir);
760 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
Chris Wilsonf4068392010-10-27 20:36:41 +0100761 if (INTEL_INFO(dev)->gen >= 6) {
762 seq_printf(m, "ERROR: 0x%08x\n", error->error);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100763 seq_printf(m, "Blitter command stream:\n");
764 seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100765 seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
Chris Wilsone5c65262010-11-01 11:35:28 +0000766 seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100767 seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
768 seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
Chris Wilsonadd354d2010-10-29 19:00:51 +0100769 seq_printf(m, "Video (BSD) command stream:\n");
770 seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
Chris Wilsonadd354d2010-10-29 19:00:51 +0100771 seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
Chris Wilsone5c65262010-11-01 11:35:28 +0000772 seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
Chris Wilsonadd354d2010-10-29 19:00:51 +0100773 seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
774 seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
Chris Wilsonf4068392010-10-27 20:36:41 +0100775 }
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100776 seq_printf(m, "Render command stream:\n");
777 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700778 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
779 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
780 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100781 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700782 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100783 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700784 }
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100785 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
786 seq_printf(m, " seqno: 0x%08x\n", error->seqno);
Chris Wilson9df30792010-02-18 10:24:56 +0000787
Daniel Vetterbf3301a2011-05-12 22:17:12 +0100788 for (i = 0; i < dev_priv->num_fence_regs; i++)
Chris Wilson748ebc62010-10-24 10:28:47 +0100789 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
790
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000791 if (error->active_bo)
792 print_error_buffers(m, "Active",
793 error->active_bo,
794 error->active_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000795
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000796 if (error->pinned_bo)
797 print_error_buffers(m, "Pinned",
798 error->pinned_bo,
799 error->pinned_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000800
801 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
802 if (error->batchbuffer[i]) {
803 struct drm_i915_error_object *obj = error->batchbuffer[i];
804
Chris Wilsonbcfb2e22011-01-07 21:06:07 +0000805 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
806 dev_priv->ring[i].name,
807 obj->gtt_offset);
Chris Wilson9df30792010-02-18 10:24:56 +0000808 offset = 0;
809 for (page = 0; page < obj->page_count; page++) {
810 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
811 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
812 offset += 4;
813 }
814 }
815 }
816 }
817
Chris Wilsone2f973d2011-01-27 19:15:11 +0000818 for (i = 0; i < ARRAY_SIZE(error->ringbuffer); i++) {
819 if (error->ringbuffer[i]) {
820 struct drm_i915_error_object *obj = error->ringbuffer[i];
821 seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
822 dev_priv->ring[i].name,
823 obj->gtt_offset);
824 offset = 0;
825 for (page = 0; page < obj->page_count; page++) {
826 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
827 seq_printf(m, "%08x : %08x\n",
828 offset,
829 obj->pages[page][elt]);
830 offset += 4;
831 }
Chris Wilson9df30792010-02-18 10:24:56 +0000832 }
833 }
834 }
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700835
Chris Wilson6ef3d422010-08-04 20:26:07 +0100836 if (error->overlay)
837 intel_overlay_print_error_state(m, error->overlay);
838
Chris Wilsonc4a1d9e2010-11-21 13:12:35 +0000839 if (error->display)
840 intel_display_print_error_state(m, dev, error->display);
841
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700842out:
843 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
844
845 return 0;
846}
Ben Gamari6911a9b2009-04-02 11:24:54 -0700847
Jesse Barnesf97108d2010-01-29 11:27:07 -0800848static int i915_rstdby_delays(struct seq_file *m, void *unused)
849{
850 struct drm_info_node *node = (struct drm_info_node *) m->private;
851 struct drm_device *dev = node->minor->dev;
852 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700853 u16 crstanddelay;
854 int ret;
855
856 ret = mutex_lock_interruptible(&dev->struct_mutex);
857 if (ret)
858 return ret;
859
860 crstanddelay = I915_READ16(CRSTANDVID);
861
862 mutex_unlock(&dev->struct_mutex);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800863
864 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
865
866 return 0;
867}
868
869static int i915_cur_delayinfo(struct seq_file *m, void *unused)
870{
871 struct drm_info_node *node = (struct drm_info_node *) m->private;
872 struct drm_device *dev = node->minor->dev;
873 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100874 int ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800875
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800876 if (IS_GEN5(dev)) {
877 u16 rgvswctl = I915_READ16(MEMSWCTL);
878 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
879
880 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
881 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
882 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
883 MEMSTAT_VID_SHIFT);
884 seq_printf(m, "Current P-state: %d\n",
885 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
Jesse Barnes1c70c0c2011-06-29 13:34:36 -0700886 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800887 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
888 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
889 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800890 u32 rpstat;
891 u32 rpupei, rpcurup, rpprevup;
892 u32 rpdownei, rpcurdown, rpprevdown;
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800893 int max_freq;
894
895 /* RPSTAT1 is in the GT power well */
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100896 ret = mutex_lock_interruptible(&dev->struct_mutex);
897 if (ret)
898 return ret;
899
Ben Widawskyfcca7922011-04-25 11:23:07 -0700900 gen6_gt_force_wake_get(dev_priv);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800901
Jesse Barnesccab5c82011-01-18 15:49:25 -0800902 rpstat = I915_READ(GEN6_RPSTAT1);
903 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
904 rpcurup = I915_READ(GEN6_RP_CUR_UP);
905 rpprevup = I915_READ(GEN6_RP_PREV_UP);
906 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
907 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
908 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
909
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100910 gen6_gt_force_wake_put(dev_priv);
911 mutex_unlock(&dev->struct_mutex);
912
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800913 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800914 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800915 seq_printf(m, "Render p-state ratio: %d\n",
916 (gt_perf_status & 0xff00) >> 8);
917 seq_printf(m, "Render p-state VID: %d\n",
918 gt_perf_status & 0xff);
919 seq_printf(m, "Render p-state limit: %d\n",
920 rp_state_limits & 0xff);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800921 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
Jesse Barnese281fca2011-03-18 10:32:07 -0700922 GEN6_CAGF_SHIFT) * 50);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800923 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
924 GEN6_CURICONT_MASK);
925 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
926 GEN6_CURBSYTAVG_MASK);
927 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
928 GEN6_CURBSYTAVG_MASK);
929 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
930 GEN6_CURIAVG_MASK);
931 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
932 GEN6_CURBSYTAVG_MASK);
933 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
934 GEN6_CURBSYTAVG_MASK);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800935
936 max_freq = (rp_state_cap & 0xff0000) >> 16;
937 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
Jesse Barnese281fca2011-03-18 10:32:07 -0700938 max_freq * 50);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800939
940 max_freq = (rp_state_cap & 0xff00) >> 8;
941 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
Jesse Barnese281fca2011-03-18 10:32:07 -0700942 max_freq * 50);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800943
944 max_freq = rp_state_cap & 0xff;
945 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
Jesse Barnese281fca2011-03-18 10:32:07 -0700946 max_freq * 50);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800947 } else {
948 seq_printf(m, "no P-state info available\n");
949 }
Jesse Barnesf97108d2010-01-29 11:27:07 -0800950
951 return 0;
952}
953
954static int i915_delayfreq_table(struct seq_file *m, void *unused)
955{
956 struct drm_info_node *node = (struct drm_info_node *) m->private;
957 struct drm_device *dev = node->minor->dev;
958 drm_i915_private_t *dev_priv = dev->dev_private;
959 u32 delayfreq;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700960 int ret, i;
961
962 ret = mutex_lock_interruptible(&dev->struct_mutex);
963 if (ret)
964 return ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800965
966 for (i = 0; i < 16; i++) {
967 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700968 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
969 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800970 }
971
Ben Widawsky616fdb52011-10-05 11:44:54 -0700972 mutex_unlock(&dev->struct_mutex);
973
Jesse Barnesf97108d2010-01-29 11:27:07 -0800974 return 0;
975}
976
977static inline int MAP_TO_MV(int map)
978{
979 return 1250 - (map * 25);
980}
981
982static int i915_inttoext_table(struct seq_file *m, void *unused)
983{
984 struct drm_info_node *node = (struct drm_info_node *) m->private;
985 struct drm_device *dev = node->minor->dev;
986 drm_i915_private_t *dev_priv = dev->dev_private;
987 u32 inttoext;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700988 int ret, i;
989
990 ret = mutex_lock_interruptible(&dev->struct_mutex);
991 if (ret)
992 return ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800993
994 for (i = 1; i <= 32; i++) {
995 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
996 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
997 }
998
Ben Widawsky616fdb52011-10-05 11:44:54 -0700999 mutex_unlock(&dev->struct_mutex);
1000
Jesse Barnesf97108d2010-01-29 11:27:07 -08001001 return 0;
1002}
1003
1004static int i915_drpc_info(struct seq_file *m, void *unused)
1005{
1006 struct drm_info_node *node = (struct drm_info_node *) m->private;
1007 struct drm_device *dev = node->minor->dev;
1008 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -07001009 u32 rgvmodectl, rstdbyctl;
1010 u16 crstandvid;
1011 int ret;
1012
1013 ret = mutex_lock_interruptible(&dev->struct_mutex);
1014 if (ret)
1015 return ret;
1016
1017 rgvmodectl = I915_READ(MEMMODECTL);
1018 rstdbyctl = I915_READ(RSTDBYCTL);
1019 crstandvid = I915_READ16(CRSTANDVID);
1020
1021 mutex_unlock(&dev->struct_mutex);
Jesse Barnesf97108d2010-01-29 11:27:07 -08001022
1023 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1024 "yes" : "no");
1025 seq_printf(m, "Boost freq: %d\n",
1026 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1027 MEMMODE_BOOST_FREQ_SHIFT);
1028 seq_printf(m, "HW control enabled: %s\n",
1029 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1030 seq_printf(m, "SW control enabled: %s\n",
1031 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1032 seq_printf(m, "Gated voltage change: %s\n",
1033 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1034 seq_printf(m, "Starting frequency: P%d\n",
1035 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001036 seq_printf(m, "Max P-state: P%d\n",
Jesse Barnesf97108d2010-01-29 11:27:07 -08001037 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001038 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1039 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1040 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1041 seq_printf(m, "Render standby enabled: %s\n",
1042 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
Jesse Barnes88271da2011-01-05 12:01:24 -08001043 seq_printf(m, "Current RS state: ");
1044 switch (rstdbyctl & RSX_STATUS_MASK) {
1045 case RSX_STATUS_ON:
1046 seq_printf(m, "on\n");
1047 break;
1048 case RSX_STATUS_RC1:
1049 seq_printf(m, "RC1\n");
1050 break;
1051 case RSX_STATUS_RC1E:
1052 seq_printf(m, "RC1E\n");
1053 break;
1054 case RSX_STATUS_RS1:
1055 seq_printf(m, "RS1\n");
1056 break;
1057 case RSX_STATUS_RS2:
1058 seq_printf(m, "RS2 (RC6)\n");
1059 break;
1060 case RSX_STATUS_RS3:
1061 seq_printf(m, "RC3 (RC6+)\n");
1062 break;
1063 default:
1064 seq_printf(m, "unknown\n");
1065 break;
1066 }
Jesse Barnesf97108d2010-01-29 11:27:07 -08001067
1068 return 0;
1069}
1070
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001071static int i915_fbc_status(struct seq_file *m, void *unused)
1072{
1073 struct drm_info_node *node = (struct drm_info_node *) m->private;
1074 struct drm_device *dev = node->minor->dev;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001075 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001076
Adam Jacksonee5382a2010-04-23 11:17:39 -04001077 if (!I915_HAS_FBC(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001078 seq_printf(m, "FBC unsupported on this chipset\n");
1079 return 0;
1080 }
1081
Adam Jacksonee5382a2010-04-23 11:17:39 -04001082 if (intel_fbc_enabled(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001083 seq_printf(m, "FBC enabled\n");
1084 } else {
1085 seq_printf(m, "FBC disabled: ");
1086 switch (dev_priv->no_fbc_reason) {
Chris Wilsonbed4a672010-09-11 10:47:47 +01001087 case FBC_NO_OUTPUT:
1088 seq_printf(m, "no outputs");
1089 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001090 case FBC_STOLEN_TOO_SMALL:
1091 seq_printf(m, "not enough stolen memory");
1092 break;
1093 case FBC_UNSUPPORTED_MODE:
1094 seq_printf(m, "mode not supported");
1095 break;
1096 case FBC_MODE_TOO_LARGE:
1097 seq_printf(m, "mode too large");
1098 break;
1099 case FBC_BAD_PLANE:
1100 seq_printf(m, "FBC unsupported on plane");
1101 break;
1102 case FBC_NOT_TILED:
1103 seq_printf(m, "scanout buffer not tiled");
1104 break;
Jesse Barnes9c928d12010-07-23 15:20:00 -07001105 case FBC_MULTIPLE_PIPES:
1106 seq_printf(m, "multiple pipes are enabled");
1107 break;
Jesse Barnesc1a9f042011-05-05 15:24:21 -07001108 case FBC_MODULE_PARAM:
1109 seq_printf(m, "disabled per module param (default off)");
1110 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001111 default:
1112 seq_printf(m, "unknown reason");
1113 }
1114 seq_printf(m, "\n");
1115 }
1116 return 0;
1117}
1118
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001119static int i915_sr_status(struct seq_file *m, void *unused)
1120{
1121 struct drm_info_node *node = (struct drm_info_node *) m->private;
1122 struct drm_device *dev = node->minor->dev;
1123 drm_i915_private_t *dev_priv = dev->dev_private;
1124 bool sr_enabled = false;
1125
Yuanhan Liu13982612010-12-15 15:42:31 +08001126 if (HAS_PCH_SPLIT(dev))
Chris Wilson5ba2aaa2010-08-19 18:04:08 +01001127 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001128 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001129 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1130 else if (IS_I915GM(dev))
1131 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1132 else if (IS_PINEVIEW(dev))
1133 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1134
Chris Wilson5ba2aaa2010-08-19 18:04:08 +01001135 seq_printf(m, "self-refresh: %s\n",
1136 sr_enabled ? "enabled" : "disabled");
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001137
1138 return 0;
1139}
1140
Jesse Barnes7648fa92010-05-20 14:28:11 -07001141static int i915_emon_status(struct seq_file *m, void *unused)
1142{
1143 struct drm_info_node *node = (struct drm_info_node *) m->private;
1144 struct drm_device *dev = node->minor->dev;
1145 drm_i915_private_t *dev_priv = dev->dev_private;
1146 unsigned long temp, chipset, gfx;
Chris Wilsonde227ef2010-07-03 07:58:38 +01001147 int ret;
1148
1149 ret = mutex_lock_interruptible(&dev->struct_mutex);
1150 if (ret)
1151 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -07001152
1153 temp = i915_mch_val(dev_priv);
1154 chipset = i915_chipset_val(dev_priv);
1155 gfx = i915_gfx_val(dev_priv);
Chris Wilsonde227ef2010-07-03 07:58:38 +01001156 mutex_unlock(&dev->struct_mutex);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001157
1158 seq_printf(m, "GMCH temp: %ld\n", temp);
1159 seq_printf(m, "Chipset power: %ld\n", chipset);
1160 seq_printf(m, "GFX power: %ld\n", gfx);
1161 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1162
1163 return 0;
1164}
1165
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001166static int i915_ring_freq_table(struct seq_file *m, void *unused)
1167{
1168 struct drm_info_node *node = (struct drm_info_node *) m->private;
1169 struct drm_device *dev = node->minor->dev;
1170 drm_i915_private_t *dev_priv = dev->dev_private;
1171 int ret;
1172 int gpu_freq, ia_freq;
1173
Jesse Barnes1c70c0c2011-06-29 13:34:36 -07001174 if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001175 seq_printf(m, "unsupported on this chipset\n");
1176 return 0;
1177 }
1178
1179 ret = mutex_lock_interruptible(&dev->struct_mutex);
1180 if (ret)
1181 return ret;
1182
1183 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1184
1185 for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay;
1186 gpu_freq++) {
1187 I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
1188 I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
1189 GEN6_PCODE_READ_MIN_FREQ_TABLE);
1190 if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
1191 GEN6_PCODE_READY) == 0, 10)) {
1192 DRM_ERROR("pcode read of freq table timed out\n");
1193 continue;
1194 }
1195 ia_freq = I915_READ(GEN6_PCODE_DATA);
1196 seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
1197 }
1198
1199 mutex_unlock(&dev->struct_mutex);
1200
1201 return 0;
1202}
1203
Jesse Barnes7648fa92010-05-20 14:28:11 -07001204static int i915_gfxec(struct seq_file *m, void *unused)
1205{
1206 struct drm_info_node *node = (struct drm_info_node *) m->private;
1207 struct drm_device *dev = node->minor->dev;
1208 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -07001209 int ret;
1210
1211 ret = mutex_lock_interruptible(&dev->struct_mutex);
1212 if (ret)
1213 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -07001214
1215 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1216
Ben Widawsky616fdb52011-10-05 11:44:54 -07001217 mutex_unlock(&dev->struct_mutex);
1218
Jesse Barnes7648fa92010-05-20 14:28:11 -07001219 return 0;
1220}
1221
Chris Wilson44834a62010-08-19 16:09:23 +01001222static int i915_opregion(struct seq_file *m, void *unused)
1223{
1224 struct drm_info_node *node = (struct drm_info_node *) m->private;
1225 struct drm_device *dev = node->minor->dev;
1226 drm_i915_private_t *dev_priv = dev->dev_private;
1227 struct intel_opregion *opregion = &dev_priv->opregion;
1228 int ret;
1229
1230 ret = mutex_lock_interruptible(&dev->struct_mutex);
1231 if (ret)
1232 return ret;
1233
1234 if (opregion->header)
1235 seq_write(m, opregion->header, OPREGION_SIZE);
1236
1237 mutex_unlock(&dev->struct_mutex);
1238
1239 return 0;
1240}
1241
Chris Wilson37811fc2010-08-25 22:45:57 +01001242static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1243{
1244 struct drm_info_node *node = (struct drm_info_node *) m->private;
1245 struct drm_device *dev = node->minor->dev;
1246 drm_i915_private_t *dev_priv = dev->dev_private;
1247 struct intel_fbdev *ifbdev;
1248 struct intel_framebuffer *fb;
1249 int ret;
1250
1251 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1252 if (ret)
1253 return ret;
1254
1255 ifbdev = dev_priv->fbdev;
1256 fb = to_intel_framebuffer(ifbdev->helper.fb);
1257
1258 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1259 fb->base.width,
1260 fb->base.height,
1261 fb->base.depth,
1262 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +00001263 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +01001264 seq_printf(m, "\n");
1265
1266 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1267 if (&fb->base == ifbdev->helper.fb)
1268 continue;
1269
1270 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1271 fb->base.width,
1272 fb->base.height,
1273 fb->base.depth,
1274 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +00001275 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +01001276 seq_printf(m, "\n");
1277 }
1278
1279 mutex_unlock(&dev->mode_config.mutex);
1280
1281 return 0;
1282}
1283
Ben Widawskye76d3632011-03-19 18:14:29 -07001284static int i915_context_status(struct seq_file *m, void *unused)
1285{
1286 struct drm_info_node *node = (struct drm_info_node *) m->private;
1287 struct drm_device *dev = node->minor->dev;
1288 drm_i915_private_t *dev_priv = dev->dev_private;
1289 int ret;
1290
1291 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1292 if (ret)
1293 return ret;
1294
Ben Widawskydc501fb2011-06-29 11:41:51 -07001295 if (dev_priv->pwrctx) {
1296 seq_printf(m, "power context ");
1297 describe_obj(m, dev_priv->pwrctx);
1298 seq_printf(m, "\n");
1299 }
Ben Widawskye76d3632011-03-19 18:14:29 -07001300
Ben Widawskydc501fb2011-06-29 11:41:51 -07001301 if (dev_priv->renderctx) {
1302 seq_printf(m, "render context ");
1303 describe_obj(m, dev_priv->renderctx);
1304 seq_printf(m, "\n");
1305 }
Ben Widawskye76d3632011-03-19 18:14:29 -07001306
1307 mutex_unlock(&dev->mode_config.mutex);
1308
1309 return 0;
1310}
1311
Ben Widawsky6d794d42011-04-25 11:25:56 -07001312static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1313{
1314 struct drm_info_node *node = (struct drm_info_node *) m->private;
1315 struct drm_device *dev = node->minor->dev;
1316 struct drm_i915_private *dev_priv = dev->dev_private;
1317
1318 seq_printf(m, "forcewake count = %d\n",
1319 atomic_read(&dev_priv->forcewake_count));
1320
1321 return 0;
1322}
1323
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001324static int
1325i915_wedged_open(struct inode *inode,
1326 struct file *filp)
1327{
1328 filp->private_data = inode->i_private;
1329 return 0;
1330}
1331
1332static ssize_t
1333i915_wedged_read(struct file *filp,
1334 char __user *ubuf,
1335 size_t max,
1336 loff_t *ppos)
1337{
1338 struct drm_device *dev = filp->private_data;
1339 drm_i915_private_t *dev_priv = dev->dev_private;
1340 char buf[80];
1341 int len;
1342
Akshay Joshi0206e352011-08-16 15:34:10 -04001343 len = snprintf(buf, sizeof(buf),
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001344 "wedged : %d\n",
1345 atomic_read(&dev_priv->mm.wedged));
1346
Akshay Joshi0206e352011-08-16 15:34:10 -04001347 if (len > sizeof(buf))
1348 len = sizeof(buf);
Dan Carpenterf4433a82010-09-08 21:44:47 +02001349
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001350 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1351}
1352
1353static ssize_t
1354i915_wedged_write(struct file *filp,
1355 const char __user *ubuf,
1356 size_t cnt,
1357 loff_t *ppos)
1358{
1359 struct drm_device *dev = filp->private_data;
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001360 char buf[20];
1361 int val = 1;
1362
1363 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001364 if (cnt > sizeof(buf) - 1)
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001365 return -EINVAL;
1366
1367 if (copy_from_user(buf, ubuf, cnt))
1368 return -EFAULT;
1369 buf[cnt] = 0;
1370
1371 val = simple_strtoul(buf, NULL, 0);
1372 }
1373
1374 DRM_INFO("Manually setting wedged to %d\n", val);
Chris Wilson527f9e92010-11-11 01:16:58 +00001375 i915_handle_error(dev, val);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001376
1377 return cnt;
1378}
1379
1380static const struct file_operations i915_wedged_fops = {
1381 .owner = THIS_MODULE,
1382 .open = i915_wedged_open,
1383 .read = i915_wedged_read,
1384 .write = i915_wedged_write,
Arnd Bergmann6038f372010-08-15 18:52:59 +02001385 .llseek = default_llseek,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001386};
1387
Jesse Barnes358733e2011-07-27 11:53:01 -07001388static int
1389i915_max_freq_open(struct inode *inode,
1390 struct file *filp)
1391{
1392 filp->private_data = inode->i_private;
1393 return 0;
1394}
1395
1396static ssize_t
1397i915_max_freq_read(struct file *filp,
1398 char __user *ubuf,
1399 size_t max,
1400 loff_t *ppos)
1401{
1402 struct drm_device *dev = filp->private_data;
1403 drm_i915_private_t *dev_priv = dev->dev_private;
1404 char buf[80];
1405 int len;
1406
Akshay Joshi0206e352011-08-16 15:34:10 -04001407 len = snprintf(buf, sizeof(buf),
Jesse Barnes358733e2011-07-27 11:53:01 -07001408 "max freq: %d\n", dev_priv->max_delay * 50);
1409
Akshay Joshi0206e352011-08-16 15:34:10 -04001410 if (len > sizeof(buf))
1411 len = sizeof(buf);
Jesse Barnes358733e2011-07-27 11:53:01 -07001412
1413 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1414}
1415
1416static ssize_t
1417i915_max_freq_write(struct file *filp,
1418 const char __user *ubuf,
1419 size_t cnt,
1420 loff_t *ppos)
1421{
1422 struct drm_device *dev = filp->private_data;
1423 struct drm_i915_private *dev_priv = dev->dev_private;
1424 char buf[20];
1425 int val = 1;
1426
1427 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001428 if (cnt > sizeof(buf) - 1)
Jesse Barnes358733e2011-07-27 11:53:01 -07001429 return -EINVAL;
1430
1431 if (copy_from_user(buf, ubuf, cnt))
1432 return -EFAULT;
1433 buf[cnt] = 0;
1434
1435 val = simple_strtoul(buf, NULL, 0);
1436 }
1437
1438 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1439
1440 /*
1441 * Turbo will still be enabled, but won't go above the set value.
1442 */
1443 dev_priv->max_delay = val / 50;
1444
1445 gen6_set_rps(dev, val / 50);
1446
1447 return cnt;
1448}
1449
1450static const struct file_operations i915_max_freq_fops = {
1451 .owner = THIS_MODULE,
1452 .open = i915_max_freq_open,
1453 .read = i915_max_freq_read,
1454 .write = i915_max_freq_write,
1455 .llseek = default_llseek,
1456};
1457
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001458static int
1459i915_cache_sharing_open(struct inode *inode,
1460 struct file *filp)
1461{
1462 filp->private_data = inode->i_private;
1463 return 0;
1464}
1465
1466static ssize_t
1467i915_cache_sharing_read(struct file *filp,
1468 char __user *ubuf,
1469 size_t max,
1470 loff_t *ppos)
1471{
1472 struct drm_device *dev = filp->private_data;
1473 drm_i915_private_t *dev_priv = dev->dev_private;
1474 char buf[80];
1475 u32 snpcr;
1476 int len;
1477
1478 mutex_lock(&dev_priv->dev->struct_mutex);
1479 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1480 mutex_unlock(&dev_priv->dev->struct_mutex);
1481
Akshay Joshi0206e352011-08-16 15:34:10 -04001482 len = snprintf(buf, sizeof(buf),
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001483 "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1484 GEN6_MBC_SNPCR_SHIFT);
1485
Akshay Joshi0206e352011-08-16 15:34:10 -04001486 if (len > sizeof(buf))
1487 len = sizeof(buf);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001488
1489 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1490}
1491
1492static ssize_t
1493i915_cache_sharing_write(struct file *filp,
1494 const char __user *ubuf,
1495 size_t cnt,
1496 loff_t *ppos)
1497{
1498 struct drm_device *dev = filp->private_data;
1499 struct drm_i915_private *dev_priv = dev->dev_private;
1500 char buf[20];
1501 u32 snpcr;
1502 int val = 1;
1503
1504 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001505 if (cnt > sizeof(buf) - 1)
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001506 return -EINVAL;
1507
1508 if (copy_from_user(buf, ubuf, cnt))
1509 return -EFAULT;
1510 buf[cnt] = 0;
1511
1512 val = simple_strtoul(buf, NULL, 0);
1513 }
1514
1515 if (val < 0 || val > 3)
1516 return -EINVAL;
1517
1518 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1519
1520 /* Update the cache sharing policy here as well */
1521 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1522 snpcr &= ~GEN6_MBC_SNPCR_MASK;
1523 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1524 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1525
1526 return cnt;
1527}
1528
1529static const struct file_operations i915_cache_sharing_fops = {
1530 .owner = THIS_MODULE,
1531 .open = i915_cache_sharing_open,
1532 .read = i915_cache_sharing_read,
1533 .write = i915_cache_sharing_write,
1534 .llseek = default_llseek,
1535};
1536
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001537/* As the drm_debugfs_init() routines are called before dev->dev_private is
1538 * allocated we need to hook into the minor for release. */
1539static int
1540drm_add_fake_info_node(struct drm_minor *minor,
1541 struct dentry *ent,
1542 const void *key)
1543{
1544 struct drm_info_node *node;
1545
1546 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1547 if (node == NULL) {
1548 debugfs_remove(ent);
1549 return -ENOMEM;
1550 }
1551
1552 node->minor = minor;
1553 node->dent = ent;
1554 node->info_ent = (void *) key;
Marcin Slusarzb3e067c2011-11-09 22:20:35 +01001555
1556 mutex_lock(&minor->debugfs_lock);
1557 list_add(&node->list, &minor->debugfs_list);
1558 mutex_unlock(&minor->debugfs_lock);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001559
1560 return 0;
1561}
1562
1563static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
1564{
1565 struct drm_device *dev = minor->dev;
1566 struct dentry *ent;
1567
1568 ent = debugfs_create_file("i915_wedged",
1569 S_IRUGO | S_IWUSR,
1570 root, dev,
1571 &i915_wedged_fops);
1572 if (IS_ERR(ent))
1573 return PTR_ERR(ent);
1574
1575 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
1576}
Ben Gamari9e3a6d12009-07-01 22:26:53 -04001577
Ben Widawsky6d794d42011-04-25 11:25:56 -07001578static int i915_forcewake_open(struct inode *inode, struct file *file)
1579{
1580 struct drm_device *dev = inode->i_private;
1581 struct drm_i915_private *dev_priv = dev->dev_private;
1582 int ret;
1583
1584 if (!IS_GEN6(dev))
1585 return 0;
1586
1587 ret = mutex_lock_interruptible(&dev->struct_mutex);
1588 if (ret)
1589 return ret;
1590 gen6_gt_force_wake_get(dev_priv);
1591 mutex_unlock(&dev->struct_mutex);
1592
1593 return 0;
1594}
1595
1596int i915_forcewake_release(struct inode *inode, struct file *file)
1597{
1598 struct drm_device *dev = inode->i_private;
1599 struct drm_i915_private *dev_priv = dev->dev_private;
1600
1601 if (!IS_GEN6(dev))
1602 return 0;
1603
1604 /*
1605 * It's bad that we can potentially hang userspace if struct_mutex gets
1606 * forever stuck. However, if we cannot acquire this lock it means that
1607 * almost certainly the driver has hung, is not unload-able. Therefore
1608 * hanging here is probably a minor inconvenience not to be seen my
1609 * almost every user.
1610 */
1611 mutex_lock(&dev->struct_mutex);
1612 gen6_gt_force_wake_put(dev_priv);
1613 mutex_unlock(&dev->struct_mutex);
1614
1615 return 0;
1616}
1617
1618static const struct file_operations i915_forcewake_fops = {
1619 .owner = THIS_MODULE,
1620 .open = i915_forcewake_open,
1621 .release = i915_forcewake_release,
1622};
1623
1624static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
1625{
1626 struct drm_device *dev = minor->dev;
1627 struct dentry *ent;
1628
1629 ent = debugfs_create_file("i915_forcewake_user",
Ben Widawsky8eb57292011-05-11 15:10:58 -07001630 S_IRUSR,
Ben Widawsky6d794d42011-04-25 11:25:56 -07001631 root, dev,
1632 &i915_forcewake_fops);
1633 if (IS_ERR(ent))
1634 return PTR_ERR(ent);
1635
Ben Widawsky8eb57292011-05-11 15:10:58 -07001636 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001637}
1638
Jesse Barnes358733e2011-07-27 11:53:01 -07001639static int i915_max_freq_create(struct dentry *root, struct drm_minor *minor)
1640{
1641 struct drm_device *dev = minor->dev;
1642 struct dentry *ent;
1643
1644 ent = debugfs_create_file("i915_max_freq",
1645 S_IRUGO | S_IWUSR,
1646 root, dev,
1647 &i915_max_freq_fops);
1648 if (IS_ERR(ent))
1649 return PTR_ERR(ent);
1650
1651 return drm_add_fake_info_node(minor, ent, &i915_max_freq_fops);
1652}
1653
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001654static int i915_cache_sharing_create(struct dentry *root, struct drm_minor *minor)
1655{
1656 struct drm_device *dev = minor->dev;
1657 struct dentry *ent;
1658
1659 ent = debugfs_create_file("i915_cache_sharing",
1660 S_IRUGO | S_IWUSR,
1661 root, dev,
1662 &i915_cache_sharing_fops);
1663 if (IS_ERR(ent))
1664 return PTR_ERR(ent);
1665
1666 return drm_add_fake_info_node(minor, ent, &i915_cache_sharing_fops);
1667}
1668
Ben Gamari27c202a2009-07-01 22:26:52 -04001669static struct drm_info_list i915_debugfs_list[] = {
Chris Wilson311bd682011-01-13 19:06:50 +00001670 {"i915_capabilities", i915_capabilities, 0},
Chris Wilson73aa8082010-09-30 11:46:12 +01001671 {"i915_gem_objects", i915_gem_object_info, 0},
Chris Wilson08c18322011-01-10 00:00:24 +00001672 {"i915_gem_gtt", i915_gem_gtt_info, 0},
Ben Gamari433e12f2009-02-17 20:08:51 -05001673 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
1674 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
1675 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
Chris Wilsonf13d3f72010-09-20 17:36:15 +01001676 {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
Chris Wilsond21d5972010-09-26 11:19:33 +01001677 {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
Simon Farnsworth4e5359c2010-09-01 17:47:52 +01001678 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001679 {"i915_gem_request", i915_gem_request_info, 0},
1680 {"i915_gem_seqno", i915_gem_seqno_info, 0},
Chris Wilsona6172a82009-02-11 14:26:38 +00001681 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001682 {"i915_gem_interrupt", i915_interrupt_info, 0},
Chris Wilson1ec14ad2010-12-04 11:30:53 +00001683 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
1684 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
1685 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
1686 {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RCS},
1687 {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RCS},
1688 {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)VCS},
1689 {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)VCS},
1690 {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BCS},
1691 {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BCS},
Ben Gamari6911a9b2009-04-02 11:24:54 -07001692 {"i915_batchbuffers", i915_batchbuffer_info, 0},
Jesse Barnes63eeaf32009-06-18 16:56:52 -07001693 {"i915_error_state", i915_error_state, 0},
Jesse Barnesf97108d2010-01-29 11:27:07 -08001694 {"i915_rstdby_delays", i915_rstdby_delays, 0},
1695 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
1696 {"i915_delayfreq_table", i915_delayfreq_table, 0},
1697 {"i915_inttoext_table", i915_inttoext_table, 0},
1698 {"i915_drpc_info", i915_drpc_info, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07001699 {"i915_emon_status", i915_emon_status, 0},
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001700 {"i915_ring_freq_table", i915_ring_freq_table, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07001701 {"i915_gfxec", i915_gfxec, 0},
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001702 {"i915_fbc_status", i915_fbc_status, 0},
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001703 {"i915_sr_status", i915_sr_status, 0},
Chris Wilson44834a62010-08-19 16:09:23 +01001704 {"i915_opregion", i915_opregion, 0},
Chris Wilson37811fc2010-08-25 22:45:57 +01001705 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
Ben Widawskye76d3632011-03-19 18:14:29 -07001706 {"i915_context_status", i915_context_status, 0},
Ben Widawsky6d794d42011-04-25 11:25:56 -07001707 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001708};
Ben Gamari27c202a2009-07-01 22:26:52 -04001709#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
Ben Gamari20172632009-02-17 20:08:50 -05001710
Ben Gamari27c202a2009-07-01 22:26:52 -04001711int i915_debugfs_init(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05001712{
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001713 int ret;
1714
1715 ret = i915_wedged_create(minor->debugfs_root, minor);
1716 if (ret)
1717 return ret;
1718
Ben Widawsky6d794d42011-04-25 11:25:56 -07001719 ret = i915_forcewake_create(minor->debugfs_root, minor);
1720 if (ret)
1721 return ret;
Jesse Barnes358733e2011-07-27 11:53:01 -07001722 ret = i915_max_freq_create(minor->debugfs_root, minor);
1723 if (ret)
1724 return ret;
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001725 ret = i915_cache_sharing_create(minor->debugfs_root, minor);
1726 if (ret)
1727 return ret;
Ben Widawsky6d794d42011-04-25 11:25:56 -07001728
Ben Gamari27c202a2009-07-01 22:26:52 -04001729 return drm_debugfs_create_files(i915_debugfs_list,
1730 I915_DEBUGFS_ENTRIES,
Ben Gamari20172632009-02-17 20:08:50 -05001731 minor->debugfs_root, minor);
1732}
1733
Ben Gamari27c202a2009-07-01 22:26:52 -04001734void i915_debugfs_cleanup(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05001735{
Ben Gamari27c202a2009-07-01 22:26:52 -04001736 drm_debugfs_remove_files(i915_debugfs_list,
1737 I915_DEBUGFS_ENTRIES, minor);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001738 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
1739 1, minor);
Kristian Høgsberg33db6792009-11-11 12:19:16 -05001740 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1741 1, minor);
Jesse Barnes358733e2011-07-27 11:53:01 -07001742 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
1743 1, minor);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001744 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
1745 1, minor);
Ben Gamari20172632009-02-17 20:08:50 -05001746}
1747
1748#endif /* CONFIG_DEBUG_FS */