Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 1 | /* |
| 2 | * omap-mcbsp.c -- OMAP ALSA SoC DAI driver using McBSP port |
| 3 | * |
| 4 | * Copyright (C) 2008 Nokia Corporation |
| 5 | * |
Jarkko Nikula | 7ec41ee | 2011-08-11 15:44:57 +0300 | [diff] [blame] | 6 | * Contact: Jarkko Nikula <jarkko.nikula@bitmer.com> |
Peter Ujfalusi | 56a8742 | 2011-05-03 18:14:06 +0300 | [diff] [blame] | 7 | * Peter Ujfalusi <peter.ujfalusi@ti.com> |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * version 2 as published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 16 | * General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 21 | * 02110-1301 USA |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/device.h> |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 28 | #include <linux/pm_runtime.h> |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 29 | #include <sound/core.h> |
| 30 | #include <sound/pcm.h> |
| 31 | #include <sound/pcm_params.h> |
| 32 | #include <sound/initval.h> |
| 33 | #include <sound/soc.h> |
| 34 | |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 35 | #include <plat/dma.h> |
| 36 | #include <plat/mcbsp.h> |
Peter Ujfalusi | 219f431 | 2012-02-03 13:11:47 +0200 | [diff] [blame] | 37 | #include "mcbsp.h" |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 38 | #include "omap-mcbsp.h" |
| 39 | #include "omap-pcm.h" |
| 40 | |
Jarkko Nikula | 0b60485 | 2008-11-12 17:05:51 +0200 | [diff] [blame] | 41 | #define OMAP_MCBSP_RATES (SNDRV_PCM_RATE_8000_96000) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 42 | |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 43 | #define OMAP_MCBSP_SOC_SINGLE_S16_EXT(xname, xmin, xmax, \ |
| 44 | xhandler_get, xhandler_put) \ |
| 45 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
| 46 | .info = omap_mcbsp_st_info_volsw, \ |
| 47 | .get = xhandler_get, .put = xhandler_put, \ |
| 48 | .private_value = (unsigned long) &(struct soc_mixer_control) \ |
| 49 | {.min = xmin, .max = xmax} } |
| 50 | |
Peter Ujfalusi | 219f431 | 2012-02-03 13:11:47 +0200 | [diff] [blame] | 51 | enum { |
| 52 | OMAP_MCBSP_WORD_8 = 0, |
| 53 | OMAP_MCBSP_WORD_12, |
| 54 | OMAP_MCBSP_WORD_16, |
| 55 | OMAP_MCBSP_WORD_20, |
| 56 | OMAP_MCBSP_WORD_24, |
| 57 | OMAP_MCBSP_WORD_32, |
| 58 | }; |
| 59 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 60 | /* |
| 61 | * Stream DMA parameters. DMA request line and port address are set runtime |
| 62 | * since they are different between OMAP1 and later OMAPs |
| 63 | */ |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 64 | static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream) |
| 65 | { |
| 66 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 67 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 68 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 69 | struct omap_pcm_dma_data *dma_data; |
Peter Ujfalusi | 3f02403 | 2010-06-03 07:39:35 +0300 | [diff] [blame] | 70 | int words; |
Eduardo Valentin | a0a499c | 2009-08-20 16:18:26 +0300 | [diff] [blame] | 71 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 72 | dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 73 | |
Eduardo Valentin | a0a499c | 2009-08-20 16:18:26 +0300 | [diff] [blame] | 74 | /* TODO: Currently, MODE_ELEMENT == MODE_FRAME */ |
Peter Ujfalusi | cb40b63 | 2012-02-13 16:26:54 +0200 | [diff] [blame] | 75 | if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 76 | /* |
| 77 | * Configure McBSP threshold based on either: |
| 78 | * packet_size, when the sDMA is in packet mode, or |
| 79 | * based on the period size. |
| 80 | */ |
| 81 | if (dma_data->packet_size) |
| 82 | words = dma_data->packet_size; |
| 83 | else |
| 84 | words = snd_pcm_lib_period_bytes(substream) / |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 85 | (mcbsp->wlen / 8); |
Eduardo Valentin | a0a499c | 2009-08-20 16:18:26 +0300 | [diff] [blame] | 86 | else |
Peter Ujfalusi | 3f02403 | 2010-06-03 07:39:35 +0300 | [diff] [blame] | 87 | words = 1; |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 88 | |
| 89 | /* Configure McBSP internal buffer usage */ |
| 90 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 91 | omap_mcbsp_set_tx_threshold(mcbsp, words); |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 92 | else |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 93 | omap_mcbsp_set_rx_threshold(mcbsp, words); |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 94 | } |
| 95 | |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 96 | static int omap_mcbsp_hwrule_min_buffersize(struct snd_pcm_hw_params *params, |
| 97 | struct snd_pcm_hw_rule *rule) |
| 98 | { |
| 99 | struct snd_interval *buffer_size = hw_param_interval(params, |
| 100 | SNDRV_PCM_HW_PARAM_BUFFER_SIZE); |
| 101 | struct snd_interval *channels = hw_param_interval(params, |
| 102 | SNDRV_PCM_HW_PARAM_CHANNELS); |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 103 | struct omap_mcbsp *mcbsp = rule->private; |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 104 | struct snd_interval frames; |
| 105 | int size; |
| 106 | |
| 107 | snd_interval_any(&frames); |
Peter Ujfalusi | cb40b63 | 2012-02-13 16:26:54 +0200 | [diff] [blame] | 108 | size = mcbsp->pdata->buffer_size; |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 109 | |
| 110 | frames.min = size / channels->min; |
| 111 | frames.integer = 1; |
| 112 | return snd_interval_refine(buffer_size, &frames); |
| 113 | } |
| 114 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 115 | static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 116 | struct snd_soc_dai *cpu_dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 117 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 118 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 119 | int err = 0; |
| 120 | |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 121 | if (!cpu_dai->active) |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 122 | err = omap_mcbsp_request(mcbsp); |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 123 | |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 124 | /* |
| 125 | * OMAP3 McBSP FIFO is word structured. |
| 126 | * McBSP2 has 1024 + 256 = 1280 word long buffer, |
| 127 | * McBSP1,3,4,5 has 128 word long buffer |
| 128 | * This means that the size of the FIFO depends on the sample format. |
| 129 | * For example on McBSP3: |
| 130 | * 16bit samples: size is 128 * 2 = 256 bytes |
| 131 | * 32bit samples: size is 128 * 4 = 512 bytes |
| 132 | * It is simpler to place constraint for buffer and period based on |
| 133 | * channels. |
| 134 | * McBSP3 as example again (16 or 32 bit samples): |
| 135 | * 1 channel (mono): size is 128 frames (128 words) |
| 136 | * 2 channels (stereo): size is 128 / 2 = 64 frames (2 * 64 words) |
| 137 | * 4 channels: size is 128 / 4 = 32 frames (4 * 32 words) |
| 138 | */ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 139 | if (mcbsp->pdata->buffer_size) { |
Jarkko Nikula | 6984992 | 2009-03-27 15:32:01 +0200 | [diff] [blame] | 140 | /* |
Peter Ujfalusi | 998a8a6 | 2010-07-29 09:51:28 +0300 | [diff] [blame] | 141 | * Rule for the buffer size. We should not allow |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 142 | * smaller buffer than the FIFO size to avoid underruns |
| 143 | */ |
| 144 | snd_pcm_hw_rule_add(substream->runtime, 0, |
| 145 | SNDRV_PCM_HW_PARAM_CHANNELS, |
| 146 | omap_mcbsp_hwrule_min_buffersize, |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 147 | mcbsp, |
Peter Ujfalusi | ddc29b0 | 2010-06-03 07:39:36 +0300 | [diff] [blame] | 148 | SNDRV_PCM_HW_PARAM_BUFFER_SIZE, -1); |
| 149 | |
Peter Ujfalusi | 998a8a6 | 2010-07-29 09:51:28 +0300 | [diff] [blame] | 150 | /* Make sure, that the period size is always even */ |
| 151 | snd_pcm_hw_constraint_step(substream->runtime, 0, |
| 152 | SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 2); |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 153 | } |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 154 | |
| 155 | return err; |
| 156 | } |
| 157 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 158 | static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream *substream, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 159 | struct snd_soc_dai *cpu_dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 160 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 161 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 162 | |
| 163 | if (!cpu_dai->active) { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 164 | omap_mcbsp_free(mcbsp); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 165 | mcbsp->configured = 0; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 166 | } |
| 167 | } |
| 168 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 169 | static int omap_mcbsp_dai_trigger(struct snd_pcm_substream *substream, int cmd, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 170 | struct snd_soc_dai *cpu_dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 171 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 172 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Jarkko Nikula | c12abc0 | 2009-08-07 09:59:47 +0300 | [diff] [blame] | 173 | int err = 0, play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 174 | |
| 175 | switch (cmd) { |
| 176 | case SNDRV_PCM_TRIGGER_START: |
| 177 | case SNDRV_PCM_TRIGGER_RESUME: |
| 178 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 179 | mcbsp->active++; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 180 | omap_mcbsp_start(mcbsp, play, !play); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 181 | break; |
| 182 | |
| 183 | case SNDRV_PCM_TRIGGER_STOP: |
| 184 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 185 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 186 | omap_mcbsp_stop(mcbsp, play, !play); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 187 | mcbsp->active--; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 188 | break; |
| 189 | default: |
| 190 | err = -EINVAL; |
| 191 | } |
| 192 | |
| 193 | return err; |
| 194 | } |
| 195 | |
Peter Ujfalusi | 75581d2 | 2010-03-03 15:08:09 +0200 | [diff] [blame] | 196 | static snd_pcm_sframes_t omap_mcbsp_dai_delay( |
| 197 | struct snd_pcm_substream *substream, |
| 198 | struct snd_soc_dai *dai) |
| 199 | { |
| 200 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 201 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 202 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | 75581d2 | 2010-03-03 15:08:09 +0200 | [diff] [blame] | 203 | u16 fifo_use; |
| 204 | snd_pcm_sframes_t delay; |
| 205 | |
| 206 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 207 | fifo_use = omap_mcbsp_get_tx_delay(mcbsp); |
Peter Ujfalusi | 75581d2 | 2010-03-03 15:08:09 +0200 | [diff] [blame] | 208 | else |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 209 | fifo_use = omap_mcbsp_get_rx_delay(mcbsp); |
Peter Ujfalusi | 75581d2 | 2010-03-03 15:08:09 +0200 | [diff] [blame] | 210 | |
| 211 | /* |
| 212 | * Divide the used locations with the channel count to get the |
| 213 | * FIFO usage in samples (don't care about partial samples in the |
| 214 | * buffer). |
| 215 | */ |
| 216 | delay = fifo_use / substream->runtime->channels; |
| 217 | |
| 218 | return delay; |
| 219 | } |
| 220 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 221 | static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 222 | struct snd_pcm_hw_params *params, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 223 | struct snd_soc_dai *cpu_dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 224 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 225 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 226 | struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; |
Peter Ujfalusi | 81ec027 | 2010-07-29 09:51:26 +0300 | [diff] [blame] | 227 | struct omap_pcm_dma_data *dma_data; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 228 | int dma; |
Eduardo Valentin | caebc0c | 2009-08-20 16:18:25 +0300 | [diff] [blame] | 229 | int wlen, channels, wpf, sync_mode = OMAP_DMA_SYNC_ELEMENT; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 230 | int pkt_size = 0; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 231 | unsigned long port; |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 232 | unsigned int format, div, framesize, master; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 233 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 234 | dma_data = &mcbsp->dma_data[substream->stream]; |
Kishon Vijay Abraham I | 2686e07 | 2011-02-24 15:16:56 +0530 | [diff] [blame] | 235 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 236 | dma = omap_mcbsp_dma_ch_params(mcbsp, substream->stream); |
| 237 | port = omap_mcbsp_dma_reg_params(mcbsp, substream->stream); |
Kishon Vijay Abraham I | 2686e07 | 2011-02-24 15:16:56 +0530 | [diff] [blame] | 238 | |
Sergey Lapin | d98508a | 2010-05-13 19:48:16 +0400 | [diff] [blame] | 239 | switch (params_format(params)) { |
| 240 | case SNDRV_PCM_FORMAT_S16_LE: |
Peter Ujfalusi | 81ec027 | 2010-07-29 09:51:26 +0300 | [diff] [blame] | 241 | dma_data->data_type = OMAP_DMA_DATA_TYPE_S16; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 242 | wlen = 16; |
Sergey Lapin | d98508a | 2010-05-13 19:48:16 +0400 | [diff] [blame] | 243 | break; |
| 244 | case SNDRV_PCM_FORMAT_S32_LE: |
Peter Ujfalusi | 81ec027 | 2010-07-29 09:51:26 +0300 | [diff] [blame] | 245 | dma_data->data_type = OMAP_DMA_DATA_TYPE_S32; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 246 | wlen = 32; |
Sergey Lapin | d98508a | 2010-05-13 19:48:16 +0400 | [diff] [blame] | 247 | break; |
| 248 | default: |
| 249 | return -EINVAL; |
| 250 | } |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 251 | if (mcbsp->pdata->buffer_size) { |
Peter Ujfalusi | 15d0143 | 2010-07-29 09:51:25 +0300 | [diff] [blame] | 252 | dma_data->set_threshold = omap_mcbsp_set_threshold; |
| 253 | /* TODO: Currently, MODE_ELEMENT == MODE_FRAME */ |
Peter Ujfalusi | cb40b63 | 2012-02-13 16:26:54 +0200 | [diff] [blame] | 254 | if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) { |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 255 | int period_words, max_thrsh; |
| 256 | |
| 257 | period_words = params_period_bytes(params) / (wlen / 8); |
| 258 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
Peter Ujfalusi | cb40b63 | 2012-02-13 16:26:54 +0200 | [diff] [blame] | 259 | max_thrsh = mcbsp->max_tx_thres; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 260 | else |
Peter Ujfalusi | cb40b63 | 2012-02-13 16:26:54 +0200 | [diff] [blame] | 261 | max_thrsh = mcbsp->max_rx_thres; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 262 | /* |
| 263 | * If the period contains less or equal number of words, |
| 264 | * we are using the original threshold mode setup: |
| 265 | * McBSP threshold = sDMA frame size = period_size |
| 266 | * Otherwise we switch to sDMA packet mode: |
| 267 | * McBSP threshold = sDMA packet size |
| 268 | * sDMA frame size = period size |
| 269 | */ |
| 270 | if (period_words > max_thrsh) { |
| 271 | int divider = 0; |
| 272 | |
| 273 | /* |
| 274 | * Look for the biggest threshold value, which |
| 275 | * divides the period size evenly. |
| 276 | */ |
| 277 | divider = period_words / max_thrsh; |
| 278 | if (period_words % max_thrsh) |
| 279 | divider++; |
| 280 | while (period_words % divider && |
| 281 | divider < period_words) |
| 282 | divider++; |
| 283 | if (divider == period_words) |
| 284 | return -EINVAL; |
| 285 | |
| 286 | pkt_size = period_words / divider; |
| 287 | sync_mode = OMAP_DMA_SYNC_PACKET; |
| 288 | } else { |
| 289 | sync_mode = OMAP_DMA_SYNC_FRAME; |
| 290 | } |
| 291 | } |
Peter Ujfalusi | 15d0143 | 2010-07-29 09:51:25 +0300 | [diff] [blame] | 292 | } |
| 293 | |
| 294 | dma_data->name = substream->stream ? "Audio Capture" : "Audio Playback"; |
| 295 | dma_data->dma_req = dma; |
| 296 | dma_data->port_addr = port; |
| 297 | dma_data->sync_mode = sync_mode; |
Peter Ujfalusi | cf80e15 | 2010-07-29 09:51:27 +0300 | [diff] [blame] | 298 | dma_data->packet_size = pkt_size; |
Daniel Mack | fd23b7d | 2010-03-19 14:52:55 +0000 | [diff] [blame] | 299 | |
Peter Ujfalusi | 81ec027 | 2010-07-29 09:51:26 +0300 | [diff] [blame] | 300 | snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 301 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 302 | if (mcbsp->configured) { |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 303 | /* McBSP already configured by another stream */ |
| 304 | return 0; |
| 305 | } |
| 306 | |
Jarkko Nikula | 4dd0417 | 2011-09-30 16:07:44 +0300 | [diff] [blame] | 307 | regs->rcr2 &= ~(RPHASE | RFRLEN2(0x7f) | RWDLEN2(7)); |
| 308 | regs->xcr2 &= ~(RPHASE | XFRLEN2(0x7f) | XWDLEN2(7)); |
| 309 | regs->rcr1 &= ~(RFRLEN1(0x7f) | RWDLEN1(7)); |
| 310 | regs->xcr1 &= ~(XFRLEN1(0x7f) | XWDLEN1(7)); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 311 | format = mcbsp->fmt & SND_SOC_DAIFMT_FORMAT_MASK; |
Peter Ujfalusi | c29b206 | 2009-04-15 15:38:55 +0300 | [diff] [blame] | 312 | wpf = channels = params_channels(params); |
Peter Ujfalusi | 299a151 | 2010-03-19 12:27:31 +0200 | [diff] [blame] | 313 | if (channels == 2 && (format == SND_SOC_DAIFMT_I2S || |
| 314 | format == SND_SOC_DAIFMT_LEFT_J)) { |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 315 | /* Use dual-phase frames */ |
| 316 | regs->rcr2 |= RPHASE; |
| 317 | regs->xcr2 |= XPHASE; |
| 318 | /* Set 1 word per (McBSP) frame for phase1 and phase2 */ |
| 319 | wpf--; |
| 320 | regs->rcr2 |= RFRLEN2(wpf - 1); |
| 321 | regs->xcr2 |= XFRLEN2(wpf - 1); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 322 | } |
| 323 | |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 324 | regs->rcr1 |= RFRLEN1(wpf - 1); |
| 325 | regs->xcr1 |= XFRLEN1(wpf - 1); |
| 326 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 327 | switch (params_format(params)) { |
| 328 | case SNDRV_PCM_FORMAT_S16_LE: |
| 329 | /* Set word lengths */ |
| 330 | regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_16); |
| 331 | regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_16); |
| 332 | regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_16); |
| 333 | regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_16); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 334 | break; |
Sergey Lapin | d98508a | 2010-05-13 19:48:16 +0400 | [diff] [blame] | 335 | case SNDRV_PCM_FORMAT_S32_LE: |
| 336 | /* Set word lengths */ |
Sergey Lapin | d98508a | 2010-05-13 19:48:16 +0400 | [diff] [blame] | 337 | regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_32); |
| 338 | regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_32); |
| 339 | regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_32); |
| 340 | regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_32); |
| 341 | break; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 342 | default: |
| 343 | /* Unsupported PCM format */ |
| 344 | return -EINVAL; |
| 345 | } |
| 346 | |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 347 | /* In McBSP master modes, FRAME (i.e. sample rate) is generated |
| 348 | * by _counting_ BCLKs. Calculate frame size in BCLKs */ |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 349 | master = mcbsp->fmt & SND_SOC_DAIFMT_MASTER_MASK; |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 350 | if (master == SND_SOC_DAIFMT_CBS_CFS) { |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 351 | div = mcbsp->clk_div ? mcbsp->clk_div : 1; |
| 352 | framesize = (mcbsp->in_freq / div) / params_rate(params); |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 353 | |
| 354 | if (framesize < wlen * channels) { |
| 355 | printk(KERN_ERR "%s: not enough bandwidth for desired rate and " |
| 356 | "channels\n", __func__); |
| 357 | return -EINVAL; |
| 358 | } |
| 359 | } else |
| 360 | framesize = wlen * channels; |
| 361 | |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 362 | /* Set FS period and length in terms of bit clock periods */ |
Jarkko Nikula | 4dd0417 | 2011-09-30 16:07:44 +0300 | [diff] [blame] | 363 | regs->srgr2 &= ~FPER(0xfff); |
| 364 | regs->srgr1 &= ~FWID(0xff); |
Peter Ujfalusi | c29b206 | 2009-04-15 15:38:55 +0300 | [diff] [blame] | 365 | switch (format) { |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 366 | case SND_SOC_DAIFMT_I2S: |
Peter Ujfalusi | 299a151 | 2010-03-19 12:27:31 +0200 | [diff] [blame] | 367 | case SND_SOC_DAIFMT_LEFT_J: |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 368 | regs->srgr2 |= FPER(framesize - 1); |
| 369 | regs->srgr1 |= FWID((framesize >> 1) - 1); |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 370 | break; |
Peter Ujfalusi | 3ba191c | 2009-04-15 15:38:56 +0300 | [diff] [blame] | 371 | case SND_SOC_DAIFMT_DSP_A: |
Jarkko Nikula | bd25867 | 2008-12-22 10:21:36 +0200 | [diff] [blame] | 372 | case SND_SOC_DAIFMT_DSP_B: |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 373 | regs->srgr2 |= FPER(framesize - 1); |
Jarkko Nikula | 36ce858 | 2009-04-15 13:48:16 +0300 | [diff] [blame] | 374 | regs->srgr1 |= FWID(0); |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 375 | break; |
| 376 | } |
| 377 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 378 | omap_mcbsp_config(mcbsp, &mcbsp->cfg_regs); |
| 379 | mcbsp->wlen = wlen; |
| 380 | mcbsp->configured = 1; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 381 | |
| 382 | return 0; |
| 383 | } |
| 384 | |
| 385 | /* |
| 386 | * This must be called before _set_clkdiv and _set_sysclk since McBSP register |
| 387 | * cache is initialized here |
| 388 | */ |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 389 | static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 390 | unsigned int fmt) |
| 391 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 392 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 393 | struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 394 | bool inv_fs = false; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 395 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 396 | if (mcbsp->configured) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 397 | return 0; |
| 398 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 399 | mcbsp->fmt = fmt; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 400 | memset(regs, 0, sizeof(*regs)); |
| 401 | /* Generic McBSP register settings */ |
| 402 | regs->spcr2 |= XINTM(3) | FREE; |
| 403 | regs->spcr1 |= RINTM(3); |
Eero Nurkkala | c721bbd | 2009-08-20 16:18:23 +0300 | [diff] [blame] | 404 | /* RFIG and XFIG are not defined in 34xx */ |
Jorge Eduardo Candelaria | d4686c6 | 2010-12-20 11:32:47 -0600 | [diff] [blame] | 405 | if (!cpu_is_omap34xx() && !cpu_is_omap44xx()) { |
Eero Nurkkala | c721bbd | 2009-08-20 16:18:23 +0300 | [diff] [blame] | 406 | regs->rcr2 |= RFIG; |
| 407 | regs->xcr2 |= XFIG; |
| 408 | } |
Jorge Eduardo Candelaria | d4686c6 | 2010-12-20 11:32:47 -0600 | [diff] [blame] | 409 | if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { |
Jarkko Nikula | 32080af | 2009-08-23 12:24:26 +0300 | [diff] [blame] | 410 | regs->xccr = DXENDLY(1) | XDMAEN | XDISABLE; |
| 411 | regs->rccr = RFULL_CYCLE | RDMAEN | RDISABLE; |
Misael Lopez Cruz | ef390c0 | 2009-01-29 13:29:46 +0200 | [diff] [blame] | 412 | } |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 413 | |
| 414 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 415 | case SND_SOC_DAIFMT_I2S: |
| 416 | /* 1-bit data delay */ |
| 417 | regs->rcr2 |= RDATDLY(1); |
| 418 | regs->xcr2 |= XDATDLY(1); |
| 419 | break; |
Peter Ujfalusi | 299a151 | 2010-03-19 12:27:31 +0200 | [diff] [blame] | 420 | case SND_SOC_DAIFMT_LEFT_J: |
| 421 | /* 0-bit data delay */ |
| 422 | regs->rcr2 |= RDATDLY(0); |
| 423 | regs->xcr2 |= XDATDLY(0); |
| 424 | regs->spcr1 |= RJUST(2); |
| 425 | /* Invert FS polarity configuration */ |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 426 | inv_fs = true; |
Peter Ujfalusi | 299a151 | 2010-03-19 12:27:31 +0200 | [diff] [blame] | 427 | break; |
Peter Ujfalusi | 3ba191c | 2009-04-15 15:38:56 +0300 | [diff] [blame] | 428 | case SND_SOC_DAIFMT_DSP_A: |
| 429 | /* 1-bit data delay */ |
| 430 | regs->rcr2 |= RDATDLY(1); |
| 431 | regs->xcr2 |= XDATDLY(1); |
| 432 | /* Invert FS polarity configuration */ |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 433 | inv_fs = true; |
Peter Ujfalusi | 3ba191c | 2009-04-15 15:38:56 +0300 | [diff] [blame] | 434 | break; |
Jarkko Nikula | bd25867 | 2008-12-22 10:21:36 +0200 | [diff] [blame] | 435 | case SND_SOC_DAIFMT_DSP_B: |
Arun KS | 3336c5b | 2008-10-02 15:07:06 +0530 | [diff] [blame] | 436 | /* 0-bit data delay */ |
| 437 | regs->rcr2 |= RDATDLY(0); |
| 438 | regs->xcr2 |= XDATDLY(0); |
Jarkko Nikula | 36ce858 | 2009-04-15 13:48:16 +0300 | [diff] [blame] | 439 | /* Invert FS polarity configuration */ |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 440 | inv_fs = true; |
Arun KS | 3336c5b | 2008-10-02 15:07:06 +0530 | [diff] [blame] | 441 | break; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 442 | default: |
| 443 | /* Unsupported data format */ |
| 444 | return -EINVAL; |
| 445 | } |
| 446 | |
| 447 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 448 | case SND_SOC_DAIFMT_CBS_CFS: |
| 449 | /* McBSP master. Set FS and bit clocks as outputs */ |
| 450 | regs->pcr0 |= FSXM | FSRM | |
| 451 | CLKXM | CLKRM; |
| 452 | /* Sample rate generator drives the FS */ |
| 453 | regs->srgr2 |= FSGM; |
| 454 | break; |
| 455 | case SND_SOC_DAIFMT_CBM_CFM: |
| 456 | /* McBSP slave */ |
| 457 | break; |
| 458 | default: |
| 459 | /* Unsupported master/slave configuration */ |
| 460 | return -EINVAL; |
| 461 | } |
| 462 | |
| 463 | /* Set bit clock (CLKX/CLKR) and FS polarities */ |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 464 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 465 | case SND_SOC_DAIFMT_NB_NF: |
| 466 | /* |
| 467 | * Normal BCLK + FS. |
| 468 | * FS active low. TX data driven on falling edge of bit clock |
| 469 | * and RX data sampled on rising edge of bit clock. |
| 470 | */ |
| 471 | regs->pcr0 |= FSXP | FSRP | |
| 472 | CLKXP | CLKRP; |
| 473 | break; |
| 474 | case SND_SOC_DAIFMT_NB_IF: |
| 475 | regs->pcr0 |= CLKXP | CLKRP; |
| 476 | break; |
| 477 | case SND_SOC_DAIFMT_IB_NF: |
| 478 | regs->pcr0 |= FSXP | FSRP; |
| 479 | break; |
| 480 | case SND_SOC_DAIFMT_IB_IF: |
| 481 | break; |
| 482 | default: |
| 483 | return -EINVAL; |
| 484 | } |
Jarkko Nikula | 91a18ae | 2011-09-30 10:55:32 +0300 | [diff] [blame] | 485 | if (inv_fs == true) |
| 486 | regs->pcr0 ^= FSXP | FSRP; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 487 | |
| 488 | return 0; |
| 489 | } |
| 490 | |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 491 | static int omap_mcbsp_dai_set_clkdiv(struct snd_soc_dai *cpu_dai, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 492 | int div_id, int div) |
| 493 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 494 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 495 | struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 496 | |
| 497 | if (div_id != OMAP_MCBSP_CLKGDV) |
| 498 | return -ENODEV; |
| 499 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 500 | mcbsp->clk_div = div; |
Jarkko Nikula | 4dd0417 | 2011-09-30 16:07:44 +0300 | [diff] [blame] | 501 | regs->srgr1 &= ~CLKGDV(0xff); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 502 | regs->srgr1 |= CLKGDV(div - 1); |
| 503 | |
| 504 | return 0; |
| 505 | } |
| 506 | |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 507 | static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 508 | int clk_id, unsigned int freq, |
| 509 | int dir) |
| 510 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 511 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 512 | struct omap_mcbsp_reg_cfg *regs = &mcbsp->cfg_regs; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 513 | int err = 0; |
| 514 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 515 | if (mcbsp->active) { |
| 516 | if (freq == mcbsp->in_freq) |
Jarkko Nikula | 34c8698 | 2011-09-23 11:19:13 +0300 | [diff] [blame] | 517 | return 0; |
| 518 | else |
| 519 | return -EBUSY; |
Peter Ujfalusi | 141947e | 2011-09-26 10:56:42 +0300 | [diff] [blame] | 520 | } |
Jarkko Nikula | 34c8698 | 2011-09-23 11:19:13 +0300 | [diff] [blame] | 521 | |
Paul Walmsley | cf4c87a | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 522 | /* The McBSP signal muxing functions are only available on McBSP1 */ |
| 523 | if (clk_id == OMAP_MCBSP_CLKR_SRC_CLKR || |
| 524 | clk_id == OMAP_MCBSP_CLKR_SRC_CLKX || |
| 525 | clk_id == OMAP_MCBSP_FSR_SRC_FSR || |
| 526 | clk_id == OMAP_MCBSP_FSR_SRC_FSX) |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 527 | if (cpu_class_is_omap1() || cpu_dai->id != 1) |
Paul Walmsley | cf4c87a | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 528 | return -EINVAL; |
| 529 | |
Peter Ujfalusi | 256d9c2 | 2012-02-14 15:23:15 +0200 | [diff] [blame^] | 530 | mcbsp->in_freq = freq; |
Jarkko Nikula | 4dd0417 | 2011-09-30 16:07:44 +0300 | [diff] [blame] | 531 | regs->srgr2 &= ~CLKSM; |
| 532 | regs->pcr0 &= ~SCLKME; |
Graeme Gregory | 5f63ef9 | 2009-11-09 19:02:15 +0000 | [diff] [blame] | 533 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 534 | switch (clk_id) { |
| 535 | case OMAP_MCBSP_SYSCLK_CLK: |
| 536 | regs->srgr2 |= CLKSM; |
| 537 | break; |
| 538 | case OMAP_MCBSP_SYSCLK_CLKS_FCLK: |
Paul Walmsley | d135865 | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 539 | if (cpu_class_is_omap1()) { |
| 540 | err = -EINVAL; |
| 541 | break; |
| 542 | } |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 543 | err = omap2_mcbsp_set_clks_src(mcbsp, |
Paul Walmsley | d135865 | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 544 | MCBSP_CLKS_PRCM_SRC); |
| 545 | break; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 546 | case OMAP_MCBSP_SYSCLK_CLKS_EXT: |
Paul Walmsley | d135865 | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 547 | if (cpu_class_is_omap1()) { |
| 548 | err = 0; |
| 549 | break; |
| 550 | } |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 551 | err = omap2_mcbsp_set_clks_src(mcbsp, |
Paul Walmsley | d135865 | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 552 | MCBSP_CLKS_PAD_SRC); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 553 | break; |
| 554 | |
| 555 | case OMAP_MCBSP_SYSCLK_CLKX_EXT: |
| 556 | regs->srgr2 |= CLKSM; |
| 557 | case OMAP_MCBSP_SYSCLK_CLKR_EXT: |
| 558 | regs->pcr0 |= SCLKME; |
| 559 | break; |
Jarkko Nikula | d2c0bda | 2009-08-28 15:35:35 +0300 | [diff] [blame] | 560 | |
Paul Walmsley | cf4c87a | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 561 | |
Jarkko Nikula | d2c0bda | 2009-08-28 15:35:35 +0300 | [diff] [blame] | 562 | case OMAP_MCBSP_CLKR_SRC_CLKR: |
Janusz Krzysztofik | 2335385 | 2010-11-02 15:50:32 +0100 | [diff] [blame] | 563 | if (cpu_class_is_omap1()) |
| 564 | break; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 565 | omap2_mcbsp1_mux_clkr_src(mcbsp, CLKR_SRC_CLKR); |
Paul Walmsley | cf4c87a | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 566 | break; |
Jarkko Nikula | d2c0bda | 2009-08-28 15:35:35 +0300 | [diff] [blame] | 567 | case OMAP_MCBSP_CLKR_SRC_CLKX: |
Janusz Krzysztofik | 2335385 | 2010-11-02 15:50:32 +0100 | [diff] [blame] | 568 | if (cpu_class_is_omap1()) |
| 569 | break; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 570 | omap2_mcbsp1_mux_clkr_src(mcbsp, CLKR_SRC_CLKX); |
Paul Walmsley | cf4c87a | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 571 | break; |
Jarkko Nikula | d2c0bda | 2009-08-28 15:35:35 +0300 | [diff] [blame] | 572 | case OMAP_MCBSP_FSR_SRC_FSR: |
Janusz Krzysztofik | 2335385 | 2010-11-02 15:50:32 +0100 | [diff] [blame] | 573 | if (cpu_class_is_omap1()) |
| 574 | break; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 575 | omap2_mcbsp1_mux_fsr_src(mcbsp, FSR_SRC_FSR); |
Paul Walmsley | cf4c87a | 2010-10-08 11:40:19 -0600 | [diff] [blame] | 576 | break; |
Jarkko Nikula | d2c0bda | 2009-08-28 15:35:35 +0300 | [diff] [blame] | 577 | case OMAP_MCBSP_FSR_SRC_FSX: |
Janusz Krzysztofik | 2335385 | 2010-11-02 15:50:32 +0100 | [diff] [blame] | 578 | if (cpu_class_is_omap1()) |
| 579 | break; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 580 | omap2_mcbsp1_mux_fsr_src(mcbsp, FSR_SRC_FSX); |
Jarkko Nikula | d2c0bda | 2009-08-28 15:35:35 +0300 | [diff] [blame] | 581 | break; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 582 | default: |
| 583 | err = -ENODEV; |
| 584 | } |
| 585 | |
| 586 | return err; |
| 587 | } |
| 588 | |
Lars-Peter Clausen | 85e7652 | 2011-11-23 11:40:40 +0100 | [diff] [blame] | 589 | static const struct snd_soc_dai_ops mcbsp_dai_ops = { |
Eric Miao | 6335d05 | 2009-03-03 09:41:00 +0800 | [diff] [blame] | 590 | .startup = omap_mcbsp_dai_startup, |
| 591 | .shutdown = omap_mcbsp_dai_shutdown, |
| 592 | .trigger = omap_mcbsp_dai_trigger, |
Peter Ujfalusi | 75581d2 | 2010-03-03 15:08:09 +0200 | [diff] [blame] | 593 | .delay = omap_mcbsp_dai_delay, |
Eric Miao | 6335d05 | 2009-03-03 09:41:00 +0800 | [diff] [blame] | 594 | .hw_params = omap_mcbsp_dai_hw_params, |
| 595 | .set_fmt = omap_mcbsp_dai_set_dai_fmt, |
| 596 | .set_clkdiv = omap_mcbsp_dai_set_clkdiv, |
| 597 | .set_sysclk = omap_mcbsp_dai_set_dai_sysclk, |
| 598 | }; |
| 599 | |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 600 | static int omap_mcbsp_probe(struct snd_soc_dai *dai) |
| 601 | { |
| 602 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(dai); |
| 603 | |
| 604 | pm_runtime_enable(mcbsp->dev); |
| 605 | |
| 606 | return 0; |
| 607 | } |
| 608 | |
| 609 | static int omap_mcbsp_remove(struct snd_soc_dai *dai) |
| 610 | { |
| 611 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(dai); |
| 612 | |
| 613 | pm_runtime_disable(mcbsp->dev); |
| 614 | |
| 615 | return 0; |
| 616 | } |
| 617 | |
Michael Opdenacker | 6179b77 | 2011-10-10 07:07:08 +0200 | [diff] [blame] | 618 | static struct snd_soc_dai_driver omap_mcbsp_dai = { |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 619 | .probe = omap_mcbsp_probe, |
| 620 | .remove = omap_mcbsp_remove, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 621 | .playback = { |
| 622 | .channels_min = 1, |
| 623 | .channels_max = 16, |
| 624 | .rates = OMAP_MCBSP_RATES, |
| 625 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, |
| 626 | }, |
| 627 | .capture = { |
| 628 | .channels_min = 1, |
| 629 | .channels_max = 16, |
| 630 | .rates = OMAP_MCBSP_RATES, |
| 631 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, |
| 632 | }, |
| 633 | .ops = &mcbsp_dai_ops, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 634 | }; |
Jarkko Nikula | 8def464 | 2008-10-09 15:57:22 +0300 | [diff] [blame] | 635 | |
G, Manjunath Kondaiah | 3484457 | 2010-09-08 08:53:43 +0530 | [diff] [blame] | 636 | static int omap_mcbsp_st_info_volsw(struct snd_kcontrol *kcontrol, |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 637 | struct snd_ctl_elem_info *uinfo) |
| 638 | { |
| 639 | struct soc_mixer_control *mc = |
| 640 | (struct soc_mixer_control *)kcontrol->private_value; |
| 641 | int max = mc->max; |
| 642 | int min = mc->min; |
| 643 | |
| 644 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 645 | uinfo->count = 1; |
| 646 | uinfo->value.integer.min = min; |
| 647 | uinfo->value.integer.max = max; |
| 648 | return 0; |
| 649 | } |
| 650 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 651 | #define OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(channel) \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 652 | static int \ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 653 | omap_mcbsp_set_st_ch##channel##_volume(struct snd_kcontrol *kc, \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 654 | struct snd_ctl_elem_value *uc) \ |
| 655 | { \ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 656 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \ |
| 657 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 658 | struct soc_mixer_control *mc = \ |
| 659 | (struct soc_mixer_control *)kc->private_value; \ |
| 660 | int max = mc->max; \ |
| 661 | int min = mc->min; \ |
| 662 | int val = uc->value.integer.value[0]; \ |
| 663 | \ |
| 664 | if (val < min || val > max) \ |
| 665 | return -EINVAL; \ |
| 666 | \ |
| 667 | /* OMAP McBSP implementation uses index values 0..4 */ \ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 668 | return omap_st_set_chgain(mcbsp, channel, val); \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 669 | } |
| 670 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 671 | #define OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(channel) \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 672 | static int \ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 673 | omap_mcbsp_get_st_ch##channel##_volume(struct snd_kcontrol *kc, \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 674 | struct snd_ctl_elem_value *uc) \ |
| 675 | { \ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 676 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \ |
| 677 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 678 | s16 chgain; \ |
| 679 | \ |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 680 | if (omap_st_get_chgain(mcbsp, channel, &chgain)) \ |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 681 | return -EAGAIN; \ |
| 682 | \ |
| 683 | uc->value.integer.value[0] = chgain; \ |
| 684 | return 0; \ |
| 685 | } |
| 686 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 687 | OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(0) |
| 688 | OMAP_MCBSP_ST_SET_CHANNEL_VOLUME(1) |
| 689 | OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(0) |
| 690 | OMAP_MCBSP_ST_GET_CHANNEL_VOLUME(1) |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 691 | |
| 692 | static int omap_mcbsp_st_put_mode(struct snd_kcontrol *kcontrol, |
| 693 | struct snd_ctl_elem_value *ucontrol) |
| 694 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 695 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 696 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 697 | u8 value = ucontrol->value.integer.value[0]; |
| 698 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 699 | if (value == omap_st_is_enabled(mcbsp)) |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 700 | return 0; |
| 701 | |
| 702 | if (value) |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 703 | omap_st_enable(mcbsp); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 704 | else |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 705 | omap_st_disable(mcbsp); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 706 | |
| 707 | return 1; |
| 708 | } |
| 709 | |
| 710 | static int omap_mcbsp_st_get_mode(struct snd_kcontrol *kcontrol, |
| 711 | struct snd_ctl_elem_value *ucontrol) |
| 712 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 713 | struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); |
| 714 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 715 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 716 | ucontrol->value.integer.value[0] = omap_st_is_enabled(mcbsp); |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 717 | return 0; |
| 718 | } |
| 719 | |
| 720 | static const struct snd_kcontrol_new omap_mcbsp2_st_controls[] = { |
| 721 | SOC_SINGLE_EXT("McBSP2 Sidetone Switch", 1, 0, 1, 0, |
| 722 | omap_mcbsp_st_get_mode, omap_mcbsp_st_put_mode), |
| 723 | OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP2 Sidetone Channel 0 Volume", |
| 724 | -32768, 32767, |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 725 | omap_mcbsp_get_st_ch0_volume, |
| 726 | omap_mcbsp_set_st_ch0_volume), |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 727 | OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP2 Sidetone Channel 1 Volume", |
| 728 | -32768, 32767, |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 729 | omap_mcbsp_get_st_ch1_volume, |
| 730 | omap_mcbsp_set_st_ch1_volume), |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 731 | }; |
| 732 | |
| 733 | static const struct snd_kcontrol_new omap_mcbsp3_st_controls[] = { |
| 734 | SOC_SINGLE_EXT("McBSP3 Sidetone Switch", 2, 0, 1, 0, |
| 735 | omap_mcbsp_st_get_mode, omap_mcbsp_st_put_mode), |
| 736 | OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP3 Sidetone Channel 0 Volume", |
| 737 | -32768, 32767, |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 738 | omap_mcbsp_get_st_ch0_volume, |
| 739 | omap_mcbsp_set_st_ch0_volume), |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 740 | OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP3 Sidetone Channel 1 Volume", |
| 741 | -32768, 32767, |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 742 | omap_mcbsp_get_st_ch1_volume, |
| 743 | omap_mcbsp_set_st_ch1_volume), |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 744 | }; |
| 745 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 746 | int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd) |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 747 | { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 748 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 749 | struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); |
| 750 | |
| 751 | if (!mcbsp->st_data) |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 752 | return -ENODEV; |
| 753 | |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 754 | switch (cpu_dai->id) { |
| 755 | case 2: /* McBSP 2 */ |
| 756 | return snd_soc_add_dai_controls(cpu_dai, |
| 757 | omap_mcbsp2_st_controls, |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 758 | ARRAY_SIZE(omap_mcbsp2_st_controls)); |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 759 | case 3: /* McBSP 3 */ |
| 760 | return snd_soc_add_dai_controls(cpu_dai, |
| 761 | omap_mcbsp3_st_controls, |
Ilkka Koskinen | 83905c1 | 2010-02-22 12:21:12 +0000 | [diff] [blame] | 762 | ARRAY_SIZE(omap_mcbsp3_st_controls)); |
| 763 | default: |
| 764 | break; |
| 765 | } |
| 766 | |
| 767 | return -EINVAL; |
| 768 | } |
| 769 | EXPORT_SYMBOL_GPL(omap_mcbsp_st_add_controls); |
| 770 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 771 | static __devinit int asoc_mcbsp_probe(struct platform_device *pdev) |
| 772 | { |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 773 | struct omap_mcbsp_platform_data *pdata = dev_get_platdata(&pdev->dev); |
| 774 | struct omap_mcbsp *mcbsp; |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 775 | int ret; |
| 776 | |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 777 | if (!pdata) { |
| 778 | dev_err(&pdev->dev, "missing platform data.\n"); |
| 779 | return -EINVAL; |
| 780 | } |
| 781 | mcbsp = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcbsp), GFP_KERNEL); |
| 782 | if (!mcbsp) |
| 783 | return -ENOMEM; |
| 784 | |
| 785 | mcbsp->id = pdev->id; |
| 786 | mcbsp->pdata = pdata; |
| 787 | mcbsp->dev = &pdev->dev; |
| 788 | platform_set_drvdata(pdev, mcbsp); |
| 789 | |
| 790 | ret = omap_mcbsp_init(pdev); |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 791 | if (!ret) |
| 792 | return snd_soc_register_dai(&pdev->dev, &omap_mcbsp_dai); |
| 793 | |
| 794 | return ret; |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 795 | } |
| 796 | |
| 797 | static int __devexit asoc_mcbsp_remove(struct platform_device *pdev) |
| 798 | { |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 799 | struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); |
| 800 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 801 | snd_soc_unregister_dai(&pdev->dev); |
Peter Ujfalusi | 2ee6595 | 2012-02-14 14:52:42 +0200 | [diff] [blame] | 802 | |
| 803 | if (mcbsp->pdata->ops && mcbsp->pdata->ops->free) |
| 804 | mcbsp->pdata->ops->free(mcbsp->id); |
| 805 | |
| 806 | omap_mcbsp_sysfs_remove(mcbsp); |
| 807 | |
| 808 | clk_put(mcbsp->fclk); |
| 809 | |
| 810 | platform_set_drvdata(pdev, NULL); |
| 811 | |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 812 | return 0; |
| 813 | } |
| 814 | |
| 815 | static struct platform_driver asoc_mcbsp_driver = { |
| 816 | .driver = { |
Peter Ujfalusi | 45656b4 | 2012-02-14 18:20:58 +0200 | [diff] [blame] | 817 | .name = "omap-mcbsp", |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 818 | .owner = THIS_MODULE, |
| 819 | }, |
| 820 | |
| 821 | .probe = asoc_mcbsp_probe, |
| 822 | .remove = __devexit_p(asoc_mcbsp_remove), |
| 823 | }; |
| 824 | |
Axel Lin | beda5bf5 | 2011-11-25 10:12:16 +0800 | [diff] [blame] | 825 | module_platform_driver(asoc_mcbsp_driver); |
Mark Brown | 3f4b783 | 2008-12-03 19:26:35 +0000 | [diff] [blame] | 826 | |
Jarkko Nikula | 7ec41ee | 2011-08-11 15:44:57 +0300 | [diff] [blame] | 827 | MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>"); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 828 | MODULE_DESCRIPTION("OMAP I2S SoC Interface"); |
| 829 | MODULE_LICENSE("GPL"); |