H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 1 | #ifndef _ASM_X86_APIC_H |
| 2 | #define _ASM_X86_APIC_H |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 3 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 4 | #include <linux/cpumask.h> |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 5 | #include <linux/pm.h> |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 6 | |
| 7 | #include <asm/alternative.h> |
Suresh Siddha | 13c88fb5 | 2008-07-10 11:16:52 -0700 | [diff] [blame] | 8 | #include <asm/cpufeature.h> |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 9 | #include <asm/processor.h> |
| 10 | #include <asm/apicdef.h> |
Arun Sharma | 60063497 | 2011-07-26 16:09:06 -0700 | [diff] [blame] | 11 | #include <linux/atomic.h> |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 12 | #include <asm/fixmap.h> |
| 13 | #include <asm/mpspec.h> |
Suresh Siddha | 13c88fb5 | 2008-07-10 11:16:52 -0700 | [diff] [blame] | 14 | #include <asm/msr.h> |
Seiji Aguchi | eddc0e9 | 2013-06-20 11:45:17 -0400 | [diff] [blame] | 15 | #include <asm/idle.h> |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 16 | |
| 17 | #define ARCH_APICTIMER_STOPS_ON_C3 1 |
| 18 | |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 19 | /* |
| 20 | * Debugging macros |
| 21 | */ |
| 22 | #define APIC_QUIET 0 |
| 23 | #define APIC_VERBOSE 1 |
| 24 | #define APIC_DEBUG 2 |
| 25 | |
| 26 | /* |
| 27 | * Define the default level of output to be very little |
| 28 | * This can be turned up by using apic=verbose for more |
| 29 | * information and apic=debug for _lots_ of information. |
| 30 | * apic_verbosity is defined in apic.c |
| 31 | */ |
| 32 | #define apic_printk(v, s, a...) do { \ |
| 33 | if ((v) <= apic_verbosity) \ |
| 34 | printk(s, ##a); \ |
| 35 | } while (0) |
| 36 | |
| 37 | |
Ingo Molnar | 160d8da | 2009-02-11 11:27:39 +0100 | [diff] [blame] | 38 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 39 | extern void generic_apic_probe(void); |
Ingo Molnar | 160d8da | 2009-02-11 11:27:39 +0100 | [diff] [blame] | 40 | #else |
| 41 | static inline void generic_apic_probe(void) |
| 42 | { |
| 43 | } |
| 44 | #endif |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 45 | |
| 46 | #ifdef CONFIG_X86_LOCAL_APIC |
| 47 | |
Maciej W. Rozycki | baa1318 | 2008-07-14 18:44:51 +0100 | [diff] [blame] | 48 | extern unsigned int apic_verbosity; |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 49 | extern int local_apic_timer_c2_ok; |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 50 | |
Yinghai Lu | 3c999f1 | 2008-06-20 16:11:20 -0700 | [diff] [blame] | 51 | extern int disable_apic; |
Jacob Pan | 1ade93e | 2011-11-10 13:42:40 +0000 | [diff] [blame] | 52 | extern unsigned int lapic_timer_frequency; |
Ingo Molnar | 0939e4f | 2009-01-28 17:16:25 +0100 | [diff] [blame] | 53 | |
| 54 | #ifdef CONFIG_SMP |
| 55 | extern void __inquire_remote_apic(int apicid); |
| 56 | #else /* CONFIG_SMP */ |
| 57 | static inline void __inquire_remote_apic(int apicid) |
| 58 | { |
| 59 | } |
| 60 | #endif /* CONFIG_SMP */ |
| 61 | |
| 62 | static inline void default_inquire_remote_apic(int apicid) |
| 63 | { |
| 64 | if (apic_verbosity >= APIC_DEBUG) |
| 65 | __inquire_remote_apic(apicid); |
| 66 | } |
| 67 | |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 68 | /* |
Cyrill Gorcunov | 8312136 | 2009-09-15 11:12:30 +0400 | [diff] [blame] | 69 | * With 82489DX we can't rely on apic feature bit |
| 70 | * retrieved via cpuid but still have to deal with |
| 71 | * such an apic chip so we assume that SMP configuration |
| 72 | * is found from MP table (64bit case uses ACPI mostly |
| 73 | * which set smp presence flag as well so we are safe |
| 74 | * to use this helper too). |
| 75 | */ |
| 76 | static inline bool apic_from_smp_config(void) |
| 77 | { |
| 78 | return smp_found_config && !disable_apic; |
| 79 | } |
| 80 | |
| 81 | /* |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 82 | * Basic functions accessing APICs. |
| 83 | */ |
| 84 | #ifdef CONFIG_PARAVIRT |
| 85 | #include <asm/paravirt.h> |
Thomas Gleixner | 96a388d | 2007-10-11 11:20:03 +0200 | [diff] [blame] | 86 | #endif |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 87 | |
Jaswinder Singh | 2b97df0 | 2008-07-23 17:13:14 +0530 | [diff] [blame] | 88 | extern int setup_profiling_timer(unsigned int); |
Ravikiran G Thirumalai | aa7d8e25e | 2008-03-20 00:41:16 -0700 | [diff] [blame] | 89 | |
Suresh Siddha | 1b374e4 | 2008-07-10 11:16:49 -0700 | [diff] [blame] | 90 | static inline void native_apic_mem_write(u32 reg, u32 v) |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 91 | { |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 92 | volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 93 | |
Borislav Petkov | a930dc4 | 2015-01-18 17:48:18 +0100 | [diff] [blame] | 94 | alternative_io("movl %0, %P1", "xchgl %0, %P1", X86_BUG_11AP, |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 95 | ASM_OUTPUT2("=r" (v), "=m" (*addr)), |
| 96 | ASM_OUTPUT2("0" (v), "m" (*addr))); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 97 | } |
| 98 | |
Suresh Siddha | 1b374e4 | 2008-07-10 11:16:49 -0700 | [diff] [blame] | 99 | static inline u32 native_apic_mem_read(u32 reg) |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 100 | { |
| 101 | return *((volatile u32 *)(APIC_BASE + reg)); |
| 102 | } |
| 103 | |
Yinghai Lu | c1eeb2d | 2009-02-16 23:02:14 -0800 | [diff] [blame] | 104 | extern void native_apic_wait_icr_idle(void); |
| 105 | extern u32 native_safe_apic_wait_icr_idle(void); |
| 106 | extern void native_apic_icr_write(u32 low, u32 id); |
| 107 | extern u64 native_apic_icr_read(void); |
| 108 | |
Thomas Gleixner | 8d80696 | 2015-01-15 21:22:09 +0000 | [diff] [blame] | 109 | static inline bool apic_is_x2apic_enabled(void) |
| 110 | { |
| 111 | u64 msr; |
| 112 | |
| 113 | if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) |
| 114 | return false; |
| 115 | return msr & X2APIC_ENABLE; |
| 116 | } |
| 117 | |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 118 | #ifdef CONFIG_X86_X2APIC |
Suresh Siddha | ce4e240 | 2009-03-17 10:16:54 -0800 | [diff] [blame] | 119 | /* |
| 120 | * Make previous memory operations globally visible before |
| 121 | * sending the IPI through x2apic wrmsr. We need a serializing instruction or |
| 122 | * mfence for this. |
| 123 | */ |
| 124 | static inline void x2apic_wrmsr_fence(void) |
| 125 | { |
| 126 | asm volatile("mfence" : : : "memory"); |
| 127 | } |
| 128 | |
Suresh Siddha | 13c88fb5 | 2008-07-10 11:16:52 -0700 | [diff] [blame] | 129 | static inline void native_apic_msr_write(u32 reg, u32 v) |
| 130 | { |
| 131 | if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || |
| 132 | reg == APIC_LVR) |
| 133 | return; |
| 134 | |
| 135 | wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); |
| 136 | } |
| 137 | |
Michael S. Tsirkin | 0ab711a | 2012-05-16 19:03:58 +0300 | [diff] [blame] | 138 | static inline void native_apic_msr_eoi_write(u32 reg, u32 v) |
| 139 | { |
| 140 | wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0); |
| 141 | } |
| 142 | |
Suresh Siddha | 13c88fb5 | 2008-07-10 11:16:52 -0700 | [diff] [blame] | 143 | static inline u32 native_apic_msr_read(u32 reg) |
| 144 | { |
Andi Kleen | 0059b24 | 2010-11-08 22:20:29 +0100 | [diff] [blame] | 145 | u64 msr; |
Suresh Siddha | 13c88fb5 | 2008-07-10 11:16:52 -0700 | [diff] [blame] | 146 | |
| 147 | if (reg == APIC_DFR) |
| 148 | return -1; |
| 149 | |
Andi Kleen | 0059b24 | 2010-11-08 22:20:29 +0100 | [diff] [blame] | 150 | rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); |
| 151 | return (u32)msr; |
Suresh Siddha | 13c88fb5 | 2008-07-10 11:16:52 -0700 | [diff] [blame] | 152 | } |
| 153 | |
Yinghai Lu | c1eeb2d | 2009-02-16 23:02:14 -0800 | [diff] [blame] | 154 | static inline void native_x2apic_wait_icr_idle(void) |
| 155 | { |
| 156 | /* no need to wait for icr idle in x2apic */ |
| 157 | return; |
| 158 | } |
| 159 | |
| 160 | static inline u32 native_safe_x2apic_wait_icr_idle(void) |
| 161 | { |
| 162 | /* no need to wait for icr idle in x2apic */ |
| 163 | return 0; |
| 164 | } |
| 165 | |
| 166 | static inline void native_x2apic_icr_write(u32 low, u32 id) |
| 167 | { |
| 168 | wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); |
| 169 | } |
| 170 | |
| 171 | static inline u64 native_x2apic_icr_read(void) |
| 172 | { |
| 173 | unsigned long val; |
| 174 | |
| 175 | rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); |
| 176 | return val; |
| 177 | } |
| 178 | |
Thomas Gleixner | 81a46dd | 2015-01-15 21:22:11 +0000 | [diff] [blame] | 179 | extern int x2apic_mode; |
Suresh Siddha | fc1edaf | 2009-04-20 13:02:27 -0700 | [diff] [blame] | 180 | extern int x2apic_phys; |
Thomas Gleixner | d524165 | 2015-01-15 21:22:17 +0000 | [diff] [blame] | 181 | extern void __init check_x2apic(void); |
Thomas Gleixner | 659006b | 2015-01-15 21:22:26 +0000 | [diff] [blame] | 182 | extern void x2apic_setup(void); |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 183 | static inline int x2apic_enabled(void) |
| 184 | { |
Thomas Gleixner | 8d80696 | 2015-01-15 21:22:09 +0000 | [diff] [blame] | 185 | return cpu_has_x2apic && apic_is_x2apic_enabled(); |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 186 | } |
Suresh Siddha | fc1edaf | 2009-04-20 13:02:27 -0700 | [diff] [blame] | 187 | |
| 188 | #define x2apic_supported() (cpu_has_x2apic) |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 189 | #else |
Thomas Gleixner | 55eae7d | 2015-01-15 21:22:19 +0000 | [diff] [blame] | 190 | static inline void check_x2apic(void) { } |
Thomas Gleixner | 659006b | 2015-01-15 21:22:26 +0000 | [diff] [blame] | 191 | static inline void x2apic_setup(void) { } |
Thomas Gleixner | 55eae7d | 2015-01-15 21:22:19 +0000 | [diff] [blame] | 192 | static inline int x2apic_enabled(void) { return 0; } |
Suresh Siddha | cf6567f | 2009-03-16 17:05:00 -0700 | [diff] [blame] | 193 | |
Thomas Gleixner | 81a46dd | 2015-01-15 21:22:11 +0000 | [diff] [blame] | 194 | #define x2apic_mode (0) |
Thomas Gleixner | 81a46dd | 2015-01-15 21:22:11 +0000 | [diff] [blame] | 195 | #define x2apic_supported() (0) |
Yinghai Lu | c535b6a | 2008-07-11 18:41:54 -0700 | [diff] [blame] | 196 | #endif |
Suresh Siddha | 1b374e4 | 2008-07-10 11:16:49 -0700 | [diff] [blame] | 197 | |
Weidong Han | 9375823 | 2009-04-17 16:42:14 +0800 | [diff] [blame] | 198 | extern void enable_IR_x2apic(void); |
| 199 | |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 200 | extern int get_physical_broadcast(void); |
| 201 | |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 202 | extern int lapic_get_maxlvt(void); |
| 203 | extern void clear_local_APIC(void); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 204 | extern void disconnect_bsp_APIC(int virt_wire_setup); |
| 205 | extern void disable_local_APIC(void); |
| 206 | extern void lapic_shutdown(void); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 207 | extern void sync_Arb_IDs(void); |
| 208 | extern void init_bsp_APIC(void); |
| 209 | extern void setup_local_APIC(void); |
| 210 | extern void init_apic_mappings(void); |
Yinghai Lu | c0104d3 | 2010-12-07 00:55:17 -0800 | [diff] [blame] | 211 | void register_lapic_address(unsigned long address); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 212 | extern void setup_boot_APIC_clock(void); |
| 213 | extern void setup_secondary_APIC_clock(void); |
| 214 | extern int APIC_init_uniprocessor(void); |
Ricardo Ribalda Delgado | b273c2c | 2015-02-02 20:27:11 +0100 | [diff] [blame] | 215 | |
| 216 | #ifdef CONFIG_X86_64 |
| 217 | static inline int apic_force_enable(unsigned long addr) |
| 218 | { |
| 219 | return -1; |
| 220 | } |
| 221 | #else |
Thomas Gleixner | a906fda | 2011-02-25 16:09:31 +0100 | [diff] [blame] | 222 | extern int apic_force_enable(unsigned long addr); |
Ricardo Ribalda Delgado | b273c2c | 2015-02-02 20:27:11 +0100 | [diff] [blame] | 223 | #endif |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 224 | |
Thomas Gleixner | 374aab3 | 2015-01-15 21:22:44 +0000 | [diff] [blame] | 225 | extern int apic_bsp_setup(bool upmode); |
Thomas Gleixner | 05f7e46 | 2015-01-15 21:22:40 +0000 | [diff] [blame] | 226 | extern void apic_ap_setup(void); |
| 227 | |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 228 | /* |
| 229 | * On 32bit this is mach-xxx local |
| 230 | */ |
| 231 | #ifdef CONFIG_X86_64 |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 232 | extern int apic_is_clustered_box(void); |
| 233 | #else |
| 234 | static inline int apic_is_clustered_box(void) |
| 235 | { |
| 236 | return 0; |
| 237 | } |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 238 | #endif |
| 239 | |
Robert Richter | 27afdf2 | 2010-10-06 12:27:54 +0200 | [diff] [blame] | 240 | extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 241 | |
| 242 | #else /* !CONFIG_X86_LOCAL_APIC */ |
| 243 | static inline void lapic_shutdown(void) { } |
| 244 | #define local_apic_timer_c2_ok 1 |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 245 | static inline void init_apic_mappings(void) { } |
Ivan Vecera | d3ec5ca | 2008-11-11 14:33:44 +0100 | [diff] [blame] | 246 | static inline void disable_local_APIC(void) { } |
Thomas Gleixner | 736deca | 2009-08-19 12:35:53 +0200 | [diff] [blame] | 247 | # define setup_boot_APIC_clock x86_init_noop |
| 248 | # define setup_secondary_APIC_clock x86_init_noop |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 249 | #endif /* !CONFIG_X86_LOCAL_APIC */ |
| 250 | |
Ingo Molnar | 1f75ed0 | 2009-01-28 17:36:56 +0100 | [diff] [blame] | 251 | #ifdef CONFIG_X86_64 |
| 252 | #define SET_APIC_ID(x) (apic->set_apic_id(x)) |
| 253 | #else |
| 254 | |
Ingo Molnar | 1f75ed0 | 2009-01-28 17:36:56 +0100 | [diff] [blame] | 255 | #endif |
| 256 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 257 | /* |
| 258 | * Copyright 2004 James Cleverdon, IBM. |
| 259 | * Subject to the GNU Public License, v.2 |
| 260 | * |
| 261 | * Generic APIC sub-arch data struct. |
| 262 | * |
| 263 | * Hacked for x86-64 by James Cleverdon from i386 architecture code by |
| 264 | * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and |
| 265 | * James Cleverdon. |
| 266 | */ |
Ingo Molnar | be163a1 | 2009-02-17 16:28:46 +0100 | [diff] [blame] | 267 | struct apic { |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 268 | char *name; |
| 269 | |
| 270 | int (*probe)(void); |
| 271 | int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); |
Daniel J Blueman | fa63030 | 2012-03-14 15:17:34 +0800 | [diff] [blame] | 272 | int (*apic_id_valid)(int apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 273 | int (*apic_id_registered)(void); |
| 274 | |
| 275 | u32 irq_delivery_mode; |
| 276 | u32 irq_dest_mode; |
| 277 | |
| 278 | const struct cpumask *(*target_cpus)(void); |
| 279 | |
| 280 | int disable_esr; |
| 281 | |
| 282 | int dest_logical; |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 283 | unsigned long (*check_apicid_used)(physid_mask_t *map, int apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 284 | |
Suresh Siddha | 1ac322d | 2012-06-25 13:38:28 -0700 | [diff] [blame] | 285 | void (*vector_allocation_domain)(int cpu, struct cpumask *retmask, |
| 286 | const struct cpumask *mask); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 287 | void (*init_apic_ldr)(void); |
| 288 | |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 289 | void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 290 | |
| 291 | void (*setup_apic_routing)(void); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 292 | int (*cpu_present_to_apicid)(int mps_cpu); |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 293 | void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap); |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 294 | int (*check_phys_apicid_present)(int phys_apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 295 | int (*phys_pkg_id)(int cpuid_apic, int index_msb); |
| 296 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 297 | unsigned int (*get_apic_id)(unsigned long x); |
| 298 | unsigned long (*set_apic_id)(unsigned int id); |
| 299 | unsigned long apic_id_mask; |
| 300 | |
Alexander Gordeev | ff16432 | 2012-06-07 15:15:59 +0200 | [diff] [blame] | 301 | int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask, |
| 302 | const struct cpumask *andmask, |
| 303 | unsigned int *apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 304 | |
| 305 | /* ipi */ |
| 306 | void (*send_IPI_mask)(const struct cpumask *mask, int vector); |
| 307 | void (*send_IPI_mask_allbutself)(const struct cpumask *mask, |
| 308 | int vector); |
| 309 | void (*send_IPI_allbutself)(int vector); |
| 310 | void (*send_IPI_all)(int vector); |
| 311 | void (*send_IPI_self)(int vector); |
| 312 | |
| 313 | /* wakeup_secondary_cpu */ |
Ingo Molnar | 1f5bcab | 2009-02-26 13:51:40 +0100 | [diff] [blame] | 314 | int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 315 | |
David Rientjes | 465822c | 2014-02-04 23:55:01 -0800 | [diff] [blame] | 316 | bool wait_for_init_deassert; |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 317 | void (*inquire_remote_apic)(int apicid); |
| 318 | |
| 319 | /* apic ops */ |
| 320 | u32 (*read)(u32 reg); |
| 321 | void (*write)(u32 reg, u32 v); |
Michael S. Tsirkin | 2a43195 | 2012-05-16 19:03:52 +0300 | [diff] [blame] | 322 | /* |
| 323 | * ->eoi_write() has the same signature as ->write(). |
| 324 | * |
| 325 | * Drivers can support both ->eoi_write() and ->write() by passing the same |
| 326 | * callback value. Kernel can override ->eoi_write() and fall back |
| 327 | * on write for EOI. |
| 328 | */ |
| 329 | void (*eoi_write)(u32 reg, u32 v); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 330 | u64 (*icr_read)(void); |
| 331 | void (*icr_write)(u32 low, u32 high); |
| 332 | void (*wait_icr_idle)(void); |
| 333 | u32 (*safe_wait_icr_idle)(void); |
Tejun Heo | acb8bc0 | 2011-01-23 14:37:33 +0100 | [diff] [blame] | 334 | |
| 335 | #ifdef CONFIG_X86_32 |
| 336 | /* |
| 337 | * Called very early during boot from get_smp_config(). It should |
| 338 | * return the logical apicid. x86_[bios]_cpu_to_apicid is |
| 339 | * initialized before this function is called. |
| 340 | * |
| 341 | * If logical apicid can't be determined that early, the function |
| 342 | * may return BAD_APICID. Logical apicid will be configured after |
| 343 | * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity |
| 344 | * won't be applied properly during early boot in this case. |
| 345 | */ |
| 346 | int (*x86_32_early_logical_apicid)(int cpu); |
| 347 | #endif |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 348 | }; |
| 349 | |
Ingo Molnar | 0917c01 | 2009-02-26 12:47:40 +0100 | [diff] [blame] | 350 | /* |
| 351 | * Pointer to the local APIC driver in use on this system (there's |
| 352 | * always just one such driver in use - the kernel decides via an |
| 353 | * early probing process which one it picks - and then sticks to it): |
| 354 | */ |
Ingo Molnar | be163a1 | 2009-02-17 16:28:46 +0100 | [diff] [blame] | 355 | extern struct apic *apic; |
Ingo Molnar | 0917c01 | 2009-02-26 12:47:40 +0100 | [diff] [blame] | 356 | |
| 357 | /* |
Suresh Siddha | 107e0e0 | 2011-05-20 17:51:17 -0700 | [diff] [blame] | 358 | * APIC drivers are probed based on how they are listed in the .apicdrivers |
| 359 | * section. So the order is important and enforced by the ordering |
| 360 | * of different apic driver files in the Makefile. |
| 361 | * |
| 362 | * For the files having two apic drivers, we use apic_drivers() |
| 363 | * to enforce the order with in them. |
| 364 | */ |
| 365 | #define apic_driver(sym) \ |
Andi Kleen | 75fdd15 | 2012-10-04 17:11:42 -0700 | [diff] [blame] | 366 | static const struct apic *__apicdrivers_##sym __used \ |
Suresh Siddha | 107e0e0 | 2011-05-20 17:51:17 -0700 | [diff] [blame] | 367 | __aligned(sizeof(struct apic *)) \ |
| 368 | __section(.apicdrivers) = { &sym } |
| 369 | |
| 370 | #define apic_drivers(sym1, sym2) \ |
| 371 | static struct apic *__apicdrivers_##sym1##sym2[2] __used \ |
| 372 | __aligned(sizeof(struct apic *)) \ |
| 373 | __section(.apicdrivers) = { &sym1, &sym2 } |
| 374 | |
| 375 | extern struct apic *__apicdrivers[], *__apicdrivers_end[]; |
| 376 | |
| 377 | /* |
Ingo Molnar | 0917c01 | 2009-02-26 12:47:40 +0100 | [diff] [blame] | 378 | * APIC functionality to boot other CPUs - only used on SMP: |
| 379 | */ |
| 380 | #ifdef CONFIG_SMP |
Yinghai Lu | 2b6163b | 2009-02-25 20:50:49 -0800 | [diff] [blame] | 381 | extern atomic_t init_deasserted; |
| 382 | extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip); |
Ingo Molnar | 0917c01 | 2009-02-26 12:47:40 +0100 | [diff] [blame] | 383 | #endif |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 384 | |
Cyrill Gorcunov | d674cd1 | 2010-03-17 13:37:00 +0300 | [diff] [blame] | 385 | #ifdef CONFIG_X86_LOCAL_APIC |
Fernando Luis Vázquez Cao | 346b46b | 2011-12-13 11:51:53 +0900 | [diff] [blame] | 386 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 387 | static inline u32 apic_read(u32 reg) |
| 388 | { |
| 389 | return apic->read(reg); |
| 390 | } |
| 391 | |
| 392 | static inline void apic_write(u32 reg, u32 val) |
| 393 | { |
| 394 | apic->write(reg, val); |
| 395 | } |
| 396 | |
Michael S. Tsirkin | 2a43195 | 2012-05-16 19:03:52 +0300 | [diff] [blame] | 397 | static inline void apic_eoi(void) |
| 398 | { |
| 399 | apic->eoi_write(APIC_EOI, APIC_EOI_ACK); |
| 400 | } |
| 401 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 402 | static inline u64 apic_icr_read(void) |
| 403 | { |
| 404 | return apic->icr_read(); |
| 405 | } |
| 406 | |
| 407 | static inline void apic_icr_write(u32 low, u32 high) |
| 408 | { |
| 409 | apic->icr_write(low, high); |
| 410 | } |
| 411 | |
| 412 | static inline void apic_wait_icr_idle(void) |
| 413 | { |
| 414 | apic->wait_icr_idle(); |
| 415 | } |
| 416 | |
| 417 | static inline u32 safe_apic_wait_icr_idle(void) |
| 418 | { |
| 419 | return apic->safe_wait_icr_idle(); |
| 420 | } |
| 421 | |
Michael S. Tsirkin | 1551df6 | 2012-07-15 15:56:46 +0300 | [diff] [blame] | 422 | extern void __init apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)); |
| 423 | |
Cyrill Gorcunov | d674cd1 | 2010-03-17 13:37:00 +0300 | [diff] [blame] | 424 | #else /* CONFIG_X86_LOCAL_APIC */ |
| 425 | |
| 426 | static inline u32 apic_read(u32 reg) { return 0; } |
| 427 | static inline void apic_write(u32 reg, u32 val) { } |
Michael S. Tsirkin | 2a43195 | 2012-05-16 19:03:52 +0300 | [diff] [blame] | 428 | static inline void apic_eoi(void) { } |
Cyrill Gorcunov | d674cd1 | 2010-03-17 13:37:00 +0300 | [diff] [blame] | 429 | static inline u64 apic_icr_read(void) { return 0; } |
| 430 | static inline void apic_icr_write(u32 low, u32 high) { } |
| 431 | static inline void apic_wait_icr_idle(void) { } |
| 432 | static inline u32 safe_apic_wait_icr_idle(void) { return 0; } |
Michael S. Tsirkin | 1551df6 | 2012-07-15 15:56:46 +0300 | [diff] [blame] | 433 | static inline void apic_set_eoi_write(void (*eoi_write)(u32 reg, u32 v)) {} |
Cyrill Gorcunov | d674cd1 | 2010-03-17 13:37:00 +0300 | [diff] [blame] | 434 | |
| 435 | #endif /* CONFIG_X86_LOCAL_APIC */ |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 436 | |
| 437 | static inline void ack_APIC_irq(void) |
| 438 | { |
| 439 | /* |
| 440 | * ack_APIC_irq() actually gets compiled as a single instruction |
| 441 | * ... yummie. |
| 442 | */ |
Michael S. Tsirkin | 2a43195 | 2012-05-16 19:03:52 +0300 | [diff] [blame] | 443 | apic_eoi(); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 444 | } |
| 445 | |
| 446 | static inline unsigned default_get_apic_id(unsigned long x) |
| 447 | { |
| 448 | unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); |
| 449 | |
Andreas Herrmann | 42937e8 | 2009-06-08 15:55:09 +0200 | [diff] [blame] | 450 | if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 451 | return (x >> 24) & 0xFF; |
| 452 | else |
| 453 | return (x >> 24) & 0x0F; |
| 454 | } |
| 455 | |
| 456 | /* |
David Rientjes | 6ab1b27 | 2014-07-30 23:53:27 -0700 | [diff] [blame] | 457 | * Warm reset vector position: |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 458 | */ |
David Rientjes | 6ab1b27 | 2014-07-30 23:53:27 -0700 | [diff] [blame] | 459 | #define TRAMPOLINE_PHYS_LOW 0x467 |
| 460 | #define TRAMPOLINE_PHYS_HIGH 0x469 |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 461 | |
Yinghai Lu | 2b6163b | 2009-02-25 20:50:49 -0800 | [diff] [blame] | 462 | #ifdef CONFIG_X86_64 |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 463 | extern void apic_send_IPI_self(int vector); |
| 464 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 465 | DECLARE_PER_CPU(int, x2apic_extra_bits); |
| 466 | |
| 467 | extern int default_cpu_present_to_apicid(int mps_cpu); |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 468 | extern int default_check_phys_apicid_present(int phys_apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 469 | #endif |
| 470 | |
Jan Beulich | 838312b | 2011-09-28 16:44:54 +0100 | [diff] [blame] | 471 | extern void generic_bigsmp_probe(void); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 472 | |
| 473 | |
| 474 | #ifdef CONFIG_X86_LOCAL_APIC |
| 475 | |
| 476 | #include <asm/smp.h> |
| 477 | |
| 478 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) |
| 479 | |
| 480 | static inline const struct cpumask *default_target_cpus(void) |
| 481 | { |
| 482 | #ifdef CONFIG_SMP |
| 483 | return cpu_online_mask; |
| 484 | #else |
| 485 | return cpumask_of(0); |
| 486 | #endif |
| 487 | } |
| 488 | |
Alexander Gordeev | bf721d3 | 2012-06-05 13:23:29 +0200 | [diff] [blame] | 489 | static inline const struct cpumask *online_target_cpus(void) |
| 490 | { |
| 491 | return cpu_online_mask; |
| 492 | } |
| 493 | |
Vlad Zolotarov | 0816b0f | 2012-06-11 12:56:52 +0300 | [diff] [blame] | 494 | DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 495 | |
| 496 | |
| 497 | static inline unsigned int read_apic_id(void) |
| 498 | { |
| 499 | unsigned int reg; |
| 500 | |
| 501 | reg = apic_read(APIC_ID); |
| 502 | |
| 503 | return apic->get_apic_id(reg); |
| 504 | } |
| 505 | |
Daniel J Blueman | fa63030 | 2012-03-14 15:17:34 +0800 | [diff] [blame] | 506 | static inline int default_apic_id_valid(int apicid) |
| 507 | { |
Steffen Persvold | b7157ac | 2012-03-16 20:25:35 +0100 | [diff] [blame] | 508 | return (apicid < 255); |
Daniel J Blueman | fa63030 | 2012-03-14 15:17:34 +0800 | [diff] [blame] | 509 | } |
| 510 | |
Jiang Liu | a491cc902 | 2014-06-09 16:19:32 +0800 | [diff] [blame] | 511 | extern int default_acpi_madt_oem_check(char *, char *); |
| 512 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 513 | extern void default_setup_apic_routing(void); |
| 514 | |
Cyrill Gorcunov | 9844ab1 | 2009-10-14 00:07:03 +0400 | [diff] [blame] | 515 | extern struct apic apic_noop; |
| 516 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 517 | #ifdef CONFIG_X86_32 |
Jaswinder Singh Rajput | 2c1b284 | 2009-04-11 00:03:10 +0530 | [diff] [blame] | 518 | |
Tejun Heo | acb8bc0 | 2011-01-23 14:37:33 +0100 | [diff] [blame] | 519 | static inline int noop_x86_32_early_logical_apicid(int cpu) |
| 520 | { |
| 521 | return BAD_APICID; |
| 522 | } |
| 523 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 524 | /* |
| 525 | * Set up the logical destination ID. |
| 526 | * |
| 527 | * Intel recommends to set DFR, LDR and TPR before enabling |
| 528 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel |
| 529 | * document number 292116). So here it goes... |
| 530 | */ |
| 531 | extern void default_init_apic_ldr(void); |
| 532 | |
| 533 | static inline int default_apic_id_registered(void) |
| 534 | { |
| 535 | return physid_isset(read_apic_id(), phys_cpu_present_map); |
| 536 | } |
| 537 | |
Yinghai Lu | f56e503 | 2009-03-24 14:16:30 -0700 | [diff] [blame] | 538 | static inline int default_phys_pkg_id(int cpuid_apic, int index_msb) |
| 539 | { |
| 540 | return cpuid_apic >> index_msb; |
| 541 | } |
| 542 | |
Yinghai Lu | f56e503 | 2009-03-24 14:16:30 -0700 | [diff] [blame] | 543 | #endif |
| 544 | |
Alexander Gordeev | ff16432 | 2012-06-07 15:15:59 +0200 | [diff] [blame] | 545 | static inline int |
Alexander Gordeev | a5a3915 | 2012-06-14 09:49:35 +0200 | [diff] [blame] | 546 | flat_cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
| 547 | const struct cpumask *andmask, |
| 548 | unsigned int *apicid) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 549 | { |
Alexander Gordeev | a5a3915 | 2012-06-14 09:49:35 +0200 | [diff] [blame] | 550 | unsigned long cpu_mask = cpumask_bits(cpumask)[0] & |
| 551 | cpumask_bits(andmask)[0] & |
| 552 | cpumask_bits(cpu_online_mask)[0] & |
| 553 | APIC_ALL_CPUS; |
| 554 | |
Alexander Gordeev | ff16432 | 2012-06-07 15:15:59 +0200 | [diff] [blame] | 555 | if (likely(cpu_mask)) { |
| 556 | *apicid = (unsigned int)cpu_mask; |
| 557 | return 0; |
| 558 | } else { |
| 559 | return -EINVAL; |
| 560 | } |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 561 | } |
| 562 | |
Alexander Gordeev | ff16432 | 2012-06-07 15:15:59 +0200 | [diff] [blame] | 563 | extern int |
Alexander Gordeev | 6398268 | 2012-06-05 13:23:44 +0200 | [diff] [blame] | 564 | default_cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
Alexander Gordeev | ff16432 | 2012-06-07 15:15:59 +0200 | [diff] [blame] | 565 | const struct cpumask *andmask, |
| 566 | unsigned int *apicid); |
Alexander Gordeev | 6398268 | 2012-06-05 13:23:44 +0200 | [diff] [blame] | 567 | |
Suresh Siddha | b39f25a | 2012-06-25 13:38:27 -0700 | [diff] [blame] | 568 | static inline void |
Suresh Siddha | 1ac322d | 2012-06-25 13:38:28 -0700 | [diff] [blame] | 569 | flat_vector_allocation_domain(int cpu, struct cpumask *retmask, |
| 570 | const struct cpumask *mask) |
Alexander Gordeev | 9d8e106 | 2012-06-07 15:14:49 +0200 | [diff] [blame] | 571 | { |
| 572 | /* Careful. Some cpus do not strictly honor the set of cpus |
| 573 | * specified in the interrupt destination when using lowest |
| 574 | * priority interrupt delivery mode. |
| 575 | * |
| 576 | * In particular there was a hyperthreading cpu observed to |
| 577 | * deliver interrupts to the wrong hyperthread when only one |
| 578 | * hyperthread was specified in the interrupt desitination. |
| 579 | */ |
| 580 | cpumask_clear(retmask); |
| 581 | cpumask_bits(retmask)[0] = APIC_ALL_CPUS; |
| 582 | } |
| 583 | |
Suresh Siddha | b39f25a | 2012-06-25 13:38:27 -0700 | [diff] [blame] | 584 | static inline void |
Suresh Siddha | 1ac322d | 2012-06-25 13:38:28 -0700 | [diff] [blame] | 585 | default_vector_allocation_domain(int cpu, struct cpumask *retmask, |
| 586 | const struct cpumask *mask) |
Alexander Gordeev | 9d8e106 | 2012-06-07 15:14:49 +0200 | [diff] [blame] | 587 | { |
| 588 | cpumask_copy(retmask, cpumask_of(cpu)); |
| 589 | } |
| 590 | |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 591 | static inline unsigned long default_check_apicid_used(physid_mask_t *map, int apicid) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 592 | { |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 593 | return physid_isset(apicid, *map); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 594 | } |
| 595 | |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 596 | static inline void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 597 | { |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 598 | *retmap = *phys_map; |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 599 | } |
| 600 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 601 | static inline int __default_cpu_present_to_apicid(int mps_cpu) |
| 602 | { |
| 603 | if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu)) |
| 604 | return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); |
| 605 | else |
| 606 | return BAD_APICID; |
| 607 | } |
| 608 | |
| 609 | static inline int |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 610 | __default_check_phys_apicid_present(int phys_apicid) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 611 | { |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 612 | return physid_isset(phys_apicid, phys_cpu_present_map); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 613 | } |
| 614 | |
| 615 | #ifdef CONFIG_X86_32 |
| 616 | static inline int default_cpu_present_to_apicid(int mps_cpu) |
| 617 | { |
| 618 | return __default_cpu_present_to_apicid(mps_cpu); |
| 619 | } |
| 620 | |
| 621 | static inline int |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 622 | default_check_phys_apicid_present(int phys_apicid) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 623 | { |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 624 | return __default_check_phys_apicid_present(phys_apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 625 | } |
| 626 | #else |
| 627 | extern int default_cpu_present_to_apicid(int mps_cpu); |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 628 | extern int default_check_phys_apicid_present(int phys_apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 629 | #endif |
| 630 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 631 | #endif /* CONFIG_X86_LOCAL_APIC */ |
Seiji Aguchi | eddc0e9 | 2013-06-20 11:45:17 -0400 | [diff] [blame] | 632 | extern void irq_enter(void); |
| 633 | extern void irq_exit(void); |
| 634 | |
| 635 | static inline void entering_irq(void) |
| 636 | { |
| 637 | irq_enter(); |
| 638 | exit_idle(); |
| 639 | } |
| 640 | |
| 641 | static inline void entering_ack_irq(void) |
| 642 | { |
| 643 | ack_APIC_irq(); |
| 644 | entering_irq(); |
| 645 | } |
| 646 | |
Thomas Gleixner | 6dc1787 | 2015-05-15 15:50:45 +0200 | [diff] [blame] | 647 | static inline void ipi_entering_ack_irq(void) |
| 648 | { |
| 649 | ack_APIC_irq(); |
| 650 | irq_enter(); |
| 651 | } |
| 652 | |
Seiji Aguchi | eddc0e9 | 2013-06-20 11:45:17 -0400 | [diff] [blame] | 653 | static inline void exiting_irq(void) |
| 654 | { |
| 655 | irq_exit(); |
| 656 | } |
| 657 | |
| 658 | static inline void exiting_ack_irq(void) |
| 659 | { |
| 660 | irq_exit(); |
| 661 | /* Ack only at the end to avoid potential reentry */ |
| 662 | ack_APIC_irq(); |
| 663 | } |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 664 | |
Yoshihiro YUNOMAE | 1740545 | 2013-08-20 16:01:07 +0900 | [diff] [blame] | 665 | extern void ioapic_zap_locks(void); |
| 666 | |
H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 667 | #endif /* _ASM_X86_APIC_H */ |