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Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
36#include <linux/pci.h>
37#include <linux/libata.h>
Tejun Heo624d5c52008-03-25 22:16:41 +090038#include <linux/highmem.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050039
40#include "libata.h"
41
Tejun Heo624d5c52008-03-25 22:16:41 +090042const struct ata_port_operations ata_sff_port_ops = {
43 .inherits = &ata_base_port_ops,
44
Tejun Heo9363c382008-04-07 22:47:16 +090045 .qc_prep = ata_sff_qc_prep,
46 .qc_issue = ata_sff_qc_issue,
Tejun Heo4c9bf4e2008-04-07 22:47:20 +090047 .qc_fill_rtf = ata_sff_qc_fill_rtf,
Tejun Heo624d5c52008-03-25 22:16:41 +090048
Tejun Heo9363c382008-04-07 22:47:16 +090049 .freeze = ata_sff_freeze,
50 .thaw = ata_sff_thaw,
Tejun Heo0aa11132008-04-07 22:47:18 +090051 .prereset = ata_sff_prereset,
Tejun Heo9363c382008-04-07 22:47:16 +090052 .softreset = ata_sff_softreset,
Tejun Heo57c9efd2008-04-07 22:47:19 +090053 .hardreset = sata_sff_hardreset,
Tejun Heo203c75b2008-04-07 22:47:18 +090054 .postreset = ata_sff_postreset,
Alan Cox3d47aa82009-03-24 10:23:19 +000055 .drain_fifo = ata_sff_drain_fifo,
Tejun Heo9363c382008-04-07 22:47:16 +090056 .error_handler = ata_sff_error_handler,
57 .post_internal_cmd = ata_sff_post_internal_cmd,
Tejun Heo624d5c52008-03-25 22:16:41 +090058
Tejun Heo5682ed32008-04-07 22:47:16 +090059 .sff_dev_select = ata_sff_dev_select,
60 .sff_check_status = ata_sff_check_status,
61 .sff_tf_load = ata_sff_tf_load,
62 .sff_tf_read = ata_sff_tf_read,
63 .sff_exec_command = ata_sff_exec_command,
64 .sff_data_xfer = ata_sff_data_xfer,
65 .sff_irq_on = ata_sff_irq_on,
Tejun Heo288623a2008-04-07 22:47:17 +090066 .sff_irq_clear = ata_sff_irq_clear,
Tejun Heo624d5c52008-03-25 22:16:41 +090067
Alan Coxc96f1732009-03-24 10:23:46 +000068 .lost_interrupt = ata_sff_lost_interrupt,
69
Tejun Heo624d5c52008-03-25 22:16:41 +090070 .port_start = ata_sff_port_start,
71};
Alan Cox0fe40ff2009-01-05 14:16:13 +000072EXPORT_SYMBOL_GPL(ata_sff_port_ops);
Tejun Heo624d5c52008-03-25 22:16:41 +090073
74const struct ata_port_operations ata_bmdma_port_ops = {
75 .inherits = &ata_sff_port_ops,
76
Tejun Heo9363c382008-04-07 22:47:16 +090077 .mode_filter = ata_bmdma_mode_filter,
Tejun Heo624d5c52008-03-25 22:16:41 +090078
79 .bmdma_setup = ata_bmdma_setup,
80 .bmdma_start = ata_bmdma_start,
81 .bmdma_stop = ata_bmdma_stop,
82 .bmdma_status = ata_bmdma_status,
Tejun Heo624d5c52008-03-25 22:16:41 +090083};
Alan Cox0fe40ff2009-01-05 14:16:13 +000084EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
Tejun Heo624d5c52008-03-25 22:16:41 +090085
Alan Cox871af122009-01-05 14:16:39 +000086const struct ata_port_operations ata_bmdma32_port_ops = {
87 .inherits = &ata_bmdma_port_ops,
88
89 .sff_data_xfer = ata_sff_data_xfer32,
Alan Coxe3cf95d2009-04-09 17:31:17 +010090 .port_start = ata_sff_port_start32,
Alan Cox871af122009-01-05 14:16:39 +000091};
92EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops);
93
Tejun Heo624d5c52008-03-25 22:16:41 +090094/**
95 * ata_fill_sg - Fill PCI IDE PRD table
96 * @qc: Metadata associated with taskfile to be transferred
97 *
98 * Fill PCI IDE PRD (scatter-gather) table with segments
99 * associated with the current disk command.
100 *
101 * LOCKING:
102 * spin_lock_irqsave(host lock)
103 *
104 */
105static void ata_fill_sg(struct ata_queued_cmd *qc)
106{
107 struct ata_port *ap = qc->ap;
108 struct scatterlist *sg;
109 unsigned int si, pi;
110
111 pi = 0;
112 for_each_sg(qc->sg, sg, qc->n_elem, si) {
113 u32 addr, offset;
114 u32 sg_len, len;
115
116 /* determine if physical DMA addr spans 64K boundary.
117 * Note h/w doesn't support 64-bit, so we unconditionally
118 * truncate dma_addr_t to u32.
119 */
120 addr = (u32) sg_dma_address(sg);
121 sg_len = sg_dma_len(sg);
122
123 while (sg_len) {
124 offset = addr & 0xffff;
125 len = sg_len;
126 if ((offset + sg_len) > 0x10000)
127 len = 0x10000 - offset;
128
129 ap->prd[pi].addr = cpu_to_le32(addr);
130 ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff);
131 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
132
133 pi++;
134 sg_len -= len;
135 addr += len;
136 }
137 }
138
139 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
140}
141
142/**
143 * ata_fill_sg_dumb - Fill PCI IDE PRD table
144 * @qc: Metadata associated with taskfile to be transferred
145 *
146 * Fill PCI IDE PRD (scatter-gather) table with segments
147 * associated with the current disk command. Perform the fill
148 * so that we avoid writing any length 64K records for
149 * controllers that don't follow the spec.
150 *
151 * LOCKING:
152 * spin_lock_irqsave(host lock)
153 *
154 */
155static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
156{
157 struct ata_port *ap = qc->ap;
158 struct scatterlist *sg;
159 unsigned int si, pi;
160
161 pi = 0;
162 for_each_sg(qc->sg, sg, qc->n_elem, si) {
163 u32 addr, offset;
164 u32 sg_len, len, blen;
165
166 /* determine if physical DMA addr spans 64K boundary.
167 * Note h/w doesn't support 64-bit, so we unconditionally
168 * truncate dma_addr_t to u32.
169 */
170 addr = (u32) sg_dma_address(sg);
171 sg_len = sg_dma_len(sg);
172
173 while (sg_len) {
174 offset = addr & 0xffff;
175 len = sg_len;
176 if ((offset + sg_len) > 0x10000)
177 len = 0x10000 - offset;
178
179 blen = len & 0xffff;
180 ap->prd[pi].addr = cpu_to_le32(addr);
181 if (blen == 0) {
Alan Cox0fe40ff2009-01-05 14:16:13 +0000182 /* Some PATA chipsets like the CS5530 can't
183 cope with 0x0000 meaning 64K as the spec
184 says */
Tejun Heo624d5c52008-03-25 22:16:41 +0900185 ap->prd[pi].flags_len = cpu_to_le32(0x8000);
186 blen = 0x8000;
187 ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000);
188 }
189 ap->prd[pi].flags_len = cpu_to_le32(blen);
190 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
191
192 pi++;
193 sg_len -= len;
194 addr += len;
195 }
196 }
197
198 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
199}
200
201/**
Tejun Heo9363c382008-04-07 22:47:16 +0900202 * ata_sff_qc_prep - Prepare taskfile for submission
Tejun Heo624d5c52008-03-25 22:16:41 +0900203 * @qc: Metadata associated with taskfile to be prepared
204 *
205 * Prepare ATA taskfile for submission.
206 *
207 * LOCKING:
208 * spin_lock_irqsave(host lock)
209 */
Tejun Heo9363c382008-04-07 22:47:16 +0900210void ata_sff_qc_prep(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900211{
212 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
213 return;
214
215 ata_fill_sg(qc);
216}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000217EXPORT_SYMBOL_GPL(ata_sff_qc_prep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900218
219/**
Tejun Heo9363c382008-04-07 22:47:16 +0900220 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
Tejun Heo624d5c52008-03-25 22:16:41 +0900221 * @qc: Metadata associated with taskfile to be prepared
222 *
223 * Prepare ATA taskfile for submission.
224 *
225 * LOCKING:
226 * spin_lock_irqsave(host lock)
227 */
Tejun Heo9363c382008-04-07 22:47:16 +0900228void ata_sff_dumb_qc_prep(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900229{
230 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
231 return;
232
233 ata_fill_sg_dumb(qc);
234}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000235EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900236
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500237/**
Tejun Heo9363c382008-04-07 22:47:16 +0900238 * ata_sff_check_status - Read device status reg & clear interrupt
Tejun Heo272f7882008-03-25 22:16:40 +0900239 * @ap: port where the device is
240 *
241 * Reads ATA taskfile status register for currently-selected device
242 * and return its value. This also clears pending interrupts
243 * from this device
244 *
245 * LOCKING:
246 * Inherited from caller.
247 */
Tejun Heo9363c382008-04-07 22:47:16 +0900248u8 ata_sff_check_status(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900249{
250 return ioread8(ap->ioaddr.status_addr);
251}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000252EXPORT_SYMBOL_GPL(ata_sff_check_status);
Tejun Heo272f7882008-03-25 22:16:40 +0900253
254/**
Tejun Heo9363c382008-04-07 22:47:16 +0900255 * ata_sff_altstatus - Read device alternate status reg
Tejun Heo272f7882008-03-25 22:16:40 +0900256 * @ap: port where the device is
257 *
258 * Reads ATA taskfile alternate status register for
259 * currently-selected device and return its value.
260 *
261 * Note: may NOT be used as the check_altstatus() entry in
262 * ata_port_operations.
263 *
264 * LOCKING:
265 * Inherited from caller.
266 */
Alan Coxa57c1ba2008-05-29 22:10:58 +0100267static u8 ata_sff_altstatus(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900268{
Tejun Heo5682ed32008-04-07 22:47:16 +0900269 if (ap->ops->sff_check_altstatus)
270 return ap->ops->sff_check_altstatus(ap);
Tejun Heo272f7882008-03-25 22:16:40 +0900271
272 return ioread8(ap->ioaddr.altstatus_addr);
273}
274
275/**
Alan Coxa57c1ba2008-05-29 22:10:58 +0100276 * ata_sff_irq_status - Check if the device is busy
277 * @ap: port where the device is
278 *
279 * Determine if the port is currently busy. Uses altstatus
280 * if available in order to avoid clearing shared IRQ status
281 * when finding an IRQ source. Non ctl capable devices don't
282 * share interrupt lines fortunately for us.
283 *
284 * LOCKING:
285 * Inherited from caller.
286 */
287static u8 ata_sff_irq_status(struct ata_port *ap)
288{
289 u8 status;
290
291 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
292 status = ata_sff_altstatus(ap);
293 /* Not us: We are busy */
294 if (status & ATA_BUSY)
Alan Cox0fe40ff2009-01-05 14:16:13 +0000295 return status;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100296 }
297 /* Clear INTRQ latch */
Hugh Dickins6311c902008-06-05 14:44:39 +0100298 status = ap->ops->sff_check_status(ap);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100299 return status;
300}
301
302/**
303 * ata_sff_sync - Flush writes
304 * @ap: Port to wait for.
305 *
306 * CAUTION:
307 * If we have an mmio device with no ctl and no altstatus
308 * method this will fail. No such devices are known to exist.
309 *
310 * LOCKING:
311 * Inherited from caller.
312 */
313
314static void ata_sff_sync(struct ata_port *ap)
315{
316 if (ap->ops->sff_check_altstatus)
317 ap->ops->sff_check_altstatus(ap);
318 else if (ap->ioaddr.altstatus_addr)
319 ioread8(ap->ioaddr.altstatus_addr);
320}
321
322/**
323 * ata_sff_pause - Flush writes and wait 400nS
324 * @ap: Port to pause for.
325 *
326 * CAUTION:
327 * If we have an mmio device with no ctl and no altstatus
328 * method this will fail. No such devices are known to exist.
329 *
330 * LOCKING:
331 * Inherited from caller.
332 */
333
334void ata_sff_pause(struct ata_port *ap)
335{
336 ata_sff_sync(ap);
337 ndelay(400);
338}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000339EXPORT_SYMBOL_GPL(ata_sff_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100340
341/**
342 * ata_sff_dma_pause - Pause before commencing DMA
343 * @ap: Port to pause for.
344 *
345 * Perform I/O fencing and ensure sufficient cycle delays occur
346 * for the HDMA1:0 transition
347 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000348
Alan Coxa57c1ba2008-05-29 22:10:58 +0100349void ata_sff_dma_pause(struct ata_port *ap)
350{
351 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
352 /* An altstatus read will cause the needed delay without
353 messing up the IRQ status */
354 ata_sff_altstatus(ap);
355 return;
356 }
357 /* There are no DMA controllers without ctl. BUG here to ensure
358 we never violate the HDMA1:0 transition timing and risk
359 corruption. */
360 BUG();
361}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000362EXPORT_SYMBOL_GPL(ata_sff_dma_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100363
364/**
Tejun Heo9363c382008-04-07 22:47:16 +0900365 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
Tejun Heo624d5c52008-03-25 22:16:41 +0900366 * @ap: port containing status register to be polled
Tejun Heo341c2c92008-05-20 02:17:51 +0900367 * @tmout_pat: impatience timeout in msecs
368 * @tmout: overall timeout in msecs
Tejun Heo624d5c52008-03-25 22:16:41 +0900369 *
370 * Sleep until ATA Status register bit BSY clears,
371 * or a timeout occurs.
372 *
373 * LOCKING:
374 * Kernel thread context (may sleep).
375 *
376 * RETURNS:
377 * 0 on success, -errno otherwise.
378 */
Tejun Heo9363c382008-04-07 22:47:16 +0900379int ata_sff_busy_sleep(struct ata_port *ap,
380 unsigned long tmout_pat, unsigned long tmout)
Tejun Heo624d5c52008-03-25 22:16:41 +0900381{
382 unsigned long timer_start, timeout;
383 u8 status;
384
Tejun Heo9363c382008-04-07 22:47:16 +0900385 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
Tejun Heo624d5c52008-03-25 22:16:41 +0900386 timer_start = jiffies;
Tejun Heo341c2c92008-05-20 02:17:51 +0900387 timeout = ata_deadline(timer_start, tmout_pat);
Tejun Heo624d5c52008-03-25 22:16:41 +0900388 while (status != 0xff && (status & ATA_BUSY) &&
389 time_before(jiffies, timeout)) {
390 msleep(50);
Tejun Heo9363c382008-04-07 22:47:16 +0900391 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
Tejun Heo624d5c52008-03-25 22:16:41 +0900392 }
393
394 if (status != 0xff && (status & ATA_BUSY))
395 ata_port_printk(ap, KERN_WARNING,
396 "port is slow to respond, please be patient "
397 "(Status 0x%x)\n", status);
398
Tejun Heo341c2c92008-05-20 02:17:51 +0900399 timeout = ata_deadline(timer_start, tmout);
Tejun Heo624d5c52008-03-25 22:16:41 +0900400 while (status != 0xff && (status & ATA_BUSY) &&
401 time_before(jiffies, timeout)) {
402 msleep(50);
Tejun Heo5682ed32008-04-07 22:47:16 +0900403 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900404 }
405
406 if (status == 0xff)
407 return -ENODEV;
408
409 if (status & ATA_BUSY) {
410 ata_port_printk(ap, KERN_ERR, "port failed to respond "
411 "(%lu secs, Status 0x%x)\n",
Tejun Heo341c2c92008-05-20 02:17:51 +0900412 DIV_ROUND_UP(tmout, 1000), status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900413 return -EBUSY;
414 }
415
416 return 0;
417}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000418EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900419
Tejun Heoaa2731a2008-04-07 22:47:19 +0900420static int ata_sff_check_ready(struct ata_link *link)
421{
422 u8 status = link->ap->ops->sff_check_status(link->ap);
423
Tejun Heo78ab88f2008-05-01 23:41:41 +0900424 return ata_check_ready(status);
Tejun Heoaa2731a2008-04-07 22:47:19 +0900425}
426
Tejun Heo624d5c52008-03-25 22:16:41 +0900427/**
Tejun Heo9363c382008-04-07 22:47:16 +0900428 * ata_sff_wait_ready - sleep until BSY clears, or timeout
Tejun Heo705e76b2008-04-07 22:47:19 +0900429 * @link: SFF link to wait ready status for
Tejun Heo624d5c52008-03-25 22:16:41 +0900430 * @deadline: deadline jiffies for the operation
431 *
432 * Sleep until ATA Status register bit BSY clears, or timeout
433 * occurs.
434 *
435 * LOCKING:
436 * Kernel thread context (may sleep).
437 *
438 * RETURNS:
439 * 0 on success, -errno otherwise.
440 */
Tejun Heo705e76b2008-04-07 22:47:19 +0900441int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +0900442{
Tejun Heoaa2731a2008-04-07 22:47:19 +0900443 return ata_wait_ready(link, deadline, ata_sff_check_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900444}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000445EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900446
447/**
Tejun Heo9363c382008-04-07 22:47:16 +0900448 * ata_sff_dev_select - Select device 0/1 on ATA bus
Tejun Heo624d5c52008-03-25 22:16:41 +0900449 * @ap: ATA channel to manipulate
450 * @device: ATA device (numbered from zero) to select
451 *
452 * Use the method defined in the ATA specification to
453 * make either device 0, or device 1, active on the
454 * ATA channel. Works with both PIO and MMIO.
455 *
456 * May be used as the dev_select() entry in ata_port_operations.
457 *
458 * LOCKING:
459 * caller.
460 */
Tejun Heo9363c382008-04-07 22:47:16 +0900461void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
Tejun Heo624d5c52008-03-25 22:16:41 +0900462{
463 u8 tmp;
464
465 if (device == 0)
466 tmp = ATA_DEVICE_OBS;
467 else
468 tmp = ATA_DEVICE_OBS | ATA_DEV1;
469
470 iowrite8(tmp, ap->ioaddr.device_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900471 ata_sff_pause(ap); /* needed; also flushes, for mmio */
Tejun Heo624d5c52008-03-25 22:16:41 +0900472}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000473EXPORT_SYMBOL_GPL(ata_sff_dev_select);
Tejun Heo624d5c52008-03-25 22:16:41 +0900474
475/**
476 * ata_dev_select - Select device 0/1 on ATA bus
477 * @ap: ATA channel to manipulate
478 * @device: ATA device (numbered from zero) to select
479 * @wait: non-zero to wait for Status register BSY bit to clear
480 * @can_sleep: non-zero if context allows sleeping
481 *
482 * Use the method defined in the ATA specification to
483 * make either device 0, or device 1, active on the
484 * ATA channel.
485 *
Tejun Heo9363c382008-04-07 22:47:16 +0900486 * This is a high-level version of ata_sff_dev_select(), which
487 * additionally provides the services of inserting the proper
488 * pauses and status polling, where needed.
Tejun Heo624d5c52008-03-25 22:16:41 +0900489 *
490 * LOCKING:
491 * caller.
492 */
493void ata_dev_select(struct ata_port *ap, unsigned int device,
494 unsigned int wait, unsigned int can_sleep)
495{
496 if (ata_msg_probe(ap))
497 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
498 "device %u, wait %u\n", device, wait);
499
500 if (wait)
501 ata_wait_idle(ap);
502
Tejun Heo5682ed32008-04-07 22:47:16 +0900503 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +0900504
505 if (wait) {
506 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
507 msleep(150);
508 ata_wait_idle(ap);
509 }
510}
511
512/**
Tejun Heo9363c382008-04-07 22:47:16 +0900513 * ata_sff_irq_on - Enable interrupts on a port.
Tejun Heo90088bb2006-10-09 11:10:26 +0900514 * @ap: Port on which interrupts are enabled.
515 *
516 * Enable interrupts on a legacy IDE device using MMIO or PIO,
517 * wait for idle, clear any pending interrupts.
518 *
519 * LOCKING:
520 * Inherited from caller.
521 */
Tejun Heo9363c382008-04-07 22:47:16 +0900522u8 ata_sff_irq_on(struct ata_port *ap)
Tejun Heo90088bb2006-10-09 11:10:26 +0900523{
524 struct ata_ioports *ioaddr = &ap->ioaddr;
525 u8 tmp;
526
527 ap->ctl &= ~ATA_NIEN;
528 ap->last_ctl = ap->ctl;
529
Tejun Heof659f0e42008-03-06 13:12:54 +0900530 if (ioaddr->ctl_addr)
531 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo90088bb2006-10-09 11:10:26 +0900532 tmp = ata_wait_idle(ap);
533
Tejun Heo5682ed32008-04-07 22:47:16 +0900534 ap->ops->sff_irq_clear(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900535
536 return tmp;
537}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000538EXPORT_SYMBOL_GPL(ata_sff_irq_on);
Tejun Heo90088bb2006-10-09 11:10:26 +0900539
540/**
Tejun Heo9363c382008-04-07 22:47:16 +0900541 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
Tejun Heo272f7882008-03-25 22:16:40 +0900542 * @ap: Port associated with this ATA transaction.
543 *
544 * Clear interrupt and error flags in DMA status register.
545 *
546 * May be used as the irq_clear() entry in ata_port_operations.
547 *
548 * LOCKING:
549 * spin_lock_irqsave(host lock)
550 */
Tejun Heo9363c382008-04-07 22:47:16 +0900551void ata_sff_irq_clear(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900552{
553 void __iomem *mmio = ap->ioaddr.bmdma_addr;
554
555 if (!mmio)
556 return;
557
558 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
559}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000560EXPORT_SYMBOL_GPL(ata_sff_irq_clear);
Tejun Heo272f7882008-03-25 22:16:40 +0900561
562/**
Tejun Heo9363c382008-04-07 22:47:16 +0900563 * ata_sff_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500564 * @ap: Port to which output is sent
565 * @tf: ATA taskfile register set
566 *
567 * Outputs ATA taskfile to standard ATA host controller.
568 *
569 * LOCKING:
570 * Inherited from caller.
571 */
Tejun Heo9363c382008-04-07 22:47:16 +0900572void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500573{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900574 struct ata_ioports *ioaddr = &ap->ioaddr;
575 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
576
577 if (tf->ctl != ap->last_ctl) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900578 if (ioaddr->ctl_addr)
579 iowrite8(tf->ctl, ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900580 ap->last_ctl = tf->ctl;
581 ata_wait_idle(ap);
582 }
583
584 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900585 WARN_ON_ONCE(!ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900586 iowrite8(tf->hob_feature, ioaddr->feature_addr);
587 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
588 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
589 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
590 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
591 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
592 tf->hob_feature,
593 tf->hob_nsect,
594 tf->hob_lbal,
595 tf->hob_lbam,
596 tf->hob_lbah);
597 }
598
599 if (is_addr) {
600 iowrite8(tf->feature, ioaddr->feature_addr);
601 iowrite8(tf->nsect, ioaddr->nsect_addr);
602 iowrite8(tf->lbal, ioaddr->lbal_addr);
603 iowrite8(tf->lbam, ioaddr->lbam_addr);
604 iowrite8(tf->lbah, ioaddr->lbah_addr);
605 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
606 tf->feature,
607 tf->nsect,
608 tf->lbal,
609 tf->lbam,
610 tf->lbah);
611 }
612
613 if (tf->flags & ATA_TFLAG_DEVICE) {
614 iowrite8(tf->device, ioaddr->device_addr);
615 VPRINTK("device 0x%X\n", tf->device);
616 }
617
618 ata_wait_idle(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500619}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000620EXPORT_SYMBOL_GPL(ata_sff_tf_load);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500621
622/**
Tejun Heo9363c382008-04-07 22:47:16 +0900623 * ata_sff_tf_read - input device's ATA taskfile shadow registers
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500624 * @ap: Port from which input is read
625 * @tf: ATA taskfile register set for storing input
626 *
627 * Reads ATA taskfile registers for currently-selected device
Alan Cox76548ed2007-11-19 14:34:56 +0000628 * into @tf. Assumes the device has a fully SFF compliant task file
629 * layout and behaviour. If you device does not (eg has a different
630 * status method) then you will need to provide a replacement tf_read
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500631 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500632 * LOCKING:
633 * Inherited from caller.
634 */
Tejun Heo9363c382008-04-07 22:47:16 +0900635void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500636{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900637 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500638
Tejun Heo9363c382008-04-07 22:47:16 +0900639 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900640 tf->feature = ioread8(ioaddr->error_addr);
641 tf->nsect = ioread8(ioaddr->nsect_addr);
642 tf->lbal = ioread8(ioaddr->lbal_addr);
643 tf->lbam = ioread8(ioaddr->lbam_addr);
644 tf->lbah = ioread8(ioaddr->lbah_addr);
645 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500646
Tejun Heo0d5ff562007-02-01 15:06:36 +0900647 if (tf->flags & ATA_TFLAG_LBA48) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900648 if (likely(ioaddr->ctl_addr)) {
649 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
650 tf->hob_feature = ioread8(ioaddr->error_addr);
651 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
652 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
653 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
654 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
655 iowrite8(tf->ctl, ioaddr->ctl_addr);
656 ap->last_ctl = tf->ctl;
657 } else
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900658 WARN_ON_ONCE(1);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900659 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500660}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000661EXPORT_SYMBOL_GPL(ata_sff_tf_read);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500662
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500663/**
Tejun Heo9363c382008-04-07 22:47:16 +0900664 * ata_sff_exec_command - issue ATA command to host controller
Tejun Heo272f7882008-03-25 22:16:40 +0900665 * @ap: port to which command is being issued
666 * @tf: ATA taskfile register set
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500667 *
Tejun Heo272f7882008-03-25 22:16:40 +0900668 * Issues ATA command, with proper synchronization with interrupt
669 * handler / other threads.
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500670 *
671 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400672 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500673 */
Tejun Heo9363c382008-04-07 22:47:16 +0900674void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500675{
Tejun Heo272f7882008-03-25 22:16:40 +0900676 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500677
Tejun Heo272f7882008-03-25 22:16:40 +0900678 iowrite8(tf->command, ap->ioaddr.command_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900679 ata_sff_pause(ap);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500680}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000681EXPORT_SYMBOL_GPL(ata_sff_exec_command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500682
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900683/**
Tejun Heo624d5c52008-03-25 22:16:41 +0900684 * ata_tf_to_host - issue ATA taskfile to host controller
685 * @ap: port to which command is being issued
686 * @tf: ATA taskfile register set
687 *
688 * Issues ATA taskfile register set to ATA host controller,
689 * with proper synchronization with interrupt handler and
690 * other threads.
691 *
692 * LOCKING:
693 * spin_lock_irqsave(host lock)
694 */
695static inline void ata_tf_to_host(struct ata_port *ap,
696 const struct ata_taskfile *tf)
697{
Tejun Heo5682ed32008-04-07 22:47:16 +0900698 ap->ops->sff_tf_load(ap, tf);
699 ap->ops->sff_exec_command(ap, tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900700}
701
702/**
Tejun Heo9363c382008-04-07 22:47:16 +0900703 * ata_sff_data_xfer - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900704 * @dev: device to target
705 * @buf: data buffer
706 * @buflen: buffer length
707 * @rw: read/write
708 *
709 * Transfer data from/to the device data register by PIO.
710 *
711 * LOCKING:
712 * Inherited from caller.
713 *
714 * RETURNS:
715 * Bytes consumed.
716 */
Tejun Heo9363c382008-04-07 22:47:16 +0900717unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
718 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900719{
720 struct ata_port *ap = dev->link->ap;
721 void __iomem *data_addr = ap->ioaddr.data_addr;
722 unsigned int words = buflen >> 1;
723
724 /* Transfer multiple of 2 bytes */
725 if (rw == READ)
726 ioread16_rep(data_addr, buf, words);
727 else
728 iowrite16_rep(data_addr, buf, words);
729
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400730 /* Transfer trailing byte, if any. */
Tejun Heo624d5c52008-03-25 22:16:41 +0900731 if (unlikely(buflen & 0x01)) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400732 unsigned char pad[2];
Tejun Heo624d5c52008-03-25 22:16:41 +0900733
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400734 /* Point buf to the tail of buffer */
735 buf += buflen - 1;
736
737 /*
738 * Use io*16_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100739 * swapping bytes to and from on the big endian machines...
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400740 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900741 if (rw == READ) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400742 ioread16_rep(data_addr, pad, 1);
743 *buf = pad[0];
Tejun Heo624d5c52008-03-25 22:16:41 +0900744 } else {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400745 pad[0] = *buf;
746 iowrite16_rep(data_addr, pad, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +0900747 }
748 words++;
749 }
750
751 return words << 1;
752}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000753EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
Tejun Heo624d5c52008-03-25 22:16:41 +0900754
755/**
Alan Cox871af122009-01-05 14:16:39 +0000756 * ata_sff_data_xfer32 - Transfer data by PIO
757 * @dev: device to target
758 * @buf: data buffer
759 * @buflen: buffer length
760 * @rw: read/write
761 *
762 * Transfer data from/to the device data register by PIO using 32bit
763 * I/O operations.
764 *
765 * LOCKING:
766 * Inherited from caller.
767 *
768 * RETURNS:
769 * Bytes consumed.
770 */
771
772unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf,
773 unsigned int buflen, int rw)
774{
775 struct ata_port *ap = dev->link->ap;
776 void __iomem *data_addr = ap->ioaddr.data_addr;
777 unsigned int words = buflen >> 2;
778 int slop = buflen & 3;
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100779
Alan Coxe3cf95d2009-04-09 17:31:17 +0100780 if (!(ap->pflags & ATA_PFLAG_PIO32))
781 return ata_sff_data_xfer(dev, buf, buflen, rw);
Alan Cox871af122009-01-05 14:16:39 +0000782
783 /* Transfer multiple of 4 bytes */
784 if (rw == READ)
785 ioread32_rep(data_addr, buf, words);
786 else
787 iowrite32_rep(data_addr, buf, words);
788
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400789 /* Transfer trailing bytes, if any */
Alan Cox871af122009-01-05 14:16:39 +0000790 if (unlikely(slop)) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400791 unsigned char pad[4];
792
793 /* Point buf to the tail of buffer */
794 buf += buflen - slop;
795
796 /*
797 * Use io*_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100798 * swapping bytes to and from on the big endian machines...
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400799 */
Alan Cox871af122009-01-05 14:16:39 +0000800 if (rw == READ) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400801 if (slop < 3)
802 ioread16_rep(data_addr, pad, 1);
803 else
804 ioread32_rep(data_addr, pad, 1);
805 memcpy(buf, pad, slop);
Alan Cox871af122009-01-05 14:16:39 +0000806 } else {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400807 memcpy(pad, buf, slop);
808 if (slop < 3)
809 iowrite16_rep(data_addr, pad, 1);
810 else
811 iowrite32_rep(data_addr, pad, 1);
Alan Cox871af122009-01-05 14:16:39 +0000812 }
Alan Cox871af122009-01-05 14:16:39 +0000813 }
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400814 return (buflen + 1) & ~1;
Alan Cox871af122009-01-05 14:16:39 +0000815}
816EXPORT_SYMBOL_GPL(ata_sff_data_xfer32);
817
818/**
Tejun Heo9363c382008-04-07 22:47:16 +0900819 * ata_sff_data_xfer_noirq - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900820 * @dev: device to target
821 * @buf: data buffer
822 * @buflen: buffer length
823 * @rw: read/write
824 *
825 * Transfer data from/to the device data register by PIO. Do the
826 * transfer with interrupts disabled.
827 *
828 * LOCKING:
829 * Inherited from caller.
830 *
831 * RETURNS:
832 * Bytes consumed.
833 */
Tejun Heo9363c382008-04-07 22:47:16 +0900834unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
835 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900836{
837 unsigned long flags;
838 unsigned int consumed;
839
840 local_irq_save(flags);
Tejun Heo9363c382008-04-07 22:47:16 +0900841 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900842 local_irq_restore(flags);
843
844 return consumed;
845}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000846EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq);
Tejun Heo624d5c52008-03-25 22:16:41 +0900847
848/**
849 * ata_pio_sector - Transfer a sector of data.
850 * @qc: Command on going
851 *
852 * Transfer qc->sect_size bytes of data from/to the ATA device.
853 *
854 * LOCKING:
855 * Inherited from caller.
856 */
857static void ata_pio_sector(struct ata_queued_cmd *qc)
858{
859 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
860 struct ata_port *ap = qc->ap;
861 struct page *page;
862 unsigned int offset;
863 unsigned char *buf;
864
865 if (qc->curbytes == qc->nbytes - qc->sect_size)
866 ap->hsm_task_state = HSM_ST_LAST;
867
868 page = sg_page(qc->cursg);
869 offset = qc->cursg->offset + qc->cursg_ofs;
870
871 /* get the current page and offset */
872 page = nth_page(page, (offset >> PAGE_SHIFT));
873 offset %= PAGE_SIZE;
874
875 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
876
877 if (PageHighMem(page)) {
878 unsigned long flags;
879
880 /* FIXME: use a bounce buffer */
881 local_irq_save(flags);
882 buf = kmap_atomic(page, KM_IRQ0);
883
884 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900885 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
886 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900887
888 kunmap_atomic(buf, KM_IRQ0);
889 local_irq_restore(flags);
890 } else {
891 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900892 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
893 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900894 }
895
Catalin Marinas2d68b7f2010-02-04 01:04:50 -0500896 if (!do_write)
897 flush_dcache_page(page);
898
Tejun Heo624d5c52008-03-25 22:16:41 +0900899 qc->curbytes += qc->sect_size;
900 qc->cursg_ofs += qc->sect_size;
901
902 if (qc->cursg_ofs == qc->cursg->length) {
903 qc->cursg = sg_next(qc->cursg);
904 qc->cursg_ofs = 0;
905 }
906}
907
908/**
909 * ata_pio_sectors - Transfer one or many sectors.
910 * @qc: Command on going
911 *
912 * Transfer one or many sectors of data from/to the
913 * ATA device for the DRQ request.
914 *
915 * LOCKING:
916 * Inherited from caller.
917 */
918static void ata_pio_sectors(struct ata_queued_cmd *qc)
919{
920 if (is_multi_taskfile(&qc->tf)) {
921 /* READ/WRITE MULTIPLE */
922 unsigned int nsect;
923
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900924 WARN_ON_ONCE(qc->dev->multi_count == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +0900925
926 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
927 qc->dev->multi_count);
928 while (nsect--)
929 ata_pio_sector(qc);
930 } else
931 ata_pio_sector(qc);
932
Alan Coxa57c1ba2008-05-29 22:10:58 +0100933 ata_sff_sync(qc->ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900934}
935
936/**
937 * atapi_send_cdb - Write CDB bytes to hardware
938 * @ap: Port to which ATAPI device is attached.
939 * @qc: Taskfile currently active
940 *
941 * When device has indicated its readiness to accept
942 * a CDB, this function is called. Send the CDB.
943 *
944 * LOCKING:
945 * caller.
946 */
947static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
948{
949 /* send SCSI cdb */
950 DPRINTK("send cdb\n");
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900951 WARN_ON_ONCE(qc->dev->cdb_len < 12);
Tejun Heo624d5c52008-03-25 22:16:41 +0900952
Tejun Heo5682ed32008-04-07 22:47:16 +0900953 ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100954 ata_sff_sync(ap);
955 /* FIXME: If the CDB is for DMA do we need to do the transition delay
956 or is bmdma_start guaranteed to do it ? */
Tejun Heo624d5c52008-03-25 22:16:41 +0900957 switch (qc->tf.protocol) {
958 case ATAPI_PROT_PIO:
959 ap->hsm_task_state = HSM_ST;
960 break;
961 case ATAPI_PROT_NODATA:
962 ap->hsm_task_state = HSM_ST_LAST;
963 break;
964 case ATAPI_PROT_DMA:
965 ap->hsm_task_state = HSM_ST_LAST;
966 /* initiate bmdma */
967 ap->ops->bmdma_start(qc);
968 break;
969 }
970}
971
972/**
973 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
974 * @qc: Command on going
975 * @bytes: number of bytes
976 *
977 * Transfer Transfer data from/to the ATAPI device.
978 *
979 * LOCKING:
980 * Inherited from caller.
981 *
982 */
983static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
984{
985 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
986 struct ata_port *ap = qc->ap;
987 struct ata_device *dev = qc->dev;
988 struct ata_eh_info *ehi = &dev->link->eh_info;
989 struct scatterlist *sg;
990 struct page *page;
991 unsigned char *buf;
992 unsigned int offset, count, consumed;
993
994next_sg:
995 sg = qc->cursg;
996 if (unlikely(!sg)) {
997 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
998 "buf=%u cur=%u bytes=%u",
999 qc->nbytes, qc->curbytes, bytes);
1000 return -1;
1001 }
1002
1003 page = sg_page(sg);
1004 offset = sg->offset + qc->cursg_ofs;
1005
1006 /* get the current page and offset */
1007 page = nth_page(page, (offset >> PAGE_SHIFT));
1008 offset %= PAGE_SIZE;
1009
1010 /* don't overrun current sg */
1011 count = min(sg->length - qc->cursg_ofs, bytes);
1012
1013 /* don't cross page boundaries */
1014 count = min(count, (unsigned int)PAGE_SIZE - offset);
1015
1016 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
1017
1018 if (PageHighMem(page)) {
1019 unsigned long flags;
1020
1021 /* FIXME: use bounce buffer */
1022 local_irq_save(flags);
1023 buf = kmap_atomic(page, KM_IRQ0);
1024
1025 /* do the actual data transfer */
Alan Cox0fe40ff2009-01-05 14:16:13 +00001026 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
1027 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +09001028
1029 kunmap_atomic(buf, KM_IRQ0);
1030 local_irq_restore(flags);
1031 } else {
1032 buf = page_address(page);
Alan Cox0fe40ff2009-01-05 14:16:13 +00001033 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
1034 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +09001035 }
1036
1037 bytes -= min(bytes, consumed);
1038 qc->curbytes += count;
1039 qc->cursg_ofs += count;
1040
1041 if (qc->cursg_ofs == sg->length) {
1042 qc->cursg = sg_next(qc->cursg);
1043 qc->cursg_ofs = 0;
1044 }
1045
Christian Borntraegera0f79f72009-01-13 10:38:36 +01001046 /*
1047 * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed);
1048 * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN
1049 * check correctly as it doesn't know if it is the last request being
1050 * made. Somebody should implement a proper sanity check.
1051 */
Tejun Heo624d5c52008-03-25 22:16:41 +09001052 if (bytes)
1053 goto next_sg;
1054 return 0;
1055}
1056
1057/**
1058 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
1059 * @qc: Command on going
1060 *
1061 * Transfer Transfer data from/to the ATAPI device.
1062 *
1063 * LOCKING:
1064 * Inherited from caller.
1065 */
1066static void atapi_pio_bytes(struct ata_queued_cmd *qc)
1067{
1068 struct ata_port *ap = qc->ap;
1069 struct ata_device *dev = qc->dev;
1070 struct ata_eh_info *ehi = &dev->link->eh_info;
1071 unsigned int ireason, bc_lo, bc_hi, bytes;
1072 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
1073
1074 /* Abuse qc->result_tf for temp storage of intermediate TF
1075 * here to save some kernel stack usage.
1076 * For normal completion, qc->result_tf is not relevant. For
1077 * error, qc->result_tf is later overwritten by ata_qc_complete().
1078 * So, the correctness of qc->result_tf is not affected.
1079 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001080 ap->ops->sff_tf_read(ap, &qc->result_tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09001081 ireason = qc->result_tf.nsect;
1082 bc_lo = qc->result_tf.lbam;
1083 bc_hi = qc->result_tf.lbah;
1084 bytes = (bc_hi << 8) | bc_lo;
1085
1086 /* shall be cleared to zero, indicating xfer of data */
1087 if (unlikely(ireason & (1 << 0)))
1088 goto atapi_check;
1089
1090 /* make sure transfer direction matches expected */
1091 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
1092 if (unlikely(do_write != i_write))
1093 goto atapi_check;
1094
1095 if (unlikely(!bytes))
1096 goto atapi_check;
1097
1098 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
1099
1100 if (unlikely(__atapi_pio_bytes(qc, bytes)))
1101 goto err_out;
Alan Coxa57c1ba2008-05-29 22:10:58 +01001102 ata_sff_sync(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +09001103
1104 return;
1105
1106 atapi_check:
1107 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
1108 ireason, bytes);
1109 err_out:
1110 qc->err_mask |= AC_ERR_HSM;
1111 ap->hsm_task_state = HSM_ST_ERR;
1112}
1113
1114/**
1115 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
1116 * @ap: the target ata_port
1117 * @qc: qc on going
1118 *
1119 * RETURNS:
1120 * 1 if ok in workqueue, 0 otherwise.
1121 */
Alan Cox0fe40ff2009-01-05 14:16:13 +00001122static inline int ata_hsm_ok_in_wq(struct ata_port *ap,
1123 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001124{
1125 if (qc->tf.flags & ATA_TFLAG_POLLING)
1126 return 1;
1127
1128 if (ap->hsm_task_state == HSM_ST_FIRST) {
1129 if (qc->tf.protocol == ATA_PROT_PIO &&
Alan Cox0fe40ff2009-01-05 14:16:13 +00001130 (qc->tf.flags & ATA_TFLAG_WRITE))
Tejun Heo624d5c52008-03-25 22:16:41 +09001131 return 1;
1132
1133 if (ata_is_atapi(qc->tf.protocol) &&
Alan Cox0fe40ff2009-01-05 14:16:13 +00001134 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heo624d5c52008-03-25 22:16:41 +09001135 return 1;
1136 }
1137
1138 return 0;
1139}
1140
1141/**
1142 * ata_hsm_qc_complete - finish a qc running on standard HSM
1143 * @qc: Command to complete
1144 * @in_wq: 1 if called from workqueue, 0 otherwise
1145 *
1146 * Finish @qc which is running on standard HSM.
1147 *
1148 * LOCKING:
1149 * If @in_wq is zero, spin_lock_irqsave(host lock).
1150 * Otherwise, none on entry and grabs host lock.
1151 */
1152static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
1153{
1154 struct ata_port *ap = qc->ap;
1155 unsigned long flags;
1156
1157 if (ap->ops->error_handler) {
1158 if (in_wq) {
1159 spin_lock_irqsave(ap->lock, flags);
1160
1161 /* EH might have kicked in while host lock is
1162 * released.
1163 */
1164 qc = ata_qc_from_tag(ap, qc->tag);
1165 if (qc) {
1166 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
Tejun Heo5682ed32008-04-07 22:47:16 +09001167 ap->ops->sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001168 ata_qc_complete(qc);
1169 } else
1170 ata_port_freeze(ap);
1171 }
1172
1173 spin_unlock_irqrestore(ap->lock, flags);
1174 } else {
1175 if (likely(!(qc->err_mask & AC_ERR_HSM)))
1176 ata_qc_complete(qc);
1177 else
1178 ata_port_freeze(ap);
1179 }
1180 } else {
1181 if (in_wq) {
1182 spin_lock_irqsave(ap->lock, flags);
Tejun Heo5682ed32008-04-07 22:47:16 +09001183 ap->ops->sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001184 ata_qc_complete(qc);
1185 spin_unlock_irqrestore(ap->lock, flags);
1186 } else
1187 ata_qc_complete(qc);
1188 }
1189}
1190
1191/**
Tejun Heo9363c382008-04-07 22:47:16 +09001192 * ata_sff_hsm_move - move the HSM to the next state.
Tejun Heo624d5c52008-03-25 22:16:41 +09001193 * @ap: the target ata_port
1194 * @qc: qc on going
1195 * @status: current device status
1196 * @in_wq: 1 if called from workqueue, 0 otherwise
1197 *
1198 * RETURNS:
1199 * 1 when poll next status needed, 0 otherwise.
1200 */
Tejun Heo9363c382008-04-07 22:47:16 +09001201int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1202 u8 status, int in_wq)
Tejun Heo624d5c52008-03-25 22:16:41 +09001203{
Tejun Heoa836d3e2008-06-28 01:39:43 +09001204 struct ata_eh_info *ehi = &ap->link.eh_info;
Tejun Heo624d5c52008-03-25 22:16:41 +09001205 unsigned long flags = 0;
1206 int poll_next;
1207
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001208 WARN_ON_ONCE((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001209
Tejun Heo9363c382008-04-07 22:47:16 +09001210 /* Make sure ata_sff_qc_issue() does not throw things
Tejun Heo624d5c52008-03-25 22:16:41 +09001211 * like DMA polling into the workqueue. Notice that
1212 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1213 */
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001214 WARN_ON_ONCE(in_wq != ata_hsm_ok_in_wq(ap, qc));
Tejun Heo624d5c52008-03-25 22:16:41 +09001215
1216fsm_start:
1217 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1218 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
1219
1220 switch (ap->hsm_task_state) {
1221 case HSM_ST_FIRST:
1222 /* Send first data block or PACKET CDB */
1223
1224 /* If polling, we will stay in the work queue after
1225 * sending the data. Otherwise, interrupt handler
1226 * takes over after sending the data.
1227 */
1228 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1229
1230 /* check device status */
1231 if (unlikely((status & ATA_DRQ) == 0)) {
1232 /* handle BSY=0, DRQ=0 as error */
1233 if (likely(status & (ATA_ERR | ATA_DF)))
1234 /* device stops HSM for abort/error */
1235 qc->err_mask |= AC_ERR_DEV;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001236 else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001237 /* HSM violation. Let EH handle this */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001238 ata_ehi_push_desc(ehi,
1239 "ST_FIRST: !(DRQ|ERR|DF)");
Tejun Heo624d5c52008-03-25 22:16:41 +09001240 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001241 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001242
1243 ap->hsm_task_state = HSM_ST_ERR;
1244 goto fsm_start;
1245 }
1246
1247 /* Device should not ask for data transfer (DRQ=1)
1248 * when it finds something wrong.
1249 * We ignore DRQ here and stop the HSM by
1250 * changing hsm_task_state to HSM_ST_ERR and
1251 * let the EH abort the command or reset the device.
1252 */
1253 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1254 /* Some ATAPI tape drives forget to clear the ERR bit
1255 * when doing the next command (mostly request sense).
1256 * We ignore ERR here to workaround and proceed sending
1257 * the CDB.
1258 */
1259 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001260 ata_ehi_push_desc(ehi, "ST_FIRST: "
1261 "DRQ=1 with device error, "
1262 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001263 qc->err_mask |= AC_ERR_HSM;
1264 ap->hsm_task_state = HSM_ST_ERR;
1265 goto fsm_start;
1266 }
1267 }
1268
1269 /* Send the CDB (atapi) or the first data block (ata pio out).
1270 * During the state transition, interrupt handler shouldn't
1271 * be invoked before the data transfer is complete and
1272 * hsm_task_state is changed. Hence, the following locking.
1273 */
1274 if (in_wq)
1275 spin_lock_irqsave(ap->lock, flags);
1276
1277 if (qc->tf.protocol == ATA_PROT_PIO) {
1278 /* PIO data out protocol.
1279 * send first data block.
1280 */
1281
1282 /* ata_pio_sectors() might change the state
1283 * to HSM_ST_LAST. so, the state is changed here
1284 * before ata_pio_sectors().
1285 */
1286 ap->hsm_task_state = HSM_ST;
1287 ata_pio_sectors(qc);
1288 } else
1289 /* send CDB */
1290 atapi_send_cdb(ap, qc);
1291
1292 if (in_wq)
1293 spin_unlock_irqrestore(ap->lock, flags);
1294
1295 /* if polling, ata_pio_task() handles the rest.
1296 * otherwise, interrupt handler takes over from here.
1297 */
1298 break;
1299
1300 case HSM_ST:
1301 /* complete command or read/write the data register */
1302 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1303 /* ATAPI PIO protocol */
1304 if ((status & ATA_DRQ) == 0) {
1305 /* No more data to transfer or device error.
1306 * Device error will be tagged in HSM_ST_LAST.
1307 */
1308 ap->hsm_task_state = HSM_ST_LAST;
1309 goto fsm_start;
1310 }
1311
1312 /* Device should not ask for data transfer (DRQ=1)
1313 * when it finds something wrong.
1314 * We ignore DRQ here and stop the HSM by
1315 * changing hsm_task_state to HSM_ST_ERR and
1316 * let the EH abort the command or reset the device.
1317 */
1318 if (unlikely(status & (ATA_ERR | ATA_DF))) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001319 ata_ehi_push_desc(ehi, "ST-ATAPI: "
1320 "DRQ=1 with device error, "
1321 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001322 qc->err_mask |= AC_ERR_HSM;
1323 ap->hsm_task_state = HSM_ST_ERR;
1324 goto fsm_start;
1325 }
1326
1327 atapi_pio_bytes(qc);
1328
1329 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1330 /* bad ireason reported by device */
1331 goto fsm_start;
1332
1333 } else {
1334 /* ATA PIO protocol */
1335 if (unlikely((status & ATA_DRQ) == 0)) {
1336 /* handle BSY=0, DRQ=0 as error */
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001337 if (likely(status & (ATA_ERR | ATA_DF))) {
Tejun Heo624d5c52008-03-25 22:16:41 +09001338 /* device stops HSM for abort/error */
1339 qc->err_mask |= AC_ERR_DEV;
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001340
1341 /* If diagnostic failed and this is
1342 * IDENTIFY, it's likely a phantom
1343 * device. Mark hint.
1344 */
1345 if (qc->dev->horkage &
1346 ATA_HORKAGE_DIAGNOSTIC)
1347 qc->err_mask |=
1348 AC_ERR_NODEV_HINT;
1349 } else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001350 /* HSM violation. Let EH handle this.
1351 * Phantom devices also trigger this
1352 * condition. Mark hint.
1353 */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001354 ata_ehi_push_desc(ehi, "ST-ATA: "
Tejun Heo80ee6f52009-01-23 14:12:59 +09001355 "DRQ=0 without device error, "
Tejun Heoa836d3e2008-06-28 01:39:43 +09001356 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001357 qc->err_mask |= AC_ERR_HSM |
1358 AC_ERR_NODEV_HINT;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001359 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001360
1361 ap->hsm_task_state = HSM_ST_ERR;
1362 goto fsm_start;
1363 }
1364
1365 /* For PIO reads, some devices may ask for
1366 * data transfer (DRQ=1) alone with ERR=1.
1367 * We respect DRQ here and transfer one
1368 * block of junk data before changing the
1369 * hsm_task_state to HSM_ST_ERR.
1370 *
1371 * For PIO writes, ERR=1 DRQ=1 doesn't make
1372 * sense since the data block has been
1373 * transferred to the device.
1374 */
1375 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1376 /* data might be corrputed */
1377 qc->err_mask |= AC_ERR_DEV;
1378
1379 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1380 ata_pio_sectors(qc);
1381 status = ata_wait_idle(ap);
1382 }
1383
Tejun Heoa836d3e2008-06-28 01:39:43 +09001384 if (status & (ATA_BUSY | ATA_DRQ)) {
1385 ata_ehi_push_desc(ehi, "ST-ATA: "
1386 "BUSY|DRQ persists on ERR|DF, "
1387 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001388 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001389 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001390
Tejun Heob9199302009-01-25 10:26:00 +09001391 /* There are oddball controllers with
1392 * status register stuck at 0x7f and
1393 * lbal/m/h at zero which makes it
1394 * pass all other presence detection
1395 * mechanisms we have. Set NODEV_HINT
1396 * for it. Kernel bz#7241.
1397 */
1398 if (status == 0x7f)
1399 qc->err_mask |= AC_ERR_NODEV_HINT;
1400
Tejun Heo624d5c52008-03-25 22:16:41 +09001401 /* ata_pio_sectors() might change the
1402 * state to HSM_ST_LAST. so, the state
1403 * is changed after ata_pio_sectors().
1404 */
1405 ap->hsm_task_state = HSM_ST_ERR;
1406 goto fsm_start;
1407 }
1408
1409 ata_pio_sectors(qc);
1410
1411 if (ap->hsm_task_state == HSM_ST_LAST &&
1412 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1413 /* all data read */
1414 status = ata_wait_idle(ap);
1415 goto fsm_start;
1416 }
1417 }
1418
1419 poll_next = 1;
1420 break;
1421
1422 case HSM_ST_LAST:
1423 if (unlikely(!ata_ok(status))) {
1424 qc->err_mask |= __ac_err_mask(status);
1425 ap->hsm_task_state = HSM_ST_ERR;
1426 goto fsm_start;
1427 }
1428
1429 /* no more data to transfer */
1430 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1431 ap->print_id, qc->dev->devno, status);
1432
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001433 WARN_ON_ONCE(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM));
Tejun Heo624d5c52008-03-25 22:16:41 +09001434
1435 ap->hsm_task_state = HSM_ST_IDLE;
1436
1437 /* complete taskfile transaction */
1438 ata_hsm_qc_complete(qc, in_wq);
1439
1440 poll_next = 0;
1441 break;
1442
1443 case HSM_ST_ERR:
Tejun Heo624d5c52008-03-25 22:16:41 +09001444 ap->hsm_task_state = HSM_ST_IDLE;
1445
1446 /* complete taskfile transaction */
1447 ata_hsm_qc_complete(qc, in_wq);
1448
1449 poll_next = 0;
1450 break;
1451 default:
1452 poll_next = 0;
1453 BUG();
1454 }
1455
1456 return poll_next;
1457}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001458EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
Tejun Heo624d5c52008-03-25 22:16:41 +09001459
1460void ata_pio_task(struct work_struct *work)
1461{
1462 struct ata_port *ap =
1463 container_of(work, struct ata_port, port_task.work);
1464 struct ata_queued_cmd *qc = ap->port_task_data;
1465 u8 status;
1466 int poll_next;
1467
1468fsm_start:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001469 WARN_ON_ONCE(ap->hsm_task_state == HSM_ST_IDLE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001470
1471 /*
1472 * This is purely heuristic. This is a fast path.
1473 * Sometimes when we enter, BSY will be cleared in
1474 * a chk-status or two. If not, the drive is probably seeking
1475 * or something. Snooze for a couple msecs, then
1476 * chk-status again. If still busy, queue delayed work.
1477 */
Tejun Heo9363c382008-04-07 22:47:16 +09001478 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
Tejun Heo624d5c52008-03-25 22:16:41 +09001479 if (status & ATA_BUSY) {
1480 msleep(2);
Tejun Heo9363c382008-04-07 22:47:16 +09001481 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
Tejun Heo624d5c52008-03-25 22:16:41 +09001482 if (status & ATA_BUSY) {
1483 ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE);
1484 return;
1485 }
1486 }
1487
1488 /* move the HSM */
Tejun Heo9363c382008-04-07 22:47:16 +09001489 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001490
1491 /* another command or interrupt handler
1492 * may be running at this point.
1493 */
1494 if (poll_next)
1495 goto fsm_start;
1496}
1497
1498/**
Tejun Heo9363c382008-04-07 22:47:16 +09001499 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
Tejun Heo624d5c52008-03-25 22:16:41 +09001500 * @qc: command to issue to device
1501 *
1502 * Using various libata functions and hooks, this function
1503 * starts an ATA command. ATA commands are grouped into
1504 * classes called "protocols", and issuing each type of protocol
1505 * is slightly different.
1506 *
1507 * May be used as the qc_issue() entry in ata_port_operations.
1508 *
1509 * LOCKING:
1510 * spin_lock_irqsave(host lock)
1511 *
1512 * RETURNS:
1513 * Zero on success, AC_ERR_* mask on failure
1514 */
Tejun Heo9363c382008-04-07 22:47:16 +09001515unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001516{
1517 struct ata_port *ap = qc->ap;
1518
1519 /* Use polling pio if the LLD doesn't handle
1520 * interrupt driven pio and atapi CDB interrupt.
1521 */
1522 if (ap->flags & ATA_FLAG_PIO_POLLING) {
1523 switch (qc->tf.protocol) {
1524 case ATA_PROT_PIO:
1525 case ATA_PROT_NODATA:
1526 case ATAPI_PROT_PIO:
1527 case ATAPI_PROT_NODATA:
1528 qc->tf.flags |= ATA_TFLAG_POLLING;
1529 break;
1530 case ATAPI_PROT_DMA:
1531 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
1532 /* see ata_dma_blacklisted() */
1533 BUG();
1534 break;
1535 default:
1536 break;
1537 }
1538 }
1539
1540 /* select the device */
1541 ata_dev_select(ap, qc->dev->devno, 1, 0);
1542
1543 /* start the command */
1544 switch (qc->tf.protocol) {
1545 case ATA_PROT_NODATA:
1546 if (qc->tf.flags & ATA_TFLAG_POLLING)
1547 ata_qc_set_polling(qc);
1548
1549 ata_tf_to_host(ap, &qc->tf);
1550 ap->hsm_task_state = HSM_ST_LAST;
1551
1552 if (qc->tf.flags & ATA_TFLAG_POLLING)
1553 ata_pio_queue_task(ap, qc, 0);
1554
1555 break;
1556
1557 case ATA_PROT_DMA:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001558 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
Tejun Heo624d5c52008-03-25 22:16:41 +09001559
Tejun Heo5682ed32008-04-07 22:47:16 +09001560 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
Tejun Heo624d5c52008-03-25 22:16:41 +09001561 ap->ops->bmdma_setup(qc); /* set up bmdma */
1562 ap->ops->bmdma_start(qc); /* initiate bmdma */
1563 ap->hsm_task_state = HSM_ST_LAST;
1564 break;
1565
1566 case ATA_PROT_PIO:
1567 if (qc->tf.flags & ATA_TFLAG_POLLING)
1568 ata_qc_set_polling(qc);
1569
1570 ata_tf_to_host(ap, &qc->tf);
1571
1572 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1573 /* PIO data out protocol */
1574 ap->hsm_task_state = HSM_ST_FIRST;
1575 ata_pio_queue_task(ap, qc, 0);
1576
1577 /* always send first data block using
1578 * the ata_pio_task() codepath.
1579 */
1580 } else {
1581 /* PIO data in protocol */
1582 ap->hsm_task_state = HSM_ST;
1583
1584 if (qc->tf.flags & ATA_TFLAG_POLLING)
1585 ata_pio_queue_task(ap, qc, 0);
1586
1587 /* if polling, ata_pio_task() handles the rest.
1588 * otherwise, interrupt handler takes over from here.
1589 */
1590 }
1591
1592 break;
1593
1594 case ATAPI_PROT_PIO:
1595 case ATAPI_PROT_NODATA:
1596 if (qc->tf.flags & ATA_TFLAG_POLLING)
1597 ata_qc_set_polling(qc);
1598
1599 ata_tf_to_host(ap, &qc->tf);
1600
1601 ap->hsm_task_state = HSM_ST_FIRST;
1602
1603 /* send cdb by polling if no cdb interrupt */
1604 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1605 (qc->tf.flags & ATA_TFLAG_POLLING))
1606 ata_pio_queue_task(ap, qc, 0);
1607 break;
1608
1609 case ATAPI_PROT_DMA:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001610 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
Tejun Heo624d5c52008-03-25 22:16:41 +09001611
Tejun Heo5682ed32008-04-07 22:47:16 +09001612 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
Tejun Heo624d5c52008-03-25 22:16:41 +09001613 ap->ops->bmdma_setup(qc); /* set up bmdma */
1614 ap->hsm_task_state = HSM_ST_FIRST;
1615
1616 /* send cdb by polling if no cdb interrupt */
1617 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1618 ata_pio_queue_task(ap, qc, 0);
1619 break;
1620
1621 default:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001622 WARN_ON_ONCE(1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001623 return AC_ERR_SYSTEM;
1624 }
1625
1626 return 0;
1627}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001628EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
Tejun Heo624d5c52008-03-25 22:16:41 +09001629
1630/**
Tejun Heo22183bf2008-04-07 22:47:20 +09001631 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1632 * @qc: qc to fill result TF for
1633 *
1634 * @qc is finished and result TF needs to be filled. Fill it
1635 * using ->sff_tf_read.
1636 *
1637 * LOCKING:
1638 * spin_lock_irqsave(host lock)
1639 *
1640 * RETURNS:
1641 * true indicating that result TF is successfully filled.
1642 */
1643bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc)
1644{
1645 qc->ap->ops->sff_tf_read(qc->ap, &qc->result_tf);
1646 return true;
1647}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001648EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf);
Tejun Heo22183bf2008-04-07 22:47:20 +09001649
1650/**
Tejun Heo9363c382008-04-07 22:47:16 +09001651 * ata_sff_host_intr - Handle host interrupt for given (port, task)
Tejun Heo624d5c52008-03-25 22:16:41 +09001652 * @ap: Port on which interrupt arrived (possibly...)
1653 * @qc: Taskfile currently active in engine
1654 *
1655 * Handle host interrupt for given queued command. Currently,
1656 * only DMA interrupts are handled. All other commands are
1657 * handled via polling with interrupts disabled (nIEN bit).
1658 *
1659 * LOCKING:
1660 * spin_lock_irqsave(host lock)
1661 *
1662 * RETURNS:
1663 * One if interrupt was handled, zero if not (shared irq).
1664 */
Alan Coxc96f1732009-03-24 10:23:46 +00001665unsigned int ata_sff_host_intr(struct ata_port *ap,
Tejun Heo9363c382008-04-07 22:47:16 +09001666 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001667{
1668 struct ata_eh_info *ehi = &ap->link.eh_info;
1669 u8 status, host_stat = 0;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001670 bool bmdma_stopped = false;
Tejun Heo624d5c52008-03-25 22:16:41 +09001671
1672 VPRINTK("ata%u: protocol %d task_state %d\n",
1673 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1674
1675 /* Check whether we are expecting interrupt in this state */
1676 switch (ap->hsm_task_state) {
1677 case HSM_ST_FIRST:
1678 /* Some pre-ATAPI-4 devices assert INTRQ
1679 * at this state when ready to receive CDB.
1680 */
1681
1682 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1683 * The flag was turned on only for atapi devices. No
1684 * need to check ata_is_atapi(qc->tf.protocol) again.
1685 */
1686 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1687 goto idle_irq;
1688 break;
1689 case HSM_ST_LAST:
1690 if (qc->tf.protocol == ATA_PROT_DMA ||
1691 qc->tf.protocol == ATAPI_PROT_DMA) {
1692 /* check status of DMA engine */
1693 host_stat = ap->ops->bmdma_status(ap);
1694 VPRINTK("ata%u: host_stat 0x%X\n",
1695 ap->print_id, host_stat);
1696
1697 /* if it's not our irq... */
1698 if (!(host_stat & ATA_DMA_INTR))
1699 goto idle_irq;
1700
1701 /* before we do anything else, clear DMA-Start bit */
1702 ap->ops->bmdma_stop(qc);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001703 bmdma_stopped = true;
Tejun Heo624d5c52008-03-25 22:16:41 +09001704
1705 if (unlikely(host_stat & ATA_DMA_ERR)) {
1706 /* error when transfering data to/from memory */
1707 qc->err_mask |= AC_ERR_HOST_BUS;
1708 ap->hsm_task_state = HSM_ST_ERR;
1709 }
1710 }
1711 break;
1712 case HSM_ST:
1713 break;
1714 default:
1715 goto idle_irq;
1716 }
1717
Tejun Heo624d5c52008-03-25 22:16:41 +09001718
Alan Coxa57c1ba2008-05-29 22:10:58 +01001719 /* check main status, clearing INTRQ if needed */
1720 status = ata_sff_irq_status(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001721 if (status & ATA_BUSY) {
1722 if (bmdma_stopped) {
1723 /* BMDMA engine is already stopped, we're screwed */
1724 qc->err_mask |= AC_ERR_HSM;
1725 ap->hsm_task_state = HSM_ST_ERR;
1726 } else
1727 goto idle_irq;
1728 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001729
1730 /* ack bmdma irq events */
Tejun Heo5682ed32008-04-07 22:47:16 +09001731 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001732
Tejun Heo9363c382008-04-07 22:47:16 +09001733 ata_sff_hsm_move(ap, qc, status, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001734
1735 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
1736 qc->tf.protocol == ATAPI_PROT_DMA))
1737 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
1738
1739 return 1; /* irq handled */
1740
1741idle_irq:
1742 ap->stats.idle_irq++;
1743
1744#ifdef ATA_IRQ_TRAP
1745 if ((ap->stats.idle_irq % 1000) == 0) {
Tejun Heo5682ed32008-04-07 22:47:16 +09001746 ap->ops->sff_check_status(ap);
1747 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001748 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
1749 return 1;
1750 }
1751#endif
1752 return 0; /* irq not handled */
1753}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001754EXPORT_SYMBOL_GPL(ata_sff_host_intr);
Tejun Heo624d5c52008-03-25 22:16:41 +09001755
1756/**
Tejun Heo9363c382008-04-07 22:47:16 +09001757 * ata_sff_interrupt - Default ATA host interrupt handler
Tejun Heo624d5c52008-03-25 22:16:41 +09001758 * @irq: irq line (unused)
1759 * @dev_instance: pointer to our ata_host information structure
1760 *
1761 * Default interrupt handler for PCI IDE devices. Calls
Tejun Heo9363c382008-04-07 22:47:16 +09001762 * ata_sff_host_intr() for each port that is not disabled.
Tejun Heo624d5c52008-03-25 22:16:41 +09001763 *
1764 * LOCKING:
1765 * Obtains host lock during operation.
1766 *
1767 * RETURNS:
1768 * IRQ_NONE or IRQ_HANDLED.
1769 */
Tejun Heo9363c382008-04-07 22:47:16 +09001770irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
Tejun Heo624d5c52008-03-25 22:16:41 +09001771{
1772 struct ata_host *host = dev_instance;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001773 bool retried = false;
Tejun Heo624d5c52008-03-25 22:16:41 +09001774 unsigned int i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001775 unsigned int handled, idle, polling;
Tejun Heo624d5c52008-03-25 22:16:41 +09001776 unsigned long flags;
1777
1778 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1779 spin_lock_irqsave(&host->lock, flags);
1780
Tejun Heo332ac7f2010-03-23 12:24:08 +09001781retry:
1782 handled = idle = polling = 0;
Tejun Heo624d5c52008-03-25 22:16:41 +09001783 for (i = 0; i < host->n_ports; i++) {
Tejun Heod88ec2e2010-01-19 10:46:32 +09001784 struct ata_port *ap = host->ports[i];
1785 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001786
Tejun Heod88ec2e2010-01-19 10:46:32 +09001787 if (unlikely(ap->flags & ATA_FLAG_DISABLED))
1788 continue;
Tejun Heo624d5c52008-03-25 22:16:41 +09001789
Tejun Heod88ec2e2010-01-19 10:46:32 +09001790 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo27943622010-01-19 10:49:19 +09001791 if (qc) {
1792 if (!(qc->tf.flags & ATA_TFLAG_POLLING))
1793 handled |= ata_sff_host_intr(ap, qc);
1794 else
1795 polling |= 1 << i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001796 } else
1797 idle |= 1 << i;
Tejun Heo27943622010-01-19 10:49:19 +09001798 }
1799
1800 /*
1801 * If no port was expecting IRQ but the controller is actually
1802 * asserting IRQ line, nobody cared will ensue. Check IRQ
1803 * pending status if available and clear spurious IRQ.
1804 */
Tejun Heo332ac7f2010-03-23 12:24:08 +09001805 if (!handled && !retried) {
1806 bool retry = false;
1807
Tejun Heo27943622010-01-19 10:49:19 +09001808 for (i = 0; i < host->n_ports; i++) {
1809 struct ata_port *ap = host->ports[i];
1810
1811 if (polling & (1 << i))
1812 continue;
1813
1814 if (!ap->ops->sff_irq_check ||
1815 !ap->ops->sff_irq_check(ap))
1816 continue;
1817
1818 if (printk_ratelimit())
1819 ata_port_printk(ap, KERN_INFO,
1820 "clearing spurious IRQ\n");
1821
Tejun Heo332ac7f2010-03-23 12:24:08 +09001822 if (idle & (1 << i)) {
1823 ap->ops->sff_check_status(ap);
1824 ap->ops->sff_irq_clear(ap);
1825 } else {
1826 /* clear INTRQ and check if BUSY cleared */
1827 if (!(ap->ops->sff_check_status(ap) & ATA_BUSY))
1828 retry |= true;
1829 /*
1830 * With command in flight, we can't do
1831 * sff_irq_clear() w/o racing with completion.
1832 */
1833 }
1834 }
1835
1836 if (retry) {
1837 retried = true;
1838 goto retry;
Tejun Heo27943622010-01-19 10:49:19 +09001839 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001840 }
1841
1842 spin_unlock_irqrestore(&host->lock, flags);
1843
1844 return IRQ_RETVAL(handled);
1845}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001846EXPORT_SYMBOL_GPL(ata_sff_interrupt);
Tejun Heo624d5c52008-03-25 22:16:41 +09001847
1848/**
Alan Coxc96f1732009-03-24 10:23:46 +00001849 * ata_sff_lost_interrupt - Check for an apparent lost interrupt
1850 * @ap: port that appears to have timed out
1851 *
1852 * Called from the libata error handlers when the core code suspects
1853 * an interrupt has been lost. If it has complete anything we can and
1854 * then return. Interface must support altstatus for this faster
1855 * recovery to occur.
1856 *
1857 * Locking:
1858 * Caller holds host lock
1859 */
1860
1861void ata_sff_lost_interrupt(struct ata_port *ap)
1862{
1863 u8 status;
1864 struct ata_queued_cmd *qc;
1865
1866 /* Only one outstanding command per SFF channel */
1867 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1868 /* Check we have a live one.. */
1869 if (qc == NULL || !(qc->flags & ATA_QCFLAG_ACTIVE))
1870 return;
1871 /* We cannot lose an interrupt on a polled command */
1872 if (qc->tf.flags & ATA_TFLAG_POLLING)
1873 return;
1874 /* See if the controller thinks it is still busy - if so the command
1875 isn't a lost IRQ but is still in progress */
1876 status = ata_sff_altstatus(ap);
1877 if (status & ATA_BUSY)
1878 return;
1879
1880 /* There was a command running, we are no longer busy and we have
1881 no interrupt. */
1882 ata_port_printk(ap, KERN_WARNING, "lost interrupt (Status 0x%x)\n",
1883 status);
1884 /* Run the host interrupt logic as if the interrupt had not been
1885 lost */
1886 ata_sff_host_intr(ap, qc);
1887}
1888EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt);
1889
1890/**
Tejun Heo9363c382008-04-07 22:47:16 +09001891 * ata_sff_freeze - Freeze SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001892 * @ap: port to freeze
1893 *
1894 * Freeze BMDMA controller port.
1895 *
1896 * LOCKING:
1897 * Inherited from caller.
1898 */
Tejun Heo9363c382008-04-07 22:47:16 +09001899void ata_sff_freeze(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001900{
1901 struct ata_ioports *ioaddr = &ap->ioaddr;
1902
1903 ap->ctl |= ATA_NIEN;
1904 ap->last_ctl = ap->ctl;
1905
Tejun Heof659f0e42008-03-06 13:12:54 +09001906 if (ioaddr->ctl_addr)
1907 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001908
1909 /* Under certain circumstances, some controllers raise IRQ on
1910 * ATA_NIEN manipulation. Also, many controllers fail to mask
1911 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1912 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001913 ap->ops->sff_check_status(ap);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001914
Tejun Heo5682ed32008-04-07 22:47:16 +09001915 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001916}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001917EXPORT_SYMBOL_GPL(ata_sff_freeze);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001918
1919/**
Tejun Heo9363c382008-04-07 22:47:16 +09001920 * ata_sff_thaw - Thaw SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001921 * @ap: port to thaw
1922 *
Tejun Heo9363c382008-04-07 22:47:16 +09001923 * Thaw SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001924 *
1925 * LOCKING:
1926 * Inherited from caller.
1927 */
Tejun Heo9363c382008-04-07 22:47:16 +09001928void ata_sff_thaw(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001929{
1930 /* clear & re-enable interrupts */
Tejun Heo5682ed32008-04-07 22:47:16 +09001931 ap->ops->sff_check_status(ap);
1932 ap->ops->sff_irq_clear(ap);
1933 ap->ops->sff_irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001934}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001935EXPORT_SYMBOL_GPL(ata_sff_thaw);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001936
1937/**
Tejun Heo0aa11132008-04-07 22:47:18 +09001938 * ata_sff_prereset - prepare SFF link for reset
1939 * @link: SFF link to be reset
1940 * @deadline: deadline jiffies for the operation
1941 *
1942 * SFF link @link is about to be reset. Initialize it. It first
1943 * calls ata_std_prereset() and wait for !BSY if the port is
1944 * being softreset.
1945 *
1946 * LOCKING:
1947 * Kernel thread context (may sleep)
1948 *
1949 * RETURNS:
1950 * 0 on success, -errno otherwise.
1951 */
1952int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1953{
Tejun Heo0aa11132008-04-07 22:47:18 +09001954 struct ata_eh_context *ehc = &link->eh_context;
1955 int rc;
1956
1957 rc = ata_std_prereset(link, deadline);
1958 if (rc)
1959 return rc;
1960
1961 /* if we're about to do hardreset, nothing more to do */
1962 if (ehc->i.action & ATA_EH_HARDRESET)
1963 return 0;
1964
1965 /* wait for !BSY if we don't know that no device is attached */
1966 if (!ata_link_offline(link)) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001967 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo0aa11132008-04-07 22:47:18 +09001968 if (rc && rc != -ENODEV) {
1969 ata_link_printk(link, KERN_WARNING, "device not ready "
1970 "(errno=%d), forcing hardreset\n", rc);
1971 ehc->i.action |= ATA_EH_HARDRESET;
1972 }
1973 }
1974
1975 return 0;
1976}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001977EXPORT_SYMBOL_GPL(ata_sff_prereset);
Tejun Heo0aa11132008-04-07 22:47:18 +09001978
1979/**
Tejun Heo624d5c52008-03-25 22:16:41 +09001980 * ata_devchk - PATA device presence detection
1981 * @ap: ATA channel to examine
1982 * @device: Device to examine (starting at zero)
1983 *
1984 * This technique was originally described in
1985 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1986 * later found its way into the ATA/ATAPI spec.
1987 *
1988 * Write a pattern to the ATA shadow registers,
1989 * and if a device is present, it will respond by
1990 * correctly storing and echoing back the
1991 * ATA shadow register contents.
1992 *
1993 * LOCKING:
1994 * caller.
1995 */
1996static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1997{
1998 struct ata_ioports *ioaddr = &ap->ioaddr;
1999 u8 nsect, lbal;
2000
Tejun Heo5682ed32008-04-07 22:47:16 +09002001 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +09002002
2003 iowrite8(0x55, ioaddr->nsect_addr);
2004 iowrite8(0xaa, ioaddr->lbal_addr);
2005
2006 iowrite8(0xaa, ioaddr->nsect_addr);
2007 iowrite8(0x55, ioaddr->lbal_addr);
2008
2009 iowrite8(0x55, ioaddr->nsect_addr);
2010 iowrite8(0xaa, ioaddr->lbal_addr);
2011
2012 nsect = ioread8(ioaddr->nsect_addr);
2013 lbal = ioread8(ioaddr->lbal_addr);
2014
2015 if ((nsect == 0x55) && (lbal == 0xaa))
2016 return 1; /* we found a device */
2017
2018 return 0; /* nothing found */
2019}
2020
2021/**
Tejun Heo9363c382008-04-07 22:47:16 +09002022 * ata_sff_dev_classify - Parse returned ATA device signature
Tejun Heo624d5c52008-03-25 22:16:41 +09002023 * @dev: ATA device to classify (starting at zero)
2024 * @present: device seems present
2025 * @r_err: Value of error register on completion
2026 *
2027 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
2028 * an ATA/ATAPI-defined set of values is placed in the ATA
2029 * shadow registers, indicating the results of device detection
2030 * and diagnostics.
2031 *
2032 * Select the ATA device, and read the values from the ATA shadow
2033 * registers. Then parse according to the Error register value,
2034 * and the spec-defined values examined by ata_dev_classify().
2035 *
2036 * LOCKING:
2037 * caller.
2038 *
2039 * RETURNS:
2040 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
2041 */
Tejun Heo9363c382008-04-07 22:47:16 +09002042unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
Tejun Heo624d5c52008-03-25 22:16:41 +09002043 u8 *r_err)
2044{
2045 struct ata_port *ap = dev->link->ap;
2046 struct ata_taskfile tf;
2047 unsigned int class;
2048 u8 err;
2049
Tejun Heo5682ed32008-04-07 22:47:16 +09002050 ap->ops->sff_dev_select(ap, dev->devno);
Tejun Heo624d5c52008-03-25 22:16:41 +09002051
2052 memset(&tf, 0, sizeof(tf));
2053
Tejun Heo5682ed32008-04-07 22:47:16 +09002054 ap->ops->sff_tf_read(ap, &tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09002055 err = tf.feature;
2056 if (r_err)
2057 *r_err = err;
2058
2059 /* see if device passed diags: continue and warn later */
2060 if (err == 0)
2061 /* diagnostic fail : do nothing _YET_ */
2062 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
2063 else if (err == 1)
2064 /* do nothing */ ;
2065 else if ((dev->devno == 0) && (err == 0x81))
2066 /* do nothing */ ;
2067 else
2068 return ATA_DEV_NONE;
2069
2070 /* determine if device is ATA or ATAPI */
2071 class = ata_dev_classify(&tf);
2072
2073 if (class == ATA_DEV_UNKNOWN) {
2074 /* If the device failed diagnostic, it's likely to
2075 * have reported incorrect device signature too.
2076 * Assume ATA device if the device seems present but
2077 * device signature is invalid with diagnostic
2078 * failure.
2079 */
2080 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
2081 class = ATA_DEV_ATA;
2082 else
2083 class = ATA_DEV_NONE;
Tejun Heo5682ed32008-04-07 22:47:16 +09002084 } else if ((class == ATA_DEV_ATA) &&
2085 (ap->ops->sff_check_status(ap) == 0))
Tejun Heo624d5c52008-03-25 22:16:41 +09002086 class = ATA_DEV_NONE;
2087
2088 return class;
2089}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002090EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
Tejun Heo624d5c52008-03-25 22:16:41 +09002091
Tejun Heo705e76b2008-04-07 22:47:19 +09002092/**
2093 * ata_sff_wait_after_reset - wait for devices to become ready after reset
2094 * @link: SFF link which is just reset
2095 * @devmask: mask of present devices
2096 * @deadline: deadline jiffies for the operation
2097 *
2098 * Wait devices attached to SFF @link to become ready after
2099 * reset. It contains preceding 150ms wait to avoid accessing TF
2100 * status register too early.
2101 *
2102 * LOCKING:
2103 * Kernel thread context (may sleep).
2104 *
2105 * RETURNS:
2106 * 0 on success, -ENODEV if some or all of devices in @devmask
2107 * don't seem to exist. -errno on other errors.
2108 */
2109int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
2110 unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +09002111{
Tejun Heo705e76b2008-04-07 22:47:19 +09002112 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09002113 struct ata_ioports *ioaddr = &ap->ioaddr;
2114 unsigned int dev0 = devmask & (1 << 0);
2115 unsigned int dev1 = devmask & (1 << 1);
2116 int rc, ret = 0;
2117
Tejun Heo341c2c92008-05-20 02:17:51 +09002118 msleep(ATA_WAIT_AFTER_RESET);
Tejun Heo705e76b2008-04-07 22:47:19 +09002119
2120 /* always check readiness of the master device */
2121 rc = ata_sff_wait_ready(link, deadline);
2122 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
2123 * and TF status is 0xff, bail out on it too.
Tejun Heo624d5c52008-03-25 22:16:41 +09002124 */
Tejun Heo705e76b2008-04-07 22:47:19 +09002125 if (rc)
2126 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09002127
2128 /* if device 1 was found in ata_devchk, wait for register
2129 * access briefly, then wait for BSY to clear.
2130 */
2131 if (dev1) {
2132 int i;
2133
Tejun Heo5682ed32008-04-07 22:47:16 +09002134 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09002135
2136 /* Wait for register access. Some ATAPI devices fail
2137 * to set nsect/lbal after reset, so don't waste too
2138 * much time on it. We're gonna wait for !BSY anyway.
2139 */
2140 for (i = 0; i < 2; i++) {
2141 u8 nsect, lbal;
2142
2143 nsect = ioread8(ioaddr->nsect_addr);
2144 lbal = ioread8(ioaddr->lbal_addr);
2145 if ((nsect == 1) && (lbal == 1))
2146 break;
2147 msleep(50); /* give drive a breather */
2148 }
2149
Tejun Heo705e76b2008-04-07 22:47:19 +09002150 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09002151 if (rc) {
2152 if (rc != -ENODEV)
2153 return rc;
2154 ret = rc;
2155 }
2156 }
2157
2158 /* is all this really necessary? */
Tejun Heo5682ed32008-04-07 22:47:16 +09002159 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002160 if (dev1)
Tejun Heo5682ed32008-04-07 22:47:16 +09002161 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09002162 if (dev0)
Tejun Heo5682ed32008-04-07 22:47:16 +09002163 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002164
2165 return ret;
2166}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002167EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002168
Tejun Heo624d5c52008-03-25 22:16:41 +09002169static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
2170 unsigned long deadline)
2171{
2172 struct ata_ioports *ioaddr = &ap->ioaddr;
2173
2174 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
2175
2176 /* software reset. causes dev0 to be selected */
2177 iowrite8(ap->ctl, ioaddr->ctl_addr);
2178 udelay(20); /* FIXME: flush */
2179 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2180 udelay(20); /* FIXME: flush */
2181 iowrite8(ap->ctl, ioaddr->ctl_addr);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002182 ap->last_ctl = ap->ctl;
Tejun Heo624d5c52008-03-25 22:16:41 +09002183
Tejun Heo705e76b2008-04-07 22:47:19 +09002184 /* wait the port to become ready */
2185 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09002186}
2187
2188/**
Tejun Heo9363c382008-04-07 22:47:16 +09002189 * ata_sff_softreset - reset host port via ATA SRST
Tejun Heo624d5c52008-03-25 22:16:41 +09002190 * @link: ATA link to reset
2191 * @classes: resulting classes of attached devices
2192 * @deadline: deadline jiffies for the operation
2193 *
2194 * Reset host port using ATA SRST.
2195 *
2196 * LOCKING:
2197 * Kernel thread context (may sleep)
2198 *
2199 * RETURNS:
2200 * 0 on success, -errno otherwise.
2201 */
Tejun Heo9363c382008-04-07 22:47:16 +09002202int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
Tejun Heo624d5c52008-03-25 22:16:41 +09002203 unsigned long deadline)
2204{
2205 struct ata_port *ap = link->ap;
2206 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2207 unsigned int devmask = 0;
2208 int rc;
2209 u8 err;
2210
2211 DPRINTK("ENTER\n");
2212
Tejun Heo624d5c52008-03-25 22:16:41 +09002213 /* determine if device 0/1 are present */
2214 if (ata_devchk(ap, 0))
2215 devmask |= (1 << 0);
2216 if (slave_possible && ata_devchk(ap, 1))
2217 devmask |= (1 << 1);
2218
2219 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002220 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002221
2222 /* issue bus reset */
2223 DPRINTK("about to softreset, devmask=%x\n", devmask);
2224 rc = ata_bus_softreset(ap, devmask, deadline);
2225 /* if link is occupied, -ENODEV too is an error */
2226 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
2227 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
2228 return rc;
2229 }
2230
2231 /* determine by signature whether we have ATA or ATAPI devices */
Tejun Heo9363c382008-04-07 22:47:16 +09002232 classes[0] = ata_sff_dev_classify(&link->device[0],
Tejun Heo624d5c52008-03-25 22:16:41 +09002233 devmask & (1 << 0), &err);
2234 if (slave_possible && err != 0x81)
Tejun Heo9363c382008-04-07 22:47:16 +09002235 classes[1] = ata_sff_dev_classify(&link->device[1],
Tejun Heo624d5c52008-03-25 22:16:41 +09002236 devmask & (1 << 1), &err);
2237
Tejun Heo624d5c52008-03-25 22:16:41 +09002238 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2239 return 0;
2240}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002241EXPORT_SYMBOL_GPL(ata_sff_softreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002242
2243/**
Tejun Heo9363c382008-04-07 22:47:16 +09002244 * sata_sff_hardreset - reset host port via SATA phy reset
Tejun Heo624d5c52008-03-25 22:16:41 +09002245 * @link: link to reset
2246 * @class: resulting class of attached device
2247 * @deadline: deadline jiffies for the operation
2248 *
2249 * SATA phy-reset host port using DET bits of SControl register,
2250 * wait for !BSY and classify the attached device.
2251 *
2252 * LOCKING:
2253 * Kernel thread context (may sleep)
2254 *
2255 * RETURNS:
2256 * 0 on success, -errno otherwise.
2257 */
Tejun Heo9363c382008-04-07 22:47:16 +09002258int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
Tejun Heo624d5c52008-03-25 22:16:41 +09002259 unsigned long deadline)
2260{
Tejun Heo9dadd452008-04-07 22:47:19 +09002261 struct ata_eh_context *ehc = &link->eh_context;
2262 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2263 bool online;
Tejun Heo624d5c52008-03-25 22:16:41 +09002264 int rc;
2265
Tejun Heo9dadd452008-04-07 22:47:19 +09002266 rc = sata_link_hardreset(link, timing, deadline, &online,
2267 ata_sff_check_ready);
Tejun Heo9dadd452008-04-07 22:47:19 +09002268 if (online)
2269 *class = ata_sff_dev_classify(link->device, 1, NULL);
Tejun Heo624d5c52008-03-25 22:16:41 +09002270
2271 DPRINTK("EXIT, class=%u\n", *class);
Tejun Heo9dadd452008-04-07 22:47:19 +09002272 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09002273}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002274EXPORT_SYMBOL_GPL(sata_sff_hardreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002275
2276/**
Tejun Heo203c75b2008-04-07 22:47:18 +09002277 * ata_sff_postreset - SFF postreset callback
2278 * @link: the target SFF ata_link
2279 * @classes: classes of attached devices
2280 *
2281 * This function is invoked after a successful reset. It first
2282 * calls ata_std_postreset() and performs SFF specific postreset
2283 * processing.
2284 *
2285 * LOCKING:
2286 * Kernel thread context (may sleep)
2287 */
2288void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2289{
2290 struct ata_port *ap = link->ap;
2291
2292 ata_std_postreset(link, classes);
2293
2294 /* is double-select really necessary? */
2295 if (classes[0] != ATA_DEV_NONE)
2296 ap->ops->sff_dev_select(ap, 1);
2297 if (classes[1] != ATA_DEV_NONE)
2298 ap->ops->sff_dev_select(ap, 0);
2299
2300 /* bail out if no device is present */
2301 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2302 DPRINTK("EXIT, no device\n");
2303 return;
2304 }
2305
2306 /* set up device control */
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002307 if (ap->ioaddr.ctl_addr) {
Tejun Heo203c75b2008-04-07 22:47:18 +09002308 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002309 ap->last_ctl = ap->ctl;
2310 }
Tejun Heo203c75b2008-04-07 22:47:18 +09002311}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002312EXPORT_SYMBOL_GPL(ata_sff_postreset);
Tejun Heo203c75b2008-04-07 22:47:18 +09002313
2314/**
Alan Cox3d47aa82009-03-24 10:23:19 +00002315 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2316 * @qc: command
2317 *
2318 * Drain the FIFO and device of any stuck data following a command
Daniel Mack3ad2f3f2010-02-03 08:01:28 +08002319 * failing to complete. In some cases this is necessary before a
Alan Cox3d47aa82009-03-24 10:23:19 +00002320 * reset will recover the device.
2321 *
2322 */
2323
2324void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2325{
2326 int count;
2327 struct ata_port *ap;
2328
2329 /* We only need to flush incoming data when a command was running */
2330 if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
2331 return;
2332
2333 ap = qc->ap;
2334 /* Drain up to 64K of data before we give up this recovery method */
2335 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
Robert Hancock9a8fd682009-12-08 20:48:10 -06002336 && count < 65536; count += 2)
Alan Cox3d47aa82009-03-24 10:23:19 +00002337 ioread16(ap->ioaddr.data_addr);
2338
2339 /* Can become DEBUG later */
2340 if (count)
2341 ata_port_printk(ap, KERN_DEBUG,
2342 "drained %d bytes to clear DRQ.\n", count);
2343
2344}
2345EXPORT_SYMBOL_GPL(ata_sff_drain_fifo);
2346
2347/**
Tejun Heo9363c382008-04-07 22:47:16 +09002348 * ata_sff_error_handler - Stock error handler for BMDMA controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002349 * @ap: port to handle error for
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002350 *
Tejun Heo9363c382008-04-07 22:47:16 +09002351 * Stock error handler for SFF controller. It can handle both
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002352 * PATA and SATA controllers. Many controllers should be able to
2353 * use this EH as-is or with some added handling before and
2354 * after.
2355 *
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002356 * LOCKING:
2357 * Kernel thread context (may sleep)
2358 */
Tejun Heo9363c382008-04-07 22:47:16 +09002359void ata_sff_error_handler(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002360{
Tejun Heoa1efdab2008-03-25 12:22:50 +09002361 ata_reset_fn_t softreset = ap->ops->softreset;
2362 ata_reset_fn_t hardreset = ap->ops->hardreset;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002363 struct ata_queued_cmd *qc;
2364 unsigned long flags;
2365 int thaw = 0;
2366
Tejun Heo9af5c9c2007-08-06 18:36:22 +09002367 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002368 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2369 qc = NULL;
2370
2371 /* reset PIO HSM and stop DMA engine */
Jeff Garzikba6a1302006-06-22 23:46:10 -04002372 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002373
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002374 ap->hsm_task_state = HSM_ST_IDLE;
2375
Tejun Heoed82f962008-03-25 21:34:39 +09002376 if (ap->ioaddr.bmdma_addr &&
2377 qc && (qc->tf.protocol == ATA_PROT_DMA ||
Tejun Heo0dc36882007-12-18 16:34:43 -05002378 qc->tf.protocol == ATAPI_PROT_DMA)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002379 u8 host_stat;
2380
Robert Hancockfbbb2622006-10-27 19:08:41 -07002381 host_stat = ap->ops->bmdma_status(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002382
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002383 /* BMDMA controllers indicate host bus error by
2384 * setting DMA_ERR bit and timing out. As it wasn't
2385 * really a timeout event, adjust error mask and
2386 * cancel frozen state.
2387 */
Alan Cox3d47aa82009-03-24 10:23:19 +00002388 if (qc->err_mask == AC_ERR_TIMEOUT
2389 && (host_stat & ATA_DMA_ERR)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002390 qc->err_mask = AC_ERR_HOST_BUS;
2391 thaw = 1;
2392 }
2393
2394 ap->ops->bmdma_stop(qc);
2395 }
2396
Alan Coxa57c1ba2008-05-29 22:10:58 +01002397 ata_sff_sync(ap); /* FIXME: We don't need this */
Tejun Heo5682ed32008-04-07 22:47:16 +09002398 ap->ops->sff_check_status(ap);
2399 ap->ops->sff_irq_clear(ap);
Alan Cox3d47aa82009-03-24 10:23:19 +00002400 /* We *MUST* do FIFO draining before we issue a reset as several
2401 * devices helpfully clear their internal state and will lock solid
2402 * if we touch the data port post reset. Pass qc in case anyone wants
2403 * to do different PIO/DMA recovery or has per command fixups
2404 */
2405 if (ap->ops->drain_fifo)
2406 ap->ops->drain_fifo(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002407
Jeff Garzikba6a1302006-06-22 23:46:10 -04002408 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002409
2410 if (thaw)
2411 ata_eh_thaw_port(ap);
2412
2413 /* PIO and DMA engines have been stopped, perform recovery */
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002414
Tejun Heo57c9efd2008-04-07 22:47:19 +09002415 /* Ignore ata_sff_softreset if ctl isn't accessible and
2416 * built-in hardresets if SCR access isn't available.
Tejun Heoa1efdab2008-03-25 12:22:50 +09002417 */
Tejun Heo9363c382008-04-07 22:47:16 +09002418 if (softreset == ata_sff_softreset && !ap->ioaddr.ctl_addr)
Tejun Heoa1efdab2008-03-25 12:22:50 +09002419 softreset = NULL;
Tejun Heo57c9efd2008-04-07 22:47:19 +09002420 if (ata_is_builtin_hardreset(hardreset) && !sata_scr_valid(&ap->link))
Tejun Heoa1efdab2008-03-25 12:22:50 +09002421 hardreset = NULL;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002422
Tejun Heoa1efdab2008-03-25 12:22:50 +09002423 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2424 ap->ops->postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002425}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002426EXPORT_SYMBOL_GPL(ata_sff_error_handler);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002427
2428/**
Tejun Heo9363c382008-04-07 22:47:16 +09002429 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002430 * @qc: internal command to clean up
2431 *
2432 * LOCKING:
2433 * Kernel thread context (may sleep)
2434 */
Tejun Heo9363c382008-04-07 22:47:16 +09002435void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002436{
Tejun Heo570106d2008-10-20 13:10:21 +09002437 struct ata_port *ap = qc->ap;
2438 unsigned long flags;
2439
2440 spin_lock_irqsave(ap->lock, flags);
2441
2442 ap->hsm_task_state = HSM_ST_IDLE;
2443
2444 if (ap->ioaddr.bmdma_addr)
Benjamin Herrenschmidt294264a2009-12-02 11:36:28 +11002445 ap->ops->bmdma_stop(qc);
Tejun Heo570106d2008-10-20 13:10:21 +09002446
2447 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002448}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002449EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002450
Alan Coxd92e74d2007-06-07 16:19:15 +01002451/**
2452 * ata_sff_port_start - Set port up for dma.
2453 * @ap: Port to initialize
2454 *
2455 * Called just after data structures for each port are
2456 * initialized. Allocates space for PRD table if the device
2457 * is DMA capable SFF.
2458 *
2459 * May be used as the port_start() entry in ata_port_operations.
2460 *
2461 * LOCKING:
2462 * Inherited from caller.
2463 */
Alan Coxd92e74d2007-06-07 16:19:15 +01002464int ata_sff_port_start(struct ata_port *ap)
2465{
2466 if (ap->ioaddr.bmdma_addr)
2467 return ata_port_start(ap);
2468 return 0;
2469}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002470EXPORT_SYMBOL_GPL(ata_sff_port_start);
Alan Coxd92e74d2007-06-07 16:19:15 +01002471
Tejun Heo272f7882008-03-25 22:16:40 +09002472/**
Alan Coxe3cf95d2009-04-09 17:31:17 +01002473 * ata_sff_port_start32 - Set port up for dma.
2474 * @ap: Port to initialize
2475 *
2476 * Called just after data structures for each port are
2477 * initialized. Allocates space for PRD table if the device
2478 * is DMA capable SFF.
2479 *
2480 * May be used as the port_start() entry in ata_port_operations for
2481 * devices that are capable of 32bit PIO.
2482 *
2483 * LOCKING:
2484 * Inherited from caller.
2485 */
2486int ata_sff_port_start32(struct ata_port *ap)
2487{
2488 ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;
2489 if (ap->ioaddr.bmdma_addr)
2490 return ata_port_start(ap);
2491 return 0;
2492}
2493EXPORT_SYMBOL_GPL(ata_sff_port_start32);
2494
2495/**
Tejun Heo9363c382008-04-07 22:47:16 +09002496 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
Tejun Heo624d5c52008-03-25 22:16:41 +09002497 * @ioaddr: IO address structure to be initialized
2498 *
2499 * Utility function which initializes data_addr, error_addr,
2500 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2501 * device_addr, status_addr, and command_addr to standard offsets
2502 * relative to cmd_addr.
2503 *
2504 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2505 */
Tejun Heo9363c382008-04-07 22:47:16 +09002506void ata_sff_std_ports(struct ata_ioports *ioaddr)
Tejun Heo624d5c52008-03-25 22:16:41 +09002507{
2508 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2509 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2510 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2511 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2512 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2513 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2514 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2515 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2516 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2517 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2518}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002519EXPORT_SYMBOL_GPL(ata_sff_std_ports);
Tejun Heo624d5c52008-03-25 22:16:41 +09002520
Tejun Heo9363c382008-04-07 22:47:16 +09002521unsigned long ata_bmdma_mode_filter(struct ata_device *adev,
2522 unsigned long xfer_mask)
Tejun Heo071ce342008-03-25 22:16:42 +09002523{
2524 /* Filter out DMA modes if the device has been configured by
2525 the BIOS as PIO only */
2526
2527 if (adev->link->ap->ioaddr.bmdma_addr == NULL)
2528 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2529 return xfer_mask;
2530}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002531EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter);
Tejun Heo071ce342008-03-25 22:16:42 +09002532
Tejun Heo624d5c52008-03-25 22:16:41 +09002533/**
Tejun Heo272f7882008-03-25 22:16:40 +09002534 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2535 * @qc: Info associated with this ATA transaction.
2536 *
2537 * LOCKING:
2538 * spin_lock_irqsave(host lock)
2539 */
2540void ata_bmdma_setup(struct ata_queued_cmd *qc)
2541{
2542 struct ata_port *ap = qc->ap;
2543 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
2544 u8 dmactl;
2545
2546 /* load PRD table addr. */
2547 mb(); /* make sure PRD table writes are visible to controller */
2548 iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
2549
2550 /* specify data direction, triple-check start bit is clear */
2551 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2552 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
2553 if (!rw)
2554 dmactl |= ATA_DMA_WR;
2555 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2556
2557 /* issue r/w command */
Tejun Heo5682ed32008-04-07 22:47:16 +09002558 ap->ops->sff_exec_command(ap, &qc->tf);
Tejun Heo272f7882008-03-25 22:16:40 +09002559}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002560EXPORT_SYMBOL_GPL(ata_bmdma_setup);
Tejun Heo272f7882008-03-25 22:16:40 +09002561
2562/**
2563 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2564 * @qc: Info associated with this ATA transaction.
2565 *
2566 * LOCKING:
2567 * spin_lock_irqsave(host lock)
2568 */
2569void ata_bmdma_start(struct ata_queued_cmd *qc)
2570{
2571 struct ata_port *ap = qc->ap;
2572 u8 dmactl;
2573
2574 /* start host DMA transaction */
2575 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2576 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2577
2578 /* Strictly, one may wish to issue an ioread8() here, to
2579 * flush the mmio write. However, control also passes
2580 * to the hardware at this point, and it will interrupt
2581 * us when we are to resume control. So, in effect,
2582 * we don't care when the mmio write flushes.
2583 * Further, a read of the DMA status register _immediately_
2584 * following the write may not be what certain flaky hardware
2585 * is expected, so I think it is best to not add a readb()
2586 * without first all the MMIO ATA cards/mobos.
2587 * Or maybe I'm just being paranoid.
2588 *
2589 * FIXME: The posting of this write means I/O starts are
2590 * unneccessarily delayed for MMIO
2591 */
2592}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002593EXPORT_SYMBOL_GPL(ata_bmdma_start);
Tejun Heo272f7882008-03-25 22:16:40 +09002594
2595/**
2596 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2597 * @qc: Command we are ending DMA for
2598 *
2599 * Clears the ATA_DMA_START flag in the dma control register
2600 *
2601 * May be used as the bmdma_stop() entry in ata_port_operations.
2602 *
2603 * LOCKING:
2604 * spin_lock_irqsave(host lock)
2605 */
2606void ata_bmdma_stop(struct ata_queued_cmd *qc)
2607{
2608 struct ata_port *ap = qc->ap;
2609 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2610
2611 /* clear start/stop bit */
2612 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
2613 mmio + ATA_DMA_CMD);
2614
2615 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
Alan Coxa57c1ba2008-05-29 22:10:58 +01002616 ata_sff_dma_pause(ap);
Tejun Heo272f7882008-03-25 22:16:40 +09002617}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002618EXPORT_SYMBOL_GPL(ata_bmdma_stop);
Tejun Heo272f7882008-03-25 22:16:40 +09002619
2620/**
2621 * ata_bmdma_status - Read PCI IDE BMDMA status
2622 * @ap: Port associated with this ATA transaction.
2623 *
2624 * Read and return BMDMA status register.
2625 *
2626 * May be used as the bmdma_status() entry in ata_port_operations.
2627 *
2628 * LOCKING:
2629 * spin_lock_irqsave(host lock)
2630 */
2631u8 ata_bmdma_status(struct ata_port *ap)
2632{
2633 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
2634}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002635EXPORT_SYMBOL_GPL(ata_bmdma_status);
Tejun Heo272f7882008-03-25 22:16:40 +09002636
2637/**
Tejun Heo624d5c52008-03-25 22:16:41 +09002638 * ata_bus_reset - reset host port and associated ATA channel
2639 * @ap: port to reset
2640 *
2641 * This is typically the first time we actually start issuing
2642 * commands to the ATA channel. We wait for BSY to clear, then
2643 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2644 * result. Determine what devices, if any, are on the channel
2645 * by looking at the device 0/1 error register. Look at the signature
2646 * stored in each device's taskfile registers, to determine if
2647 * the device is ATA or ATAPI.
2648 *
2649 * LOCKING:
2650 * PCI/etc. bus probe sem.
2651 * Obtains host lock.
2652 *
2653 * SIDE EFFECTS:
2654 * Sets ATA_FLAG_DISABLED if bus reset fails.
2655 *
2656 * DEPRECATED:
2657 * This function is only for drivers which still use old EH and
2658 * will be removed soon.
Tejun Heo272f7882008-03-25 22:16:40 +09002659 */
Tejun Heo624d5c52008-03-25 22:16:41 +09002660void ata_bus_reset(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +09002661{
Tejun Heo624d5c52008-03-25 22:16:41 +09002662 struct ata_device *device = ap->link.device;
2663 struct ata_ioports *ioaddr = &ap->ioaddr;
2664 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2665 u8 err;
2666 unsigned int dev0, dev1 = 0, devmask = 0;
2667 int rc;
2668
2669 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
2670
2671 /* determine if device 0/1 are present */
2672 if (ap->flags & ATA_FLAG_SATA_RESET)
2673 dev0 = 1;
2674 else {
2675 dev0 = ata_devchk(ap, 0);
2676 if (slave_possible)
2677 dev1 = ata_devchk(ap, 1);
2678 }
2679
2680 if (dev0)
2681 devmask |= (1 << 0);
2682 if (dev1)
2683 devmask |= (1 << 1);
2684
2685 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002686 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002687
2688 /* issue bus reset */
2689 if (ap->flags & ATA_FLAG_SRST) {
Tejun Heo341c2c92008-05-20 02:17:51 +09002690 rc = ata_bus_softreset(ap, devmask,
2691 ata_deadline(jiffies, 40000));
Tejun Heo624d5c52008-03-25 22:16:41 +09002692 if (rc && rc != -ENODEV)
2693 goto err_out;
2694 }
2695
2696 /*
2697 * determine by signature whether we have ATA or ATAPI devices
2698 */
Tejun Heo9363c382008-04-07 22:47:16 +09002699 device[0].class = ata_sff_dev_classify(&device[0], dev0, &err);
Tejun Heo624d5c52008-03-25 22:16:41 +09002700 if ((slave_possible) && (err != 0x81))
Tejun Heo9363c382008-04-07 22:47:16 +09002701 device[1].class = ata_sff_dev_classify(&device[1], dev1, &err);
Tejun Heo624d5c52008-03-25 22:16:41 +09002702
2703 /* is double-select really necessary? */
2704 if (device[1].class != ATA_DEV_NONE)
Tejun Heo5682ed32008-04-07 22:47:16 +09002705 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09002706 if (device[0].class != ATA_DEV_NONE)
Tejun Heo5682ed32008-04-07 22:47:16 +09002707 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002708
2709 /* if no devices were detected, disable this port */
2710 if ((device[0].class == ATA_DEV_NONE) &&
2711 (device[1].class == ATA_DEV_NONE))
2712 goto err_out;
2713
2714 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2715 /* set up device control for ATA_FLAG_SATA_RESET */
2716 iowrite8(ap->ctl, ioaddr->ctl_addr);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002717 ap->last_ctl = ap->ctl;
Tejun Heo624d5c52008-03-25 22:16:41 +09002718 }
2719
2720 DPRINTK("EXIT\n");
2721 return;
2722
2723err_out:
2724 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2725 ata_port_disable(ap);
2726
2727 DPRINTK("EXIT\n");
Tejun Heo272f7882008-03-25 22:16:40 +09002728}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002729EXPORT_SYMBOL_GPL(ata_bus_reset);
Tejun Heo272f7882008-03-25 22:16:40 +09002730
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002731#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +00002732
Tejun Heo272f7882008-03-25 22:16:40 +09002733/**
Tejun Heo9363c382008-04-07 22:47:16 +09002734 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
Tejun Heo272f7882008-03-25 22:16:40 +09002735 * @pdev: PCI device
2736 *
2737 * Some PCI ATA devices report simplex mode but in fact can be told to
2738 * enter non simplex mode. This implements the necessary logic to
2739 * perform the task on such devices. Calling it on other devices will
2740 * have -undefined- behaviour.
2741 */
Tejun Heo9363c382008-04-07 22:47:16 +09002742int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
Alan4112e162007-01-08 12:10:05 +00002743{
Tejun Heo272f7882008-03-25 22:16:40 +09002744 unsigned long bmdma = pci_resource_start(pdev, 4);
2745 u8 simplex;
Jeff Garzika84471f2007-02-26 05:51:33 -05002746
Tejun Heo272f7882008-03-25 22:16:40 +09002747 if (bmdma == 0)
2748 return -ENOENT;
2749
2750 simplex = inb(bmdma + 0x02);
2751 outb(simplex & 0x60, bmdma + 0x02);
2752 simplex = inb(bmdma + 0x02);
2753 if (simplex & 0x80)
2754 return -EOPNOTSUPP;
2755 return 0;
2756}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002757EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
Tejun Heo272f7882008-03-25 22:16:40 +09002758
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002759/**
Tejun Heo9363c382008-04-07 22:47:16 +09002760 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
Tejun Heo0f834de2007-04-17 23:44:07 +09002761 * @host: target ATA host
2762 *
2763 * Acquire PCI BMDMA resources and initialize @host accordingly.
2764 *
2765 * LOCKING:
2766 * Inherited from calling layer (may sleep).
2767 *
2768 * RETURNS:
2769 * 0 on success, -errno otherwise.
2770 */
Tejun Heo9363c382008-04-07 22:47:16 +09002771int ata_pci_bmdma_init(struct ata_host *host)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002772{
Tejun Heo0f834de2007-04-17 23:44:07 +09002773 struct device *gdev = host->dev;
2774 struct pci_dev *pdev = to_pci_dev(gdev);
2775 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002776
Alan Cox6fdc99a2007-07-26 18:41:30 +01002777 /* No BAR4 allocation: No DMA */
2778 if (pci_resource_start(pdev, 4) == 0)
2779 return 0;
2780
Tejun Heo0f834de2007-04-17 23:44:07 +09002781 /* TODO: If we get no DMA mask we should fall back to PIO */
2782 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
2783 if (rc)
2784 return rc;
2785 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
2786 if (rc)
2787 return rc;
2788
2789 /* request and iomap DMA region */
Tejun Heo35a10a82008-01-04 18:42:21 +09002790 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
Tejun Heo0f834de2007-04-17 23:44:07 +09002791 if (rc) {
2792 dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n");
2793 return -ENOMEM;
2794 }
2795 host->iomap = pcim_iomap_table(pdev);
2796
Tejun Heo1626aeb2007-05-04 12:43:58 +02002797 for (i = 0; i < 2; i++) {
Tejun Heo0f834de2007-04-17 23:44:07 +09002798 struct ata_port *ap = host->ports[i];
Tejun Heo0f834de2007-04-17 23:44:07 +09002799 void __iomem *bmdma = host->iomap[4] + 8 * i;
2800
2801 if (ata_port_is_dummy(ap))
2802 continue;
2803
Tejun Heo21b0ad42007-04-17 23:44:07 +09002804 ap->ioaddr.bmdma_addr = bmdma;
Tejun Heo0f834de2007-04-17 23:44:07 +09002805 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
2806 (ioread8(bmdma + 2) & 0x80))
2807 host->flags |= ATA_HOST_SIMPLEX;
Tejun Heocbcdd872007-08-18 13:14:55 +09002808
2809 ata_port_desc(ap, "bmdma 0x%llx",
Alan Cox0fe40ff2009-01-05 14:16:13 +00002810 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
Tejun Heo0d5ff562007-02-01 15:06:36 +09002811 }
2812
Tejun Heo0f834de2007-04-17 23:44:07 +09002813 return 0;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002814}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002815EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002816
Tejun Heo272f7882008-03-25 22:16:40 +09002817static int ata_resources_present(struct pci_dev *pdev, int port)
2818{
2819 int i;
2820
2821 /* Check the PCI resources for this channel are enabled */
2822 port = port * 2;
Alan Cox0fe40ff2009-01-05 14:16:13 +00002823 for (i = 0; i < 2; i++) {
Tejun Heo272f7882008-03-25 22:16:40 +09002824 if (pci_resource_start(pdev, port + i) == 0 ||
2825 pci_resource_len(pdev, port + i) == 0)
2826 return 0;
2827 }
2828 return 1;
2829}
2830
Tejun Heod491b272007-04-17 23:44:07 +09002831/**
Tejun Heo9363c382008-04-07 22:47:16 +09002832 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +09002833 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +09002834 *
Tejun Heo1626aeb2007-05-04 12:43:58 +02002835 * Acquire native PCI ATA resources for @host and initialize the
2836 * first two ports of @host accordingly. Ports marked dummy are
2837 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +09002838 *
Tejun Heod583bc12007-07-04 18:02:07 +09002839 * Note that native PCI resources are valid even for legacy hosts
2840 * as we fix up pdev resources array early in boot, so this
2841 * function can be used for both native and legacy SFF hosts.
2842 *
Tejun Heod491b272007-04-17 23:44:07 +09002843 * LOCKING:
2844 * Inherited from calling layer (may sleep).
2845 *
2846 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +02002847 * 0 if at least one port is initialized, -ENODEV if no port is
2848 * available.
Tejun Heod491b272007-04-17 23:44:07 +09002849 */
Tejun Heo9363c382008-04-07 22:47:16 +09002850int ata_pci_sff_init_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +09002851{
2852 struct device *gdev = host->dev;
2853 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002854 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +09002855 int i, rc;
2856
Tejun Heod491b272007-04-17 23:44:07 +09002857 /* request, iomap BARs and init port addresses accordingly */
2858 for (i = 0; i < 2; i++) {
2859 struct ata_port *ap = host->ports[i];
2860 int base = i * 2;
2861 void __iomem * const *iomap;
2862
Tejun Heo1626aeb2007-05-04 12:43:58 +02002863 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +09002864 continue;
2865
Tejun Heo1626aeb2007-05-04 12:43:58 +02002866 /* Discard disabled ports. Some controllers show
2867 * their unused channels this way. Disabled ports are
2868 * made dummy.
2869 */
2870 if (!ata_resources_present(pdev, i)) {
2871 ap->ops = &ata_dummy_port_ops;
2872 continue;
2873 }
2874
Tejun Heo35a10a82008-01-04 18:42:21 +09002875 rc = pcim_iomap_regions(pdev, 0x3 << base,
2876 dev_driver_string(gdev));
Tejun Heod491b272007-04-17 23:44:07 +09002877 if (rc) {
Tejun Heo1626aeb2007-05-04 12:43:58 +02002878 dev_printk(KERN_WARNING, gdev,
2879 "failed to request/iomap BARs for port %d "
2880 "(errno=%d)\n", i, rc);
Tejun Heod491b272007-04-17 23:44:07 +09002881 if (rc == -EBUSY)
2882 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002883 ap->ops = &ata_dummy_port_ops;
2884 continue;
Tejun Heod491b272007-04-17 23:44:07 +09002885 }
2886 host->iomap = iomap = pcim_iomap_table(pdev);
2887
2888 ap->ioaddr.cmd_addr = iomap[base];
2889 ap->ioaddr.altstatus_addr =
2890 ap->ioaddr.ctl_addr = (void __iomem *)
2891 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
Tejun Heo9363c382008-04-07 22:47:16 +09002892 ata_sff_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002893
Tejun Heocbcdd872007-08-18 13:14:55 +09002894 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2895 (unsigned long long)pci_resource_start(pdev, base),
2896 (unsigned long long)pci_resource_start(pdev, base + 1));
2897
Tejun Heo1626aeb2007-05-04 12:43:58 +02002898 mask |= 1 << i;
2899 }
2900
2901 if (!mask) {
2902 dev_printk(KERN_ERR, gdev, "no available native port\n");
2903 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +09002904 }
2905
2906 return 0;
2907}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002908EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
Tejun Heod491b272007-04-17 23:44:07 +09002909
Tejun Heo21b0ad42007-04-17 23:44:07 +09002910/**
Tejun Heo9363c382008-04-07 22:47:16 +09002911 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +09002912 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +02002913 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +09002914 * @r_host: out argument for the initialized ATA host
2915 *
2916 * Helper to allocate ATA host for @pdev, acquire all native PCI
2917 * resources and initialize it accordingly in one go.
2918 *
2919 * LOCKING:
2920 * Inherited from calling layer (may sleep).
2921 *
2922 * RETURNS:
2923 * 0 on success, -errno otherwise.
2924 */
Tejun Heo9363c382008-04-07 22:47:16 +09002925int ata_pci_sff_prepare_host(struct pci_dev *pdev,
Alan Cox0fe40ff2009-01-05 14:16:13 +00002926 const struct ata_port_info * const *ppi,
Tejun Heod583bc12007-07-04 18:02:07 +09002927 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +09002928{
2929 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +09002930 int rc;
2931
2932 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2933 return -ENOMEM;
2934
2935 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2936 if (!host) {
2937 dev_printk(KERN_ERR, &pdev->dev,
2938 "failed to allocate ATA host\n");
2939 rc = -ENOMEM;
2940 goto err_out;
2941 }
2942
Tejun Heo9363c382008-04-07 22:47:16 +09002943 rc = ata_pci_sff_init_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002944 if (rc)
2945 goto err_out;
2946
2947 /* init DMA related stuff */
Tejun Heo9363c382008-04-07 22:47:16 +09002948 rc = ata_pci_bmdma_init(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002949 if (rc)
2950 goto err_bmdma;
2951
2952 devres_remove_group(&pdev->dev, NULL);
2953 *r_host = host;
2954 return 0;
2955
Alan Cox0fe40ff2009-01-05 14:16:13 +00002956err_bmdma:
Tejun Heo21b0ad42007-04-17 23:44:07 +09002957 /* This is necessary because PCI and iomap resources are
2958 * merged and releasing the top group won't release the
2959 * acquired resources if some of those have been acquired
2960 * before entering this function.
2961 */
2962 pcim_iounmap_regions(pdev, 0xf);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002963err_out:
Tejun Heo21b0ad42007-04-17 23:44:07 +09002964 devres_release_group(&pdev->dev, NULL);
2965 return rc;
2966}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002967EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002968
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002969/**
Tejun Heo9363c382008-04-07 22:47:16 +09002970 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002971 * @host: target SFF ATA host
2972 * @irq_handler: irq_handler used when requesting IRQ(s)
2973 * @sht: scsi_host_template to use when registering the host
2974 *
2975 * This is the counterpart of ata_host_activate() for SFF ATA
2976 * hosts. This separate helper is necessary because SFF hosts
2977 * use two separate interrupts in legacy mode.
2978 *
2979 * LOCKING:
2980 * Inherited from calling layer (may sleep).
2981 *
2982 * RETURNS:
2983 * 0 on success, -errno otherwise.
2984 */
Tejun Heo9363c382008-04-07 22:47:16 +09002985int ata_pci_sff_activate_host(struct ata_host *host,
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002986 irq_handler_t irq_handler,
2987 struct scsi_host_template *sht)
2988{
2989 struct device *dev = host->dev;
2990 struct pci_dev *pdev = to_pci_dev(dev);
2991 const char *drv_name = dev_driver_string(host->dev);
2992 int legacy_mode = 0, rc;
2993
2994 rc = ata_host_start(host);
2995 if (rc)
2996 return rc;
2997
2998 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2999 u8 tmp8, mask;
3000
3001 /* TODO: What if one channel is in native mode ... */
3002 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
3003 mask = (1 << 2) | (1 << 0);
3004 if ((tmp8 & mask) != mask)
3005 legacy_mode = 1;
3006#if defined(CONFIG_NO_ATA_LEGACY)
3007 /* Some platforms with PCI limits cannot address compat
3008 port space. In that case we punt if their firmware has
3009 left a device in compatibility mode */
3010 if (legacy_mode) {
3011 printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
3012 return -EOPNOTSUPP;
3013 }
3014#endif
3015 }
3016
3017 if (!devres_open_group(dev, NULL, GFP_KERNEL))
3018 return -ENOMEM;
3019
3020 if (!legacy_mode && pdev->irq) {
3021 rc = devm_request_irq(dev, pdev->irq, irq_handler,
3022 IRQF_SHARED, drv_name, host);
3023 if (rc)
3024 goto out;
3025
3026 ata_port_desc(host->ports[0], "irq %d", pdev->irq);
3027 ata_port_desc(host->ports[1], "irq %d", pdev->irq);
3028 } else if (legacy_mode) {
3029 if (!ata_port_is_dummy(host->ports[0])) {
3030 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
3031 irq_handler, IRQF_SHARED,
3032 drv_name, host);
3033 if (rc)
3034 goto out;
3035
3036 ata_port_desc(host->ports[0], "irq %d",
3037 ATA_PRIMARY_IRQ(pdev));
3038 }
3039
3040 if (!ata_port_is_dummy(host->ports[1])) {
3041 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
3042 irq_handler, IRQF_SHARED,
3043 drv_name, host);
3044 if (rc)
3045 goto out;
3046
3047 ata_port_desc(host->ports[1], "irq %d",
3048 ATA_SECONDARY_IRQ(pdev));
3049 }
3050 }
3051
3052 rc = ata_host_register(host, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00003053out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09003054 if (rc == 0)
3055 devres_remove_group(dev, NULL);
3056 else
3057 devres_release_group(dev, NULL);
3058
3059 return rc;
3060}
Alan Cox0fe40ff2009-01-05 14:16:13 +00003061EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
Tejun Heo4e6b79f2008-01-18 18:36:28 +09003062
3063/**
Tejun Heo9363c382008-04-07 22:47:16 +09003064 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003065 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +02003066 * @ppi: array of port_info, must be enough for two ports
Tejun Heo1bd5b712008-03-25 12:22:49 +09003067 * @sht: scsi_host_template to use when registering the host
Tejun Heo887125e2008-03-25 12:22:49 +09003068 * @host_priv: host private_data
Alan Cox16ea0fc2010-02-23 02:26:06 -05003069 * @hflag: host flags
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003070 *
3071 * This is a helper function which can be called from a driver's
3072 * xxx_init_one() probe function if the hardware uses traditional
3073 * IDE taskfile registers.
3074 *
3075 * This function calls pci_enable_device(), reserves its register
3076 * regions, sets the dma mask, enables bus master mode, and calls
3077 * ata_device_add()
3078 *
Alan Cox2ec7df02006-08-10 16:59:10 +09003079 * ASSUMPTION:
3080 * Nobody makes a single channel controller that appears solely as
3081 * the secondary legacy port on PCI.
3082 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003083 * LOCKING:
3084 * Inherited from PCI layer (may sleep).
3085 *
3086 * RETURNS:
3087 * Zero on success, negative on errno-based value on error.
3088 */
Tejun Heo9363c382008-04-07 22:47:16 +09003089int ata_pci_sff_init_one(struct pci_dev *pdev,
Alan Cox16ea0fc2010-02-23 02:26:06 -05003090 const struct ata_port_info * const *ppi,
3091 struct scsi_host_template *sht, void *host_priv, int hflag)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003092{
Tejun Heof0d36ef2007-01-20 16:00:28 +09003093 struct device *dev = &pdev->dev;
Tejun Heo1626aeb2007-05-04 12:43:58 +02003094 const struct ata_port_info *pi = NULL;
Tejun Heo0f834de2007-04-17 23:44:07 +09003095 struct ata_host *host = NULL;
Tejun Heo1626aeb2007-05-04 12:43:58 +02003096 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003097
3098 DPRINTK("ENTER\n");
3099
Tejun Heo1626aeb2007-05-04 12:43:58 +02003100 /* look up the first valid port_info */
3101 for (i = 0; i < 2 && ppi[i]; i++) {
3102 if (ppi[i]->port_ops != &ata_dummy_port_ops) {
3103 pi = ppi[i];
3104 break;
3105 }
3106 }
3107
3108 if (!pi) {
3109 dev_printk(KERN_ERR, &pdev->dev,
3110 "no valid port_info specified\n");
3111 return -EINVAL;
3112 }
3113
Tejun Heof0d36ef2007-01-20 16:00:28 +09003114 if (!devres_open_group(dev, NULL, GFP_KERNEL))
3115 return -ENOMEM;
3116
Tejun Heof0d36ef2007-01-20 16:00:28 +09003117 rc = pcim_enable_device(pdev);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003118 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09003119 goto out;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003120
Tejun Heo4e6b79f2008-01-18 18:36:28 +09003121 /* prepare and activate SFF host */
Tejun Heo9363c382008-04-07 22:47:16 +09003122 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
Tejun Heod583bc12007-07-04 18:02:07 +09003123 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09003124 goto out;
Tejun Heo887125e2008-03-25 12:22:49 +09003125 host->private_data = host_priv;
Alan Cox16ea0fc2010-02-23 02:26:06 -05003126 host->flags |= hflag;
Tejun Heod491b272007-04-17 23:44:07 +09003127
Tejun Heod491b272007-04-17 23:44:07 +09003128 pci_set_master(pdev);
Tejun Heo9363c382008-04-07 22:47:16 +09003129 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00003130out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09003131 if (rc == 0)
3132 devres_remove_group(&pdev->dev, NULL);
3133 else
3134 devres_release_group(&pdev->dev, NULL);
Tejun Heod491b272007-04-17 23:44:07 +09003135
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003136 return rc;
3137}
Tejun Heo9363c382008-04-07 22:47:16 +09003138EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
Alan Cox0fe40ff2009-01-05 14:16:13 +00003139
Tejun Heo624d5c52008-03-25 22:16:41 +09003140#endif /* CONFIG_PCI */