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Magnus Damm9570ef22009-05-01 06:51:00 +00001/*
2 * SuperH Timer Support - TMU
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Magnus Damm9570ef22009-05-01 06:51:00 +000014 */
15
Magnus Damm9570ef22009-05-01 06:51:00 +000016#include <linux/clk.h>
Magnus Damm9570ef22009-05-01 06:51:00 +000017#include <linux/clockchips.h>
Laurent Pinchart13931f82014-02-12 16:56:44 +010018#include <linux/clocksource.h>
19#include <linux/delay.h>
20#include <linux/err.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/io.h>
24#include <linux/ioport.h>
25#include <linux/irq.h>
Paul Gortmaker7deeab52011-07-03 13:36:22 -040026#include <linux/module.h>
Laurent Pinchart3e29b552014-04-11 16:23:40 +020027#include <linux/of.h>
Laurent Pinchart13931f82014-02-12 16:56:44 +010028#include <linux/platform_device.h>
Rafael J. Wysocki2ee619f2012-03-13 22:40:00 +010029#include <linux/pm_domain.h>
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +020030#include <linux/pm_runtime.h>
Laurent Pinchart13931f82014-02-12 16:56:44 +010031#include <linux/sh_timer.h>
32#include <linux/slab.h>
33#include <linux/spinlock.h>
Magnus Damm9570ef22009-05-01 06:51:00 +000034
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010035enum sh_tmu_model {
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010036 SH_TMU,
37 SH_TMU_SH3,
38};
39
Laurent Pinchart0a72aa32014-01-27 22:04:17 +010040struct sh_tmu_device;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010041
42struct sh_tmu_channel {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +010043 struct sh_tmu_device *tmu;
Laurent Pinchartfe68eb82014-01-27 22:04:17 +010044 unsigned int index;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010045
Laurent Pinchartde693462014-01-27 22:04:17 +010046 void __iomem *base;
Laurent Pinchart1c56cf62014-02-17 11:27:49 +010047 int irq;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010048
Magnus Damm9570ef22009-05-01 06:51:00 +000049 unsigned long rate;
50 unsigned long periodic;
51 struct clock_event_device ced;
52 struct clocksource cs;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +020053 bool cs_enabled;
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +020054 unsigned int enable_count;
Magnus Damm9570ef22009-05-01 06:51:00 +000055};
56
Laurent Pinchart0a72aa32014-01-27 22:04:17 +010057struct sh_tmu_device {
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010058 struct platform_device *pdev;
59
60 void __iomem *mapbase;
61 struct clk *clk;
62
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010063 enum sh_tmu_model model;
64
Laurent Pinchart2b027f12014-02-17 16:49:05 +010065 raw_spinlock_t lock; /* Protect the shared start/stop register */
66
Laurent Pincharta5de49f2014-01-27 22:04:17 +010067 struct sh_tmu_channel *channels;
68 unsigned int num_channels;
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010069
70 bool has_clockevent;
71 bool has_clocksource;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010072};
73
Magnus Damm9570ef22009-05-01 06:51:00 +000074#define TSTR -1 /* shared register */
75#define TCOR 0 /* channel register */
76#define TCNT 1 /* channel register */
77#define TCR 2 /* channel register */
78
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +010079#define TCR_UNF (1 << 8)
80#define TCR_UNIE (1 << 5)
81#define TCR_TPSC_CLK4 (0 << 0)
82#define TCR_TPSC_CLK16 (1 << 0)
83#define TCR_TPSC_CLK64 (2 << 0)
84#define TCR_TPSC_CLK256 (3 << 0)
85#define TCR_TPSC_CLK1024 (4 << 0)
86#define TCR_TPSC_MASK (7 << 0)
87
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010088static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr)
Magnus Damm9570ef22009-05-01 06:51:00 +000089{
Magnus Damm9570ef22009-05-01 06:51:00 +000090 unsigned long offs;
91
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010092 if (reg_nr == TSTR) {
93 switch (ch->tmu->model) {
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010094 case SH_TMU_SH3:
95 return ioread8(ch->tmu->mapbase + 2);
96 case SH_TMU:
97 return ioread8(ch->tmu->mapbase + 4);
98 }
99 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000100
101 offs = reg_nr << 2;
102
103 if (reg_nr == TCR)
Laurent Pinchartde693462014-01-27 22:04:17 +0100104 return ioread16(ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000105 else
Laurent Pinchartde693462014-01-27 22:04:17 +0100106 return ioread32(ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000107}
108
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100109static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr,
Magnus Damm9570ef22009-05-01 06:51:00 +0000110 unsigned long value)
111{
Magnus Damm9570ef22009-05-01 06:51:00 +0000112 unsigned long offs;
113
114 if (reg_nr == TSTR) {
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100115 switch (ch->tmu->model) {
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100116 case SH_TMU_SH3:
117 return iowrite8(value, ch->tmu->mapbase + 2);
118 case SH_TMU:
119 return iowrite8(value, ch->tmu->mapbase + 4);
120 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000121 }
122
123 offs = reg_nr << 2;
124
125 if (reg_nr == TCR)
Laurent Pinchartde693462014-01-27 22:04:17 +0100126 iowrite16(value, ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000127 else
Laurent Pinchartde693462014-01-27 22:04:17 +0100128 iowrite32(value, ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000129}
130
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100131static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start)
Magnus Damm9570ef22009-05-01 06:51:00 +0000132{
Magnus Damm9570ef22009-05-01 06:51:00 +0000133 unsigned long flags, value;
134
135 /* start stop register shared by multiple timer channels */
Laurent Pinchart2b027f12014-02-17 16:49:05 +0100136 raw_spin_lock_irqsave(&ch->tmu->lock, flags);
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100137 value = sh_tmu_read(ch, TSTR);
Magnus Damm9570ef22009-05-01 06:51:00 +0000138
139 if (start)
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100140 value |= 1 << ch->index;
Magnus Damm9570ef22009-05-01 06:51:00 +0000141 else
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100142 value &= ~(1 << ch->index);
Magnus Damm9570ef22009-05-01 06:51:00 +0000143
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100144 sh_tmu_write(ch, TSTR, value);
Laurent Pinchart2b027f12014-02-17 16:49:05 +0100145 raw_spin_unlock_irqrestore(&ch->tmu->lock, flags);
Magnus Damm9570ef22009-05-01 06:51:00 +0000146}
147
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100148static int __sh_tmu_enable(struct sh_tmu_channel *ch)
Magnus Damm9570ef22009-05-01 06:51:00 +0000149{
Magnus Damm9570ef22009-05-01 06:51:00 +0000150 int ret;
151
Paul Mundtd4905ce2011-05-31 15:23:20 +0900152 /* enable clock */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100153 ret = clk_enable(ch->tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000154 if (ret) {
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100155 dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n",
156 ch->index);
Magnus Damm9570ef22009-05-01 06:51:00 +0000157 return ret;
158 }
159
160 /* make sure channel is disabled */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100161 sh_tmu_start_stop_ch(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000162
163 /* maximum timeout */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100164 sh_tmu_write(ch, TCOR, 0xffffffff);
165 sh_tmu_write(ch, TCNT, 0xffffffff);
Magnus Damm9570ef22009-05-01 06:51:00 +0000166
167 /* configure channel to parent clock / 4, irq off */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100168 ch->rate = clk_get_rate(ch->tmu->clk) / 4;
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +0100169 sh_tmu_write(ch, TCR, TCR_TPSC_CLK4);
Magnus Damm9570ef22009-05-01 06:51:00 +0000170
171 /* enable channel */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100172 sh_tmu_start_stop_ch(ch, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000173
174 return 0;
175}
176
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100177static int sh_tmu_enable(struct sh_tmu_channel *ch)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200178{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100179 if (ch->enable_count++ > 0)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200180 return 0;
181
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100182 pm_runtime_get_sync(&ch->tmu->pdev->dev);
183 dev_pm_syscore_device(&ch->tmu->pdev->dev, true);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200184
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100185 return __sh_tmu_enable(ch);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200186}
187
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100188static void __sh_tmu_disable(struct sh_tmu_channel *ch)
Magnus Damm9570ef22009-05-01 06:51:00 +0000189{
190 /* disable channel */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100191 sh_tmu_start_stop_ch(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000192
Magnus Dammbe890a12009-06-17 05:04:04 +0000193 /* disable interrupts in TMU block */
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +0100194 sh_tmu_write(ch, TCR, TCR_TPSC_CLK4);
Magnus Dammbe890a12009-06-17 05:04:04 +0000195
Paul Mundtd4905ce2011-05-31 15:23:20 +0900196 /* stop clock */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100197 clk_disable(ch->tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000198}
199
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100200static void sh_tmu_disable(struct sh_tmu_channel *ch)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200201{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100202 if (WARN_ON(ch->enable_count == 0))
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200203 return;
204
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100205 if (--ch->enable_count > 0)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200206 return;
207
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100208 __sh_tmu_disable(ch);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200209
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100210 dev_pm_syscore_device(&ch->tmu->pdev->dev, false);
211 pm_runtime_put(&ch->tmu->pdev->dev);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200212}
213
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100214static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta,
Magnus Damm9570ef22009-05-01 06:51:00 +0000215 int periodic)
216{
217 /* stop timer */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100218 sh_tmu_start_stop_ch(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000219
220 /* acknowledge interrupt */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100221 sh_tmu_read(ch, TCR);
Magnus Damm9570ef22009-05-01 06:51:00 +0000222
223 /* enable interrupt */
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +0100224 sh_tmu_write(ch, TCR, TCR_UNIE | TCR_TPSC_CLK4);
Magnus Damm9570ef22009-05-01 06:51:00 +0000225
226 /* reload delta value in case of periodic timer */
227 if (periodic)
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100228 sh_tmu_write(ch, TCOR, delta);
Magnus Damm9570ef22009-05-01 06:51:00 +0000229 else
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100230 sh_tmu_write(ch, TCOR, 0xffffffff);
Magnus Damm9570ef22009-05-01 06:51:00 +0000231
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100232 sh_tmu_write(ch, TCNT, delta);
Magnus Damm9570ef22009-05-01 06:51:00 +0000233
234 /* start timer */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100235 sh_tmu_start_stop_ch(ch, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000236}
237
238static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id)
239{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100240 struct sh_tmu_channel *ch = dev_id;
Magnus Damm9570ef22009-05-01 06:51:00 +0000241
242 /* disable or acknowledge interrupt */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100243 if (ch->ced.mode == CLOCK_EVT_MODE_ONESHOT)
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +0100244 sh_tmu_write(ch, TCR, TCR_TPSC_CLK4);
Magnus Damm9570ef22009-05-01 06:51:00 +0000245 else
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +0100246 sh_tmu_write(ch, TCR, TCR_UNIE | TCR_TPSC_CLK4);
Magnus Damm9570ef22009-05-01 06:51:00 +0000247
248 /* notify clockevent layer */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100249 ch->ced.event_handler(&ch->ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000250 return IRQ_HANDLED;
251}
252
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100253static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs)
Magnus Damm9570ef22009-05-01 06:51:00 +0000254{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100255 return container_of(cs, struct sh_tmu_channel, cs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000256}
257
258static cycle_t sh_tmu_clocksource_read(struct clocksource *cs)
259{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100260 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000261
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100262 return sh_tmu_read(ch, TCNT) ^ 0xffffffff;
Magnus Damm9570ef22009-05-01 06:51:00 +0000263}
264
265static int sh_tmu_clocksource_enable(struct clocksource *cs)
266{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100267 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Magnus Damm0aeac452011-04-25 22:38:37 +0900268 int ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000269
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100270 if (WARN_ON(ch->cs_enabled))
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200271 return 0;
272
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100273 ret = sh_tmu_enable(ch);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200274 if (!ret) {
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100275 __clocksource_updatefreq_hz(cs, ch->rate);
276 ch->cs_enabled = true;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200277 }
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200278
Magnus Damm0aeac452011-04-25 22:38:37 +0900279 return ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000280}
281
282static void sh_tmu_clocksource_disable(struct clocksource *cs)
283{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100284 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200285
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100286 if (WARN_ON(!ch->cs_enabled))
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200287 return;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200288
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100289 sh_tmu_disable(ch);
290 ch->cs_enabled = false;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200291}
292
293static void sh_tmu_clocksource_suspend(struct clocksource *cs)
294{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100295 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200296
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100297 if (!ch->cs_enabled)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200298 return;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200299
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100300 if (--ch->enable_count == 0) {
301 __sh_tmu_disable(ch);
302 pm_genpd_syscore_poweroff(&ch->tmu->pdev->dev);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200303 }
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200304}
305
306static void sh_tmu_clocksource_resume(struct clocksource *cs)
307{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100308 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200309
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100310 if (!ch->cs_enabled)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200311 return;
312
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100313 if (ch->enable_count++ == 0) {
314 pm_genpd_syscore_poweron(&ch->tmu->pdev->dev);
315 __sh_tmu_enable(ch);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200316 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000317}
318
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100319static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch,
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100320 const char *name)
Magnus Damm9570ef22009-05-01 06:51:00 +0000321{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100322 struct clocksource *cs = &ch->cs;
Magnus Damm9570ef22009-05-01 06:51:00 +0000323
324 cs->name = name;
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100325 cs->rating = 200;
Magnus Damm9570ef22009-05-01 06:51:00 +0000326 cs->read = sh_tmu_clocksource_read;
327 cs->enable = sh_tmu_clocksource_enable;
328 cs->disable = sh_tmu_clocksource_disable;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200329 cs->suspend = sh_tmu_clocksource_suspend;
330 cs->resume = sh_tmu_clocksource_resume;
Magnus Damm9570ef22009-05-01 06:51:00 +0000331 cs->mask = CLOCKSOURCE_MASK(32);
332 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
Aurelien Jarno66f49122010-05-31 21:45:48 +0000333
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100334 dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n",
335 ch->index);
Magnus Damm0aeac452011-04-25 22:38:37 +0900336
337 /* Register with dummy 1 Hz value, gets updated in ->enable() */
338 clocksource_register_hz(cs, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000339 return 0;
340}
341
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100342static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced)
Magnus Damm9570ef22009-05-01 06:51:00 +0000343{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100344 return container_of(ced, struct sh_tmu_channel, ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000345}
346
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100347static void sh_tmu_clock_event_start(struct sh_tmu_channel *ch, int periodic)
Magnus Damm9570ef22009-05-01 06:51:00 +0000348{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100349 struct clock_event_device *ced = &ch->ced;
Magnus Damm9570ef22009-05-01 06:51:00 +0000350
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100351 sh_tmu_enable(ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000352
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100353 clockevents_config(ced, ch->rate);
Magnus Damm9570ef22009-05-01 06:51:00 +0000354
355 if (periodic) {
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100356 ch->periodic = (ch->rate + HZ/2) / HZ;
357 sh_tmu_set_next(ch, ch->periodic, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000358 }
359}
360
361static void sh_tmu_clock_event_mode(enum clock_event_mode mode,
362 struct clock_event_device *ced)
363{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100364 struct sh_tmu_channel *ch = ced_to_sh_tmu(ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000365 int disabled = 0;
366
367 /* deal with old setting first */
368 switch (ced->mode) {
369 case CLOCK_EVT_MODE_PERIODIC:
370 case CLOCK_EVT_MODE_ONESHOT:
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100371 sh_tmu_disable(ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000372 disabled = 1;
373 break;
374 default:
375 break;
376 }
377
378 switch (mode) {
379 case CLOCK_EVT_MODE_PERIODIC:
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100380 dev_info(&ch->tmu->pdev->dev,
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100381 "ch%u: used for periodic clock events\n", ch->index);
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100382 sh_tmu_clock_event_start(ch, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000383 break;
384 case CLOCK_EVT_MODE_ONESHOT:
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100385 dev_info(&ch->tmu->pdev->dev,
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100386 "ch%u: used for oneshot clock events\n", ch->index);
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100387 sh_tmu_clock_event_start(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000388 break;
389 case CLOCK_EVT_MODE_UNUSED:
390 if (!disabled)
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100391 sh_tmu_disable(ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000392 break;
393 case CLOCK_EVT_MODE_SHUTDOWN:
394 default:
395 break;
396 }
397}
398
399static int sh_tmu_clock_event_next(unsigned long delta,
400 struct clock_event_device *ced)
401{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100402 struct sh_tmu_channel *ch = ced_to_sh_tmu(ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000403
404 BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT);
405
406 /* program new delta value */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100407 sh_tmu_set_next(ch, delta, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000408 return 0;
409}
410
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200411static void sh_tmu_clock_event_suspend(struct clock_event_device *ced)
412{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100413 pm_genpd_syscore_poweroff(&ced_to_sh_tmu(ced)->tmu->pdev->dev);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200414}
415
416static void sh_tmu_clock_event_resume(struct clock_event_device *ced)
417{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100418 pm_genpd_syscore_poweron(&ced_to_sh_tmu(ced)->tmu->pdev->dev);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200419}
420
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100421static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100422 const char *name)
Magnus Damm9570ef22009-05-01 06:51:00 +0000423{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100424 struct clock_event_device *ced = &ch->ced;
Magnus Damm9570ef22009-05-01 06:51:00 +0000425 int ret;
426
Magnus Damm9570ef22009-05-01 06:51:00 +0000427 ced->name = name;
428 ced->features = CLOCK_EVT_FEAT_PERIODIC;
429 ced->features |= CLOCK_EVT_FEAT_ONESHOT;
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100430 ced->rating = 200;
Magnus Dammf2a54732014-12-16 18:48:54 +0900431 ced->cpumask = cpu_possible_mask;
Magnus Damm9570ef22009-05-01 06:51:00 +0000432 ced->set_next_event = sh_tmu_clock_event_next;
433 ced->set_mode = sh_tmu_clock_event_mode;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200434 ced->suspend = sh_tmu_clock_event_suspend;
435 ced->resume = sh_tmu_clock_event_resume;
Magnus Damm9570ef22009-05-01 06:51:00 +0000436
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100437 dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n",
438 ch->index);
Paul Mundt39774072012-06-11 17:10:16 +0900439
440 clockevents_config_and_register(ced, 1, 0x300, 0xffffffff);
Paul Mundtda64c2a2010-02-25 16:37:46 +0900441
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100442 ret = request_irq(ch->irq, sh_tmu_interrupt,
Laurent Pinchart1c56cf62014-02-17 11:27:49 +0100443 IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100444 dev_name(&ch->tmu->pdev->dev), ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000445 if (ret) {
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100446 dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n",
447 ch->index, ch->irq);
Magnus Damm9570ef22009-05-01 06:51:00 +0000448 return;
449 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000450}
451
Laurent Pinchart84876d02014-02-17 16:04:16 +0100452static int sh_tmu_register(struct sh_tmu_channel *ch, const char *name,
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100453 bool clockevent, bool clocksource)
Magnus Damm9570ef22009-05-01 06:51:00 +0000454{
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100455 if (clockevent) {
456 ch->tmu->has_clockevent = true;
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100457 sh_tmu_register_clockevent(ch, name);
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100458 } else if (clocksource) {
459 ch->tmu->has_clocksource = true;
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100460 sh_tmu_register_clocksource(ch, name);
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100461 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000462
463 return 0;
464}
465
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100466static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, unsigned int index,
467 bool clockevent, bool clocksource,
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100468 struct sh_tmu_device *tmu)
469{
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100470 /* Skip unused channels. */
471 if (!clockevent && !clocksource)
472 return 0;
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100473
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100474 ch->tmu = tmu;
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100475 ch->index = index;
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100476
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100477 if (tmu->model == SH_TMU_SH3)
478 ch->base = tmu->mapbase + 4 + ch->index * 12;
479 else
480 ch->base = tmu->mapbase + 8 + ch->index * 12;
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100481
Laurent Pinchartc54697a2014-05-16 14:44:23 +0200482 ch->irq = platform_get_irq(tmu->pdev, index);
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100483 if (ch->irq < 0) {
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100484 dev_err(&tmu->pdev->dev, "ch%u: failed to get irq\n",
485 ch->index);
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100486 return ch->irq;
487 }
488
489 ch->cs_enabled = false;
490 ch->enable_count = 0;
491
Laurent Pinchart84876d02014-02-17 16:04:16 +0100492 return sh_tmu_register(ch, dev_name(&tmu->pdev->dev),
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100493 clockevent, clocksource);
494}
495
496static int sh_tmu_map_memory(struct sh_tmu_device *tmu)
497{
498 struct resource *res;
499
500 res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0);
501 if (!res) {
502 dev_err(&tmu->pdev->dev, "failed to get I/O memory\n");
503 return -ENXIO;
504 }
505
506 tmu->mapbase = ioremap_nocache(res->start, resource_size(res));
507 if (tmu->mapbase == NULL)
508 return -ENXIO;
509
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100510 return 0;
511}
512
Laurent Pinchart3e29b552014-04-11 16:23:40 +0200513static int sh_tmu_parse_dt(struct sh_tmu_device *tmu)
514{
515 struct device_node *np = tmu->pdev->dev.of_node;
516
517 tmu->model = SH_TMU;
518 tmu->num_channels = 3;
519
520 of_property_read_u32(np, "#renesas,channels", &tmu->num_channels);
521
522 if (tmu->num_channels != 2 && tmu->num_channels != 3) {
523 dev_err(&tmu->pdev->dev, "invalid number of channels %u\n",
524 tmu->num_channels);
525 return -EINVAL;
526 }
527
528 return 0;
529}
530
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100531static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
Magnus Damm9570ef22009-05-01 06:51:00 +0000532{
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100533 unsigned int i;
Laurent Pinchart1c56cf62014-02-17 11:27:49 +0100534 int ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000535
Laurent Pinchart3e29b552014-04-11 16:23:40 +0200536 tmu->pdev = pdev;
537
538 raw_spin_lock_init(&tmu->lock);
539
540 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
541 ret = sh_tmu_parse_dt(tmu);
542 if (ret < 0)
543 return ret;
544 } else if (pdev->dev.platform_data) {
545 const struct platform_device_id *id = pdev->id_entry;
546 struct sh_timer_config *cfg = pdev->dev.platform_data;
547
548 tmu->model = id->driver_data;
549 tmu->num_channels = hweight8(cfg->channels_mask);
550 } else {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100551 dev_err(&tmu->pdev->dev, "missing platform data\n");
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100552 return -ENXIO;
Magnus Damm9570ef22009-05-01 06:51:00 +0000553 }
554
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100555 /* Get hold of clock. */
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100556 tmu->clk = clk_get(&tmu->pdev->dev, "fck");
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100557 if (IS_ERR(tmu->clk)) {
558 dev_err(&tmu->pdev->dev, "cannot get clock\n");
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100559 return PTR_ERR(tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000560 }
Laurent Pinchart1c09eb32013-11-08 11:08:00 +0100561
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100562 ret = clk_prepare(tmu->clk);
Laurent Pinchart1c09eb32013-11-08 11:08:00 +0100563 if (ret < 0)
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100564 goto err_clk_put;
Laurent Pinchart1c09eb32013-11-08 11:08:00 +0100565
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100566 /* Map the memory resource. */
567 ret = sh_tmu_map_memory(tmu);
568 if (ret < 0) {
569 dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n");
570 goto err_clk_unprepare;
Laurent Pincharta5de49f2014-01-27 22:04:17 +0100571 }
572
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100573 /* Allocate and setup the channels. */
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100574 tmu->channels = kzalloc(sizeof(*tmu->channels) * tmu->num_channels,
575 GFP_KERNEL);
576 if (tmu->channels == NULL) {
577 ret = -ENOMEM;
578 goto err_unmap;
579 }
Laurent Pincharta5de49f2014-01-27 22:04:17 +0100580
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100581 /*
582 * Use the first channel as a clock event device and the second channel
583 * as a clock source.
584 */
585 for (i = 0; i < tmu->num_channels; ++i) {
586 ret = sh_tmu_channel_setup(&tmu->channels[i], i,
587 i == 0, i == 1, tmu);
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100588 if (ret < 0)
589 goto err_unmap;
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100590 }
591
592 platform_set_drvdata(pdev, tmu);
Laurent Pinchart394a4482013-11-08 11:07:59 +0100593
594 return 0;
595
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100596err_unmap:
Laurent Pincharta5de49f2014-01-27 22:04:17 +0100597 kfree(tmu->channels);
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100598 iounmap(tmu->mapbase);
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100599err_clk_unprepare:
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100600 clk_unprepare(tmu->clk);
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100601err_clk_put:
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100602 clk_put(tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000603 return ret;
604}
605
Greg Kroah-Hartman18505142012-12-21 15:11:38 -0800606static int sh_tmu_probe(struct platform_device *pdev)
Magnus Damm9570ef22009-05-01 06:51:00 +0000607{
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100608 struct sh_tmu_device *tmu = platform_get_drvdata(pdev);
Magnus Damm9570ef22009-05-01 06:51:00 +0000609 int ret;
610
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200611 if (!is_early_platform_device(pdev)) {
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200612 pm_runtime_set_active(&pdev->dev);
613 pm_runtime_enable(&pdev->dev);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200614 }
Rafael J. Wysocki2ee619f2012-03-13 22:40:00 +0100615
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100616 if (tmu) {
Paul Mundt214a6072010-03-10 16:26:25 +0900617 dev_info(&pdev->dev, "kept as earlytimer\n");
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200618 goto out;
Magnus Damm9570ef22009-05-01 06:51:00 +0000619 }
620
Laurent Pinchart3b77a832014-01-27 22:04:17 +0100621 tmu = kzalloc(sizeof(*tmu), GFP_KERNEL);
Jingoo Han814876b2014-05-22 14:05:07 +0200622 if (tmu == NULL)
Magnus Damm9570ef22009-05-01 06:51:00 +0000623 return -ENOMEM;
Magnus Damm9570ef22009-05-01 06:51:00 +0000624
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100625 ret = sh_tmu_setup(tmu, pdev);
Magnus Damm9570ef22009-05-01 06:51:00 +0000626 if (ret) {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100627 kfree(tmu);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200628 pm_runtime_idle(&pdev->dev);
629 return ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000630 }
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200631 if (is_early_platform_device(pdev))
632 return 0;
633
634 out:
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100635 if (tmu->has_clockevent || tmu->has_clocksource)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200636 pm_runtime_irq_safe(&pdev->dev);
637 else
638 pm_runtime_idle(&pdev->dev);
639
640 return 0;
Magnus Damm9570ef22009-05-01 06:51:00 +0000641}
642
Greg Kroah-Hartman18505142012-12-21 15:11:38 -0800643static int sh_tmu_remove(struct platform_device *pdev)
Magnus Damm9570ef22009-05-01 06:51:00 +0000644{
645 return -EBUSY; /* cannot unregister clockevent and clocksource */
646}
647
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100648static const struct platform_device_id sh_tmu_id_table[] = {
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100649 { "sh-tmu", SH_TMU },
650 { "sh-tmu-sh3", SH_TMU_SH3 },
651 { }
652};
653MODULE_DEVICE_TABLE(platform, sh_tmu_id_table);
654
Laurent Pinchart3e29b552014-04-11 16:23:40 +0200655static const struct of_device_id sh_tmu_of_table[] __maybe_unused = {
656 { .compatible = "renesas,tmu" },
657 { }
658};
659MODULE_DEVICE_TABLE(of, sh_tmu_of_table);
660
Magnus Damm9570ef22009-05-01 06:51:00 +0000661static struct platform_driver sh_tmu_device_driver = {
662 .probe = sh_tmu_probe,
Greg Kroah-Hartman18505142012-12-21 15:11:38 -0800663 .remove = sh_tmu_remove,
Magnus Damm9570ef22009-05-01 06:51:00 +0000664 .driver = {
665 .name = "sh_tmu",
Laurent Pinchart3e29b552014-04-11 16:23:40 +0200666 .of_match_table = of_match_ptr(sh_tmu_of_table),
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100667 },
668 .id_table = sh_tmu_id_table,
Magnus Damm9570ef22009-05-01 06:51:00 +0000669};
670
671static int __init sh_tmu_init(void)
672{
673 return platform_driver_register(&sh_tmu_device_driver);
674}
675
676static void __exit sh_tmu_exit(void)
677{
678 platform_driver_unregister(&sh_tmu_device_driver);
679}
680
681early_platform_init("earlytimer", &sh_tmu_device_driver);
Simon Hormanb9773c32013-03-05 15:40:42 +0900682subsys_initcall(sh_tmu_init);
Magnus Damm9570ef22009-05-01 06:51:00 +0000683module_exit(sh_tmu_exit);
684
685MODULE_AUTHOR("Magnus Damm");
686MODULE_DESCRIPTION("SuperH TMU Timer Driver");
687MODULE_LICENSE("GPL v2");