Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 1 | /* |
| 2 | * SuperH Timer Support - TMU |
| 3 | * |
| 4 | * Copyright (C) 2009 Magnus Damm |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 16 | #include <linux/clk.h> |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 17 | #include <linux/clockchips.h> |
Laurent Pinchart | 13931f8 | 2014-02-12 16:56:44 +0100 | [diff] [blame] | 18 | #include <linux/clocksource.h> |
| 19 | #include <linux/delay.h> |
| 20 | #include <linux/err.h> |
| 21 | #include <linux/init.h> |
| 22 | #include <linux/interrupt.h> |
| 23 | #include <linux/io.h> |
| 24 | #include <linux/ioport.h> |
| 25 | #include <linux/irq.h> |
Paul Gortmaker | 7deeab5 | 2011-07-03 13:36:22 -0400 | [diff] [blame] | 26 | #include <linux/module.h> |
Laurent Pinchart | 13931f8 | 2014-02-12 16:56:44 +0100 | [diff] [blame] | 27 | #include <linux/platform_device.h> |
Rafael J. Wysocki | 2ee619f | 2012-03-13 22:40:00 +0100 | [diff] [blame] | 28 | #include <linux/pm_domain.h> |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 29 | #include <linux/pm_runtime.h> |
Laurent Pinchart | 13931f8 | 2014-02-12 16:56:44 +0100 | [diff] [blame] | 30 | #include <linux/sh_timer.h> |
| 31 | #include <linux/slab.h> |
| 32 | #include <linux/spinlock.h> |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 33 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 34 | enum sh_tmu_model { |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 35 | SH_TMU, |
| 36 | SH_TMU_SH3, |
| 37 | }; |
| 38 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 39 | struct sh_tmu_device; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 40 | |
| 41 | struct sh_tmu_channel { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 42 | struct sh_tmu_device *tmu; |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 43 | unsigned int index; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 44 | |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 45 | void __iomem *base; |
Laurent Pinchart | 1c56cf6 | 2014-02-17 11:27:49 +0100 | [diff] [blame] | 46 | int irq; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 47 | |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 48 | unsigned long rate; |
| 49 | unsigned long periodic; |
| 50 | struct clock_event_device ced; |
| 51 | struct clocksource cs; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 52 | bool cs_enabled; |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 53 | unsigned int enable_count; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 54 | }; |
| 55 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 56 | struct sh_tmu_device { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 57 | struct platform_device *pdev; |
| 58 | |
| 59 | void __iomem *mapbase; |
| 60 | struct clk *clk; |
| 61 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 62 | enum sh_tmu_model model; |
| 63 | |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 64 | struct sh_tmu_channel *channels; |
| 65 | unsigned int num_channels; |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 66 | |
| 67 | bool has_clockevent; |
| 68 | bool has_clocksource; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 69 | }; |
| 70 | |
Paul Mundt | c2225a5 | 2012-05-25 13:39:09 +0900 | [diff] [blame] | 71 | static DEFINE_RAW_SPINLOCK(sh_tmu_lock); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 72 | |
| 73 | #define TSTR -1 /* shared register */ |
| 74 | #define TCOR 0 /* channel register */ |
| 75 | #define TCNT 1 /* channel register */ |
| 76 | #define TCR 2 /* channel register */ |
| 77 | |
Laurent Pinchart | 5cfe2d1 | 2014-01-29 00:33:08 +0100 | [diff] [blame] | 78 | #define TCR_UNF (1 << 8) |
| 79 | #define TCR_UNIE (1 << 5) |
| 80 | #define TCR_TPSC_CLK4 (0 << 0) |
| 81 | #define TCR_TPSC_CLK16 (1 << 0) |
| 82 | #define TCR_TPSC_CLK64 (2 << 0) |
| 83 | #define TCR_TPSC_CLK256 (3 << 0) |
| 84 | #define TCR_TPSC_CLK1024 (4 << 0) |
| 85 | #define TCR_TPSC_MASK (7 << 0) |
| 86 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 87 | static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 88 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 89 | unsigned long offs; |
| 90 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 91 | if (reg_nr == TSTR) { |
| 92 | switch (ch->tmu->model) { |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 93 | case SH_TMU_SH3: |
| 94 | return ioread8(ch->tmu->mapbase + 2); |
| 95 | case SH_TMU: |
| 96 | return ioread8(ch->tmu->mapbase + 4); |
| 97 | } |
| 98 | } |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 99 | |
| 100 | offs = reg_nr << 2; |
| 101 | |
| 102 | if (reg_nr == TCR) |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 103 | return ioread16(ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 104 | else |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 105 | return ioread32(ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 106 | } |
| 107 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 108 | static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 109 | unsigned long value) |
| 110 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 111 | unsigned long offs; |
| 112 | |
| 113 | if (reg_nr == TSTR) { |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 114 | switch (ch->tmu->model) { |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 115 | case SH_TMU_SH3: |
| 116 | return iowrite8(value, ch->tmu->mapbase + 2); |
| 117 | case SH_TMU: |
| 118 | return iowrite8(value, ch->tmu->mapbase + 4); |
| 119 | } |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 120 | } |
| 121 | |
| 122 | offs = reg_nr << 2; |
| 123 | |
| 124 | if (reg_nr == TCR) |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 125 | iowrite16(value, ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 126 | else |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 127 | iowrite32(value, ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 128 | } |
| 129 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 130 | static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 131 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 132 | unsigned long flags, value; |
| 133 | |
| 134 | /* start stop register shared by multiple timer channels */ |
Paul Mundt | c2225a5 | 2012-05-25 13:39:09 +0900 | [diff] [blame] | 135 | raw_spin_lock_irqsave(&sh_tmu_lock, flags); |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 136 | value = sh_tmu_read(ch, TSTR); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 137 | |
| 138 | if (start) |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 139 | value |= 1 << ch->index; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 140 | else |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 141 | value &= ~(1 << ch->index); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 142 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 143 | sh_tmu_write(ch, TSTR, value); |
Paul Mundt | c2225a5 | 2012-05-25 13:39:09 +0900 | [diff] [blame] | 144 | raw_spin_unlock_irqrestore(&sh_tmu_lock, flags); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 145 | } |
| 146 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 147 | static int __sh_tmu_enable(struct sh_tmu_channel *ch) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 148 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 149 | int ret; |
| 150 | |
Paul Mundt | d4905ce | 2011-05-31 15:23:20 +0900 | [diff] [blame] | 151 | /* enable clock */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 152 | ret = clk_enable(ch->tmu->clk); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 153 | if (ret) { |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 154 | dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n", |
| 155 | ch->index); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 156 | return ret; |
| 157 | } |
| 158 | |
| 159 | /* make sure channel is disabled */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 160 | sh_tmu_start_stop_ch(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 161 | |
| 162 | /* maximum timeout */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 163 | sh_tmu_write(ch, TCOR, 0xffffffff); |
| 164 | sh_tmu_write(ch, TCNT, 0xffffffff); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 165 | |
| 166 | /* configure channel to parent clock / 4, irq off */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 167 | ch->rate = clk_get_rate(ch->tmu->clk) / 4; |
Laurent Pinchart | 5cfe2d1 | 2014-01-29 00:33:08 +0100 | [diff] [blame] | 168 | sh_tmu_write(ch, TCR, TCR_TPSC_CLK4); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 169 | |
| 170 | /* enable channel */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 171 | sh_tmu_start_stop_ch(ch, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 172 | |
| 173 | return 0; |
| 174 | } |
| 175 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 176 | static int sh_tmu_enable(struct sh_tmu_channel *ch) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 177 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 178 | if (ch->enable_count++ > 0) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 179 | return 0; |
| 180 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 181 | pm_runtime_get_sync(&ch->tmu->pdev->dev); |
| 182 | dev_pm_syscore_device(&ch->tmu->pdev->dev, true); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 183 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 184 | return __sh_tmu_enable(ch); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 185 | } |
| 186 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 187 | static void __sh_tmu_disable(struct sh_tmu_channel *ch) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 188 | { |
| 189 | /* disable channel */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 190 | sh_tmu_start_stop_ch(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 191 | |
Magnus Damm | be890a1 | 2009-06-17 05:04:04 +0000 | [diff] [blame] | 192 | /* disable interrupts in TMU block */ |
Laurent Pinchart | 5cfe2d1 | 2014-01-29 00:33:08 +0100 | [diff] [blame] | 193 | sh_tmu_write(ch, TCR, TCR_TPSC_CLK4); |
Magnus Damm | be890a1 | 2009-06-17 05:04:04 +0000 | [diff] [blame] | 194 | |
Paul Mundt | d4905ce | 2011-05-31 15:23:20 +0900 | [diff] [blame] | 195 | /* stop clock */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 196 | clk_disable(ch->tmu->clk); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 197 | } |
| 198 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 199 | static void sh_tmu_disable(struct sh_tmu_channel *ch) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 200 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 201 | if (WARN_ON(ch->enable_count == 0)) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 202 | return; |
| 203 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 204 | if (--ch->enable_count > 0) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 205 | return; |
| 206 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 207 | __sh_tmu_disable(ch); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 208 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 209 | dev_pm_syscore_device(&ch->tmu->pdev->dev, false); |
| 210 | pm_runtime_put(&ch->tmu->pdev->dev); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 211 | } |
| 212 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 213 | static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 214 | int periodic) |
| 215 | { |
| 216 | /* stop timer */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 217 | sh_tmu_start_stop_ch(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 218 | |
| 219 | /* acknowledge interrupt */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 220 | sh_tmu_read(ch, TCR); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 221 | |
| 222 | /* enable interrupt */ |
Laurent Pinchart | 5cfe2d1 | 2014-01-29 00:33:08 +0100 | [diff] [blame] | 223 | sh_tmu_write(ch, TCR, TCR_UNIE | TCR_TPSC_CLK4); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 224 | |
| 225 | /* reload delta value in case of periodic timer */ |
| 226 | if (periodic) |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 227 | sh_tmu_write(ch, TCOR, delta); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 228 | else |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 229 | sh_tmu_write(ch, TCOR, 0xffffffff); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 230 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 231 | sh_tmu_write(ch, TCNT, delta); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 232 | |
| 233 | /* start timer */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 234 | sh_tmu_start_stop_ch(ch, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 235 | } |
| 236 | |
| 237 | static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id) |
| 238 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 239 | struct sh_tmu_channel *ch = dev_id; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 240 | |
| 241 | /* disable or acknowledge interrupt */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 242 | if (ch->ced.mode == CLOCK_EVT_MODE_ONESHOT) |
Laurent Pinchart | 5cfe2d1 | 2014-01-29 00:33:08 +0100 | [diff] [blame] | 243 | sh_tmu_write(ch, TCR, TCR_TPSC_CLK4); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 244 | else |
Laurent Pinchart | 5cfe2d1 | 2014-01-29 00:33:08 +0100 | [diff] [blame] | 245 | sh_tmu_write(ch, TCR, TCR_UNIE | TCR_TPSC_CLK4); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 246 | |
| 247 | /* notify clockevent layer */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 248 | ch->ced.event_handler(&ch->ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 249 | return IRQ_HANDLED; |
| 250 | } |
| 251 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 252 | static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 253 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 254 | return container_of(cs, struct sh_tmu_channel, cs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 255 | } |
| 256 | |
| 257 | static cycle_t sh_tmu_clocksource_read(struct clocksource *cs) |
| 258 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 259 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 260 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 261 | return sh_tmu_read(ch, TCNT) ^ 0xffffffff; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 262 | } |
| 263 | |
| 264 | static int sh_tmu_clocksource_enable(struct clocksource *cs) |
| 265 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 266 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Magnus Damm | 0aeac45 | 2011-04-25 22:38:37 +0900 | [diff] [blame] | 267 | int ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 268 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 269 | if (WARN_ON(ch->cs_enabled)) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 270 | return 0; |
| 271 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 272 | ret = sh_tmu_enable(ch); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 273 | if (!ret) { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 274 | __clocksource_updatefreq_hz(cs, ch->rate); |
| 275 | ch->cs_enabled = true; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 276 | } |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 277 | |
Magnus Damm | 0aeac45 | 2011-04-25 22:38:37 +0900 | [diff] [blame] | 278 | return ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 279 | } |
| 280 | |
| 281 | static void sh_tmu_clocksource_disable(struct clocksource *cs) |
| 282 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 283 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 284 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 285 | if (WARN_ON(!ch->cs_enabled)) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 286 | return; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 287 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 288 | sh_tmu_disable(ch); |
| 289 | ch->cs_enabled = false; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 290 | } |
| 291 | |
| 292 | static void sh_tmu_clocksource_suspend(struct clocksource *cs) |
| 293 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 294 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 295 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 296 | if (!ch->cs_enabled) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 297 | return; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 298 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 299 | if (--ch->enable_count == 0) { |
| 300 | __sh_tmu_disable(ch); |
| 301 | pm_genpd_syscore_poweroff(&ch->tmu->pdev->dev); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 302 | } |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 303 | } |
| 304 | |
| 305 | static void sh_tmu_clocksource_resume(struct clocksource *cs) |
| 306 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 307 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 308 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 309 | if (!ch->cs_enabled) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 310 | return; |
| 311 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 312 | if (ch->enable_count++ == 0) { |
| 313 | pm_genpd_syscore_poweron(&ch->tmu->pdev->dev); |
| 314 | __sh_tmu_enable(ch); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 315 | } |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 316 | } |
| 317 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 318 | static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch, |
Laurent Pinchart | f1010ed | 2014-02-19 17:00:31 +0100 | [diff] [blame] | 319 | const char *name) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 320 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 321 | struct clocksource *cs = &ch->cs; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 322 | |
| 323 | cs->name = name; |
Laurent Pinchart | f1010ed | 2014-02-19 17:00:31 +0100 | [diff] [blame] | 324 | cs->rating = 200; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 325 | cs->read = sh_tmu_clocksource_read; |
| 326 | cs->enable = sh_tmu_clocksource_enable; |
| 327 | cs->disable = sh_tmu_clocksource_disable; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 328 | cs->suspend = sh_tmu_clocksource_suspend; |
| 329 | cs->resume = sh_tmu_clocksource_resume; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 330 | cs->mask = CLOCKSOURCE_MASK(32); |
| 331 | cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; |
Aurelien Jarno | 66f4912 | 2010-05-31 21:45:48 +0000 | [diff] [blame] | 332 | |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 333 | dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n", |
| 334 | ch->index); |
Magnus Damm | 0aeac45 | 2011-04-25 22:38:37 +0900 | [diff] [blame] | 335 | |
| 336 | /* Register with dummy 1 Hz value, gets updated in ->enable() */ |
| 337 | clocksource_register_hz(cs, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 338 | return 0; |
| 339 | } |
| 340 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 341 | static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 342 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 343 | return container_of(ced, struct sh_tmu_channel, ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 344 | } |
| 345 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 346 | static void sh_tmu_clock_event_start(struct sh_tmu_channel *ch, int periodic) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 347 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 348 | struct clock_event_device *ced = &ch->ced; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 349 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 350 | sh_tmu_enable(ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 351 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 352 | clockevents_config(ced, ch->rate); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 353 | |
| 354 | if (periodic) { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 355 | ch->periodic = (ch->rate + HZ/2) / HZ; |
| 356 | sh_tmu_set_next(ch, ch->periodic, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 357 | } |
| 358 | } |
| 359 | |
| 360 | static void sh_tmu_clock_event_mode(enum clock_event_mode mode, |
| 361 | struct clock_event_device *ced) |
| 362 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 363 | struct sh_tmu_channel *ch = ced_to_sh_tmu(ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 364 | int disabled = 0; |
| 365 | |
| 366 | /* deal with old setting first */ |
| 367 | switch (ced->mode) { |
| 368 | case CLOCK_EVT_MODE_PERIODIC: |
| 369 | case CLOCK_EVT_MODE_ONESHOT: |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 370 | sh_tmu_disable(ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 371 | disabled = 1; |
| 372 | break; |
| 373 | default: |
| 374 | break; |
| 375 | } |
| 376 | |
| 377 | switch (mode) { |
| 378 | case CLOCK_EVT_MODE_PERIODIC: |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 379 | dev_info(&ch->tmu->pdev->dev, |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 380 | "ch%u: used for periodic clock events\n", ch->index); |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 381 | sh_tmu_clock_event_start(ch, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 382 | break; |
| 383 | case CLOCK_EVT_MODE_ONESHOT: |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 384 | dev_info(&ch->tmu->pdev->dev, |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 385 | "ch%u: used for oneshot clock events\n", ch->index); |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 386 | sh_tmu_clock_event_start(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 387 | break; |
| 388 | case CLOCK_EVT_MODE_UNUSED: |
| 389 | if (!disabled) |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 390 | sh_tmu_disable(ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 391 | break; |
| 392 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 393 | default: |
| 394 | break; |
| 395 | } |
| 396 | } |
| 397 | |
| 398 | static int sh_tmu_clock_event_next(unsigned long delta, |
| 399 | struct clock_event_device *ced) |
| 400 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 401 | struct sh_tmu_channel *ch = ced_to_sh_tmu(ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 402 | |
| 403 | BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT); |
| 404 | |
| 405 | /* program new delta value */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 406 | sh_tmu_set_next(ch, delta, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 407 | return 0; |
| 408 | } |
| 409 | |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 410 | static void sh_tmu_clock_event_suspend(struct clock_event_device *ced) |
| 411 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 412 | pm_genpd_syscore_poweroff(&ced_to_sh_tmu(ced)->tmu->pdev->dev); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 413 | } |
| 414 | |
| 415 | static void sh_tmu_clock_event_resume(struct clock_event_device *ced) |
| 416 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 417 | pm_genpd_syscore_poweron(&ced_to_sh_tmu(ced)->tmu->pdev->dev); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 418 | } |
| 419 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 420 | static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch, |
Laurent Pinchart | f1010ed | 2014-02-19 17:00:31 +0100 | [diff] [blame] | 421 | const char *name) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 422 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 423 | struct clock_event_device *ced = &ch->ced; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 424 | int ret; |
| 425 | |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 426 | ced->name = name; |
| 427 | ced->features = CLOCK_EVT_FEAT_PERIODIC; |
| 428 | ced->features |= CLOCK_EVT_FEAT_ONESHOT; |
Laurent Pinchart | f1010ed | 2014-02-19 17:00:31 +0100 | [diff] [blame] | 429 | ced->rating = 200; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 430 | ced->cpumask = cpumask_of(0); |
| 431 | ced->set_next_event = sh_tmu_clock_event_next; |
| 432 | ced->set_mode = sh_tmu_clock_event_mode; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 433 | ced->suspend = sh_tmu_clock_event_suspend; |
| 434 | ced->resume = sh_tmu_clock_event_resume; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 435 | |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 436 | dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n", |
| 437 | ch->index); |
Paul Mundt | 3977407 | 2012-06-11 17:10:16 +0900 | [diff] [blame] | 438 | |
| 439 | clockevents_config_and_register(ced, 1, 0x300, 0xffffffff); |
Paul Mundt | da64c2a | 2010-02-25 16:37:46 +0900 | [diff] [blame] | 440 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 441 | ret = request_irq(ch->irq, sh_tmu_interrupt, |
Laurent Pinchart | 1c56cf6 | 2014-02-17 11:27:49 +0100 | [diff] [blame] | 442 | IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING, |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 443 | dev_name(&ch->tmu->pdev->dev), ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 444 | if (ret) { |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 445 | dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n", |
| 446 | ch->index, ch->irq); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 447 | return; |
| 448 | } |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 449 | } |
| 450 | |
Laurent Pinchart | 84876d0 | 2014-02-17 16:04:16 +0100 | [diff] [blame] | 451 | static int sh_tmu_register(struct sh_tmu_channel *ch, const char *name, |
Laurent Pinchart | f1010ed | 2014-02-19 17:00:31 +0100 | [diff] [blame] | 452 | bool clockevent, bool clocksource) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 453 | { |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 454 | if (clockevent) { |
| 455 | ch->tmu->has_clockevent = true; |
Laurent Pinchart | f1010ed | 2014-02-19 17:00:31 +0100 | [diff] [blame] | 456 | sh_tmu_register_clockevent(ch, name); |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 457 | } else if (clocksource) { |
| 458 | ch->tmu->has_clocksource = true; |
Laurent Pinchart | f1010ed | 2014-02-19 17:00:31 +0100 | [diff] [blame] | 459 | sh_tmu_register_clocksource(ch, name); |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 460 | } |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 461 | |
| 462 | return 0; |
| 463 | } |
| 464 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 465 | static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, unsigned int index, |
| 466 | bool clockevent, bool clocksource, |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 467 | struct sh_tmu_device *tmu) |
| 468 | { |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 469 | /* Skip unused channels. */ |
| 470 | if (!clockevent && !clocksource) |
| 471 | return 0; |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 472 | |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 473 | ch->tmu = tmu; |
Laurent Pinchart | 681b9e8 | 2014-01-28 15:52:46 +0100 | [diff] [blame^] | 474 | ch->index = index; |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 475 | |
Laurent Pinchart | 681b9e8 | 2014-01-28 15:52:46 +0100 | [diff] [blame^] | 476 | if (tmu->model == SH_TMU_SH3) |
| 477 | ch->base = tmu->mapbase + 4 + ch->index * 12; |
| 478 | else |
| 479 | ch->base = tmu->mapbase + 8 + ch->index * 12; |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 480 | |
Laurent Pinchart | c54697a | 2014-05-16 14:44:23 +0200 | [diff] [blame] | 481 | ch->irq = platform_get_irq(tmu->pdev, index); |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 482 | if (ch->irq < 0) { |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 483 | dev_err(&tmu->pdev->dev, "ch%u: failed to get irq\n", |
| 484 | ch->index); |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 485 | return ch->irq; |
| 486 | } |
| 487 | |
| 488 | ch->cs_enabled = false; |
| 489 | ch->enable_count = 0; |
| 490 | |
Laurent Pinchart | 84876d0 | 2014-02-17 16:04:16 +0100 | [diff] [blame] | 491 | return sh_tmu_register(ch, dev_name(&tmu->pdev->dev), |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 492 | clockevent, clocksource); |
| 493 | } |
| 494 | |
| 495 | static int sh_tmu_map_memory(struct sh_tmu_device *tmu) |
| 496 | { |
| 497 | struct resource *res; |
| 498 | |
| 499 | res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0); |
| 500 | if (!res) { |
| 501 | dev_err(&tmu->pdev->dev, "failed to get I/O memory\n"); |
| 502 | return -ENXIO; |
| 503 | } |
| 504 | |
| 505 | tmu->mapbase = ioremap_nocache(res->start, resource_size(res)); |
| 506 | if (tmu->mapbase == NULL) |
| 507 | return -ENXIO; |
| 508 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 509 | return 0; |
| 510 | } |
| 511 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 512 | static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 513 | { |
Paul Mundt | 46a12f7 | 2009-05-03 17:57:17 +0900 | [diff] [blame] | 514 | struct sh_timer_config *cfg = pdev->dev.platform_data; |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 515 | const struct platform_device_id *id = pdev->id_entry; |
| 516 | unsigned int i; |
Laurent Pinchart | 1c56cf6 | 2014-02-17 11:27:49 +0100 | [diff] [blame] | 517 | int ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 518 | |
| 519 | if (!cfg) { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 520 | dev_err(&tmu->pdev->dev, "missing platform data\n"); |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 521 | return -ENXIO; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 522 | } |
| 523 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 524 | tmu->pdev = pdev; |
| 525 | tmu->model = id->driver_data; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 526 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 527 | /* Get hold of clock. */ |
Laurent Pinchart | 681b9e8 | 2014-01-28 15:52:46 +0100 | [diff] [blame^] | 528 | tmu->clk = clk_get(&tmu->pdev->dev, "fck"); |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 529 | if (IS_ERR(tmu->clk)) { |
| 530 | dev_err(&tmu->pdev->dev, "cannot get clock\n"); |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 531 | return PTR_ERR(tmu->clk); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 532 | } |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 533 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 534 | ret = clk_prepare(tmu->clk); |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 535 | if (ret < 0) |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 536 | goto err_clk_put; |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 537 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 538 | /* Map the memory resource. */ |
| 539 | ret = sh_tmu_map_memory(tmu); |
| 540 | if (ret < 0) { |
| 541 | dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n"); |
| 542 | goto err_clk_unprepare; |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 543 | } |
| 544 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 545 | /* Allocate and setup the channels. */ |
Laurent Pinchart | 681b9e8 | 2014-01-28 15:52:46 +0100 | [diff] [blame^] | 546 | tmu->num_channels = hweight8(cfg->channels_mask); |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 547 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 548 | tmu->channels = kzalloc(sizeof(*tmu->channels) * tmu->num_channels, |
| 549 | GFP_KERNEL); |
| 550 | if (tmu->channels == NULL) { |
| 551 | ret = -ENOMEM; |
| 552 | goto err_unmap; |
| 553 | } |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 554 | |
Laurent Pinchart | 681b9e8 | 2014-01-28 15:52:46 +0100 | [diff] [blame^] | 555 | /* |
| 556 | * Use the first channel as a clock event device and the second channel |
| 557 | * as a clock source. |
| 558 | */ |
| 559 | for (i = 0; i < tmu->num_channels; ++i) { |
| 560 | ret = sh_tmu_channel_setup(&tmu->channels[i], i, |
| 561 | i == 0, i == 1, tmu); |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 562 | if (ret < 0) |
| 563 | goto err_unmap; |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 564 | } |
| 565 | |
| 566 | platform_set_drvdata(pdev, tmu); |
Laurent Pinchart | 394a448 | 2013-11-08 11:07:59 +0100 | [diff] [blame] | 567 | |
| 568 | return 0; |
| 569 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 570 | err_unmap: |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 571 | kfree(tmu->channels); |
Laurent Pinchart | 681b9e8 | 2014-01-28 15:52:46 +0100 | [diff] [blame^] | 572 | iounmap(tmu->mapbase); |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 573 | err_clk_unprepare: |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 574 | clk_unprepare(tmu->clk); |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 575 | err_clk_put: |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 576 | clk_put(tmu->clk); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 577 | return ret; |
| 578 | } |
| 579 | |
Greg Kroah-Hartman | 1850514 | 2012-12-21 15:11:38 -0800 | [diff] [blame] | 580 | static int sh_tmu_probe(struct platform_device *pdev) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 581 | { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 582 | struct sh_tmu_device *tmu = platform_get_drvdata(pdev); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 583 | int ret; |
| 584 | |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 585 | if (!is_early_platform_device(pdev)) { |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 586 | pm_runtime_set_active(&pdev->dev); |
| 587 | pm_runtime_enable(&pdev->dev); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 588 | } |
Rafael J. Wysocki | 2ee619f | 2012-03-13 22:40:00 +0100 | [diff] [blame] | 589 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 590 | if (tmu) { |
Paul Mundt | 214a607 | 2010-03-10 16:26:25 +0900 | [diff] [blame] | 591 | dev_info(&pdev->dev, "kept as earlytimer\n"); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 592 | goto out; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 593 | } |
| 594 | |
Laurent Pinchart | 3b77a83 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 595 | tmu = kzalloc(sizeof(*tmu), GFP_KERNEL); |
Jingoo Han | 814876b | 2014-05-22 14:05:07 +0200 | [diff] [blame] | 596 | if (tmu == NULL) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 597 | return -ENOMEM; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 598 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 599 | ret = sh_tmu_setup(tmu, pdev); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 600 | if (ret) { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 601 | kfree(tmu); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 602 | pm_runtime_idle(&pdev->dev); |
| 603 | return ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 604 | } |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 605 | if (is_early_platform_device(pdev)) |
| 606 | return 0; |
| 607 | |
| 608 | out: |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 609 | if (tmu->has_clockevent || tmu->has_clocksource) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 610 | pm_runtime_irq_safe(&pdev->dev); |
| 611 | else |
| 612 | pm_runtime_idle(&pdev->dev); |
| 613 | |
| 614 | return 0; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 615 | } |
| 616 | |
Greg Kroah-Hartman | 1850514 | 2012-12-21 15:11:38 -0800 | [diff] [blame] | 617 | static int sh_tmu_remove(struct platform_device *pdev) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 618 | { |
| 619 | return -EBUSY; /* cannot unregister clockevent and clocksource */ |
| 620 | } |
| 621 | |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 622 | static const struct platform_device_id sh_tmu_id_table[] = { |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 623 | { "sh-tmu", SH_TMU }, |
| 624 | { "sh-tmu-sh3", SH_TMU_SH3 }, |
| 625 | { } |
| 626 | }; |
| 627 | MODULE_DEVICE_TABLE(platform, sh_tmu_id_table); |
| 628 | |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 629 | static struct platform_driver sh_tmu_device_driver = { |
| 630 | .probe = sh_tmu_probe, |
Greg Kroah-Hartman | 1850514 | 2012-12-21 15:11:38 -0800 | [diff] [blame] | 631 | .remove = sh_tmu_remove, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 632 | .driver = { |
| 633 | .name = "sh_tmu", |
Laurent Pinchart | 8c7f21e | 2014-01-28 12:36:48 +0100 | [diff] [blame] | 634 | }, |
| 635 | .id_table = sh_tmu_id_table, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 636 | }; |
| 637 | |
| 638 | static int __init sh_tmu_init(void) |
| 639 | { |
| 640 | return platform_driver_register(&sh_tmu_device_driver); |
| 641 | } |
| 642 | |
| 643 | static void __exit sh_tmu_exit(void) |
| 644 | { |
| 645 | platform_driver_unregister(&sh_tmu_device_driver); |
| 646 | } |
| 647 | |
| 648 | early_platform_init("earlytimer", &sh_tmu_device_driver); |
Simon Horman | b9773c3 | 2013-03-05 15:40:42 +0900 | [diff] [blame] | 649 | subsys_initcall(sh_tmu_init); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 650 | module_exit(sh_tmu_exit); |
| 651 | |
| 652 | MODULE_AUTHOR("Magnus Damm"); |
| 653 | MODULE_DESCRIPTION("SuperH TMU Timer Driver"); |
| 654 | MODULE_LICENSE("GPL v2"); |