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Magnus Damm9570ef22009-05-01 06:51:00 +00001/*
2 * SuperH Timer Support - TMU
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Magnus Damm9570ef22009-05-01 06:51:00 +000014 */
15
Magnus Damm9570ef22009-05-01 06:51:00 +000016#include <linux/clk.h>
Magnus Damm9570ef22009-05-01 06:51:00 +000017#include <linux/clockchips.h>
Laurent Pinchart13931f82014-02-12 16:56:44 +010018#include <linux/clocksource.h>
19#include <linux/delay.h>
20#include <linux/err.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/io.h>
24#include <linux/ioport.h>
25#include <linux/irq.h>
Paul Gortmaker7deeab52011-07-03 13:36:22 -040026#include <linux/module.h>
Laurent Pinchart13931f82014-02-12 16:56:44 +010027#include <linux/platform_device.h>
Rafael J. Wysocki2ee619f2012-03-13 22:40:00 +010028#include <linux/pm_domain.h>
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +020029#include <linux/pm_runtime.h>
Laurent Pinchart13931f82014-02-12 16:56:44 +010030#include <linux/sh_timer.h>
31#include <linux/slab.h>
32#include <linux/spinlock.h>
Magnus Damm9570ef22009-05-01 06:51:00 +000033
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010034enum sh_tmu_model {
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010035 SH_TMU,
36 SH_TMU_SH3,
37};
38
Laurent Pinchart0a72aa32014-01-27 22:04:17 +010039struct sh_tmu_device;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010040
41struct sh_tmu_channel {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +010042 struct sh_tmu_device *tmu;
Laurent Pinchartfe68eb82014-01-27 22:04:17 +010043 unsigned int index;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010044
Laurent Pinchartde693462014-01-27 22:04:17 +010045 void __iomem *base;
Laurent Pinchart1c56cf62014-02-17 11:27:49 +010046 int irq;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010047
Magnus Damm9570ef22009-05-01 06:51:00 +000048 unsigned long rate;
49 unsigned long periodic;
50 struct clock_event_device ced;
51 struct clocksource cs;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +020052 bool cs_enabled;
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +020053 unsigned int enable_count;
Magnus Damm9570ef22009-05-01 06:51:00 +000054};
55
Laurent Pinchart0a72aa32014-01-27 22:04:17 +010056struct sh_tmu_device {
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010057 struct platform_device *pdev;
58
59 void __iomem *mapbase;
60 struct clk *clk;
61
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010062 enum sh_tmu_model model;
63
Laurent Pincharta5de49f2014-01-27 22:04:17 +010064 struct sh_tmu_channel *channels;
65 unsigned int num_channels;
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010066
67 bool has_clockevent;
68 bool has_clocksource;
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010069};
70
Paul Mundtc2225a52012-05-25 13:39:09 +090071static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
Magnus Damm9570ef22009-05-01 06:51:00 +000072
73#define TSTR -1 /* shared register */
74#define TCOR 0 /* channel register */
75#define TCNT 1 /* channel register */
76#define TCR 2 /* channel register */
77
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +010078#define TCR_UNF (1 << 8)
79#define TCR_UNIE (1 << 5)
80#define TCR_TPSC_CLK4 (0 << 0)
81#define TCR_TPSC_CLK16 (1 << 0)
82#define TCR_TPSC_CLK64 (2 << 0)
83#define TCR_TPSC_CLK256 (3 << 0)
84#define TCR_TPSC_CLK1024 (4 << 0)
85#define TCR_TPSC_MASK (7 << 0)
86
Laurent Pinchartde2d12c2014-01-27 15:29:19 +010087static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr)
Magnus Damm9570ef22009-05-01 06:51:00 +000088{
Magnus Damm9570ef22009-05-01 06:51:00 +000089 unsigned long offs;
90
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010091 if (reg_nr == TSTR) {
92 switch (ch->tmu->model) {
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +010093 case SH_TMU_SH3:
94 return ioread8(ch->tmu->mapbase + 2);
95 case SH_TMU:
96 return ioread8(ch->tmu->mapbase + 4);
97 }
98 }
Magnus Damm9570ef22009-05-01 06:51:00 +000099
100 offs = reg_nr << 2;
101
102 if (reg_nr == TCR)
Laurent Pinchartde693462014-01-27 22:04:17 +0100103 return ioread16(ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000104 else
Laurent Pinchartde693462014-01-27 22:04:17 +0100105 return ioread32(ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000106}
107
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100108static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr,
Magnus Damm9570ef22009-05-01 06:51:00 +0000109 unsigned long value)
110{
Magnus Damm9570ef22009-05-01 06:51:00 +0000111 unsigned long offs;
112
113 if (reg_nr == TSTR) {
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100114 switch (ch->tmu->model) {
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100115 case SH_TMU_SH3:
116 return iowrite8(value, ch->tmu->mapbase + 2);
117 case SH_TMU:
118 return iowrite8(value, ch->tmu->mapbase + 4);
119 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000120 }
121
122 offs = reg_nr << 2;
123
124 if (reg_nr == TCR)
Laurent Pinchartde693462014-01-27 22:04:17 +0100125 iowrite16(value, ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000126 else
Laurent Pinchartde693462014-01-27 22:04:17 +0100127 iowrite32(value, ch->base + offs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000128}
129
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100130static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start)
Magnus Damm9570ef22009-05-01 06:51:00 +0000131{
Magnus Damm9570ef22009-05-01 06:51:00 +0000132 unsigned long flags, value;
133
134 /* start stop register shared by multiple timer channels */
Paul Mundtc2225a52012-05-25 13:39:09 +0900135 raw_spin_lock_irqsave(&sh_tmu_lock, flags);
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100136 value = sh_tmu_read(ch, TSTR);
Magnus Damm9570ef22009-05-01 06:51:00 +0000137
138 if (start)
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100139 value |= 1 << ch->index;
Magnus Damm9570ef22009-05-01 06:51:00 +0000140 else
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100141 value &= ~(1 << ch->index);
Magnus Damm9570ef22009-05-01 06:51:00 +0000142
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100143 sh_tmu_write(ch, TSTR, value);
Paul Mundtc2225a52012-05-25 13:39:09 +0900144 raw_spin_unlock_irqrestore(&sh_tmu_lock, flags);
Magnus Damm9570ef22009-05-01 06:51:00 +0000145}
146
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100147static int __sh_tmu_enable(struct sh_tmu_channel *ch)
Magnus Damm9570ef22009-05-01 06:51:00 +0000148{
Magnus Damm9570ef22009-05-01 06:51:00 +0000149 int ret;
150
Paul Mundtd4905ce2011-05-31 15:23:20 +0900151 /* enable clock */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100152 ret = clk_enable(ch->tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000153 if (ret) {
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100154 dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n",
155 ch->index);
Magnus Damm9570ef22009-05-01 06:51:00 +0000156 return ret;
157 }
158
159 /* make sure channel is disabled */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100160 sh_tmu_start_stop_ch(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000161
162 /* maximum timeout */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100163 sh_tmu_write(ch, TCOR, 0xffffffff);
164 sh_tmu_write(ch, TCNT, 0xffffffff);
Magnus Damm9570ef22009-05-01 06:51:00 +0000165
166 /* configure channel to parent clock / 4, irq off */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100167 ch->rate = clk_get_rate(ch->tmu->clk) / 4;
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +0100168 sh_tmu_write(ch, TCR, TCR_TPSC_CLK4);
Magnus Damm9570ef22009-05-01 06:51:00 +0000169
170 /* enable channel */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100171 sh_tmu_start_stop_ch(ch, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000172
173 return 0;
174}
175
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100176static int sh_tmu_enable(struct sh_tmu_channel *ch)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200177{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100178 if (ch->enable_count++ > 0)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200179 return 0;
180
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100181 pm_runtime_get_sync(&ch->tmu->pdev->dev);
182 dev_pm_syscore_device(&ch->tmu->pdev->dev, true);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200183
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100184 return __sh_tmu_enable(ch);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200185}
186
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100187static void __sh_tmu_disable(struct sh_tmu_channel *ch)
Magnus Damm9570ef22009-05-01 06:51:00 +0000188{
189 /* disable channel */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100190 sh_tmu_start_stop_ch(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000191
Magnus Dammbe890a12009-06-17 05:04:04 +0000192 /* disable interrupts in TMU block */
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +0100193 sh_tmu_write(ch, TCR, TCR_TPSC_CLK4);
Magnus Dammbe890a12009-06-17 05:04:04 +0000194
Paul Mundtd4905ce2011-05-31 15:23:20 +0900195 /* stop clock */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100196 clk_disable(ch->tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000197}
198
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100199static void sh_tmu_disable(struct sh_tmu_channel *ch)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200200{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100201 if (WARN_ON(ch->enable_count == 0))
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200202 return;
203
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100204 if (--ch->enable_count > 0)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200205 return;
206
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100207 __sh_tmu_disable(ch);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200208
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100209 dev_pm_syscore_device(&ch->tmu->pdev->dev, false);
210 pm_runtime_put(&ch->tmu->pdev->dev);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200211}
212
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100213static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta,
Magnus Damm9570ef22009-05-01 06:51:00 +0000214 int periodic)
215{
216 /* stop timer */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100217 sh_tmu_start_stop_ch(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000218
219 /* acknowledge interrupt */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100220 sh_tmu_read(ch, TCR);
Magnus Damm9570ef22009-05-01 06:51:00 +0000221
222 /* enable interrupt */
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +0100223 sh_tmu_write(ch, TCR, TCR_UNIE | TCR_TPSC_CLK4);
Magnus Damm9570ef22009-05-01 06:51:00 +0000224
225 /* reload delta value in case of periodic timer */
226 if (periodic)
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100227 sh_tmu_write(ch, TCOR, delta);
Magnus Damm9570ef22009-05-01 06:51:00 +0000228 else
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100229 sh_tmu_write(ch, TCOR, 0xffffffff);
Magnus Damm9570ef22009-05-01 06:51:00 +0000230
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100231 sh_tmu_write(ch, TCNT, delta);
Magnus Damm9570ef22009-05-01 06:51:00 +0000232
233 /* start timer */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100234 sh_tmu_start_stop_ch(ch, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000235}
236
237static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id)
238{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100239 struct sh_tmu_channel *ch = dev_id;
Magnus Damm9570ef22009-05-01 06:51:00 +0000240
241 /* disable or acknowledge interrupt */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100242 if (ch->ced.mode == CLOCK_EVT_MODE_ONESHOT)
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +0100243 sh_tmu_write(ch, TCR, TCR_TPSC_CLK4);
Magnus Damm9570ef22009-05-01 06:51:00 +0000244 else
Laurent Pinchart5cfe2d12014-01-29 00:33:08 +0100245 sh_tmu_write(ch, TCR, TCR_UNIE | TCR_TPSC_CLK4);
Magnus Damm9570ef22009-05-01 06:51:00 +0000246
247 /* notify clockevent layer */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100248 ch->ced.event_handler(&ch->ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000249 return IRQ_HANDLED;
250}
251
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100252static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs)
Magnus Damm9570ef22009-05-01 06:51:00 +0000253{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100254 return container_of(cs, struct sh_tmu_channel, cs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000255}
256
257static cycle_t sh_tmu_clocksource_read(struct clocksource *cs)
258{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100259 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Magnus Damm9570ef22009-05-01 06:51:00 +0000260
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100261 return sh_tmu_read(ch, TCNT) ^ 0xffffffff;
Magnus Damm9570ef22009-05-01 06:51:00 +0000262}
263
264static int sh_tmu_clocksource_enable(struct clocksource *cs)
265{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100266 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Magnus Damm0aeac452011-04-25 22:38:37 +0900267 int ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000268
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100269 if (WARN_ON(ch->cs_enabled))
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200270 return 0;
271
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100272 ret = sh_tmu_enable(ch);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200273 if (!ret) {
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100274 __clocksource_updatefreq_hz(cs, ch->rate);
275 ch->cs_enabled = true;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200276 }
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200277
Magnus Damm0aeac452011-04-25 22:38:37 +0900278 return ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000279}
280
281static void sh_tmu_clocksource_disable(struct clocksource *cs)
282{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100283 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200284
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100285 if (WARN_ON(!ch->cs_enabled))
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200286 return;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200287
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100288 sh_tmu_disable(ch);
289 ch->cs_enabled = false;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200290}
291
292static void sh_tmu_clocksource_suspend(struct clocksource *cs)
293{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100294 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200295
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100296 if (!ch->cs_enabled)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200297 return;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200298
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100299 if (--ch->enable_count == 0) {
300 __sh_tmu_disable(ch);
301 pm_genpd_syscore_poweroff(&ch->tmu->pdev->dev);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200302 }
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200303}
304
305static void sh_tmu_clocksource_resume(struct clocksource *cs)
306{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100307 struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200308
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100309 if (!ch->cs_enabled)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200310 return;
311
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100312 if (ch->enable_count++ == 0) {
313 pm_genpd_syscore_poweron(&ch->tmu->pdev->dev);
314 __sh_tmu_enable(ch);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200315 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000316}
317
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100318static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch,
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100319 const char *name)
Magnus Damm9570ef22009-05-01 06:51:00 +0000320{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100321 struct clocksource *cs = &ch->cs;
Magnus Damm9570ef22009-05-01 06:51:00 +0000322
323 cs->name = name;
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100324 cs->rating = 200;
Magnus Damm9570ef22009-05-01 06:51:00 +0000325 cs->read = sh_tmu_clocksource_read;
326 cs->enable = sh_tmu_clocksource_enable;
327 cs->disable = sh_tmu_clocksource_disable;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200328 cs->suspend = sh_tmu_clocksource_suspend;
329 cs->resume = sh_tmu_clocksource_resume;
Magnus Damm9570ef22009-05-01 06:51:00 +0000330 cs->mask = CLOCKSOURCE_MASK(32);
331 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
Aurelien Jarno66f49122010-05-31 21:45:48 +0000332
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100333 dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n",
334 ch->index);
Magnus Damm0aeac452011-04-25 22:38:37 +0900335
336 /* Register with dummy 1 Hz value, gets updated in ->enable() */
337 clocksource_register_hz(cs, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000338 return 0;
339}
340
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100341static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced)
Magnus Damm9570ef22009-05-01 06:51:00 +0000342{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100343 return container_of(ced, struct sh_tmu_channel, ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000344}
345
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100346static void sh_tmu_clock_event_start(struct sh_tmu_channel *ch, int periodic)
Magnus Damm9570ef22009-05-01 06:51:00 +0000347{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100348 struct clock_event_device *ced = &ch->ced;
Magnus Damm9570ef22009-05-01 06:51:00 +0000349
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100350 sh_tmu_enable(ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000351
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100352 clockevents_config(ced, ch->rate);
Magnus Damm9570ef22009-05-01 06:51:00 +0000353
354 if (periodic) {
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100355 ch->periodic = (ch->rate + HZ/2) / HZ;
356 sh_tmu_set_next(ch, ch->periodic, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000357 }
358}
359
360static void sh_tmu_clock_event_mode(enum clock_event_mode mode,
361 struct clock_event_device *ced)
362{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100363 struct sh_tmu_channel *ch = ced_to_sh_tmu(ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000364 int disabled = 0;
365
366 /* deal with old setting first */
367 switch (ced->mode) {
368 case CLOCK_EVT_MODE_PERIODIC:
369 case CLOCK_EVT_MODE_ONESHOT:
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100370 sh_tmu_disable(ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000371 disabled = 1;
372 break;
373 default:
374 break;
375 }
376
377 switch (mode) {
378 case CLOCK_EVT_MODE_PERIODIC:
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100379 dev_info(&ch->tmu->pdev->dev,
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100380 "ch%u: used for periodic clock events\n", ch->index);
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100381 sh_tmu_clock_event_start(ch, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000382 break;
383 case CLOCK_EVT_MODE_ONESHOT:
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100384 dev_info(&ch->tmu->pdev->dev,
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100385 "ch%u: used for oneshot clock events\n", ch->index);
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100386 sh_tmu_clock_event_start(ch, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000387 break;
388 case CLOCK_EVT_MODE_UNUSED:
389 if (!disabled)
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100390 sh_tmu_disable(ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000391 break;
392 case CLOCK_EVT_MODE_SHUTDOWN:
393 default:
394 break;
395 }
396}
397
398static int sh_tmu_clock_event_next(unsigned long delta,
399 struct clock_event_device *ced)
400{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100401 struct sh_tmu_channel *ch = ced_to_sh_tmu(ced);
Magnus Damm9570ef22009-05-01 06:51:00 +0000402
403 BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT);
404
405 /* program new delta value */
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100406 sh_tmu_set_next(ch, delta, 0);
Magnus Damm9570ef22009-05-01 06:51:00 +0000407 return 0;
408}
409
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200410static void sh_tmu_clock_event_suspend(struct clock_event_device *ced)
411{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100412 pm_genpd_syscore_poweroff(&ced_to_sh_tmu(ced)->tmu->pdev->dev);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200413}
414
415static void sh_tmu_clock_event_resume(struct clock_event_device *ced)
416{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100417 pm_genpd_syscore_poweron(&ced_to_sh_tmu(ced)->tmu->pdev->dev);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200418}
419
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100420static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100421 const char *name)
Magnus Damm9570ef22009-05-01 06:51:00 +0000422{
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100423 struct clock_event_device *ced = &ch->ced;
Magnus Damm9570ef22009-05-01 06:51:00 +0000424 int ret;
425
Magnus Damm9570ef22009-05-01 06:51:00 +0000426 ced->name = name;
427 ced->features = CLOCK_EVT_FEAT_PERIODIC;
428 ced->features |= CLOCK_EVT_FEAT_ONESHOT;
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100429 ced->rating = 200;
Magnus Damm9570ef22009-05-01 06:51:00 +0000430 ced->cpumask = cpumask_of(0);
431 ced->set_next_event = sh_tmu_clock_event_next;
432 ced->set_mode = sh_tmu_clock_event_mode;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200433 ced->suspend = sh_tmu_clock_event_suspend;
434 ced->resume = sh_tmu_clock_event_resume;
Magnus Damm9570ef22009-05-01 06:51:00 +0000435
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100436 dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n",
437 ch->index);
Paul Mundt39774072012-06-11 17:10:16 +0900438
439 clockevents_config_and_register(ced, 1, 0x300, 0xffffffff);
Paul Mundtda64c2a2010-02-25 16:37:46 +0900440
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100441 ret = request_irq(ch->irq, sh_tmu_interrupt,
Laurent Pinchart1c56cf62014-02-17 11:27:49 +0100442 IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
Laurent Pinchartde2d12c2014-01-27 15:29:19 +0100443 dev_name(&ch->tmu->pdev->dev), ch);
Magnus Damm9570ef22009-05-01 06:51:00 +0000444 if (ret) {
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100445 dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n",
446 ch->index, ch->irq);
Magnus Damm9570ef22009-05-01 06:51:00 +0000447 return;
448 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000449}
450
Laurent Pinchart84876d02014-02-17 16:04:16 +0100451static int sh_tmu_register(struct sh_tmu_channel *ch, const char *name,
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100452 bool clockevent, bool clocksource)
Magnus Damm9570ef22009-05-01 06:51:00 +0000453{
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100454 if (clockevent) {
455 ch->tmu->has_clockevent = true;
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100456 sh_tmu_register_clockevent(ch, name);
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100457 } else if (clocksource) {
458 ch->tmu->has_clocksource = true;
Laurent Pinchartf1010ed2014-02-19 17:00:31 +0100459 sh_tmu_register_clocksource(ch, name);
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100460 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000461
462 return 0;
463}
464
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100465static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, unsigned int index,
466 bool clockevent, bool clocksource,
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100467 struct sh_tmu_device *tmu)
468{
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100469 /* Skip unused channels. */
470 if (!clockevent && !clocksource)
471 return 0;
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100472
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100473 ch->tmu = tmu;
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100474 ch->index = index;
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100475
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100476 if (tmu->model == SH_TMU_SH3)
477 ch->base = tmu->mapbase + 4 + ch->index * 12;
478 else
479 ch->base = tmu->mapbase + 8 + ch->index * 12;
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100480
Laurent Pinchartc54697a2014-05-16 14:44:23 +0200481 ch->irq = platform_get_irq(tmu->pdev, index);
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100482 if (ch->irq < 0) {
Laurent Pinchartfe68eb82014-01-27 22:04:17 +0100483 dev_err(&tmu->pdev->dev, "ch%u: failed to get irq\n",
484 ch->index);
Laurent Pincharta94ddaa2014-01-27 22:04:17 +0100485 return ch->irq;
486 }
487
488 ch->cs_enabled = false;
489 ch->enable_count = 0;
490
Laurent Pinchart84876d02014-02-17 16:04:16 +0100491 return sh_tmu_register(ch, dev_name(&tmu->pdev->dev),
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100492 clockevent, clocksource);
493}
494
495static int sh_tmu_map_memory(struct sh_tmu_device *tmu)
496{
497 struct resource *res;
498
499 res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0);
500 if (!res) {
501 dev_err(&tmu->pdev->dev, "failed to get I/O memory\n");
502 return -ENXIO;
503 }
504
505 tmu->mapbase = ioremap_nocache(res->start, resource_size(res));
506 if (tmu->mapbase == NULL)
507 return -ENXIO;
508
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100509 return 0;
510}
511
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100512static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
Magnus Damm9570ef22009-05-01 06:51:00 +0000513{
Paul Mundt46a12f72009-05-03 17:57:17 +0900514 struct sh_timer_config *cfg = pdev->dev.platform_data;
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100515 const struct platform_device_id *id = pdev->id_entry;
516 unsigned int i;
Laurent Pinchart1c56cf62014-02-17 11:27:49 +0100517 int ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000518
519 if (!cfg) {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100520 dev_err(&tmu->pdev->dev, "missing platform data\n");
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100521 return -ENXIO;
Magnus Damm9570ef22009-05-01 06:51:00 +0000522 }
523
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100524 tmu->pdev = pdev;
525 tmu->model = id->driver_data;
Magnus Damm9570ef22009-05-01 06:51:00 +0000526
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100527 /* Get hold of clock. */
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100528 tmu->clk = clk_get(&tmu->pdev->dev, "fck");
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100529 if (IS_ERR(tmu->clk)) {
530 dev_err(&tmu->pdev->dev, "cannot get clock\n");
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100531 return PTR_ERR(tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000532 }
Laurent Pinchart1c09eb32013-11-08 11:08:00 +0100533
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100534 ret = clk_prepare(tmu->clk);
Laurent Pinchart1c09eb32013-11-08 11:08:00 +0100535 if (ret < 0)
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100536 goto err_clk_put;
Laurent Pinchart1c09eb32013-11-08 11:08:00 +0100537
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100538 /* Map the memory resource. */
539 ret = sh_tmu_map_memory(tmu);
540 if (ret < 0) {
541 dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n");
542 goto err_clk_unprepare;
Laurent Pincharta5de49f2014-01-27 22:04:17 +0100543 }
544
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100545 /* Allocate and setup the channels. */
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100546 tmu->num_channels = hweight8(cfg->channels_mask);
Laurent Pincharta5de49f2014-01-27 22:04:17 +0100547
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100548 tmu->channels = kzalloc(sizeof(*tmu->channels) * tmu->num_channels,
549 GFP_KERNEL);
550 if (tmu->channels == NULL) {
551 ret = -ENOMEM;
552 goto err_unmap;
553 }
Laurent Pincharta5de49f2014-01-27 22:04:17 +0100554
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100555 /*
556 * Use the first channel as a clock event device and the second channel
557 * as a clock source.
558 */
559 for (i = 0; i < tmu->num_channels; ++i) {
560 ret = sh_tmu_channel_setup(&tmu->channels[i], i,
561 i == 0, i == 1, tmu);
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100562 if (ret < 0)
563 goto err_unmap;
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100564 }
565
566 platform_set_drvdata(pdev, tmu);
Laurent Pinchart394a4482013-11-08 11:07:59 +0100567
568 return 0;
569
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100570err_unmap:
Laurent Pincharta5de49f2014-01-27 22:04:17 +0100571 kfree(tmu->channels);
Laurent Pinchart681b9e82014-01-28 15:52:46 +0100572 iounmap(tmu->mapbase);
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100573err_clk_unprepare:
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100574 clk_unprepare(tmu->clk);
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100575err_clk_put:
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100576 clk_put(tmu->clk);
Magnus Damm9570ef22009-05-01 06:51:00 +0000577 return ret;
578}
579
Greg Kroah-Hartman18505142012-12-21 15:11:38 -0800580static int sh_tmu_probe(struct platform_device *pdev)
Magnus Damm9570ef22009-05-01 06:51:00 +0000581{
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100582 struct sh_tmu_device *tmu = platform_get_drvdata(pdev);
Magnus Damm9570ef22009-05-01 06:51:00 +0000583 int ret;
584
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200585 if (!is_early_platform_device(pdev)) {
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200586 pm_runtime_set_active(&pdev->dev);
587 pm_runtime_enable(&pdev->dev);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200588 }
Rafael J. Wysocki2ee619f2012-03-13 22:40:00 +0100589
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100590 if (tmu) {
Paul Mundt214a6072010-03-10 16:26:25 +0900591 dev_info(&pdev->dev, "kept as earlytimer\n");
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200592 goto out;
Magnus Damm9570ef22009-05-01 06:51:00 +0000593 }
594
Laurent Pinchart3b77a832014-01-27 22:04:17 +0100595 tmu = kzalloc(sizeof(*tmu), GFP_KERNEL);
Jingoo Han814876b2014-05-22 14:05:07 +0200596 if (tmu == NULL)
Magnus Damm9570ef22009-05-01 06:51:00 +0000597 return -ENOMEM;
Magnus Damm9570ef22009-05-01 06:51:00 +0000598
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100599 ret = sh_tmu_setup(tmu, pdev);
Magnus Damm9570ef22009-05-01 06:51:00 +0000600 if (ret) {
Laurent Pinchart0a72aa32014-01-27 22:04:17 +0100601 kfree(tmu);
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200602 pm_runtime_idle(&pdev->dev);
603 return ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000604 }
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200605 if (is_early_platform_device(pdev))
606 return 0;
607
608 out:
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100609 if (tmu->has_clockevent || tmu->has_clocksource)
Rafael J. Wysocki61a53bf2012-08-06 01:48:17 +0200610 pm_runtime_irq_safe(&pdev->dev);
611 else
612 pm_runtime_idle(&pdev->dev);
613
614 return 0;
Magnus Damm9570ef22009-05-01 06:51:00 +0000615}
616
Greg Kroah-Hartman18505142012-12-21 15:11:38 -0800617static int sh_tmu_remove(struct platform_device *pdev)
Magnus Damm9570ef22009-05-01 06:51:00 +0000618{
619 return -EBUSY; /* cannot unregister clockevent and clocksource */
620}
621
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100622static const struct platform_device_id sh_tmu_id_table[] = {
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100623 { "sh-tmu", SH_TMU },
624 { "sh-tmu-sh3", SH_TMU_SH3 },
625 { }
626};
627MODULE_DEVICE_TABLE(platform, sh_tmu_id_table);
628
Magnus Damm9570ef22009-05-01 06:51:00 +0000629static struct platform_driver sh_tmu_device_driver = {
630 .probe = sh_tmu_probe,
Greg Kroah-Hartman18505142012-12-21 15:11:38 -0800631 .remove = sh_tmu_remove,
Magnus Damm9570ef22009-05-01 06:51:00 +0000632 .driver = {
633 .name = "sh_tmu",
Laurent Pinchart8c7f21e2014-01-28 12:36:48 +0100634 },
635 .id_table = sh_tmu_id_table,
Magnus Damm9570ef22009-05-01 06:51:00 +0000636};
637
638static int __init sh_tmu_init(void)
639{
640 return platform_driver_register(&sh_tmu_device_driver);
641}
642
643static void __exit sh_tmu_exit(void)
644{
645 platform_driver_unregister(&sh_tmu_device_driver);
646}
647
648early_platform_init("earlytimer", &sh_tmu_device_driver);
Simon Hormanb9773c32013-03-05 15:40:42 +0900649subsys_initcall(sh_tmu_init);
Magnus Damm9570ef22009-05-01 06:51:00 +0000650module_exit(sh_tmu_exit);
651
652MODULE_AUTHOR("Magnus Damm");
653MODULE_DESCRIPTION("SuperH TMU Timer Driver");
654MODULE_LICENSE("GPL v2");