Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
| 3 | * Copyright (C) 2000-2008 Alacritech, Inc. All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above |
| 12 | * copyright notice, this list of conditions and the following |
| 13 | * disclaimer in the documentation and/or other materials provided |
| 14 | * with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY |
| 17 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 19 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR |
| 20 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 24 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 25 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 26 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | * |
| 29 | * The views and conclusions contained in the software and documentation |
| 30 | * are those of the authors and should not be interpreted as representing |
| 31 | * official policies, either expressed or implied, of Alacritech, Inc. |
| 32 | * |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 33 | * Parts developed by LinSysSoft Sahara team |
| 34 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 35 | **************************************************************************/ |
| 36 | |
| 37 | /* |
| 38 | * FILENAME: sxg.c |
| 39 | * |
| 40 | * The SXG driver for Alacritech's 10Gbe products. |
| 41 | * |
| 42 | * NOTE: This is the standard, non-accelerated version of Alacritech's |
| 43 | * IS-NIC driver. |
| 44 | */ |
| 45 | |
| 46 | #include <linux/kernel.h> |
| 47 | #include <linux/string.h> |
| 48 | #include <linux/errno.h> |
| 49 | #include <linux/module.h> |
| 50 | #include <linux/moduleparam.h> |
| 51 | #include <linux/ioport.h> |
| 52 | #include <linux/slab.h> |
| 53 | #include <linux/interrupt.h> |
| 54 | #include <linux/timer.h> |
| 55 | #include <linux/pci.h> |
| 56 | #include <linux/spinlock.h> |
| 57 | #include <linux/init.h> |
| 58 | #include <linux/netdevice.h> |
| 59 | #include <linux/etherdevice.h> |
| 60 | #include <linux/ethtool.h> |
| 61 | #include <linux/skbuff.h> |
| 62 | #include <linux/delay.h> |
| 63 | #include <linux/types.h> |
| 64 | #include <linux/dma-mapping.h> |
| 65 | #include <linux/mii.h> |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 66 | #include <linux/ip.h> |
| 67 | #include <linux/in.h> |
| 68 | #include <linux/tcp.h> |
| 69 | #include <linux/ipv6.h> |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 70 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 71 | #define SLIC_GET_STATS_ENABLED 0 |
| 72 | #define LINUX_FREES_ADAPTER_RESOURCES 1 |
| 73 | #define SXG_OFFLOAD_IP_CHECKSUM 0 |
| 74 | #define SXG_POWER_MANAGEMENT_ENABLED 0 |
| 75 | #define VPCI 0 |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 76 | #define ATK_DEBUG 1 |
| 77 | |
| 78 | #include "sxg_os.h" |
| 79 | #include "sxghw.h" |
| 80 | #include "sxghif.h" |
| 81 | #include "sxg.h" |
| 82 | #include "sxgdbg.h" |
| 83 | |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 84 | #include "sxgphycode-1.2.h" |
Mithlesh Thukral | a3915dd | 2009-01-19 20:28:13 +0530 | [diff] [blame] | 85 | #define SXG_UCODE_DBG 0 /* Turn on for debugging */ |
| 86 | #ifdef SXG_UCODE_DBG |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 87 | #include "saharadbgdownload-1.71.c" |
| 88 | #include "saharadbgdownloadB-1.10.c" |
Mithlesh Thukral | a3915dd | 2009-01-19 20:28:13 +0530 | [diff] [blame] | 89 | #else |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 90 | #include "saharadownload-1.55.c" |
| 91 | #include "saharadownloadB-1.8.c" |
Mithlesh Thukral | a3915dd | 2009-01-19 20:28:13 +0530 | [diff] [blame] | 92 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 93 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 94 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, u32 Size, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 95 | enum sxg_buffer_type BufferType); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 96 | static int sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 97 | void *RcvBlock, |
| 98 | dma_addr_t PhysicalAddress, |
| 99 | u32 Length); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 100 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 101 | struct sxg_scatter_gather *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 102 | dma_addr_t PhysicalAddress, |
| 103 | u32 Length); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 104 | |
| 105 | static void sxg_mcast_init_crc32(void); |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 106 | static int sxg_entry_open(struct net_device *dev); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 107 | static int sxg_second_open(struct net_device * dev); |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 108 | static int sxg_entry_halt(struct net_device *dev); |
| 109 | static int sxg_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
| 110 | static int sxg_send_packets(struct sk_buff *skb, struct net_device *dev); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 111 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 112 | static int sxg_dumb_sgl(struct sxg_x64_sgl *pSgl, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 113 | struct sxg_scatter_gather *SxgSgl); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 114 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 115 | static void sxg_handle_interrupt(struct adapter_t *adapter, int *work_done, |
| 116 | int budget); |
| 117 | static void sxg_interrupt(struct adapter_t *adapter); |
| 118 | static int sxg_poll(struct napi_struct *napi, int budget); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 119 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 120 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId, |
| 121 | int *sxg_napi_continue, int *work_done, int budget); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 122 | static void sxg_complete_slow_send(struct adapter_t *adapter); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 123 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, |
| 124 | struct sxg_event *Event); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 125 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus); |
| 126 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 127 | struct ether_header *EtherHdr, ushort length); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 128 | static struct net_device_stats *sxg_get_stats(struct net_device * dev); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 129 | void sxg_free_resources(struct adapter_t *adapter); |
| 130 | void sxg_free_rcvblocks(struct adapter_t *adapter); |
| 131 | void sxg_free_sgl_buffers(struct adapter_t *adapter); |
| 132 | void sxg_unmap_resources(struct adapter_t *adapter); |
| 133 | void sxg_free_mcast_addrs(struct adapter_t *adapter); |
| 134 | void sxg_collect_statistics(struct adapter_t *adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 135 | static int sxg_register_interrupt(struct adapter_t *adapter); |
| 136 | static void sxg_remove_isr(struct adapter_t *adapter); |
| 137 | static irqreturn_t sxg_isr(int irq, void *dev_id); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 138 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 139 | #define XXXTODO 0 |
| 140 | |
Greg Kroah-Hartman | 96e7088 | 2009-01-21 08:17:45 -0800 | [diff] [blame] | 141 | #if XXXTODO |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 142 | static int sxg_mac_set_address(struct net_device *dev, void *ptr); |
Greg Kroah-Hartman | 96e7088 | 2009-01-21 08:17:45 -0800 | [diff] [blame] | 143 | #endif |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 144 | static void sxg_mcast_set_list(struct net_device *dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 145 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 146 | static int sxg_adapter_set_hwaddr(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 147 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 148 | static int sxg_initialize_adapter(struct adapter_t *adapter); |
| 149 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter); |
| 150 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 151 | unsigned char Index); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 152 | int sxg_change_mtu (struct net_device *netdev, int new_mtu); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 153 | static int sxg_initialize_link(struct adapter_t *adapter); |
| 154 | static int sxg_phy_init(struct adapter_t *adapter); |
| 155 | static void sxg_link_event(struct adapter_t *adapter); |
| 156 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 157 | static void sxg_link_state(struct adapter_t *adapter, |
| 158 | enum SXG_LINK_STATE LinkState); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 159 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 160 | u32 DevAddr, u32 RegAddr, u32 Value); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 161 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 162 | u32 DevAddr, u32 RegAddr, u32 *pValue); |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 163 | static void sxg_set_mcast_addr(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 164 | |
| 165 | static unsigned int sxg_first_init = 1; |
| 166 | static char *sxg_banner = |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 167 | "Alacritech SLIC Technology(tm) Server and Storage \ |
| 168 | 10Gbe Accelerator (Non-Accelerated)\n"; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 169 | |
| 170 | static int sxg_debug = 1; |
| 171 | static int debug = -1; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 172 | static struct net_device *head_netdevice = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 173 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 174 | static struct sxgbase_driver sxg_global = { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 175 | .dynamic_intagg = 1, |
| 176 | }; |
| 177 | static int intagg_delay = 100; |
| 178 | static u32 dynamic_intagg = 0; |
| 179 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 180 | char sxg_driver_name[] = "sxg_nic"; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 181 | #define DRV_AUTHOR "Alacritech, Inc. Engineering" |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 182 | #define DRV_DESCRIPTION \ |
| 183 | "Alacritech SLIC Techonology(tm) Non-Accelerated 10Gbe Driver" |
| 184 | #define DRV_COPYRIGHT \ |
| 185 | "Copyright 2000-2008 Alacritech, Inc. All rights reserved." |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 186 | |
| 187 | MODULE_AUTHOR(DRV_AUTHOR); |
| 188 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
| 189 | MODULE_LICENSE("GPL"); |
| 190 | |
| 191 | module_param(dynamic_intagg, int, 0); |
| 192 | MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); |
| 193 | module_param(intagg_delay, int, 0); |
| 194 | MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); |
| 195 | |
| 196 | static struct pci_device_id sxg_pci_tbl[] __devinitdata = { |
| 197 | {PCI_DEVICE(SXG_VENDOR_ID, SXG_DEVICE_ID)}, |
| 198 | {0,} |
| 199 | }; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 200 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 201 | MODULE_DEVICE_TABLE(pci, sxg_pci_tbl); |
| 202 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 203 | static inline void sxg_reg32_write(void __iomem *reg, u32 value, bool flush) |
| 204 | { |
| 205 | writel(value, reg); |
| 206 | if (flush) |
| 207 | mb(); |
| 208 | } |
| 209 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 210 | static inline void sxg_reg64_write(struct adapter_t *adapter, void __iomem *reg, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 211 | u64 value, u32 cpu) |
| 212 | { |
| 213 | u32 value_high = (u32) (value >> 32); |
| 214 | u32 value_low = (u32) (value & 0x00000000FFFFFFFF); |
| 215 | unsigned long flags; |
| 216 | |
| 217 | spin_lock_irqsave(&adapter->Bit64RegLock, flags); |
| 218 | writel(value_high, (void __iomem *)(&adapter->UcodeRegs[cpu].Upper)); |
| 219 | writel(value_low, reg); |
| 220 | spin_unlock_irqrestore(&adapter->Bit64RegLock, flags); |
| 221 | } |
| 222 | |
| 223 | static void sxg_init_driver(void) |
| 224 | { |
| 225 | if (sxg_first_init) { |
| 226 | DBG_ERROR("sxg: %s sxg_first_init set jiffies[%lx]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 227 | __func__, jiffies); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 228 | sxg_first_init = 0; |
| 229 | spin_lock_init(&sxg_global.driver_lock); |
| 230 | } |
| 231 | } |
| 232 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 233 | static void sxg_dbg_macaddrs(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 234 | { |
| 235 | DBG_ERROR(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 236 | adapter->netdev->name, adapter->currmacaddr[0], |
| 237 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 238 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 239 | adapter->currmacaddr[5]); |
| 240 | DBG_ERROR(" (%s) mac %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 241 | adapter->netdev->name, adapter->macaddr[0], |
| 242 | adapter->macaddr[1], adapter->macaddr[2], |
| 243 | adapter->macaddr[3], adapter->macaddr[4], |
| 244 | adapter->macaddr[5]); |
| 245 | return; |
| 246 | } |
| 247 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 248 | /* SXG Globals */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 249 | static struct sxg_driver SxgDriver; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 250 | |
| 251 | #ifdef ATKDBG |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 252 | static struct sxg_trace_buffer LSxgTraceBuffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 253 | #endif /* ATKDBG */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 254 | static struct sxg_trace_buffer *SxgTraceBuffer = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 255 | |
| 256 | /* |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 257 | * MSI Related API's |
| 258 | */ |
| 259 | int sxg_register_intr(struct adapter_t *adapter); |
| 260 | int sxg_enable_msi_x(struct adapter_t *adapter); |
| 261 | int sxg_add_msi_isr(struct adapter_t *adapter); |
| 262 | void sxg_remove_msix_isr(struct adapter_t *adapter); |
| 263 | int sxg_set_interrupt_capability(struct adapter_t *adapter); |
| 264 | |
| 265 | int sxg_set_interrupt_capability(struct adapter_t *adapter) |
| 266 | { |
| 267 | int ret; |
| 268 | |
| 269 | ret = sxg_enable_msi_x(adapter); |
| 270 | if (ret != STATUS_SUCCESS) { |
| 271 | adapter->msi_enabled = FALSE; |
| 272 | DBG_ERROR("sxg_set_interrupt_capability MSI-X Disable\n"); |
| 273 | } else { |
| 274 | adapter->msi_enabled = TRUE; |
| 275 | DBG_ERROR("sxg_set_interrupt_capability MSI-X Enable\n"); |
| 276 | } |
| 277 | return ret; |
| 278 | } |
| 279 | |
| 280 | int sxg_register_intr(struct adapter_t *adapter) |
| 281 | { |
| 282 | int ret = 0; |
| 283 | |
| 284 | if (adapter->msi_enabled) { |
| 285 | ret = sxg_add_msi_isr(adapter); |
| 286 | } |
| 287 | else { |
| 288 | DBG_ERROR("MSI-X Enable Failed. Using Pin INT\n"); |
| 289 | ret = sxg_register_interrupt(adapter); |
| 290 | if (ret != STATUS_SUCCESS) { |
| 291 | DBG_ERROR("sxg_register_interrupt Failed\n"); |
| 292 | } |
| 293 | } |
| 294 | return ret; |
| 295 | } |
| 296 | |
| 297 | int sxg_enable_msi_x(struct adapter_t *adapter) |
| 298 | { |
| 299 | int ret; |
| 300 | |
| 301 | adapter->nr_msix_entries = 1; |
| 302 | adapter->msi_entries = kmalloc(adapter->nr_msix_entries * |
| 303 | sizeof(struct msix_entry),GFP_KERNEL); |
| 304 | if (!adapter->msi_entries) { |
| 305 | DBG_ERROR("%s:MSI Entries memory allocation Failed\n",__func__); |
| 306 | return -ENOMEM; |
| 307 | } |
| 308 | memset(adapter->msi_entries, 0, adapter->nr_msix_entries * |
| 309 | sizeof(struct msix_entry)); |
| 310 | |
| 311 | ret = pci_enable_msix(adapter->pcidev, adapter->msi_entries, |
| 312 | adapter->nr_msix_entries); |
| 313 | if (ret) { |
| 314 | DBG_ERROR("Enabling MSI-X with %d vectors failed\n", |
| 315 | adapter->nr_msix_entries); |
| 316 | /*Should try with less vector returned.*/ |
| 317 | kfree(adapter->msi_entries); |
| 318 | return STATUS_FAILURE; /*MSI-X Enable failed.*/ |
| 319 | } |
| 320 | return (STATUS_SUCCESS); |
| 321 | } |
| 322 | |
| 323 | int sxg_add_msi_isr(struct adapter_t *adapter) |
| 324 | { |
| 325 | int ret,i; |
| 326 | |
| 327 | if (!adapter->intrregistered) { |
| 328 | for (i=0; i<adapter->nr_msix_entries; i++) { |
| 329 | ret = request_irq (adapter->msi_entries[i].vector, |
| 330 | sxg_isr, |
| 331 | IRQF_SHARED, |
| 332 | adapter->netdev->name, |
| 333 | adapter->netdev); |
| 334 | if (ret) { |
| 335 | DBG_ERROR("sxg: MSI-X request_irq (%s) " |
| 336 | "FAILED [%x]\n", adapter->netdev->name, |
| 337 | ret); |
| 338 | return (ret); |
| 339 | } |
| 340 | } |
| 341 | } |
| 342 | adapter->msi_enabled = TRUE; |
| 343 | adapter->intrregistered = 1; |
| 344 | adapter->IntRegistered = TRUE; |
| 345 | return (STATUS_SUCCESS); |
| 346 | } |
| 347 | |
| 348 | void sxg_remove_msix_isr(struct adapter_t *adapter) |
| 349 | { |
| 350 | int i,vector; |
| 351 | struct net_device *netdev = adapter->netdev; |
| 352 | |
| 353 | for(i=0; i< adapter->nr_msix_entries;i++) |
| 354 | { |
| 355 | vector = adapter->msi_entries[i].vector; |
| 356 | DBG_ERROR("%s : Freeing IRQ vector#%d\n",__FUNCTION__,vector); |
| 357 | free_irq(vector,netdev); |
| 358 | } |
| 359 | } |
| 360 | |
| 361 | |
| 362 | static void sxg_remove_isr(struct adapter_t *adapter) |
| 363 | { |
| 364 | struct net_device *netdev = adapter->netdev; |
| 365 | if (adapter->msi_enabled) |
| 366 | sxg_remove_msix_isr(adapter); |
| 367 | else |
| 368 | free_irq(adapter->netdev->irq, netdev); |
| 369 | } |
| 370 | |
| 371 | void sxg_reset_interrupt_capability(struct adapter_t *adapter) |
| 372 | { |
| 373 | if (adapter->msi_enabled) { |
| 374 | pci_disable_msix(adapter->pcidev); |
| 375 | kfree(adapter->msi_entries); |
| 376 | adapter->msi_entries = NULL; |
| 377 | } |
| 378 | return; |
| 379 | } |
| 380 | |
| 381 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 382 | * sxg_download_microcode |
| 383 | * |
| 384 | * Download Microcode to Sahara adapter |
| 385 | * |
| 386 | * Arguments - |
| 387 | * adapter - A pointer to our adapter structure |
| 388 | * UcodeSel - microcode file selection |
| 389 | * |
| 390 | * Return |
| 391 | * int |
| 392 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 393 | static bool sxg_download_microcode(struct adapter_t *adapter, |
| 394 | enum SXG_UCODE_SEL UcodeSel) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 395 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 396 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 397 | u32 Section; |
| 398 | u32 ThisSectionSize; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 399 | u32 *Instruction = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 400 | u32 BaseAddress, AddressOffset, Address; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 401 | /* u32 Failure; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 402 | u32 ValueRead; |
| 403 | u32 i; |
| 404 | u32 numSections = 0; |
| 405 | u32 sectionSize[16]; |
| 406 | u32 sectionStart[16]; |
| 407 | |
| 408 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DnldUcod", |
| 409 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 410 | DBG_ERROR("sxg: %s ENTER\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 411 | |
| 412 | switch (UcodeSel) { |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 413 | case SXG_UCODE_SYSTEM: // System (operational) ucode |
| 414 | switch (adapter->asictype) { |
| 415 | case SAHARA_REV_A: |
| 416 | DBG_ERROR("%s SAHARA CARD REVISION A\n", |
| 417 | __func__); |
| 418 | numSections = SNumSections; |
| 419 | for (i = 0; i < numSections; i++) { |
| 420 | sectionSize[i] = |
| 421 | SSectionSize[i]; |
| 422 | sectionStart[i] = |
| 423 | SSectionStart[i]; |
| 424 | } |
| 425 | break; |
| 426 | case SAHARA_REV_B: |
| 427 | DBG_ERROR("%s SAHARA CARD REVISION B\n", |
| 428 | __func__); |
| 429 | numSections = SBNumSections; |
| 430 | for (i = 0; i < numSections; i++) { |
| 431 | sectionSize[i] = |
| 432 | SBSectionSize[i]; |
| 433 | sectionStart[i] = |
| 434 | SBSectionStart[i]; |
| 435 | } |
| 436 | break; |
| 437 | } |
| 438 | break; |
| 439 | default: |
| 440 | printk(KERN_ERR KBUILD_MODNAME |
| 441 | ": Woah, big error with the microcode!\n"); |
| 442 | break; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 443 | } |
| 444 | |
| 445 | DBG_ERROR("sxg: RESET THE CARD\n"); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 446 | /* First, reset the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 447 | WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 448 | udelay(50); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 449 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 450 | /* |
| 451 | * Download each section of the microcode as specified in |
| 452 | * its download file. The *download.c file is generated using |
| 453 | * the saharaobjtoc facility which converts the metastep .obj |
| 454 | * file to a .c file which contains a two dimentional array. |
| 455 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 456 | for (Section = 0; Section < numSections; Section++) { |
| 457 | DBG_ERROR("sxg: SECTION # %d\n", Section); |
| 458 | switch (UcodeSel) { |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 459 | case SXG_UCODE_SYSTEM: |
| 460 | switch (adapter->asictype) { |
| 461 | case SAHARA_REV_A: |
| 462 | Instruction = (u32 *) & SaharaUCode[Section][0]; |
| 463 | break; |
| 464 | case SAHARA_REV_B: |
| 465 | Instruction = (u32 *) & SaharaUCodeB[Section][0]; |
| 466 | break; |
| 467 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 468 | break; |
| 469 | default: |
| 470 | ASSERT(0); |
| 471 | break; |
| 472 | } |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 473 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 474 | BaseAddress = sectionStart[Section]; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 475 | /* Size in instructions */ |
| 476 | ThisSectionSize = sectionSize[Section] / 12; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 477 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 478 | AddressOffset++) { |
| 479 | Address = BaseAddress + AddressOffset; |
| 480 | ASSERT((Address & ~MICROCODE_ADDRESS_MASK) == 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 481 | /* Write instruction bits 31 - 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 482 | WRITE_REG(HwRegs->UcodeDataLow, *Instruction, FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 483 | /* Write instruction bits 63-32 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 484 | WRITE_REG(HwRegs->UcodeDataMiddle, *(Instruction + 1), |
| 485 | FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 486 | /* Write instruction bits 95-64 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 487 | WRITE_REG(HwRegs->UcodeDataHigh, *(Instruction + 2), |
| 488 | FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 489 | /* Write instruction address with the WRITE bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 490 | WRITE_REG(HwRegs->UcodeAddr, |
| 491 | (Address | MICROCODE_ADDRESS_WRITE), FLUSH); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 492 | /* |
| 493 | * Sahara bug in the ucode download logic - the write to DataLow |
| 494 | * for the next instruction could get corrupted. To avoid this, |
| 495 | * write to DataLow again for this instruction (which may get |
| 496 | * corrupted, but it doesn't matter), then increment the address |
| 497 | * and write the data for the next instruction to DataLow. That |
| 498 | * write should succeed. |
| 499 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 500 | WRITE_REG(HwRegs->UcodeDataLow, *Instruction, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 501 | /* Advance 3 u32S to start of next instruction */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 502 | Instruction += 3; |
| 503 | } |
| 504 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 505 | /* |
| 506 | * Now repeat the entire operation reading the instruction back and |
| 507 | * checking for parity errors |
| 508 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 509 | for (Section = 0; Section < numSections; Section++) { |
| 510 | DBG_ERROR("sxg: check SECTION # %d\n", Section); |
| 511 | switch (UcodeSel) { |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 512 | case SXG_UCODE_SYSTEM: |
| 513 | switch (adapter->asictype) { |
| 514 | case SAHARA_REV_A: |
| 515 | Instruction = (u32 *) & |
| 516 | SaharaUCode[Section][0]; |
| 517 | break; |
| 518 | case SAHARA_REV_B: |
| 519 | Instruction = (u32 *) & |
| 520 | SaharaUCodeB[Section][0]; |
| 521 | break; |
| 522 | } |
| 523 | break; |
| 524 | default: |
| 525 | ASSERT(0); |
| 526 | break; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 527 | } |
| 528 | BaseAddress = sectionStart[Section]; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 529 | /* Size in instructions */ |
| 530 | ThisSectionSize = sectionSize[Section] / 12; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 531 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 532 | AddressOffset++) { |
| 533 | Address = BaseAddress + AddressOffset; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 534 | /* Write the address with the READ bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 535 | WRITE_REG(HwRegs->UcodeAddr, |
| 536 | (Address | MICROCODE_ADDRESS_READ), FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 537 | /* Read it back and check parity bit. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 538 | READ_REG(HwRegs->UcodeAddr, ValueRead); |
| 539 | if (ValueRead & MICROCODE_ADDRESS_PARITY) { |
| 540 | DBG_ERROR("sxg: %s PARITY ERROR\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 541 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 542 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 543 | return FALSE; /* Parity error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 544 | } |
| 545 | ASSERT((ValueRead & MICROCODE_ADDRESS_MASK) == Address); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 546 | /* Read the instruction back and compare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 547 | READ_REG(HwRegs->UcodeDataLow, ValueRead); |
| 548 | if (ValueRead != *Instruction) { |
| 549 | DBG_ERROR("sxg: %s MISCOMPARE LOW\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 550 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 551 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 552 | } |
| 553 | READ_REG(HwRegs->UcodeDataMiddle, ValueRead); |
| 554 | if (ValueRead != *(Instruction + 1)) { |
| 555 | DBG_ERROR("sxg: %s MISCOMPARE MIDDLE\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 556 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 557 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 558 | } |
| 559 | READ_REG(HwRegs->UcodeDataHigh, ValueRead); |
| 560 | if (ValueRead != *(Instruction + 2)) { |
| 561 | DBG_ERROR("sxg: %s MISCOMPARE HIGH\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 562 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 563 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 564 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 565 | /* Advance 3 u32S to start of next instruction */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 566 | Instruction += 3; |
| 567 | } |
| 568 | } |
| 569 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 570 | /* Everything OK, Go. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 571 | WRITE_REG(HwRegs->UcodeAddr, MICROCODE_ADDRESS_GO, FLUSH); |
| 572 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 573 | /* |
| 574 | * Poll the CardUp register to wait for microcode to initialize |
| 575 | * Give up after 10,000 attemps (500ms). |
| 576 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 577 | for (i = 0; i < 10000; i++) { |
| 578 | udelay(50); |
| 579 | READ_REG(adapter->UcodeRegs[0].CardUp, ValueRead); |
| 580 | if (ValueRead == 0xCAFE) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 581 | DBG_ERROR("sxg: %s BOO YA 0xCAFE\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 582 | break; |
| 583 | } |
| 584 | } |
| 585 | if (i == 10000) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 586 | DBG_ERROR("sxg: %s TIMEOUT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 587 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 588 | return FALSE; /* Timeout */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 589 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 590 | /* |
| 591 | * Now write the LoadSync register. This is used to |
| 592 | * synchronize with the card so it can scribble on the memory |
| 593 | * that contained 0xCAFE from the "CardUp" step above |
| 594 | */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 595 | if (UcodeSel == SXG_UCODE_SYSTEM) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 596 | WRITE_REG(adapter->UcodeRegs[0].LoadSync, 0, FLUSH); |
| 597 | } |
| 598 | |
| 599 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDnldUcd", |
| 600 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 601 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 602 | |
| 603 | return (TRUE); |
| 604 | } |
| 605 | |
| 606 | /* |
| 607 | * sxg_allocate_resources - Allocate memory and locks |
| 608 | * |
| 609 | * Arguments - |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 610 | * adapter - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 611 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 612 | * Return - int |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 613 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 614 | static int sxg_allocate_resources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 615 | { |
Mithlesh Thukral | 9fd6966 | 2009-02-24 18:09:34 +0530 | [diff] [blame] | 616 | int status = STATUS_SUCCESS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 617 | u32 RssIds, IsrCount; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 618 | /* struct sxg_xmt_ring *XmtRing; */ |
| 619 | /* struct sxg_rcv_ring *RcvRing; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 620 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 621 | DBG_ERROR("%s ENTER\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 622 | |
| 623 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocRes", |
| 624 | adapter, 0, 0, 0); |
| 625 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 626 | /* Windows tells us how many CPUs it plans to use for */ |
| 627 | /* RSS */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 628 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 629 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 630 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 631 | DBG_ERROR("%s Setup the spinlocks\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 632 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 633 | /* Allocate spinlocks and initialize listheads first. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 634 | spin_lock_init(&adapter->RcvQLock); |
| 635 | spin_lock_init(&adapter->SglQLock); |
| 636 | spin_lock_init(&adapter->XmtZeroLock); |
| 637 | spin_lock_init(&adapter->Bit64RegLock); |
| 638 | spin_lock_init(&adapter->AdapterLock); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 639 | atomic_set(&adapter->pending_allocations, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 640 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 641 | DBG_ERROR("%s Setup the lists\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 642 | |
| 643 | InitializeListHead(&adapter->FreeRcvBuffers); |
| 644 | InitializeListHead(&adapter->FreeRcvBlocks); |
| 645 | InitializeListHead(&adapter->AllRcvBlocks); |
| 646 | InitializeListHead(&adapter->FreeSglBuffers); |
| 647 | InitializeListHead(&adapter->AllSglBuffers); |
| 648 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 649 | /* |
| 650 | * Mark these basic allocations done. This flags essentially |
| 651 | * tells the SxgFreeResources routine that it can grab spinlocks |
| 652 | * and reference listheads. |
| 653 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 654 | adapter->BasicAllocations = TRUE; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 655 | /* |
| 656 | * Main allocation loop. Start with the maximum supported by |
| 657 | * the microcode and back off if memory allocation |
| 658 | * fails. If we hit a minimum, fail. |
| 659 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 660 | |
| 661 | for (;;) { |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 662 | DBG_ERROR("%s Allocate XmtRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 663 | (unsigned int)(sizeof(struct sxg_xmt_ring) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 664 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 665 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 666 | * Start with big items first - receive and transmit rings. |
| 667 | * At the moment I'm going to keep the ring size fixed and |
| 668 | * adjust the TCBs if we fail. Later we might |
| 669 | * consider reducing the ring size as well.. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 670 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 671 | adapter->XmtRings = pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 672 | sizeof(struct sxg_xmt_ring) * |
| 673 | 1, |
| 674 | &adapter->PXmtRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 675 | DBG_ERROR("%s XmtRings[%p]\n", __func__, adapter->XmtRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 676 | |
| 677 | if (!adapter->XmtRings) { |
| 678 | goto per_tcb_allocation_failed; |
| 679 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 680 | memset(adapter->XmtRings, 0, sizeof(struct sxg_xmt_ring) * 1); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 681 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 682 | DBG_ERROR("%s Allocate RcvRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 683 | (unsigned int)(sizeof(struct sxg_rcv_ring) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 684 | adapter->RcvRings = |
| 685 | pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 686 | sizeof(struct sxg_rcv_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 687 | &adapter->PRcvRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 688 | DBG_ERROR("%s RcvRings[%p]\n", __func__, adapter->RcvRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 689 | if (!adapter->RcvRings) { |
| 690 | goto per_tcb_allocation_failed; |
| 691 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 692 | memset(adapter->RcvRings, 0, sizeof(struct sxg_rcv_ring) * 1); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 693 | adapter->ucode_stats = kzalloc(sizeof(struct sxg_ucode_stats), GFP_ATOMIC); |
| 694 | adapter->pucode_stats = pci_map_single(adapter->pcidev, |
| 695 | adapter->ucode_stats, |
| 696 | sizeof(struct sxg_ucode_stats), |
| 697 | PCI_DMA_FROMDEVICE); |
| 698 | // memset(adapter->ucode_stats, 0, sizeof(struct sxg_ucode_stats)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 699 | break; |
| 700 | |
| 701 | per_tcb_allocation_failed: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 702 | /* an allocation failed. Free any successful allocations. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 703 | if (adapter->XmtRings) { |
| 704 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 705 | sizeof(struct sxg_xmt_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 706 | adapter->XmtRings, |
| 707 | adapter->PXmtRings); |
| 708 | adapter->XmtRings = NULL; |
| 709 | } |
| 710 | if (adapter->RcvRings) { |
| 711 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 712 | sizeof(struct sxg_rcv_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 713 | adapter->RcvRings, |
| 714 | adapter->PRcvRings); |
| 715 | adapter->RcvRings = NULL; |
| 716 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 717 | /* Loop around and try again.... */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 718 | if (adapter->ucode_stats) { |
| 719 | pci_unmap_single(adapter->pcidev, |
| 720 | sizeof(struct sxg_ucode_stats), |
| 721 | adapter->pucode_stats, PCI_DMA_FROMDEVICE); |
| 722 | adapter->ucode_stats = NULL; |
| 723 | } |
| 724 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 725 | } |
| 726 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 727 | DBG_ERROR("%s Initialize RCV ZERO and XMT ZERO rings\n", __func__); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 728 | /* Initialize rcv zero and xmt zero rings */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 729 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE); |
| 730 | SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE); |
| 731 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 732 | /* Sanity check receive data structure format */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 733 | /* ASSERT((adapter->ReceiveBufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 734 | (adapter->ReceiveBufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 735 | ASSERT(sizeof(struct sxg_rcv_descriptor_block) == |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 736 | SXG_RCV_DESCRIPTOR_BLOCK_SIZE); |
| 737 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 738 | DBG_ERROR("%s Allocate EventRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 739 | (unsigned int)(sizeof(struct sxg_event_ring) * RssIds)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 740 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 741 | /* Allocate event queues. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 742 | adapter->EventRings = pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 743 | sizeof(struct sxg_event_ring) * |
| 744 | RssIds, |
| 745 | &adapter->PEventRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 746 | |
| 747 | if (!adapter->EventRings) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 748 | /* Caller will call SxgFreeAdapter to clean up above |
| 749 | * allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 750 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF8", |
| 751 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 752 | status = STATUS_RESOURCES; |
| 753 | goto per_tcb_allocation_failed; |
| 754 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 755 | memset(adapter->EventRings, 0, sizeof(struct sxg_event_ring) * RssIds); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 756 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 757 | DBG_ERROR("%s Allocate ISR size[%x]\n", __func__, IsrCount); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 758 | /* Allocate ISR */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 759 | adapter->Isr = pci_alloc_consistent(adapter->pcidev, |
| 760 | IsrCount, &adapter->PIsr); |
| 761 | if (!adapter->Isr) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 762 | /* Caller will call SxgFreeAdapter to clean up above |
| 763 | * allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 764 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF9", |
| 765 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 766 | status = STATUS_RESOURCES; |
| 767 | goto per_tcb_allocation_failed; |
| 768 | } |
| 769 | memset(adapter->Isr, 0, sizeof(u32) * IsrCount); |
| 770 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 771 | DBG_ERROR("%s Allocate shared XMT ring zero index location size[%x]\n", |
| 772 | __func__, (unsigned int)sizeof(u32)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 773 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 774 | /* Allocate shared XMT ring zero index location */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 775 | adapter->XmtRingZeroIndex = pci_alloc_consistent(adapter->pcidev, |
| 776 | sizeof(u32), |
| 777 | &adapter-> |
| 778 | PXmtRingZeroIndex); |
| 779 | if (!adapter->XmtRingZeroIndex) { |
| 780 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF10", |
| 781 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 782 | status = STATUS_RESOURCES; |
| 783 | goto per_tcb_allocation_failed; |
| 784 | } |
| 785 | memset(adapter->XmtRingZeroIndex, 0, sizeof(u32)); |
| 786 | |
| 787 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlcResS", |
| 788 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 789 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 790 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 791 | } |
| 792 | |
| 793 | /* |
| 794 | * sxg_config_pci - |
| 795 | * |
| 796 | * Set up PCI Configuration space |
| 797 | * |
| 798 | * Arguments - |
| 799 | * pcidev - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 800 | */ |
| 801 | static void sxg_config_pci(struct pci_dev *pcidev) |
| 802 | { |
| 803 | u16 pci_command; |
| 804 | u16 new_command; |
| 805 | |
| 806 | pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 807 | DBG_ERROR("sxg: %s PCI command[%4.4x]\n", __func__, pci_command); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 808 | /* Set the command register */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 809 | new_command = pci_command | ( |
| 810 | /* Memory Space Enable */ |
| 811 | PCI_COMMAND_MEMORY | |
| 812 | /* Bus master enable */ |
| 813 | PCI_COMMAND_MASTER | |
| 814 | /* Memory write and invalidate */ |
| 815 | PCI_COMMAND_INVALIDATE | |
| 816 | /* Parity error response */ |
| 817 | PCI_COMMAND_PARITY | |
| 818 | /* System ERR */ |
| 819 | PCI_COMMAND_SERR | |
| 820 | /* Fast back-to-back */ |
| 821 | PCI_COMMAND_FAST_BACK); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 822 | if (pci_command != new_command) { |
| 823 | DBG_ERROR("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 824 | __func__, pci_command, new_command); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 825 | pci_write_config_word(pcidev, PCI_COMMAND, new_command); |
| 826 | } |
| 827 | } |
| 828 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 829 | /* |
| 830 | * sxg_read_config |
| 831 | * @adapter : Pointer to the adapter structure for the card |
| 832 | * This function will read the configuration data from EEPROM/FLASH |
| 833 | */ |
| 834 | static inline int sxg_read_config(struct adapter_t *adapter) |
| 835 | { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 836 | /* struct sxg_config data; */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 837 | struct sw_cfg_data *data; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 838 | dma_addr_t p_addr; |
| 839 | unsigned long status; |
| 840 | unsigned long i; |
| 841 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 842 | data = pci_alloc_consistent(adapter->pcidev, |
| 843 | sizeof(struct sw_cfg_data), &p_addr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 844 | if(!data) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 845 | /* |
| 846 | * We cant get even this much memory. Raise a hell |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 847 | * Get out of here |
| 848 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 849 | printk(KERN_ERR"%s : Could not allocate memory for reading \ |
| 850 | EEPROM\n", __FUNCTION__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 851 | return -ENOMEM; |
| 852 | } |
| 853 | |
| 854 | WRITE_REG(adapter->UcodeRegs[0].ConfigStat, SXG_CFG_TIMEOUT, TRUE); |
| 855 | |
| 856 | WRITE_REG64(adapter, adapter->UcodeRegs[0].Config, p_addr, 0); |
| 857 | for(i=0; i<1000; i++) { |
| 858 | READ_REG(adapter->UcodeRegs[0].ConfigStat, status); |
| 859 | if (status != SXG_CFG_TIMEOUT) |
| 860 | break; |
| 861 | mdelay(1); /* Do we really need this */ |
| 862 | } |
| 863 | |
| 864 | switch(status) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 865 | /* Config read from EEPROM succeeded */ |
| 866 | case SXG_CFG_LOAD_EEPROM: |
| 867 | /* Config read from Flash succeeded */ |
| 868 | case SXG_CFG_LOAD_FLASH: |
| 869 | /* Copy the MAC address to adapter structure */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 870 | /* TODO: We are not doing the remaining part : FRU, |
| 871 | * etc |
| 872 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 873 | memcpy(adapter->macaddr, data->MacAddr[0].MacAddr, |
| 874 | sizeof(struct sxg_config_mac)); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 875 | break; |
| 876 | case SXG_CFG_TIMEOUT: |
| 877 | case SXG_CFG_LOAD_INVALID: |
| 878 | case SXG_CFG_LOAD_ERROR: |
| 879 | default: /* Fix default handler later */ |
| 880 | printk(KERN_WARNING"%s : We could not read the config \ |
| 881 | word. Status = %ld\n", __FUNCTION__, status); |
| 882 | break; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 883 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 884 | pci_free_consistent(adapter->pcidev, sizeof(struct sw_cfg_data), data, |
| 885 | p_addr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 886 | if (adapter->netdev) { |
| 887 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
| 888 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
| 889 | } |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 890 | sxg_dbg_macaddrs(adapter); |
| 891 | |
| 892 | return status; |
| 893 | } |
| 894 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 895 | static int sxg_entry_probe(struct pci_dev *pcidev, |
| 896 | const struct pci_device_id *pci_tbl_entry) |
| 897 | { |
| 898 | static int did_version = 0; |
| 899 | int err; |
| 900 | struct net_device *netdev; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 901 | struct adapter_t *adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 902 | void __iomem *memmapped_ioaddr; |
| 903 | u32 status = 0; |
| 904 | ulong mmio_start = 0; |
| 905 | ulong mmio_len = 0; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 906 | unsigned char revision_id; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 907 | |
| 908 | DBG_ERROR("sxg: %s 2.6 VERSION ENTER jiffies[%lx] cpu %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 909 | __func__, jiffies, smp_processor_id()); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 910 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 911 | /* Initialize trace buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 912 | #ifdef ATKDBG |
| 913 | SxgTraceBuffer = &LSxgTraceBuffer; |
| 914 | SXG_TRACE_INIT(SxgTraceBuffer, TRACE_NOISY); |
| 915 | #endif |
| 916 | |
| 917 | sxg_global.dynamic_intagg = dynamic_intagg; |
| 918 | |
| 919 | err = pci_enable_device(pcidev); |
| 920 | |
| 921 | DBG_ERROR("Call pci_enable_device(%p) status[%x]\n", pcidev, err); |
| 922 | if (err) { |
| 923 | return err; |
| 924 | } |
| 925 | |
| 926 | if (sxg_debug > 0 && did_version++ == 0) { |
| 927 | printk(KERN_INFO "%s\n", sxg_banner); |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 928 | printk(KERN_INFO "%s\n", SXG_DRV_VERSION); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 929 | } |
| 930 | |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 931 | pci_read_config_byte(pcidev, PCI_REVISION_ID, &revision_id); |
| 932 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 933 | if (!(err = pci_set_dma_mask(pcidev, DMA_64BIT_MASK))) { |
| 934 | DBG_ERROR("pci_set_dma_mask(DMA_64BIT_MASK) successful\n"); |
| 935 | } else { |
| 936 | if ((err = pci_set_dma_mask(pcidev, DMA_32BIT_MASK))) { |
| 937 | DBG_ERROR |
| 938 | ("No usable DMA configuration, aborting err[%x]\n", |
| 939 | err); |
| 940 | return err; |
| 941 | } |
| 942 | DBG_ERROR("pci_set_dma_mask(DMA_32BIT_MASK) successful\n"); |
| 943 | } |
| 944 | |
| 945 | DBG_ERROR("Call pci_request_regions\n"); |
| 946 | |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 947 | err = pci_request_regions(pcidev, sxg_driver_name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 948 | if (err) { |
| 949 | DBG_ERROR("pci_request_regions FAILED err[%x]\n", err); |
| 950 | return err; |
| 951 | } |
| 952 | |
| 953 | DBG_ERROR("call pci_set_master\n"); |
| 954 | pci_set_master(pcidev); |
| 955 | |
| 956 | DBG_ERROR("call alloc_etherdev\n"); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 957 | netdev = alloc_etherdev(sizeof(struct adapter_t)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 958 | if (!netdev) { |
| 959 | err = -ENOMEM; |
| 960 | goto err_out_exit_sxg_probe; |
| 961 | } |
| 962 | DBG_ERROR("alloc_etherdev for slic netdev[%p]\n", netdev); |
| 963 | |
| 964 | SET_NETDEV_DEV(netdev, &pcidev->dev); |
| 965 | |
| 966 | pci_set_drvdata(pcidev, netdev); |
| 967 | adapter = netdev_priv(netdev); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 968 | if (revision_id == 1) { |
| 969 | adapter->asictype = SAHARA_REV_A; |
| 970 | } else if (revision_id == 2) { |
| 971 | adapter->asictype = SAHARA_REV_B; |
| 972 | } else { |
| 973 | ASSERT(0); |
| 974 | DBG_ERROR("%s Unexpected revision ID %x\n", __FUNCTION__, revision_id); |
| 975 | goto err_out_exit_sxg_probe; |
| 976 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 977 | adapter->netdev = netdev; |
| 978 | adapter->pcidev = pcidev; |
| 979 | |
| 980 | mmio_start = pci_resource_start(pcidev, 0); |
| 981 | mmio_len = pci_resource_len(pcidev, 0); |
| 982 | |
| 983 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 984 | mmio_start, mmio_len); |
| 985 | |
| 986 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 987 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 988 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 989 | if (!memmapped_ioaddr) { |
| 990 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 991 | __func__, mmio_len, mmio_start); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 992 | goto err_out_free_mmio_region_0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 993 | } |
| 994 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 995 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] \ |
| 996 | len[%lx], IRQ %d.\n", __func__, memmapped_ioaddr, mmio_start, |
| 997 | mmio_len, pcidev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 998 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 999 | adapter->HwRegs = (void *)memmapped_ioaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1000 | adapter->base_addr = memmapped_ioaddr; |
| 1001 | |
| 1002 | mmio_start = pci_resource_start(pcidev, 2); |
| 1003 | mmio_len = pci_resource_len(pcidev, 2); |
| 1004 | |
| 1005 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 1006 | mmio_start, mmio_len); |
| 1007 | |
| 1008 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1009 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
| 1010 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1011 | if (!memmapped_ioaddr) { |
| 1012 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1013 | __func__, mmio_len, mmio_start); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1014 | goto err_out_free_mmio_region_2; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1015 | } |
| 1016 | |
| 1017 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, " |
| 1018 | "start[%lx] len[%lx], IRQ %d.\n", __func__, |
| 1019 | memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq); |
| 1020 | |
| 1021 | adapter->UcodeRegs = (void *)memmapped_ioaddr; |
| 1022 | |
| 1023 | adapter->State = SXG_STATE_INITIALIZING; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1024 | /* |
| 1025 | * Maintain a list of all adapters anchored by |
| 1026 | * the global SxgDriver structure. |
| 1027 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1028 | adapter->Next = SxgDriver.Adapters; |
| 1029 | SxgDriver.Adapters = adapter; |
| 1030 | adapter->AdapterID = ++SxgDriver.AdapterID; |
| 1031 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1032 | /* Initialize CRC table used to determine multicast hash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1033 | sxg_mcast_init_crc32(); |
| 1034 | |
| 1035 | adapter->JumboEnabled = FALSE; |
| 1036 | adapter->RssEnabled = FALSE; |
| 1037 | if (adapter->JumboEnabled) { |
| 1038 | adapter->FrameSize = JUMBOMAXFRAME; |
| 1039 | adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE; |
| 1040 | } else { |
| 1041 | adapter->FrameSize = ETHERMAXFRAME; |
| 1042 | adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE; |
| 1043 | } |
| 1044 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1045 | /* |
| 1046 | * status = SXG_READ_EEPROM(adapter); |
| 1047 | * if (!status) { |
| 1048 | * goto sxg_init_bad; |
| 1049 | * } |
| 1050 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1051 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1052 | DBG_ERROR("sxg: %s ENTER sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1053 | sxg_config_pci(pcidev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1054 | DBG_ERROR("sxg: %s EXIT sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1055 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1056 | DBG_ERROR("sxg: %s ENTER sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1057 | sxg_init_driver(); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1058 | DBG_ERROR("sxg: %s EXIT sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1059 | |
| 1060 | adapter->vendid = pci_tbl_entry->vendor; |
| 1061 | adapter->devid = pci_tbl_entry->device; |
| 1062 | adapter->subsysid = pci_tbl_entry->subdevice; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1063 | adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); |
| 1064 | adapter->functionnumber = (pcidev->devfn & 0x7); |
| 1065 | adapter->memorylength = pci_resource_len(pcidev, 0); |
| 1066 | adapter->irq = pcidev->irq; |
| 1067 | adapter->next_netdevice = head_netdevice; |
| 1068 | head_netdevice = netdev; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1069 | adapter->port = 0; /*adapter->functionnumber; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1070 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1071 | /* Allocate memory and other resources */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1072 | DBG_ERROR("sxg: %s ENTER sxg_allocate_resources\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1073 | status = sxg_allocate_resources(adapter); |
| 1074 | DBG_ERROR("sxg: %s EXIT sxg_allocate_resources status %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1075 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1076 | if (status != STATUS_SUCCESS) { |
| 1077 | goto err_out_unmap; |
| 1078 | } |
| 1079 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1080 | DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __func__); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 1081 | if (sxg_download_microcode(adapter, SXG_UCODE_SYSTEM)) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1082 | DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1083 | __func__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1084 | sxg_read_config(adapter); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1085 | status = sxg_adapter_set_hwaddr(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1086 | } else { |
| 1087 | adapter->state = ADAPT_FAIL; |
| 1088 | adapter->linkstate = LINK_DOWN; |
| 1089 | DBG_ERROR("sxg_download_microcode FAILED status[%x]\n", status); |
| 1090 | } |
| 1091 | |
| 1092 | netdev->base_addr = (unsigned long)adapter->base_addr; |
| 1093 | netdev->irq = adapter->irq; |
| 1094 | netdev->open = sxg_entry_open; |
| 1095 | netdev->stop = sxg_entry_halt; |
| 1096 | netdev->hard_start_xmit = sxg_send_packets; |
| 1097 | netdev->do_ioctl = sxg_ioctl; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1098 | netdev->change_mtu = sxg_change_mtu; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1099 | #if XXXTODO |
| 1100 | netdev->set_mac_address = sxg_mac_set_address; |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1101 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1102 | netdev->get_stats = sxg_get_stats; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1103 | netdev->set_multicast_list = sxg_mcast_set_list; |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 1104 | SET_ETHTOOL_OPS(netdev, &sxg_nic_ethtool_ops); |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1105 | netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 1106 | err = sxg_set_interrupt_capability(adapter); |
| 1107 | if (err != STATUS_SUCCESS) |
| 1108 | DBG_ERROR("Cannot enable MSI-X capability\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1109 | |
| 1110 | strcpy(netdev->name, "eth%d"); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1111 | /* strcpy(netdev->name, pci_name(pcidev)); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1112 | if ((err = register_netdev(netdev))) { |
| 1113 | DBG_ERROR("Cannot register net device, aborting. %s\n", |
| 1114 | netdev->name); |
| 1115 | goto err_out_unmap; |
| 1116 | } |
| 1117 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1118 | netif_napi_add(netdev, &adapter->napi, |
| 1119 | sxg_poll, SXG_NETDEV_WEIGHT); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1120 | DBG_ERROR |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1121 | ("sxg: %s addr 0x%lx, irq %d, MAC addr \ |
| 1122 | %02X:%02X:%02X:%02X:%02X:%02X\n", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1123 | netdev->name, netdev->base_addr, pcidev->irq, netdev->dev_addr[0], |
| 1124 | netdev->dev_addr[1], netdev->dev_addr[2], netdev->dev_addr[3], |
| 1125 | netdev->dev_addr[4], netdev->dev_addr[5]); |
| 1126 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1127 | /* sxg_init_bad: */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1128 | ASSERT(status == FALSE); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1129 | /* sxg_free_adapter(adapter); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1130 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1131 | DBG_ERROR("sxg: %s EXIT status[%x] jiffies[%lx] cpu %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1132 | status, jiffies, smp_processor_id()); |
| 1133 | return status; |
| 1134 | |
| 1135 | err_out_unmap: |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1136 | sxg_free_resources(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1137 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1138 | err_out_free_mmio_region_2: |
| 1139 | |
| 1140 | mmio_start = pci_resource_start(pcidev, 2); |
| 1141 | mmio_len = pci_resource_len(pcidev, 2); |
| 1142 | release_mem_region(mmio_start, mmio_len); |
| 1143 | |
| 1144 | err_out_free_mmio_region_0: |
| 1145 | |
| 1146 | mmio_start = pci_resource_start(pcidev, 0); |
| 1147 | mmio_len = pci_resource_len(pcidev, 0); |
| 1148 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1149 | release_mem_region(mmio_start, mmio_len); |
| 1150 | |
| 1151 | err_out_exit_sxg_probe: |
| 1152 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1153 | DBG_ERROR("%s EXIT jiffies[%lx] cpu %d\n", __func__, jiffies, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1154 | smp_processor_id()); |
| 1155 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 1156 | pci_disable_device(pcidev); |
| 1157 | DBG_ERROR("sxg: %s deallocate device\n", __FUNCTION__); |
| 1158 | kfree(netdev); |
| 1159 | printk("Exit %s, Sxg driver loading failed..\n", __FUNCTION__); |
| 1160 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1161 | return -ENODEV; |
| 1162 | } |
| 1163 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1164 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1165 | * LINE BASE Interrupt routines.. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1166 | * |
| 1167 | * sxg_disable_interrupt |
| 1168 | * |
| 1169 | * DisableInterrupt Handler |
| 1170 | * |
| 1171 | * Arguments: |
| 1172 | * |
| 1173 | * adapter: Our adapter structure |
| 1174 | * |
| 1175 | * Return Value: |
| 1176 | * None. |
| 1177 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1178 | static void sxg_disable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1179 | { |
| 1180 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DisIntr", |
| 1181 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1182 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1183 | ASSERT(adapter->RssEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1184 | /* Turn off interrupts by writing to the icr register. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1185 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_DISABLE), TRUE); |
| 1186 | |
| 1187 | adapter->InterruptsEnabled = 0; |
| 1188 | |
| 1189 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDisIntr", |
| 1190 | adapter, adapter->InterruptsEnabled, 0, 0); |
| 1191 | } |
| 1192 | |
| 1193 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1194 | * sxg_enable_interrupt |
| 1195 | * |
| 1196 | * EnableInterrupt Handler |
| 1197 | * |
| 1198 | * Arguments: |
| 1199 | * |
| 1200 | * adapter: Our adapter structure |
| 1201 | * |
| 1202 | * Return Value: |
| 1203 | * None. |
| 1204 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1205 | static void sxg_enable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1206 | { |
| 1207 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "EnIntr", |
| 1208 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1209 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1210 | ASSERT(adapter->RssEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1211 | /* Turn on interrupts by writing to the icr register. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1212 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_ENABLE), TRUE); |
| 1213 | |
| 1214 | adapter->InterruptsEnabled = 1; |
| 1215 | |
| 1216 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XEnIntr", |
| 1217 | adapter, 0, 0, 0); |
| 1218 | } |
| 1219 | |
| 1220 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1221 | * sxg_isr - Process an line-based interrupt |
| 1222 | * |
| 1223 | * Arguments: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1224 | * Context - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1225 | * QueueDefault - Output parameter to queue to default CPU |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1226 | * TargetCpus - Output bitmap to schedule DPC's |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1227 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1228 | * Return Value: TRUE if our interrupt |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1229 | */ |
| 1230 | static irqreturn_t sxg_isr(int irq, void *dev_id) |
| 1231 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1232 | struct net_device *dev = (struct net_device *) dev_id; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1233 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1234 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1235 | if(adapter->state != ADAPT_UP) |
| 1236 | return IRQ_NONE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1237 | adapter->Stats.NumInts++; |
| 1238 | if (adapter->Isr[0] == 0) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1239 | /* |
| 1240 | * The SLIC driver used to experience a number of spurious |
| 1241 | * interrupts due to the delay associated with the masking of |
| 1242 | * the interrupt (we'd bounce back in here). If we see that |
| 1243 | * again with Sahara,add a READ_REG of the Icr register after |
| 1244 | * the WRITE_REG below. |
| 1245 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1246 | adapter->Stats.FalseInts++; |
| 1247 | return IRQ_NONE; |
| 1248 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1249 | /* |
| 1250 | * Move the Isr contents and clear the value in |
| 1251 | * shared memory, and mask interrupts |
| 1252 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1253 | /* ASSERT(adapter->IsrDpcsPending == 0); */ |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1254 | #if XXXTODO /* RSS Stuff */ |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1255 | /* |
| 1256 | * If RSS is enabled and the ISR specifies SXG_ISR_EVENT, then |
| 1257 | * schedule DPC's based on event queues. |
| 1258 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1259 | if (adapter->RssEnabled && (adapter->IsrCopy[0] & SXG_ISR_EVENT)) { |
| 1260 | for (i = 0; |
| 1261 | i < adapter->RssSystemInfo->ProcessorInfo.RssCpuCount; |
| 1262 | i++) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1263 | struct sxg_event_ring *EventRing = |
| 1264 | &adapter->EventRings[i]; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1265 | struct sxg_event *Event = |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1266 | &EventRing->Ring[adapter->NextEvent[i]]; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1267 | unsigned char Cpu = |
| 1268 | adapter->RssSystemInfo->RssIdToCpu[i]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1269 | if (Event->Status & EVENT_STATUS_VALID) { |
| 1270 | adapter->IsrDpcsPending++; |
| 1271 | CpuMask |= (1 << Cpu); |
| 1272 | } |
| 1273 | } |
| 1274 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1275 | /* |
| 1276 | * Now, either schedule the CPUs specified by the CpuMask, |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1277 | * or queue default |
| 1278 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1279 | if (CpuMask) { |
| 1280 | *QueueDefault = FALSE; |
| 1281 | } else { |
| 1282 | adapter->IsrDpcsPending = 1; |
| 1283 | *QueueDefault = TRUE; |
| 1284 | } |
| 1285 | *TargetCpus = CpuMask; |
| 1286 | #endif |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1287 | sxg_interrupt(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1288 | |
| 1289 | return IRQ_HANDLED; |
| 1290 | } |
| 1291 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1292 | static void sxg_interrupt(struct adapter_t *adapter) |
| 1293 | { |
| 1294 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_MASK), TRUE); |
| 1295 | |
Randy Dunlap | c1f46a00 | 2009-02-11 13:22:56 -0800 | [diff] [blame] | 1296 | if (napi_schedule_prep(&adapter->napi)) { |
| 1297 | __napi_schedule(&adapter->napi); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1298 | } |
| 1299 | } |
| 1300 | |
| 1301 | static void sxg_handle_interrupt(struct adapter_t *adapter, int *work_done, |
| 1302 | int budget) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1303 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1304 | /* unsigned char RssId = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1305 | u32 NewIsr; |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1306 | int sxg_napi_continue = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1307 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "HndlIntr", |
| 1308 | adapter, adapter->IsrCopy[0], 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1309 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1310 | ASSERT(adapter->RssEnabled == FALSE); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1311 | |
| 1312 | adapter->IsrCopy[0] = adapter->Isr[0]; |
| 1313 | adapter->Isr[0] = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1314 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1315 | /* Always process the event queue. */ |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1316 | while (sxg_napi_continue) |
| 1317 | { |
| 1318 | sxg_process_event_queue(adapter, |
| 1319 | (adapter->RssEnabled ? /*RssId */ 0 : 0), |
| 1320 | &sxg_napi_continue, work_done, budget); |
| 1321 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1322 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1323 | #if XXXTODO /* RSS stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1324 | if (--adapter->IsrDpcsPending) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1325 | /* We're done. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1326 | ASSERT(adapter->RssEnabled); |
| 1327 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DPCsPend", |
| 1328 | adapter, 0, 0, 0); |
| 1329 | return; |
| 1330 | } |
| 1331 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1332 | /* Last (or only) DPC processes the ISR and clears the interrupt. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1333 | NewIsr = sxg_process_isr(adapter, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1334 | /* Reenable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1335 | adapter->IsrCopy[0] = 0; |
| 1336 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ClearIsr", |
| 1337 | adapter, NewIsr, 0, 0); |
| 1338 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1339 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XHndlInt", |
| 1340 | adapter, 0, 0, 0); |
| 1341 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1342 | static int sxg_poll(struct napi_struct *napi, int budget) |
| 1343 | { |
| 1344 | struct adapter_t *adapter = container_of(napi, struct adapter_t, napi); |
| 1345 | int work_done = 0; |
| 1346 | |
| 1347 | sxg_handle_interrupt(adapter, &work_done, budget); |
| 1348 | |
| 1349 | if (work_done < budget) { |
Randy Dunlap | c1f46a00 | 2009-02-11 13:22:56 -0800 | [diff] [blame] | 1350 | napi_complete(napi); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1351 | WRITE_REG(adapter->UcodeRegs[0].Isr, 0, TRUE); |
| 1352 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1353 | return work_done; |
| 1354 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1355 | |
| 1356 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1357 | * sxg_process_isr - Process an interrupt. Called from the line-based and |
| 1358 | * message based interrupt DPC routines |
| 1359 | * |
| 1360 | * Arguments: |
| 1361 | * adapter - Our adapter structure |
| 1362 | * Queue - The ISR that needs processing |
| 1363 | * |
| 1364 | * Return Value: |
| 1365 | * None |
| 1366 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1367 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1368 | { |
| 1369 | u32 Isr = adapter->IsrCopy[MessageId]; |
| 1370 | u32 NewIsr = 0; |
| 1371 | |
| 1372 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ProcIsr", |
| 1373 | adapter, Isr, 0, 0); |
| 1374 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1375 | /* Error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1376 | if (Isr & SXG_ISR_ERR) { |
| 1377 | if (Isr & SXG_ISR_PDQF) { |
| 1378 | adapter->Stats.PdqFull++; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1379 | DBG_ERROR("%s: SXG_ISR_ERR PDQF!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1380 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1381 | /* No host buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1382 | if (Isr & SXG_ISR_RMISS) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1383 | /* |
| 1384 | * There is a bunch of code in the SLIC driver which |
| 1385 | * attempts to process more receive events per DPC |
| 1386 | * if we start to fall behind. We'll probablyd |
| 1387 | * need to do something similar here, but hold |
| 1388 | * off for now. I don't want to make the code more |
| 1389 | * complicated than strictly needed. |
| 1390 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 1391 | adapter->stats.rx_missed_errors++; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1392 | if (adapter->stats.rx_missed_errors< 5) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1393 | DBG_ERROR("%s: SXG_ISR_ERR RMISS!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1394 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1395 | } |
| 1396 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1397 | /* Card crash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1398 | if (Isr & SXG_ISR_DEAD) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1399 | /* |
| 1400 | * Set aside the crash info and set the adapter state |
| 1401 | * to RESET |
| 1402 | */ |
| 1403 | adapter->CrashCpu = (unsigned char) |
| 1404 | ((Isr & SXG_ISR_CPU) >> SXG_ISR_CPU_SHIFT); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1405 | adapter->CrashLocation = (ushort) (Isr & SXG_ISR_CRASH); |
| 1406 | adapter->Dead = TRUE; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1407 | DBG_ERROR("%s: ISR_DEAD %x, CPU: %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1408 | adapter->CrashLocation, adapter->CrashCpu); |
| 1409 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1410 | /* Event ring full */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1411 | if (Isr & SXG_ISR_ERFULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1412 | /* |
| 1413 | * Same issue as RMISS, really. This means the |
| 1414 | * host is falling behind the card. Need to increase |
| 1415 | * event ring size, process more events per interrupt, |
| 1416 | * and/or reduce/remove interrupt aggregation. |
| 1417 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1418 | adapter->Stats.EventRingFull++; |
| 1419 | DBG_ERROR("%s: SXG_ISR_ERR EVENT RING FULL!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1420 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1421 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1422 | /* Transmit drop - no DRAM buffers or XMT error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1423 | if (Isr & SXG_ISR_XDROP) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1424 | DBG_ERROR("%s: SXG_ISR_ERR XDROP!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1425 | } |
| 1426 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1427 | /* Slowpath send completions */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1428 | if (Isr & SXG_ISR_SPSEND) { |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1429 | sxg_complete_slow_send(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1430 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1431 | /* Dump */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1432 | if (Isr & SXG_ISR_UPC) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1433 | /* Maybe change when debug is added.. */ |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1434 | // ASSERT(adapter->DumpCmdRunning); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1435 | adapter->DumpCmdRunning = FALSE; |
| 1436 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1437 | /* Link event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1438 | if (Isr & SXG_ISR_LINK) { |
| 1439 | sxg_link_event(adapter); |
| 1440 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1441 | /* Debug - breakpoint hit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1442 | if (Isr & SXG_ISR_BREAK) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1443 | /* |
| 1444 | * At the moment AGDB isn't written to support interactive |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1445 | * debug sessions. When it is, this interrupt will be used to |
| 1446 | * signal AGDB that it has hit a breakpoint. For now, ASSERT. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1447 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1448 | ASSERT(0); |
| 1449 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1450 | /* Heartbeat response */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1451 | if (Isr & SXG_ISR_PING) { |
| 1452 | adapter->PingOutstanding = FALSE; |
| 1453 | } |
| 1454 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XProcIsr", |
| 1455 | adapter, Isr, NewIsr, 0); |
| 1456 | |
| 1457 | return (NewIsr); |
| 1458 | } |
| 1459 | |
| 1460 | /* |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1461 | * sxg_rcv_checksum - Set the checksum for received packet |
| 1462 | * |
| 1463 | * Arguements: |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1464 | * @adapter - Adapter structure on which packet is received |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1465 | * @skb - Packet which is receieved |
| 1466 | * @Event - Event read from hardware |
| 1467 | */ |
| 1468 | |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1469 | void sxg_rcv_checksum(struct adapter_t *adapter, struct sk_buff *skb, |
| 1470 | struct sxg_event *Event) |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1471 | { |
| 1472 | skb->ip_summed = CHECKSUM_NONE; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1473 | if (likely(adapter->flags & SXG_RCV_IP_CSUM_ENABLED)) { |
| 1474 | if (likely(adapter->flags & SXG_RCV_TCP_CSUM_ENABLED) |
| 1475 | && (Event->Status & EVENT_STATUS_TCPIP)) { |
| 1476 | if(!(Event->Status & EVENT_STATUS_TCPBAD)) |
| 1477 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 1478 | if(!(Event->Status & EVENT_STATUS_IPBAD)) |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1479 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1480 | } else if(Event->Status & EVENT_STATUS_IPONLY) { |
| 1481 | if(!(Event->Status & EVENT_STATUS_IPBAD)) |
| 1482 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 1483 | } |
| 1484 | } |
| 1485 | } |
| 1486 | |
| 1487 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1488 | * sxg_process_event_queue - Process our event queue |
| 1489 | * |
| 1490 | * Arguments: |
| 1491 | * - adapter - Adapter structure |
| 1492 | * - RssId - The event queue requiring processing |
| 1493 | * |
| 1494 | * Return Value: |
| 1495 | * None. |
| 1496 | */ |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1497 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId, |
| 1498 | int *sxg_napi_continue, int *work_done, int budget) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1499 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1500 | struct sxg_event_ring *EventRing = &adapter->EventRings[RssId]; |
| 1501 | struct sxg_event *Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1502 | u32 EventsProcessed = 0, Batches = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1503 | struct sk_buff *skb; |
| 1504 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
| 1505 | struct sk_buff *prev_skb = NULL; |
| 1506 | struct sk_buff *IndicationList[SXG_RCV_ARRAYSIZE]; |
| 1507 | u32 Index; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1508 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1509 | #endif |
| 1510 | u32 ReturnStatus = 0; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1511 | int sxg_rcv_data_buffers = SXG_RCV_DATA_BUFFERS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1512 | |
| 1513 | ASSERT((adapter->State == SXG_STATE_RUNNING) || |
| 1514 | (adapter->State == SXG_STATE_PAUSING) || |
| 1515 | (adapter->State == SXG_STATE_PAUSED) || |
| 1516 | (adapter->State == SXG_STATE_HALTING)); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1517 | /* |
| 1518 | * We may still have unprocessed events on the queue if |
| 1519 | * the card crashed. Don't process them. |
| 1520 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1521 | if (adapter->Dead) { |
| 1522 | return (0); |
| 1523 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1524 | /* |
| 1525 | * In theory there should only be a single processor that |
| 1526 | * accesses this queue, and only at interrupt-DPC time. So/ |
| 1527 | * we shouldn't need a lock for any of this. |
| 1528 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1529 | while (Event->Status & EVENT_STATUS_VALID) { |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1530 | (*sxg_napi_continue) = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1531 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "Event", |
| 1532 | Event, Event->Code, Event->Status, |
| 1533 | adapter->NextEvent); |
| 1534 | switch (Event->Code) { |
| 1535 | case EVENT_CODE_BUFFERS: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1536 | /* struct sxg_ring_info Head & Tail == unsigned char */ |
| 1537 | ASSERT(!(Event->CommandIndex & 0xFF00)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1538 | sxg_complete_descriptor_blocks(adapter, |
| 1539 | Event->CommandIndex); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1540 | break; |
| 1541 | case EVENT_CODE_SLOWRCV: |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1542 | (*work_done)++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1543 | --adapter->RcvBuffersOnCard; |
| 1544 | if ((skb = sxg_slow_receive(adapter, Event))) { |
| 1545 | u32 rx_bytes; |
| 1546 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1547 | /* Add it to our indication list */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1548 | SXG_ADD_RCV_PACKET(adapter, skb, prev_skb, |
| 1549 | IndicationList, num_skbs); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1550 | /* |
| 1551 | * Linux, we just pass up each skb to the |
| 1552 | * protocol above at this point, there is no |
| 1553 | * capability of an indication list. |
| 1554 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1555 | #else |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1556 | /* CHECK skb_pull(skb, INIC_RCVBUF_HEADSIZE); */ |
| 1557 | /* (rcvbuf->length & IRHDDR_FLEN_MSK); */ |
| 1558 | rx_bytes = Event->Length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1559 | adapter->stats.rx_packets++; |
| 1560 | adapter->stats.rx_bytes += rx_bytes; |
Mithlesh Thukral | bbb18b9 | 2009-02-24 18:07:59 +0530 | [diff] [blame] | 1561 | sxg_rcv_checksum(adapter, skb, Event); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1562 | skb->dev = adapter->netdev; |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1563 | netif_receive_skb(skb); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1564 | #endif |
| 1565 | } |
| 1566 | break; |
| 1567 | default: |
| 1568 | DBG_ERROR("%s: ERROR Invalid EventCode %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1569 | __func__, Event->Code); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1570 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1571 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1572 | /* |
| 1573 | * See if we need to restock card receive buffers. |
| 1574 | * There are two things to note here: |
| 1575 | * First - This test is not SMP safe. The |
| 1576 | * adapter->BuffersOnCard field is protected via atomic |
| 1577 | * interlocked calls, but we do not protect it with respect |
| 1578 | * to these tests. The only way to do that is with a lock, |
| 1579 | * and I don't want to grab a lock every time we adjust the |
| 1580 | * BuffersOnCard count. Instead, we allow the buffer |
| 1581 | * replenishment to be off once in a while. The worst that |
| 1582 | * can happen is the card is given on more-or-less descriptor |
| 1583 | * block than the arbitrary value we've chosen. No big deal |
| 1584 | * In short DO NOT ADD A LOCK HERE, OR WHERE RcvBuffersOnCard |
| 1585 | * is adjusted. |
| 1586 | * Second - We expect this test to rarely |
| 1587 | * evaluate to true. We attempt to refill descriptor blocks |
| 1588 | * as they are returned to us (sxg_complete_descriptor_blocks) |
| 1589 | * so The only time this should evaluate to true is when |
| 1590 | * sxg_complete_descriptor_blocks failed to allocate |
| 1591 | * receive buffers. |
| 1592 | */ |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 1593 | if (adapter->JumboEnabled) |
| 1594 | sxg_rcv_data_buffers = SXG_JUMBO_RCV_DATA_BUFFERS; |
| 1595 | |
| 1596 | if (adapter->RcvBuffersOnCard < sxg_rcv_data_buffers) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1597 | sxg_stock_rcv_buffers(adapter); |
| 1598 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1599 | /* |
| 1600 | * It's more efficient to just set this to zero. |
| 1601 | * But clearing the top bit saves potential debug info... |
| 1602 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1603 | Event->Status &= ~EVENT_STATUS_VALID; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1604 | /* Advance to the next event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1605 | SXG_ADVANCE_INDEX(adapter->NextEvent[RssId], EVENT_RING_SIZE); |
| 1606 | Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
| 1607 | EventsProcessed++; |
| 1608 | if (EventsProcessed == EVENT_RING_BATCH) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1609 | /* Release a batch of events back to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1610 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1611 | EVENT_RING_BATCH, FALSE); |
| 1612 | EventsProcessed = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1613 | /* |
| 1614 | * If we've processed our batch limit, break out of the |
| 1615 | * loop and return SXG_ISR_EVENT to arrange for us to |
| 1616 | * be called again |
| 1617 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1618 | if (Batches++ == EVENT_BATCH_LIMIT) { |
| 1619 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1620 | TRACE_NOISY, "EvtLimit", Batches, |
| 1621 | adapter->NextEvent, 0, 0); |
| 1622 | ReturnStatus = SXG_ISR_EVENT; |
| 1623 | break; |
| 1624 | } |
| 1625 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1626 | if (*work_done >= budget) { |
| 1627 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1628 | EventsProcessed, FALSE); |
| 1629 | EventsProcessed = 0; |
| 1630 | (*sxg_napi_continue) = 0; |
| 1631 | break; |
| 1632 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1633 | } |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 1634 | if (!(Event->Status & EVENT_STATUS_VALID)) |
| 1635 | (*sxg_napi_continue) = 0; |
| 1636 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1637 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1638 | /* Indicate any received dumb-nic frames */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1639 | SXG_INDICATE_PACKETS(adapter, IndicationList, num_skbs); |
| 1640 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1641 | /* Release events back to the card. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1642 | if (EventsProcessed) { |
| 1643 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1644 | EventsProcessed, FALSE); |
| 1645 | } |
| 1646 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XPrcEvnt", |
| 1647 | Batches, EventsProcessed, adapter->NextEvent, num_skbs); |
| 1648 | |
| 1649 | return (ReturnStatus); |
| 1650 | } |
| 1651 | |
| 1652 | /* |
| 1653 | * sxg_complete_slow_send - Complete slowpath or dumb-nic sends |
| 1654 | * |
| 1655 | * Arguments - |
| 1656 | * adapter - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1657 | * Return |
| 1658 | * None |
| 1659 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1660 | static void sxg_complete_slow_send(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1661 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1662 | struct sxg_xmt_ring *XmtRing = &adapter->XmtRings[0]; |
| 1663 | struct sxg_ring_info *XmtRingInfo = &adapter->XmtRingZeroInfo; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1664 | u32 *ContextType; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1665 | struct sxg_cmd *XmtCmd; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1666 | unsigned long flags = 0; |
| 1667 | unsigned long sgl_flags = 0; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1668 | unsigned int processed_count = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1669 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1670 | /* |
| 1671 | * NOTE - This lock is dropped and regrabbed in this loop. |
| 1672 | * This means two different processors can both be running/ |
| 1673 | * through this loop. Be *very* careful. |
| 1674 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1675 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1676 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1677 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnds", |
| 1678 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1679 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1680 | while ((XmtRingInfo->Tail != *adapter->XmtRingZeroIndex) |
| 1681 | && processed_count++ < SXG_COMPLETE_SLOW_SEND_LIMIT) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1682 | /* |
| 1683 | * Locate the current Cmd (ring descriptor entry), and |
| 1684 | * associated SGL, and advance the tail |
| 1685 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1686 | SXG_RETURN_CMD(XmtRing, XmtRingInfo, XmtCmd, ContextType); |
| 1687 | ASSERT(ContextType); |
| 1688 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1689 | XmtRingInfo->Head, XmtRingInfo->Tail, XmtCmd, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1690 | /* Clear the SGL field. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1691 | XmtCmd->Sgl = 0; |
| 1692 | |
| 1693 | switch (*ContextType) { |
| 1694 | case SXG_SGL_DUMB: |
| 1695 | { |
| 1696 | struct sk_buff *skb; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1697 | struct sxg_scatter_gather *SxgSgl = |
| 1698 | (struct sxg_scatter_gather *)ContextType; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1699 | dma64_addr_t FirstSgeAddress; |
| 1700 | u32 FirstSgeLength; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1701 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1702 | /* Dumb-nic send. Command context is the dumb-nic SGL */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1703 | skb = (struct sk_buff *)ContextType; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1704 | skb = SxgSgl->DumbPacket; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1705 | FirstSgeAddress = XmtCmd->Buffer.FirstSgeAddress; |
| 1706 | FirstSgeLength = XmtCmd->Buffer.FirstSgeLength; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1707 | /* Complete the send */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1708 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1709 | TRACE_IMPORTANT, "DmSndCmp", skb, 0, |
| 1710 | 0, 0); |
| 1711 | ASSERT(adapter->Stats.XmtQLen); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1712 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1713 | * Now drop the lock and complete the send |
| 1714 | * back to Microsoft. We need to drop the lock |
| 1715 | * because Microsoft can come back with a |
| 1716 | * chimney send, which results in a double trip |
| 1717 | * in SxgTcpOuput |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1718 | */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1719 | spin_unlock_irqrestore( |
| 1720 | &adapter->XmtZeroLock, flags); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1721 | |
| 1722 | SxgSgl->DumbPacket = NULL; |
| 1723 | SXG_COMPLETE_DUMB_SEND(adapter, skb, |
| 1724 | FirstSgeAddress, |
| 1725 | FirstSgeLength); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1726 | SXG_FREE_SGL_BUFFER(adapter, SxgSgl, NULL); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1727 | /* and reacquire.. */ |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1728 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1729 | } |
| 1730 | break; |
| 1731 | default: |
| 1732 | ASSERT(0); |
| 1733 | } |
| 1734 | } |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 1735 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1736 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1737 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1738 | } |
| 1739 | |
| 1740 | /* |
| 1741 | * sxg_slow_receive |
| 1742 | * |
| 1743 | * Arguments - |
| 1744 | * adapter - A pointer to our adapter structure |
| 1745 | * Event - Receive event |
| 1746 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1747 | * Return - skb |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1748 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1749 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, |
| 1750 | struct sxg_event *Event) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1751 | { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1752 | u32 BufferSize = adapter->ReceiveBufferSize; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1753 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1754 | struct sk_buff *Packet; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1755 | static int read_counter = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1756 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1757 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) Event->HostHandle; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1758 | if(read_counter++ & 0x100) |
| 1759 | { |
| 1760 | sxg_collect_statistics(adapter); |
| 1761 | read_counter = 0; |
| 1762 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1763 | ASSERT(RcvDataBufferHdr); |
| 1764 | ASSERT(RcvDataBufferHdr->State == SXG_BUFFER_ONCARD); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1765 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "SlowRcv", Event, |
| 1766 | RcvDataBufferHdr, RcvDataBufferHdr->State, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1767 | /*RcvDataBufferHdr->VirtualAddress*/ 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1768 | /* Drop rcv frames in non-running state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1769 | switch (adapter->State) { |
| 1770 | case SXG_STATE_RUNNING: |
| 1771 | break; |
| 1772 | case SXG_STATE_PAUSING: |
| 1773 | case SXG_STATE_PAUSED: |
| 1774 | case SXG_STATE_HALTING: |
| 1775 | goto drop; |
| 1776 | default: |
| 1777 | ASSERT(0); |
| 1778 | goto drop; |
| 1779 | } |
| 1780 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1781 | /* |
| 1782 | * memcpy(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1783 | * RcvDataBufferHdr->VirtualAddress, Event->Length); |
| 1784 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1785 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1786 | /* Change buffer state to UPSTREAM */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1787 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 1788 | if (Event->Status & EVENT_STATUS_RCVERR) { |
| 1789 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvError", |
| 1790 | Event, Event->Status, Event->HostHandle, 0); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1791 | sxg_process_rcv_error(adapter, *(u32 *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1792 | SXG_RECEIVE_DATA_LOCATION |
| 1793 | (RcvDataBufferHdr)); |
| 1794 | goto drop; |
| 1795 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1796 | #if XXXTODO /* VLAN stuff */ |
| 1797 | /* If there's a VLAN tag, extract it and validate it */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1798 | if (((struct ether_header *) |
| 1799 | (SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)))->EtherType |
| 1800 | == ETHERTYPE_VLAN) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1801 | if (SxgExtractVlanHeader(adapter, RcvDataBufferHdr, Event) != |
| 1802 | STATUS_SUCCESS) { |
| 1803 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, |
| 1804 | "BadVlan", Event, |
| 1805 | SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1806 | Event->Length, 0); |
| 1807 | goto drop; |
| 1808 | } |
| 1809 | } |
| 1810 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1811 | /* Dumb-nic frame. See if it passes our mac filter and update stats */ |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1812 | |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1813 | if (!sxg_mac_filter(adapter, |
| 1814 | (struct ether_header *)(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)), |
| 1815 | Event->Length)) { |
| 1816 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr", |
| 1817 | Event, SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1818 | Event->Length, 0); |
| 1819 | goto drop; |
| 1820 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1821 | |
| 1822 | Packet = RcvDataBufferHdr->SxgDumbRcvPacket; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1823 | SXG_ADJUST_RCV_PACKET(Packet, RcvDataBufferHdr, Event); |
| 1824 | Packet->protocol = eth_type_trans(Packet, adapter->netdev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1825 | |
| 1826 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumbRcv", |
| 1827 | RcvDataBufferHdr, Packet, Event->Length, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1828 | /* Lastly adjust the receive packet length. */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1829 | RcvDataBufferHdr->SxgDumbRcvPacket = NULL; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1830 | RcvDataBufferHdr->PhysicalAddress = (dma_addr_t)NULL; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1831 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize); |
| 1832 | if (RcvDataBufferHdr->skb) |
| 1833 | { |
| 1834 | spin_lock(&adapter->RcvQLock); |
| 1835 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 1836 | // adapter->RcvBuffersOnCard ++; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1837 | spin_unlock(&adapter->RcvQLock); |
| 1838 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1839 | return (Packet); |
| 1840 | |
| 1841 | drop: |
| 1842 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DropRcv", |
| 1843 | RcvDataBufferHdr, Event->Length, 0, 0); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1844 | adapter->stats.rx_dropped++; |
| 1845 | // adapter->Stats.RcvDiscards++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1846 | spin_lock(&adapter->RcvQLock); |
| 1847 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 1848 | spin_unlock(&adapter->RcvQLock); |
| 1849 | return (NULL); |
| 1850 | } |
| 1851 | |
| 1852 | /* |
| 1853 | * sxg_process_rcv_error - process receive error and update |
| 1854 | * stats |
| 1855 | * |
| 1856 | * Arguments: |
| 1857 | * adapter - Adapter structure |
| 1858 | * ErrorStatus - 4-byte receive error status |
| 1859 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1860 | * Return Value : None |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1861 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1862 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1863 | { |
| 1864 | u32 Error; |
| 1865 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 1866 | adapter->stats.rx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1867 | |
| 1868 | if (ErrorStatus & SXG_RCV_STATUS_TRANSPORT_ERROR) { |
| 1869 | Error = ErrorStatus & SXG_RCV_STATUS_TRANSPORT_MASK; |
| 1870 | switch (Error) { |
| 1871 | case SXG_RCV_STATUS_TRANSPORT_CSUM: |
| 1872 | adapter->Stats.TransportCsum++; |
| 1873 | break; |
| 1874 | case SXG_RCV_STATUS_TRANSPORT_UFLOW: |
| 1875 | adapter->Stats.TransportUflow++; |
| 1876 | break; |
| 1877 | case SXG_RCV_STATUS_TRANSPORT_HDRLEN: |
| 1878 | adapter->Stats.TransportHdrLen++; |
| 1879 | break; |
| 1880 | } |
| 1881 | } |
| 1882 | if (ErrorStatus & SXG_RCV_STATUS_NETWORK_ERROR) { |
| 1883 | Error = ErrorStatus & SXG_RCV_STATUS_NETWORK_MASK; |
| 1884 | switch (Error) { |
| 1885 | case SXG_RCV_STATUS_NETWORK_CSUM: |
| 1886 | adapter->Stats.NetworkCsum++; |
| 1887 | break; |
| 1888 | case SXG_RCV_STATUS_NETWORK_UFLOW: |
| 1889 | adapter->Stats.NetworkUflow++; |
| 1890 | break; |
| 1891 | case SXG_RCV_STATUS_NETWORK_HDRLEN: |
| 1892 | adapter->Stats.NetworkHdrLen++; |
| 1893 | break; |
| 1894 | } |
| 1895 | } |
| 1896 | if (ErrorStatus & SXG_RCV_STATUS_PARITY) { |
| 1897 | adapter->Stats.Parity++; |
| 1898 | } |
| 1899 | if (ErrorStatus & SXG_RCV_STATUS_LINK_ERROR) { |
| 1900 | Error = ErrorStatus & SXG_RCV_STATUS_LINK_MASK; |
| 1901 | switch (Error) { |
| 1902 | case SXG_RCV_STATUS_LINK_PARITY: |
| 1903 | adapter->Stats.LinkParity++; |
| 1904 | break; |
| 1905 | case SXG_RCV_STATUS_LINK_EARLY: |
| 1906 | adapter->Stats.LinkEarly++; |
| 1907 | break; |
| 1908 | case SXG_RCV_STATUS_LINK_BUFOFLOW: |
| 1909 | adapter->Stats.LinkBufOflow++; |
| 1910 | break; |
| 1911 | case SXG_RCV_STATUS_LINK_CODE: |
| 1912 | adapter->Stats.LinkCode++; |
| 1913 | break; |
| 1914 | case SXG_RCV_STATUS_LINK_DRIBBLE: |
| 1915 | adapter->Stats.LinkDribble++; |
| 1916 | break; |
| 1917 | case SXG_RCV_STATUS_LINK_CRC: |
| 1918 | adapter->Stats.LinkCrc++; |
| 1919 | break; |
| 1920 | case SXG_RCV_STATUS_LINK_OFLOW: |
| 1921 | adapter->Stats.LinkOflow++; |
| 1922 | break; |
| 1923 | case SXG_RCV_STATUS_LINK_UFLOW: |
| 1924 | adapter->Stats.LinkUflow++; |
| 1925 | break; |
| 1926 | } |
| 1927 | } |
| 1928 | } |
| 1929 | |
| 1930 | /* |
| 1931 | * sxg_mac_filter |
| 1932 | * |
| 1933 | * Arguments: |
| 1934 | * adapter - Adapter structure |
| 1935 | * pether - Ethernet header |
| 1936 | * length - Frame length |
| 1937 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1938 | * Return Value : TRUE if the frame is to be allowed |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1939 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1940 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 1941 | struct ether_header *EtherHdr, ushort length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1942 | { |
| 1943 | bool EqualAddr; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1944 | struct net_device *dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1945 | |
| 1946 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 1947 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1948 | /* broadcast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1949 | if (adapter->MacFilter & MAC_BCAST) { |
| 1950 | adapter->Stats.DumbRcvBcastPkts++; |
| 1951 | adapter->Stats.DumbRcvBcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1952 | return (TRUE); |
| 1953 | } |
| 1954 | } else { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1955 | /* multicast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1956 | if (adapter->MacFilter & MAC_ALLMCAST) { |
| 1957 | adapter->Stats.DumbRcvMcastPkts++; |
| 1958 | adapter->Stats.DumbRcvMcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1959 | return (TRUE); |
| 1960 | } |
| 1961 | if (adapter->MacFilter & MAC_MCAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1962 | struct dev_mc_list *mclist = dev->mc_list; |
| 1963 | while (mclist) { |
| 1964 | ETHER_EQ_ADDR(mclist->da_addr, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1965 | EtherHdr->ether_dhost, |
| 1966 | EqualAddr); |
| 1967 | if (EqualAddr) { |
| 1968 | adapter->Stats. |
| 1969 | DumbRcvMcastPkts++; |
| 1970 | adapter->Stats. |
| 1971 | DumbRcvMcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1972 | return (TRUE); |
| 1973 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1974 | mclist = mclist->next; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1975 | } |
| 1976 | } |
| 1977 | } |
| 1978 | } else if (adapter->MacFilter & MAC_DIRECTED) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1979 | /* |
| 1980 | * Not broadcast or multicast. Must be directed at us or |
| 1981 | * the card is in promiscuous mode. Either way, consider it |
| 1982 | * ours if MAC_DIRECTED is set |
| 1983 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1984 | adapter->Stats.DumbRcvUcastPkts++; |
| 1985 | adapter->Stats.DumbRcvUcastBytes += length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1986 | return (TRUE); |
| 1987 | } |
| 1988 | if (adapter->MacFilter & MAC_PROMISC) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1989 | /* Whatever it is, keep it. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1990 | return (TRUE); |
| 1991 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1992 | return (FALSE); |
| 1993 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 1994 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1995 | static int sxg_register_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1996 | { |
| 1997 | if (!adapter->intrregistered) { |
| 1998 | int retval; |
| 1999 | |
| 2000 | DBG_ERROR |
| 2001 | ("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x] %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2002 | __func__, adapter, adapter->netdev->irq, NR_IRQS); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2003 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2004 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 2005 | sxg_global.flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2006 | |
| 2007 | retval = request_irq(adapter->netdev->irq, |
| 2008 | &sxg_isr, |
| 2009 | IRQF_SHARED, |
| 2010 | adapter->netdev->name, adapter->netdev); |
| 2011 | |
| 2012 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2013 | |
| 2014 | if (retval) { |
| 2015 | DBG_ERROR("sxg: request_irq (%s) FAILED [%x]\n", |
| 2016 | adapter->netdev->name, retval); |
| 2017 | return (retval); |
| 2018 | } |
| 2019 | adapter->intrregistered = 1; |
| 2020 | adapter->IntRegistered = TRUE; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2021 | /* Disable RSS with line-based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2022 | adapter->RssEnabled = FALSE; |
| 2023 | DBG_ERROR("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2024 | __func__, adapter, adapter->netdev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2025 | } |
| 2026 | return (STATUS_SUCCESS); |
| 2027 | } |
| 2028 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2029 | static void sxg_deregister_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2030 | { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2031 | DBG_ERROR("sxg: %s ENTER adapter[%p]\n", __func__, adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2032 | #if XXXTODO |
| 2033 | slic_init_cleanup(adapter); |
| 2034 | #endif |
| 2035 | memset(&adapter->stats, 0, sizeof(struct net_device_stats)); |
| 2036 | adapter->error_interrupts = 0; |
| 2037 | adapter->rcv_interrupts = 0; |
| 2038 | adapter->xmit_interrupts = 0; |
| 2039 | adapter->linkevent_interrupts = 0; |
| 2040 | adapter->upr_interrupts = 0; |
| 2041 | adapter->num_isrs = 0; |
| 2042 | adapter->xmit_completes = 0; |
| 2043 | adapter->rcv_broadcasts = 0; |
| 2044 | adapter->rcv_multicasts = 0; |
| 2045 | adapter->rcv_unicasts = 0; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2046 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2047 | } |
| 2048 | |
| 2049 | /* |
| 2050 | * sxg_if_init |
| 2051 | * |
| 2052 | * Perform initialization of our slic interface. |
| 2053 | * |
| 2054 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2055 | static int sxg_if_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2056 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2057 | struct net_device *dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2058 | int status = 0; |
| 2059 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2060 | DBG_ERROR("sxg: %s (%s) ENTER states[%d:%d] flags[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2061 | __func__, adapter->netdev->name, |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2062 | adapter->state, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2063 | adapter->linkstate, dev->flags); |
| 2064 | |
| 2065 | /* adapter should be down at this point */ |
| 2066 | if (adapter->state != ADAPT_DOWN) { |
| 2067 | DBG_ERROR("sxg_if_init adapter->state != ADAPT_DOWN\n"); |
| 2068 | return (-EIO); |
| 2069 | } |
| 2070 | ASSERT(adapter->linkstate == LINK_DOWN); |
| 2071 | |
| 2072 | adapter->devflags_prev = dev->flags; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2073 | adapter->MacFilter = MAC_DIRECTED; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2074 | if (dev->flags) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2075 | DBG_ERROR("sxg: %s (%s) Set MAC options: ", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2076 | adapter->netdev->name); |
| 2077 | if (dev->flags & IFF_BROADCAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2078 | adapter->MacFilter |= MAC_BCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2079 | DBG_ERROR("BCAST "); |
| 2080 | } |
| 2081 | if (dev->flags & IFF_PROMISC) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2082 | adapter->MacFilter |= MAC_PROMISC; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2083 | DBG_ERROR("PROMISC "); |
| 2084 | } |
| 2085 | if (dev->flags & IFF_ALLMULTI) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2086 | adapter->MacFilter |= MAC_ALLMCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2087 | DBG_ERROR("ALL_MCAST "); |
| 2088 | } |
| 2089 | if (dev->flags & IFF_MULTICAST) { |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 2090 | adapter->MacFilter |= MAC_MCAST; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2091 | DBG_ERROR("MCAST "); |
| 2092 | } |
| 2093 | DBG_ERROR("\n"); |
| 2094 | } |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2095 | status = sxg_register_intr(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2096 | if (status != STATUS_SUCCESS) { |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2097 | DBG_ERROR("sxg_if_init: sxg_register_intr FAILED %x\n", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2098 | status); |
| 2099 | sxg_deregister_interrupt(adapter); |
| 2100 | return (status); |
| 2101 | } |
| 2102 | |
| 2103 | adapter->state = ADAPT_UP; |
| 2104 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2105 | /* clear any pending events, then enable interrupts */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2106 | DBG_ERROR("sxg: %s ENABLE interrupts(slic)\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2107 | |
| 2108 | return (STATUS_SUCCESS); |
| 2109 | } |
| 2110 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2111 | void sxg_set_interrupt_aggregation(struct adapter_t *adapter) |
| 2112 | { |
| 2113 | /* |
| 2114 | * Top bit disables aggregation on xmt (SXG_AGG_XMT_DISABLE). |
| 2115 | * Make sure Max is less than 0x8000. |
| 2116 | */ |
| 2117 | adapter->max_aggregation = SXG_MAX_AGG_DEFAULT; |
| 2118 | adapter->min_aggregation = SXG_MIN_AGG_DEFAULT; |
| 2119 | WRITE_REG(adapter->UcodeRegs[0].Aggregation, |
| 2120 | ((adapter->max_aggregation << SXG_MAX_AGG_SHIFT) | |
| 2121 | adapter->min_aggregation), |
| 2122 | TRUE); |
| 2123 | } |
| 2124 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2125 | static int sxg_entry_open(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2126 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2127 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2128 | int status; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2129 | static int turn; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2130 | int sxg_initial_rcv_data_buffers = SXG_INITIAL_RCV_DATA_BUFFERS; |
| 2131 | int i; |
| 2132 | |
| 2133 | if (adapter->JumboEnabled == TRUE) { |
| 2134 | sxg_initial_rcv_data_buffers = |
| 2135 | SXG_INITIAL_JUMBO_RCV_DATA_BUFFERS; |
| 2136 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, |
| 2137 | SXG_JUMBO_RCV_RING_SIZE); |
| 2138 | } |
| 2139 | |
| 2140 | /* |
| 2141 | * Allocate receive data buffers. We allocate a block of buffers and |
| 2142 | * a corresponding descriptor block at once. See sxghw.h:SXG_RCV_BLOCK |
| 2143 | */ |
| 2144 | |
| 2145 | for (i = 0; i < sxg_initial_rcv_data_buffers; |
| 2146 | i += SXG_RCV_DESCRIPTORS_PER_BLOCK) |
| 2147 | { |
| 2148 | status = sxg_allocate_buffer_memory(adapter, |
| 2149 | SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE), |
| 2150 | SXG_BUFFER_TYPE_RCV); |
| 2151 | if (status != STATUS_SUCCESS) |
| 2152 | return status; |
| 2153 | } |
| 2154 | /* |
| 2155 | * NBL resource allocation can fail in the 'AllocateComplete' routine, |
| 2156 | * which doesn't return status. Make sure we got the number of buffers |
| 2157 | * we requested |
| 2158 | */ |
| 2159 | |
| 2160 | if (adapter->FreeRcvBufferCount < sxg_initial_rcv_data_buffers) { |
| 2161 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF6", |
| 2162 | adapter, adapter->FreeRcvBufferCount, SXG_MAX_ENTRIES, |
| 2163 | 0); |
| 2164 | return (STATUS_RESOURCES); |
| 2165 | } |
| 2166 | /* |
| 2167 | * The microcode expects it to be downloaded on every open. |
| 2168 | */ |
| 2169 | DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __FUNCTION__); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2170 | if (sxg_download_microcode(adapter, SXG_UCODE_SYSTEM)) { |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2171 | DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n", |
| 2172 | __FUNCTION__); |
| 2173 | sxg_read_config(adapter); |
| 2174 | } else { |
| 2175 | adapter->state = ADAPT_FAIL; |
| 2176 | adapter->linkstate = LINK_DOWN; |
| 2177 | DBG_ERROR("sxg_download_microcode FAILED status[%x]\n", |
| 2178 | status); |
| 2179 | } |
| 2180 | msleep(5); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2181 | |
| 2182 | if (turn) { |
| 2183 | sxg_second_open(adapter->netdev); |
| 2184 | |
| 2185 | return STATUS_SUCCESS; |
| 2186 | } |
| 2187 | |
| 2188 | turn++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2189 | |
| 2190 | ASSERT(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2191 | DBG_ERROR("sxg: %s adapter->activated[%d]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2192 | adapter->activated); |
| 2193 | DBG_ERROR |
| 2194 | ("sxg: %s (%s): [jiffies[%lx] cpu %d] dev[%p] adapt[%p] port[%d]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2195 | __func__, adapter->netdev->name, jiffies, smp_processor_id(), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2196 | adapter->netdev, adapter, adapter->port); |
| 2197 | |
| 2198 | netif_stop_queue(adapter->netdev); |
| 2199 | |
| 2200 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2201 | if (!adapter->activated) { |
| 2202 | sxg_global.num_sxg_ports_active++; |
| 2203 | adapter->activated = 1; |
| 2204 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2205 | /* Initialize the adapter */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2206 | DBG_ERROR("sxg: %s ENTER sxg_initialize_adapter\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2207 | status = sxg_initialize_adapter(adapter); |
| 2208 | DBG_ERROR("sxg: %s EXIT sxg_initialize_adapter status[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2209 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2210 | |
| 2211 | if (status == STATUS_SUCCESS) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2212 | DBG_ERROR("sxg: %s ENTER sxg_if_init\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2213 | status = sxg_if_init(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2214 | DBG_ERROR("sxg: %s EXIT sxg_if_init status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2215 | status); |
| 2216 | } |
| 2217 | |
| 2218 | if (status != STATUS_SUCCESS) { |
| 2219 | if (adapter->activated) { |
| 2220 | sxg_global.num_sxg_ports_active--; |
| 2221 | adapter->activated = 0; |
| 2222 | } |
| 2223 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 2224 | sxg_global.flags); |
| 2225 | return (status); |
| 2226 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2227 | DBG_ERROR("sxg: %s ENABLE ALL INTERRUPTS\n", __func__); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2228 | sxg_set_interrupt_aggregation(adapter); |
| 2229 | napi_enable(&adapter->napi); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2230 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2231 | /* Enable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2232 | SXG_ENABLE_ALL_INTERRUPTS(adapter); |
| 2233 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2234 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2235 | |
| 2236 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
| 2237 | return STATUS_SUCCESS; |
| 2238 | } |
| 2239 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2240 | int sxg_second_open(struct net_device * dev) |
| 2241 | { |
| 2242 | struct adapter_t *adapter = (struct adapter_t*) netdev_priv(dev); |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2243 | int status = 0; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2244 | |
| 2245 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 2246 | netif_start_queue(adapter->netdev); |
| 2247 | adapter->state = ADAPT_UP; |
| 2248 | adapter->linkstate = LINK_UP; |
| 2249 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2250 | status = sxg_initialize_adapter(adapter); |
| 2251 | sxg_set_interrupt_aggregation(adapter); |
| 2252 | napi_enable(&adapter->napi); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2253 | /* Re-enable interrupts */ |
| 2254 | SXG_ENABLE_ALL_INTERRUPTS(adapter); |
| 2255 | |
| 2256 | netif_carrier_on(dev); |
Mithlesh Thukral | 544ed36 | 2009-03-20 17:35:12 +0530 | [diff] [blame^] | 2257 | sxg_register_intr(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2258 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2259 | return (STATUS_SUCCESS); |
| 2260 | |
| 2261 | } |
| 2262 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2263 | static void __devexit sxg_entry_remove(struct pci_dev *pcidev) |
| 2264 | { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2265 | u32 mmio_start = 0; |
| 2266 | u32 mmio_len = 0; |
| 2267 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2268 | struct net_device *dev = pci_get_drvdata(pcidev); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2269 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2270 | |
| 2271 | flush_scheduled_work(); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2272 | |
| 2273 | /* Deallocate Resources */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2274 | unregister_netdev(dev); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2275 | sxg_reset_interrupt_capability(adapter); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2276 | sxg_free_resources(adapter); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2277 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2278 | ASSERT(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2279 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2280 | mmio_start = pci_resource_start(pcidev, 0); |
| 2281 | mmio_len = pci_resource_len(pcidev, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2282 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2283 | DBG_ERROR("sxg: %s rel_region(0) start[%x] len[%x]\n", __FUNCTION__, |
| 2284 | mmio_start, mmio_len); |
| 2285 | release_mem_region(mmio_start, mmio_len); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2286 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2287 | mmio_start = pci_resource_start(pcidev, 2); |
| 2288 | mmio_len = pci_resource_len(pcidev, 2); |
| 2289 | |
| 2290 | DBG_ERROR("sxg: %s rel_region(2) start[%x] len[%x]\n", __FUNCTION__, |
| 2291 | mmio_start, mmio_len); |
| 2292 | release_mem_region(mmio_start, mmio_len); |
| 2293 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2294 | pci_disable_device(pcidev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2295 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2296 | DBG_ERROR("sxg: %s deallocate device\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2297 | kfree(dev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2298 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2299 | } |
| 2300 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2301 | static int sxg_entry_halt(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2302 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2303 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2304 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
| 2305 | int i; |
| 2306 | u32 RssIds, IsrCount; |
| 2307 | unsigned long flags; |
| 2308 | |
| 2309 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2310 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2311 | |
Mithlesh Thukral | b62a294 | 2009-01-30 20:19:03 +0530 | [diff] [blame] | 2312 | napi_disable(&adapter->napi); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2313 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2314 | DBG_ERROR("sxg: %s (%s) ENTER\n", __func__, dev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2315 | |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2316 | WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 0, true); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2317 | netif_stop_queue(adapter->netdev); |
| 2318 | adapter->state = ADAPT_DOWN; |
| 2319 | adapter->linkstate = LINK_DOWN; |
| 2320 | adapter->devflags_prev = 0; |
| 2321 | DBG_ERROR("sxg: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2322 | __func__, dev->name, adapter, adapter->state); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2323 | |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2324 | /* Disable interrupts */ |
| 2325 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2326 | |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2327 | netif_carrier_off(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2328 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2329 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2330 | sxg_deregister_interrupt(adapter); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2331 | WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH); |
| 2332 | mdelay(5000); |
| 2333 | spin_lock(&adapter->RcvQLock); |
| 2334 | /* Free all the blocks and the buffers, moved from remove() routine */ |
| 2335 | if (!(IsListEmpty(&adapter->AllRcvBlocks))) { |
| 2336 | sxg_free_rcvblocks(adapter); |
| 2337 | } |
| 2338 | |
| 2339 | |
| 2340 | InitializeListHead(&adapter->FreeRcvBuffers); |
| 2341 | InitializeListHead(&adapter->FreeRcvBlocks); |
| 2342 | InitializeListHead(&adapter->AllRcvBlocks); |
| 2343 | InitializeListHead(&adapter->FreeSglBuffers); |
| 2344 | InitializeListHead(&adapter->AllSglBuffers); |
| 2345 | |
| 2346 | adapter->FreeRcvBufferCount = 0; |
| 2347 | adapter->FreeRcvBlockCount = 0; |
| 2348 | adapter->AllRcvBlockCount = 0; |
| 2349 | adapter->RcvBuffersOnCard = 0; |
| 2350 | adapter->PendingRcvCount = 0; |
| 2351 | |
| 2352 | memset(adapter->RcvRings, 0, sizeof(struct sxg_rcv_ring) * 1); |
| 2353 | memset(adapter->EventRings, 0, sizeof(struct sxg_event_ring) * RssIds); |
| 2354 | memset(adapter->Isr, 0, sizeof(u32) * IsrCount); |
| 2355 | for (i = 0; i < SXG_MAX_RING_SIZE; i++) |
| 2356 | adapter->RcvRingZeroInfo.Context[i] = NULL; |
| 2357 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE); |
| 2358 | SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE); |
| 2359 | |
| 2360 | spin_unlock(&adapter->RcvQLock); |
| 2361 | |
| 2362 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
| 2363 | adapter->AllSglBufferCount = 0; |
| 2364 | adapter->FreeSglBufferCount = 0; |
| 2365 | adapter->PendingXmtCount = 0; |
| 2366 | memset(adapter->XmtRings, 0, sizeof(struct sxg_xmt_ring) * 1); |
| 2367 | memset(adapter->XmtRingZeroIndex, 0, sizeof(u32)); |
| 2368 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
| 2369 | |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2370 | for (i = 0; i < SXG_MAX_RSS; i++) { |
| 2371 | adapter->NextEvent[i] = 0; |
| 2372 | } |
| 2373 | atomic_set(&adapter->pending_allocations, 0); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 2374 | adapter->intrregistered = 0; |
| 2375 | sxg_remove_isr(adapter); |
| 2376 | DBG_ERROR("sxg: %s (%s) EXIT\n", __FUNCTION__, dev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2377 | return (STATUS_SUCCESS); |
| 2378 | } |
| 2379 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2380 | static int sxg_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2381 | { |
| 2382 | ASSERT(rq); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2383 | /* DBG_ERROR("sxg: %s cmd[%x] rq[%p] dev[%p]\n", __func__, cmd, rq, dev);*/ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2384 | switch (cmd) { |
| 2385 | case SIOCSLICSETINTAGG: |
| 2386 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2387 | /* struct adapter_t *adapter = (struct adapter_t *) |
| 2388 | * netdev_priv(dev); |
| 2389 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2390 | u32 data[7]; |
| 2391 | u32 intagg; |
| 2392 | |
| 2393 | if (copy_from_user(data, rq->ifr_data, 28)) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2394 | DBG_ERROR("copy_from_user FAILED getting \ |
| 2395 | initial params\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2396 | return -EFAULT; |
| 2397 | } |
| 2398 | intagg = data[0]; |
| 2399 | printk(KERN_EMERG |
| 2400 | "%s: set interrupt aggregation to %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2401 | __func__, intagg); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2402 | return 0; |
| 2403 | } |
| 2404 | |
| 2405 | default: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2406 | /* DBG_ERROR("sxg: %s UNSUPPORTED[%x]\n", __func__, cmd); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2407 | return -EOPNOTSUPP; |
| 2408 | } |
| 2409 | return 0; |
| 2410 | } |
| 2411 | |
| 2412 | #define NORMAL_ETHFRAME 0 |
| 2413 | |
| 2414 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2415 | * sxg_send_packets - Send a skb packet |
| 2416 | * |
| 2417 | * Arguments: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2418 | * skb - The packet to send |
| 2419 | * dev - Our linux net device that refs our adapter |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2420 | * |
| 2421 | * Return: |
| 2422 | * 0 regardless of outcome XXXTODO refer to e1000 driver |
| 2423 | */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2424 | static int sxg_send_packets(struct sk_buff *skb, struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2425 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2426 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2427 | u32 status = STATUS_SUCCESS; |
| 2428 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2429 | /* |
| 2430 | * DBG_ERROR("sxg: %s ENTER sxg_send_packets skb[%p]\n", __FUNCTION__, |
| 2431 | * skb); |
| 2432 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2433 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2434 | /* Check the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2435 | switch (adapter->State) { |
| 2436 | case SXG_STATE_INITIALIZING: |
| 2437 | case SXG_STATE_HALTED: |
| 2438 | case SXG_STATE_SHUTDOWN: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2439 | ASSERT(0); /* unexpected */ |
| 2440 | /* fall through */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2441 | case SXG_STATE_RESETTING: |
| 2442 | case SXG_STATE_SLEEP: |
| 2443 | case SXG_STATE_BOOTDIAG: |
| 2444 | case SXG_STATE_DIAG: |
| 2445 | case SXG_STATE_HALTING: |
| 2446 | status = STATUS_FAILURE; |
| 2447 | break; |
| 2448 | case SXG_STATE_RUNNING: |
| 2449 | if (adapter->LinkState != SXG_LINK_UP) { |
| 2450 | status = STATUS_FAILURE; |
| 2451 | } |
| 2452 | break; |
| 2453 | default: |
| 2454 | ASSERT(0); |
| 2455 | status = STATUS_FAILURE; |
| 2456 | } |
| 2457 | if (status != STATUS_SUCCESS) { |
| 2458 | goto xmit_fail; |
| 2459 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2460 | /* send a packet */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2461 | status = sxg_transmit_packet(adapter, skb); |
| 2462 | if (status == STATUS_SUCCESS) { |
| 2463 | goto xmit_done; |
| 2464 | } |
| 2465 | |
| 2466 | xmit_fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2467 | /* reject & complete all the packets if they cant be sent */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2468 | if (status != STATUS_SUCCESS) { |
| 2469 | #if XXXTODO |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2470 | /* sxg_send_packets_fail(adapter, skb, status); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2471 | #else |
| 2472 | SXG_DROP_DUMB_SEND(adapter, skb); |
| 2473 | adapter->stats.tx_dropped++; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2474 | return NETDEV_TX_BUSY; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2475 | #endif |
| 2476 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2477 | DBG_ERROR("sxg: %s EXIT sxg_send_packets status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2478 | status); |
| 2479 | |
| 2480 | xmit_done: |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2481 | return NETDEV_TX_OK; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2482 | } |
| 2483 | |
| 2484 | /* |
| 2485 | * sxg_transmit_packet |
| 2486 | * |
| 2487 | * This function transmits a single packet. |
| 2488 | * |
| 2489 | * Arguments - |
| 2490 | * adapter - Pointer to our adapter structure |
| 2491 | * skb - The packet to be sent |
| 2492 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2493 | * Return - STATUS of send |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2494 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2495 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2496 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2497 | struct sxg_x64_sgl *pSgl; |
| 2498 | struct sxg_scatter_gather *SxgSgl; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2499 | unsigned long sgl_flags; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2500 | /* void *SglBuffer; */ |
| 2501 | /* u32 SglBufferLength; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2502 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2503 | /* |
| 2504 | * The vast majority of work is done in the shared |
| 2505 | * sxg_dumb_sgl routine. |
| 2506 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2507 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSend", |
| 2508 | adapter, skb, 0, 0); |
| 2509 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2510 | /* Allocate a SGL buffer */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2511 | SXG_GET_SGL_BUFFER(adapter, SxgSgl, 0); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2512 | if (!SxgSgl) { |
| 2513 | adapter->Stats.NoSglBuf++; |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 2514 | adapter->stats.tx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2515 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "SndPktF1", |
| 2516 | adapter, skb, 0, 0); |
| 2517 | return (STATUS_RESOURCES); |
| 2518 | } |
| 2519 | ASSERT(SxgSgl->adapter == adapter); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2520 | /*SglBuffer = SXG_SGL_BUFFER(SxgSgl); |
| 2521 | SglBufferLength = SXG_SGL_BUF_SIZE; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2522 | SxgSgl->VlanTag.VlanTci = 0; |
| 2523 | SxgSgl->VlanTag.VlanTpid = 0; |
| 2524 | SxgSgl->Type = SXG_SGL_DUMB; |
| 2525 | SxgSgl->DumbPacket = skb; |
| 2526 | pSgl = NULL; |
| 2527 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2528 | /* Call the common sxg_dumb_sgl routine to complete the send. */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2529 | return (sxg_dumb_sgl(pSgl, SxgSgl)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2530 | } |
| 2531 | |
| 2532 | /* |
| 2533 | * sxg_dumb_sgl |
| 2534 | * |
| 2535 | * Arguments: |
| 2536 | * pSgl - |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2537 | * SxgSgl - struct sxg_scatter_gather |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2538 | * |
| 2539 | * Return Value: |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2540 | * Status of send operation. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2541 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2542 | static int sxg_dumb_sgl(struct sxg_x64_sgl *pSgl, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2543 | struct sxg_scatter_gather *SxgSgl) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2544 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2545 | struct adapter_t *adapter = SxgSgl->adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2546 | struct sk_buff *skb = SxgSgl->DumbPacket; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2547 | /* For now, all dumb-nic sends go on RSS queue zero */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2548 | struct sxg_xmt_ring *XmtRing = &adapter->XmtRings[0]; |
| 2549 | struct sxg_ring_info *XmtRingInfo = &adapter->XmtRingZeroInfo; |
| 2550 | struct sxg_cmd *XmtCmd = NULL; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2551 | /* u32 Index = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2552 | u32 DataLength = skb->len; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2553 | /* unsigned int BufLen; */ |
| 2554 | /* u32 SglOffset; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2555 | u64 phys_addr; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2556 | unsigned long flags; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2557 | unsigned long queue_id=0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2558 | |
| 2559 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSgl", |
| 2560 | pSgl, SxgSgl, 0, 0); |
| 2561 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2562 | /* Set aside a pointer to the sgl */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2563 | SxgSgl->pSgl = pSgl; |
| 2564 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2565 | /* Sanity check that our SGL format is as we expect. */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2566 | ASSERT(sizeof(struct sxg_x64_sge) == sizeof(struct sxg_x64_sge)); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2567 | /* Shouldn't be a vlan tag on this frame */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2568 | ASSERT(SxgSgl->VlanTag.VlanTci == 0); |
| 2569 | ASSERT(SxgSgl->VlanTag.VlanTpid == 0); |
| 2570 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2571 | /* |
| 2572 | * From here below we work with the SGL placed in our |
| 2573 | * buffer. |
| 2574 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2575 | |
| 2576 | SxgSgl->Sgl.NumberOfElements = 1; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2577 | /* |
| 2578 | * Set ucode Queue ID based on bottom bits of destination TCP port. |
| 2579 | * This Queue ID splits slowpath/dumb-nic packet processing across |
| 2580 | * multiple threads on the card to improve performance. It is split |
| 2581 | * using the TCP port to avoid out-of-order packets that can result |
| 2582 | * from multithreaded processing. We use the destination port because |
| 2583 | * we expect to be run on a server, so in nearly all cases the local |
| 2584 | * port is likely to be constant (well-known server port) and the |
| 2585 | * remote port is likely to be random. The exception to this is iSCSI, |
| 2586 | * in which case we use the sport instead. Note |
| 2587 | * that original attempt at XOR'ing source and dest port resulted in |
| 2588 | * poor balance on NTTTCP/iometer applications since they tend to |
| 2589 | * line up (even-even, odd-odd..). |
| 2590 | */ |
| 2591 | |
| 2592 | if (skb->protocol == htons(ETH_P_IP)) { |
| 2593 | struct iphdr *ip; |
| 2594 | |
| 2595 | ip = ip_hdr(skb); |
| 2596 | if ((ip->protocol == IPPROTO_TCP)&&(DataLength >= sizeof( |
| 2597 | struct tcphdr))){ |
| 2598 | queue_id = ((ntohs(tcp_hdr(skb)->dest) == ISCSI_PORT) ? |
| 2599 | (ntohs (tcp_hdr(skb)->source) & |
| 2600 | SXG_LARGE_SEND_QUEUE_MASK): |
| 2601 | (ntohs(tcp_hdr(skb)->dest) & |
| 2602 | SXG_LARGE_SEND_QUEUE_MASK)); |
| 2603 | } |
| 2604 | } else if (skb->protocol == htons(ETH_P_IPV6)) { |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 2605 | if ((ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) && (DataLength >= |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2606 | sizeof(struct tcphdr)) ) { |
| 2607 | queue_id = ((ntohs(tcp_hdr(skb)->dest) == ISCSI_PORT) ? |
| 2608 | (ntohs (tcp_hdr(skb)->source) & |
| 2609 | SXG_LARGE_SEND_QUEUE_MASK): |
| 2610 | (ntohs(tcp_hdr(skb)->dest) & |
| 2611 | SXG_LARGE_SEND_QUEUE_MASK)); |
| 2612 | } |
| 2613 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2614 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2615 | /* Grab the spinlock and acquire a command */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2616 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2617 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2618 | if (XmtCmd == NULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2619 | /* |
| 2620 | * Call sxg_complete_slow_send to see if we can |
| 2621 | * free up any XmtRingZero entries and then try again |
| 2622 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2623 | |
| 2624 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 2625 | sxg_complete_slow_send(adapter); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2626 | spin_lock_irqsave(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2627 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2628 | if (XmtCmd == NULL) { |
| 2629 | adapter->Stats.XmtZeroFull++; |
| 2630 | goto abortcmd; |
| 2631 | } |
| 2632 | } |
| 2633 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbCmd", |
| 2634 | XmtCmd, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2635 | /* Update stats */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2636 | adapter->stats.tx_packets++; |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2637 | adapter->stats.tx_bytes += DataLength; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2638 | #if XXXTODO /* Stats stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2639 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 2640 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
| 2641 | adapter->Stats.DumbXmtBcastPkts++; |
| 2642 | adapter->Stats.DumbXmtBcastBytes += DataLength; |
| 2643 | } else { |
| 2644 | adapter->Stats.DumbXmtMcastPkts++; |
| 2645 | adapter->Stats.DumbXmtMcastBytes += DataLength; |
| 2646 | } |
| 2647 | } else { |
| 2648 | adapter->Stats.DumbXmtUcastPkts++; |
| 2649 | adapter->Stats.DumbXmtUcastBytes += DataLength; |
| 2650 | } |
| 2651 | #endif |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2652 | /* |
| 2653 | * Fill in the command |
| 2654 | * Copy out the first SGE to the command and adjust for offset |
| 2655 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2656 | phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2657 | PCI_DMA_TODEVICE); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2658 | |
| 2659 | /* |
| 2660 | * SAHARA SGL WORKAROUND |
| 2661 | * See if the SGL straddles a 64k boundary. If so, skip to |
| 2662 | * the start of the next 64k boundary and continue |
| 2663 | */ |
| 2664 | |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2665 | if ((adapter->asictype == SAHARA_REV_A) && |
| 2666 | (SXG_INVALID_SGL(phys_addr,skb->data_len))) |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 2667 | { |
| 2668 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
| 2669 | /* Silently drop this packet */ |
| 2670 | printk(KERN_EMERG"Dropped a packet for 64k boundary problem\n"); |
| 2671 | return STATUS_SUCCESS; |
| 2672 | } |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2673 | memset(XmtCmd, '\0', sizeof(*XmtCmd)); |
| 2674 | XmtCmd->Buffer.FirstSgeAddress = phys_addr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2675 | XmtCmd->Buffer.FirstSgeLength = DataLength; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2676 | XmtCmd->Buffer.SgeOffset = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2677 | XmtCmd->Buffer.TotalLength = DataLength; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2678 | XmtCmd->SgEntries = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2679 | XmtCmd->Flags = 0; |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 2680 | |
| 2681 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
| 2682 | /* |
| 2683 | * We need to set the Checkum in IP header to 0. This is |
| 2684 | * required by hardware. |
| 2685 | */ |
| 2686 | ip_hdr(skb)->check = 0x0; |
| 2687 | XmtCmd->CsumFlags.Flags |= SXG_SLOWCMD_CSUM_IP; |
| 2688 | XmtCmd->CsumFlags.Flags |= SXG_SLOWCMD_CSUM_TCP; |
| 2689 | /* Dont know if length will require a change in case of VLAN */ |
| 2690 | XmtCmd->CsumFlags.MacLen = ETH_HLEN; |
| 2691 | XmtCmd->CsumFlags.IpHl = skb_network_header_len(skb) >> |
| 2692 | SXG_NW_HDR_LEN_SHIFT; |
| 2693 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2694 | /* |
| 2695 | * Advance transmit cmd descripter by 1. |
| 2696 | * NOTE - See comments in SxgTcpOutput where we write |
| 2697 | * to the XmtCmd register regarding CPU ID values and/or |
| 2698 | * multiple commands. |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2699 | * Top 16 bits specify queue_id. See comments about queue_id above |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2700 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 2701 | /* Four queues at the moment */ |
| 2702 | ASSERT((queue_id & ~SXG_LARGE_SEND_QUEUE_MASK) == 0); |
| 2703 | WRITE_REG(adapter->UcodeRegs[0].XmtCmd, ((queue_id << 16) | 1), TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2704 | adapter->Stats.XmtQLen++; /* Stats within lock */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2705 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2706 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDumSgl2", |
| 2707 | XmtCmd, pSgl, SxgSgl, 0); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2708 | return STATUS_SUCCESS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2709 | |
| 2710 | abortcmd: |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2711 | /* |
| 2712 | * NOTE - Only jump to this label AFTER grabbing the |
| 2713 | * XmtZeroLock, and DO NOT DROP IT between the |
| 2714 | * command allocation and the following abort. |
| 2715 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2716 | if (XmtCmd) { |
| 2717 | SXG_ABORT_CMD(XmtRingInfo); |
| 2718 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2719 | spin_unlock_irqrestore(&adapter->XmtZeroLock, flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2720 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2721 | /* |
| 2722 | * failsgl: |
| 2723 | * Jump to this label if failure occurs before the |
| 2724 | * XmtZeroLock is grabbed |
| 2725 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 2726 | adapter->stats.tx_errors++; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2727 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumSGFal", |
| 2728 | pSgl, SxgSgl, XmtRingInfo->Head, XmtRingInfo->Tail); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2729 | /* SxgSgl->DumbPacket is the skb */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 2730 | // SXG_COMPLETE_DUMB_SEND(adapter, SxgSgl->DumbPacket); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 2731 | |
| 2732 | return STATUS_FAILURE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2733 | } |
| 2734 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2735 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2736 | * Link management functions |
| 2737 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2738 | * sxg_initialize_link - Initialize the link stuff |
| 2739 | * |
| 2740 | * Arguments - |
| 2741 | * adapter - A pointer to our adapter structure |
| 2742 | * |
| 2743 | * Return |
| 2744 | * status |
| 2745 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2746 | static int sxg_initialize_link(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2747 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2748 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2749 | u32 Value; |
| 2750 | u32 ConfigData; |
| 2751 | u32 MaxFrame; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2752 | u32 AxgMacReg1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2753 | int status; |
| 2754 | |
| 2755 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitLink", |
| 2756 | adapter, 0, 0, 0); |
| 2757 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2758 | /* Reset PHY and XGXS module */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2759 | WRITE_REG(HwRegs->LinkStatus, LS_SERDES_POWER_DOWN, TRUE); |
| 2760 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2761 | /* Reset transmit configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2762 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_RESET, TRUE); |
| 2763 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2764 | /* Reset receive configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2765 | WRITE_REG(HwRegs->RcvConfig, RCV_CONFIG_RESET, TRUE); |
| 2766 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2767 | /* Reset all MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2768 | WRITE_REG(HwRegs->MacConfig0, AXGMAC_CFG0_SUB_RESET, TRUE); |
| 2769 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2770 | /* |
| 2771 | * Link address 0 |
| 2772 | * XXXTODO - This assumes the MAC address (0a:0b:0c:0d:0e:0f) |
| 2773 | * is stored with the first nibble (0a) in the byte 0 |
| 2774 | * of the Mac address. Possibly reverse? |
| 2775 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2776 | Value = *(u32 *) adapter->macaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2777 | WRITE_REG(HwRegs->LinkAddress0Low, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2778 | /* also write the MAC address to the MAC. Endian is reversed. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2779 | WRITE_REG(HwRegs->MacAddressLow, ntohl(Value), TRUE); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2780 | Value = (*(u16 *) & adapter->macaddr[4] & 0x0000FFFF); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2781 | WRITE_REG(HwRegs->LinkAddress0High, Value | LINK_ADDRESS_ENABLE, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2782 | /* endian swap for the MAC (put high bytes in bits [31:16], swapped) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2783 | Value = ntohl(Value); |
| 2784 | WRITE_REG(HwRegs->MacAddressHigh, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2785 | /* Link address 1 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2786 | WRITE_REG(HwRegs->LinkAddress1Low, 0, TRUE); |
| 2787 | WRITE_REG(HwRegs->LinkAddress1High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2788 | /* Link address 2 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2789 | WRITE_REG(HwRegs->LinkAddress2Low, 0, TRUE); |
| 2790 | WRITE_REG(HwRegs->LinkAddress2High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2791 | /* Link address 3 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2792 | WRITE_REG(HwRegs->LinkAddress3Low, 0, TRUE); |
| 2793 | WRITE_REG(HwRegs->LinkAddress3High, 0, TRUE); |
| 2794 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2795 | /* Enable MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2796 | WRITE_REG(HwRegs->MacConfig0, 0, TRUE); |
| 2797 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2798 | /* Configure MAC */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2799 | AxgMacReg1 = ( /* Enable XMT */ |
| 2800 | AXGMAC_CFG1_XMT_EN | |
| 2801 | /* Enable receive */ |
| 2802 | AXGMAC_CFG1_RCV_EN | |
| 2803 | /* short frame detection */ |
| 2804 | AXGMAC_CFG1_SHORT_ASSERT | |
| 2805 | /* Verify frame length */ |
| 2806 | AXGMAC_CFG1_CHECK_LEN | |
| 2807 | /* Generate FCS */ |
| 2808 | AXGMAC_CFG1_GEN_FCS | |
| 2809 | /* Pad frames to 64 bytes */ |
| 2810 | AXGMAC_CFG1_PAD_64); |
| 2811 | |
| 2812 | if (adapter->XmtFcEnabled) { |
| 2813 | AxgMacReg1 |= AXGMAC_CFG1_XMT_PAUSE; /* Allow sending of pause */ |
| 2814 | } |
| 2815 | if (adapter->RcvFcEnabled) { |
| 2816 | AxgMacReg1 |= AXGMAC_CFG1_RCV_PAUSE; /* Enable detection of pause */ |
| 2817 | } |
| 2818 | |
| 2819 | WRITE_REG(HwRegs->MacConfig1, AxgMacReg1, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2820 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2821 | /* Set AXGMAC max frame length if jumbo. Not needed for standard MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2822 | if (adapter->JumboEnabled) { |
| 2823 | WRITE_REG(HwRegs->MacMaxFrameLen, AXGMAC_MAXFRAME_JUMBO, TRUE); |
| 2824 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2825 | /* |
| 2826 | * AMIIM Configuration Register - |
| 2827 | * The value placed in the AXGMAC_AMIIM_CFG_HALF_CLOCK portion |
| 2828 | * (bottom bits) of this register is used to determine the MDC frequency |
| 2829 | * as specified in the A-XGMAC Design Document. This value must not be |
| 2830 | * zero. The following value (62 or 0x3E) is based on our MAC transmit |
| 2831 | * clock frequency (MTCLK) of 312.5 MHz. Given a maximum MDIO clock |
| 2832 | * frequency of 2.5 MHz (see the PHY spec), we get: |
| 2833 | * 312.5/(2*(X+1)) < 2.5 ==> X = 62. |
| 2834 | * This value happens to be the default value for this register, so we |
| 2835 | * really don't have to do this. |
| 2836 | */ |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2837 | if (adapter->asictype == SAHARA_REV_B) { |
| 2838 | WRITE_REG(HwRegs->MacAmiimConfig, 0x0000001F, TRUE); |
| 2839 | } else { |
| 2840 | WRITE_REG(HwRegs->MacAmiimConfig, 0x0000003E, TRUE); |
| 2841 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2842 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2843 | /* Power up and enable PHY and XAUI/XGXS/Serdes logic */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2844 | WRITE_REG(HwRegs->LinkStatus, |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2845 | (LS_PHY_CLR_RESET | |
| 2846 | LS_XGXS_ENABLE | |
| 2847 | LS_XGXS_CTL | |
| 2848 | LS_PHY_CLK_EN | |
| 2849 | LS_ATTN_ALARM), |
| 2850 | TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2851 | DBG_ERROR("After Power Up and enable PHY in sxg_initialize_link\n"); |
| 2852 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2853 | /* |
| 2854 | * Per information given by Aeluros, wait 100 ms after removing reset. |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2855 | * It's not enough to wait for the self-clearing reset bit in reg 0 to |
| 2856 | * clear. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2857 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2858 | mdelay(100); |
| 2859 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2860 | /* Verify the PHY has come up by checking that the Reset bit has |
| 2861 | * cleared. |
| 2862 | */ |
| 2863 | status = sxg_read_mdio_reg(adapter, |
| 2864 | MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2865 | PHY_PMA_CONTROL1, /* PMA/PMD control register */ |
| 2866 | &Value); |
| 2867 | DBG_ERROR("After sxg_read_mdio_reg Value[%x] fail=%x\n", Value, |
| 2868 | (Value & PMA_CONTROL1_RESET)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2869 | if (status != STATUS_SUCCESS) |
| 2870 | return (STATUS_FAILURE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2871 | if (Value & PMA_CONTROL1_RESET) /* reset complete if bit is 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2872 | return (STATUS_FAILURE); |
| 2873 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2874 | /* The SERDES should be initialized by now - confirm */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2875 | READ_REG(HwRegs->LinkStatus, Value); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2876 | if (Value & LS_SERDES_DOWN) /* verify SERDES is initialized */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2877 | return (STATUS_FAILURE); |
| 2878 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2879 | /* The XAUI link should also be up - confirm */ |
| 2880 | if (!(Value & LS_XAUI_LINK_UP)) /* verify XAUI link is up */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2881 | return (STATUS_FAILURE); |
| 2882 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2883 | /* Initialize the PHY */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2884 | status = sxg_phy_init(adapter); |
| 2885 | if (status != STATUS_SUCCESS) |
| 2886 | return (STATUS_FAILURE); |
| 2887 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2888 | /* Enable the Link Alarm */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2889 | |
| 2890 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2891 | * LASI_CONTROL - LASI control register |
| 2892 | * LASI_CTL_LS_ALARM_ENABLE - enable link alarm bit |
| 2893 | */ |
| 2894 | status = sxg_write_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2895 | LASI_CONTROL, |
| 2896 | LASI_CTL_LS_ALARM_ENABLE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2897 | if (status != STATUS_SUCCESS) |
| 2898 | return (STATUS_FAILURE); |
| 2899 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2900 | /* XXXTODO - temporary - verify bit is set */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2901 | |
| 2902 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2903 | * LASI_CONTROL - LASI control register |
| 2904 | */ |
| 2905 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2906 | LASI_CONTROL, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2907 | &Value); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2908 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2909 | if (status != STATUS_SUCCESS) |
| 2910 | return (STATUS_FAILURE); |
| 2911 | if (!(Value & LASI_CTL_LS_ALARM_ENABLE)) { |
| 2912 | DBG_ERROR("Error! LASI Control Alarm Enable bit not set!\n"); |
| 2913 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2914 | /* Enable receive */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2915 | MaxFrame = adapter->JumboEnabled ? JUMBOMAXFRAME : ETHERMAXFRAME; |
| 2916 | ConfigData = (RCV_CONFIG_ENABLE | |
| 2917 | RCV_CONFIG_ENPARSE | |
| 2918 | RCV_CONFIG_RCVBAD | |
| 2919 | RCV_CONFIG_RCVPAUSE | |
| 2920 | RCV_CONFIG_TZIPV6 | |
| 2921 | RCV_CONFIG_TZIPV4 | |
| 2922 | RCV_CONFIG_HASH_16 | |
| 2923 | RCV_CONFIG_SOCKET | RCV_CONFIG_BUFSIZE(MaxFrame)); |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 2924 | |
| 2925 | if (adapter->asictype == SAHARA_REV_B) { |
| 2926 | ConfigData |= (RCV_CONFIG_HIPRICTL | |
| 2927 | RCV_CONFIG_NEWSTATUSFMT); |
| 2928 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2929 | WRITE_REG(HwRegs->RcvConfig, ConfigData, TRUE); |
| 2930 | |
| 2931 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_ENABLE, TRUE); |
| 2932 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2933 | /* Mark the link as down. We'll get a link event when it comes up. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2934 | sxg_link_state(adapter, SXG_LINK_DOWN); |
| 2935 | |
| 2936 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInitLnk", |
| 2937 | adapter, 0, 0, 0); |
| 2938 | return (STATUS_SUCCESS); |
| 2939 | } |
| 2940 | |
| 2941 | /* |
| 2942 | * sxg_phy_init - Initialize the PHY |
| 2943 | * |
| 2944 | * Arguments - |
| 2945 | * adapter - A pointer to our adapter structure |
| 2946 | * |
| 2947 | * Return |
| 2948 | * status |
| 2949 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2950 | static int sxg_phy_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2951 | { |
| 2952 | u32 Value; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2953 | struct phy_ucode *p; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2954 | int status; |
| 2955 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2956 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2957 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2958 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2959 | * 0xC205 - PHY ID register (?) |
| 2960 | * &Value - XXXTODO - add def |
| 2961 | */ |
| 2962 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2963 | 0xC205, |
| 2964 | &Value); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2965 | if (status != STATUS_SUCCESS) |
| 2966 | return (STATUS_FAILURE); |
| 2967 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2968 | if (Value == 0x0012) { |
| 2969 | /* 0x0012 == AEL2005C PHY(?) - XXXTODO - add def */ |
| 2970 | DBG_ERROR("AEL2005C PHY detected. Downloading PHY \ |
| 2971 | microcode.\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2972 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2973 | /* Initialize AEL2005C PHY and download PHY microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2974 | for (p = PhyUcode; p->Addr != 0xFFFF; p++) { |
| 2975 | if (p->Addr == 0) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2976 | /* if address == 0, data == sleep time in ms */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2977 | mdelay(p->Data); |
| 2978 | } else { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2979 | /* write the given data to the specified address */ |
| 2980 | status = sxg_write_mdio_reg(adapter, |
| 2981 | MIIM_DEV_PHY_PMA, |
| 2982 | /* PHY address */ |
| 2983 | p->Addr, |
| 2984 | /* PHY data */ |
| 2985 | p->Data); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2986 | if (status != STATUS_SUCCESS) |
| 2987 | return (STATUS_FAILURE); |
| 2988 | } |
| 2989 | } |
| 2990 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2991 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2992 | |
| 2993 | return (STATUS_SUCCESS); |
| 2994 | } |
| 2995 | |
| 2996 | /* |
| 2997 | * sxg_link_event - Process a link event notification from the card |
| 2998 | * |
| 2999 | * Arguments - |
| 3000 | * adapter - A pointer to our adapter structure |
| 3001 | * |
| 3002 | * Return |
| 3003 | * None |
| 3004 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3005 | static void sxg_link_event(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3006 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3007 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3008 | struct net_device *netdev = adapter->netdev; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3009 | enum SXG_LINK_STATE LinkState; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3010 | int status; |
| 3011 | u32 Value; |
| 3012 | |
| 3013 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "LinkEvnt", |
| 3014 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3015 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3016 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3017 | /* Check the Link Status register. We should have a Link Alarm. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3018 | READ_REG(HwRegs->LinkStatus, Value); |
| 3019 | if (Value & LS_LINK_ALARM) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3020 | /* |
| 3021 | * We got a Link Status alarm. First, pause to let the |
| 3022 | * link state settle (it can bounce a number of times) |
| 3023 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3024 | mdelay(10); |
| 3025 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3026 | /* Now clear the alarm by reading the LASI status register. */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3027 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module */ |
| 3028 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 3029 | /* LASI status register */ |
| 3030 | LASI_STATUS, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3031 | &Value); |
| 3032 | if (status != STATUS_SUCCESS) { |
| 3033 | DBG_ERROR("Error reading LASI Status MDIO register!\n"); |
| 3034 | sxg_link_state(adapter, SXG_LINK_DOWN); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3035 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3036 | } |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 3037 | /* |
| 3038 | * We used to assert that the LASI_LS_ALARM bit was set, as |
| 3039 | * it should be. But there appears to be cases during |
| 3040 | * initialization (when the PHY is reset and re-initialized) |
| 3041 | * when we get a link alarm, but the status bit is 0 when we |
| 3042 | * read it. Rather than trying to assure this never happens |
| 3043 | * (and nver being certain), just ignore it. |
| 3044 | |
| 3045 | * ASSERT(Value & LASI_STATUS_LS_ALARM); |
| 3046 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3047 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3048 | /* Now get and set the link state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3049 | LinkState = sxg_get_link_state(adapter); |
| 3050 | sxg_link_state(adapter, LinkState); |
| 3051 | DBG_ERROR("SXG: Link Alarm occurred. Link is %s\n", |
| 3052 | ((LinkState == SXG_LINK_UP) ? "UP" : "DOWN")); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3053 | if (LinkState == SXG_LINK_UP) |
| 3054 | netif_carrier_on(netdev); |
| 3055 | else |
| 3056 | netif_carrier_off(netdev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3057 | } else { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3058 | /* |
| 3059 | * XXXTODO - Assuming Link Attention is only being generated |
| 3060 | * for the Link Alarm pin (and not for a XAUI Link Status change) |
| 3061 | * , then it's impossible to get here. Yet we've gotten here |
| 3062 | * twice (under extreme conditions - bouncing the link up and |
| 3063 | * down many times a second). Needs further investigation. |
| 3064 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3065 | DBG_ERROR("SXG: sxg_link_event: Can't get here!\n"); |
| 3066 | DBG_ERROR("SXG: Link Status == 0x%08X.\n", Value); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3067 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3068 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3069 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3070 | |
| 3071 | } |
| 3072 | |
| 3073 | /* |
| 3074 | * sxg_get_link_state - Determine if the link is up or down |
| 3075 | * |
| 3076 | * Arguments - |
| 3077 | * adapter - A pointer to our adapter structure |
| 3078 | * |
| 3079 | * Return |
| 3080 | * Link State |
| 3081 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3082 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3083 | { |
| 3084 | int status; |
| 3085 | u32 Value; |
| 3086 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3087 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3088 | |
| 3089 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "GetLink", |
| 3090 | adapter, 0, 0, 0); |
| 3091 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3092 | /* |
| 3093 | * Per the Xenpak spec (and the IEEE 10Gb spec?), the link is up if |
| 3094 | * the following 3 bits (from 3 different MDIO registers) are all true. |
| 3095 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3096 | |
| 3097 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module */ |
| 3098 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 3099 | /* PMA/PMD Receive Signal Detect register */ |
| 3100 | PHY_PMA_RCV_DET, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3101 | &Value); |
| 3102 | if (status != STATUS_SUCCESS) |
| 3103 | goto bad; |
| 3104 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3105 | /* If PMA/PMD receive signal detect is 0, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3106 | if (!(Value & PMA_RCV_DETECT)) |
| 3107 | return (SXG_LINK_DOWN); |
| 3108 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3109 | /* MIIM_DEV_PHY_PCS - PHY PCS module */ |
| 3110 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PCS, |
| 3111 | /* PCS 10GBASE-R Status 1 register */ |
| 3112 | PHY_PCS_10G_STATUS1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3113 | &Value); |
| 3114 | if (status != STATUS_SUCCESS) |
| 3115 | goto bad; |
| 3116 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3117 | /* If PCS is not locked to receive blocks, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3118 | if (!(Value & PCS_10B_BLOCK_LOCK)) |
| 3119 | return (SXG_LINK_DOWN); |
| 3120 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3121 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_XS,/* PHY XS module */ |
| 3122 | /* XS Lane Status register */ |
| 3123 | PHY_XS_LANE_STATUS, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3124 | &Value); |
| 3125 | if (status != STATUS_SUCCESS) |
| 3126 | goto bad; |
| 3127 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3128 | /* If XS transmit lanes are not aligned, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3129 | if (!(Value & XS_LANE_ALIGN)) |
| 3130 | return (SXG_LINK_DOWN); |
| 3131 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3132 | /* All 3 bits are true, so the link is up */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3133 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3134 | |
| 3135 | return (SXG_LINK_UP); |
| 3136 | |
| 3137 | bad: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3138 | /* An error occurred reading an MDIO register. This shouldn't happen. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3139 | DBG_ERROR("Error reading an MDIO register!\n"); |
| 3140 | ASSERT(0); |
| 3141 | return (SXG_LINK_DOWN); |
| 3142 | } |
| 3143 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3144 | static void sxg_indicate_link_state(struct adapter_t *adapter, |
| 3145 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3146 | { |
| 3147 | if (adapter->LinkState == SXG_LINK_UP) { |
| 3148 | DBG_ERROR("%s: LINK now UP, call netif_start_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3149 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3150 | netif_start_queue(adapter->netdev); |
| 3151 | } else { |
| 3152 | DBG_ERROR("%s: LINK now DOWN, call netif_stop_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3153 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3154 | netif_stop_queue(adapter->netdev); |
| 3155 | } |
| 3156 | } |
| 3157 | |
| 3158 | /* |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 3159 | * sxg_change_mtu - Change the Maximum Transfer Unit |
| 3160 | * * @returns 0 on success, negative on failure |
| 3161 | */ |
| 3162 | int sxg_change_mtu (struct net_device *netdev, int new_mtu) |
| 3163 | { |
| 3164 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(netdev); |
| 3165 | |
| 3166 | if (!((new_mtu == SXG_DEFAULT_MTU) || (new_mtu == SXG_JUMBO_MTU))) |
| 3167 | return -EINVAL; |
| 3168 | |
| 3169 | if(new_mtu == netdev->mtu) |
| 3170 | return 0; |
| 3171 | |
| 3172 | netdev->mtu = new_mtu; |
| 3173 | |
| 3174 | if (new_mtu == SXG_JUMBO_MTU) { |
| 3175 | adapter->JumboEnabled = TRUE; |
| 3176 | adapter->FrameSize = JUMBOMAXFRAME; |
| 3177 | adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE; |
| 3178 | } else { |
| 3179 | adapter->JumboEnabled = FALSE; |
| 3180 | adapter->FrameSize = ETHERMAXFRAME; |
| 3181 | adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE; |
| 3182 | } |
| 3183 | |
| 3184 | sxg_entry_halt(netdev); |
| 3185 | sxg_entry_open(netdev); |
| 3186 | return 0; |
| 3187 | } |
| 3188 | |
| 3189 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3190 | * sxg_link_state - Set the link state and if necessary, indicate. |
| 3191 | * This routine the central point of processing for all link state changes. |
| 3192 | * Nothing else in the driver should alter the link state or perform |
| 3193 | * link state indications |
| 3194 | * |
| 3195 | * Arguments - |
| 3196 | * adapter - A pointer to our adapter structure |
| 3197 | * LinkState - The link state |
| 3198 | * |
| 3199 | * Return |
| 3200 | * None |
| 3201 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3202 | static void sxg_link_state(struct adapter_t *adapter, |
| 3203 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3204 | { |
| 3205 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "LnkINDCT", |
| 3206 | adapter, LinkState, adapter->LinkState, adapter->State); |
| 3207 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3208 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3209 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3210 | /* |
| 3211 | * Hold the adapter lock during this routine. Maybe move |
| 3212 | * the lock to the caller. |
| 3213 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3214 | /* IMP TODO : Check if we can survive without taking this lock */ |
| 3215 | // spin_lock(&adapter->AdapterLock); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3216 | if (LinkState == adapter->LinkState) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3217 | /* Nothing changed.. */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3218 | // spin_unlock(&adapter->AdapterLock); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3219 | DBG_ERROR("EXIT #0 %s. Link status = %d\n", |
| 3220 | __func__, LinkState); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3221 | return; |
| 3222 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3223 | /* Save the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3224 | adapter->LinkState = LinkState; |
| 3225 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3226 | /* Drop the lock and indicate link state */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3227 | // spin_unlock(&adapter->AdapterLock); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3228 | DBG_ERROR("EXIT #1 %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3229 | |
| 3230 | sxg_indicate_link_state(adapter, LinkState); |
| 3231 | } |
| 3232 | |
| 3233 | /* |
| 3234 | * sxg_write_mdio_reg - Write to a register on the MDIO bus |
| 3235 | * |
| 3236 | * Arguments - |
| 3237 | * adapter - A pointer to our adapter structure |
| 3238 | * DevAddr - MDIO device number being addressed |
| 3239 | * RegAddr - register address for the specified MDIO device |
| 3240 | * Value - value to write to the MDIO register |
| 3241 | * |
| 3242 | * Return |
| 3243 | * status |
| 3244 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3245 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3246 | u32 DevAddr, u32 RegAddr, u32 Value) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3247 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3248 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3249 | /* Address operation (written to MIIM field reg) */ |
| 3250 | u32 AddrOp; |
| 3251 | /* Write operation (written to MIIM field reg) */ |
| 3252 | u32 WriteOp; |
| 3253 | u32 Cmd;/* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3254 | u32 ValueRead; |
| 3255 | u32 Timeout; |
| 3256 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3257 | /* DBG_ERROR("ENTER %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3258 | |
| 3259 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 3260 | adapter, 0, 0, 0); |
| 3261 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3262 | /* Ensure values don't exceed field width */ |
| 3263 | DevAddr &= 0x001F; /* 5-bit field */ |
| 3264 | RegAddr &= 0xFFFF; /* 16-bit field */ |
| 3265 | Value &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3266 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3267 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3268 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3269 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3270 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3271 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 3272 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3273 | /* Set MIIM field register bits for an MIIM write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3274 | WriteOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3275 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3276 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3277 | (MIIM_OP_WRITE << AXGMAC_AMIIM_FIELD_OP_SHIFT) | Value; |
| 3278 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3279 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3280 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 3281 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3282 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3283 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3284 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3285 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3286 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 3287 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3288 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3289 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3290 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3291 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3292 | Timeout = SXG_LINK_TIMEOUT; |
| 3293 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3294 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3295 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3296 | if (--Timeout == 0) { |
| 3297 | return (STATUS_FAILURE); |
| 3298 | } |
| 3299 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3300 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3301 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3302 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3303 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3304 | /* MIIM write to set up an MDIO write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3305 | WRITE_REG(HwRegs->MacAmiimField, WriteOp, TRUE); |
| 3306 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3307 | /* Write to MIIM Command Register to execute the write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3308 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3309 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3310 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3311 | Timeout = SXG_LINK_TIMEOUT; |
| 3312 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3313 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3314 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3315 | if (--Timeout == 0) { |
| 3316 | return (STATUS_FAILURE); |
| 3317 | } |
| 3318 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3319 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3320 | /* DBG_ERROR("EXIT %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3321 | |
| 3322 | return (STATUS_SUCCESS); |
| 3323 | } |
| 3324 | |
| 3325 | /* |
| 3326 | * sxg_read_mdio_reg - Read a register on the MDIO bus |
| 3327 | * |
| 3328 | * Arguments - |
| 3329 | * adapter - A pointer to our adapter structure |
| 3330 | * DevAddr - MDIO device number being addressed |
| 3331 | * RegAddr - register address for the specified MDIO device |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3332 | * pValue - pointer to where to put data read from the MDIO register |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3333 | * |
| 3334 | * Return |
| 3335 | * status |
| 3336 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3337 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3338 | u32 DevAddr, u32 RegAddr, u32 *pValue) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3339 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3340 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3341 | u32 AddrOp; /* Address operation (written to MIIM field reg) */ |
| 3342 | u32 ReadOp; /* Read operation (written to MIIM field reg) */ |
| 3343 | u32 Cmd; /* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3344 | u32 ValueRead; |
| 3345 | u32 Timeout; |
| 3346 | |
| 3347 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 3348 | adapter, 0, 0, 0); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3349 | DBG_ERROR("ENTER %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3350 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3351 | /* Ensure values don't exceed field width */ |
| 3352 | DevAddr &= 0x001F; /* 5-bit field */ |
| 3353 | RegAddr &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3354 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3355 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3356 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3357 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3358 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3359 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 3360 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3361 | /* Set MIIM field register bits for an MIIM read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3362 | ReadOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 3363 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 3364 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 3365 | (MIIM_OP_READ << AXGMAC_AMIIM_FIELD_OP_SHIFT); |
| 3366 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3367 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3368 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 3369 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3370 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3371 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3372 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3373 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3374 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 3375 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3376 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3377 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3378 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3379 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3380 | Timeout = SXG_LINK_TIMEOUT; |
| 3381 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3382 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3383 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3384 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3385 | DBG_ERROR("EXIT %s with STATUS_FAILURE 1\n", __FUNCTION__); |
| 3386 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3387 | return (STATUS_FAILURE); |
| 3388 | } |
| 3389 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3390 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3391 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3392 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 3393 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3394 | /* MIIM write to set up an MDIO register read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3395 | WRITE_REG(HwRegs->MacAmiimField, ReadOp, TRUE); |
| 3396 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3397 | /* Write to MIIM Command Register to execute the read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3398 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 3399 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3400 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3401 | Timeout = SXG_LINK_TIMEOUT; |
| 3402 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3403 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3404 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 3405 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3406 | DBG_ERROR("EXIT %s with STATUS_FAILURE 2\n", __FUNCTION__); |
| 3407 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3408 | return (STATUS_FAILURE); |
| 3409 | } |
| 3410 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 3411 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3412 | /* Read the MDIO register data back from the field register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3413 | READ_REG(HwRegs->MacAmiimField, *pValue); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3414 | *pValue &= 0xFFFF; /* data is in the lower 16 bits */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3415 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3416 | DBG_ERROR("EXIT %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3417 | |
| 3418 | return (STATUS_SUCCESS); |
| 3419 | } |
| 3420 | |
| 3421 | /* |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3422 | * Functions to obtain the CRC corresponding to the destination mac address. |
| 3423 | * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using |
| 3424 | * the polynomial: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3425 | * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 |
| 3426 | * + x^4 + x^2 + x^1. |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3427 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3428 | * After the CRC for the 6 bytes is generated (but before the value is |
| 3429 | * complemented), we must then transpose the value and return bits 30-23. |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3430 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3431 | static u32 sxg_crc_table[256];/* Table of CRC's for all possible byte values */ |
| 3432 | static u32 sxg_crc_init; /* Is table initialized */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3433 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3434 | /* Contruct the CRC32 table */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3435 | static void sxg_mcast_init_crc32(void) |
| 3436 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3437 | u32 c; /* CRC shit reg */ |
| 3438 | u32 e = 0; /* Poly X-or pattern */ |
| 3439 | int i; /* counter */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3440 | int k; /* byte being shifted into crc */ |
| 3441 | |
| 3442 | static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 }; |
| 3443 | |
| 3444 | for (i = 0; i < sizeof(p) / sizeof(int); i++) { |
| 3445 | e |= 1L << (31 - p[i]); |
| 3446 | } |
| 3447 | |
| 3448 | for (i = 1; i < 256; i++) { |
| 3449 | c = i; |
| 3450 | for (k = 8; k; k--) { |
| 3451 | c = c & 1 ? (c >> 1) ^ e : c >> 1; |
| 3452 | } |
| 3453 | sxg_crc_table[i] = c; |
| 3454 | } |
| 3455 | } |
| 3456 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3457 | /* |
| 3458 | * Return the MAC hast as described above. |
| 3459 | */ |
| 3460 | static unsigned char sxg_mcast_get_mac_hash(char *macaddr) |
| 3461 | { |
| 3462 | u32 crc; |
| 3463 | char *p; |
| 3464 | int i; |
| 3465 | unsigned char machash = 0; |
| 3466 | |
| 3467 | if (!sxg_crc_init) { |
| 3468 | sxg_mcast_init_crc32(); |
| 3469 | sxg_crc_init = 1; |
| 3470 | } |
| 3471 | |
| 3472 | crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */ |
| 3473 | for (i = 0, p = macaddr; i < 6; ++p, ++i) { |
| 3474 | crc = (crc >> 8) ^ sxg_crc_table[(crc ^ *p) & 0xFF]; |
| 3475 | } |
| 3476 | |
| 3477 | /* Return bits 1-8, transposed */ |
| 3478 | for (i = 1; i < 9; i++) { |
| 3479 | machash |= (((crc >> i) & 1) << (8 - i)); |
| 3480 | } |
| 3481 | |
| 3482 | return (machash); |
| 3483 | } |
| 3484 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3485 | static void sxg_mcast_set_mask(struct adapter_t *adapter) |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3486 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3487 | struct sxg_ucode_regs *sxg_regs = adapter->UcodeRegs; |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3488 | |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3489 | DBG_ERROR("%s ENTER (%s) MacFilter[%x] mask[%llx]\n", __FUNCTION__, |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3490 | adapter->netdev->name, (unsigned int)adapter->MacFilter, |
| 3491 | adapter->MulticastMask); |
| 3492 | |
| 3493 | if (adapter->MacFilter & (MAC_ALLMCAST | MAC_PROMISC)) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3494 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3495 | * Turn on all multicast addresses. We have to do this for |
| 3496 | * promiscuous mode as well as ALLMCAST mode. It saves the |
| 3497 | * Microcode from having keep state about the MAC configuration |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3498 | */ |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3499 | /* DBG_ERROR("sxg: %s MacFilter = MAC_ALLMCAST | MAC_PROMISC\n \ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3500 | * SLUT MODE!!!\n",__func__); |
| 3501 | */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3502 | WRITE_REG(sxg_regs->McastLow, 0xFFFFFFFF, FLUSH); |
| 3503 | WRITE_REG(sxg_regs->McastHigh, 0xFFFFFFFF, FLUSH); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3504 | /* DBG_ERROR("%s (%s) WRITE to slic_regs slic_mcastlow&high \ |
| 3505 | * 0xFFFFFFFF\n",__func__, adapter->netdev->name); |
| 3506 | */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3507 | |
| 3508 | } else { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3509 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3510 | * Commit our multicast mast to the SLIC by writing to the |
| 3511 | * multicast address mask registers |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3512 | */ |
| 3513 | DBG_ERROR("%s (%s) WRITE mcastlow[%lx] mcasthigh[%lx]\n", |
| 3514 | __func__, adapter->netdev->name, |
| 3515 | ((ulong) (adapter->MulticastMask & 0xFFFFFFFF)), |
| 3516 | ((ulong) |
| 3517 | ((adapter->MulticastMask >> 32) & 0xFFFFFFFF))); |
| 3518 | |
| 3519 | WRITE_REG(sxg_regs->McastLow, |
| 3520 | (u32) (adapter->MulticastMask & 0xFFFFFFFF), FLUSH); |
| 3521 | WRITE_REG(sxg_regs->McastHigh, |
| 3522 | (u32) ((adapter-> |
| 3523 | MulticastMask >> 32) & 0xFFFFFFFF), FLUSH); |
| 3524 | } |
| 3525 | } |
| 3526 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3527 | static void sxg_mcast_set_bit(struct adapter_t *adapter, char *address) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3528 | { |
| 3529 | unsigned char crcpoly; |
| 3530 | |
| 3531 | /* Get the CRC polynomial for the mac address */ |
| 3532 | crcpoly = sxg_mcast_get_mac_hash(address); |
| 3533 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3534 | /* |
| 3535 | * We only have space on the SLIC for 64 entries. Lop |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3536 | * off the top two bits. (2^6 = 64) |
| 3537 | */ |
| 3538 | crcpoly &= 0x3F; |
| 3539 | |
| 3540 | /* OR in the new bit into our 64 bit mask. */ |
| 3541 | adapter->MulticastMask |= (u64) 1 << crcpoly; |
| 3542 | } |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3543 | |
| 3544 | /* |
| 3545 | * Function takes MAC addresses from dev_mc_list and generates the Mask |
| 3546 | */ |
| 3547 | |
| 3548 | static void sxg_set_mcast_addr(struct adapter_t *adapter) |
| 3549 | { |
| 3550 | struct dev_mc_list *mclist; |
| 3551 | struct net_device *dev = adapter->netdev; |
| 3552 | int i; |
| 3553 | |
| 3554 | if (adapter->MacFilter & (MAC_ALLMCAST | MAC_MCAST)) { |
| 3555 | for (i = 0, mclist = dev->mc_list; i < dev->mc_count; |
| 3556 | i++, mclist = mclist->next) { |
| 3557 | sxg_mcast_set_bit(adapter,mclist->da_addr); |
| 3558 | } |
| 3559 | } |
| 3560 | sxg_mcast_set_mask(adapter); |
| 3561 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3562 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3563 | static void sxg_mcast_set_list(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3564 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3565 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3566 | |
| 3567 | ASSERT(adapter); |
Mithlesh Thukral | 559990c | 2009-01-30 20:20:19 +0530 | [diff] [blame] | 3568 | if (dev->flags & IFF_PROMISC) |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3569 | adapter->MacFilter |= MAC_PROMISC; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3570 | if (dev->flags & IFF_MULTICAST) |
| 3571 | adapter->MacFilter |= MAC_MCAST; |
Mithlesh Thukral | 559990c | 2009-01-30 20:20:19 +0530 | [diff] [blame] | 3572 | if (dev->flags & IFF_ALLMULTI) |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3573 | adapter->MacFilter |= MAC_ALLMCAST; |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3574 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3575 | //XXX handle other flags as well |
Mithlesh Thukral | b040b07 | 2009-01-28 07:08:11 +0530 | [diff] [blame] | 3576 | sxg_set_mcast_addr(adapter); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3577 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3578 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3579 | void sxg_free_sgl_buffers(struct adapter_t *adapter) |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3580 | { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3581 | struct list_entry *ple; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3582 | struct sxg_scatter_gather *Sgl; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3583 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3584 | while(!(IsListEmpty(&adapter->AllSglBuffers))) { |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3585 | ple = RemoveHeadList(&adapter->AllSglBuffers); |
| 3586 | Sgl = container_of(ple, struct sxg_scatter_gather, AllList); |
| 3587 | kfree(Sgl); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3588 | adapter->AllSglBufferCount--; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3589 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3590 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3591 | |
| 3592 | void sxg_free_rcvblocks(struct adapter_t *adapter) |
| 3593 | { |
| 3594 | u32 i; |
| 3595 | void *temp_RcvBlock; |
| 3596 | struct list_entry *ple; |
| 3597 | struct sxg_rcv_block_hdr *RcvBlockHdr; |
| 3598 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3599 | ASSERT((adapter->state == SXG_STATE_INITIALIZING) || |
| 3600 | (adapter->state == SXG_STATE_HALTING)); |
| 3601 | while(!(IsListEmpty(&adapter->AllRcvBlocks))) { |
| 3602 | |
| 3603 | ple = RemoveHeadList(&adapter->AllRcvBlocks); |
| 3604 | RcvBlockHdr = container_of(ple, struct sxg_rcv_block_hdr, AllList); |
| 3605 | |
| 3606 | if(RcvBlockHdr->VirtualAddress) { |
| 3607 | temp_RcvBlock = RcvBlockHdr->VirtualAddress; |
| 3608 | |
| 3609 | for(i=0; i< SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3610 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3611 | RcvDataBufferHdr = |
| 3612 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
| 3613 | SXG_FREE_RCV_PACKET(RcvDataBufferHdr); |
| 3614 | } |
| 3615 | } |
| 3616 | |
| 3617 | pci_free_consistent(adapter->pcidev, |
| 3618 | SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE), |
| 3619 | RcvBlockHdr->VirtualAddress, |
| 3620 | RcvBlockHdr->PhysicalAddress); |
| 3621 | adapter->AllRcvBlockCount--; |
| 3622 | } |
| 3623 | ASSERT(adapter->AllRcvBlockCount == 0); |
| 3624 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFrRBlk", |
| 3625 | adapter, 0, 0, 0); |
| 3626 | } |
| 3627 | void sxg_free_mcast_addrs(struct adapter_t *adapter) |
| 3628 | { |
| 3629 | struct sxg_multicast_address *address; |
| 3630 | while(adapter->MulticastAddrs) { |
| 3631 | address = adapter->MulticastAddrs; |
| 3632 | adapter->MulticastAddrs = address->Next; |
| 3633 | kfree(address); |
| 3634 | } |
| 3635 | |
| 3636 | adapter->MulticastMask= 0; |
| 3637 | } |
| 3638 | |
| 3639 | void sxg_unmap_resources(struct adapter_t *adapter) |
| 3640 | { |
| 3641 | if(adapter->HwRegs) { |
| 3642 | iounmap((void *)adapter->HwRegs); |
| 3643 | } |
| 3644 | if(adapter->UcodeRegs) { |
| 3645 | iounmap((void *)adapter->UcodeRegs); |
| 3646 | } |
| 3647 | |
| 3648 | ASSERT(adapter->AllRcvBlockCount == 0); |
| 3649 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFrRBlk", |
| 3650 | adapter, 0, 0, 0); |
| 3651 | } |
| 3652 | |
| 3653 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3654 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3655 | /* |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3656 | * sxg_free_resources - Free everything allocated in SxgAllocateResources |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3657 | * |
| 3658 | * Arguments - |
| 3659 | * adapter - A pointer to our adapter structure |
| 3660 | * |
| 3661 | * Return |
| 3662 | * none |
| 3663 | */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3664 | void sxg_free_resources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3665 | { |
| 3666 | u32 RssIds, IsrCount; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3667 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 3668 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3669 | |
| 3670 | if (adapter->BasicAllocations == FALSE) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3671 | /* |
| 3672 | * No allocations have been made, including spinlocks, |
| 3673 | * or listhead initializations. Return. |
| 3674 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3675 | return; |
| 3676 | } |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3677 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3678 | if (!(IsListEmpty(&adapter->AllRcvBlocks))) { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3679 | sxg_free_rcvblocks(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3680 | } |
| 3681 | if (!(IsListEmpty(&adapter->AllSglBuffers))) { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3682 | sxg_free_sgl_buffers(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3683 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3684 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3685 | if (adapter->XmtRingZeroIndex) { |
| 3686 | pci_free_consistent(adapter->pcidev, |
| 3687 | sizeof(u32), |
| 3688 | adapter->XmtRingZeroIndex, |
| 3689 | adapter->PXmtRingZeroIndex); |
| 3690 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3691 | if (adapter->Isr) { |
| 3692 | pci_free_consistent(adapter->pcidev, |
| 3693 | sizeof(u32) * IsrCount, |
| 3694 | adapter->Isr, adapter->PIsr); |
| 3695 | } |
| 3696 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3697 | if (adapter->EventRings) { |
| 3698 | pci_free_consistent(adapter->pcidev, |
| 3699 | sizeof(struct sxg_event_ring) * RssIds, |
| 3700 | adapter->EventRings, adapter->PEventRings); |
| 3701 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3702 | if (adapter->RcvRings) { |
| 3703 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3704 | sizeof(struct sxg_rcv_ring) * 1, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3705 | adapter->RcvRings, |
| 3706 | adapter->PRcvRings); |
| 3707 | adapter->RcvRings = NULL; |
| 3708 | } |
| 3709 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3710 | if(adapter->XmtRings) { |
| 3711 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3712 | sizeof(struct sxg_xmt_ring) * 1, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3713 | adapter->XmtRings, |
| 3714 | adapter->PXmtRings); |
| 3715 | adapter->XmtRings = NULL; |
| 3716 | } |
| 3717 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3718 | if (adapter->ucode_stats) { |
| 3719 | pci_unmap_single(adapter->pcidev, |
| 3720 | sizeof(struct sxg_ucode_stats), |
| 3721 | adapter->pucode_stats, PCI_DMA_FROMDEVICE); |
| 3722 | adapter->ucode_stats = NULL; |
| 3723 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3724 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3725 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3726 | /* Unmap register spaces */ |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3727 | sxg_unmap_resources(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3728 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3729 | sxg_free_mcast_addrs(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3730 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3731 | adapter->BasicAllocations = FALSE; |
| 3732 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3733 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3734 | |
| 3735 | /* |
| 3736 | * sxg_allocate_complete - |
| 3737 | * |
| 3738 | * This routine is called when a memory allocation has completed. |
| 3739 | * |
| 3740 | * Arguments - |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3741 | * struct adapter_t * - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3742 | * VirtualAddress - Memory virtual address |
| 3743 | * PhysicalAddress - Memory physical address |
| 3744 | * Length - Length of memory allocated (or 0) |
| 3745 | * Context - The type of buffer allocated |
| 3746 | * |
| 3747 | * Return |
| 3748 | * None. |
| 3749 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3750 | static int sxg_allocate_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3751 | void *VirtualAddress, |
| 3752 | dma_addr_t PhysicalAddress, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3753 | u32 Length, enum sxg_buffer_type Context) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3754 | { |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3755 | int status = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3756 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp", |
| 3757 | adapter, VirtualAddress, Length, Context); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3758 | ASSERT(atomic_read(&adapter->pending_allocations)); |
| 3759 | atomic_dec(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3760 | |
| 3761 | switch (Context) { |
| 3762 | |
| 3763 | case SXG_BUFFER_TYPE_RCV: |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3764 | status = sxg_allocate_rcvblock_complete(adapter, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3765 | VirtualAddress, |
| 3766 | PhysicalAddress, Length); |
| 3767 | break; |
| 3768 | case SXG_BUFFER_TYPE_SGL: |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3769 | sxg_allocate_sgl_buffer_complete(adapter, (struct sxg_scatter_gather *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3770 | VirtualAddress, |
| 3771 | PhysicalAddress, Length); |
| 3772 | break; |
| 3773 | } |
| 3774 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocCmp", |
| 3775 | adapter, VirtualAddress, Length, Context); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3776 | |
| 3777 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3778 | } |
| 3779 | |
| 3780 | /* |
| 3781 | * sxg_allocate_buffer_memory - Shared memory allocation routine used for |
| 3782 | * synchronous and asynchronous buffer allocations |
| 3783 | * |
| 3784 | * Arguments - |
| 3785 | * adapter - A pointer to our adapter structure |
| 3786 | * Size - block size to allocate |
| 3787 | * BufferType - Type of buffer to allocate |
| 3788 | * |
| 3789 | * Return |
| 3790 | * int |
| 3791 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3792 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3793 | u32 Size, enum sxg_buffer_type BufferType) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3794 | { |
| 3795 | int status; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3796 | void *Buffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3797 | dma_addr_t pBuffer; |
| 3798 | |
| 3799 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocMem", |
| 3800 | adapter, Size, BufferType, 0); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3801 | /* |
| 3802 | * Grab the adapter lock and check the state. If we're in anything other |
| 3803 | * than INITIALIZING or RUNNING state, fail. This is to prevent |
| 3804 | * allocations in an improper driver state |
| 3805 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3806 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3807 | atomic_inc(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3808 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3809 | if(BufferType != SXG_BUFFER_TYPE_SGL) |
| 3810 | Buffer = pci_alloc_consistent(adapter->pcidev, Size, &pBuffer); |
| 3811 | else { |
| 3812 | Buffer = kzalloc(Size, GFP_ATOMIC); |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 3813 | pBuffer = (dma_addr_t)NULL; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3814 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3815 | if (Buffer == NULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3816 | /* |
| 3817 | * Decrement the AllocationsPending count while holding |
| 3818 | * the lock. Pause processing relies on this |
| 3819 | */ |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 3820 | atomic_dec(&adapter->pending_allocations); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3821 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlcMemF1", |
| 3822 | adapter, Size, BufferType, 0); |
| 3823 | return (STATUS_RESOURCES); |
| 3824 | } |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3825 | status = sxg_allocate_complete(adapter, Buffer, pBuffer, Size, BufferType); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3826 | |
| 3827 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocMem", |
| 3828 | adapter, Size, BufferType, status); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3829 | return status; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3830 | } |
| 3831 | |
| 3832 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3833 | * sxg_allocate_rcvblock_complete - Complete a receive descriptor |
| 3834 | * block allocation |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3835 | * |
| 3836 | * Arguments - |
| 3837 | * adapter - A pointer to our adapter structure |
| 3838 | * RcvBlock - receive block virtual address |
| 3839 | * PhysicalAddress - Physical address |
| 3840 | * Length - Memory length |
| 3841 | * |
| 3842 | * Return |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3843 | */ |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3844 | static int sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3845 | void *RcvBlock, |
| 3846 | dma_addr_t PhysicalAddress, |
| 3847 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3848 | { |
| 3849 | u32 i; |
| 3850 | u32 BufferSize = adapter->ReceiveBufferSize; |
| 3851 | u64 Paddr; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3852 | void *temp_RcvBlock; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3853 | struct sxg_rcv_block_hdr *RcvBlockHdr; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3854 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3855 | struct sxg_rcv_descriptor_block *RcvDescriptorBlock; |
| 3856 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3857 | |
| 3858 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlRcvBlk", |
| 3859 | adapter, RcvBlock, Length, 0); |
| 3860 | if (RcvBlock == NULL) { |
| 3861 | goto fail; |
| 3862 | } |
| 3863 | memset(RcvBlock, 0, Length); |
| 3864 | ASSERT((BufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 3865 | (BufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3866 | ASSERT(Length == SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE)); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3867 | /* |
| 3868 | * First, initialize the contained pool of receive data buffers. |
| 3869 | * This initialization requires NBL/NB/MDL allocations, if any of them |
| 3870 | * fail, free the block and return without queueing the shared memory |
| 3871 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3872 | //RcvDataBuffer = RcvBlock; |
| 3873 | temp_RcvBlock = RcvBlock; |
| 3874 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3875 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3876 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) |
| 3877 | temp_RcvBlock; |
| 3878 | /* For FREE macro assertion */ |
| 3879 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 3880 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize); |
| 3881 | if (RcvDataBufferHdr->SxgDumbRcvPacket == NULL) |
| 3882 | goto fail; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3883 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3884 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3885 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3886 | /* |
| 3887 | * Place this entire block of memory on the AllRcvBlocks queue so it |
| 3888 | * can be free later |
| 3889 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3890 | |
| 3891 | RcvBlockHdr = (struct sxg_rcv_block_hdr *) ((unsigned char *)RcvBlock + |
| 3892 | SXG_RCV_BLOCK_HDR_OFFSET(SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3893 | RcvBlockHdr->VirtualAddress = RcvBlock; |
| 3894 | RcvBlockHdr->PhysicalAddress = PhysicalAddress; |
| 3895 | spin_lock(&adapter->RcvQLock); |
| 3896 | adapter->AllRcvBlockCount++; |
| 3897 | InsertTailList(&adapter->AllRcvBlocks, &RcvBlockHdr->AllList); |
| 3898 | spin_unlock(&adapter->RcvQLock); |
| 3899 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3900 | /* Now free the contained receive data buffers that we |
| 3901 | * initialized above */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3902 | temp_RcvBlock = RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3903 | for (i = 0, Paddr = PhysicalAddress; |
| 3904 | i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3905 | i++, Paddr += SXG_RCV_DATA_HDR_SIZE, |
| 3906 | temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3907 | RcvDataBufferHdr = |
| 3908 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3909 | spin_lock(&adapter->RcvQLock); |
| 3910 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 3911 | spin_unlock(&adapter->RcvQLock); |
| 3912 | } |
| 3913 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3914 | /* Locate the descriptor block and put it on a separate free queue */ |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3915 | RcvDescriptorBlock = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3916 | (struct sxg_rcv_descriptor_block *) ((unsigned char *)RcvBlock + |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3917 | SXG_RCV_DESCRIPTOR_BLOCK_OFFSET |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3918 | (SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3919 | RcvDescriptorBlockHdr = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3920 | (struct sxg_rcv_descriptor_block_hdr *) ((unsigned char *)RcvBlock + |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3921 | SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3922 | (SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3923 | RcvDescriptorBlockHdr->VirtualAddress = RcvDescriptorBlock; |
| 3924 | RcvDescriptorBlockHdr->PhysicalAddress = Paddr; |
| 3925 | spin_lock(&adapter->RcvQLock); |
| 3926 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, RcvDescriptorBlockHdr); |
| 3927 | spin_unlock(&adapter->RcvQLock); |
| 3928 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlRBlk", |
| 3929 | adapter, RcvBlock, Length, 0); |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3930 | return STATUS_SUCCESS; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3931 | fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3932 | /* Free any allocated resources */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3933 | if (RcvBlock) { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3934 | temp_RcvBlock = RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3935 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3936 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3937 | RcvDataBufferHdr = |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3938 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3939 | SXG_FREE_RCV_PACKET(RcvDataBufferHdr); |
| 3940 | } |
| 3941 | pci_free_consistent(adapter->pcidev, |
| 3942 | Length, RcvBlock, PhysicalAddress); |
| 3943 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3944 | DBG_ERROR("%s: OUT OF RESOURCES\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3945 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "RcvAFail", |
| 3946 | adapter, adapter->FreeRcvBufferCount, |
| 3947 | adapter->FreeRcvBlockCount, adapter->AllRcvBlockCount); |
| 3948 | adapter->Stats.NoMem++; |
Mithlesh Thukral | 0d41472 | 2009-01-19 20:29:59 +0530 | [diff] [blame] | 3949 | /* As allocation failed, free all previously allocated blocks..*/ |
| 3950 | //sxg_free_rcvblocks(adapter); |
| 3951 | |
| 3952 | return STATUS_RESOURCES; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3953 | } |
| 3954 | |
| 3955 | /* |
| 3956 | * sxg_allocate_sgl_buffer_complete - Complete a SGL buffer allocation |
| 3957 | * |
| 3958 | * Arguments - |
| 3959 | * adapter - A pointer to our adapter structure |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3960 | * SxgSgl - struct sxg_scatter_gather buffer |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3961 | * PhysicalAddress - Physical address |
| 3962 | * Length - Memory length |
| 3963 | * |
| 3964 | * Return |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3965 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3966 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3967 | struct sxg_scatter_gather *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3968 | dma_addr_t PhysicalAddress, |
| 3969 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3970 | { |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3971 | unsigned long sgl_flags; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3972 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlSglCmp", |
| 3973 | adapter, SxgSgl, Length, 0); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 3974 | spin_lock_irqsave(&adapter->SglQLock, sgl_flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3975 | adapter->AllSglBufferCount++; |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 3976 | /* PhysicalAddress; */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3977 | SxgSgl->PhysicalAddress = PhysicalAddress; |
| 3978 | /* Initialize backpointer once */ |
| 3979 | SxgSgl->adapter = adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3980 | InsertTailList(&adapter->AllSglBuffers, &SxgSgl->AllList); |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 3981 | spin_unlock_irqrestore(&adapter->SglQLock, sgl_flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3982 | SxgSgl->State = SXG_BUFFER_BUSY; |
Mithlesh Thukral | c5e5cf5 | 2009-02-06 19:31:40 +0530 | [diff] [blame] | 3983 | SXG_FREE_SGL_BUFFER(adapter, SxgSgl, NULL); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3984 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlSgl", |
| 3985 | adapter, SxgSgl, Length, 0); |
| 3986 | } |
| 3987 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3988 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 3989 | static int sxg_adapter_set_hwaddr(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3990 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3991 | /* |
| 3992 | * DBG_ERROR ("%s ENTER card->config_set[%x] port[%d] physport[%d] \ |
| 3993 | * funct#[%d]\n", __func__, card->config_set, |
| 3994 | * adapter->port, adapter->physport, adapter->functionnumber); |
| 3995 | * |
| 3996 | * sxg_dbg_macaddrs(adapter); |
| 3997 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3998 | /* DBG_ERROR ("%s AFTER copying from config.macinfo into currmacaddr\n", |
| 3999 | * __FUNCTION__); |
| 4000 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4001 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4002 | /* sxg_dbg_macaddrs(adapter); */ |
| 4003 | |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4004 | struct net_device * dev = adapter->netdev; |
| 4005 | if(!dev) |
| 4006 | { |
| 4007 | printk("sxg: Dev is Null\n"); |
| 4008 | } |
| 4009 | |
| 4010 | DBG_ERROR("%s ENTER (%s)\n", __FUNCTION__, adapter->netdev->name); |
| 4011 | |
| 4012 | if (netif_running(dev)) { |
| 4013 | return -EBUSY; |
| 4014 | } |
| 4015 | if (!adapter) { |
| 4016 | return -EBUSY; |
| 4017 | } |
| 4018 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4019 | if (!(adapter->currmacaddr[0] || |
| 4020 | adapter->currmacaddr[1] || |
| 4021 | adapter->currmacaddr[2] || |
| 4022 | adapter->currmacaddr[3] || |
| 4023 | adapter->currmacaddr[4] || adapter->currmacaddr[5])) { |
| 4024 | memcpy(adapter->currmacaddr, adapter->macaddr, 6); |
| 4025 | } |
| 4026 | if (adapter->netdev) { |
| 4027 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4028 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4029 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4030 | /* DBG_ERROR ("%s EXIT port %d\n", __func__, adapter->port); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4031 | sxg_dbg_macaddrs(adapter); |
| 4032 | |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4033 | return 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4034 | } |
| 4035 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 4036 | #if XXXTODO |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4037 | static int sxg_mac_set_address(struct net_device *dev, void *ptr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4038 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4039 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4040 | struct sockaddr *addr = ptr; |
| 4041 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4042 | DBG_ERROR("%s ENTER (%s)\n", __func__, adapter->netdev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4043 | |
| 4044 | if (netif_running(dev)) { |
| 4045 | return -EBUSY; |
| 4046 | } |
| 4047 | if (!adapter) { |
| 4048 | return -EBUSY; |
| 4049 | } |
| 4050 | DBG_ERROR("sxg: %s (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4051 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4052 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 4053 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 4054 | adapter->currmacaddr[5]); |
| 4055 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
| 4056 | memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); |
| 4057 | DBG_ERROR("sxg: %s (%s) new %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4058 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4059 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 4060 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 4061 | adapter->currmacaddr[5]); |
| 4062 | |
| 4063 | sxg_config_set(adapter, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4064 | return 0; |
| 4065 | } |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 4066 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4067 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4068 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4069 | * SXG DRIVER FUNCTIONS (below) |
| 4070 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4071 | * sxg_initialize_adapter - Initialize adapter |
| 4072 | * |
| 4073 | * Arguments - |
| 4074 | * adapter - A pointer to our adapter structure |
| 4075 | * |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4076 | * Return - int |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4077 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4078 | static int sxg_initialize_adapter(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4079 | { |
| 4080 | u32 RssIds, IsrCount; |
| 4081 | u32 i; |
| 4082 | int status; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4083 | int sxg_rcv_ring_size = SXG_RCV_RING_SIZE; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4084 | |
| 4085 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitAdpt", |
| 4086 | adapter, 0, 0, 0); |
| 4087 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4088 | RssIds = 1; /* XXXTODO SXG_RSS_CPU_COUNT(adapter); */ |
Mithlesh Thukral | 1782199f | 2009-02-06 19:32:28 +0530 | [diff] [blame] | 4089 | IsrCount = adapter->msi_enabled ? RssIds : 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4090 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4091 | /* |
| 4092 | * Sanity check SXG_UCODE_REGS structure definition to |
| 4093 | * make sure the length is correct |
| 4094 | */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4095 | ASSERT(sizeof(struct sxg_ucode_regs) == SXG_REGISTER_SIZE_PER_CPU); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4096 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4097 | /* Disable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4098 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
| 4099 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4100 | /* Set MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4101 | ASSERT((adapter->FrameSize == ETHERMAXFRAME) || |
| 4102 | (adapter->FrameSize == JUMBOMAXFRAME)); |
| 4103 | WRITE_REG(adapter->UcodeRegs[0].LinkMtu, adapter->FrameSize, TRUE); |
| 4104 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4105 | /* Set event ring base address and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4106 | WRITE_REG64(adapter, |
| 4107 | adapter->UcodeRegs[0].EventBase, adapter->PEventRings, 0); |
| 4108 | WRITE_REG(adapter->UcodeRegs[0].EventSize, EVENT_RING_SIZE, TRUE); |
| 4109 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4110 | /* Per-ISR initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4111 | for (i = 0; i < IsrCount; i++) { |
| 4112 | u64 Addr; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4113 | /* Set interrupt status pointer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4114 | Addr = adapter->PIsr + (i * sizeof(u32)); |
| 4115 | WRITE_REG64(adapter, adapter->UcodeRegs[i].Isp, Addr, i); |
| 4116 | } |
| 4117 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4118 | /* XMT ring zero index */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4119 | WRITE_REG64(adapter, |
| 4120 | adapter->UcodeRegs[0].SPSendIndex, |
| 4121 | adapter->PXmtRingZeroIndex, 0); |
| 4122 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4123 | /* Per-RSS initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4124 | for (i = 0; i < RssIds; i++) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4125 | /* Release all event ring entries to the Microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4126 | WRITE_REG(adapter->UcodeRegs[i].EventRelease, EVENT_RING_SIZE, |
| 4127 | TRUE); |
| 4128 | } |
| 4129 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4130 | /* Transmit ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4131 | WRITE_REG64(adapter, |
| 4132 | adapter->UcodeRegs[0].XmtBase, adapter->PXmtRings, 0); |
| 4133 | WRITE_REG(adapter->UcodeRegs[0].XmtSize, SXG_XMT_RING_SIZE, TRUE); |
| 4134 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4135 | /* Receive ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4136 | WRITE_REG64(adapter, |
| 4137 | adapter->UcodeRegs[0].RcvBase, adapter->PRcvRings, 0); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4138 | if (adapter->JumboEnabled == TRUE) |
| 4139 | sxg_rcv_ring_size = SXG_JUMBO_RCV_RING_SIZE; |
| 4140 | WRITE_REG(adapter->UcodeRegs[0].RcvSize, sxg_rcv_ring_size, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4141 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4142 | /* Populate the card with receive buffers */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4143 | sxg_stock_rcv_buffers(adapter); |
| 4144 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4145 | /* |
| 4146 | * Initialize checksum offload capabilities. At the moment we always |
| 4147 | * enable IP and TCP receive checksums on the card. Depending on the |
| 4148 | * checksum configuration specified by the user, we can choose to |
| 4149 | * report or ignore the checksum information provided by the card. |
| 4150 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4151 | WRITE_REG(adapter->UcodeRegs[0].ReceiveChecksum, |
| 4152 | SXG_RCV_TCP_CSUM_ENABLED | SXG_RCV_IP_CSUM_ENABLED, TRUE); |
| 4153 | |
Mithlesh Thukral | 9914f05 | 2009-02-18 18:51:29 +0530 | [diff] [blame] | 4154 | adapter->flags |= (SXG_RCV_TCP_CSUM_ENABLED | SXG_RCV_IP_CSUM_ENABLED ); |
| 4155 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4156 | /* Initialize the MAC, XAUI */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4157 | DBG_ERROR("sxg: %s ENTER sxg_initialize_link\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4158 | status = sxg_initialize_link(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 4159 | DBG_ERROR("sxg: %s EXIT sxg_initialize_link status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4160 | status); |
| 4161 | if (status != STATUS_SUCCESS) { |
| 4162 | return (status); |
| 4163 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4164 | /* |
| 4165 | * Initialize Dead to FALSE. |
| 4166 | * SlicCheckForHang or SlicDumpThread will take it from here. |
| 4167 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4168 | adapter->Dead = FALSE; |
| 4169 | adapter->PingOutstanding = FALSE; |
Mithlesh Thukral | a536efc | 2009-02-18 18:54:14 +0530 | [diff] [blame] | 4170 | adapter->XmtFcEnabled = TRUE; |
| 4171 | adapter->RcvFcEnabled = TRUE; |
| 4172 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4173 | adapter->State = SXG_STATE_RUNNING; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4174 | |
| 4175 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInit", |
| 4176 | adapter, 0, 0, 0); |
| 4177 | return (STATUS_SUCCESS); |
| 4178 | } |
| 4179 | |
| 4180 | /* |
| 4181 | * sxg_fill_descriptor_block - Populate a descriptor block and give it to |
| 4182 | * the card. The caller should hold the RcvQLock |
| 4183 | * |
| 4184 | * Arguments - |
| 4185 | * adapter - A pointer to our adapter structure |
| 4186 | * RcvDescriptorBlockHdr - Descriptor block to fill |
| 4187 | * |
| 4188 | * Return |
| 4189 | * status |
| 4190 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4191 | static int sxg_fill_descriptor_block(struct adapter_t *adapter, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4192 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4193 | { |
| 4194 | u32 i; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4195 | struct sxg_ring_info *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 4196 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 4197 | struct sxg_rcv_descriptor_block *RcvDescriptorBlock; |
| 4198 | struct sxg_cmd *RingDescriptorCmd; |
| 4199 | struct sxg_rcv_ring *RingZero = &adapter->RcvRings[0]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4200 | |
| 4201 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FilBlk", |
| 4202 | adapter, adapter->RcvBuffersOnCard, |
| 4203 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4204 | |
| 4205 | ASSERT(RcvDescriptorBlockHdr); |
| 4206 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4207 | /* |
| 4208 | * If we don't have the resources to fill the descriptor block, |
| 4209 | * return failure |
| 4210 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4211 | if ((adapter->FreeRcvBufferCount < SXG_RCV_DESCRIPTORS_PER_BLOCK) || |
| 4212 | SXG_RING_FULL(RcvRingInfo)) { |
| 4213 | adapter->Stats.NoMem++; |
| 4214 | return (STATUS_FAILURE); |
| 4215 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4216 | /* Get a ring descriptor command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4217 | SXG_GET_CMD(RingZero, |
| 4218 | RcvRingInfo, RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4219 | ASSERT(RingDescriptorCmd); |
| 4220 | RcvDescriptorBlockHdr->State = SXG_BUFFER_ONCARD; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4221 | RcvDescriptorBlock = (struct sxg_rcv_descriptor_block *) |
| 4222 | RcvDescriptorBlockHdr->VirtualAddress; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4223 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4224 | /* Fill in the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4225 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; i++) { |
| 4226 | SXG_GET_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 4227 | ASSERT(RcvDataBufferHdr); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4228 | // ASSERT(RcvDataBufferHdr->SxgDumbRcvPacket); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4229 | if (!RcvDataBufferHdr->SxgDumbRcvPacket) { |
| 4230 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, |
| 4231 | adapter->ReceiveBufferSize); |
| 4232 | if(RcvDataBufferHdr->skb) |
| 4233 | RcvDataBufferHdr->SxgDumbRcvPacket = |
| 4234 | RcvDataBufferHdr->skb; |
| 4235 | else |
| 4236 | goto no_memory; |
| 4237 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4238 | SXG_REINIATIALIZE_PACKET(RcvDataBufferHdr->SxgDumbRcvPacket); |
| 4239 | RcvDataBufferHdr->State = SXG_BUFFER_ONCARD; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4240 | RcvDescriptorBlock->Descriptors[i].VirtualAddress = |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4241 | (void *)RcvDataBufferHdr; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 4242 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4243 | RcvDescriptorBlock->Descriptors[i].PhysicalAddress = |
| 4244 | RcvDataBufferHdr->PhysicalAddress; |
| 4245 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4246 | /* Add the descriptor block to receive descriptor ring 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4247 | RingDescriptorCmd->Sgl = RcvDescriptorBlockHdr->PhysicalAddress; |
| 4248 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4249 | /* |
| 4250 | * RcvBuffersOnCard is not protected via the receive lock (see |
| 4251 | * sxg_process_event_queue) We don't want to grap a lock every time a |
| 4252 | * buffer is returned to us, so we use atomic interlocked functions |
| 4253 | * instead. |
| 4254 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4255 | adapter->RcvBuffersOnCard += SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 4256 | |
| 4257 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DscBlk", |
| 4258 | RcvDescriptorBlockHdr, |
| 4259 | RingDescriptorCmd, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4260 | |
| 4261 | WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 1, true); |
| 4262 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlk", |
| 4263 | adapter, adapter->RcvBuffersOnCard, |
| 4264 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4265 | return (STATUS_SUCCESS); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4266 | no_memory: |
Mithlesh Thukral | b9d1081 | 2009-02-18 18:52:18 +0530 | [diff] [blame] | 4267 | for (; i >= 0 ; i--) { |
| 4268 | if (RcvDescriptorBlock->Descriptors[i].VirtualAddress) { |
| 4269 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) |
| 4270 | RcvDescriptorBlock->Descriptors[i]. |
| 4271 | VirtualAddress; |
| 4272 | RcvDescriptorBlock->Descriptors[i].PhysicalAddress = |
| 4273 | (dma_addr_t)NULL; |
| 4274 | RcvDescriptorBlock->Descriptors[i].VirtualAddress=NULL; |
| 4275 | } |
| 4276 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 4277 | } |
| 4278 | RcvDescriptorBlockHdr->State = SXG_BUFFER_FREE; |
| 4279 | SXG_RETURN_CMD(RingZero, RcvRingInfo, RingDescriptorCmd, |
| 4280 | RcvDescriptorBlockHdr); |
| 4281 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4282 | return (-ENOMEM); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4283 | } |
| 4284 | |
| 4285 | /* |
| 4286 | * sxg_stock_rcv_buffers - Stock the card with receive buffers |
| 4287 | * |
| 4288 | * Arguments - |
| 4289 | * adapter - A pointer to our adapter structure |
| 4290 | * |
| 4291 | * Return |
| 4292 | * None |
| 4293 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4294 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4295 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4296 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4297 | int sxg_rcv_data_buffers = SXG_RCV_DATA_BUFFERS; |
| 4298 | int sxg_min_rcv_data_buffers = SXG_MIN_RCV_DATA_BUFFERS; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4299 | |
| 4300 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "StockBuf", |
| 4301 | adapter, adapter->RcvBuffersOnCard, |
| 4302 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4303 | /* |
| 4304 | * First, see if we've got less than our minimum threshold of |
| 4305 | * receive buffers, there isn't an allocation in progress, and |
| 4306 | * we haven't exceeded our maximum.. get another block of buffers |
| 4307 | * None of this needs to be SMP safe. It's round numbers. |
| 4308 | */ |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4309 | if (adapter->JumboEnabled == TRUE) |
| 4310 | sxg_min_rcv_data_buffers = SXG_MIN_JUMBO_RCV_DATA_BUFFERS; |
| 4311 | if ((adapter->FreeRcvBufferCount < sxg_min_rcv_data_buffers) && |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4312 | (adapter->AllRcvBlockCount < SXG_MAX_RCV_BLOCKS) && |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4313 | (atomic_read(&adapter->pending_allocations) == 0)) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4314 | sxg_allocate_buffer_memory(adapter, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 4315 | SXG_RCV_BLOCK_SIZE |
| 4316 | (SXG_RCV_DATA_HDR_SIZE), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4317 | SXG_BUFFER_TYPE_RCV); |
| 4318 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4319 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4320 | spin_lock(&adapter->RcvQLock); |
Mithlesh Thukral | 7c66b14 | 2009-02-06 19:30:40 +0530 | [diff] [blame] | 4321 | if (adapter->JumboEnabled) |
| 4322 | sxg_rcv_data_buffers = SXG_JUMBO_RCV_DATA_BUFFERS; |
| 4323 | while (adapter->RcvBuffersOnCard < sxg_rcv_data_buffers) { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4324 | struct list_entry *_ple; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4325 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4326 | /* Get a descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4327 | RcvDescriptorBlockHdr = NULL; |
| 4328 | if (adapter->FreeRcvBlockCount) { |
| 4329 | _ple = RemoveHeadList(&adapter->FreeRcvBlocks); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4330 | RcvDescriptorBlockHdr = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4331 | container_of(_ple, struct sxg_rcv_descriptor_block_hdr, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4332 | FreeList); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4333 | adapter->FreeRcvBlockCount--; |
| 4334 | RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY; |
| 4335 | } |
| 4336 | |
| 4337 | if (RcvDescriptorBlockHdr == NULL) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4338 | /* Bail out.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4339 | adapter->Stats.NoMem++; |
| 4340 | break; |
| 4341 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4342 | /* Fill in the descriptor block and give it to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4343 | if (sxg_fill_descriptor_block(adapter, RcvDescriptorBlockHdr) == |
| 4344 | STATUS_FAILURE) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4345 | /* Free the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4346 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 4347 | RcvDescriptorBlockHdr); |
| 4348 | break; |
| 4349 | } |
| 4350 | } |
| 4351 | spin_unlock(&adapter->RcvQLock); |
| 4352 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlks", |
| 4353 | adapter, adapter->RcvBuffersOnCard, |
| 4354 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 4355 | } |
| 4356 | |
| 4357 | /* |
| 4358 | * sxg_complete_descriptor_blocks - Return descriptor blocks that have been |
| 4359 | * completed by the microcode |
| 4360 | * |
| 4361 | * Arguments - |
| 4362 | * adapter - A pointer to our adapter structure |
| 4363 | * Index - Where the microcode is up to |
| 4364 | * |
| 4365 | * Return |
| 4366 | * None |
| 4367 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 4368 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 4369 | unsigned char Index) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4370 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 4371 | struct sxg_rcv_ring *RingZero = &adapter->RcvRings[0]; |
| 4372 | struct sxg_ring_info *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 4373 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
| 4374 | struct sxg_cmd *RingDescriptorCmd; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4375 | |
| 4376 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlks", |
| 4377 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4378 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4379 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4380 | spin_lock(&adapter->RcvQLock); |
| 4381 | ASSERT(Index != RcvRingInfo->Tail); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4382 | while (sxg_ring_get_forward_diff(RcvRingInfo, Index, |
| 4383 | RcvRingInfo->Tail) > 3) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4384 | /* |
| 4385 | * Locate the current Cmd (ring descriptor entry), and |
| 4386 | * associated receive descriptor block, and advance |
| 4387 | * the tail |
| 4388 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4389 | SXG_RETURN_CMD(RingZero, |
| 4390 | RcvRingInfo, |
| 4391 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4392 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlk", |
| 4393 | RcvRingInfo->Head, RcvRingInfo->Tail, |
| 4394 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 4395 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 4396 | /* Clear the SGL field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4397 | RingDescriptorCmd->Sgl = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 4398 | /* |
| 4399 | * Attempt to refill it and hand it right back to the |
| 4400 | * card. If we fail to refill it, free the descriptor block |
| 4401 | * header. The card will be restocked later via the |
| 4402 | * RcvBuffersOnCard test |
| 4403 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4404 | if (sxg_fill_descriptor_block(adapter, |
| 4405 | RcvDescriptorBlockHdr) == STATUS_FAILURE) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4406 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 4407 | RcvDescriptorBlockHdr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4408 | } |
| 4409 | spin_unlock(&adapter->RcvQLock); |
| 4410 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XCRBlks", |
| 4411 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 4412 | } |
| 4413 | |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4414 | /* |
| 4415 | * Read the statistics which the card has been maintaining. |
| 4416 | */ |
| 4417 | void sxg_collect_statistics(struct adapter_t *adapter) |
| 4418 | { |
| 4419 | if(adapter->ucode_stats) |
Mithlesh Thukral | 54aed11 | 2009-01-19 20:27:17 +0530 | [diff] [blame] | 4420 | WRITE_REG64(adapter, adapter->UcodeRegs[0].GetUcodeStats, |
| 4421 | adapter->pucode_stats, 0); |
Mithlesh Thukral | 6a2946b | 2009-01-19 20:24:30 +0530 | [diff] [blame] | 4422 | adapter->stats.rx_fifo_errors = adapter->ucode_stats->ERDrops; |
| 4423 | adapter->stats.rx_over_errors = adapter->ucode_stats->NBDrops; |
| 4424 | adapter->stats.tx_fifo_errors = adapter->ucode_stats->XDrops; |
| 4425 | } |
| 4426 | |
| 4427 | static struct net_device_stats *sxg_get_stats(struct net_device * dev) |
| 4428 | { |
| 4429 | struct adapter_t *adapter = netdev_priv(dev); |
| 4430 | |
| 4431 | sxg_collect_statistics(adapter); |
| 4432 | return (&adapter->stats); |
Mithlesh Thukral | d9d578b | 2009-01-19 20:23:22 +0530 | [diff] [blame] | 4433 | } |
| 4434 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4435 | static struct pci_driver sxg_driver = { |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame] | 4436 | .name = sxg_driver_name, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4437 | .id_table = sxg_pci_tbl, |
| 4438 | .probe = sxg_entry_probe, |
| 4439 | .remove = sxg_entry_remove, |
| 4440 | #if SXG_POWER_MANAGEMENT_ENABLED |
| 4441 | .suspend = sxgpm_suspend, |
| 4442 | .resume = sxgpm_resume, |
| 4443 | #endif |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 4444 | /* .shutdown = slic_shutdown, MOOK_INVESTIGATE */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 4445 | }; |
| 4446 | |
| 4447 | static int __init sxg_module_init(void) |
| 4448 | { |
| 4449 | sxg_init_driver(); |
| 4450 | |
| 4451 | if (debug >= 0) |
| 4452 | sxg_debug = debug; |
| 4453 | |
| 4454 | return pci_register_driver(&sxg_driver); |
| 4455 | } |
| 4456 | |
| 4457 | static void __exit sxg_module_cleanup(void) |
| 4458 | { |
| 4459 | pci_unregister_driver(&sxg_driver); |
| 4460 | } |
| 4461 | |
| 4462 | module_init(sxg_module_init); |
| 4463 | module_exit(sxg_module_cleanup); |