blob: f660553c6c483f2564a536a02aa5da05b79ee885 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
20
21#include "core.h"
22#include "mac.h"
23#include "htc.h"
24#include "hif.h"
25#include "wmi.h"
26#include "bmi.h"
27#include "debug.h"
28#include "htt.h"
Kalle Valo43d2a302014-09-10 18:23:30 +030029#include "testmode.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030030
31unsigned int ath10k_debug_mask;
32static bool uart_print;
33static unsigned int ath10k_p2p;
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020034static bool skip_otp;
35
Kalle Valo5e3dd152013-06-12 20:52:10 +030036module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
37module_param(uart_print, bool, 0644);
38module_param_named(p2p, ath10k_p2p, uint, 0644);
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020039module_param(skip_otp, bool, 0644);
40
Kalle Valo5e3dd152013-06-12 20:52:10 +030041MODULE_PARM_DESC(debug_mask, "Debugging mask");
42MODULE_PARM_DESC(uart_print, "Uart target debugging");
43MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
Rajkumar Manoharan8868b122014-11-17 16:44:14 +020044MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
Kalle Valo5e3dd152013-06-12 20:52:10 +030045
46static const struct ath10k_hw_params ath10k_hw_params_list[] = {
47 {
Kalle Valo5e3dd152013-06-12 20:52:10 +030048 .id = QCA988X_HW_2_0_VERSION,
49 .name = "qca988x hw2.0",
50 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
51 .fw = {
52 .dir = QCA988X_HW_2_0_FW_DIR,
53 .fw = QCA988X_HW_2_0_FW_FILE,
54 .otp = QCA988X_HW_2_0_OTP_FILE,
55 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
56 },
57 },
58};
59
60static void ath10k_send_suspend_complete(struct ath10k *ar)
61{
Michal Kazior7aa7a722014-08-25 12:09:38 +020062 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030063
Marek Puzyniak9042e172014-02-10 17:14:23 +010064 complete(&ar->target_suspend);
Kalle Valo5e3dd152013-06-12 20:52:10 +030065}
66
Kalle Valo5e3dd152013-06-12 20:52:10 +030067static int ath10k_init_configure_target(struct ath10k *ar)
68{
69 u32 param_host;
70 int ret;
71
72 /* tell target which HTC version it is used*/
73 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
74 HTC_PROTOCOL_VERSION);
75 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020076 ath10k_err(ar, "settings HTC version failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030077 return ret;
78 }
79
80 /* set the firmware mode to STA/IBSS/AP */
81 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
82 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +020083 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030084 return ret;
85 }
86
87 /* TODO following parameters need to be re-visited. */
88 /* num_device */
89 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
90 /* Firmware mode */
91 /* FIXME: Why FW_MODE_AP ??.*/
92 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
93 /* mac_addr_method */
94 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
95 /* firmware_bridge */
96 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
97 /* fwsubmode */
98 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
99
100 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
101 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200102 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300103 return ret;
104 }
105
106 /* We do all byte-swapping on the host */
107 ret = ath10k_bmi_write32(ar, hi_be, 0);
108 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200109 ath10k_err(ar, "setting host CPU BE mode failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300110 return ret;
111 }
112
113 /* FW descriptor/Data swap flags */
114 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
115
116 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200117 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300118 return ret;
119 }
120
121 return 0;
122}
123
124static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
125 const char *dir,
126 const char *file)
127{
128 char filename[100];
129 const struct firmware *fw;
130 int ret;
131
132 if (file == NULL)
133 return ERR_PTR(-ENOENT);
134
135 if (dir == NULL)
136 dir = ".";
137
138 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
139 ret = request_firmware(&fw, filename, ar->dev);
140 if (ret)
141 return ERR_PTR(ret);
142
143 return fw;
144}
145
Kalle Valoa58227e2014-10-13 09:40:59 +0300146static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
147 size_t data_len)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300148{
149 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
150 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
151 u32 board_ext_data_addr;
152 int ret;
153
154 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
155 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200156 ath10k_err(ar, "could not read board ext data addr (%d)\n",
157 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300158 return ret;
159 }
160
Michal Kazior7aa7a722014-08-25 12:09:38 +0200161 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valoeffea962013-09-08 17:55:44 +0300162 "boot push board extended data addr 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300163 board_ext_data_addr);
164
165 if (board_ext_data_addr == 0)
166 return 0;
167
Kalle Valoa58227e2014-10-13 09:40:59 +0300168 if (data_len != (board_data_size + board_ext_data_size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200169 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
Kalle Valoa58227e2014-10-13 09:40:59 +0300170 data_len, board_data_size, board_ext_data_size);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300171 return -EINVAL;
172 }
173
174 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
Kalle Valoa58227e2014-10-13 09:40:59 +0300175 data + board_data_size,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300176 board_ext_data_size);
177 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200178 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300179 return ret;
180 }
181
182 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
183 (board_ext_data_size << 16) | 1);
184 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200185 ath10k_err(ar, "could not write board ext data bit (%d)\n",
186 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300187 return ret;
188 }
189
190 return 0;
191}
192
Kalle Valoa58227e2014-10-13 09:40:59 +0300193static int ath10k_download_board_data(struct ath10k *ar, const void *data,
194 size_t data_len)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300195{
196 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
197 u32 address;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300198 int ret;
199
Kalle Valoa58227e2014-10-13 09:40:59 +0300200 ret = ath10k_push_board_ext_data(ar, data, data_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300201 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200202 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300203 goto exit;
204 }
205
206 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
207 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200208 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300209 goto exit;
210 }
211
Kalle Valoa58227e2014-10-13 09:40:59 +0300212 ret = ath10k_bmi_write_memory(ar, address, data,
Kalle Valo958df3a2013-09-27 19:55:01 +0300213 min_t(u32, board_data_size,
Kalle Valoa58227e2014-10-13 09:40:59 +0300214 data_len));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300215 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200216 ath10k_err(ar, "could not write board data (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300217 goto exit;
218 }
219
220 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
221 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200222 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300223 goto exit;
224 }
225
226exit:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300227 return ret;
228}
229
Kalle Valoa58227e2014-10-13 09:40:59 +0300230static int ath10k_download_cal_file(struct ath10k *ar)
231{
232 int ret;
233
234 if (!ar->cal_file)
235 return -ENOENT;
236
237 if (IS_ERR(ar->cal_file))
238 return PTR_ERR(ar->cal_file);
239
240 ret = ath10k_download_board_data(ar, ar->cal_file->data,
241 ar->cal_file->size);
242 if (ret) {
243 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
244 return ret;
245 }
246
247 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
248
249 return 0;
250}
251
Kalle Valo5e3dd152013-06-12 20:52:10 +0300252static int ath10k_download_and_run_otp(struct ath10k *ar)
253{
Kalle Valod6d4a582014-03-11 17:33:19 +0200254 u32 result, address = ar->hw_params.patch_load_addr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300255 int ret;
256
Kalle Valoa58227e2014-10-13 09:40:59 +0300257 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
Kalle Valo83091552014-10-13 09:40:53 +0300258 if (ret) {
259 ath10k_err(ar, "failed to download board data: %d\n", ret);
260 return ret;
261 }
262
Kalle Valo5e3dd152013-06-12 20:52:10 +0300263 /* OTP is optional */
264
Kalle Valo7f06ea12014-03-11 17:33:28 +0200265 if (!ar->otp_data || !ar->otp_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200266 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
Ben Greear36a8f412014-03-24 12:20:42 -0700267 ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300268 return 0;
Kalle Valo7f06ea12014-03-11 17:33:28 +0200269 }
270
Michal Kazior7aa7a722014-08-25 12:09:38 +0200271 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
Kalle Valo7f06ea12014-03-11 17:33:28 +0200272 address, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300273
Kalle Valo958df3a2013-09-27 19:55:01 +0300274 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300275 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200276 ath10k_err(ar, "could not write otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200277 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300278 }
279
Kalle Valod6d4a582014-03-11 17:33:19 +0200280 ret = ath10k_bmi_execute(ar, address, 0, &result);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300281 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200282 ath10k_err(ar, "could not execute otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200283 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300284 }
285
Michal Kazior7aa7a722014-08-25 12:09:38 +0200286 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200287
Rajkumar Manoharan8868b122014-11-17 16:44:14 +0200288 if (!skip_otp && result != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200289 ath10k_err(ar, "otp calibration failed: %d", result);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200290 return -EINVAL;
291 }
292
293 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300294}
295
Kalle Valo43d2a302014-09-10 18:23:30 +0300296static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300297{
Kalle Valo43d2a302014-09-10 18:23:30 +0300298 u32 address, data_len;
299 const char *mode_name;
300 const void *data;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300301 int ret;
302
Kalle Valo5e3dd152013-06-12 20:52:10 +0300303 address = ar->hw_params.patch_load_addr;
304
Kalle Valo43d2a302014-09-10 18:23:30 +0300305 switch (mode) {
306 case ATH10K_FIRMWARE_MODE_NORMAL:
307 data = ar->firmware_data;
308 data_len = ar->firmware_len;
309 mode_name = "normal";
310 break;
311 case ATH10K_FIRMWARE_MODE_UTF:
312 data = ar->testmode.utf->data;
313 data_len = ar->testmode.utf->size;
314 mode_name = "utf";
315 break;
316 default:
317 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
318 return -EINVAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300319 }
320
Kalle Valo43d2a302014-09-10 18:23:30 +0300321 ath10k_dbg(ar, ATH10K_DBG_BOOT,
322 "boot uploading firmware image %p len %d mode %s\n",
323 data, data_len, mode_name);
324
325 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
326 if (ret) {
327 ath10k_err(ar, "failed to download %s firmware: %d\n",
328 mode_name, ret);
329 return ret;
330 }
331
Michal Kazior29385052013-07-16 09:38:58 +0200332 return ret;
333}
334
335static void ath10k_core_free_firmware_files(struct ath10k *ar)
336{
Kalle Valo36527912013-09-27 19:54:55 +0300337 if (ar->board && !IS_ERR(ar->board))
338 release_firmware(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200339
340 if (ar->otp && !IS_ERR(ar->otp))
341 release_firmware(ar->otp);
342
343 if (ar->firmware && !IS_ERR(ar->firmware))
344 release_firmware(ar->firmware);
345
Kalle Valoa58227e2014-10-13 09:40:59 +0300346 if (ar->cal_file && !IS_ERR(ar->cal_file))
347 release_firmware(ar->cal_file);
348
Kalle Valo36527912013-09-27 19:54:55 +0300349 ar->board = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300350 ar->board_data = NULL;
351 ar->board_len = 0;
352
Michal Kazior29385052013-07-16 09:38:58 +0200353 ar->otp = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300354 ar->otp_data = NULL;
355 ar->otp_len = 0;
356
Michal Kazior29385052013-07-16 09:38:58 +0200357 ar->firmware = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300358 ar->firmware_data = NULL;
359 ar->firmware_len = 0;
Kalle Valoa58227e2014-10-13 09:40:59 +0300360
361 ar->cal_file = NULL;
362}
363
364static int ath10k_fetch_cal_file(struct ath10k *ar)
365{
366 char filename[100];
367
368 /* cal-<bus>-<id>.bin */
369 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
370 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
371
372 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
373 if (IS_ERR(ar->cal_file))
374 /* calibration file is optional, don't print any warnings */
375 return PTR_ERR(ar->cal_file);
376
377 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
378 ATH10K_FW_DIR, filename);
379
380 return 0;
Michal Kazior29385052013-07-16 09:38:58 +0200381}
382
Kalle Valo1a222432013-09-27 19:55:07 +0300383static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
Michal Kazior29385052013-07-16 09:38:58 +0200384{
385 int ret = 0;
386
387 if (ar->hw_params.fw.fw == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200388 ath10k_err(ar, "firmware file not defined\n");
Michal Kazior29385052013-07-16 09:38:58 +0200389 return -EINVAL;
390 }
391
392 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200393 ath10k_err(ar, "board data file not defined");
Michal Kazior29385052013-07-16 09:38:58 +0200394 return -EINVAL;
395 }
396
Kalle Valo36527912013-09-27 19:54:55 +0300397 ar->board = ath10k_fetch_fw_file(ar,
398 ar->hw_params.fw.dir,
399 ar->hw_params.fw.board);
400 if (IS_ERR(ar->board)) {
401 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200402 ath10k_err(ar, "could not fetch board data (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200403 goto err;
404 }
405
Kalle Valo958df3a2013-09-27 19:55:01 +0300406 ar->board_data = ar->board->data;
407 ar->board_len = ar->board->size;
408
Michal Kazior29385052013-07-16 09:38:58 +0200409 ar->firmware = ath10k_fetch_fw_file(ar,
410 ar->hw_params.fw.dir,
411 ar->hw_params.fw.fw);
412 if (IS_ERR(ar->firmware)) {
413 ret = PTR_ERR(ar->firmware);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200414 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200415 goto err;
416 }
417
Kalle Valo958df3a2013-09-27 19:55:01 +0300418 ar->firmware_data = ar->firmware->data;
419 ar->firmware_len = ar->firmware->size;
420
Michal Kazior29385052013-07-16 09:38:58 +0200421 /* OTP may be undefined. If so, don't fetch it at all */
422 if (ar->hw_params.fw.otp == NULL)
423 return 0;
424
425 ar->otp = ath10k_fetch_fw_file(ar,
426 ar->hw_params.fw.dir,
427 ar->hw_params.fw.otp);
428 if (IS_ERR(ar->otp)) {
429 ret = PTR_ERR(ar->otp);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200430 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200431 goto err;
432 }
433
Kalle Valo958df3a2013-09-27 19:55:01 +0300434 ar->otp_data = ar->otp->data;
435 ar->otp_len = ar->otp->size;
436
Michal Kazior29385052013-07-16 09:38:58 +0200437 return 0;
438
439err:
440 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300441 return ret;
442}
443
Kalle Valo1a222432013-09-27 19:55:07 +0300444static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
445{
446 size_t magic_len, len, ie_len;
447 int ie_id, i, index, bit, ret;
448 struct ath10k_fw_ie *hdr;
449 const u8 *data;
450 __le32 *timestamp;
451
452 /* first fetch the firmware file (firmware-*.bin) */
453 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
454 if (IS_ERR(ar->firmware)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200455 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
Ben Greear53c02282014-03-24 12:20:41 -0700456 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
Kalle Valo1a222432013-09-27 19:55:07 +0300457 return PTR_ERR(ar->firmware);
458 }
459
460 data = ar->firmware->data;
461 len = ar->firmware->size;
462
463 /* magic also includes the null byte, check that as well */
464 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
465
466 if (len < magic_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200467 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
Ben Greear53c02282014-03-24 12:20:41 -0700468 ar->hw_params.fw.dir, name, len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200469 ret = -EINVAL;
470 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300471 }
472
473 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200474 ath10k_err(ar, "invalid firmware magic\n");
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200475 ret = -EINVAL;
476 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300477 }
478
479 /* jump over the padding */
480 magic_len = ALIGN(magic_len, 4);
481
482 len -= magic_len;
483 data += magic_len;
484
485 /* loop elements */
486 while (len > sizeof(struct ath10k_fw_ie)) {
487 hdr = (struct ath10k_fw_ie *)data;
488
489 ie_id = le32_to_cpu(hdr->id);
490 ie_len = le32_to_cpu(hdr->len);
491
492 len -= sizeof(*hdr);
493 data += sizeof(*hdr);
494
495 if (len < ie_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200496 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300497 ie_id, len, ie_len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200498 ret = -EINVAL;
499 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300500 }
501
502 switch (ie_id) {
503 case ATH10K_FW_IE_FW_VERSION:
504 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
505 break;
506
507 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
508 ar->hw->wiphy->fw_version[ie_len] = '\0';
509
Michal Kazior7aa7a722014-08-25 12:09:38 +0200510 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300511 "found fw version %s\n",
512 ar->hw->wiphy->fw_version);
513 break;
514 case ATH10K_FW_IE_TIMESTAMP:
515 if (ie_len != sizeof(u32))
516 break;
517
518 timestamp = (__le32 *)data;
519
Michal Kazior7aa7a722014-08-25 12:09:38 +0200520 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300521 le32_to_cpup(timestamp));
522 break;
523 case ATH10K_FW_IE_FEATURES:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200524 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300525 "found firmware features ie (%zd B)\n",
526 ie_len);
527
528 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
529 index = i / 8;
530 bit = i % 8;
531
532 if (index == ie_len)
533 break;
534
Ben Greearf591a1a2014-02-04 19:51:38 +0200535 if (data[index] & (1 << bit)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200536 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Ben Greearf591a1a2014-02-04 19:51:38 +0200537 "Enabling feature bit: %i\n",
538 i);
Kalle Valo1a222432013-09-27 19:55:07 +0300539 __set_bit(i, ar->fw_features);
Ben Greearf591a1a2014-02-04 19:51:38 +0200540 }
Kalle Valo1a222432013-09-27 19:55:07 +0300541 }
542
Michal Kazior7aa7a722014-08-25 12:09:38 +0200543 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
Kalle Valo1a222432013-09-27 19:55:07 +0300544 ar->fw_features,
545 sizeof(ar->fw_features));
546 break;
547 case ATH10K_FW_IE_FW_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200548 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300549 "found fw image ie (%zd B)\n",
550 ie_len);
551
552 ar->firmware_data = data;
553 ar->firmware_len = ie_len;
554
555 break;
556 case ATH10K_FW_IE_OTP_IMAGE:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200557 ath10k_dbg(ar, ATH10K_DBG_BOOT,
Kalle Valo1a222432013-09-27 19:55:07 +0300558 "found otp image ie (%zd B)\n",
559 ie_len);
560
561 ar->otp_data = data;
562 ar->otp_len = ie_len;
563
564 break;
565 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200566 ath10k_warn(ar, "Unknown FW IE: %u\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300567 le32_to_cpu(hdr->id));
568 break;
569 }
570
571 /* jump over the padding */
572 ie_len = ALIGN(ie_len, 4);
573
574 len -= ie_len;
575 data += ie_len;
Fengguang Wue05634e2013-10-08 21:48:15 +0300576 }
Kalle Valo1a222432013-09-27 19:55:07 +0300577
578 if (!ar->firmware_data || !ar->firmware_len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200579 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
Ben Greear53c02282014-03-24 12:20:41 -0700580 ar->hw_params.fw.dir, name);
Kalle Valo1a222432013-09-27 19:55:07 +0300581 ret = -ENOMEDIUM;
582 goto err;
583 }
584
Michal Kazior24c88f72014-07-25 13:32:17 +0200585 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
586 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200587 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
Michal Kazior24c88f72014-07-25 13:32:17 +0200588 ret = -EINVAL;
589 goto err;
590 }
591
Kalle Valo1a222432013-09-27 19:55:07 +0300592 /* now fetch the board file */
593 if (ar->hw_params.fw.board == NULL) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200594 ath10k_err(ar, "board data file not defined");
Kalle Valo1a222432013-09-27 19:55:07 +0300595 ret = -EINVAL;
596 goto err;
597 }
598
599 ar->board = ath10k_fetch_fw_file(ar,
600 ar->hw_params.fw.dir,
601 ar->hw_params.fw.board);
602 if (IS_ERR(ar->board)) {
603 ret = PTR_ERR(ar->board);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200604 ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
Ben Greear53c02282014-03-24 12:20:41 -0700605 ar->hw_params.fw.dir, ar->hw_params.fw.board,
606 ret);
Kalle Valo1a222432013-09-27 19:55:07 +0300607 goto err;
608 }
609
610 ar->board_data = ar->board->data;
611 ar->board_len = ar->board->size;
612
613 return 0;
614
615err:
616 ath10k_core_free_firmware_files(ar);
617 return ret;
618}
619
620static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
621{
622 int ret;
623
Kalle Valoa58227e2014-10-13 09:40:59 +0300624 /* calibration file is optional, don't check for any errors */
625 ath10k_fetch_cal_file(ar);
626
Michal Kazior24c88f72014-07-25 13:32:17 +0200627 ar->fw_api = 3;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200628 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Michal Kazior24c88f72014-07-25 13:32:17 +0200629
630 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
631 if (ret == 0)
632 goto success;
633
Ben Greear53c02282014-03-24 12:20:41 -0700634 ar->fw_api = 2;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200635 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Ben Greear53c02282014-03-24 12:20:41 -0700636
Kalle Valo1a222432013-09-27 19:55:07 +0300637 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
Ben Greear53c02282014-03-24 12:20:41 -0700638 if (ret == 0)
639 goto success;
640
641 ar->fw_api = 1;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200642 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300643
644 ret = ath10k_core_fetch_firmware_api_1(ar);
645 if (ret)
646 return ret;
647
Ben Greear53c02282014-03-24 12:20:41 -0700648success:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200649 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300650
651 return 0;
652}
653
Kalle Valo83091552014-10-13 09:40:53 +0300654static int ath10k_download_cal_data(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300655{
656 int ret;
657
Kalle Valoa58227e2014-10-13 09:40:59 +0300658 ret = ath10k_download_cal_file(ar);
659 if (ret == 0) {
660 ar->cal_mode = ATH10K_CAL_MODE_FILE;
661 goto done;
662 }
663
664 ath10k_dbg(ar, ATH10K_DBG_BOOT,
665 "boot did not find a calibration file, try OTP next: %d\n",
666 ret);
667
Kalle Valo5e3dd152013-06-12 20:52:10 +0300668 ret = ath10k_download_and_run_otp(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700669 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200670 ath10k_err(ar, "failed to run otp: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300671 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700672 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300673
Kalle Valoa58227e2014-10-13 09:40:59 +0300674 ar->cal_mode = ATH10K_CAL_MODE_OTP;
675
676done:
677 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
678 ath10k_cal_mode_str(ar->cal_mode));
679 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300680}
681
682static int ath10k_init_uart(struct ath10k *ar)
683{
684 int ret;
685
686 /*
687 * Explicitly setting UART prints to zero as target turns it on
688 * based on scratch registers.
689 */
690 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
691 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200692 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300693 return ret;
694 }
695
Kalle Valoc8c39af2013-11-20 10:00:41 +0200696 if (!uart_print)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300697 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300698
699 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
700 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200701 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300702 return ret;
703 }
704
705 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
706 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200707 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300708 return ret;
709 }
710
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200711 /* Set the UART baud rate to 19200. */
712 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
713 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200714 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200715 return ret;
716 }
717
Michal Kazior7aa7a722014-08-25 12:09:38 +0200718 ath10k_info(ar, "UART prints enabled\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300719 return 0;
720}
721
722static int ath10k_init_hw_params(struct ath10k *ar)
723{
724 const struct ath10k_hw_params *uninitialized_var(hw_params);
725 int i;
726
727 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
728 hw_params = &ath10k_hw_params_list[i];
729
730 if (hw_params->id == ar->target_version)
731 break;
732 }
733
734 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200735 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300736 ar->target_version);
737 return -EINVAL;
738 }
739
740 ar->hw_params = *hw_params;
741
Michal Kazior7aa7a722014-08-25 12:09:38 +0200742 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200743 ar->hw_params.name, ar->target_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300744
745 return 0;
746}
747
Michal Kazioraffd3212013-07-16 09:54:35 +0200748static void ath10k_core_restart(struct work_struct *work)
749{
750 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
751
Michal Kazior7962b0d2014-10-28 10:34:38 +0100752 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
753
754 /* Place a barrier to make sure the compiler doesn't reorder
755 * CRASH_FLUSH and calling other functions.
756 */
757 barrier();
758
759 ieee80211_stop_queues(ar->hw);
760 ath10k_drain_tx(ar);
761 complete_all(&ar->scan.started);
762 complete_all(&ar->scan.completed);
763 complete_all(&ar->scan.on_channel);
764 complete_all(&ar->offchan_tx_completed);
765 complete_all(&ar->install_key_done);
766 complete_all(&ar->vdev_setup_done);
767 wake_up(&ar->htt.empty_tx_wq);
768 wake_up(&ar->wmi.tx_credits_wq);
769 wake_up(&ar->peer_mapping_wq);
770
Michal Kazioraffd3212013-07-16 09:54:35 +0200771 mutex_lock(&ar->conf_mutex);
772
773 switch (ar->state) {
774 case ATH10K_STATE_ON:
Michal Kazioraffd3212013-07-16 09:54:35 +0200775 ar->state = ATH10K_STATE_RESTARTING;
Michal Kazior61e9aab2014-08-22 14:33:18 +0200776 ath10k_hif_stop(ar);
Michal Kazior5c81c7f2014-08-05 14:54:44 +0200777 ath10k_scan_finish(ar);
Michal Kazioraffd3212013-07-16 09:54:35 +0200778 ieee80211_restart_hw(ar->hw);
779 break;
780 case ATH10K_STATE_OFF:
Michal Kazior5e90de82013-10-16 16:46:05 +0300781 /* this can happen if driver is being unloaded
782 * or if the crash happens during FW probing */
Michal Kazior7aa7a722014-08-25 12:09:38 +0200783 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200784 break;
785 case ATH10K_STATE_RESTARTING:
Michal Kaziorc5058f52014-05-26 12:46:03 +0300786 /* hw restart might be requested from multiple places */
787 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200788 case ATH10K_STATE_RESTARTED:
789 ar->state = ATH10K_STATE_WEDGED;
790 /* fall through */
791 case ATH10K_STATE_WEDGED:
Michal Kazior7aa7a722014-08-25 12:09:38 +0200792 ath10k_warn(ar, "device is wedged, will not restart\n");
Michal Kazioraffd3212013-07-16 09:54:35 +0200793 break;
Kalle Valo43d2a302014-09-10 18:23:30 +0300794 case ATH10K_STATE_UTF:
795 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
796 break;
Michal Kazioraffd3212013-07-16 09:54:35 +0200797 }
798
799 mutex_unlock(&ar->conf_mutex);
800}
801
Kalle Valo43d2a302014-09-10 18:23:30 +0300802int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300803{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300804 int status;
805
Kalle Valo60631c52013-10-08 21:45:25 +0300806 lockdep_assert_held(&ar->conf_mutex);
807
Michal Kazior7962b0d2014-10-28 10:34:38 +0100808 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
809
Michal Kazior64d151d2013-07-16 09:38:53 +0200810 ath10k_bmi_start(ar);
811
Kalle Valo5e3dd152013-06-12 20:52:10 +0300812 if (ath10k_init_configure_target(ar)) {
813 status = -EINVAL;
814 goto err;
815 }
816
Kalle Valo83091552014-10-13 09:40:53 +0300817 status = ath10k_download_cal_data(ar);
818 if (status)
819 goto err;
820
821 status = ath10k_download_fw(ar, mode);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300822 if (status)
823 goto err;
824
825 status = ath10k_init_uart(ar);
826 if (status)
827 goto err;
828
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300829 ar->htc.htc_ops.target_send_suspend_complete =
830 ath10k_send_suspend_complete;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300831
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300832 status = ath10k_htc_init(ar);
833 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200834 ath10k_err(ar, "could not init HTC (%d)\n", status);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300835 goto err;
836 }
837
838 status = ath10k_bmi_done(ar);
839 if (status)
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300840 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300841
842 status = ath10k_wmi_attach(ar);
843 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200844 ath10k_err(ar, "WMI attach failed: %d\n", status);
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300845 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300846 }
847
Michal Kazior95bf21f2014-05-16 17:15:39 +0300848 status = ath10k_htt_init(ar);
849 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200850 ath10k_err(ar, "failed to init htt: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300851 goto err_wmi_detach;
852 }
853
854 status = ath10k_htt_tx_alloc(&ar->htt);
855 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200856 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300857 goto err_wmi_detach;
858 }
859
860 status = ath10k_htt_rx_alloc(&ar->htt);
861 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200862 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300863 goto err_htt_tx_detach;
864 }
865
Michal Kazior67e3c632013-11-08 08:05:18 +0100866 status = ath10k_hif_start(ar);
867 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200868 ath10k_err(ar, "could not start HIF: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300869 goto err_htt_rx_detach;
Michal Kazior67e3c632013-11-08 08:05:18 +0100870 }
871
872 status = ath10k_htc_wait_target(&ar->htc);
873 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200874 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
Michal Kazior67e3c632013-11-08 08:05:18 +0100875 goto err_hif_stop;
876 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300877
Kalle Valo43d2a302014-09-10 18:23:30 +0300878 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
879 status = ath10k_htt_connect(&ar->htt);
880 if (status) {
881 ath10k_err(ar, "failed to connect htt (%d)\n", status);
882 goto err_hif_stop;
883 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300884 }
885
Michal Kazior95bf21f2014-05-16 17:15:39 +0300886 status = ath10k_wmi_connect(ar);
887 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200888 ath10k_err(ar, "could not connect wmi: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300889 goto err_hif_stop;
890 }
891
892 status = ath10k_htc_start(&ar->htc);
893 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200894 ath10k_err(ar, "failed to start htc: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300895 goto err_hif_stop;
896 }
897
Kalle Valo43d2a302014-09-10 18:23:30 +0300898 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
899 status = ath10k_wmi_wait_for_service_ready(ar);
900 if (status <= 0) {
901 ath10k_warn(ar, "wmi service ready event not received");
902 status = -ETIMEDOUT;
903 goto err_hif_stop;
904 }
Michal Kazior95bf21f2014-05-16 17:15:39 +0300905 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300906
Michal Kazior7aa7a722014-08-25 12:09:38 +0200907 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
Kalle Valoc8c39af2013-11-20 10:00:41 +0200908 ar->hw->wiphy->fw_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300909
Kalle Valo5e3dd152013-06-12 20:52:10 +0300910 status = ath10k_wmi_cmd_init(ar);
911 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200912 ath10k_err(ar, "could not send WMI init command (%d)\n",
913 status);
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200914 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300915 }
916
917 status = ath10k_wmi_wait_for_unified_ready(ar);
918 if (status <= 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200919 ath10k_err(ar, "wmi unified ready event not received\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300920 status = -ETIMEDOUT;
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200921 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300922 }
923
Kalle Valo43d2a302014-09-10 18:23:30 +0300924 /* we don't care about HTT in UTF mode */
925 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
926 status = ath10k_htt_setup(&ar->htt);
927 if (status) {
928 ath10k_err(ar, "failed to setup htt: %d\n", status);
929 goto err_hif_stop;
930 }
Michal Kazior95bf21f2014-05-16 17:15:39 +0300931 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300932
Kalle Valodb66ea02013-09-03 11:44:03 +0300933 status = ath10k_debug_start(ar);
934 if (status)
Michal Kaziorb7967dc2014-08-07 11:03:31 +0200935 goto err_hif_stop;
Kalle Valodb66ea02013-09-03 11:44:03 +0300936
Bartosz Markowskidfa413d2014-06-02 21:19:45 +0300937 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
Ben Greear16c11172014-09-23 14:17:16 -0700938 ar->free_vdev_map = (1LL << TARGET_10X_NUM_VDEVS) - 1;
Bartosz Markowskidfa413d2014-06-02 21:19:45 +0300939 else
Ben Greear16c11172014-09-23 14:17:16 -0700940 ar->free_vdev_map = (1LL << TARGET_NUM_VDEVS) - 1;
Bartosz Markowskidfa413d2014-06-02 21:19:45 +0300941
Michal Kazior05791192013-10-16 15:44:45 +0300942 INIT_LIST_HEAD(&ar->arvifs);
Michal Kazior1a1b8a82013-07-16 09:38:55 +0200943
Michal Kaziordd30a362013-07-16 09:38:51 +0200944 return 0;
945
Michal Kazior67e3c632013-11-08 08:05:18 +0100946err_hif_stop:
947 ath10k_hif_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300948err_htt_rx_detach:
949 ath10k_htt_rx_free(&ar->htt);
950err_htt_tx_detach:
951 ath10k_htt_tx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200952err_wmi_detach:
953 ath10k_wmi_detach(ar);
954err:
955 return status;
956}
Michal Kazior818bdd12013-07-16 09:38:57 +0200957EXPORT_SYMBOL(ath10k_core_start);
Michal Kaziordd30a362013-07-16 09:38:51 +0200958
Marek Puzyniak00f54822014-02-10 17:14:24 +0100959int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
960{
961 int ret;
962
963 reinit_completion(&ar->target_suspend);
964
965 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
966 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200967 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
Marek Puzyniak00f54822014-02-10 17:14:24 +0100968 return ret;
969 }
970
971 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
972
973 if (ret == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200974 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
Marek Puzyniak00f54822014-02-10 17:14:24 +0100975 return -ETIMEDOUT;
976 }
977
978 return 0;
979}
980
Michal Kaziordd30a362013-07-16 09:38:51 +0200981void ath10k_core_stop(struct ath10k *ar)
982{
Kalle Valo60631c52013-10-08 21:45:25 +0300983 lockdep_assert_held(&ar->conf_mutex);
984
Marek Puzyniak00f54822014-02-10 17:14:24 +0100985 /* try to suspend target */
Kalle Valo43d2a302014-09-10 18:23:30 +0300986 if (ar->state != ATH10K_STATE_RESTARTING &&
987 ar->state != ATH10K_STATE_UTF)
Michal Kazior216a1832014-04-23 19:30:04 +0300988 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
989
Kalle Valodb66ea02013-09-03 11:44:03 +0300990 ath10k_debug_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300991 ath10k_hif_stop(ar);
992 ath10k_htt_tx_free(&ar->htt);
993 ath10k_htt_rx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200994 ath10k_wmi_detach(ar);
995}
Michal Kazior818bdd12013-07-16 09:38:57 +0200996EXPORT_SYMBOL(ath10k_core_stop);
997
998/* mac80211 manages fw/hw initialization through start/stop hooks. However in
999 * order to know what hw capabilities should be advertised to mac80211 it is
1000 * necessary to load the firmware (and tear it down immediately since start
1001 * hook will try to init it again) before registering */
1002static int ath10k_core_probe_fw(struct ath10k *ar)
1003{
Michal Kazior29385052013-07-16 09:38:58 +02001004 struct bmi_target_info target_info;
1005 int ret = 0;
Michal Kazior818bdd12013-07-16 09:38:57 +02001006
1007 ret = ath10k_hif_power_up(ar);
1008 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001009 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
Michal Kazior818bdd12013-07-16 09:38:57 +02001010 return ret;
1011 }
1012
Michal Kazior29385052013-07-16 09:38:58 +02001013 memset(&target_info, 0, sizeof(target_info));
1014 ret = ath10k_bmi_get_target_info(ar, &target_info);
1015 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001016 ath10k_err(ar, "could not get target info (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001017 ath10k_hif_power_down(ar);
1018 return ret;
1019 }
1020
1021 ar->target_version = target_info.version;
1022 ar->hw->wiphy->hw_version = target_info.version;
1023
1024 ret = ath10k_init_hw_params(ar);
1025 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001026 ath10k_err(ar, "could not get hw params (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001027 ath10k_hif_power_down(ar);
1028 return ret;
1029 }
1030
1031 ret = ath10k_core_fetch_firmware_files(ar);
1032 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001033 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001034 ath10k_hif_power_down(ar);
1035 return ret;
1036 }
1037
Kalle Valo60631c52013-10-08 21:45:25 +03001038 mutex_lock(&ar->conf_mutex);
1039
Kalle Valo43d2a302014-09-10 18:23:30 +03001040 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
Michal Kazior818bdd12013-07-16 09:38:57 +02001041 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001042 ath10k_err(ar, "could not init core (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +02001043 ath10k_core_free_firmware_files(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001044 ath10k_hif_power_down(ar);
Kalle Valo60631c52013-10-08 21:45:25 +03001045 mutex_unlock(&ar->conf_mutex);
Michal Kazior818bdd12013-07-16 09:38:57 +02001046 return ret;
1047 }
1048
Michal Kazior8079de02014-08-22 14:23:29 +02001049 ath10k_print_driver_info(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001050 ath10k_core_stop(ar);
Kalle Valo60631c52013-10-08 21:45:25 +03001051
1052 mutex_unlock(&ar->conf_mutex);
1053
Michal Kazior818bdd12013-07-16 09:38:57 +02001054 ath10k_hif_power_down(ar);
1055 return 0;
1056}
Michal Kaziordd30a362013-07-16 09:38:51 +02001057
Kalle Valoe01ae682013-09-01 11:22:14 +03001058static int ath10k_core_check_chip_id(struct ath10k *ar)
1059{
1060 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
1061
Michal Kazior7aa7a722014-08-25 12:09:38 +02001062 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
Kalle Valoeffea962013-09-08 17:55:44 +03001063 ar->chip_id, hw_revision);
1064
Kalle Valoe01ae682013-09-01 11:22:14 +03001065 /* Check that we are not using hw1.0 (some of them have same pci id
1066 * as hw2.0) before doing anything else as ath10k crashes horribly
1067 * due to missing hw1.0 workarounds. */
1068 switch (hw_revision) {
1069 case QCA988X_HW_1_0_CHIP_ID_REV:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001070 ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n");
Kalle Valoe01ae682013-09-01 11:22:14 +03001071 return -EOPNOTSUPP;
1072
1073 case QCA988X_HW_2_0_CHIP_ID_REV:
1074 /* known hardware revision, continue normally */
1075 return 0;
1076
1077 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001078 ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n",
Kalle Valoe01ae682013-09-01 11:22:14 +03001079 ar->chip_id);
1080 return 0;
1081 }
1082
1083 return 0;
1084}
1085
Michal Kazior6782cb62014-05-23 12:28:47 +02001086static void ath10k_core_register_work(struct work_struct *work)
Michal Kaziordd30a362013-07-16 09:38:51 +02001087{
Michal Kazior6782cb62014-05-23 12:28:47 +02001088 struct ath10k *ar = container_of(work, struct ath10k, register_work);
Michal Kaziordd30a362013-07-16 09:38:51 +02001089 int status;
1090
Michal Kazior818bdd12013-07-16 09:38:57 +02001091 status = ath10k_core_probe_fw(ar);
1092 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001093 ath10k_err(ar, "could not probe fw (%d)\n", status);
Michal Kazior6782cb62014-05-23 12:28:47 +02001094 goto err;
Michal Kazior818bdd12013-07-16 09:38:57 +02001095 }
Michal Kaziordd30a362013-07-16 09:38:51 +02001096
Kalle Valo5e3dd152013-06-12 20:52:10 +03001097 status = ath10k_mac_register(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +02001098 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001099 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
Michal Kazior29385052013-07-16 09:38:58 +02001100 goto err_release_fw;
Michal Kazior818bdd12013-07-16 09:38:57 +02001101 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001102
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001103 status = ath10k_debug_register(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001104 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001105 ath10k_err(ar, "unable to initialize debugfs\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001106 goto err_unregister_mac;
1107 }
1108
Simon Wunderlich855aed12014-08-02 09:12:54 +03001109 status = ath10k_spectral_create(ar);
1110 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001111 ath10k_err(ar, "failed to initialize spectral\n");
Simon Wunderlich855aed12014-08-02 09:12:54 +03001112 goto err_debug_destroy;
1113 }
1114
Michal Kazior6782cb62014-05-23 12:28:47 +02001115 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1116 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001117
Simon Wunderlich855aed12014-08-02 09:12:54 +03001118err_debug_destroy:
1119 ath10k_debug_destroy(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001120err_unregister_mac:
1121 ath10k_mac_unregister(ar);
Michal Kazior29385052013-07-16 09:38:58 +02001122err_release_fw:
1123 ath10k_core_free_firmware_files(ar);
Michal Kazior6782cb62014-05-23 12:28:47 +02001124err:
Michal Kaziora491a922014-07-14 16:07:29 +03001125 /* TODO: It's probably a good idea to release device from the driver
1126 * but calling device_release_driver() here will cause a deadlock.
1127 */
Michal Kazior6782cb62014-05-23 12:28:47 +02001128 return;
1129}
1130
1131int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1132{
1133 int status;
1134
1135 ar->chip_id = chip_id;
1136
1137 status = ath10k_core_check_chip_id(ar);
1138 if (status) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001139 ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id);
Michal Kazior6782cb62014-05-23 12:28:47 +02001140 return status;
1141 }
1142
1143 queue_work(ar->workqueue, &ar->register_work);
1144
1145 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001146}
1147EXPORT_SYMBOL(ath10k_core_register);
1148
1149void ath10k_core_unregister(struct ath10k *ar)
1150{
Michal Kazior6782cb62014-05-23 12:28:47 +02001151 cancel_work_sync(&ar->register_work);
1152
1153 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1154 return;
1155
Simon Wunderlich804eef1472014-08-12 17:12:17 +02001156 /* Stop spectral before unregistering from mac80211 to remove the
1157 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1158 * would be already be free'd recursively, leading to a double free.
1159 */
1160 ath10k_spectral_destroy(ar);
1161
Kalle Valo5e3dd152013-06-12 20:52:10 +03001162 /* We must unregister from mac80211 before we stop HTC and HIF.
1163 * Otherwise we will fail to submit commands to FW and mac80211 will be
1164 * unhappy about callback failures. */
1165 ath10k_mac_unregister(ar);
Kalle Valodb66ea02013-09-03 11:44:03 +03001166
Kalle Valo43d2a302014-09-10 18:23:30 +03001167 ath10k_testmode_destroy(ar);
1168
Michal Kazior29385052013-07-16 09:38:58 +02001169 ath10k_core_free_firmware_files(ar);
Ben Greear6f1f56e2013-11-04 09:18:16 -08001170
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001171 ath10k_debug_unregister(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001172}
1173EXPORT_SYMBOL(ath10k_core_unregister);
1174
Michal Kaziore7b54192014-08-07 11:03:27 +02001175struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
Kalle Valoe07db352014-10-13 09:40:47 +03001176 enum ath10k_bus bus,
Michal Kazior0d0a6932014-05-23 12:28:45 +02001177 const struct ath10k_hif_ops *hif_ops)
1178{
1179 struct ath10k *ar;
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001180 int ret;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001181
Michal Kaziore7b54192014-08-07 11:03:27 +02001182 ar = ath10k_mac_create(priv_size);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001183 if (!ar)
1184 return NULL;
1185
1186 ar->ath_common.priv = ar;
1187 ar->ath_common.hw = ar->hw;
1188
1189 ar->p2p = !!ath10k_p2p;
1190 ar->dev = dev;
1191
Michal Kazior0d0a6932014-05-23 12:28:45 +02001192 ar->hif.ops = hif_ops;
Kalle Valoe07db352014-10-13 09:40:47 +03001193 ar->hif.bus = bus;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001194
1195 init_completion(&ar->scan.started);
1196 init_completion(&ar->scan.completed);
1197 init_completion(&ar->scan.on_channel);
1198 init_completion(&ar->target_suspend);
1199
1200 init_completion(&ar->install_key_done);
1201 init_completion(&ar->vdev_setup_done);
1202
Michal Kazior5c81c7f2014-08-05 14:54:44 +02001203 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001204
1205 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1206 if (!ar->workqueue)
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001207 goto err_free_mac;
Michal Kazior0d0a6932014-05-23 12:28:45 +02001208
1209 mutex_init(&ar->conf_mutex);
1210 spin_lock_init(&ar->data_lock);
1211
1212 INIT_LIST_HEAD(&ar->peers);
1213 init_waitqueue_head(&ar->peer_mapping_wq);
Michal Kazior7962b0d2014-10-28 10:34:38 +01001214 init_waitqueue_head(&ar->htt.empty_tx_wq);
1215 init_waitqueue_head(&ar->wmi.tx_credits_wq);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001216
1217 init_completion(&ar->offchan_tx_completed);
1218 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1219 skb_queue_head_init(&ar->offchan_tx_queue);
1220
1221 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1222 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1223
Michal Kazior6782cb62014-05-23 12:28:47 +02001224 INIT_WORK(&ar->register_work, ath10k_core_register_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001225 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1226
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001227 ret = ath10k_debug_create(ar);
1228 if (ret)
1229 goto err_free_wq;
1230
Michal Kazior0d0a6932014-05-23 12:28:45 +02001231 return ar;
1232
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001233err_free_wq:
1234 destroy_workqueue(ar->workqueue);
1235
1236err_free_mac:
Michal Kazior0d0a6932014-05-23 12:28:45 +02001237 ath10k_mac_destroy(ar);
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001238
Michal Kazior0d0a6932014-05-23 12:28:45 +02001239 return NULL;
1240}
1241EXPORT_SYMBOL(ath10k_core_create);
1242
1243void ath10k_core_destroy(struct ath10k *ar)
1244{
1245 flush_workqueue(ar->workqueue);
1246 destroy_workqueue(ar->workqueue);
1247
Michal Kaziore13cf7a2014-09-04 09:13:08 +02001248 ath10k_debug_destroy(ar);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001249 ath10k_mac_destroy(ar);
1250}
1251EXPORT_SYMBOL(ath10k_core_destroy);
1252
Kalle Valo5e3dd152013-06-12 20:52:10 +03001253MODULE_AUTHOR("Qualcomm Atheros");
1254MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1255MODULE_LICENSE("Dual BSD/GPL");