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Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#ifndef _CORE_H_
19#define _CORE_H_
20
21#include <linux/completion.h>
22#include <linux/if_ether.h>
23#include <linux/types.h>
24#include <linux/pci.h>
25
Michal Kazioredb82362013-07-05 16:15:14 +030026#include "htt.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030027#include "htc.h"
28#include "hw.h"
29#include "targaddrs.h"
30#include "wmi.h"
31#include "../ath.h"
32#include "../regd.h"
33
34#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
35#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
36#define WO(_f) ((_f##_OFFSET) >> 2)
37
38#define ATH10K_SCAN_ID 0
39#define WMI_READY_TIMEOUT (5 * HZ)
40#define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
Michal Kazior2e1dea42013-07-31 10:32:40 +020041#define ATH10K_NUM_CHANS 38
Kalle Valo5e3dd152013-06-12 20:52:10 +030042
43/* Antenna noise floor */
44#define ATH10K_DEFAULT_NOISE_FLOOR -95
45
Bartosz Markowski5e00d312013-09-26 17:47:12 +020046#define ATH10K_MAX_NUM_MGMT_PENDING 16
47
Kalle Valo5e3dd152013-06-12 20:52:10 +030048struct ath10k;
49
Kalle Valo5e3dd152013-06-12 20:52:10 +030050struct ath10k_skb_cb {
51 dma_addr_t paddr;
52 bool is_mapped;
53 bool is_aborted;
Bartosz Markowski5e00d312013-09-26 17:47:12 +020054 u8 vdev_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +030055
56 struct {
Kalle Valo5e3dd152013-06-12 20:52:10 +030057 u8 tid;
58 bool is_offchan;
Michal Kazior1f8bb152013-09-18 14:43:22 +020059
60 u8 frag_len;
61 u8 pad_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +030062 } __packed htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +030063} __packed;
64
65static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
66{
67 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
68 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
69 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
70}
71
72static inline int ath10k_skb_map(struct device *dev, struct sk_buff *skb)
73{
74 if (ATH10K_SKB_CB(skb)->is_mapped)
75 return -EINVAL;
76
77 ATH10K_SKB_CB(skb)->paddr = dma_map_single(dev, skb->data, skb->len,
78 DMA_TO_DEVICE);
79
80 if (unlikely(dma_mapping_error(dev, ATH10K_SKB_CB(skb)->paddr)))
81 return -EIO;
82
83 ATH10K_SKB_CB(skb)->is_mapped = true;
84 return 0;
85}
86
87static inline int ath10k_skb_unmap(struct device *dev, struct sk_buff *skb)
88{
89 if (!ATH10K_SKB_CB(skb)->is_mapped)
90 return -EINVAL;
91
92 dma_unmap_single(dev, ATH10K_SKB_CB(skb)->paddr, skb->len,
93 DMA_TO_DEVICE);
94 ATH10K_SKB_CB(skb)->is_mapped = false;
95 return 0;
96}
97
98static inline u32 host_interest_item_address(u32 item_offset)
99{
100 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
101}
102
103struct ath10k_bmi {
104 bool done_sent;
105};
106
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200107#define ATH10K_MAX_MEM_REQS 16
108
109struct ath10k_mem_chunk {
110 void *vaddr;
111 dma_addr_t paddr;
112 u32 len;
113 u32 req_id;
114};
115
Kalle Valo5e3dd152013-06-12 20:52:10 +0300116struct ath10k_wmi {
117 enum ath10k_htc_ep_id eid;
118 struct completion service_ready;
119 struct completion unified_ready;
Michal Kaziorbe8b3942013-09-13 14:16:54 +0200120 wait_queue_head_t tx_credits_wq;
Bartosz Markowskice428702013-09-26 17:47:05 +0200121 struct wmi_cmd_map *cmd;
Bartosz Markowski6d1506e2013-09-26 17:47:15 +0200122 struct wmi_vdev_param_map *vdev_param;
Bartosz Markowski226a3392013-09-26 17:47:16 +0200123 struct wmi_pdev_param_map *pdev_param;
Bartosz Markowskib3effe62013-09-26 17:47:11 +0200124
125 u32 num_mem_chunks;
126 struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS];
Kalle Valo5e3dd152013-06-12 20:52:10 +0300127};
128
129struct ath10k_peer_stat {
130 u8 peer_macaddr[ETH_ALEN];
131 u32 peer_rssi;
132 u32 peer_tx_rate;
133};
134
135struct ath10k_target_stats {
136 /* PDEV stats */
137 s32 ch_noise_floor;
138 u32 tx_frame_count;
139 u32 rx_frame_count;
140 u32 rx_clear_count;
141 u32 cycle_count;
142 u32 phy_err_count;
143 u32 chan_tx_power;
144
145 /* PDEV TX stats */
146 s32 comp_queued;
147 s32 comp_delivered;
148 s32 msdu_enqued;
149 s32 mpdu_enqued;
150 s32 wmm_drop;
151 s32 local_enqued;
152 s32 local_freed;
153 s32 hw_queued;
154 s32 hw_reaped;
155 s32 underrun;
156 s32 tx_abort;
157 s32 mpdus_requed;
158 u32 tx_ko;
159 u32 data_rc;
160 u32 self_triggers;
161 u32 sw_retry_failure;
162 u32 illgl_rate_phy_err;
163 u32 pdev_cont_xretry;
164 u32 pdev_tx_timeout;
165 u32 pdev_resets;
166 u32 phy_underrun;
167 u32 txop_ovf;
168
169 /* PDEV RX stats */
170 s32 mid_ppdu_route_change;
171 s32 status_rcvd;
172 s32 r0_frags;
173 s32 r1_frags;
174 s32 r2_frags;
175 s32 r3_frags;
176 s32 htt_msdus;
177 s32 htt_mpdus;
178 s32 loc_msdus;
179 s32 loc_mpdus;
180 s32 oversize_amsdu;
181 s32 phy_errs;
182 s32 phy_err_drop;
183 s32 mpdu_errs;
184
185 /* VDEV STATS */
186
187 /* PEER STATS */
188 u8 peers;
189 struct ath10k_peer_stat peer_stat[TARGET_NUM_PEERS];
190
191 /* TODO: Beacon filter stats */
192
193};
194
195#define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
196
197struct ath10k_peer {
198 struct list_head list;
199 int vdev_id;
200 u8 addr[ETH_ALEN];
201 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
202 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
203};
204
205#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
206
207struct ath10k_vif {
208 u32 vdev_id;
209 enum wmi_vdev_type vdev_type;
210 enum wmi_vdev_subtype vdev_subtype;
211 u32 beacon_interval;
212 u32 dtim_period;
Michal Kaziored543882013-09-13 14:16:56 +0200213 struct sk_buff *beacon;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300214
215 struct ath10k *ar;
216 struct ieee80211_vif *vif;
217
218 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
219 u8 def_wep_key_index;
220
221 u16 tx_seq_no;
222
223 union {
224 struct {
225 u8 bssid[ETH_ALEN];
226 u32 uapsd;
227 } sta;
228 struct {
229 /* 127 stations; wmi limit */
230 u8 tim_bitmap[16];
231 u8 tim_len;
232 u32 ssid_len;
233 u8 ssid[IEEE80211_MAX_SSID_LEN];
234 bool hidden_ssid;
235 /* P2P_IE with NoA attribute for P2P_GO case */
236 u32 noa_len;
237 u8 *noa_data;
238 } ap;
239 struct {
240 u8 bssid[ETH_ALEN];
241 } ibss;
242 } u;
243};
244
245struct ath10k_vif_iter {
246 u32 vdev_id;
247 struct ath10k_vif *arvif;
248};
249
250struct ath10k_debug {
251 struct dentry *debugfs_phy;
252
253 struct ath10k_target_stats target_stats;
254 u32 wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
255
256 struct completion event_stats_compl;
Kalle Valoa3d135e2013-09-03 11:44:10 +0300257
258 unsigned long htt_stats_mask;
259 struct delayed_work htt_stats_dwork;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300260};
261
Michal Kaziorf7843d72013-07-16 09:38:52 +0200262enum ath10k_state {
263 ATH10K_STATE_OFF = 0,
264 ATH10K_STATE_ON,
Michal Kazioraffd3212013-07-16 09:54:35 +0200265
266 /* When doing firmware recovery the device is first powered down.
267 * mac80211 is supposed to call in to start() hook later on. It is
268 * however possible that driver unloading and firmware crash overlap.
269 * mac80211 can wait on conf_mutex in stop() while the device is
270 * stopped in ath10k_core_restart() work holding conf_mutex. The state
271 * RESTARTED means that the device is up and mac80211 has started hw
272 * reconfiguration. Once mac80211 is done with the reconfiguration we
273 * set the state to STATE_ON in restart_complete(). */
274 ATH10K_STATE_RESTARTING,
275 ATH10K_STATE_RESTARTED,
276
277 /* The device has crashed while restarting hw. This state is like ON
278 * but commands are blocked in HTC and -ECOMM response is given. This
279 * prevents completion timeouts and makes the driver more responsive to
280 * userspace commands. This is also prevents recursive recovery. */
281 ATH10K_STATE_WEDGED,
Michal Kaziorf7843d72013-07-16 09:38:52 +0200282};
283
Michal Kazior0d9b0432013-08-09 10:13:33 +0200284enum ath10k_fw_features {
285 /* wmi_mgmt_rx_hdr contains extra RSSI information */
286 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
287
Bartosz Markowskice428702013-09-26 17:47:05 +0200288 /* firmware from 10X branch */
289 ATH10K_FW_FEATURE_WMI_10X = 1,
290
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200291 /* firmware support tx frame management over WMI, otherwise it's HTT */
292 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
293
Michal Kazior0d9b0432013-08-09 10:13:33 +0200294 /* keep last */
295 ATH10K_FW_FEATURE_COUNT,
296};
297
Kalle Valo5e3dd152013-06-12 20:52:10 +0300298struct ath10k {
299 struct ath_common ath_common;
300 struct ieee80211_hw *hw;
301 struct device *dev;
302 u8 mac_addr[ETH_ALEN];
303
Kalle Valoe01ae682013-09-01 11:22:14 +0300304 u32 chip_id;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300305 u32 target_version;
306 u8 fw_version_major;
307 u32 fw_version_minor;
308 u16 fw_version_release;
309 u16 fw_version_build;
310 u32 phy_capability;
311 u32 hw_min_tx_power;
312 u32 hw_max_tx_power;
313 u32 ht_cap_info;
314 u32 vht_cap_info;
Michal Kazior8865bee42013-07-24 12:36:46 +0200315 u32 num_rf_chains;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300316
Michal Kazior0d9b0432013-08-09 10:13:33 +0200317 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
318
Kalle Valo5e3dd152013-06-12 20:52:10 +0300319 struct targetdef *targetdef;
320 struct hostdef *hostdef;
321
322 bool p2p;
323
324 struct {
325 void *priv;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300326 const struct ath10k_hif_ops *ops;
327 } hif;
328
Kalle Valo5e3dd152013-06-12 20:52:10 +0300329 wait_queue_head_t event_queue;
330 bool is_target_paused;
331
332 struct ath10k_bmi bmi;
Michal Kazioredb82362013-07-05 16:15:14 +0300333 struct ath10k_wmi wmi;
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300334 struct ath10k_htc htc;
Michal Kazioredb82362013-07-05 16:15:14 +0300335 struct ath10k_htt htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300336
337 struct ath10k_hw_params {
338 u32 id;
339 const char *name;
340 u32 patch_load_addr;
341
342 struct ath10k_hw_params_fw {
343 const char *dir;
344 const char *fw;
345 const char *otp;
346 const char *board;
347 } fw;
348 } hw_params;
349
Kalle Valo36527912013-09-27 19:54:55 +0300350 const struct firmware *board;
Kalle Valo958df3a2013-09-27 19:55:01 +0300351 const void *board_data;
352 size_t board_len;
353
Michal Kazior29385052013-07-16 09:38:58 +0200354 const struct firmware *otp;
Kalle Valo958df3a2013-09-27 19:55:01 +0300355 const void *otp_data;
356 size_t otp_len;
357
Michal Kazior29385052013-07-16 09:38:58 +0200358 const struct firmware *firmware;
Kalle Valo958df3a2013-09-27 19:55:01 +0300359 const void *firmware_data;
360 size_t firmware_len;
Michal Kazior29385052013-07-16 09:38:58 +0200361
Kalle Valo5e3dd152013-06-12 20:52:10 +0300362 struct {
363 struct completion started;
364 struct completion completed;
365 struct completion on_channel;
366 struct timer_list timeout;
367 bool is_roc;
368 bool in_progress;
369 bool aborting;
370 int vdev_id;
371 int roc_freq;
372 } scan;
373
374 struct {
375 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
376 } mac;
377
378 /* should never be NULL; needed for regular htt rx */
379 struct ieee80211_channel *rx_channel;
380
381 /* valid during scan; needed for mgmt rx during scan */
382 struct ieee80211_channel *scan_channel;
383
384 int free_vdev_map;
385 int monitor_vdev_id;
386 bool monitor_enabled;
387 bool monitor_present;
388 unsigned int filter_flags;
389
390 struct wmi_pdev_set_wmm_params_arg wmm_params;
391 struct completion install_key_done;
392
393 struct completion vdev_setup_done;
394
395 struct workqueue_struct *workqueue;
396
397 /* prevents concurrent FW reconfiguration */
398 struct mutex conf_mutex;
399
400 /* protects shared structure data */
401 spinlock_t data_lock;
402
403 struct list_head peers;
404 wait_queue_head_t peer_mapping_wq;
405
406 struct work_struct offchan_tx_work;
407 struct sk_buff_head offchan_tx_queue;
408 struct completion offchan_tx_completed;
409 struct sk_buff *offchan_tx_skb;
410
Bartosz Markowski5e00d312013-09-26 17:47:12 +0200411 struct work_struct wmi_mgmt_tx_work;
412 struct sk_buff_head wmi_mgmt_tx_queue;
413
Michal Kaziorf7843d72013-07-16 09:38:52 +0200414 enum ath10k_state state;
415
Michal Kazioraffd3212013-07-16 09:54:35 +0200416 struct work_struct restart_work;
417
Michal Kazior2e1dea42013-07-31 10:32:40 +0200418 /* cycle count is reported twice for each visited channel during scan.
419 * access protected by data_lock */
420 u32 survey_last_rx_clear_count;
421 u32 survey_last_cycle_count;
422 struct survey_info survey[ATH10K_NUM_CHANS];
423
Kalle Valo5e3dd152013-06-12 20:52:10 +0300424#ifdef CONFIG_ATH10K_DEBUGFS
425 struct ath10k_debug debug;
426#endif
427};
428
429struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300430 const struct ath10k_hif_ops *hif_ops);
431void ath10k_core_destroy(struct ath10k *ar);
432
Michal Kaziordd30a362013-07-16 09:38:51 +0200433int ath10k_core_start(struct ath10k *ar);
434void ath10k_core_stop(struct ath10k *ar);
Kalle Valoe01ae682013-09-01 11:22:14 +0300435int ath10k_core_register(struct ath10k *ar, u32 chip_id);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300436void ath10k_core_unregister(struct ath10k *ar);
437
Kalle Valo5e3dd152013-06-12 20:52:10 +0300438#endif /* _CORE_H_ */