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Johannes Berg8ca151b2013-01-24 14:25:36 +01001/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +02008 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8ca151b2013-01-24 14:25:36 +01009 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
Emmanuel Grumbach410dc5a2013-02-18 09:22:28 +020025 * in the file called COPYING.
Johannes Berg8ca151b2013-01-24 14:25:36 +010026 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
Emmanuel Grumbach51368bf2013-12-30 13:15:54 +020033 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
Johannes Berg8ca151b2013-01-24 14:25:36 +010034 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63
64#ifndef __fw_api_h__
65#define __fw_api_h__
66
67#include "fw-api-rs.h"
68#include "fw-api-tx.h"
69#include "fw-api-sta.h"
70#include "fw-api-mac.h"
71#include "fw-api-power.h"
72#include "fw-api-d3.h"
Emmanuel Grumbach5b7ff612014-03-11 19:27:45 +020073#include "fw-api-coex.h"
Haim Dreyfusse820c2d2014-04-06 11:19:09 +030074#include "fw-api-scan.h"
Johannes Berg8ca151b2013-01-24 14:25:36 +010075
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020076/* maximal number of Tx queues in any platform */
77#define IWL_MVM_MAX_QUEUES 20
78
79/* Tx queue numbers */
Johannes Berg8ca151b2013-01-24 14:25:36 +010080enum {
81 IWL_MVM_OFFCHANNEL_QUEUE = 8,
82 IWL_MVM_CMD_QUEUE = 9,
Johannes Berg8ca151b2013-01-24 14:25:36 +010083};
84
Eytan Lifshitz19e737c2013-09-09 13:30:15 +020085#define IWL_MVM_CMD_FIFO 7
86
Johannes Berg8ca151b2013-01-24 14:25:36 +010087#define IWL_MVM_STATION_COUNT 16
88
Arik Nemtsovcf7b4912014-05-15 11:44:40 +030089#define IWL_MVM_TDLS_STA_COUNT 4
90
Johannes Berg8ca151b2013-01-24 14:25:36 +010091/* commands */
92enum {
93 MVM_ALIVE = 0x1,
94 REPLY_ERROR = 0x2,
95
96 INIT_COMPLETE_NOTIF = 0x4,
97
98 /* PHY context commands */
99 PHY_CONTEXT_CMD = 0x8,
100 DBG_CFG = 0x9,
Emmanuel Grumbachb9fae2d2014-02-17 11:24:10 +0200101 ANTENNA_COUPLING_NOTIFICATION = 0xa,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100102
103 /* station table */
Max Stepanov5a258aa2013-04-07 09:11:21 +0300104 ADD_STA_KEY = 0x17,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100105 ADD_STA = 0x18,
106 REMOVE_STA = 0x19,
107
108 /* TX */
109 TX_CMD = 0x1c,
110 TXPATH_FLUSH = 0x1e,
111 MGMT_MCAST_KEY = 0x1f,
112
113 /* global key */
114 WEP_KEY = 0x20,
115
116 /* MAC and Binding commands */
117 MAC_CONTEXT_CMD = 0x28,
118 TIME_EVENT_CMD = 0x29, /* both CMD and response */
119 TIME_EVENT_NOTIFICATION = 0x2a,
120 BINDING_CONTEXT_CMD = 0x2b,
121 TIME_QUOTA_CMD = 0x2c,
Johannes Berg4ac6cb52013-08-08 09:30:13 +0200122 NON_QOS_TX_COUNTER_CMD = 0x2d,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100123
124 LQ_CMD = 0x4e,
125
126 /* Calibration */
127 TEMPERATURE_NOTIFICATION = 0x62,
128 CALIBRATION_CFG_CMD = 0x65,
129 CALIBRATION_RES_NOTIFICATION = 0x66,
130 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
131 RADIO_VERSION_NOTIFICATION = 0x68,
132
133 /* Scan offload */
134 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
135 SCAN_OFFLOAD_ABORT_CMD = 0x52,
136 SCAN_OFFLOAD_COMPLETE = 0x6D,
137 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
138 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
David Spinadel35a000b2013-08-28 09:29:43 +0300139 MATCH_FOUND_NOTIFICATION = 0xd9,
David Spinadelfb98be52014-05-04 12:51:10 +0300140 SCAN_ITERATION_COMPLETE = 0xe7,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100141
142 /* Phy */
143 PHY_CONFIGURATION_CMD = 0x6a,
144 CALIB_RES_NOTIF_PHY_DB = 0x6b,
145 /* PHY_DB_CMD = 0x6c, */
146
Alexander Bondare811ada2013-03-10 15:29:44 +0200147 /* Power - legacy power table command */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100148 POWER_TABLE_CMD = 0x77,
Alexander Bondar175a70b2013-04-14 20:59:37 +0300149 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100150
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +0300151 /* Thermal Throttling*/
152 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
153
Johannes Berg8ca151b2013-01-24 14:25:36 +0100154 /* Scanning */
155 SCAN_REQUEST_CMD = 0x80,
156 SCAN_ABORT_CMD = 0x81,
157 SCAN_START_NOTIFICATION = 0x82,
158 SCAN_RESULTS_NOTIFICATION = 0x83,
159 SCAN_COMPLETE_NOTIFICATION = 0x84,
160
161 /* NVM */
162 NVM_ACCESS_CMD = 0x88,
163
164 SET_CALIB_DEFAULT_CMD = 0x8e,
165
Ilan Peer571765c2013-03-05 15:26:03 +0200166 BEACON_NOTIFICATION = 0x90,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100167 BEACON_TEMPLATE_CMD = 0x91,
168 TX_ANT_CONFIGURATION_CMD = 0x98,
169 STATISTICS_NOTIFICATION = 0x9d,
Johannes Berg3e56ead2013-02-15 22:23:18 +0100170 EOSP_NOTIFICATION = 0x9e,
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300171 REDUCE_TX_POWER_CMD = 0x9f,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100172
173 /* RF-KILL commands and notifications */
174 CARD_STATE_CMD = 0xa0,
175 CARD_STATE_NOTIFICATION = 0xa1,
176
Hila Gonend64048e2013-03-13 18:00:03 +0200177 MISSED_BEACONS_NOTIFICATION = 0xa2,
178
Alexander Bondare811ada2013-03-10 15:29:44 +0200179 /* Power - new power table command */
180 MAC_PM_POWER_TABLE = 0xa9,
181
Johannes Berg8ca151b2013-01-24 14:25:36 +0100182 REPLY_RX_PHY_CMD = 0xc0,
183 REPLY_RX_MPDU_CMD = 0xc1,
184 BA_NOTIF = 0xc5,
185
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200186 /* BT Coex */
187 BT_COEX_PRIO_TABLE = 0xcc,
188 BT_COEX_PROT_ENV = 0xcd,
189 BT_PROFILE_NOTIFICATION = 0xce,
Emmanuel Grumbach430a3bb2014-04-02 09:55:16 +0300190 BT_CONFIG = 0x9b,
191 BT_COEX_UPDATE_SW_BOOST = 0x5a,
192 BT_COEX_UPDATE_CORUN_LUT = 0x5b,
193 BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
Emmanuel Grumbachdac94da2013-06-18 07:35:27 +0300194 BT_COEX_CI = 0x5d,
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200195
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +0200196 REPLY_SF_CFG_CMD = 0xd1,
Hila Gonen7df15b12012-12-12 11:16:19 +0200197 REPLY_BEACON_FILTERING_CMD = 0xd2,
198
Johannes Berg8ca151b2013-01-24 14:25:36 +0100199 REPLY_DEBUG_CMD = 0xf0,
200 DEBUG_LOG_MSG = 0xf7,
201
Eliad Pellerc87163b2014-01-08 10:11:11 +0200202 BCAST_FILTER_CMD = 0xcf,
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +0300203 MCAST_FILTER_CMD = 0xd0,
204
Johannes Berg8ca151b2013-01-24 14:25:36 +0100205 /* D3 commands/notifications */
206 D3_CONFIG_CMD = 0xd3,
207 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
208 OFFLOADS_QUERY_CMD = 0xd5,
209 REMOTE_WAKE_CONFIG_CMD = 0xd6,
Arik Nemtsov98ee7782013-10-02 16:58:09 +0300210 D0I3_END_CMD = 0xed,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100211
212 /* for WoWLAN in particular */
213 WOWLAN_PATTERNS = 0xe0,
214 WOWLAN_CONFIGURATION = 0xe1,
215 WOWLAN_TSC_RSC_PARAM = 0xe2,
216 WOWLAN_TKIP_PARAM = 0xe3,
217 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
218 WOWLAN_GET_STATUSES = 0xe5,
219 WOWLAN_TX_POWER_PER_DB = 0xe6,
220
221 /* and for NetDetect */
222 NET_DETECT_CONFIG_CMD = 0x54,
223 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
224 NET_DETECT_PROFILES_CMD = 0x57,
225 NET_DETECT_HOTSPOTS_CMD = 0x58,
226 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
227
228 REPLY_MAX = 0xff,
229};
230
231/**
232 * struct iwl_cmd_response - generic response struct for most commands
233 * @status: status of the command asked, changes for each one
234 */
235struct iwl_cmd_response {
236 __le32 status;
237};
238
239/*
240 * struct iwl_tx_ant_cfg_cmd
241 * @valid: valid antenna configuration
242 */
243struct iwl_tx_ant_cfg_cmd {
244 __le32 valid;
245} __packed;
246
Matti Gottlieb88f2fd72013-07-09 15:25:46 +0300247/**
248 * struct iwl_reduce_tx_power_cmd - TX power reduction command
249 * REDUCE_TX_POWER_CMD = 0x9f
250 * @flags: (reserved for future implementation)
251 * @mac_context_id: id of the mac ctx for which we are reducing TX power.
252 * @pwr_restriction: TX power restriction in dBms.
253 */
254struct iwl_reduce_tx_power_cmd {
255 u8 flags;
256 u8 mac_context_id;
257 __le16 pwr_restriction;
258} __packed; /* TX_REDUCED_POWER_API_S_VER_1 */
259
Johannes Berg8ca151b2013-01-24 14:25:36 +0100260/*
261 * Calibration control struct.
262 * Sent as part of the phy configuration command.
263 * @flow_trigger: bitmap for which calibrations to perform according to
264 * flow triggers.
265 * @event_trigger: bitmap for which calibrations to perform according to
266 * event triggers.
267 */
268struct iwl_calib_ctrl {
269 __le32 flow_trigger;
270 __le32 event_trigger;
271} __packed;
272
273/* This enum defines the bitmap of various calibrations to enable in both
274 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
275 */
276enum iwl_calib_cfg {
277 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
278 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
279 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
280 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
281 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
282 IWL_CALIB_CFG_DC_IDX = BIT(5),
283 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
284 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
285 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
286 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
287 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
288 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
289 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
290 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
291 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
292 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
293 IWL_CALIB_CFG_DAC_IDX = BIT(16),
294 IWL_CALIB_CFG_ABS_IDX = BIT(17),
295 IWL_CALIB_CFG_AGC_IDX = BIT(18),
296};
297
298/*
299 * Phy configuration command.
300 */
301struct iwl_phy_cfg_cmd {
302 __le32 phy_cfg;
303 struct iwl_calib_ctrl calib_control;
304} __packed;
305
306#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
307#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
308#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
309#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
310#define PHY_CFG_TX_CHAIN_A BIT(8)
311#define PHY_CFG_TX_CHAIN_B BIT(9)
312#define PHY_CFG_TX_CHAIN_C BIT(10)
313#define PHY_CFG_RX_CHAIN_A BIT(12)
314#define PHY_CFG_RX_CHAIN_B BIT(13)
315#define PHY_CFG_RX_CHAIN_C BIT(14)
316
317
318/* Target of the NVM_ACCESS_CMD */
319enum {
320 NVM_ACCESS_TARGET_CACHE = 0,
321 NVM_ACCESS_TARGET_OTP = 1,
322 NVM_ACCESS_TARGET_EEPROM = 2,
323};
324
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200325/* Section types for NVM_ACCESS_CMD */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100326enum {
Eran Hararyae2b21b2014-01-09 08:08:24 +0200327 NVM_SECTION_TYPE_SW = 1,
Eran Harary77db0a32014-02-04 14:21:38 +0200328 NVM_SECTION_TYPE_REGULATORY = 3,
Eran Hararyae2b21b2014-01-09 08:08:24 +0200329 NVM_SECTION_TYPE_CALIBRATION = 4,
330 NVM_SECTION_TYPE_PRODUCTION = 5,
Eran Harary77db0a32014-02-04 14:21:38 +0200331 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
332 NVM_MAX_NUM_SECTIONS = 12,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100333};
334
335/**
336 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
337 * @op_code: 0 - read, 1 - write
338 * @target: NVM_ACCESS_TARGET_*
339 * @type: NVM_SECTION_TYPE_*
340 * @offset: offset in bytes into the section
341 * @length: in bytes, to read/write
342 * @data: if write operation, the data to write. On read its empty
343 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200344struct iwl_nvm_access_cmd {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100345 u8 op_code;
346 u8 target;
347 __le16 type;
348 __le16 offset;
349 __le16 length;
350 u8 data[];
351} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
352
353/**
354 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
355 * @offset: offset in bytes into the section
356 * @length: in bytes, either how much was written or read
357 * @type: NVM_SECTION_TYPE_*
358 * @status: 0 for success, fail otherwise
359 * @data: if read operation, the data returned. Empty on write.
360 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200361struct iwl_nvm_access_resp {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100362 __le16 offset;
363 __le16 length;
364 __le16 type;
365 __le16 status;
366 u8 data[];
367} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
368
369/* MVM_ALIVE 0x1 */
370
371/* alive response is_valid values */
372#define ALIVE_RESP_UCODE_OK BIT(0)
373#define ALIVE_RESP_RFKILL BIT(1)
374
375/* alive response ver_type values */
376enum {
377 FW_TYPE_HW = 0,
378 FW_TYPE_PROT = 1,
379 FW_TYPE_AP = 2,
380 FW_TYPE_WOWLAN = 3,
381 FW_TYPE_TIMING = 4,
382 FW_TYPE_WIPAN = 5
383};
384
385/* alive response ver_subtype values */
386enum {
387 FW_SUBTYPE_FULL_FEATURE = 0,
388 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
389 FW_SUBTYPE_REDUCED = 2,
390 FW_SUBTYPE_ALIVE_ONLY = 3,
391 FW_SUBTYPE_WOWLAN = 4,
392 FW_SUBTYPE_AP_SUBTYPE = 5,
393 FW_SUBTYPE_WIPAN = 6,
394 FW_SUBTYPE_INITIALIZE = 9
395};
396
397#define IWL_ALIVE_STATUS_ERR 0xDEAD
398#define IWL_ALIVE_STATUS_OK 0xCAFE
399
400#define IWL_ALIVE_FLG_RFKILL BIT(0)
401
402struct mvm_alive_resp {
403 __le16 status;
404 __le16 flags;
405 u8 ucode_minor;
406 u8 ucode_major;
407 __le16 id;
408 u8 api_minor;
409 u8 api_major;
410 u8 ver_subtype;
411 u8 ver_type;
412 u8 mac;
413 u8 opt;
414 __le16 reserved2;
415 __le32 timestamp;
416 __le32 error_event_table_ptr; /* SRAM address for error log */
417 __le32 log_event_table_ptr; /* SRAM address for event log */
418 __le32 cpu_register_ptr;
419 __le32 dbgm_config_ptr;
420 __le32 alive_counter_ptr;
421 __le32 scd_base_ptr; /* SRAM address for SCD */
422} __packed; /* ALIVE_RES_API_S_VER_1 */
423
Eran Harary01a9ca52014-02-03 09:29:57 +0200424struct mvm_alive_resp_ver2 {
425 __le16 status;
426 __le16 flags;
427 u8 ucode_minor;
428 u8 ucode_major;
429 __le16 id;
430 u8 api_minor;
431 u8 api_major;
432 u8 ver_subtype;
433 u8 ver_type;
434 u8 mac;
435 u8 opt;
436 __le16 reserved2;
437 __le32 timestamp;
438 __le32 error_event_table_ptr; /* SRAM address for error log */
439 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
440 __le32 cpu_register_ptr;
441 __le32 dbgm_config_ptr;
442 __le32 alive_counter_ptr;
443 __le32 scd_base_ptr; /* SRAM address for SCD */
444 __le32 st_fwrd_addr; /* pointer to Store and forward */
445 __le32 st_fwrd_size;
446 u8 umac_minor; /* UMAC version: minor */
447 u8 umac_major; /* UMAC version: major */
448 __le16 umac_id; /* UMAC version: id */
449 __le32 error_info_addr; /* SRAM address for UMAC error log */
450 __le32 dbg_print_buff_addr;
451} __packed; /* ALIVE_RES_API_S_VER_2 */
452
Johannes Berg8ca151b2013-01-24 14:25:36 +0100453/* Error response/notification */
454enum {
455 FW_ERR_UNKNOWN_CMD = 0x0,
456 FW_ERR_INVALID_CMD_PARAM = 0x1,
457 FW_ERR_SERVICE = 0x2,
458 FW_ERR_ARC_MEMORY = 0x3,
459 FW_ERR_ARC_CODE = 0x4,
460 FW_ERR_WATCH_DOG = 0x5,
461 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
462 FW_ERR_WEP_KEY_SIZE = 0x11,
463 FW_ERR_OBSOLETE_FUNC = 0x12,
464 FW_ERR_UNEXPECTED = 0xFE,
465 FW_ERR_FATAL = 0xFF
466};
467
468/**
469 * struct iwl_error_resp - FW error indication
470 * ( REPLY_ERROR = 0x2 )
471 * @error_type: one of FW_ERR_*
472 * @cmd_id: the command ID for which the error occured
473 * @bad_cmd_seq_num: sequence number of the erroneous command
474 * @error_service: which service created the error, applicable only if
475 * error_type = 2, otherwise 0
476 * @timestamp: TSF in usecs.
477 */
478struct iwl_error_resp {
479 __le32 error_type;
480 u8 cmd_id;
481 u8 reserved1;
482 __le16 bad_cmd_seq_num;
483 __le32 error_service;
484 __le64 timestamp;
485} __packed;
486
487
488/* Common PHY, MAC and Bindings definitions */
489
490#define MAX_MACS_IN_BINDING (3)
491#define MAX_BINDINGS (4)
492#define AUX_BINDING_INDEX (3)
493#define MAX_PHYS (4)
494
495/* Used to extract ID and color from the context dword */
496#define FW_CTXT_ID_POS (0)
497#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
498#define FW_CTXT_COLOR_POS (8)
499#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
500#define FW_CTXT_INVALID (0xffffffff)
501
502#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
503 (_color << FW_CTXT_COLOR_POS))
504
505/* Possible actions on PHYs, MACs and Bindings */
506enum {
507 FW_CTXT_ACTION_STUB = 0,
508 FW_CTXT_ACTION_ADD,
509 FW_CTXT_ACTION_MODIFY,
510 FW_CTXT_ACTION_REMOVE,
511 FW_CTXT_ACTION_NUM
512}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
513
514/* Time Events */
515
516/* Time Event types, according to MAC type */
517enum iwl_time_event_type {
518 /* BSS Station Events */
519 TE_BSS_STA_AGGRESSIVE_ASSOC,
520 TE_BSS_STA_ASSOC,
521 TE_BSS_EAP_DHCP_PROT,
522 TE_BSS_QUIET_PERIOD,
523
524 /* P2P Device Events */
525 TE_P2P_DEVICE_DISCOVERABLE,
526 TE_P2P_DEVICE_LISTEN,
527 TE_P2P_DEVICE_ACTION_SCAN,
528 TE_P2P_DEVICE_FULL_SCAN,
529
530 /* P2P Client Events */
531 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
532 TE_P2P_CLIENT_ASSOC,
533 TE_P2P_CLIENT_QUIET_PERIOD,
534
535 /* P2P GO Events */
536 TE_P2P_GO_ASSOC_PROT,
537 TE_P2P_GO_REPETITIVE_NOA,
538 TE_P2P_GO_CT_WINDOW,
539
540 /* WiDi Sync Events */
541 TE_WIDI_TX_SYNC,
542
Andrei Otcheretianski7f0a7c62014-05-04 11:48:12 +0300543 /* Channel Switch NoA */
544 TE_P2P_GO_CSA_NOA,
545
Johannes Berg8ca151b2013-01-24 14:25:36 +0100546 TE_MAX
547}; /* MAC_EVENT_TYPE_API_E_VER_1 */
548
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300549
550
551/* Time event - defines for command API v1 */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100552
553/*
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300554 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
555 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
556 * the first fragment is scheduled.
557 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
558 * the first 2 fragments are scheduled.
559 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
560 * number of fragments are valid.
Johannes Berg8ca151b2013-01-24 14:25:36 +0100561 *
562 * Other than the constant defined above, specifying a fragmentation value 'x'
563 * means that the event can be fragmented but only the first 'x' will be
564 * scheduled.
565 */
566enum {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300567 TE_V1_FRAG_NONE = 0,
568 TE_V1_FRAG_SINGLE = 1,
569 TE_V1_FRAG_DUAL = 2,
570 TE_V1_FRAG_ENDLESS = 0xffffffff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100571};
572
Johannes Berg8ca151b2013-01-24 14:25:36 +0100573/* If a Time Event can be fragmented, this is the max number of fragments */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300574#define TE_V1_FRAG_MAX_MSK 0x0fffffff
575/* Repeat the time event endlessly (until removed) */
576#define TE_V1_REPEAT_ENDLESS 0xffffffff
577/* If a Time Event has bounded repetitions, this is the maximal value */
578#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
579
580/* Time Event dependencies: none, on another TE, or in a specific time */
581enum {
582 TE_V1_INDEPENDENT = 0,
583 TE_V1_DEP_OTHER = BIT(0),
584 TE_V1_DEP_TSF = BIT(1),
585 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
586}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
587
588/*
589 * @TE_V1_NOTIF_NONE: no notifications
590 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
591 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
592 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
593 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
594 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
595 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
596 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
597 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
598 *
599 * Supported Time event notifications configuration.
600 * A notification (both event and fragment) includes a status indicating weather
601 * the FW was able to schedule the event or not. For fragment start/end
602 * notification the status is always success. There is no start/end fragment
603 * notification for monolithic events.
604 */
605enum {
606 TE_V1_NOTIF_NONE = 0,
607 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
608 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
609 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
610 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
611 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
612 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
613 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
614 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
615}; /* MAC_EVENT_ACTION_API_E_VER_2 */
616
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300617/* Time event - defines for command API */
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300618
619/*
620 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
621 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
622 * the first fragment is scheduled.
623 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
624 * the first 2 fragments are scheduled.
625 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
626 * number of fragments are valid.
627 *
628 * Other than the constant defined above, specifying a fragmentation value 'x'
629 * means that the event can be fragmented but only the first 'x' will be
630 * scheduled.
631 */
632enum {
633 TE_V2_FRAG_NONE = 0,
634 TE_V2_FRAG_SINGLE = 1,
635 TE_V2_FRAG_DUAL = 2,
636 TE_V2_FRAG_MAX = 0xfe,
637 TE_V2_FRAG_ENDLESS = 0xff
638};
639
640/* Repeat the time event endlessly (until removed) */
641#define TE_V2_REPEAT_ENDLESS 0xff
642/* If a Time Event has bounded repetitions, this is the maximal value */
643#define TE_V2_REPEAT_MAX 0xfe
644
645#define TE_V2_PLACEMENT_POS 12
646#define TE_V2_ABSENCE_POS 15
647
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300648/* Time event policy values
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300649 * A notification (both event and fragment) includes a status indicating weather
650 * the FW was able to schedule the event or not. For fragment start/end
651 * notification the status is always success. There is no start/end fragment
652 * notification for monolithic events.
653 *
654 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
655 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
656 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
657 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
658 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
659 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
660 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
661 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
662 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
663 * @TE_V2_DEP_OTHER: depends on another time event
664 * @TE_V2_DEP_TSF: depends on a specific time
665 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
666 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
667 */
668enum {
669 TE_V2_DEFAULT_POLICY = 0x0,
670
671 /* notifications (event start/stop, fragment start/stop) */
672 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
673 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
674 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
675 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
676
677 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
678 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
679 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
680 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
Emmanuel Grumbach1f6bf072014-02-16 15:36:00 +0200681 T2_V2_START_IMMEDIATELY = BIT(11),
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300682
683 TE_V2_NOTIF_MSK = 0xff,
684
685 /* placement characteristics */
686 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
687 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
688 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
689
690 /* are we present or absent during the Time Event. */
691 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
692};
693
694/**
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300695 * struct iwl_time_event_cmd_api - configuring Time Events
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300696 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
697 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
698 * ( TIME_EVENT_CMD = 0x29 )
699 * @id_and_color: ID and color of the relevant MAC
700 * @action: action to perform, one of FW_CTXT_ACTION_*
701 * @id: this field has two meanings, depending on the action:
702 * If the action is ADD, then it means the type of event to add.
703 * For all other actions it is the unique event ID assigned when the
704 * event was added by the FW.
705 * @apply_time: When to start the Time Event (in GP2)
706 * @max_delay: maximum delay to event's start (apply time), in TU
707 * @depends_on: the unique ID of the event we depend on (if any)
708 * @interval: interval between repetitions, in TU
709 * @duration: duration of event in TU
710 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
711 * @max_frags: maximal number of fragments the Time Event can be divided to
712 * @policy: defines whether uCode shall notify the host or other uCode modules
713 * on event and/or fragment start and/or end
714 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
715 * TE_EVENT_SOCIOPATHIC
716 * using TE_ABSENCE and using TE_NOTIF_*
717 */
Emmanuel Grumbacha373f672014-03-30 08:40:46 +0300718struct iwl_time_event_cmd {
Eytan Lifshitzf8f03c32013-08-07 19:36:42 +0300719 /* COMMON_INDEX_HDR_API_S_VER_1 */
720 __le32 id_and_color;
721 __le32 action;
722 __le32 id;
723 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
724 __le32 apply_time;
725 __le32 max_delay;
726 __le32 depends_on;
727 __le32 interval;
728 __le32 duration;
729 u8 repeat;
730 u8 max_frags;
731 __le16 policy;
732} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
733
Johannes Berg8ca151b2013-01-24 14:25:36 +0100734/**
735 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
736 * @status: bit 0 indicates success, all others specify errors
737 * @id: the Time Event type
738 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
739 * @id_and_color: ID and color of the relevant MAC
740 */
741struct iwl_time_event_resp {
742 __le32 status;
743 __le32 id;
744 __le32 unique_id;
745 __le32 id_and_color;
746} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
747
748/**
749 * struct iwl_time_event_notif - notifications of time event start/stop
750 * ( TIME_EVENT_NOTIFICATION = 0x2a )
751 * @timestamp: action timestamp in GP2
752 * @session_id: session's unique id
753 * @unique_id: unique id of the Time Event itself
754 * @id_and_color: ID and color of the relevant MAC
755 * @action: one of TE_NOTIF_START or TE_NOTIF_END
756 * @status: true if scheduled, false otherwise (not executed)
757 */
758struct iwl_time_event_notif {
759 __le32 timestamp;
760 __le32 session_id;
761 __le32 unique_id;
762 __le32 id_and_color;
763 __le32 action;
764 __le32 status;
765} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
766
767
768/* Bindings and Time Quota */
769
770/**
771 * struct iwl_binding_cmd - configuring bindings
772 * ( BINDING_CONTEXT_CMD = 0x2b )
773 * @id_and_color: ID and color of the relevant Binding
774 * @action: action to perform, one of FW_CTXT_ACTION_*
775 * @macs: array of MAC id and colors which belong to the binding
776 * @phy: PHY id and color which belongs to the binding
777 */
778struct iwl_binding_cmd {
779 /* COMMON_INDEX_HDR_API_S_VER_1 */
780 __le32 id_and_color;
781 __le32 action;
782 /* BINDING_DATA_API_S_VER_1 */
783 __le32 macs[MAX_MACS_IN_BINDING];
784 __le32 phy;
785} __packed; /* BINDING_CMD_API_S_VER_1 */
786
Ilan Peer35adfd62013-02-04 13:16:24 +0200787/* The maximal number of fragments in the FW's schedule session */
788#define IWL_MVM_MAX_QUOTA 128
789
Johannes Berg8ca151b2013-01-24 14:25:36 +0100790/**
791 * struct iwl_time_quota_data - configuration of time quota per binding
792 * @id_and_color: ID and color of the relevant Binding
793 * @quota: absolute time quota in TU. The scheduler will try to divide the
794 * remainig quota (after Time Events) according to this quota.
795 * @max_duration: max uninterrupted context duration in TU
796 */
797struct iwl_time_quota_data {
798 __le32 id_and_color;
799 __le32 quota;
800 __le32 max_duration;
801} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
802
803/**
804 * struct iwl_time_quota_cmd - configuration of time quota between bindings
805 * ( TIME_QUOTA_CMD = 0x2c )
806 * @quotas: allocations per binding
807 */
808struct iwl_time_quota_cmd {
809 struct iwl_time_quota_data quotas[MAX_BINDINGS];
810} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
811
812
813/* PHY context */
814
815/* Supported bands */
816#define PHY_BAND_5 (0)
817#define PHY_BAND_24 (1)
818
819/* Supported channel width, vary if there is VHT support */
820#define PHY_VHT_CHANNEL_MODE20 (0x0)
821#define PHY_VHT_CHANNEL_MODE40 (0x1)
822#define PHY_VHT_CHANNEL_MODE80 (0x2)
823#define PHY_VHT_CHANNEL_MODE160 (0x3)
824
825/*
826 * Control channel position:
827 * For legacy set bit means upper channel, otherwise lower.
828 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
829 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
830 * center_freq
831 * |
832 * 40Mhz |_______|_______|
833 * 80Mhz |_______|_______|_______|_______|
834 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
835 * code 011 010 001 000 | 100 101 110 111
836 */
837#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
838#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
839#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
840#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
841#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
842#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
843#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
844#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
845
846/*
847 * @band: PHY_BAND_*
848 * @channel: channel number
849 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
850 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
851 */
852struct iwl_fw_channel_info {
853 u8 band;
854 u8 channel;
855 u8 width;
856 u8 ctrl_pos;
857} __packed;
858
859#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
860#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
861 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
862#define PHY_RX_CHAIN_VALID_POS (1)
863#define PHY_RX_CHAIN_VALID_MSK \
864 (0x7 << PHY_RX_CHAIN_VALID_POS)
865#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
866#define PHY_RX_CHAIN_FORCE_SEL_MSK \
867 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
868#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
869#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
870 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
871#define PHY_RX_CHAIN_CNT_POS (10)
872#define PHY_RX_CHAIN_CNT_MSK \
873 (0x3 << PHY_RX_CHAIN_CNT_POS)
874#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
875#define PHY_RX_CHAIN_MIMO_CNT_MSK \
876 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
877#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
878#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
879 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
880
881/* TODO: fix the value, make it depend on firmware at runtime? */
882#define NUM_PHY_CTX 3
883
884/* TODO: complete missing documentation */
885/**
886 * struct iwl_phy_context_cmd - config of the PHY context
887 * ( PHY_CONTEXT_CMD = 0x8 )
888 * @id_and_color: ID and color of the relevant Binding
889 * @action: action to perform, one of FW_CTXT_ACTION_*
890 * @apply_time: 0 means immediate apply and context switch.
891 * other value means apply new params after X usecs
892 * @tx_param_color: ???
893 * @channel_info:
894 * @txchain_info: ???
895 * @rxchain_info: ???
896 * @acquisition_data: ???
897 * @dsp_cfg_flags: set to 0
898 */
899struct iwl_phy_context_cmd {
900 /* COMMON_INDEX_HDR_API_S_VER_1 */
901 __le32 id_and_color;
902 __le32 action;
903 /* PHY_CONTEXT_DATA_API_S_VER_1 */
904 __le32 apply_time;
905 __le32 tx_param_color;
906 struct iwl_fw_channel_info ci;
907 __le32 txchain_info;
908 __le32 rxchain_info;
909 __le32 acquisition_data;
910 __le32 dsp_cfg_flags;
911} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
912
913#define IWL_RX_INFO_PHY_CNT 8
Avri Altmana2d7b872013-07-09 01:42:17 +0300914#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
915#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
916#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
917#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
918#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
919#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
920#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
921
Johannes Berg8ca151b2013-01-24 14:25:36 +0100922#define IWL_RX_INFO_AGC_IDX 1
923#define IWL_RX_INFO_RSSI_AB_IDX 2
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200924#define IWL_OFDM_AGC_A_MSK 0x0000007f
925#define IWL_OFDM_AGC_A_POS 0
926#define IWL_OFDM_AGC_B_MSK 0x00003f80
927#define IWL_OFDM_AGC_B_POS 7
928#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
929#define IWL_OFDM_AGC_CODE_POS 20
Johannes Berg8ca151b2013-01-24 14:25:36 +0100930#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100931#define IWL_OFDM_RSSI_A_POS 0
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200932#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
933#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
Johannes Berg8ca151b2013-01-24 14:25:36 +0100934#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
Johannes Berg8ca151b2013-01-24 14:25:36 +0100935#define IWL_OFDM_RSSI_B_POS 16
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200936#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
937#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
Johannes Berg8ca151b2013-01-24 14:25:36 +0100938
939/**
940 * struct iwl_rx_phy_info - phy info
941 * (REPLY_RX_PHY_CMD = 0xc0)
942 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
943 * @cfg_phy_cnt: configurable DSP phy data byte count
944 * @stat_id: configurable DSP phy data set ID
945 * @reserved1:
946 * @system_timestamp: GP2 at on air rise
947 * @timestamp: TSF at on air rise
948 * @beacon_time_stamp: beacon at on-air rise
949 * @phy_flags: general phy flags: band, modulation, ...
950 * @channel: channel number
951 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
952 * @rate_n_flags: RATE_MCS_*
953 * @byte_count: frame's byte-count
954 * @frame_time: frame's time on the air, based on byte count and frame rate
955 * calculation
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +0200956 * @mac_active_msk: what MACs were active when the frame was received
Johannes Berg8ca151b2013-01-24 14:25:36 +0100957 *
958 * Before each Rx, the device sends this data. It contains PHY information
959 * about the reception of the packet.
960 */
961struct iwl_rx_phy_info {
962 u8 non_cfg_phy_cnt;
963 u8 cfg_phy_cnt;
964 u8 stat_id;
965 u8 reserved1;
966 __le32 system_timestamp;
967 __le64 timestamp;
968 __le32 beacon_time_stamp;
969 __le16 phy_flags;
970 __le16 channel;
971 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
972 __le32 rate_n_flags;
973 __le32 byte_count;
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +0200974 __le16 mac_active_msk;
Johannes Berg8ca151b2013-01-24 14:25:36 +0100975 __le16 frame_time;
976} __packed;
977
978struct iwl_rx_mpdu_res_start {
979 __le16 byte_count;
980 __le16 reserved;
981} __packed;
982
983/**
984 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
985 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
986 * @RX_RES_PHY_FLAGS_MOD_CCK:
987 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
988 * @RX_RES_PHY_FLAGS_NARROW_BAND:
989 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
990 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
991 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
992 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
993 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
994 */
995enum iwl_rx_phy_flags {
996 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
997 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
998 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
999 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
1000 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
1001 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
1002 RX_RES_PHY_FLAGS_AGG = BIT(7),
1003 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
1004 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1005 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1006};
1007
1008/**
1009 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1010 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1011 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1012 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1013 * @RX_MPDU_RES_STATUS_KEY_VALID:
1014 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1015 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1016 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1017 * in the driver.
1018 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1019 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1020 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1021 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1022 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1023 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1024 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1025 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1026 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1027 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1028 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1029 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1030 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1031 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1032 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1033 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1034 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1035 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1036 * @RX_MPDU_RES_STATUS_RRF_KILL:
1037 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1038 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1039 */
1040enum iwl_mvm_rx_status {
1041 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1042 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1043 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1044 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1045 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1046 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1047 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1048 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1049 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1050 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1051 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1052 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1053 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
Max Stepanove36e5432013-08-27 19:56:13 +03001054 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
Johannes Berg8ca151b2013-01-24 14:25:36 +01001055 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1056 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1057 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1058 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1059 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1060 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1061 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1062 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1063 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1064 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1065 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1066 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1067 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1068};
1069
1070/**
1071 * struct iwl_radio_version_notif - information on the radio version
1072 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1073 * @radio_flavor:
1074 * @radio_step:
1075 * @radio_dash:
1076 */
1077struct iwl_radio_version_notif {
1078 __le32 radio_flavor;
1079 __le32 radio_step;
1080 __le32 radio_dash;
1081} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1082
1083enum iwl_card_state_flags {
1084 CARD_ENABLED = 0x00,
1085 HW_CARD_DISABLED = 0x01,
1086 SW_CARD_DISABLED = 0x02,
1087 CT_KILL_CARD_DISABLED = 0x04,
1088 HALT_CARD_DISABLED = 0x08,
1089 CARD_DISABLED_MSK = 0x0f,
1090 CARD_IS_RX_ON = 0x10,
1091};
1092
1093/**
1094 * struct iwl_radio_version_notif - information on the radio version
1095 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1096 * @flags: %iwl_card_state_flags
1097 */
1098struct iwl_card_state_notif {
1099 __le32 flags;
1100} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1101
1102/**
Hila Gonend64048e2013-03-13 18:00:03 +02001103 * struct iwl_missed_beacons_notif - information on missed beacons
1104 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1105 * @mac_id: interface ID
1106 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1107 * beacons since last RX.
1108 * @consec_missed_beacons: number of consecutive missed beacons
1109 * @num_expected_beacons:
1110 * @num_recvd_beacons:
1111 */
1112struct iwl_missed_beacons_notif {
1113 __le32 mac_id;
1114 __le32 consec_missed_beacons_since_last_rx;
1115 __le32 consec_missed_beacons;
1116 __le32 num_expected_beacons;
1117 __le32 num_recvd_beacons;
1118} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1119
1120/**
Johannes Berg8ca151b2013-01-24 14:25:36 +01001121 * struct iwl_set_calib_default_cmd - set default value for calibration.
1122 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1123 * @calib_index: the calibration to set value for
1124 * @length: of data
1125 * @data: the value to set for the calibration result
1126 */
1127struct iwl_set_calib_default_cmd {
1128 __le16 calib_index;
1129 __le16 length;
1130 u8 data[0];
1131} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1132
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001133#define MAX_PORT_ID_NUM 2
Eliad Pellere59647e2013-11-28 14:08:50 +02001134#define MAX_MCAST_FILTERING_ADDRESSES 256
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +03001135
1136/**
1137 * struct iwl_mcast_filter_cmd - configure multicast filter.
1138 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1139 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1140 * to identify network interface adopted in host-device IF.
1141 * It is used by FW as index in array of addresses. This array has
1142 * MAX_PORT_ID_NUM members.
1143 * @count: Number of MAC addresses in the array
1144 * @pass_all: Set 1 to pass all multicast packets.
1145 * @bssid: current association BSSID.
1146 * @addr_list: Place holder for array of MAC addresses.
1147 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1148 */
1149struct iwl_mcast_filter_cmd {
1150 u8 filter_own;
1151 u8 port_id;
1152 u8 count;
1153 u8 pass_all;
1154 u8 bssid[6];
1155 u8 reserved[2];
1156 u8 addr_list[0];
1157} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1158
Eliad Pellerc87163b2014-01-08 10:11:11 +02001159#define MAX_BCAST_FILTERS 8
1160#define MAX_BCAST_FILTER_ATTRS 2
1161
1162/**
1163 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1164 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1165 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1166 * start of ip payload).
1167 */
1168enum iwl_mvm_bcast_filter_attr_offset {
1169 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1170 BCAST_FILTER_OFFSET_IP_END = 1,
1171};
1172
1173/**
1174 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1175 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1176 * @offset: starting offset of this pattern.
1177 * @val: value to match - big endian (MSB is the first
1178 * byte to match from offset pos).
1179 * @mask: mask to match (big endian).
1180 */
1181struct iwl_fw_bcast_filter_attr {
1182 u8 offset_type;
1183 u8 offset;
1184 __le16 reserved1;
1185 __be32 val;
1186 __be32 mask;
1187} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1188
1189/**
1190 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1191 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1192 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1193 */
1194enum iwl_mvm_bcast_filter_frame_type {
1195 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1196 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1197};
1198
1199/**
1200 * struct iwl_fw_bcast_filter - broadcast filter
1201 * @discard: discard frame (1) or let it pass (0).
1202 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1203 * @num_attrs: number of valid attributes in this filter.
1204 * @attrs: attributes of this filter. a filter is considered matched
1205 * only when all its attributes are matched (i.e. AND relationship)
1206 */
1207struct iwl_fw_bcast_filter {
1208 u8 discard;
1209 u8 frame_type;
1210 u8 num_attrs;
1211 u8 reserved1;
1212 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1213} __packed; /* BCAST_FILTER_S_VER_1 */
1214
1215/**
1216 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1217 * @default_discard: default action for this mac (discard (1) / pass (0)).
1218 * @attached_filters: bitmap of relevant filters for this mac.
1219 */
1220struct iwl_fw_bcast_mac {
1221 u8 default_discard;
1222 u8 reserved1;
1223 __le16 attached_filters;
1224} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1225
1226/**
1227 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1228 * @disable: enable (0) / disable (1)
1229 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1230 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1231 * @filters: broadcast filters
1232 * @macs: broadcast filtering configuration per-mac
1233 */
1234struct iwl_bcast_filter_cmd {
1235 u8 disable;
1236 u8 max_bcast_filters;
1237 u8 max_macs;
1238 u8 reserved1;
1239 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1240 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1241} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1242
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001243struct mvm_statistics_dbg {
1244 __le32 burst_check;
1245 __le32 burst_count;
1246 __le32 wait_for_silence_timeout_cnt;
1247 __le32 reserved[3];
1248} __packed; /* STATISTICS_DEBUG_API_S_VER_2 */
1249
1250struct mvm_statistics_div {
1251 __le32 tx_on_a;
1252 __le32 tx_on_b;
1253 __le32 exec_time;
1254 __le32 probe_time;
1255 __le32 rssi_ant;
1256 __le32 reserved2;
1257} __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */
1258
1259struct mvm_statistics_general_common {
1260 __le32 temperature; /* radio temperature */
1261 __le32 temperature_m; /* radio voltage */
1262 struct mvm_statistics_dbg dbg;
1263 __le32 sleep_time;
1264 __le32 slots_out;
1265 __le32 slots_idle;
1266 __le32 ttl_timestamp;
1267 struct mvm_statistics_div div;
1268 __le32 rx_enable_counter;
1269 /*
1270 * num_of_sos_states:
1271 * count the number of times we have to re-tune
1272 * in order to get out of bad PHY status
1273 */
1274 __le32 num_of_sos_states;
1275} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1276
1277struct mvm_statistics_rx_non_phy {
1278 __le32 bogus_cts; /* CTS received when not expecting CTS */
1279 __le32 bogus_ack; /* ACK received when not expecting ACK */
1280 __le32 non_bssid_frames; /* number of frames with BSSID that
1281 * doesn't belong to the STA BSSID */
1282 __le32 filtered_frames; /* count frames that were dumped in the
1283 * filtering process */
1284 __le32 non_channel_beacons; /* beacons with our bss id but not on
1285 * our serving channel */
1286 __le32 channel_beacons; /* beacons with our bss id and in our
1287 * serving channel */
1288 __le32 num_missed_bcon; /* number of missed beacons */
1289 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
1290 * ADC was in saturation */
1291 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
1292 * for INA */
1293 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
1294 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
1295 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
1296 __le32 interference_data_flag; /* flag for interference data
1297 * availability. 1 when data is
1298 * available. */
1299 __le32 channel_load; /* counts RX Enable time in uSec */
1300 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
1301 * and CCK) counter */
1302 __le32 beacon_rssi_a;
1303 __le32 beacon_rssi_b;
1304 __le32 beacon_rssi_c;
1305 __le32 beacon_energy_a;
1306 __le32 beacon_energy_b;
1307 __le32 beacon_energy_c;
1308 __le32 num_bt_kills;
1309 __le32 mac_id;
1310 __le32 directed_data_mpdu;
1311} __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */
1312
1313struct mvm_statistics_rx_phy {
1314 __le32 ina_cnt;
1315 __le32 fina_cnt;
1316 __le32 plcp_err;
1317 __le32 crc32_err;
1318 __le32 overrun_err;
1319 __le32 early_overrun_err;
1320 __le32 crc32_good;
1321 __le32 false_alarm_cnt;
1322 __le32 fina_sync_err_cnt;
1323 __le32 sfd_timeout;
1324 __le32 fina_timeout;
1325 __le32 unresponded_rts;
1326 __le32 rxe_frame_limit_overrun;
1327 __le32 sent_ack_cnt;
1328 __le32 sent_cts_cnt;
1329 __le32 sent_ba_rsp_cnt;
1330 __le32 dsp_self_kill;
1331 __le32 mh_format_err;
1332 __le32 re_acq_main_rssi_sum;
1333 __le32 reserved;
1334} __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */
1335
1336struct mvm_statistics_rx_ht_phy {
1337 __le32 plcp_err;
1338 __le32 overrun_err;
1339 __le32 early_overrun_err;
1340 __le32 crc32_good;
1341 __le32 crc32_err;
1342 __le32 mh_format_err;
1343 __le32 agg_crc32_good;
1344 __le32 agg_mpdu_cnt;
1345 __le32 agg_cnt;
1346 __le32 unsupport_mcs;
1347} __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */
1348
1349#define MAX_CHAINS 3
1350
1351struct mvm_statistics_tx_non_phy_agg {
1352 __le32 ba_timeout;
1353 __le32 ba_reschedule_frames;
1354 __le32 scd_query_agg_frame_cnt;
1355 __le32 scd_query_no_agg;
1356 __le32 scd_query_agg;
1357 __le32 scd_query_mismatch;
1358 __le32 frame_not_ready;
1359 __le32 underrun;
1360 __le32 bt_prio_kill;
1361 __le32 rx_ba_rsp_cnt;
1362 __s8 txpower[MAX_CHAINS];
1363 __s8 reserved;
1364 __le32 reserved2;
1365} __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
1366
1367struct mvm_statistics_tx_channel_width {
1368 __le32 ext_cca_narrow_ch20[1];
1369 __le32 ext_cca_narrow_ch40[2];
1370 __le32 ext_cca_narrow_ch80[3];
1371 __le32 ext_cca_narrow_ch160[4];
1372 __le32 last_tx_ch_width_indx;
1373 __le32 rx_detected_per_ch_width[4];
1374 __le32 success_per_ch_width[4];
1375 __le32 fail_per_ch_width[4];
1376}; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
1377
1378struct mvm_statistics_tx {
1379 __le32 preamble_cnt;
1380 __le32 rx_detected_cnt;
1381 __le32 bt_prio_defer_cnt;
1382 __le32 bt_prio_kill_cnt;
1383 __le32 few_bytes_cnt;
1384 __le32 cts_timeout;
1385 __le32 ack_timeout;
1386 __le32 expected_ack_cnt;
1387 __le32 actual_ack_cnt;
1388 __le32 dump_msdu_cnt;
1389 __le32 burst_abort_next_frame_mismatch_cnt;
1390 __le32 burst_abort_missing_next_frame_cnt;
1391 __le32 cts_timeout_collision;
1392 __le32 ack_or_ba_timeout_collision;
1393 struct mvm_statistics_tx_non_phy_agg agg;
1394 struct mvm_statistics_tx_channel_width channel_width;
1395} __packed; /* STATISTICS_TX_API_S_VER_4 */
1396
1397
1398struct mvm_statistics_bt_activity {
1399 __le32 hi_priority_tx_req_cnt;
1400 __le32 hi_priority_tx_denied_cnt;
1401 __le32 lo_priority_tx_req_cnt;
1402 __le32 lo_priority_tx_denied_cnt;
1403 __le32 hi_priority_rx_req_cnt;
1404 __le32 hi_priority_rx_denied_cnt;
1405 __le32 lo_priority_rx_req_cnt;
1406 __le32 lo_priority_rx_denied_cnt;
1407} __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */
1408
1409struct mvm_statistics_general {
1410 struct mvm_statistics_general_common common;
1411 __le32 beacon_filtered;
1412 __le32 missed_beacons;
Andrei Otcheretianskia20fd392013-07-21 17:23:59 +03001413 __s8 beacon_filter_average_energy;
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001414 __s8 beacon_filter_reason;
1415 __s8 beacon_filter_current_energy;
1416 __s8 beacon_filter_reserved;
1417 __le32 beacon_filter_delta_time;
1418 struct mvm_statistics_bt_activity bt_activity;
1419} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1420
1421struct mvm_statistics_rx {
1422 struct mvm_statistics_rx_phy ofdm;
1423 struct mvm_statistics_rx_phy cck;
1424 struct mvm_statistics_rx_non_phy general;
1425 struct mvm_statistics_rx_ht_phy ofdm_ht;
1426} __packed; /* STATISTICS_RX_API_S_VER_3 */
1427
1428/*
1429 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
1430 *
1431 * By default, uCode issues this notification after receiving a beacon
1432 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
1433 * REPLY_STATISTICS_CMD 0x9c, above.
1434 *
1435 * Statistics counters continue to increment beacon after beacon, but are
1436 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
1437 * 0x9c with CLEAR_STATS bit set (see above).
1438 *
1439 * uCode also issues this notification during scans. uCode clears statistics
1440 * appropriately so that each notification contains statistics for only the
1441 * one channel that has just been scanned.
1442 */
1443
1444struct iwl_notif_statistics { /* STATISTICS_NTFY_API_S_VER_8 */
1445 __le32 flag;
1446 struct mvm_statistics_rx rx;
1447 struct mvm_statistics_tx tx;
1448 struct mvm_statistics_general general;
1449} __packed;
1450
Lilach Edelstein1f3b0ff2013-10-06 13:03:32 +02001451/***********************************
1452 * Smart Fifo API
1453 ***********************************/
1454/* Smart Fifo state */
1455enum iwl_sf_state {
1456 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1457 SF_FULL_ON,
1458 SF_UNINIT,
1459 SF_INIT_OFF,
1460 SF_HW_NUM_STATES
1461};
1462
1463/* Smart Fifo possible scenario */
1464enum iwl_sf_scenario {
1465 SF_SCENARIO_SINGLE_UNICAST,
1466 SF_SCENARIO_AGG_UNICAST,
1467 SF_SCENARIO_MULTICAST,
1468 SF_SCENARIO_BA_RESP,
1469 SF_SCENARIO_TX_RESP,
1470 SF_NUM_SCENARIO
1471};
1472
1473#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1474#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1475
1476/* smart FIFO default values */
1477#define SF_W_MARK_SISO 4096
1478#define SF_W_MARK_MIMO2 8192
1479#define SF_W_MARK_MIMO3 6144
1480#define SF_W_MARK_LEGACY 4096
1481#define SF_W_MARK_SCAN 4096
1482
1483/* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */
1484#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1485#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1486#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1487#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1488#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1489#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1490#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1491#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1492#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1493#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1494
1495#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1496
1497/**
1498 * Smart Fifo configuration command.
1499 * @state: smart fifo state, types listed in iwl_sf_sate.
1500 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1501 * @long_delay_timeouts: aging and idle timer values for each scenario
1502 * in long delay state.
1503 * @full_on_timeouts: timer values for each scenario in full on state.
1504 */
1505struct iwl_sf_cfg_cmd {
1506 enum iwl_sf_state state;
1507 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1508 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1509 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1510} __packed; /* SF_CFG_API_S_VER_2 */
1511
Johannes Berg8ca151b2013-01-24 14:25:36 +01001512#endif /* __fw_api_h__ */