Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 3 | * hda_intel.c - Implementation of primary alsa driver code base |
| 4 | * for Intel HD Audio. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * Copyright(c) 2004 Intel Corporation. All rights reserved. |
| 7 | * |
| 8 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> |
| 9 | * PeiSen Hou <pshou@realtek.com.tw> |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify it |
| 12 | * under the terms of the GNU General Public License as published by the Free |
| 13 | * Software Foundation; either version 2 of the License, or (at your option) |
| 14 | * any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 19 | * more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License along with |
| 22 | * this program; if not, write to the Free Software Foundation, Inc., 59 |
| 23 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 24 | * |
| 25 | * CONTACTS: |
| 26 | * |
| 27 | * Matt Jared matt.jared@intel.com |
| 28 | * Andy Kopp andy.kopp@intel.com |
| 29 | * Dan Kogan dan.d.kogan@intel.com |
| 30 | * |
| 31 | * CHANGES: |
| 32 | * |
| 33 | * 2004.12.01 Major rewrite by tiwai, merged the work of pshou |
| 34 | * |
| 35 | */ |
| 36 | |
| 37 | #include <sound/driver.h> |
| 38 | #include <asm/io.h> |
| 39 | #include <linux/delay.h> |
| 40 | #include <linux/interrupt.h> |
Randy Dunlap | 362775e | 2005-11-07 14:43:23 +0100 | [diff] [blame] | 41 | #include <linux/kernel.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 | #include <linux/module.h> |
| 43 | #include <linux/moduleparam.h> |
| 44 | #include <linux/init.h> |
| 45 | #include <linux/slab.h> |
| 46 | #include <linux/pci.h> |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 47 | #include <linux/mutex.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <sound/core.h> |
| 49 | #include <sound/initval.h> |
| 50 | #include "hda_codec.h" |
| 51 | |
| 52 | |
Clemens Ladisch | b7fe462 | 2005-10-04 08:46:51 +0200 | [diff] [blame] | 53 | static int index = SNDRV_DEFAULT_IDX1; |
| 54 | static char *id = SNDRV_DEFAULT_STR1; |
| 55 | static char *model; |
| 56 | static int position_fix; |
Matt Porter | 954fa19 | 2005-11-29 14:46:01 +0100 | [diff] [blame] | 57 | static int probe_mask = -1; |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 58 | static int single_cmd; |
Takashi Iwai | 134a11f | 2006-11-10 12:08:37 +0100 | [diff] [blame] | 59 | static int enable_msi; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | |
Clemens Ladisch | b7fe462 | 2005-10-04 08:46:51 +0200 | [diff] [blame] | 61 | module_param(index, int, 0444); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | MODULE_PARM_DESC(index, "Index value for Intel HD audio interface."); |
Clemens Ladisch | b7fe462 | 2005-10-04 08:46:51 +0200 | [diff] [blame] | 63 | module_param(id, charp, 0444); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | MODULE_PARM_DESC(id, "ID string for Intel HD audio interface."); |
Clemens Ladisch | b7fe462 | 2005-10-04 08:46:51 +0200 | [diff] [blame] | 65 | module_param(model, charp, 0444); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | MODULE_PARM_DESC(model, "Use the given board model."); |
Clemens Ladisch | b7fe462 | 2005-10-04 08:46:51 +0200 | [diff] [blame] | 67 | module_param(position_fix, int, 0444); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 68 | MODULE_PARM_DESC(position_fix, "Fix DMA pointer " |
| 69 | "(0 = auto, 1 = none, 2 = POSBUF, 3 = FIFO size)."); |
Takashi Iwai | 606ad75 | 2005-11-24 16:03:40 +0100 | [diff] [blame] | 70 | module_param(probe_mask, int, 0444); |
| 71 | MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1)."); |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 72 | module_param(single_cmd, bool, 0444); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 73 | MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs " |
| 74 | "(for debugging only)."); |
Takashi Iwai | 134a11f | 2006-11-10 12:08:37 +0100 | [diff] [blame] | 75 | module_param(enable_msi, int, 0); |
| 76 | MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)"); |
Takashi Iwai | 606ad75 | 2005-11-24 16:03:40 +0100 | [diff] [blame] | 77 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | |
Takashi Iwai | 2b3e584 | 2005-10-06 13:47:23 +0200 | [diff] [blame] | 79 | /* just for backward compatibility */ |
| 80 | static int enable; |
Takashi Iwai | 698444f | 2005-10-20 16:53:49 +0200 | [diff] [blame] | 81 | module_param(enable, bool, 0444); |
Takashi Iwai | 2b3e584 | 2005-10-06 13:47:23 +0200 | [diff] [blame] | 82 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | MODULE_LICENSE("GPL"); |
| 84 | MODULE_SUPPORTED_DEVICE("{{Intel, ICH6}," |
| 85 | "{Intel, ICH6M}," |
Jason Gaston | 2f1b381 | 2005-05-01 08:58:50 -0700 | [diff] [blame] | 86 | "{Intel, ICH7}," |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 87 | "{Intel, ESB2}," |
Jason Gaston | d298139 | 2006-01-10 11:07:37 +0100 | [diff] [blame] | 88 | "{Intel, ICH8}," |
Jason Gaston | f9cc8a8 | 2006-11-22 11:53:52 +0100 | [diff] [blame] | 89 | "{Intel, ICH9}," |
Takashi Iwai | fc20a56 | 2005-05-12 15:00:41 +0200 | [diff] [blame] | 90 | "{ATI, SB450}," |
Felix Kuehling | 89be83f | 2006-03-31 12:33:59 +0200 | [diff] [blame] | 91 | "{ATI, SB600}," |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 92 | "{ATI, RS600}," |
Felix Kuehling | 5b15c95 | 2006-10-16 12:49:47 +0200 | [diff] [blame] | 93 | "{ATI, RS690}," |
Wolke Liu | e6db111 | 2007-04-27 12:20:57 +0200 | [diff] [blame] | 94 | "{ATI, RS780}," |
| 95 | "{ATI, R600}," |
Takashi Iwai | fc20a56 | 2005-05-12 15:00:41 +0200 | [diff] [blame] | 96 | "{VIA, VT8251}," |
Takashi Iwai | 4767231 | 2005-08-12 16:44:04 +0200 | [diff] [blame] | 97 | "{VIA, VT8237A}," |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 98 | "{SiS, SIS966}," |
| 99 | "{ULI, M5461}}"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 100 | MODULE_DESCRIPTION("Intel HDA driver"); |
| 101 | |
| 102 | #define SFX "hda-intel: " |
| 103 | |
| 104 | /* |
| 105 | * registers |
| 106 | */ |
| 107 | #define ICH6_REG_GCAP 0x00 |
| 108 | #define ICH6_REG_VMIN 0x02 |
| 109 | #define ICH6_REG_VMAJ 0x03 |
| 110 | #define ICH6_REG_OUTPAY 0x04 |
| 111 | #define ICH6_REG_INPAY 0x06 |
| 112 | #define ICH6_REG_GCTL 0x08 |
| 113 | #define ICH6_REG_WAKEEN 0x0c |
| 114 | #define ICH6_REG_STATESTS 0x0e |
| 115 | #define ICH6_REG_GSTS 0x10 |
| 116 | #define ICH6_REG_INTCTL 0x20 |
| 117 | #define ICH6_REG_INTSTS 0x24 |
| 118 | #define ICH6_REG_WALCLK 0x30 |
| 119 | #define ICH6_REG_SYNC 0x34 |
| 120 | #define ICH6_REG_CORBLBASE 0x40 |
| 121 | #define ICH6_REG_CORBUBASE 0x44 |
| 122 | #define ICH6_REG_CORBWP 0x48 |
| 123 | #define ICH6_REG_CORBRP 0x4A |
| 124 | #define ICH6_REG_CORBCTL 0x4c |
| 125 | #define ICH6_REG_CORBSTS 0x4d |
| 126 | #define ICH6_REG_CORBSIZE 0x4e |
| 127 | |
| 128 | #define ICH6_REG_RIRBLBASE 0x50 |
| 129 | #define ICH6_REG_RIRBUBASE 0x54 |
| 130 | #define ICH6_REG_RIRBWP 0x58 |
| 131 | #define ICH6_REG_RINTCNT 0x5a |
| 132 | #define ICH6_REG_RIRBCTL 0x5c |
| 133 | #define ICH6_REG_RIRBSTS 0x5d |
| 134 | #define ICH6_REG_RIRBSIZE 0x5e |
| 135 | |
| 136 | #define ICH6_REG_IC 0x60 |
| 137 | #define ICH6_REG_IR 0x64 |
| 138 | #define ICH6_REG_IRS 0x68 |
| 139 | #define ICH6_IRS_VALID (1<<1) |
| 140 | #define ICH6_IRS_BUSY (1<<0) |
| 141 | |
| 142 | #define ICH6_REG_DPLBASE 0x70 |
| 143 | #define ICH6_REG_DPUBASE 0x74 |
| 144 | #define ICH6_DPLBASE_ENABLE 0x1 /* Enable position buffer */ |
| 145 | |
| 146 | /* SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */ |
| 147 | enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; |
| 148 | |
| 149 | /* stream register offsets from stream base */ |
| 150 | #define ICH6_REG_SD_CTL 0x00 |
| 151 | #define ICH6_REG_SD_STS 0x03 |
| 152 | #define ICH6_REG_SD_LPIB 0x04 |
| 153 | #define ICH6_REG_SD_CBL 0x08 |
| 154 | #define ICH6_REG_SD_LVI 0x0c |
| 155 | #define ICH6_REG_SD_FIFOW 0x0e |
| 156 | #define ICH6_REG_SD_FIFOSIZE 0x10 |
| 157 | #define ICH6_REG_SD_FORMAT 0x12 |
| 158 | #define ICH6_REG_SD_BDLPL 0x18 |
| 159 | #define ICH6_REG_SD_BDLPU 0x1c |
| 160 | |
| 161 | /* PCI space */ |
| 162 | #define ICH6_PCIREG_TCSEL 0x44 |
| 163 | |
| 164 | /* |
| 165 | * other constants |
| 166 | */ |
| 167 | |
| 168 | /* max number of SDs */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 169 | /* ICH, ATI and VIA have 4 playback and 4 capture */ |
| 170 | #define ICH6_CAPTURE_INDEX 0 |
| 171 | #define ICH6_NUM_CAPTURE 4 |
| 172 | #define ICH6_PLAYBACK_INDEX 4 |
| 173 | #define ICH6_NUM_PLAYBACK 4 |
| 174 | |
| 175 | /* ULI has 6 playback and 5 capture */ |
| 176 | #define ULI_CAPTURE_INDEX 0 |
| 177 | #define ULI_NUM_CAPTURE 5 |
| 178 | #define ULI_PLAYBACK_INDEX 5 |
| 179 | #define ULI_NUM_PLAYBACK 6 |
| 180 | |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 181 | /* ATI HDMI has 1 playback and 0 capture */ |
| 182 | #define ATIHDMI_CAPTURE_INDEX 0 |
| 183 | #define ATIHDMI_NUM_CAPTURE 0 |
| 184 | #define ATIHDMI_PLAYBACK_INDEX 0 |
| 185 | #define ATIHDMI_NUM_PLAYBACK 1 |
| 186 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 187 | /* this number is statically defined for simplicity */ |
| 188 | #define MAX_AZX_DEV 16 |
| 189 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | /* max number of fragments - we may use more if allocating more pages for BDL */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 191 | #define BDL_SIZE PAGE_ALIGN(8192) |
| 192 | #define AZX_MAX_FRAG (BDL_SIZE / (MAX_AZX_DEV * 16)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | /* max buffer size - no h/w limit, you can increase as you like */ |
| 194 | #define AZX_MAX_BUF_SIZE (1024*1024*1024) |
| 195 | /* max number of PCM devics per card */ |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 196 | #define AZX_MAX_AUDIO_PCMS 6 |
| 197 | #define AZX_MAX_MODEM_PCMS 2 |
| 198 | #define AZX_MAX_PCMS (AZX_MAX_AUDIO_PCMS + AZX_MAX_MODEM_PCMS) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | |
| 200 | /* RIRB int mask: overrun[2], response[0] */ |
| 201 | #define RIRB_INT_RESPONSE 0x01 |
| 202 | #define RIRB_INT_OVERRUN 0x04 |
| 203 | #define RIRB_INT_MASK 0x05 |
| 204 | |
| 205 | /* STATESTS int mask: SD2,SD1,SD0 */ |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 206 | #define AZX_MAX_CODECS 3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | #define STATESTS_INT_MASK 0x07 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | |
| 209 | /* SD_CTL bits */ |
| 210 | #define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */ |
| 211 | #define SD_CTL_DMA_START 0x02 /* stream DMA start bit */ |
| 212 | #define SD_CTL_STREAM_TAG_MASK (0xf << 20) |
| 213 | #define SD_CTL_STREAM_TAG_SHIFT 20 |
| 214 | |
| 215 | /* SD_CTL and SD_STS */ |
| 216 | #define SD_INT_DESC_ERR 0x10 /* descriptor error interrupt */ |
| 217 | #define SD_INT_FIFO_ERR 0x08 /* FIFO error interrupt */ |
| 218 | #define SD_INT_COMPLETE 0x04 /* completion interrupt */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 219 | #define SD_INT_MASK (SD_INT_DESC_ERR|SD_INT_FIFO_ERR|\ |
| 220 | SD_INT_COMPLETE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 221 | |
| 222 | /* SD_STS */ |
| 223 | #define SD_STS_FIFO_READY 0x20 /* FIFO ready */ |
| 224 | |
| 225 | /* INTCTL and INTSTS */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 226 | #define ICH6_INT_ALL_STREAM 0xff /* all stream interrupts */ |
| 227 | #define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ |
| 228 | #define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 229 | |
Matt | 41e2fce | 2005-07-04 17:49:55 +0200 | [diff] [blame] | 230 | /* GCTL unsolicited response enable bit */ |
| 231 | #define ICH6_GCTL_UREN (1<<8) |
| 232 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | /* GCTL reset bit */ |
| 234 | #define ICH6_GCTL_RESET (1<<0) |
| 235 | |
| 236 | /* CORB/RIRB control, read/write pointer */ |
| 237 | #define ICH6_RBCTL_DMA_EN 0x02 /* enable DMA */ |
| 238 | #define ICH6_RBCTL_IRQ_EN 0x01 /* enable IRQ */ |
| 239 | #define ICH6_RBRWP_CLR 0x8000 /* read/write pointer clear */ |
| 240 | /* below are so far hardcoded - should read registers in future */ |
| 241 | #define ICH6_MAX_CORB_ENTRIES 256 |
| 242 | #define ICH6_MAX_RIRB_ENTRIES 256 |
| 243 | |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 244 | /* position fix mode */ |
| 245 | enum { |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 246 | POS_FIX_AUTO, |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 247 | POS_FIX_NONE, |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 248 | POS_FIX_POSBUF, |
| 249 | POS_FIX_FIFO, |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 250 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 252 | /* Defines for ATI HD Audio support in SB450 south bridge */ |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 253 | #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42 |
| 254 | #define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02 |
| 255 | |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 256 | /* Defines for Nvidia HDA support */ |
| 257 | #define NVIDIA_HDA_TRANSREG_ADDR 0x4e |
| 258 | #define NVIDIA_HDA_ENABLE_COHBITS 0x0f |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 259 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | */ |
| 262 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 263 | struct azx_dev { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 264 | u32 *bdl; /* virtual address of the BDL */ |
| 265 | dma_addr_t bdl_addr; /* physical address of the BDL */ |
| 266 | u32 *posbuf; /* position buffer pointer */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 268 | unsigned int bufsize; /* size of the play buffer in bytes */ |
| 269 | unsigned int fragsize; /* size of each period in bytes */ |
| 270 | unsigned int frags; /* number for period in the play buffer */ |
| 271 | unsigned int fifo_size; /* FIFO size */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 272 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 273 | void __iomem *sd_addr; /* stream descriptor pointer */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 274 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 275 | u32 sd_int_sta_mask; /* stream int status mask */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | |
| 277 | /* pcm support */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 278 | struct snd_pcm_substream *substream; /* assigned substream, |
| 279 | * set in PCM open |
| 280 | */ |
| 281 | unsigned int format_val; /* format value to be set in the |
| 282 | * controller and the codec |
| 283 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | unsigned char stream_tag; /* assigned stream */ |
| 285 | unsigned char index; /* stream index */ |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 286 | /* for sanity check of position buffer */ |
| 287 | unsigned int period_intr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 289 | unsigned int opened :1; |
| 290 | unsigned int running :1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | }; |
| 292 | |
| 293 | /* CORB/RIRB */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 294 | struct azx_rb { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 295 | u32 *buf; /* CORB/RIRB buffer |
| 296 | * Each CORB entry is 4byte, RIRB is 8byte |
| 297 | */ |
| 298 | dma_addr_t addr; /* physical address of CORB/RIRB buffer */ |
| 299 | /* for RIRB */ |
| 300 | unsigned short rp, wp; /* read/write pointers */ |
| 301 | int cmds; /* number of pending requests */ |
| 302 | u32 res; /* last read value */ |
| 303 | }; |
| 304 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 305 | struct azx { |
| 306 | struct snd_card *card; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | struct pci_dev *pci; |
| 308 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 309 | /* chip type specific */ |
| 310 | int driver_type; |
| 311 | int playback_streams; |
| 312 | int playback_index_offset; |
| 313 | int capture_streams; |
| 314 | int capture_index_offset; |
| 315 | int num_streams; |
| 316 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 317 | /* pci resources */ |
| 318 | unsigned long addr; |
| 319 | void __iomem *remap_addr; |
| 320 | int irq; |
| 321 | |
| 322 | /* locks */ |
| 323 | spinlock_t reg_lock; |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 324 | struct mutex open_mutex; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 326 | /* streams (x num_streams) */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 327 | struct azx_dev *azx_dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 328 | |
| 329 | /* PCM */ |
| 330 | unsigned int pcm_devs; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 331 | struct snd_pcm *pcm[AZX_MAX_PCMS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | |
| 333 | /* HD codec */ |
| 334 | unsigned short codec_mask; |
| 335 | struct hda_bus *bus; |
| 336 | |
| 337 | /* CORB/RIRB */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 338 | struct azx_rb corb; |
| 339 | struct azx_rb rirb; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 340 | |
| 341 | /* BDL, CORB/RIRB and position buffers */ |
| 342 | struct snd_dma_buffer bdl; |
| 343 | struct snd_dma_buffer rb; |
| 344 | struct snd_dma_buffer posbuf; |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 345 | |
| 346 | /* flags */ |
| 347 | int position_fix; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 348 | unsigned int initialized :1; |
| 349 | unsigned int single_cmd :1; |
| 350 | unsigned int polling_mode :1; |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 351 | unsigned int msi :1; |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 352 | |
| 353 | /* for debugging */ |
| 354 | unsigned int last_cmd; /* last issued command (to sync) */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | }; |
| 356 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 357 | /* driver types */ |
| 358 | enum { |
| 359 | AZX_DRIVER_ICH, |
| 360 | AZX_DRIVER_ATI, |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 361 | AZX_DRIVER_ATIHDMI, |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 362 | AZX_DRIVER_VIA, |
| 363 | AZX_DRIVER_SIS, |
| 364 | AZX_DRIVER_ULI, |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 365 | AZX_DRIVER_NVIDIA, |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 366 | }; |
| 367 | |
| 368 | static char *driver_short_names[] __devinitdata = { |
| 369 | [AZX_DRIVER_ICH] = "HDA Intel", |
| 370 | [AZX_DRIVER_ATI] = "HDA ATI SB", |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 371 | [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI", |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 372 | [AZX_DRIVER_VIA] = "HDA VIA VT82xx", |
| 373 | [AZX_DRIVER_SIS] = "HDA SIS966", |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 374 | [AZX_DRIVER_ULI] = "HDA ULI M5461", |
| 375 | [AZX_DRIVER_NVIDIA] = "HDA NVidia", |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 376 | }; |
| 377 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | /* |
| 379 | * macros for easy use |
| 380 | */ |
| 381 | #define azx_writel(chip,reg,value) \ |
| 382 | writel(value, (chip)->remap_addr + ICH6_REG_##reg) |
| 383 | #define azx_readl(chip,reg) \ |
| 384 | readl((chip)->remap_addr + ICH6_REG_##reg) |
| 385 | #define azx_writew(chip,reg,value) \ |
| 386 | writew(value, (chip)->remap_addr + ICH6_REG_##reg) |
| 387 | #define azx_readw(chip,reg) \ |
| 388 | readw((chip)->remap_addr + ICH6_REG_##reg) |
| 389 | #define azx_writeb(chip,reg,value) \ |
| 390 | writeb(value, (chip)->remap_addr + ICH6_REG_##reg) |
| 391 | #define azx_readb(chip,reg) \ |
| 392 | readb((chip)->remap_addr + ICH6_REG_##reg) |
| 393 | |
| 394 | #define azx_sd_writel(dev,reg,value) \ |
| 395 | writel(value, (dev)->sd_addr + ICH6_REG_##reg) |
| 396 | #define azx_sd_readl(dev,reg) \ |
| 397 | readl((dev)->sd_addr + ICH6_REG_##reg) |
| 398 | #define azx_sd_writew(dev,reg,value) \ |
| 399 | writew(value, (dev)->sd_addr + ICH6_REG_##reg) |
| 400 | #define azx_sd_readw(dev,reg) \ |
| 401 | readw((dev)->sd_addr + ICH6_REG_##reg) |
| 402 | #define azx_sd_writeb(dev,reg,value) \ |
| 403 | writeb(value, (dev)->sd_addr + ICH6_REG_##reg) |
| 404 | #define azx_sd_readb(dev,reg) \ |
| 405 | readb((dev)->sd_addr + ICH6_REG_##reg) |
| 406 | |
| 407 | /* for pcm support */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 408 | #define get_azx_dev(substream) (substream->runtime->private_data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 409 | |
| 410 | /* Get the upper 32bit of the given dma_addr_t |
| 411 | * Compiler should optimize and eliminate the code if dma_addr_t is 32bit |
| 412 | */ |
| 413 | #define upper_32bit(addr) (sizeof(addr) > 4 ? (u32)((addr) >> 32) : (u32)0) |
| 414 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 415 | static int azx_acquire_irq(struct azx *chip, int do_disconnect); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 416 | |
| 417 | /* |
| 418 | * Interface for HD codec |
| 419 | */ |
| 420 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | /* |
| 422 | * CORB / RIRB interface |
| 423 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 424 | static int azx_alloc_cmd_io(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 425 | { |
| 426 | int err; |
| 427 | |
| 428 | /* single page (at least 4096 bytes) must suffice for both ringbuffes */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 429 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
| 430 | snd_dma_pci_data(chip->pci), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | PAGE_SIZE, &chip->rb); |
| 432 | if (err < 0) { |
| 433 | snd_printk(KERN_ERR SFX "cannot allocate CORB/RIRB\n"); |
| 434 | return err; |
| 435 | } |
| 436 | return 0; |
| 437 | } |
| 438 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 439 | static void azx_init_cmd_io(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 440 | { |
| 441 | /* CORB set up */ |
| 442 | chip->corb.addr = chip->rb.addr; |
| 443 | chip->corb.buf = (u32 *)chip->rb.area; |
| 444 | azx_writel(chip, CORBLBASE, (u32)chip->corb.addr); |
| 445 | azx_writel(chip, CORBUBASE, upper_32bit(chip->corb.addr)); |
| 446 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 447 | /* set the corb size to 256 entries (ULI requires explicitly) */ |
| 448 | azx_writeb(chip, CORBSIZE, 0x02); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | /* set the corb write pointer to 0 */ |
| 450 | azx_writew(chip, CORBWP, 0); |
| 451 | /* reset the corb hw read pointer */ |
| 452 | azx_writew(chip, CORBRP, ICH6_RBRWP_CLR); |
| 453 | /* enable corb dma */ |
| 454 | azx_writeb(chip, CORBCTL, ICH6_RBCTL_DMA_EN); |
| 455 | |
| 456 | /* RIRB set up */ |
| 457 | chip->rirb.addr = chip->rb.addr + 2048; |
| 458 | chip->rirb.buf = (u32 *)(chip->rb.area + 2048); |
| 459 | azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); |
| 460 | azx_writel(chip, RIRBUBASE, upper_32bit(chip->rirb.addr)); |
| 461 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 462 | /* set the rirb size to 256 entries (ULI requires explicitly) */ |
| 463 | azx_writeb(chip, RIRBSIZE, 0x02); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 464 | /* reset the rirb hw write pointer */ |
| 465 | azx_writew(chip, RIRBWP, ICH6_RBRWP_CLR); |
| 466 | /* set N=1, get RIRB response interrupt for new entry */ |
| 467 | azx_writew(chip, RINTCNT, 1); |
| 468 | /* enable rirb dma and response irq */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 469 | azx_writeb(chip, RIRBCTL, ICH6_RBCTL_DMA_EN | ICH6_RBCTL_IRQ_EN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 470 | chip->rirb.rp = chip->rirb.cmds = 0; |
| 471 | } |
| 472 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 473 | static void azx_free_cmd_io(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 474 | { |
| 475 | /* disable ringbuffer DMAs */ |
| 476 | azx_writeb(chip, RIRBCTL, 0); |
| 477 | azx_writeb(chip, CORBCTL, 0); |
| 478 | } |
| 479 | |
| 480 | /* send a command */ |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 481 | static int azx_corb_send_cmd(struct hda_codec *codec, u32 val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 483 | struct azx *chip = codec->bus->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 484 | unsigned int wp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | |
| 486 | /* add command to corb */ |
| 487 | wp = azx_readb(chip, CORBWP); |
| 488 | wp++; |
| 489 | wp %= ICH6_MAX_CORB_ENTRIES; |
| 490 | |
| 491 | spin_lock_irq(&chip->reg_lock); |
| 492 | chip->rirb.cmds++; |
| 493 | chip->corb.buf[wp] = cpu_to_le32(val); |
| 494 | azx_writel(chip, CORBWP, wp); |
| 495 | spin_unlock_irq(&chip->reg_lock); |
| 496 | |
| 497 | return 0; |
| 498 | } |
| 499 | |
| 500 | #define ICH6_RIRB_EX_UNSOL_EV (1<<4) |
| 501 | |
| 502 | /* retrieve RIRB entry - called from interrupt handler */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 503 | static void azx_update_rirb(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | { |
| 505 | unsigned int rp, wp; |
| 506 | u32 res, res_ex; |
| 507 | |
| 508 | wp = azx_readb(chip, RIRBWP); |
| 509 | if (wp == chip->rirb.wp) |
| 510 | return; |
| 511 | chip->rirb.wp = wp; |
| 512 | |
| 513 | while (chip->rirb.rp != wp) { |
| 514 | chip->rirb.rp++; |
| 515 | chip->rirb.rp %= ICH6_MAX_RIRB_ENTRIES; |
| 516 | |
| 517 | rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ |
| 518 | res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); |
| 519 | res = le32_to_cpu(chip->rirb.buf[rp]); |
| 520 | if (res_ex & ICH6_RIRB_EX_UNSOL_EV) |
| 521 | snd_hda_queue_unsol_event(chip->bus, res, res_ex); |
| 522 | else if (chip->rirb.cmds) { |
| 523 | chip->rirb.cmds--; |
| 524 | chip->rirb.res = res; |
| 525 | } |
| 526 | } |
| 527 | } |
| 528 | |
| 529 | /* receive a response */ |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 530 | static unsigned int azx_rirb_get_response(struct hda_codec *codec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 531 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 532 | struct azx *chip = codec->bus->private_data; |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 533 | unsigned long timeout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 534 | |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 535 | again: |
| 536 | timeout = jiffies + msecs_to_jiffies(1000); |
| 537 | do { |
Takashi Iwai | e96224a | 2006-08-21 17:57:44 +0200 | [diff] [blame] | 538 | if (chip->polling_mode) { |
| 539 | spin_lock_irq(&chip->reg_lock); |
| 540 | azx_update_rirb(chip); |
| 541 | spin_unlock_irq(&chip->reg_lock); |
| 542 | } |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 543 | if (!chip->rirb.cmds) |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 544 | return chip->rirb.res; /* the last value */ |
Takashi Iwai | e65365d | 2007-06-25 12:09:32 +0200 | [diff] [blame] | 545 | schedule_timeout(1); |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 546 | } while (time_after_eq(timeout, jiffies)); |
| 547 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 548 | if (chip->msi) { |
| 549 | snd_printk(KERN_WARNING "hda_intel: No response from codec, " |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 550 | "disabling MSI: last cmd=0x%08x\n", chip->last_cmd); |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 551 | free_irq(chip->irq, chip); |
| 552 | chip->irq = -1; |
| 553 | pci_disable_msi(chip->pci); |
| 554 | chip->msi = 0; |
| 555 | if (azx_acquire_irq(chip, 1) < 0) |
| 556 | return -1; |
| 557 | goto again; |
| 558 | } |
| 559 | |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 560 | if (!chip->polling_mode) { |
| 561 | snd_printk(KERN_WARNING "hda_intel: azx_get_response timeout, " |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 562 | "switching to polling mode: last cmd=0x%08x\n", |
| 563 | chip->last_cmd); |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 564 | chip->polling_mode = 1; |
| 565 | goto again; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 566 | } |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 567 | |
| 568 | snd_printk(KERN_ERR "hda_intel: azx_get_response timeout, " |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 569 | "switching to single_cmd mode: last cmd=0x%08x\n", |
| 570 | chip->last_cmd); |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 571 | chip->rirb.rp = azx_readb(chip, RIRBWP); |
| 572 | chip->rirb.cmds = 0; |
| 573 | /* switch to single_cmd mode */ |
| 574 | chip->single_cmd = 1; |
| 575 | azx_free_cmd_io(chip); |
| 576 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | } |
| 578 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | /* |
| 580 | * Use the single immediate command instead of CORB/RIRB for simplicity |
| 581 | * |
| 582 | * Note: according to Intel, this is not preferred use. The command was |
| 583 | * intended for the BIOS only, and may get confused with unsolicited |
| 584 | * responses. So, we shouldn't use it for normal operation from the |
| 585 | * driver. |
| 586 | * I left the codes, however, for debugging/testing purposes. |
| 587 | */ |
| 588 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | /* send a command */ |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 590 | static int azx_single_send_cmd(struct hda_codec *codec, u32 val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 591 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 592 | struct azx *chip = codec->bus->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 593 | int timeout = 50; |
| 594 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 595 | while (timeout--) { |
| 596 | /* check ICB busy bit */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 597 | if (!((azx_readw(chip, IRS) & ICH6_IRS_BUSY))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 598 | /* Clear IRV valid bit */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 599 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
| 600 | ICH6_IRS_VALID); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | azx_writel(chip, IC, val); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 602 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
| 603 | ICH6_IRS_BUSY); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 604 | return 0; |
| 605 | } |
| 606 | udelay(1); |
| 607 | } |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 608 | snd_printd(SFX "send_cmd timeout: IRS=0x%x, val=0x%x\n", |
| 609 | azx_readw(chip, IRS), val); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 610 | return -EIO; |
| 611 | } |
| 612 | |
| 613 | /* receive a response */ |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 614 | static unsigned int azx_single_get_response(struct hda_codec *codec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 615 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 616 | struct azx *chip = codec->bus->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | int timeout = 50; |
| 618 | |
| 619 | while (timeout--) { |
| 620 | /* check IRV busy bit */ |
| 621 | if (azx_readw(chip, IRS) & ICH6_IRS_VALID) |
| 622 | return azx_readl(chip, IR); |
| 623 | udelay(1); |
| 624 | } |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 625 | snd_printd(SFX "get_response timeout: IRS=0x%x\n", |
| 626 | azx_readw(chip, IRS)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | return (unsigned int)-1; |
| 628 | } |
| 629 | |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 630 | /* |
| 631 | * The below are the main callbacks from hda_codec. |
| 632 | * |
| 633 | * They are just the skeleton to call sub-callbacks according to the |
| 634 | * current setting of chip->single_cmd. |
| 635 | */ |
| 636 | |
| 637 | /* send a command */ |
| 638 | static int azx_send_cmd(struct hda_codec *codec, hda_nid_t nid, |
| 639 | int direct, unsigned int verb, |
| 640 | unsigned int para) |
| 641 | { |
| 642 | struct azx *chip = codec->bus->private_data; |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 643 | u32 val; |
| 644 | |
| 645 | val = (u32)(codec->addr & 0x0f) << 28; |
| 646 | val |= (u32)direct << 27; |
| 647 | val |= (u32)nid << 20; |
| 648 | val |= verb << 8; |
| 649 | val |= para; |
| 650 | chip->last_cmd = val; |
| 651 | |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 652 | if (chip->single_cmd) |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 653 | return azx_single_send_cmd(codec, val); |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 654 | else |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 655 | return azx_corb_send_cmd(codec, val); |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 656 | } |
| 657 | |
| 658 | /* get a response */ |
| 659 | static unsigned int azx_get_response(struct hda_codec *codec) |
| 660 | { |
| 661 | struct azx *chip = codec->bus->private_data; |
| 662 | if (chip->single_cmd) |
| 663 | return azx_single_get_response(codec); |
| 664 | else |
| 665 | return azx_rirb_get_response(codec); |
| 666 | } |
| 667 | |
| 668 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 669 | /* reset codec link */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 670 | static int azx_reset(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 671 | { |
| 672 | int count; |
| 673 | |
| 674 | /* reset controller */ |
| 675 | azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~ICH6_GCTL_RESET); |
| 676 | |
| 677 | count = 50; |
| 678 | while (azx_readb(chip, GCTL) && --count) |
| 679 | msleep(1); |
| 680 | |
| 681 | /* delay for >= 100us for codec PLL to settle per spec |
| 682 | * Rev 0.9 section 5.5.1 |
| 683 | */ |
| 684 | msleep(1); |
| 685 | |
| 686 | /* Bring controller out of reset */ |
| 687 | azx_writeb(chip, GCTL, azx_readb(chip, GCTL) | ICH6_GCTL_RESET); |
| 688 | |
| 689 | count = 50; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 690 | while (!azx_readb(chip, GCTL) && --count) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | msleep(1); |
| 692 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 693 | /* Brent Chartrand said to wait >= 540us for codecs to initialize */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 694 | msleep(1); |
| 695 | |
| 696 | /* check to see if controller is ready */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 697 | if (!azx_readb(chip, GCTL)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 698 | snd_printd("azx_reset: controller not ready!\n"); |
| 699 | return -EBUSY; |
| 700 | } |
| 701 | |
Matt | 41e2fce | 2005-07-04 17:49:55 +0200 | [diff] [blame] | 702 | /* Accept unsolicited responses */ |
| 703 | azx_writel(chip, GCTL, azx_readl(chip, GCTL) | ICH6_GCTL_UREN); |
| 704 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 705 | /* detect codecs */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 706 | if (!chip->codec_mask) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 707 | chip->codec_mask = azx_readw(chip, STATESTS); |
| 708 | snd_printdd("codec_mask = 0x%x\n", chip->codec_mask); |
| 709 | } |
| 710 | |
| 711 | return 0; |
| 712 | } |
| 713 | |
| 714 | |
| 715 | /* |
| 716 | * Lowlevel interface |
| 717 | */ |
| 718 | |
| 719 | /* enable interrupts */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 720 | static void azx_int_enable(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 721 | { |
| 722 | /* enable controller CIE and GIE */ |
| 723 | azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) | |
| 724 | ICH6_INT_CTRL_EN | ICH6_INT_GLOBAL_EN); |
| 725 | } |
| 726 | |
| 727 | /* disable interrupts */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 728 | static void azx_int_disable(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 729 | { |
| 730 | int i; |
| 731 | |
| 732 | /* disable interrupts in stream descriptor */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 733 | for (i = 0; i < chip->num_streams; i++) { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 734 | struct azx_dev *azx_dev = &chip->azx_dev[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | azx_sd_writeb(azx_dev, SD_CTL, |
| 736 | azx_sd_readb(azx_dev, SD_CTL) & ~SD_INT_MASK); |
| 737 | } |
| 738 | |
| 739 | /* disable SIE for all streams */ |
| 740 | azx_writeb(chip, INTCTL, 0); |
| 741 | |
| 742 | /* disable controller CIE and GIE */ |
| 743 | azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) & |
| 744 | ~(ICH6_INT_CTRL_EN | ICH6_INT_GLOBAL_EN)); |
| 745 | } |
| 746 | |
| 747 | /* clear interrupts */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 748 | static void azx_int_clear(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 749 | { |
| 750 | int i; |
| 751 | |
| 752 | /* clear stream status */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 753 | for (i = 0; i < chip->num_streams; i++) { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 754 | struct azx_dev *azx_dev = &chip->azx_dev[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 755 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); |
| 756 | } |
| 757 | |
| 758 | /* clear STATESTS */ |
| 759 | azx_writeb(chip, STATESTS, STATESTS_INT_MASK); |
| 760 | |
| 761 | /* clear rirb status */ |
| 762 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); |
| 763 | |
| 764 | /* clear int status */ |
| 765 | azx_writel(chip, INTSTS, ICH6_INT_CTRL_EN | ICH6_INT_ALL_STREAM); |
| 766 | } |
| 767 | |
| 768 | /* start a stream */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 769 | static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 770 | { |
| 771 | /* enable SIE */ |
| 772 | azx_writeb(chip, INTCTL, |
| 773 | azx_readb(chip, INTCTL) | (1 << azx_dev->index)); |
| 774 | /* set DMA start and interrupt mask */ |
| 775 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | |
| 776 | SD_CTL_DMA_START | SD_INT_MASK); |
| 777 | } |
| 778 | |
| 779 | /* stop a stream */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 780 | static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 781 | { |
| 782 | /* stop DMA */ |
| 783 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & |
| 784 | ~(SD_CTL_DMA_START | SD_INT_MASK)); |
| 785 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */ |
| 786 | /* disable SIE */ |
| 787 | azx_writeb(chip, INTCTL, |
| 788 | azx_readb(chip, INTCTL) & ~(1 << azx_dev->index)); |
| 789 | } |
| 790 | |
| 791 | |
| 792 | /* |
| 793 | * initialize the chip |
| 794 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 795 | static void azx_init_chip(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 796 | { |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 797 | unsigned char reg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 798 | |
| 799 | /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44) |
| 800 | * TCSEL == Traffic Class Select Register, which sets PCI express QOS |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 801 | * Ensuring these bits are 0 clears playback static on some HD Audio |
| 802 | * codecs |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 803 | */ |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 804 | pci_read_config_byte (chip->pci, ICH6_PCIREG_TCSEL, ®); |
| 805 | pci_write_config_byte(chip->pci, ICH6_PCIREG_TCSEL, reg & 0xf8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 806 | |
| 807 | /* reset controller */ |
| 808 | azx_reset(chip); |
| 809 | |
| 810 | /* initialize interrupts */ |
| 811 | azx_int_clear(chip); |
| 812 | azx_int_enable(chip); |
| 813 | |
| 814 | /* initialize the codec command I/O */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 815 | if (!chip->single_cmd) |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 816 | azx_init_cmd_io(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 817 | |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 818 | /* program the position buffer */ |
| 819 | azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr); |
| 820 | azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr)); |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 821 | |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 822 | switch (chip->driver_type) { |
| 823 | case AZX_DRIVER_ATI: |
| 824 | /* For ATI SB450 azalia HD audio, we need to enable snoop */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 825 | pci_read_config_byte(chip->pci, |
| 826 | ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 827 | ®); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 828 | pci_write_config_byte(chip->pci, |
| 829 | ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, |
| 830 | (reg & 0xf8) | |
| 831 | ATI_SB450_HDAUDIO_ENABLE_SNOOP); |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 832 | break; |
| 833 | case AZX_DRIVER_NVIDIA: |
| 834 | /* For NVIDIA HDA, enable snoop */ |
| 835 | pci_read_config_byte(chip->pci,NVIDIA_HDA_TRANSREG_ADDR, ®); |
| 836 | pci_write_config_byte(chip->pci,NVIDIA_HDA_TRANSREG_ADDR, |
| 837 | (reg & 0xf0) | NVIDIA_HDA_ENABLE_COHBITS); |
| 838 | break; |
| 839 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 840 | } |
| 841 | |
| 842 | |
| 843 | /* |
| 844 | * interrupt handler |
| 845 | */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 846 | static irqreturn_t azx_interrupt(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 847 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 848 | struct azx *chip = dev_id; |
| 849 | struct azx_dev *azx_dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 850 | u32 status; |
| 851 | int i; |
| 852 | |
| 853 | spin_lock(&chip->reg_lock); |
| 854 | |
| 855 | status = azx_readl(chip, INTSTS); |
| 856 | if (status == 0) { |
| 857 | spin_unlock(&chip->reg_lock); |
| 858 | return IRQ_NONE; |
| 859 | } |
| 860 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 861 | for (i = 0; i < chip->num_streams; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 862 | azx_dev = &chip->azx_dev[i]; |
| 863 | if (status & azx_dev->sd_int_sta_mask) { |
| 864 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); |
| 865 | if (azx_dev->substream && azx_dev->running) { |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 866 | azx_dev->period_intr++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 867 | spin_unlock(&chip->reg_lock); |
| 868 | snd_pcm_period_elapsed(azx_dev->substream); |
| 869 | spin_lock(&chip->reg_lock); |
| 870 | } |
| 871 | } |
| 872 | } |
| 873 | |
| 874 | /* clear rirb int */ |
| 875 | status = azx_readb(chip, RIRBSTS); |
| 876 | if (status & RIRB_INT_MASK) { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 877 | if (!chip->single_cmd && (status & RIRB_INT_RESPONSE)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 878 | azx_update_rirb(chip); |
| 879 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); |
| 880 | } |
| 881 | |
| 882 | #if 0 |
| 883 | /* clear state status int */ |
| 884 | if (azx_readb(chip, STATESTS) & 0x04) |
| 885 | azx_writeb(chip, STATESTS, 0x04); |
| 886 | #endif |
| 887 | spin_unlock(&chip->reg_lock); |
| 888 | |
| 889 | return IRQ_HANDLED; |
| 890 | } |
| 891 | |
| 892 | |
| 893 | /* |
| 894 | * set up BDL entries |
| 895 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 896 | static void azx_setup_periods(struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 897 | { |
| 898 | u32 *bdl = azx_dev->bdl; |
| 899 | dma_addr_t dma_addr = azx_dev->substream->runtime->dma_addr; |
| 900 | int idx; |
| 901 | |
| 902 | /* reset BDL address */ |
| 903 | azx_sd_writel(azx_dev, SD_BDLPL, 0); |
| 904 | azx_sd_writel(azx_dev, SD_BDLPU, 0); |
| 905 | |
| 906 | /* program the initial BDL entries */ |
| 907 | for (idx = 0; idx < azx_dev->frags; idx++) { |
| 908 | unsigned int off = idx << 2; /* 4 dword step */ |
| 909 | dma_addr_t addr = dma_addr + idx * azx_dev->fragsize; |
| 910 | /* program the address field of the BDL entry */ |
| 911 | bdl[off] = cpu_to_le32((u32)addr); |
| 912 | bdl[off+1] = cpu_to_le32(upper_32bit(addr)); |
| 913 | |
| 914 | /* program the size field of the BDL entry */ |
| 915 | bdl[off+2] = cpu_to_le32(azx_dev->fragsize); |
| 916 | |
| 917 | /* program the IOC to enable interrupt when buffer completes */ |
| 918 | bdl[off+3] = cpu_to_le32(0x01); |
| 919 | } |
| 920 | } |
| 921 | |
| 922 | /* |
| 923 | * set up the SD for streaming |
| 924 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 925 | static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 926 | { |
| 927 | unsigned char val; |
| 928 | int timeout; |
| 929 | |
| 930 | /* make sure the run bit is zero for SD */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 931 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & |
| 932 | ~SD_CTL_DMA_START); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 933 | /* reset stream */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 934 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | |
| 935 | SD_CTL_STREAM_RESET); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 936 | udelay(3); |
| 937 | timeout = 300; |
| 938 | while (!((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && |
| 939 | --timeout) |
| 940 | ; |
| 941 | val &= ~SD_CTL_STREAM_RESET; |
| 942 | azx_sd_writeb(azx_dev, SD_CTL, val); |
| 943 | udelay(3); |
| 944 | |
| 945 | timeout = 300; |
| 946 | /* waiting for hardware to report that the stream is out of reset */ |
| 947 | while (((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && |
| 948 | --timeout) |
| 949 | ; |
| 950 | |
| 951 | /* program the stream_tag */ |
| 952 | azx_sd_writel(azx_dev, SD_CTL, |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 953 | (azx_sd_readl(azx_dev, SD_CTL) & ~SD_CTL_STREAM_TAG_MASK)| |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 954 | (azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT)); |
| 955 | |
| 956 | /* program the length of samples in cyclic buffer */ |
| 957 | azx_sd_writel(azx_dev, SD_CBL, azx_dev->bufsize); |
| 958 | |
| 959 | /* program the stream format */ |
| 960 | /* this value needs to be the same as the one programmed */ |
| 961 | azx_sd_writew(azx_dev, SD_FORMAT, azx_dev->format_val); |
| 962 | |
| 963 | /* program the stream LVI (last valid index) of the BDL */ |
| 964 | azx_sd_writew(azx_dev, SD_LVI, azx_dev->frags - 1); |
| 965 | |
| 966 | /* program the BDL address */ |
| 967 | /* lower BDL address */ |
| 968 | azx_sd_writel(azx_dev, SD_BDLPL, (u32)azx_dev->bdl_addr); |
| 969 | /* upper BDL address */ |
| 970 | azx_sd_writel(azx_dev, SD_BDLPU, upper_32bit(azx_dev->bdl_addr)); |
| 971 | |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 972 | /* enable the position buffer */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 973 | if (!(azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE)) |
| 974 | azx_writel(chip, DPLBASE, |
| 975 | (u32)chip->posbuf.addr |ICH6_DPLBASE_ENABLE); |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 976 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 977 | /* set the interrupt enable bits in the descriptor control register */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 978 | azx_sd_writel(azx_dev, SD_CTL, |
| 979 | azx_sd_readl(azx_dev, SD_CTL) | SD_INT_MASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 980 | |
| 981 | return 0; |
| 982 | } |
| 983 | |
| 984 | |
| 985 | /* |
| 986 | * Codec initialization |
| 987 | */ |
| 988 | |
Takashi Iwai | a9995a3 | 2007-03-12 21:30:46 +0100 | [diff] [blame] | 989 | static unsigned int azx_max_codecs[] __devinitdata = { |
| 990 | [AZX_DRIVER_ICH] = 3, |
| 991 | [AZX_DRIVER_ATI] = 4, |
| 992 | [AZX_DRIVER_ATIHDMI] = 4, |
| 993 | [AZX_DRIVER_VIA] = 3, /* FIXME: correct? */ |
| 994 | [AZX_DRIVER_SIS] = 3, /* FIXME: correct? */ |
| 995 | [AZX_DRIVER_ULI] = 3, /* FIXME: correct? */ |
| 996 | [AZX_DRIVER_NVIDIA] = 3, /* FIXME: correct? */ |
| 997 | }; |
| 998 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 999 | static int __devinit azx_codec_create(struct azx *chip, const char *model) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1000 | { |
| 1001 | struct hda_bus_template bus_temp; |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1002 | int c, codecs, audio_codecs, err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1003 | |
| 1004 | memset(&bus_temp, 0, sizeof(bus_temp)); |
| 1005 | bus_temp.private_data = chip; |
| 1006 | bus_temp.modelname = model; |
| 1007 | bus_temp.pci = chip->pci; |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 1008 | bus_temp.ops.command = azx_send_cmd; |
| 1009 | bus_temp.ops.get_response = azx_get_response; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1010 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1011 | err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus); |
| 1012 | if (err < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1013 | return err; |
| 1014 | |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1015 | codecs = audio_codecs = 0; |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 1016 | for (c = 0; c < AZX_MAX_CODECS; c++) { |
Takashi Iwai | 606ad75 | 2005-11-24 16:03:40 +0100 | [diff] [blame] | 1017 | if ((chip->codec_mask & (1 << c)) & probe_mask) { |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1018 | struct hda_codec *codec; |
| 1019 | err = snd_hda_codec_new(chip->bus, c, &codec); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1020 | if (err < 0) |
| 1021 | continue; |
| 1022 | codecs++; |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1023 | if (codec->afg) |
| 1024 | audio_codecs++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1025 | } |
| 1026 | } |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1027 | if (!audio_codecs) { |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 1028 | /* probe additional slots if no codec is found */ |
| 1029 | for (; c < azx_max_codecs[chip->driver_type]; c++) { |
| 1030 | if ((chip->codec_mask & (1 << c)) & probe_mask) { |
| 1031 | err = snd_hda_codec_new(chip->bus, c, NULL); |
| 1032 | if (err < 0) |
| 1033 | continue; |
| 1034 | codecs++; |
| 1035 | } |
| 1036 | } |
| 1037 | } |
| 1038 | if (!codecs) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1039 | snd_printk(KERN_ERR SFX "no codecs initialized\n"); |
| 1040 | return -ENXIO; |
| 1041 | } |
| 1042 | |
| 1043 | return 0; |
| 1044 | } |
| 1045 | |
| 1046 | |
| 1047 | /* |
| 1048 | * PCM support |
| 1049 | */ |
| 1050 | |
| 1051 | /* assign a stream for the PCM */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1052 | static inline struct azx_dev *azx_assign_device(struct azx *chip, int stream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1053 | { |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1054 | int dev, i, nums; |
| 1055 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 1056 | dev = chip->playback_index_offset; |
| 1057 | nums = chip->playback_streams; |
| 1058 | } else { |
| 1059 | dev = chip->capture_index_offset; |
| 1060 | nums = chip->capture_streams; |
| 1061 | } |
| 1062 | for (i = 0; i < nums; i++, dev++) |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1063 | if (!chip->azx_dev[dev].opened) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1064 | chip->azx_dev[dev].opened = 1; |
| 1065 | return &chip->azx_dev[dev]; |
| 1066 | } |
| 1067 | return NULL; |
| 1068 | } |
| 1069 | |
| 1070 | /* release the assigned stream */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1071 | static inline void azx_release_device(struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1072 | { |
| 1073 | azx_dev->opened = 0; |
| 1074 | } |
| 1075 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1076 | static struct snd_pcm_hardware azx_pcm_hw = { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1077 | .info = (SNDRV_PCM_INFO_MMAP | |
| 1078 | SNDRV_PCM_INFO_INTERLEAVED | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1079 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
| 1080 | SNDRV_PCM_INFO_MMAP_VALID | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1081 | /* No full-resume yet implemented */ |
| 1082 | /* SNDRV_PCM_INFO_RESUME |*/ |
| 1083 | SNDRV_PCM_INFO_PAUSE), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1084 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
| 1085 | .rates = SNDRV_PCM_RATE_48000, |
| 1086 | .rate_min = 48000, |
| 1087 | .rate_max = 48000, |
| 1088 | .channels_min = 2, |
| 1089 | .channels_max = 2, |
| 1090 | .buffer_bytes_max = AZX_MAX_BUF_SIZE, |
| 1091 | .period_bytes_min = 128, |
| 1092 | .period_bytes_max = AZX_MAX_BUF_SIZE / 2, |
| 1093 | .periods_min = 2, |
| 1094 | .periods_max = AZX_MAX_FRAG, |
| 1095 | .fifo_size = 0, |
| 1096 | }; |
| 1097 | |
| 1098 | struct azx_pcm { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1099 | struct azx *chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1100 | struct hda_codec *codec; |
| 1101 | struct hda_pcm_stream *hinfo[2]; |
| 1102 | }; |
| 1103 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1104 | static int azx_pcm_open(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1105 | { |
| 1106 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 1107 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1108 | struct azx *chip = apcm->chip; |
| 1109 | struct azx_dev *azx_dev; |
| 1110 | struct snd_pcm_runtime *runtime = substream->runtime; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1111 | unsigned long flags; |
| 1112 | int err; |
| 1113 | |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1114 | mutex_lock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1115 | azx_dev = azx_assign_device(chip, substream->stream); |
| 1116 | if (azx_dev == NULL) { |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1117 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1118 | return -EBUSY; |
| 1119 | } |
| 1120 | runtime->hw = azx_pcm_hw; |
| 1121 | runtime->hw.channels_min = hinfo->channels_min; |
| 1122 | runtime->hw.channels_max = hinfo->channels_max; |
| 1123 | runtime->hw.formats = hinfo->formats; |
| 1124 | runtime->hw.rates = hinfo->rates; |
| 1125 | snd_pcm_limit_hw_rates(runtime); |
| 1126 | snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); |
Joachim Deguara | 5f1545b | 2007-03-16 15:01:36 +0100 | [diff] [blame] | 1127 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, |
| 1128 | 128); |
| 1129 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, |
| 1130 | 128); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1131 | err = hinfo->ops.open(hinfo, apcm->codec, substream); |
| 1132 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1133 | azx_release_device(azx_dev); |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1134 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1135 | return err; |
| 1136 | } |
| 1137 | spin_lock_irqsave(&chip->reg_lock, flags); |
| 1138 | azx_dev->substream = substream; |
| 1139 | azx_dev->running = 0; |
| 1140 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
| 1141 | |
| 1142 | runtime->private_data = azx_dev; |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1143 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1144 | return 0; |
| 1145 | } |
| 1146 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1147 | static int azx_pcm_close(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1148 | { |
| 1149 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 1150 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1151 | struct azx *chip = apcm->chip; |
| 1152 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1153 | unsigned long flags; |
| 1154 | |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1155 | mutex_lock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1156 | spin_lock_irqsave(&chip->reg_lock, flags); |
| 1157 | azx_dev->substream = NULL; |
| 1158 | azx_dev->running = 0; |
| 1159 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
| 1160 | azx_release_device(azx_dev); |
| 1161 | hinfo->ops.close(hinfo, apcm->codec, substream); |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1162 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1163 | return 0; |
| 1164 | } |
| 1165 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1166 | static int azx_pcm_hw_params(struct snd_pcm_substream *substream, |
| 1167 | struct snd_pcm_hw_params *hw_params) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1168 | { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1169 | return snd_pcm_lib_malloc_pages(substream, |
| 1170 | params_buffer_bytes(hw_params)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1171 | } |
| 1172 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1173 | static int azx_pcm_hw_free(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1174 | { |
| 1175 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1176 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1177 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
| 1178 | |
| 1179 | /* reset BDL address */ |
| 1180 | azx_sd_writel(azx_dev, SD_BDLPL, 0); |
| 1181 | azx_sd_writel(azx_dev, SD_BDLPU, 0); |
| 1182 | azx_sd_writel(azx_dev, SD_CTL, 0); |
| 1183 | |
| 1184 | hinfo->ops.cleanup(hinfo, apcm->codec, substream); |
| 1185 | |
| 1186 | return snd_pcm_lib_free_pages(substream); |
| 1187 | } |
| 1188 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1189 | static int azx_pcm_prepare(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1190 | { |
| 1191 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1192 | struct azx *chip = apcm->chip; |
| 1193 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1194 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1195 | struct snd_pcm_runtime *runtime = substream->runtime; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1196 | |
| 1197 | azx_dev->bufsize = snd_pcm_lib_buffer_bytes(substream); |
| 1198 | azx_dev->fragsize = snd_pcm_lib_period_bytes(substream); |
| 1199 | azx_dev->frags = azx_dev->bufsize / azx_dev->fragsize; |
| 1200 | azx_dev->format_val = snd_hda_calc_stream_format(runtime->rate, |
| 1201 | runtime->channels, |
| 1202 | runtime->format, |
| 1203 | hinfo->maxbps); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1204 | if (!azx_dev->format_val) { |
| 1205 | snd_printk(KERN_ERR SFX |
| 1206 | "invalid format_val, rate=%d, ch=%d, format=%d\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1207 | runtime->rate, runtime->channels, runtime->format); |
| 1208 | return -EINVAL; |
| 1209 | } |
| 1210 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1211 | snd_printdd("azx_pcm_prepare: bufsize=0x%x, fragsize=0x%x, " |
| 1212 | "format=0x%x\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1213 | azx_dev->bufsize, azx_dev->fragsize, azx_dev->format_val); |
| 1214 | azx_setup_periods(azx_dev); |
| 1215 | azx_setup_controller(chip, azx_dev); |
| 1216 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 1217 | azx_dev->fifo_size = azx_sd_readw(azx_dev, SD_FIFOSIZE) + 1; |
| 1218 | else |
| 1219 | azx_dev->fifo_size = 0; |
| 1220 | |
| 1221 | return hinfo->ops.prepare(hinfo, apcm->codec, azx_dev->stream_tag, |
| 1222 | azx_dev->format_val, substream); |
| 1223 | } |
| 1224 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1225 | static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1226 | { |
| 1227 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1228 | struct azx_dev *azx_dev = get_azx_dev(substream); |
| 1229 | struct azx *chip = apcm->chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1230 | int err = 0; |
| 1231 | |
| 1232 | spin_lock(&chip->reg_lock); |
| 1233 | switch (cmd) { |
| 1234 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 1235 | case SNDRV_PCM_TRIGGER_RESUME: |
| 1236 | case SNDRV_PCM_TRIGGER_START: |
| 1237 | azx_stream_start(chip, azx_dev); |
| 1238 | azx_dev->running = 1; |
| 1239 | break; |
| 1240 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
Jaroslav Kysela | 4712319 | 2005-08-15 20:53:07 +0200 | [diff] [blame] | 1241 | case SNDRV_PCM_TRIGGER_SUSPEND: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1242 | case SNDRV_PCM_TRIGGER_STOP: |
| 1243 | azx_stream_stop(chip, azx_dev); |
| 1244 | azx_dev->running = 0; |
| 1245 | break; |
| 1246 | default: |
| 1247 | err = -EINVAL; |
| 1248 | } |
| 1249 | spin_unlock(&chip->reg_lock); |
| 1250 | if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH || |
Jaroslav Kysela | 4712319 | 2005-08-15 20:53:07 +0200 | [diff] [blame] | 1251 | cmd == SNDRV_PCM_TRIGGER_SUSPEND || |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1252 | cmd == SNDRV_PCM_TRIGGER_STOP) { |
| 1253 | int timeout = 5000; |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1254 | while ((azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START) && |
| 1255 | --timeout) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1256 | ; |
| 1257 | } |
| 1258 | return err; |
| 1259 | } |
| 1260 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1261 | static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1262 | { |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1263 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1264 | struct azx *chip = apcm->chip; |
| 1265 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1266 | unsigned int pos; |
| 1267 | |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 1268 | if (chip->position_fix == POS_FIX_POSBUF || |
| 1269 | chip->position_fix == POS_FIX_AUTO) { |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1270 | /* use the position buffer */ |
Takashi Iwai | 929861c | 2006-08-31 16:55:40 +0200 | [diff] [blame] | 1271 | pos = le32_to_cpu(*azx_dev->posbuf); |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 1272 | if (chip->position_fix == POS_FIX_AUTO && |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1273 | azx_dev->period_intr == 1 && !pos) { |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 1274 | printk(KERN_WARNING |
| 1275 | "hda-intel: Invalid position buffer, " |
| 1276 | "using LPIB read method instead.\n"); |
| 1277 | chip->position_fix = POS_FIX_NONE; |
| 1278 | goto read_lpib; |
| 1279 | } |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1280 | } else { |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 1281 | read_lpib: |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1282 | /* read LPIB */ |
| 1283 | pos = azx_sd_readl(azx_dev, SD_LPIB); |
| 1284 | if (chip->position_fix == POS_FIX_FIFO) |
| 1285 | pos += azx_dev->fifo_size; |
| 1286 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1287 | if (pos >= azx_dev->bufsize) |
| 1288 | pos = 0; |
| 1289 | return bytes_to_frames(substream->runtime, pos); |
| 1290 | } |
| 1291 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1292 | static struct snd_pcm_ops azx_pcm_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1293 | .open = azx_pcm_open, |
| 1294 | .close = azx_pcm_close, |
| 1295 | .ioctl = snd_pcm_lib_ioctl, |
| 1296 | .hw_params = azx_pcm_hw_params, |
| 1297 | .hw_free = azx_pcm_hw_free, |
| 1298 | .prepare = azx_pcm_prepare, |
| 1299 | .trigger = azx_pcm_trigger, |
| 1300 | .pointer = azx_pcm_pointer, |
| 1301 | }; |
| 1302 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1303 | static void azx_pcm_free(struct snd_pcm *pcm) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1304 | { |
| 1305 | kfree(pcm->private_data); |
| 1306 | } |
| 1307 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1308 | static int __devinit create_codec_pcm(struct azx *chip, struct hda_codec *codec, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1309 | struct hda_pcm *cpcm, int pcm_dev) |
| 1310 | { |
| 1311 | int err; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1312 | struct snd_pcm *pcm; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1313 | struct azx_pcm *apcm; |
| 1314 | |
Takashi Iwai | e08a007 | 2006-09-07 17:52:14 +0200 | [diff] [blame] | 1315 | /* if no substreams are defined for both playback and capture, |
| 1316 | * it's just a placeholder. ignore it. |
| 1317 | */ |
| 1318 | if (!cpcm->stream[0].substreams && !cpcm->stream[1].substreams) |
| 1319 | return 0; |
| 1320 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1321 | snd_assert(cpcm->name, return -EINVAL); |
| 1322 | |
| 1323 | err = snd_pcm_new(chip->card, cpcm->name, pcm_dev, |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1324 | cpcm->stream[0].substreams, |
| 1325 | cpcm->stream[1].substreams, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1326 | &pcm); |
| 1327 | if (err < 0) |
| 1328 | return err; |
| 1329 | strcpy(pcm->name, cpcm->name); |
| 1330 | apcm = kmalloc(sizeof(*apcm), GFP_KERNEL); |
| 1331 | if (apcm == NULL) |
| 1332 | return -ENOMEM; |
| 1333 | apcm->chip = chip; |
| 1334 | apcm->codec = codec; |
| 1335 | apcm->hinfo[0] = &cpcm->stream[0]; |
| 1336 | apcm->hinfo[1] = &cpcm->stream[1]; |
| 1337 | pcm->private_data = apcm; |
| 1338 | pcm->private_free = azx_pcm_free; |
| 1339 | if (cpcm->stream[0].substreams) |
| 1340 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &azx_pcm_ops); |
| 1341 | if (cpcm->stream[1].substreams) |
| 1342 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &azx_pcm_ops); |
| 1343 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, |
| 1344 | snd_dma_pci_data(chip->pci), |
Jaroslav Kysela | b66b3cf | 2006-10-06 09:34:20 +0200 | [diff] [blame] | 1345 | 1024 * 64, 1024 * 1024); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1346 | chip->pcm[pcm_dev] = pcm; |
Takashi Iwai | e08a007 | 2006-09-07 17:52:14 +0200 | [diff] [blame] | 1347 | if (chip->pcm_devs < pcm_dev + 1) |
| 1348 | chip->pcm_devs = pcm_dev + 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1349 | |
| 1350 | return 0; |
| 1351 | } |
| 1352 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1353 | static int __devinit azx_pcm_create(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1354 | { |
| 1355 | struct list_head *p; |
| 1356 | struct hda_codec *codec; |
| 1357 | int c, err; |
| 1358 | int pcm_dev; |
| 1359 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1360 | err = snd_hda_build_pcms(chip->bus); |
| 1361 | if (err < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1362 | return err; |
| 1363 | |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1364 | /* create audio PCMs */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1365 | pcm_dev = 0; |
| 1366 | list_for_each(p, &chip->bus->codec_list) { |
| 1367 | codec = list_entry(p, struct hda_codec, list); |
| 1368 | for (c = 0; c < codec->num_pcms; c++) { |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1369 | if (codec->pcm_info[c].is_modem) |
| 1370 | continue; /* create later */ |
| 1371 | if (pcm_dev >= AZX_MAX_AUDIO_PCMS) { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1372 | snd_printk(KERN_ERR SFX |
| 1373 | "Too many audio PCMs\n"); |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1374 | return -EINVAL; |
| 1375 | } |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1376 | err = create_codec_pcm(chip, codec, |
| 1377 | &codec->pcm_info[c], pcm_dev); |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1378 | if (err < 0) |
| 1379 | return err; |
| 1380 | pcm_dev++; |
| 1381 | } |
| 1382 | } |
| 1383 | |
| 1384 | /* create modem PCMs */ |
| 1385 | pcm_dev = AZX_MAX_AUDIO_PCMS; |
| 1386 | list_for_each(p, &chip->bus->codec_list) { |
| 1387 | codec = list_entry(p, struct hda_codec, list); |
| 1388 | for (c = 0; c < codec->num_pcms; c++) { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1389 | if (!codec->pcm_info[c].is_modem) |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1390 | continue; /* already created */ |
Takashi Iwai | a28f1cd | 2005-09-07 15:26:56 +0200 | [diff] [blame] | 1391 | if (pcm_dev >= AZX_MAX_PCMS) { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1392 | snd_printk(KERN_ERR SFX |
| 1393 | "Too many modem PCMs\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1394 | return -EINVAL; |
| 1395 | } |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1396 | err = create_codec_pcm(chip, codec, |
| 1397 | &codec->pcm_info[c], pcm_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1398 | if (err < 0) |
| 1399 | return err; |
Sasha Khapyorsky | 6632d19 | 2005-09-29 11:48:17 +0200 | [diff] [blame] | 1400 | chip->pcm[pcm_dev]->dev_class = SNDRV_PCM_CLASS_MODEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1401 | pcm_dev++; |
| 1402 | } |
| 1403 | } |
| 1404 | return 0; |
| 1405 | } |
| 1406 | |
| 1407 | /* |
| 1408 | * mixer creation - all stuff is implemented in hda module |
| 1409 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1410 | static int __devinit azx_mixer_create(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1411 | { |
| 1412 | return snd_hda_build_controls(chip->bus); |
| 1413 | } |
| 1414 | |
| 1415 | |
| 1416 | /* |
| 1417 | * initialize SD streams |
| 1418 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1419 | static int __devinit azx_init_stream(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1420 | { |
| 1421 | int i; |
| 1422 | |
| 1423 | /* initialize each stream (aka device) |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1424 | * assign the starting bdl address to each stream (device) |
| 1425 | * and initialize |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1426 | */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1427 | for (i = 0; i < chip->num_streams; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1428 | unsigned int off = sizeof(u32) * (i * AZX_MAX_FRAG * 4); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1429 | struct azx_dev *azx_dev = &chip->azx_dev[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1430 | azx_dev->bdl = (u32 *)(chip->bdl.area + off); |
| 1431 | azx_dev->bdl_addr = chip->bdl.addr + off; |
Takashi Iwai | 929861c | 2006-08-31 16:55:40 +0200 | [diff] [blame] | 1432 | azx_dev->posbuf = (u32 __iomem *)(chip->posbuf.area + i * 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1433 | /* offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */ |
| 1434 | azx_dev->sd_addr = chip->remap_addr + (0x20 * i + 0x80); |
| 1435 | /* int mask: SDI0=0x01, SDI1=0x02, ... SDO3=0x80 */ |
| 1436 | azx_dev->sd_int_sta_mask = 1 << i; |
| 1437 | /* stream tag: must be non-zero and unique */ |
| 1438 | azx_dev->index = i; |
| 1439 | azx_dev->stream_tag = i + 1; |
| 1440 | } |
| 1441 | |
| 1442 | return 0; |
| 1443 | } |
| 1444 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1445 | static int azx_acquire_irq(struct azx *chip, int do_disconnect) |
| 1446 | { |
Takashi Iwai | 437a5a4 | 2006-11-21 12:14:23 +0100 | [diff] [blame] | 1447 | if (request_irq(chip->pci->irq, azx_interrupt, |
| 1448 | chip->msi ? 0 : IRQF_SHARED, |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1449 | "HDA Intel", chip)) { |
| 1450 | printk(KERN_ERR "hda-intel: unable to grab IRQ %d, " |
| 1451 | "disabling device\n", chip->pci->irq); |
| 1452 | if (do_disconnect) |
| 1453 | snd_card_disconnect(chip->card); |
| 1454 | return -1; |
| 1455 | } |
| 1456 | chip->irq = chip->pci->irq; |
Takashi Iwai | 69e1341 | 2006-11-21 12:10:55 +0100 | [diff] [blame] | 1457 | pci_intx(chip->pci, !chip->msi); |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1458 | return 0; |
| 1459 | } |
| 1460 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1461 | |
| 1462 | #ifdef CONFIG_PM |
| 1463 | /* |
| 1464 | * power management |
| 1465 | */ |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1466 | static int azx_suspend(struct pci_dev *pci, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1467 | { |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1468 | struct snd_card *card = pci_get_drvdata(pci); |
| 1469 | struct azx *chip = card->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1470 | int i; |
| 1471 | |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1472 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1473 | for (i = 0; i < chip->pcm_devs; i++) |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1474 | snd_pcm_suspend_all(chip->pcm[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1475 | snd_hda_suspend(chip->bus, state); |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 1476 | azx_free_cmd_io(chip); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1477 | if (chip->irq >= 0) { |
| 1478 | synchronize_irq(chip->irq); |
Takashi Iwai | 43001c9 | 2006-09-08 12:30:03 +0200 | [diff] [blame] | 1479 | free_irq(chip->irq, chip); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1480 | chip->irq = -1; |
| 1481 | } |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1482 | if (chip->msi) |
Takashi Iwai | 43001c9 | 2006-09-08 12:30:03 +0200 | [diff] [blame] | 1483 | pci_disable_msi(chip->pci); |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1484 | pci_disable_device(pci); |
| 1485 | pci_save_state(pci); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1486 | pci_set_power_state(pci, pci_choose_state(pci, state)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1487 | return 0; |
| 1488 | } |
| 1489 | |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1490 | static int azx_resume(struct pci_dev *pci) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1491 | { |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1492 | struct snd_card *card = pci_get_drvdata(pci); |
| 1493 | struct azx *chip = card->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1494 | |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1495 | pci_set_power_state(pci, PCI_D0); |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1496 | pci_restore_state(pci); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1497 | if (pci_enable_device(pci) < 0) { |
| 1498 | printk(KERN_ERR "hda-intel: pci_enable_device failed, " |
| 1499 | "disabling device\n"); |
| 1500 | snd_card_disconnect(card); |
| 1501 | return -EIO; |
| 1502 | } |
| 1503 | pci_set_master(pci); |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1504 | if (chip->msi) |
| 1505 | if (pci_enable_msi(pci) < 0) |
| 1506 | chip->msi = 0; |
| 1507 | if (azx_acquire_irq(chip, 1) < 0) |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1508 | return -EIO; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1509 | azx_init_chip(chip); |
| 1510 | snd_hda_resume(chip->bus); |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1511 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1512 | return 0; |
| 1513 | } |
| 1514 | #endif /* CONFIG_PM */ |
| 1515 | |
| 1516 | |
| 1517 | /* |
| 1518 | * destructor |
| 1519 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1520 | static int azx_free(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1521 | { |
Takashi Iwai | ce43fba | 2005-05-30 20:33:44 +0200 | [diff] [blame] | 1522 | if (chip->initialized) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1523 | int i; |
| 1524 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1525 | for (i = 0; i < chip->num_streams; i++) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1526 | azx_stream_stop(chip, &chip->azx_dev[i]); |
| 1527 | |
| 1528 | /* disable interrupts */ |
| 1529 | azx_int_disable(chip); |
| 1530 | azx_int_clear(chip); |
| 1531 | |
| 1532 | /* disable CORB/RIRB */ |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 1533 | azx_free_cmd_io(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1534 | |
| 1535 | /* disable position buffer */ |
| 1536 | azx_writel(chip, DPLBASE, 0); |
| 1537 | azx_writel(chip, DPUBASE, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1538 | } |
| 1539 | |
Stephen Hemminger | 7376d01 | 2006-08-21 19:17:46 +0200 | [diff] [blame] | 1540 | if (chip->irq >= 0) { |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1541 | synchronize_irq(chip->irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1542 | free_irq(chip->irq, (void*)chip); |
Stephen Hemminger | 7376d01 | 2006-08-21 19:17:46 +0200 | [diff] [blame] | 1543 | } |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1544 | if (chip->msi) |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1545 | pci_disable_msi(chip->pci); |
Takashi Iwai | f079c25 | 2006-06-01 11:42:14 +0200 | [diff] [blame] | 1546 | if (chip->remap_addr) |
| 1547 | iounmap(chip->remap_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1548 | |
| 1549 | if (chip->bdl.area) |
| 1550 | snd_dma_free_pages(&chip->bdl); |
| 1551 | if (chip->rb.area) |
| 1552 | snd_dma_free_pages(&chip->rb); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1553 | if (chip->posbuf.area) |
| 1554 | snd_dma_free_pages(&chip->posbuf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1555 | pci_release_regions(chip->pci); |
| 1556 | pci_disable_device(chip->pci); |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1557 | kfree(chip->azx_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1558 | kfree(chip); |
| 1559 | |
| 1560 | return 0; |
| 1561 | } |
| 1562 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1563 | static int azx_dev_free(struct snd_device *device) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1564 | { |
| 1565 | return azx_free(device->device_data); |
| 1566 | } |
| 1567 | |
| 1568 | /* |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1569 | * white/black-listing for position_fix |
| 1570 | */ |
Ralf Baechle | 623ec04 | 2007-03-13 15:29:47 +0100 | [diff] [blame] | 1571 | static struct snd_pci_quirk position_fix_list[] __devinitdata = { |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1572 | SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_NONE), |
| 1573 | {} |
| 1574 | }; |
| 1575 | |
| 1576 | static int __devinit check_position_fix(struct azx *chip, int fix) |
| 1577 | { |
| 1578 | const struct snd_pci_quirk *q; |
| 1579 | |
| 1580 | if (fix == POS_FIX_AUTO) { |
| 1581 | q = snd_pci_quirk_lookup(chip->pci, position_fix_list); |
| 1582 | if (q) { |
| 1583 | snd_printdd(KERN_INFO |
| 1584 | "hda_intel: position_fix set to %d " |
| 1585 | "for device %04x:%04x\n", |
| 1586 | q->value, q->subvendor, q->subdevice); |
| 1587 | return q->value; |
| 1588 | } |
| 1589 | } |
| 1590 | return fix; |
| 1591 | } |
| 1592 | |
| 1593 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1594 | * constructor |
| 1595 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1596 | static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, |
Takashi Iwai | 606ad75 | 2005-11-24 16:03:40 +0100 | [diff] [blame] | 1597 | int driver_type, |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1598 | struct azx **rchip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1599 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1600 | struct azx *chip; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1601 | int err; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1602 | static struct snd_device_ops ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1603 | .dev_free = azx_dev_free, |
| 1604 | }; |
| 1605 | |
| 1606 | *rchip = NULL; |
| 1607 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1608 | err = pci_enable_device(pci); |
| 1609 | if (err < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1610 | return err; |
| 1611 | |
Takashi Iwai | e560d8d | 2005-09-09 14:21:46 +0200 | [diff] [blame] | 1612 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1613 | if (!chip) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1614 | snd_printk(KERN_ERR SFX "cannot allocate chip\n"); |
| 1615 | pci_disable_device(pci); |
| 1616 | return -ENOMEM; |
| 1617 | } |
| 1618 | |
| 1619 | spin_lock_init(&chip->reg_lock); |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1620 | mutex_init(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1621 | chip->card = card; |
| 1622 | chip->pci = pci; |
| 1623 | chip->irq = -1; |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1624 | chip->driver_type = driver_type; |
Takashi Iwai | 134a11f | 2006-11-10 12:08:37 +0100 | [diff] [blame] | 1625 | chip->msi = enable_msi; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1626 | |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1627 | chip->position_fix = check_position_fix(chip, position_fix); |
| 1628 | |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 1629 | chip->single_cmd = single_cmd; |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1630 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1631 | #if BITS_PER_LONG != 64 |
| 1632 | /* Fix up base address on ULI M5461 */ |
| 1633 | if (chip->driver_type == AZX_DRIVER_ULI) { |
| 1634 | u16 tmp3; |
| 1635 | pci_read_config_word(pci, 0x40, &tmp3); |
| 1636 | pci_write_config_word(pci, 0x40, tmp3 | 0x10); |
| 1637 | pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0); |
| 1638 | } |
| 1639 | #endif |
| 1640 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1641 | err = pci_request_regions(pci, "ICH HD audio"); |
| 1642 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1643 | kfree(chip); |
| 1644 | pci_disable_device(pci); |
| 1645 | return err; |
| 1646 | } |
| 1647 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1648 | chip->addr = pci_resource_start(pci, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1649 | chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci,0)); |
| 1650 | if (chip->remap_addr == NULL) { |
| 1651 | snd_printk(KERN_ERR SFX "ioremap error\n"); |
| 1652 | err = -ENXIO; |
| 1653 | goto errout; |
| 1654 | } |
| 1655 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1656 | if (chip->msi) |
| 1657 | if (pci_enable_msi(pci) < 0) |
| 1658 | chip->msi = 0; |
Stephen Hemminger | 7376d01 | 2006-08-21 19:17:46 +0200 | [diff] [blame] | 1659 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1660 | if (azx_acquire_irq(chip, 0) < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1661 | err = -EBUSY; |
| 1662 | goto errout; |
| 1663 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1664 | |
| 1665 | pci_set_master(pci); |
| 1666 | synchronize_irq(chip->irq); |
| 1667 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1668 | switch (chip->driver_type) { |
| 1669 | case AZX_DRIVER_ULI: |
| 1670 | chip->playback_streams = ULI_NUM_PLAYBACK; |
| 1671 | chip->capture_streams = ULI_NUM_CAPTURE; |
| 1672 | chip->playback_index_offset = ULI_PLAYBACK_INDEX; |
| 1673 | chip->capture_index_offset = ULI_CAPTURE_INDEX; |
| 1674 | break; |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 1675 | case AZX_DRIVER_ATIHDMI: |
| 1676 | chip->playback_streams = ATIHDMI_NUM_PLAYBACK; |
| 1677 | chip->capture_streams = ATIHDMI_NUM_CAPTURE; |
| 1678 | chip->playback_index_offset = ATIHDMI_PLAYBACK_INDEX; |
| 1679 | chip->capture_index_offset = ATIHDMI_CAPTURE_INDEX; |
| 1680 | break; |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1681 | default: |
| 1682 | chip->playback_streams = ICH6_NUM_PLAYBACK; |
| 1683 | chip->capture_streams = ICH6_NUM_CAPTURE; |
| 1684 | chip->playback_index_offset = ICH6_PLAYBACK_INDEX; |
| 1685 | chip->capture_index_offset = ICH6_CAPTURE_INDEX; |
| 1686 | break; |
| 1687 | } |
| 1688 | chip->num_streams = chip->playback_streams + chip->capture_streams; |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1689 | chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev), |
| 1690 | GFP_KERNEL); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1691 | if (!chip->azx_dev) { |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1692 | snd_printk(KERN_ERR "cannot malloc azx_dev\n"); |
| 1693 | goto errout; |
| 1694 | } |
| 1695 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1696 | /* allocate memory for the BDL for each stream */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1697 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
| 1698 | snd_dma_pci_data(chip->pci), |
| 1699 | BDL_SIZE, &chip->bdl); |
| 1700 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1701 | snd_printk(KERN_ERR SFX "cannot allocate BDL\n"); |
| 1702 | goto errout; |
| 1703 | } |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 1704 | /* allocate memory for the position buffer */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1705 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
| 1706 | snd_dma_pci_data(chip->pci), |
| 1707 | chip->num_streams * 8, &chip->posbuf); |
| 1708 | if (err < 0) { |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 1709 | snd_printk(KERN_ERR SFX "cannot allocate posbuf\n"); |
| 1710 | goto errout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1711 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1712 | /* allocate CORB/RIRB */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1713 | if (!chip->single_cmd) { |
| 1714 | err = azx_alloc_cmd_io(chip); |
| 1715 | if (err < 0) |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 1716 | goto errout; |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1717 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1718 | |
| 1719 | /* initialize streams */ |
| 1720 | azx_init_stream(chip); |
| 1721 | |
| 1722 | /* initialize chip */ |
| 1723 | azx_init_chip(chip); |
| 1724 | |
Takashi Iwai | ce43fba | 2005-05-30 20:33:44 +0200 | [diff] [blame] | 1725 | chip->initialized = 1; |
| 1726 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1727 | /* codec detection */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1728 | if (!chip->codec_mask) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1729 | snd_printk(KERN_ERR SFX "no codecs found!\n"); |
| 1730 | err = -ENODEV; |
| 1731 | goto errout; |
| 1732 | } |
| 1733 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1734 | err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); |
| 1735 | if (err <0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1736 | snd_printk(KERN_ERR SFX "Error creating device [card]!\n"); |
| 1737 | goto errout; |
| 1738 | } |
| 1739 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1740 | strcpy(card->driver, "HDA-Intel"); |
| 1741 | strcpy(card->shortname, driver_short_names[chip->driver_type]); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1742 | sprintf(card->longname, "%s at 0x%lx irq %i", |
| 1743 | card->shortname, chip->addr, chip->irq); |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1744 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1745 | *rchip = chip; |
| 1746 | return 0; |
| 1747 | |
| 1748 | errout: |
| 1749 | azx_free(chip); |
| 1750 | return err; |
| 1751 | } |
| 1752 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1753 | static int __devinit azx_probe(struct pci_dev *pci, |
| 1754 | const struct pci_device_id *pci_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1755 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1756 | struct snd_card *card; |
| 1757 | struct azx *chip; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1758 | int err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1759 | |
Clemens Ladisch | b7fe462 | 2005-10-04 08:46:51 +0200 | [diff] [blame] | 1760 | card = snd_card_new(index, id, THIS_MODULE, 0); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1761 | if (!card) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1762 | snd_printk(KERN_ERR SFX "Error creating card!\n"); |
| 1763 | return -ENOMEM; |
| 1764 | } |
| 1765 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1766 | err = azx_create(card, pci, pci_id->driver_data, &chip); |
| 1767 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1768 | snd_card_free(card); |
| 1769 | return err; |
| 1770 | } |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1771 | card->private_data = chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1772 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1773 | /* create codec instances */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1774 | err = azx_codec_create(chip, model); |
| 1775 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1776 | snd_card_free(card); |
| 1777 | return err; |
| 1778 | } |
| 1779 | |
| 1780 | /* create PCM streams */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1781 | err = azx_pcm_create(chip); |
| 1782 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1783 | snd_card_free(card); |
| 1784 | return err; |
| 1785 | } |
| 1786 | |
| 1787 | /* create mixer controls */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1788 | err = azx_mixer_create(chip); |
| 1789 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1790 | snd_card_free(card); |
| 1791 | return err; |
| 1792 | } |
| 1793 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1794 | snd_card_set_dev(card, &pci->dev); |
| 1795 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame^] | 1796 | err = snd_card_register(card); |
| 1797 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1798 | snd_card_free(card); |
| 1799 | return err; |
| 1800 | } |
| 1801 | |
| 1802 | pci_set_drvdata(pci, card); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1803 | |
| 1804 | return err; |
| 1805 | } |
| 1806 | |
| 1807 | static void __devexit azx_remove(struct pci_dev *pci) |
| 1808 | { |
| 1809 | snd_card_free(pci_get_drvdata(pci)); |
| 1810 | pci_set_drvdata(pci, NULL); |
| 1811 | } |
| 1812 | |
| 1813 | /* PCI IDs */ |
Takashi Iwai | f40b689 | 2006-07-05 16:51:05 +0200 | [diff] [blame] | 1814 | static struct pci_device_id azx_ids[] = { |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1815 | { 0x8086, 0x2668, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH6 */ |
| 1816 | { 0x8086, 0x27d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH7 */ |
| 1817 | { 0x8086, 0x269a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ESB2 */ |
Jason Gaston | d298139 | 2006-01-10 11:07:37 +0100 | [diff] [blame] | 1818 | { 0x8086, 0x284b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH8 */ |
Jason Gaston | f9cc8a8 | 2006-11-22 11:53:52 +0100 | [diff] [blame] | 1819 | { 0x8086, 0x293e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH9 */ |
| 1820 | { 0x8086, 0x293f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH9 */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1821 | { 0x1002, 0x437b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATI }, /* ATI SB450 */ |
Felix Kuehling | 89be83f | 2006-03-31 12:33:59 +0200 | [diff] [blame] | 1822 | { 0x1002, 0x4383, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATI }, /* ATI SB600 */ |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 1823 | { 0x1002, 0x793b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RS600 HDMI */ |
Felix Kuehling | 5b15c95 | 2006-10-16 12:49:47 +0200 | [diff] [blame] | 1824 | { 0x1002, 0x7919, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RS690 HDMI */ |
Wolke Liu | e6db111 | 2007-04-27 12:20:57 +0200 | [diff] [blame] | 1825 | { 0x1002, 0x960c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RS780 HDMI */ |
| 1826 | { 0x1002, 0xaa00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI R600 HDMI */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1827 | { 0x1106, 0x3288, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_VIA }, /* VIA VT8251/VT8237A */ |
| 1828 | { 0x1039, 0x7502, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_SIS }, /* SIS966 */ |
| 1829 | { 0x10b9, 0x5461, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ULI }, /* ULI M5461 */ |
Peer Chen | 5b005a0 | 2006-10-31 15:33:42 +0100 | [diff] [blame] | 1830 | { 0x10de, 0x026c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP51 */ |
| 1831 | { 0x10de, 0x0371, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP55 */ |
| 1832 | { 0x10de, 0x03e4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP61 */ |
| 1833 | { 0x10de, 0x03f0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP61 */ |
| 1834 | { 0x10de, 0x044a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP65 */ |
| 1835 | { 0x10de, 0x044b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP65 */ |
| 1836 | { 0x10de, 0x055c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP67 */ |
| 1837 | { 0x10de, 0x055d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP67 */ |
Peer Chen | 15cc445 | 2007-06-08 13:55:10 +0200 | [diff] [blame] | 1838 | { 0x10de, 0x07fc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP73 */ |
| 1839 | { 0x10de, 0x07fd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP73 */ |
| 1840 | { 0x10de, 0x0774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ |
| 1841 | { 0x10de, 0x0775, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ |
| 1842 | { 0x10de, 0x0776, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ |
| 1843 | { 0x10de, 0x0777, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1844 | { 0, } |
| 1845 | }; |
| 1846 | MODULE_DEVICE_TABLE(pci, azx_ids); |
| 1847 | |
| 1848 | /* pci_driver definition */ |
| 1849 | static struct pci_driver driver = { |
| 1850 | .name = "HDA Intel", |
| 1851 | .id_table = azx_ids, |
| 1852 | .probe = azx_probe, |
| 1853 | .remove = __devexit_p(azx_remove), |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1854 | #ifdef CONFIG_PM |
| 1855 | .suspend = azx_suspend, |
| 1856 | .resume = azx_resume, |
| 1857 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1858 | }; |
| 1859 | |
| 1860 | static int __init alsa_card_azx_init(void) |
| 1861 | { |
Takashi Iwai | 01d25d4 | 2005-04-11 16:58:24 +0200 | [diff] [blame] | 1862 | return pci_register_driver(&driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1863 | } |
| 1864 | |
| 1865 | static void __exit alsa_card_azx_exit(void) |
| 1866 | { |
| 1867 | pci_unregister_driver(&driver); |
| 1868 | } |
| 1869 | |
| 1870 | module_init(alsa_card_azx_init) |
| 1871 | module_exit(alsa_card_azx_exit) |