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Graeme Gregory518fb722011-05-02 16:20:08 -05001/*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
Graeme Gregory518fb722011-05-02 16:20:08 -050023#include <linux/slab.h>
24#include <linux/gpio.h>
25#include <linux/mfd/tps65910.h>
Rhyland Klein67901782012-05-08 11:42:41 -070026#include <linux/regulator/of_regulator.h>
Graeme Gregory518fb722011-05-02 16:20:08 -050027
Graeme Gregory518fb722011-05-02 16:20:08 -050028#define TPS65910_SUPPLY_STATE_ENABLED 0x1
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +053029#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
Laxman Dewanganf30b0712012-03-07 18:21:49 +053031 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
32 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Graeme Gregory518fb722011-05-02 16:20:08 -050033
Thomas Weber91fe4d52012-02-17 17:46:21 +010034/* supported VIO voltages in millivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050035static const u16 VIO_VSEL_table[] = {
36 1500, 1800, 2500, 3300,
37};
38
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -050039/* VSEL tables for TPS65910 specific LDOs and dcdc's */
40
Thomas Weber91fe4d52012-02-17 17:46:21 +010041/* supported VDD3 voltages in millivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050042static const u16 VDD3_VSEL_table[] = {
43 5000,
44};
45
Thomas Weber91fe4d52012-02-17 17:46:21 +010046/* supported VDIG1 voltages in millivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050047static const u16 VDIG1_VSEL_table[] = {
48 1200, 1500, 1800, 2700,
49};
50
Thomas Weber91fe4d52012-02-17 17:46:21 +010051/* supported VDIG2 voltages in millivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050052static const u16 VDIG2_VSEL_table[] = {
53 1000, 1100, 1200, 1800,
54};
55
Thomas Weber91fe4d52012-02-17 17:46:21 +010056/* supported VPLL voltages in millivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050057static const u16 VPLL_VSEL_table[] = {
58 1000, 1100, 1800, 2500,
59};
60
Thomas Weber91fe4d52012-02-17 17:46:21 +010061/* supported VDAC voltages in millivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050062static const u16 VDAC_VSEL_table[] = {
63 1800, 2600, 2800, 2850,
64};
65
Thomas Weber91fe4d52012-02-17 17:46:21 +010066/* supported VAUX1 voltages in millivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050067static const u16 VAUX1_VSEL_table[] = {
68 1800, 2500, 2800, 2850,
69};
70
Thomas Weber91fe4d52012-02-17 17:46:21 +010071/* supported VAUX2 voltages in millivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050072static const u16 VAUX2_VSEL_table[] = {
73 1800, 2800, 2900, 3300,
74};
75
Thomas Weber91fe4d52012-02-17 17:46:21 +010076/* supported VAUX33 voltages in millivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050077static const u16 VAUX33_VSEL_table[] = {
78 1800, 2000, 2800, 3300,
79};
80
Thomas Weber91fe4d52012-02-17 17:46:21 +010081/* supported VMMC voltages in millivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050082static const u16 VMMC_VSEL_table[] = {
83 1800, 2800, 3000, 3300,
84};
85
86struct tps_info {
87 const char *name;
88 unsigned min_uV;
89 unsigned max_uV;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +053090 u8 n_voltages;
91 const u16 *voltage_table;
Laxman Dewangan0651eed2012-03-13 11:35:20 +053092 int enable_time_us;
Graeme Gregory518fb722011-05-02 16:20:08 -050093};
94
95static struct tps_info tps65910_regs[] = {
96 {
Laxman Dewangan33a69432012-05-19 20:04:06 +053097 .name = "vrtc",
Laxman Dewangan0651eed2012-03-13 11:35:20 +053098 .enable_time_us = 2200,
Graeme Gregory518fb722011-05-02 16:20:08 -050099 },
100 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530101 .name = "vio",
Graeme Gregory518fb722011-05-02 16:20:08 -0500102 .min_uV = 1500000,
103 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530104 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
105 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530106 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500107 },
108 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530109 .name = "vdd1",
Graeme Gregory518fb722011-05-02 16:20:08 -0500110 .min_uV = 600000,
111 .max_uV = 4500000,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530112 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500113 },
114 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530115 .name = "vdd2",
Graeme Gregory518fb722011-05-02 16:20:08 -0500116 .min_uV = 600000,
117 .max_uV = 4500000,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530118 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500119 },
120 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530121 .name = "vdd3",
Graeme Gregory518fb722011-05-02 16:20:08 -0500122 .min_uV = 5000000,
123 .max_uV = 5000000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530124 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
125 .voltage_table = VDD3_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530126 .enable_time_us = 200,
Graeme Gregory518fb722011-05-02 16:20:08 -0500127 },
128 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530129 .name = "vdig1",
Graeme Gregory518fb722011-05-02 16:20:08 -0500130 .min_uV = 1200000,
131 .max_uV = 2700000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530132 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
133 .voltage_table = VDIG1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530134 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500135 },
136 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530137 .name = "vdig2",
Graeme Gregory518fb722011-05-02 16:20:08 -0500138 .min_uV = 1000000,
139 .max_uV = 1800000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530140 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
141 .voltage_table = VDIG2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530142 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500143 },
144 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530145 .name = "vpll",
Graeme Gregory518fb722011-05-02 16:20:08 -0500146 .min_uV = 1000000,
147 .max_uV = 2500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530148 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
149 .voltage_table = VPLL_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530150 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500151 },
152 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530153 .name = "vdac",
Graeme Gregory518fb722011-05-02 16:20:08 -0500154 .min_uV = 1800000,
155 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530156 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
157 .voltage_table = VDAC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530158 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500159 },
160 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530161 .name = "vaux1",
Graeme Gregory518fb722011-05-02 16:20:08 -0500162 .min_uV = 1800000,
163 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530164 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
165 .voltage_table = VAUX1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530166 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500167 },
168 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530169 .name = "vaux2",
Graeme Gregory518fb722011-05-02 16:20:08 -0500170 .min_uV = 1800000,
171 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530172 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
173 .voltage_table = VAUX2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530174 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500175 },
176 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530177 .name = "vaux33",
Graeme Gregory518fb722011-05-02 16:20:08 -0500178 .min_uV = 1800000,
179 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530180 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
181 .voltage_table = VAUX33_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530182 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500183 },
184 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530185 .name = "vmmc",
Graeme Gregory518fb722011-05-02 16:20:08 -0500186 .min_uV = 1800000,
187 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530188 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
189 .voltage_table = VMMC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530190 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500191 },
192};
193
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500194static struct tps_info tps65911_regs[] = {
195 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530196 .name = "vrtc",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530197 .enable_time_us = 2200,
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530198 },
199 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530200 .name = "vio",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500201 .min_uV = 1500000,
202 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530203 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
204 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530205 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500206 },
207 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530208 .name = "vdd1",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500209 .min_uV = 600000,
210 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530211 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530212 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500213 },
214 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530215 .name = "vdd2",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500216 .min_uV = 600000,
217 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530218 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530219 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500220 },
221 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530222 .name = "vddctrl",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500223 .min_uV = 600000,
224 .max_uV = 1400000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530225 .n_voltages = 65,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530226 .enable_time_us = 900,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500227 },
228 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530229 .name = "ldo1",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500230 .min_uV = 1000000,
231 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530232 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530233 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500234 },
235 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530236 .name = "ldo2",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500237 .min_uV = 1000000,
238 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530239 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530240 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500241 },
242 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530243 .name = "ldo3",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500244 .min_uV = 1000000,
245 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530246 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530247 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500248 },
249 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530250 .name = "ldo4",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500251 .min_uV = 1000000,
252 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530253 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530254 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500255 },
256 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530257 .name = "ldo5",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500258 .min_uV = 1000000,
259 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530260 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530261 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500262 },
263 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530264 .name = "ldo6",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500265 .min_uV = 1000000,
266 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530267 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530268 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500269 },
270 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530271 .name = "ldo7",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500272 .min_uV = 1000000,
273 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530274 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530275 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500276 },
277 {
Laxman Dewangan33a69432012-05-19 20:04:06 +0530278 .name = "ldo8",
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500279 .min_uV = 1000000,
280 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530281 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530282 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500283 },
284};
285
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530286#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
287static unsigned int tps65910_ext_sleep_control[] = {
288 0,
289 EXT_CONTROL_REG_BITS(VIO, 1, 0),
290 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
291 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
292 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
293 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
294 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
295 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
296 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
297 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
298 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
299 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
300 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
301};
302
303static unsigned int tps65911_ext_sleep_control[] = {
304 0,
305 EXT_CONTROL_REG_BITS(VIO, 1, 0),
306 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
307 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
308 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
309 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
310 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
311 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
312 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
313 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
314 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
315 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
316 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
317};
318
Graeme Gregory518fb722011-05-02 16:20:08 -0500319struct tps65910_reg {
Axel Lin39aa9b62011-07-11 09:57:43 +0800320 struct regulator_desc *desc;
Graeme Gregory518fb722011-05-02 16:20:08 -0500321 struct tps65910 *mfd;
Axel Lin39aa9b62011-07-11 09:57:43 +0800322 struct regulator_dev **rdev;
323 struct tps_info **info;
Graeme Gregory518fb722011-05-02 16:20:08 -0500324 struct mutex mutex;
Axel Lin39aa9b62011-07-11 09:57:43 +0800325 int num_regulators;
Graeme Gregory518fb722011-05-02 16:20:08 -0500326 int mode;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500327 int (*get_ctrl_reg)(int);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530328 unsigned int *ext_sleep_control;
329 unsigned int board_ext_control[TPS65910_NUM_REGS];
Graeme Gregory518fb722011-05-02 16:20:08 -0500330};
331
332static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
333{
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700334 unsigned int val;
Graeme Gregory518fb722011-05-02 16:20:08 -0500335 int err;
336
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700337 err = tps65910_reg_read(pmic->mfd, reg, &val);
Graeme Gregory518fb722011-05-02 16:20:08 -0500338 if (err)
339 return err;
340
341 return val;
342}
343
Graeme Gregory518fb722011-05-02 16:20:08 -0500344static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
345 u8 set_mask, u8 clear_mask)
346{
347 int err, data;
348
349 mutex_lock(&pmic->mutex);
350
351 data = tps65910_read(pmic, reg);
352 if (data < 0) {
353 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
354 err = data;
355 goto out;
356 }
357
358 data &= ~clear_mask;
359 data |= set_mask;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700360 err = tps65910_reg_write(pmic->mfd, reg, data);
Graeme Gregory518fb722011-05-02 16:20:08 -0500361 if (err)
362 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
363
364out:
365 mutex_unlock(&pmic->mutex);
366 return err;
367}
368
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700369static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg)
Graeme Gregory518fb722011-05-02 16:20:08 -0500370{
371 int data;
372
373 mutex_lock(&pmic->mutex);
374
375 data = tps65910_read(pmic, reg);
376 if (data < 0)
377 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
378
379 mutex_unlock(&pmic->mutex);
380 return data;
381}
382
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700383static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val)
Graeme Gregory518fb722011-05-02 16:20:08 -0500384{
385 int err;
386
387 mutex_lock(&pmic->mutex);
388
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700389 err = tps65910_reg_write(pmic->mfd, reg, val);
Graeme Gregory518fb722011-05-02 16:20:08 -0500390 if (err < 0)
391 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
392
393 mutex_unlock(&pmic->mutex);
394 return err;
395}
396
397static int tps65910_get_ctrl_register(int id)
398{
399 switch (id) {
400 case TPS65910_REG_VRTC:
401 return TPS65910_VRTC;
402 case TPS65910_REG_VIO:
403 return TPS65910_VIO;
404 case TPS65910_REG_VDD1:
405 return TPS65910_VDD1;
406 case TPS65910_REG_VDD2:
407 return TPS65910_VDD2;
408 case TPS65910_REG_VDD3:
409 return TPS65910_VDD3;
410 case TPS65910_REG_VDIG1:
411 return TPS65910_VDIG1;
412 case TPS65910_REG_VDIG2:
413 return TPS65910_VDIG2;
414 case TPS65910_REG_VPLL:
415 return TPS65910_VPLL;
416 case TPS65910_REG_VDAC:
417 return TPS65910_VDAC;
418 case TPS65910_REG_VAUX1:
419 return TPS65910_VAUX1;
420 case TPS65910_REG_VAUX2:
421 return TPS65910_VAUX2;
422 case TPS65910_REG_VAUX33:
423 return TPS65910_VAUX33;
424 case TPS65910_REG_VMMC:
425 return TPS65910_VMMC;
426 default:
427 return -EINVAL;
428 }
429}
430
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500431static int tps65911_get_ctrl_register(int id)
432{
433 switch (id) {
434 case TPS65910_REG_VRTC:
435 return TPS65910_VRTC;
436 case TPS65910_REG_VIO:
437 return TPS65910_VIO;
438 case TPS65910_REG_VDD1:
439 return TPS65910_VDD1;
440 case TPS65910_REG_VDD2:
441 return TPS65910_VDD2;
442 case TPS65911_REG_VDDCTRL:
443 return TPS65911_VDDCTRL;
444 case TPS65911_REG_LDO1:
445 return TPS65911_LDO1;
446 case TPS65911_REG_LDO2:
447 return TPS65911_LDO2;
448 case TPS65911_REG_LDO3:
449 return TPS65911_LDO3;
450 case TPS65911_REG_LDO4:
451 return TPS65911_LDO4;
452 case TPS65911_REG_LDO5:
453 return TPS65911_LDO5;
454 case TPS65911_REG_LDO6:
455 return TPS65911_LDO6;
456 case TPS65911_REG_LDO7:
457 return TPS65911_LDO7;
458 case TPS65911_REG_LDO8:
459 return TPS65911_LDO8;
460 default:
461 return -EINVAL;
462 }
463}
464
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530465static int tps65910_enable_time(struct regulator_dev *dev)
466{
467 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
468 int id = rdev_get_id(dev);
469 return pmic->info[id]->enable_time_us;
470}
Graeme Gregory518fb722011-05-02 16:20:08 -0500471
472static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
473{
474 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
475 struct tps65910 *mfd = pmic->mfd;
476 int reg, value, id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500477
478 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500479 if (reg < 0)
480 return reg;
481
482 switch (mode) {
483 case REGULATOR_MODE_NORMAL:
484 return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
485 LDO_ST_MODE_BIT);
486 case REGULATOR_MODE_IDLE:
487 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700488 return tps65910_reg_set_bits(mfd, reg, value);
Graeme Gregory518fb722011-05-02 16:20:08 -0500489 case REGULATOR_MODE_STANDBY:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700490 return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
Graeme Gregory518fb722011-05-02 16:20:08 -0500491 }
492
493 return -EINVAL;
494}
495
496static unsigned int tps65910_get_mode(struct regulator_dev *dev)
497{
498 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
499 int reg, value, id = rdev_get_id(dev);
500
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500501 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500502 if (reg < 0)
503 return reg;
504
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700505 value = tps65910_reg_read_locked(pmic, reg);
Graeme Gregory518fb722011-05-02 16:20:08 -0500506 if (value < 0)
507 return value;
508
Axel Lin58599392012-03-13 07:15:27 +0800509 if (!(value & LDO_ST_ON_BIT))
Graeme Gregory518fb722011-05-02 16:20:08 -0500510 return REGULATOR_MODE_STANDBY;
511 else if (value & LDO_ST_MODE_BIT)
512 return REGULATOR_MODE_IDLE;
513 else
514 return REGULATOR_MODE_NORMAL;
515}
516
Laxman Dewangan18039e02012-03-14 13:00:58 +0530517static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500518{
519 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Laxman Dewangan18039e02012-03-14 13:00:58 +0530520 int id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500521 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500522
523 switch (id) {
524 case TPS65910_REG_VDD1:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700525 opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP);
526 mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1);
Graeme Gregory518fb722011-05-02 16:20:08 -0500527 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700528 srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR);
Graeme Gregory518fb722011-05-02 16:20:08 -0500529 sr = opvsel & VDD1_OP_CMD_MASK;
530 opvsel &= VDD1_OP_SEL_MASK;
531 srvsel &= VDD1_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500532 vselmax = 75;
Graeme Gregory518fb722011-05-02 16:20:08 -0500533 break;
534 case TPS65910_REG_VDD2:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700535 opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP);
536 mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2);
Graeme Gregory518fb722011-05-02 16:20:08 -0500537 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700538 srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR);
Graeme Gregory518fb722011-05-02 16:20:08 -0500539 sr = opvsel & VDD2_OP_CMD_MASK;
540 opvsel &= VDD2_OP_SEL_MASK;
541 srvsel &= VDD2_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500542 vselmax = 75;
543 break;
544 case TPS65911_REG_VDDCTRL:
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700545 opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP);
546 srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500547 sr = opvsel & VDDCTRL_OP_CMD_MASK;
548 opvsel &= VDDCTRL_OP_SEL_MASK;
549 srvsel &= VDDCTRL_SR_SEL_MASK;
550 vselmax = 64;
Graeme Gregory518fb722011-05-02 16:20:08 -0500551 break;
552 }
553
554 /* multiplier 0 == 1 but 2,3 normal */
555 if (!mult)
556 mult=1;
557
558 if (sr) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500559 /* normalise to valid range */
560 if (srvsel < 3)
561 srvsel = 3;
562 if (srvsel > vselmax)
563 srvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530564 return srvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500565 } else {
566
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500567 /* normalise to valid range*/
568 if (opvsel < 3)
569 opvsel = 3;
570 if (opvsel > vselmax)
571 opvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530572 return opvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500573 }
Laxman Dewangan18039e02012-03-14 13:00:58 +0530574 return -EINVAL;
Graeme Gregory518fb722011-05-02 16:20:08 -0500575}
576
Axel Lin1f904fd2012-05-09 09:22:47 +0800577static int tps65910_get_voltage_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500578{
579 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Lin1f904fd2012-05-09 09:22:47 +0800580 int reg, value, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500581
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500582 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500583 if (reg < 0)
584 return reg;
585
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700586 value = tps65910_reg_read_locked(pmic, reg);
Graeme Gregory518fb722011-05-02 16:20:08 -0500587 if (value < 0)
588 return value;
589
590 switch (id) {
591 case TPS65910_REG_VIO:
592 case TPS65910_REG_VDIG1:
593 case TPS65910_REG_VDIG2:
594 case TPS65910_REG_VPLL:
595 case TPS65910_REG_VDAC:
596 case TPS65910_REG_VAUX1:
597 case TPS65910_REG_VAUX2:
598 case TPS65910_REG_VAUX33:
599 case TPS65910_REG_VMMC:
600 value &= LDO_SEL_MASK;
601 value >>= LDO_SEL_SHIFT;
602 break;
603 default:
604 return -EINVAL;
605 }
606
Axel Lin1f904fd2012-05-09 09:22:47 +0800607 return value;
Graeme Gregory518fb722011-05-02 16:20:08 -0500608}
609
610static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
611{
612 return 5 * 1000 * 1000;
613}
614
Axel Lin1f904fd2012-05-09 09:22:47 +0800615static int tps65911_get_voltage_sel(struct regulator_dev *dev)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500616{
617 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Axel Lin1f904fd2012-05-09 09:22:47 +0800618 int id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500619 u8 value, reg;
620
621 reg = pmic->get_ctrl_reg(id);
622
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700623 value = tps65910_reg_read_locked(pmic, reg);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500624
625 switch (id) {
626 case TPS65911_REG_LDO1:
627 case TPS65911_REG_LDO2:
628 case TPS65911_REG_LDO4:
629 value &= LDO1_SEL_MASK;
630 value >>= LDO_SEL_SHIFT;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500631 break;
632 case TPS65911_REG_LDO3:
633 case TPS65911_REG_LDO5:
634 case TPS65911_REG_LDO6:
635 case TPS65911_REG_LDO7:
636 case TPS65911_REG_LDO8:
637 value &= LDO3_SEL_MASK;
638 value >>= LDO_SEL_SHIFT;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500639 break;
640 case TPS65910_REG_VIO:
Laxman Dewangane882eae2012-02-17 18:56:11 +0530641 value &= LDO_SEL_MASK;
642 value >>= LDO_SEL_SHIFT;
Axel Lin1f904fd2012-05-09 09:22:47 +0800643 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500644 default:
645 return -EINVAL;
646 }
647
Axel Lin1f904fd2012-05-09 09:22:47 +0800648 return value;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500649}
650
Axel Lin94732b92012-03-09 10:22:20 +0800651static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
652 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500653{
654 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
655 int id = rdev_get_id(dev), vsel;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500656 int dcdc_mult = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500657
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500658 switch (id) {
659 case TPS65910_REG_VDD1:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530660 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500661 if (dcdc_mult == 1)
662 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530663 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500664
Graeme Gregory518fb722011-05-02 16:20:08 -0500665 tps65910_modify_bits(pmic, TPS65910_VDD1,
666 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
667 VDD1_VGAIN_SEL_MASK);
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700668 tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500669 break;
670 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530671 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500672 if (dcdc_mult == 1)
673 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530674 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500675
Graeme Gregory518fb722011-05-02 16:20:08 -0500676 tps65910_modify_bits(pmic, TPS65910_VDD2,
677 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
678 VDD1_VGAIN_SEL_MASK);
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700679 tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500680 break;
681 case TPS65911_REG_VDDCTRL:
Laxman Dewanganc4632ae2012-03-07 16:39:05 +0530682 vsel = selector + 3;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700683 tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel);
Graeme Gregory518fb722011-05-02 16:20:08 -0500684 }
685
686 return 0;
687}
688
Axel Lin94732b92012-03-09 10:22:20 +0800689static int tps65910_set_voltage_sel(struct regulator_dev *dev,
690 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500691{
692 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
693 int reg, id = rdev_get_id(dev);
694
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500695 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500696 if (reg < 0)
697 return reg;
698
699 switch (id) {
700 case TPS65910_REG_VIO:
701 case TPS65910_REG_VDIG1:
702 case TPS65910_REG_VDIG2:
703 case TPS65910_REG_VPLL:
704 case TPS65910_REG_VDAC:
705 case TPS65910_REG_VAUX1:
706 case TPS65910_REG_VAUX2:
707 case TPS65910_REG_VAUX33:
708 case TPS65910_REG_VMMC:
709 return tps65910_modify_bits(pmic, reg,
710 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
711 }
712
713 return -EINVAL;
714}
715
Axel Lin94732b92012-03-09 10:22:20 +0800716static int tps65911_set_voltage_sel(struct regulator_dev *dev,
717 unsigned selector)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500718{
719 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
720 int reg, id = rdev_get_id(dev);
721
722 reg = pmic->get_ctrl_reg(id);
723 if (reg < 0)
724 return reg;
725
726 switch (id) {
727 case TPS65911_REG_LDO1:
728 case TPS65911_REG_LDO2:
729 case TPS65911_REG_LDO4:
730 return tps65910_modify_bits(pmic, reg,
731 (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
732 case TPS65911_REG_LDO3:
733 case TPS65911_REG_LDO5:
734 case TPS65911_REG_LDO6:
735 case TPS65911_REG_LDO7:
736 case TPS65911_REG_LDO8:
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500737 return tps65910_modify_bits(pmic, reg,
738 (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
Laxman Dewangane882eae2012-02-17 18:56:11 +0530739 case TPS65910_REG_VIO:
740 return tps65910_modify_bits(pmic, reg,
741 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500742 }
743
744 return -EINVAL;
745}
746
747
Graeme Gregory518fb722011-05-02 16:20:08 -0500748static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
749 unsigned selector)
750{
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500751 int volt, mult = 1, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500752
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500753 switch (id) {
754 case TPS65910_REG_VDD1:
755 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530756 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500757 volt = VDD1_2_MIN_VOLT +
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530758 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
Axel Lind04156b2011-07-10 21:44:09 +0800759 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500760 case TPS65911_REG_VDDCTRL:
761 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
Axel Lind04156b2011-07-10 21:44:09 +0800762 break;
763 default:
764 BUG();
765 return -EINVAL;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500766 }
Graeme Gregory518fb722011-05-02 16:20:08 -0500767
768 return volt * 100 * mult;
769}
770
771static int tps65910_list_voltage(struct regulator_dev *dev,
772 unsigned selector)
773{
774 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
775 int id = rdev_get_id(dev), voltage;
776
777 if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
778 return -EINVAL;
779
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530780 if (selector >= pmic->info[id]->n_voltages)
Graeme Gregory518fb722011-05-02 16:20:08 -0500781 return -EINVAL;
782 else
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530783 voltage = pmic->info[id]->voltage_table[selector] * 1000;
Graeme Gregory518fb722011-05-02 16:20:08 -0500784
785 return voltage;
786}
787
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500788static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
789{
790 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
791 int step_mv = 0, id = rdev_get_id(dev);
792
793 switch(id) {
794 case TPS65911_REG_LDO1:
795 case TPS65911_REG_LDO2:
796 case TPS65911_REG_LDO4:
797 /* The first 5 values of the selector correspond to 1V */
798 if (selector < 5)
799 selector = 0;
800 else
801 selector -= 4;
802
803 step_mv = 50;
804 break;
805 case TPS65911_REG_LDO3:
806 case TPS65911_REG_LDO5:
807 case TPS65911_REG_LDO6:
808 case TPS65911_REG_LDO7:
809 case TPS65911_REG_LDO8:
810 /* The first 3 values of the selector correspond to 1V */
811 if (selector < 3)
812 selector = 0;
813 else
814 selector -= 2;
815
816 step_mv = 100;
817 break;
818 case TPS65910_REG_VIO:
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530819 return pmic->info[id]->voltage_table[selector] * 1000;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500820 default:
821 return -EINVAL;
822 }
823
824 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
825}
826
Laxman Dewangan18039e02012-03-14 13:00:58 +0530827static int tps65910_set_voltage_dcdc_time_sel(struct regulator_dev *dev,
828 unsigned int old_selector, unsigned int new_selector)
829{
830 int id = rdev_get_id(dev);
831 int old_volt, new_volt;
832
833 old_volt = tps65910_list_voltage_dcdc(dev, old_selector);
834 if (old_volt < 0)
835 return old_volt;
836
837 new_volt = tps65910_list_voltage_dcdc(dev, new_selector);
838 if (new_volt < 0)
839 return new_volt;
840
841 /* VDD1 and VDD2 are 12.5mV/us, VDDCTRL is 100mV/20us */
842 switch (id) {
843 case TPS65910_REG_VDD1:
844 case TPS65910_REG_VDD2:
845 return DIV_ROUND_UP(abs(old_volt - new_volt), 12500);
846 case TPS65911_REG_VDDCTRL:
847 return DIV_ROUND_UP(abs(old_volt - new_volt), 5000);
848 }
849 return -EINVAL;
850}
851
Graeme Gregory518fb722011-05-02 16:20:08 -0500852/* Regulator ops (except VRTC) */
853static struct regulator_ops tps65910_ops_dcdc = {
Axel Lina40a9c42012-04-17 14:34:46 +0800854 .is_enabled = regulator_is_enabled_regmap,
855 .enable = regulator_enable_regmap,
856 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530857 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500858 .set_mode = tps65910_set_mode,
859 .get_mode = tps65910_get_mode,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530860 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800861 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530862 .set_voltage_time_sel = tps65910_set_voltage_dcdc_time_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500863 .list_voltage = tps65910_list_voltage_dcdc,
864};
865
866static struct regulator_ops tps65910_ops_vdd3 = {
Axel Lina40a9c42012-04-17 14:34:46 +0800867 .is_enabled = regulator_is_enabled_regmap,
868 .enable = regulator_enable_regmap,
869 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530870 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500871 .set_mode = tps65910_set_mode,
872 .get_mode = tps65910_get_mode,
873 .get_voltage = tps65910_get_voltage_vdd3,
874 .list_voltage = tps65910_list_voltage,
875};
876
877static struct regulator_ops tps65910_ops = {
Axel Lina40a9c42012-04-17 14:34:46 +0800878 .is_enabled = regulator_is_enabled_regmap,
879 .enable = regulator_enable_regmap,
880 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530881 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500882 .set_mode = tps65910_set_mode,
883 .get_mode = tps65910_get_mode,
Axel Lin1f904fd2012-05-09 09:22:47 +0800884 .get_voltage_sel = tps65910_get_voltage_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800885 .set_voltage_sel = tps65910_set_voltage_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500886 .list_voltage = tps65910_list_voltage,
887};
888
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500889static struct regulator_ops tps65911_ops = {
Axel Lina40a9c42012-04-17 14:34:46 +0800890 .is_enabled = regulator_is_enabled_regmap,
891 .enable = regulator_enable_regmap,
892 .disable = regulator_disable_regmap,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530893 .enable_time = tps65910_enable_time,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500894 .set_mode = tps65910_set_mode,
895 .get_mode = tps65910_get_mode,
Axel Lin1f904fd2012-05-09 09:22:47 +0800896 .get_voltage_sel = tps65911_get_voltage_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800897 .set_voltage_sel = tps65911_set_voltage_sel,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500898 .list_voltage = tps65911_list_voltage,
899};
900
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530901static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
902 int id, int ext_sleep_config)
903{
904 struct tps65910 *mfd = pmic->mfd;
905 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
906 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
907 int ret;
908
909 /*
910 * Regulator can not be control from multiple external input EN1, EN2
911 * and EN3 together.
912 */
913 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
914 int en_count;
915 en_count = ((ext_sleep_config &
916 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
917 en_count += ((ext_sleep_config &
918 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
919 en_count += ((ext_sleep_config &
920 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530921 en_count += ((ext_sleep_config &
922 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530923 if (en_count > 1) {
924 dev_err(mfd->dev,
925 "External sleep control flag is not proper\n");
926 return -EINVAL;
927 }
928 }
929
930 pmic->board_ext_control[id] = ext_sleep_config;
931
932 /* External EN1 control */
933 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700934 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530935 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
936 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700937 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530938 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
939 if (ret < 0) {
940 dev_err(mfd->dev,
941 "Error in configuring external control EN1\n");
942 return ret;
943 }
944
945 /* External EN2 control */
946 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700947 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530948 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
949 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700950 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530951 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
952 if (ret < 0) {
953 dev_err(mfd->dev,
954 "Error in configuring external control EN2\n");
955 return ret;
956 }
957
958 /* External EN3 control for TPS65910 LDO only */
959 if ((tps65910_chip_id(mfd) == TPS65910) &&
960 (id >= TPS65910_REG_VDIG1)) {
961 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700962 ret = tps65910_reg_set_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530963 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
964 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700965 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530966 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
967 if (ret < 0) {
968 dev_err(mfd->dev,
969 "Error in configuring external control EN3\n");
970 return ret;
971 }
972 }
973
974 /* Return if no external control is selected */
975 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
976 /* Clear all sleep controls */
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700977 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530978 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
979 if (!ret)
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700980 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530981 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
982 if (ret < 0)
983 dev_err(mfd->dev,
984 "Error in configuring SLEEP register\n");
985 return ret;
986 }
987
988 /*
989 * For regulator that has separate operational and sleep register make
990 * sure that operational is used and clear sleep register to turn
991 * regulator off when external control is inactive
992 */
993 if ((id == TPS65910_REG_VDD1) ||
994 (id == TPS65910_REG_VDD2) ||
995 ((id == TPS65911_REG_VDDCTRL) &&
996 (tps65910_chip_id(mfd) == TPS65911))) {
997 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
998 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
Rhyland Klein3f7e8272012-05-08 11:42:38 -0700999 int opvsel = tps65910_reg_read_locked(pmic, op_reg_add);
1000 int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301001 if (opvsel & VDD1_OP_CMD_MASK) {
1002 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
Rhyland Klein3f7e8272012-05-08 11:42:38 -07001003 ret = tps65910_reg_write_locked(pmic, op_reg_add,
1004 reg_val);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301005 if (ret < 0) {
1006 dev_err(mfd->dev,
1007 "Error in configuring op register\n");
1008 return ret;
1009 }
1010 }
Rhyland Klein3f7e8272012-05-08 11:42:38 -07001011 ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301012 if (ret < 0) {
1013 dev_err(mfd->dev, "Error in settting sr register\n");
1014 return ret;
1015 }
1016 }
1017
Rhyland Klein3f7e8272012-05-08 11:42:38 -07001018 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301019 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301020 if (!ret) {
1021 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Rhyland Klein3f7e8272012-05-08 11:42:38 -07001022 ret = tps65910_reg_set_bits(mfd,
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301023 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1024 else
Rhyland Klein3f7e8272012-05-08 11:42:38 -07001025 ret = tps65910_reg_clear_bits(mfd,
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301026 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1027 }
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301028 if (ret < 0)
1029 dev_err(mfd->dev,
1030 "Error in configuring SLEEP register\n");
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301031
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301032 return ret;
1033}
1034
Rhyland Klein67901782012-05-08 11:42:41 -07001035#ifdef CONFIG_OF
1036
1037static struct of_regulator_match tps65910_matches[] = {
Laxman Dewangan33a69432012-05-19 20:04:06 +05301038 { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
1039 { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
1040 { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
1041 { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
1042 { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
1043 { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
1044 { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
1045 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
1046 { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
1047 { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
1048 { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
1049 { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
1050 { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
Rhyland Klein67901782012-05-08 11:42:41 -07001051};
1052
1053static struct of_regulator_match tps65911_matches[] = {
Laxman Dewangan33a69432012-05-19 20:04:06 +05301054 { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
1055 { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
1056 { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
1057 { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
1058 { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
1059 { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
1060 { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
1061 { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
1062 { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
1063 { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
1064 { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
1065 { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
1066 { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
Rhyland Klein67901782012-05-08 11:42:41 -07001067};
1068
1069static struct tps65910_board *tps65910_parse_dt_reg_data(
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301070 struct platform_device *pdev,
1071 struct of_regulator_match **tps65910_reg_matches)
Rhyland Klein67901782012-05-08 11:42:41 -07001072{
1073 struct tps65910_board *pmic_plat_data;
1074 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1075 struct device_node *np = pdev->dev.parent->of_node;
1076 struct device_node *regulators;
1077 struct of_regulator_match *matches;
1078 unsigned int prop;
1079 int idx = 0, ret, count;
1080
1081 pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
1082 GFP_KERNEL);
1083
1084 if (!pmic_plat_data) {
1085 dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n");
1086 return NULL;
1087 }
1088
1089 regulators = of_find_node_by_name(np, "regulators");
Laxman Dewangan92ab9532012-05-20 21:48:49 +05301090 if (!regulators) {
1091 dev_err(&pdev->dev, "regulator node not found\n");
1092 return NULL;
1093 }
Rhyland Klein67901782012-05-08 11:42:41 -07001094
1095 switch (tps65910_chip_id(tps65910)) {
1096 case TPS65910:
1097 count = ARRAY_SIZE(tps65910_matches);
1098 matches = tps65910_matches;
1099 break;
1100 case TPS65911:
1101 count = ARRAY_SIZE(tps65911_matches);
1102 matches = tps65911_matches;
1103 break;
1104 default:
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301105 dev_err(&pdev->dev, "Invalid tps chip version\n");
Rhyland Klein67901782012-05-08 11:42:41 -07001106 return NULL;
1107 }
1108
1109 ret = of_regulator_match(pdev->dev.parent, regulators, matches, count);
1110 if (ret < 0) {
1111 dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
1112 ret);
1113 return NULL;
1114 }
1115
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301116 *tps65910_reg_matches = matches;
1117
Rhyland Klein67901782012-05-08 11:42:41 -07001118 for (idx = 0; idx < count; idx++) {
1119 if (!matches[idx].init_data || !matches[idx].of_node)
1120 continue;
1121
1122 pmic_plat_data->tps65910_pmic_init_data[idx] =
1123 matches[idx].init_data;
1124
1125 ret = of_property_read_u32(matches[idx].of_node,
1126 "ti,regulator-ext-sleep-control", &prop);
1127 if (!ret)
1128 pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
1129 }
1130
1131 return pmic_plat_data;
1132}
1133#else
1134static inline struct tps65910_board *tps65910_parse_dt_reg_data(
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301135 struct platform_device *pdev,
1136 struct of_regulator_match **tps65910_reg_matches)
Rhyland Klein67901782012-05-08 11:42:41 -07001137{
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301138 *tps65910_reg_matches = NULL;
Rhyland Klein67901782012-05-08 11:42:41 -07001139 return 0;
1140}
1141#endif
1142
Graeme Gregory518fb722011-05-02 16:20:08 -05001143static __devinit int tps65910_probe(struct platform_device *pdev)
1144{
1145 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
Mark Brownc1727082012-04-04 00:50:22 +01001146 struct regulator_config config = { };
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001147 struct tps_info *info;
Graeme Gregory518fb722011-05-02 16:20:08 -05001148 struct regulator_init_data *reg_data;
1149 struct regulator_dev *rdev;
1150 struct tps65910_reg *pmic;
1151 struct tps65910_board *pmic_plat_data;
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301152 struct of_regulator_match *tps65910_reg_matches = NULL;
Graeme Gregory518fb722011-05-02 16:20:08 -05001153 int i, err;
1154
1155 pmic_plat_data = dev_get_platdata(tps65910->dev);
Rhyland Klein67901782012-05-08 11:42:41 -07001156 if (!pmic_plat_data && tps65910->dev->of_node)
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301157 pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
1158 &tps65910_reg_matches);
Rhyland Klein67901782012-05-08 11:42:41 -07001159
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301160 if (!pmic_plat_data) {
1161 dev_err(&pdev->dev, "Platform data not found\n");
Graeme Gregory518fb722011-05-02 16:20:08 -05001162 return -EINVAL;
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301163 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001164
Axel Lin9eb0c422012-04-11 14:40:18 +08001165 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301166 if (!pmic) {
1167 dev_err(&pdev->dev, "Memory allocation failed for pmic\n");
Graeme Gregory518fb722011-05-02 16:20:08 -05001168 return -ENOMEM;
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301169 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001170
1171 mutex_init(&pmic->mutex);
1172 pmic->mfd = tps65910;
1173 platform_set_drvdata(pdev, pmic);
1174
1175 /* Give control of all register to control port */
Rhyland Klein3f7e8272012-05-08 11:42:38 -07001176 tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
Graeme Gregory518fb722011-05-02 16:20:08 -05001177 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1178
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001179 switch(tps65910_chip_id(tps65910)) {
1180 case TPS65910:
1181 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001182 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301183 pmic->ext_sleep_control = tps65910_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001184 info = tps65910_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001185 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001186 case TPS65911:
1187 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001188 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301189 pmic->ext_sleep_control = tps65911_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001190 info = tps65911_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001191 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001192 default:
Laxman Dewangan7e9a57e2012-05-20 21:48:48 +05301193 dev_err(&pdev->dev, "Invalid tps chip version\n");
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001194 return -ENODEV;
1195 }
1196
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301197 pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001198 sizeof(struct regulator_desc), GFP_KERNEL);
1199 if (!pmic->desc) {
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301200 dev_err(&pdev->dev, "Memory alloc fails for desc\n");
1201 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001202 }
1203
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301204 pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001205 sizeof(struct tps_info *), GFP_KERNEL);
1206 if (!pmic->info) {
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301207 dev_err(&pdev->dev, "Memory alloc fails for info\n");
1208 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001209 }
1210
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301211 pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
Axel Lin39aa9b62011-07-11 09:57:43 +08001212 sizeof(struct regulator_dev *), GFP_KERNEL);
1213 if (!pmic->rdev) {
Laxman Dewangan68d8c1c2012-05-19 20:04:09 +05301214 dev_err(&pdev->dev, "Memory alloc fails for rdev\n");
1215 return -ENOMEM;
Axel Lin39aa9b62011-07-11 09:57:43 +08001216 }
1217
Kyle Mannac1fc1482011-11-03 12:08:06 -05001218 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1219 i++, info++) {
1220
1221 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1222
1223 /* Regulator API handles empty constraints but not NULL
1224 * constraints */
1225 if (!reg_data)
1226 continue;
1227
Graeme Gregory518fb722011-05-02 16:20:08 -05001228 /* Register the regulators */
1229 pmic->info[i] = info;
1230
1231 pmic->desc[i].name = info->name;
Axel Lin77fa44d2011-05-12 13:47:50 +08001232 pmic->desc[i].id = i;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +05301233 pmic->desc[i].n_voltages = info->n_voltages;
Graeme Gregory518fb722011-05-02 16:20:08 -05001234
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001235 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
Graeme Gregory518fb722011-05-02 16:20:08 -05001236 pmic->desc[i].ops = &tps65910_ops_dcdc;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +05301237 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1238 VDD1_2_NUM_VOLT_COARSE;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001239 } else if (i == TPS65910_REG_VDD3) {
1240 if (tps65910_chip_id(tps65910) == TPS65910)
1241 pmic->desc[i].ops = &tps65910_ops_vdd3;
1242 else
1243 pmic->desc[i].ops = &tps65910_ops_dcdc;
1244 } else {
1245 if (tps65910_chip_id(tps65910) == TPS65910)
1246 pmic->desc[i].ops = &tps65910_ops;
1247 else
1248 pmic->desc[i].ops = &tps65911_ops;
1249 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001250
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301251 err = tps65910_set_ext_sleep_config(pmic, i,
1252 pmic_plat_data->regulator_ext_sleep_control[i]);
1253 /*
1254 * Failing on regulator for configuring externally control
1255 * is not a serious issue, just throw warning.
1256 */
1257 if (err < 0)
1258 dev_warn(tps65910->dev,
1259 "Failed to initialise ext control config\n");
1260
Graeme Gregory518fb722011-05-02 16:20:08 -05001261 pmic->desc[i].type = REGULATOR_VOLTAGE;
1262 pmic->desc[i].owner = THIS_MODULE;
Axel Lina40a9c42012-04-17 14:34:46 +08001263 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
1264 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
Graeme Gregory518fb722011-05-02 16:20:08 -05001265
Mark Brownc1727082012-04-04 00:50:22 +01001266 config.dev = tps65910->dev;
1267 config.init_data = reg_data;
1268 config.driver_data = pmic;
Axel Lina40a9c42012-04-17 14:34:46 +08001269 config.regmap = tps65910->regmap;
Mark Brownc1727082012-04-04 00:50:22 +01001270
Laxman Dewangan84df8c12012-05-20 21:48:50 +05301271 if (tps65910_reg_matches)
1272 config.of_node = tps65910_reg_matches[i].of_node;
Rhyland Klein67901782012-05-08 11:42:41 -07001273
Mark Brownc1727082012-04-04 00:50:22 +01001274 rdev = regulator_register(&pmic->desc[i], &config);
Graeme Gregory518fb722011-05-02 16:20:08 -05001275 if (IS_ERR(rdev)) {
1276 dev_err(tps65910->dev,
1277 "failed to register %s regulator\n",
1278 pdev->name);
1279 err = PTR_ERR(rdev);
Axel Lin39aa9b62011-07-11 09:57:43 +08001280 goto err_unregister_regulator;
Graeme Gregory518fb722011-05-02 16:20:08 -05001281 }
1282
1283 /* Save regulator for cleanup */
1284 pmic->rdev[i] = rdev;
1285 }
1286 return 0;
1287
Axel Lin39aa9b62011-07-11 09:57:43 +08001288err_unregister_regulator:
Graeme Gregory518fb722011-05-02 16:20:08 -05001289 while (--i >= 0)
1290 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001291 return err;
1292}
1293
1294static int __devexit tps65910_remove(struct platform_device *pdev)
1295{
Axel Lin39aa9b62011-07-11 09:57:43 +08001296 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
Graeme Gregory518fb722011-05-02 16:20:08 -05001297 int i;
1298
Axel Lin39aa9b62011-07-11 09:57:43 +08001299 for (i = 0; i < pmic->num_regulators; i++)
1300 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001301
Graeme Gregory518fb722011-05-02 16:20:08 -05001302 return 0;
1303}
1304
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301305static void tps65910_shutdown(struct platform_device *pdev)
1306{
1307 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1308 int i;
1309
1310 /*
1311 * Before bootloader jumps to kernel, it makes sure that required
1312 * external control signals are in desired state so that given rails
1313 * can be configure accordingly.
1314 * If rails are configured to be controlled from external control
1315 * then before shutting down/rebooting the system, the external
1316 * control configuration need to be remove from the rails so that
1317 * its output will be available as per register programming even
1318 * if external controls are removed. This is require when the POR
1319 * value of the control signals are not in active state and before
1320 * bootloader initializes it, the system requires the rail output
1321 * to be active for booting.
1322 */
1323 for (i = 0; i < pmic->num_regulators; i++) {
1324 int err;
1325 if (!pmic->rdev[i])
1326 continue;
1327
1328 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1329 if (err < 0)
1330 dev_err(&pdev->dev,
1331 "Error in clearing external control\n");
1332 }
1333}
1334
Graeme Gregory518fb722011-05-02 16:20:08 -05001335static struct platform_driver tps65910_driver = {
1336 .driver = {
1337 .name = "tps65910-pmic",
1338 .owner = THIS_MODULE,
1339 },
1340 .probe = tps65910_probe,
1341 .remove = __devexit_p(tps65910_remove),
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301342 .shutdown = tps65910_shutdown,
Graeme Gregory518fb722011-05-02 16:20:08 -05001343};
1344
1345static int __init tps65910_init(void)
1346{
1347 return platform_driver_register(&tps65910_driver);
1348}
1349subsys_initcall(tps65910_init);
1350
1351static void __exit tps65910_cleanup(void)
1352{
1353 platform_driver_unregister(&tps65910_driver);
1354}
1355module_exit(tps65910_cleanup);
1356
1357MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
Axel Linae0e6542012-02-21 10:14:55 +08001358MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
Graeme Gregory518fb722011-05-02 16:20:08 -05001359MODULE_LICENSE("GPL v2");
1360MODULE_ALIAS("platform:tps65910-pmic");