Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1 | /* |
Dhaval Patel | 785f0d1 | 2018-01-04 13:18:55 -0800 | [diff] [blame] | 2 | * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 3 | * Copyright (C) 2013 Red Hat |
| 4 | * Author: Rob Clark <robdclark@gmail.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published by |
| 8 | * the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | * more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License along with |
| 16 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 17 | */ |
Lloyd Atkinson | f76121a | 2017-01-30 17:30:55 -0500 | [diff] [blame] | 18 | /* |
| 19 | * Copyright (c) 2016 Intel Corporation |
| 20 | * |
| 21 | * Permission to use, copy, modify, distribute, and sell this software and its |
| 22 | * documentation for any purpose is hereby granted without fee, provided that |
| 23 | * the above copyright notice appear in all copies and that both that copyright |
| 24 | * notice and this permission notice appear in supporting documentation, and |
| 25 | * that the name of the copyright holders not be used in advertising or |
| 26 | * publicity pertaining to distribution of the software without specific, |
| 27 | * written prior permission. The copyright holders make no representations |
| 28 | * about the suitability of this software for any purpose. It is provided "as |
| 29 | * is" without express or implied warranty. |
| 30 | * |
| 31 | * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, |
| 32 | * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO |
| 33 | * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR |
| 34 | * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, |
| 35 | * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 36 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE |
| 37 | * OF THIS SOFTWARE. |
| 38 | */ |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 39 | |
Dhaval Patel | 3949f03 | 2016-06-20 16:24:33 -0700 | [diff] [blame] | 40 | #include <linux/of_address.h> |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 41 | #include <linux/kthread.h> |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 42 | #include "msm_drv.h" |
Rob Clark | edcd60c | 2016-03-16 12:56:12 -0400 | [diff] [blame] | 43 | #include "msm_debugfs.h" |
Rob Clark | fde5de6 | 2016-03-15 15:35:08 -0400 | [diff] [blame] | 44 | #include "msm_fence.h" |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 45 | #include "msm_gpu.h" |
Rob Clark | dd2da6e | 2013-11-30 16:12:10 -0500 | [diff] [blame] | 46 | #include "msm_kms.h" |
Alan Kwong | bb27c09 | 2016-07-20 16:41:25 -0400 | [diff] [blame] | 47 | #include "sde_wb.h" |
Shashank Babu Chinta Venkata | ded9c56 | 2017-03-15 14:43:46 -0700 | [diff] [blame] | 48 | #include "dsi_display.h" |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 49 | |
Rob Clark | a8d854c | 2016-06-01 14:02:02 -0400 | [diff] [blame] | 50 | /* |
| 51 | * MSM driver version: |
| 52 | * - 1.0.0 - initial interface |
| 53 | * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers |
Rob Clark | 7a3bcc0 | 2016-09-16 18:37:44 -0400 | [diff] [blame] | 54 | * - 1.2.0 - adds explicit fence support for submit ioctl |
Rob Clark | a8d854c | 2016-06-01 14:02:02 -0400 | [diff] [blame] | 55 | */ |
| 56 | #define MSM_VERSION_MAJOR 1 |
Rob Clark | 7a3bcc0 | 2016-09-16 18:37:44 -0400 | [diff] [blame] | 57 | #define MSM_VERSION_MINOR 2 |
Rob Clark | a8d854c | 2016-06-01 14:02:02 -0400 | [diff] [blame] | 58 | #define MSM_VERSION_PATCHLEVEL 0 |
| 59 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 60 | static void msm_fb_output_poll_changed(struct drm_device *dev) |
| 61 | { |
Tatenda Chipeperekwa | 6a2a5ce | 2017-06-01 16:35:59 -0700 | [diff] [blame] | 62 | struct msm_drm_private *priv = NULL; |
| 63 | |
| 64 | if (!dev) { |
| 65 | DRM_ERROR("output_poll_changed failed, invalid input\n"); |
| 66 | return; |
| 67 | } |
| 68 | |
| 69 | priv = dev->dev_private; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 70 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 71 | if (priv->fbdev) |
| 72 | drm_fb_helper_hotplug_event(priv->fbdev); |
| 73 | } |
| 74 | |
Abhijit Kulkarni | 7444a7d | 2017-06-21 18:53:36 -0700 | [diff] [blame] | 75 | /** |
| 76 | * msm_atomic_helper_check - validate state object |
| 77 | * @dev: DRM device |
| 78 | * @state: the driver state object |
| 79 | * |
| 80 | * This is a wrapper for the drm_atomic_helper_check to check the modeset |
| 81 | * and state checking for planes. Additionally it checks if any secure |
| 82 | * transition(moving CRTC and planes between secure and non-secure states and |
| 83 | * vice versa) is allowed or not. When going to secure state, planes |
| 84 | * with fb_mode as dir translated only can be staged on the CRTC, and only one |
| 85 | * CRTC should be active. |
| 86 | * Also mixing of secure and non-secure is not allowed. |
| 87 | * |
| 88 | * RETURNS |
| 89 | * Zero for success or -errorno. |
| 90 | */ |
Clarence Ip | a65cba5 | 2017-03-17 15:18:29 -0400 | [diff] [blame] | 91 | int msm_atomic_check(struct drm_device *dev, |
| 92 | struct drm_atomic_state *state) |
| 93 | { |
Abhijit Kulkarni | 7444a7d | 2017-06-21 18:53:36 -0700 | [diff] [blame] | 94 | struct msm_drm_private *priv; |
| 95 | |
Abhijit Kulkarni | 7444a7d | 2017-06-21 18:53:36 -0700 | [diff] [blame] | 96 | priv = dev->dev_private; |
| 97 | if (priv && priv->kms && priv->kms->funcs && |
| 98 | priv->kms->funcs->atomic_check) |
| 99 | return priv->kms->funcs->atomic_check(priv->kms, state); |
| 100 | |
Clarence Ip | a65cba5 | 2017-03-17 15:18:29 -0400 | [diff] [blame] | 101 | return drm_atomic_helper_check(dev, state); |
| 102 | } |
| 103 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 104 | static const struct drm_mode_config_funcs mode_config_funcs = { |
| 105 | .fb_create = msm_framebuffer_create, |
| 106 | .output_poll_changed = msm_fb_output_poll_changed, |
Clarence Ip | a65cba5 | 2017-03-17 15:18:29 -0400 | [diff] [blame] | 107 | .atomic_check = msm_atomic_check, |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 108 | .atomic_commit = msm_atomic_commit, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 109 | }; |
| 110 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 111 | #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING |
| 112 | static bool reglog = false; |
| 113 | MODULE_PARM_DESC(reglog, "Enable register read/write logging"); |
| 114 | module_param(reglog, bool, 0600); |
| 115 | #else |
| 116 | #define reglog 0 |
| 117 | #endif |
| 118 | |
Archit Taneja | a9ee34b | 2015-07-13 12:12:07 +0530 | [diff] [blame] | 119 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
Rob Clark | e90dfec | 2015-01-30 17:05:41 -0500 | [diff] [blame] | 120 | static bool fbdev = true; |
| 121 | MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer"); |
| 122 | module_param(fbdev, bool, 0600); |
| 123 | #endif |
| 124 | |
Rob Clark | 3a10ba8 | 2014-09-08 14:24:57 -0400 | [diff] [blame] | 125 | static char *vram = "16m"; |
Rob Clark | 4313c74 | 2016-02-03 14:02:04 -0500 | [diff] [blame] | 126 | MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)"); |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 127 | module_param(vram, charp, 0); |
| 128 | |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 129 | /* |
| 130 | * Util/helpers: |
| 131 | */ |
| 132 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 133 | void __iomem *msm_ioremap(struct platform_device *pdev, const char *name, |
| 134 | const char *dbgname) |
| 135 | { |
| 136 | struct resource *res; |
| 137 | unsigned long size; |
| 138 | void __iomem *ptr; |
| 139 | |
| 140 | if (name) |
| 141 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name); |
| 142 | else |
| 143 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 144 | |
| 145 | if (!res) { |
| 146 | dev_err(&pdev->dev, "failed to get memory resource: %s\n", name); |
| 147 | return ERR_PTR(-EINVAL); |
| 148 | } |
| 149 | |
| 150 | size = resource_size(res); |
| 151 | |
| 152 | ptr = devm_ioremap_nocache(&pdev->dev, res->start, size); |
| 153 | if (!ptr) { |
| 154 | dev_err(&pdev->dev, "failed to ioremap: %s\n", name); |
| 155 | return ERR_PTR(-ENOMEM); |
| 156 | } |
| 157 | |
| 158 | if (reglog) |
Lakshmi Narayana Kalavala | 89b6cbe | 2018-05-11 11:28:12 -0700 | [diff] [blame] | 159 | dev_dbg(&pdev->dev, "IO:region %s %pK %08lx\n", |
| 160 | dbgname, ptr, size); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 161 | |
| 162 | return ptr; |
| 163 | } |
| 164 | |
Dhaval Patel | a243084 | 2017-06-15 14:32:36 -0700 | [diff] [blame] | 165 | unsigned long msm_iomap_size(struct platform_device *pdev, const char *name) |
| 166 | { |
| 167 | struct resource *res; |
| 168 | |
| 169 | if (name) |
| 170 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name); |
| 171 | else |
| 172 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 173 | |
| 174 | if (!res) { |
| 175 | dev_err(&pdev->dev, "failed to get memory resource: %s\n", |
| 176 | name); |
| 177 | return 0; |
| 178 | } |
| 179 | |
| 180 | return resource_size(res); |
| 181 | } |
| 182 | |
Lloyd Atkinson | 1a0c917 | 2016-10-04 10:01:24 -0400 | [diff] [blame] | 183 | void msm_iounmap(struct platform_device *pdev, void __iomem *addr) |
| 184 | { |
| 185 | devm_iounmap(&pdev->dev, addr); |
| 186 | } |
| 187 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 188 | void msm_writel(u32 data, void __iomem *addr) |
| 189 | { |
| 190 | if (reglog) |
Lakshmi Narayana Kalavala | 89b6cbe | 2018-05-11 11:28:12 -0700 | [diff] [blame] | 191 | pr_debug("IO:W %pK %08x\n", addr, data); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 192 | writel(data, addr); |
| 193 | } |
| 194 | |
| 195 | u32 msm_readl(const void __iomem *addr) |
| 196 | { |
| 197 | u32 val = readl(addr); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 198 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 199 | if (reglog) |
Lakshmi Narayana Kalavala | 89b6cbe | 2018-05-11 11:28:12 -0700 | [diff] [blame] | 200 | pr_err("IO:R %pK %08x\n", addr, val); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 201 | return val; |
| 202 | } |
| 203 | |
Jayant Shekhar | e70b028 | 2018-10-04 23:20:35 +0530 | [diff] [blame] | 204 | struct vblank_work { |
| 205 | struct kthread_work work; |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 206 | int crtc_id; |
| 207 | bool enable; |
Jayant Shekhar | e70b028 | 2018-10-04 23:20:35 +0530 | [diff] [blame] | 208 | struct msm_drm_private *priv; |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 209 | }; |
| 210 | |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 211 | static void vblank_ctrl_worker(struct kthread_work *work) |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 212 | { |
Jayant Shekhar | e70b028 | 2018-10-04 23:20:35 +0530 | [diff] [blame] | 213 | struct vblank_work *cur_work = container_of(work, |
| 214 | struct vblank_work, work); |
| 215 | struct msm_drm_private *priv = cur_work->priv; |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 216 | struct msm_kms *kms = priv->kms; |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 217 | |
Jayant Shekhar | e70b028 | 2018-10-04 23:20:35 +0530 | [diff] [blame] | 218 | if (cur_work->enable) |
| 219 | kms->funcs->enable_vblank(kms, priv->crtcs[cur_work->crtc_id]); |
| 220 | else |
| 221 | kms->funcs->disable_vblank(kms, priv->crtcs[cur_work->crtc_id]); |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 222 | |
Jayant Shekhar | e70b028 | 2018-10-04 23:20:35 +0530 | [diff] [blame] | 223 | kfree(cur_work); |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 224 | } |
| 225 | |
| 226 | static int vblank_ctrl_queue_work(struct msm_drm_private *priv, |
| 227 | int crtc_id, bool enable) |
| 228 | { |
Jayant Shekhar | e70b028 | 2018-10-04 23:20:35 +0530 | [diff] [blame] | 229 | struct vblank_work *cur_work; |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 230 | |
Jayant Shekhar | e70b028 | 2018-10-04 23:20:35 +0530 | [diff] [blame] | 231 | if (!priv || crtc_id >= priv->num_crtcs) |
| 232 | return -EINVAL; |
| 233 | |
| 234 | cur_work = kzalloc(sizeof(*cur_work), GFP_ATOMIC); |
| 235 | if (!cur_work) |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 236 | return -ENOMEM; |
| 237 | |
Jayant Shekhar | e70b028 | 2018-10-04 23:20:35 +0530 | [diff] [blame] | 238 | kthread_init_work(&cur_work->work, vblank_ctrl_worker); |
| 239 | cur_work->crtc_id = crtc_id; |
| 240 | cur_work->enable = enable; |
| 241 | cur_work->priv = priv; |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 242 | |
Jayant Shekhar | e70b028 | 2018-10-04 23:20:35 +0530 | [diff] [blame] | 243 | kthread_queue_work(&priv->disp_thread[crtc_id].worker, &cur_work->work); |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 244 | |
| 245 | return 0; |
| 246 | } |
| 247 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 248 | static int msm_drm_uninit(struct device *dev) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 249 | { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 250 | struct platform_device *pdev = to_platform_device(dev); |
| 251 | struct drm_device *ddev = platform_get_drvdata(pdev); |
| 252 | struct msm_drm_private *priv = ddev->dev_private; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 253 | struct msm_kms *kms = priv->kms; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 254 | struct msm_gpu *gpu = priv->gpu; |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 255 | int i; |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 256 | |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 257 | /* clean up display commit/event worker threads */ |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 258 | for (i = 0; i < priv->num_crtcs; i++) { |
| 259 | if (priv->disp_thread[i].thread) { |
| 260 | kthread_flush_worker(&priv->disp_thread[i].worker); |
| 261 | kthread_stop(priv->disp_thread[i].thread); |
| 262 | priv->disp_thread[i].thread = NULL; |
| 263 | } |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 264 | |
| 265 | if (priv->event_thread[i].thread) { |
| 266 | kthread_flush_worker(&priv->event_thread[i].worker); |
| 267 | kthread_stop(priv->event_thread[i].thread); |
| 268 | priv->event_thread[i].thread = NULL; |
| 269 | } |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 270 | } |
| 271 | |
Rob Clark | 6820939 | 2016-05-17 16:19:32 -0400 | [diff] [blame] | 272 | msm_gem_shrinker_cleanup(ddev); |
| 273 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 274 | drm_kms_helper_poll_fini(ddev); |
Archit Taneja | 1aaa57f | 2016-02-25 11:19:45 +0530 | [diff] [blame] | 275 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 276 | drm_mode_config_cleanup(ddev); |
| 277 | drm_vblank_cleanup(ddev); |
| 278 | |
Lloyd Atkinson | ab3dd30 | 2017-02-13 10:44:55 -0800 | [diff] [blame] | 279 | if (priv->registered) { |
| 280 | drm_dev_unregister(ddev); |
| 281 | priv->registered = false; |
| 282 | } |
Archit Taneja | 8208ed9 | 2016-05-02 11:05:53 +0530 | [diff] [blame] | 283 | |
Archit Taneja | 1aaa57f | 2016-02-25 11:19:45 +0530 | [diff] [blame] | 284 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
| 285 | if (fbdev && priv->fbdev) |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 286 | msm_fbdev_free(ddev); |
Archit Taneja | 1aaa57f | 2016-02-25 11:19:45 +0530 | [diff] [blame] | 287 | #endif |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 288 | drm_mode_config_cleanup(ddev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 289 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 290 | pm_runtime_get_sync(dev); |
| 291 | drm_irq_uninstall(ddev); |
| 292 | pm_runtime_put_sync(dev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 293 | |
| 294 | flush_workqueue(priv->wq); |
| 295 | destroy_workqueue(priv->wq); |
| 296 | |
Archit Taneja | 1697608 | 2016-11-03 17:36:18 +0530 | [diff] [blame] | 297 | if (kms && kms->funcs) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 298 | kms->funcs->destroy(kms); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 299 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 300 | if (gpu) { |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 301 | mutex_lock(&ddev->struct_mutex); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 302 | gpu->funcs->pm_suspend(gpu); |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 303 | mutex_unlock(&ddev->struct_mutex); |
Rob Clark | 774449e | 2015-05-15 09:19:36 -0400 | [diff] [blame] | 304 | gpu->funcs->destroy(gpu); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 305 | } |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 306 | |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 307 | if (priv->vram.paddr) { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 308 | unsigned long attrs = DMA_ATTR_NO_KERNEL_MAPPING; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 309 | |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 310 | drm_mm_takedown(&priv->vram.mm); |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 311 | dma_free_attrs(dev, priv->vram.size, NULL, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 312 | priv->vram.paddr, attrs); |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 313 | } |
| 314 | |
Dhaval Patel | a243084 | 2017-06-15 14:32:36 -0700 | [diff] [blame] | 315 | component_unbind_all(dev, ddev); |
| 316 | |
Lloyd Atkinson | 113aefd | 2016-10-23 13:15:18 -0400 | [diff] [blame] | 317 | sde_dbg_destroy(); |
Dhaval Patel | 6c66662 | 2017-03-21 23:02:59 -0700 | [diff] [blame] | 318 | debugfs_remove_recursive(priv->debug_root); |
Lloyd Atkinson | 5d40d31 | 2016-09-06 08:34:13 -0400 | [diff] [blame] | 319 | |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 320 | sde_power_client_destroy(&priv->phandle, priv->pclient); |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 321 | sde_power_resource_deinit(pdev, &priv->phandle); |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 322 | |
Archit Taneja | 0a6030d | 2016-05-08 21:36:28 +0530 | [diff] [blame] | 323 | msm_mdss_destroy(ddev); |
| 324 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 325 | ddev->dev_private = NULL; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 326 | kfree(priv); |
| 327 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 328 | drm_dev_unref(ddev); |
| 329 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 330 | return 0; |
| 331 | } |
| 332 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 333 | #define KMS_MDP4 4 |
| 334 | #define KMS_MDP5 5 |
| 335 | #define KMS_SDE 3 |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 336 | |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 337 | static int get_mdp_ver(struct platform_device *pdev) |
| 338 | { |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 339 | #ifdef CONFIG_OF |
| 340 | static const struct of_device_id match_types[] = { { |
| 341 | .compatible = "qcom,mdss_mdp", |
| 342 | .data = (void *)KMS_MDP5, |
| 343 | }, |
| 344 | { |
| 345 | .compatible = "qcom,sde-kms", |
| 346 | .data = (void *)KMS_SDE, |
Alan Kwong | 4023ceb | 2017-04-21 06:20:17 -0700 | [diff] [blame] | 347 | }, |
| 348 | {} }; |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 349 | struct device *dev = &pdev->dev; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 350 | const struct of_device_id *match; |
Archit Taneja | e9fbdaf | 2015-11-18 12:15:14 +0530 | [diff] [blame] | 351 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 352 | match = of_match_node(match_types, dev->of_node); |
| 353 | if (match) |
| 354 | return (int)(unsigned long)match->data; |
| 355 | #endif |
| 356 | return KMS_MDP4; |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 357 | } |
| 358 | |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 359 | static int msm_init_vram(struct drm_device *dev) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 360 | { |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 361 | struct msm_drm_private *priv = dev->dev_private; |
Archit Taneja | e9fbdaf | 2015-11-18 12:15:14 +0530 | [diff] [blame] | 362 | struct device_node *node; |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 363 | unsigned long size = 0; |
| 364 | int ret = 0; |
| 365 | |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 366 | /* In the device-tree world, we could have a 'memory-region' |
| 367 | * phandle, which gives us a link to our "vram". Allocating |
| 368 | * is all nicely abstracted behind the dma api, but we need |
| 369 | * to know the entire size to allocate it all in one go. There |
| 370 | * are two cases: |
| 371 | * 1) device with no IOMMU, in which case we need exclusive |
| 372 | * access to a VRAM carveout big enough for all gpu |
| 373 | * buffers |
| 374 | * 2) device with IOMMU, but where the bootloader puts up |
| 375 | * a splash screen. In this case, the VRAM carveout |
| 376 | * need only be large enough for fbdev fb. But we need |
| 377 | * exclusive access to the buffer to avoid the kernel |
| 378 | * using those pages for other purposes (which appears |
| 379 | * as corruption on screen before we have a chance to |
| 380 | * load and do initial modeset) |
| 381 | */ |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 382 | |
| 383 | node = of_parse_phandle(dev->dev->of_node, "memory-region", 0); |
| 384 | if (node) { |
| 385 | struct resource r; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 386 | |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 387 | ret = of_address_to_resource(node, 0, &r); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 388 | |
Peter Chen | 2ca41c17 | 2016-07-04 16:49:50 +0800 | [diff] [blame] | 389 | of_node_put(node); |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 390 | if (ret) |
| 391 | return ret; |
| 392 | size = r.end - r.start; |
Thierry Reding | fc99f97 | 2015-04-09 16:39:51 +0200 | [diff] [blame] | 393 | DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 394 | |
Archit Taneja | e9fbdaf | 2015-11-18 12:15:14 +0530 | [diff] [blame] | 395 | /* if we have no IOMMU, then we need to use carveout allocator. |
| 396 | * Grab the entire CMA chunk carved out in early startup in |
| 397 | * mach-msm: |
| 398 | */ |
| 399 | } else if (!iommu_present(&platform_bus_type)) { |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 400 | DRM_INFO("using %s VRAM carveout\n", vram); |
| 401 | size = memparse(vram, NULL); |
| 402 | } |
| 403 | |
| 404 | if (size) { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 405 | unsigned long attrs = 0; |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 406 | void *p; |
| 407 | |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 408 | priv->vram.size = size; |
| 409 | |
| 410 | drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1); |
| 411 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 412 | attrs |= DMA_ATTR_NO_KERNEL_MAPPING; |
| 413 | attrs |= DMA_ATTR_WRITE_COMBINE; |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 414 | |
| 415 | /* note that for no-kernel-mapping, the vaddr returned |
| 416 | * is bogus, but non-null if allocation succeeded: |
| 417 | */ |
| 418 | p = dma_alloc_attrs(dev->dev, size, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 419 | &priv->vram.paddr, GFP_KERNEL, attrs); |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 420 | if (!p) { |
| 421 | dev_err(dev->dev, "failed to allocate VRAM\n"); |
| 422 | priv->vram.paddr = 0; |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 423 | return -ENOMEM; |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 424 | } |
| 425 | |
| 426 | dev_info(dev->dev, "VRAM: %08x->%08x\n", |
| 427 | (uint32_t)priv->vram.paddr, |
| 428 | (uint32_t)(priv->vram.paddr + size)); |
| 429 | } |
| 430 | |
Rob Clark | 072f1f9 | 2015-03-03 15:04:25 -0500 | [diff] [blame] | 431 | return ret; |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 432 | } |
| 433 | |
Dhaval Patel | 3949f03 | 2016-06-20 16:24:33 -0700 | [diff] [blame] | 434 | #ifdef CONFIG_OF |
| 435 | static int msm_component_bind_all(struct device *dev, |
| 436 | struct drm_device *drm_dev) |
| 437 | { |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 438 | int ret; |
| 439 | |
| 440 | ret = component_bind_all(dev, drm_dev); |
| 441 | if (ret) |
| 442 | DRM_ERROR("component_bind_all failed: %d\n", ret); |
| 443 | |
| 444 | return ret; |
Dhaval Patel | 3949f03 | 2016-06-20 16:24:33 -0700 | [diff] [blame] | 445 | } |
| 446 | #else |
| 447 | static int msm_component_bind_all(struct device *dev, |
| 448 | struct drm_device *drm_dev) |
| 449 | { |
| 450 | return 0; |
| 451 | } |
| 452 | #endif |
| 453 | |
Lloyd Atkinson | 113aefd | 2016-10-23 13:15:18 -0400 | [diff] [blame] | 454 | static int msm_power_enable_wrapper(void *handle, void *client, bool enable) |
| 455 | { |
| 456 | return sde_power_resource_enable(handle, client, enable); |
| 457 | } |
| 458 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 459 | static int msm_drm_init(struct device *dev, struct drm_driver *drv) |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 460 | { |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 461 | struct platform_device *pdev = to_platform_device(dev); |
| 462 | struct drm_device *ddev; |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 463 | struct msm_drm_private *priv; |
| 464 | struct msm_kms *kms; |
Lloyd Atkinson | 113aefd | 2016-10-23 13:15:18 -0400 | [diff] [blame] | 465 | struct sde_dbg_power_ctrl dbg_power_ctrl = { 0 }; |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 466 | int ret, i; |
Dhaval Patel | 824bbc2 | 2017-06-29 12:26:03 -0700 | [diff] [blame] | 467 | struct sched_param param; |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 468 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 469 | ddev = drm_dev_alloc(drv, dev); |
| 470 | if (!ddev) { |
| 471 | dev_err(dev, "failed to allocate drm_device\n"); |
| 472 | return -ENOMEM; |
| 473 | } |
| 474 | |
| 475 | drm_mode_config_init(ddev); |
| 476 | platform_set_drvdata(pdev, ddev); |
| 477 | ddev->platformdev = pdev; |
| 478 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 479 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
| 480 | if (!priv) { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 481 | ret = -ENOMEM; |
| 482 | goto priv_alloc_fail; |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 483 | } |
| 484 | |
| 485 | ddev->dev_private = priv; |
Rob Clark | 6820939 | 2016-05-17 16:19:32 -0400 | [diff] [blame] | 486 | priv->dev = ddev; |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 487 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 488 | ret = msm_mdss_init(ddev); |
| 489 | if (ret) |
| 490 | goto mdss_init_fail; |
| 491 | |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 492 | priv->wq = alloc_ordered_workqueue("msm_drm", 0); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 493 | init_waitqueue_head(&priv->pending_crtcs_event); |
| 494 | |
| 495 | INIT_LIST_HEAD(&priv->client_event_list); |
| 496 | INIT_LIST_HEAD(&priv->inactive_list); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 497 | |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 498 | ret = sde_power_resource_init(pdev, &priv->phandle); |
| 499 | if (ret) { |
| 500 | pr_err("sde power resource init failed\n"); |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 501 | goto power_init_fail; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 502 | } |
Rob Clark | 5bf9c0b | 2015-03-03 15:04:24 -0500 | [diff] [blame] | 503 | |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 504 | priv->pclient = sde_power_client_create(&priv->phandle, "sde"); |
| 505 | if (IS_ERR_OR_NULL(priv->pclient)) { |
| 506 | pr_err("sde power client create failed\n"); |
| 507 | ret = -EINVAL; |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 508 | goto power_client_fail; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 509 | } |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 510 | |
Dhaval Patel | a243084 | 2017-06-15 14:32:36 -0700 | [diff] [blame] | 511 | dbg_power_ctrl.handle = &priv->phandle; |
| 512 | dbg_power_ctrl.client = priv->pclient; |
| 513 | dbg_power_ctrl.enable_fn = msm_power_enable_wrapper; |
| 514 | ret = sde_dbg_init(&pdev->dev, &dbg_power_ctrl); |
| 515 | if (ret) { |
| 516 | dev_err(dev, "failed to init sde dbg: %d\n", ret); |
| 517 | goto dbg_init_fail; |
| 518 | } |
| 519 | |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 520 | /* Bind all our sub-components: */ |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 521 | ret = msm_component_bind_all(dev, ddev); |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 522 | if (ret) |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 523 | goto bind_fail; |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 524 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 525 | ret = msm_init_vram(ddev); |
Rob Clark | 13f1556 | 2015-05-07 15:20:13 -0400 | [diff] [blame] | 526 | if (ret) |
| 527 | goto fail; |
| 528 | |
Sean Paul | ccbbea9 | 2020-01-21 11:18:48 -0800 | [diff] [blame] | 529 | if (!dev->dma_parms) { |
| 530 | dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms), |
| 531 | GFP_KERNEL); |
| 532 | if (!dev->dma_parms) |
| 533 | return -ENOMEM; |
| 534 | } |
| 535 | dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); |
| 536 | |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 537 | switch (get_mdp_ver(pdev)) { |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 538 | case KMS_MDP4: |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 539 | kms = mdp4_kms_init(ddev); |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 540 | break; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 541 | case KMS_MDP5: |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 542 | kms = mdp5_kms_init(ddev); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 543 | break; |
| 544 | case KMS_SDE: |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 545 | kms = sde_kms_init(ddev); |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 546 | break; |
| 547 | default: |
| 548 | kms = ERR_PTR(-ENODEV); |
| 549 | break; |
| 550 | } |
| 551 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 552 | if (IS_ERR(kms)) { |
| 553 | /* |
| 554 | * NOTE: once we have GPU support, having no kms should not |
| 555 | * be considered fatal.. ideally we would still support gpu |
| 556 | * and (for example) use dmabuf/prime to share buffers with |
| 557 | * imx drm driver on iMX5 |
| 558 | */ |
Lloyd Atkinson | 1e2497e | 2016-09-26 17:55:48 -0400 | [diff] [blame] | 559 | priv->kms = NULL; |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 560 | dev_err(dev, "failed to load kms\n"); |
Thomas Meyer | e4826a9 | 2013-09-16 23:19:54 +0200 | [diff] [blame] | 561 | ret = PTR_ERR(kms); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 562 | goto fail; |
| 563 | } |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 564 | priv->kms = kms; |
| 565 | pm_runtime_enable(dev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 566 | |
Alan Kwong | 2994628 | 2017-02-01 21:55:56 -0800 | [diff] [blame] | 567 | if (kms) { |
| 568 | ret = kms->funcs->hw_init(kms); |
| 569 | if (ret) { |
| 570 | dev_err(dev, "kms hw init failed: %d\n", ret); |
| 571 | goto fail; |
| 572 | } |
| 573 | } |
| 574 | ddev->mode_config.funcs = &mode_config_funcs; |
| 575 | |
Dhaval Patel | 824bbc2 | 2017-06-29 12:26:03 -0700 | [diff] [blame] | 576 | /** |
| 577 | * this priority was found during empiric testing to have appropriate |
| 578 | * realtime scheduling to process display updates and interact with |
| 579 | * other real time and normal priority task |
| 580 | */ |
| 581 | param.sched_priority = 16; |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 582 | for (i = 0; i < priv->num_crtcs; i++) { |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 583 | |
| 584 | /* initialize display thread */ |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 585 | priv->disp_thread[i].crtc_id = priv->crtcs[i]->base.id; |
| 586 | kthread_init_worker(&priv->disp_thread[i].worker); |
| 587 | priv->disp_thread[i].dev = ddev; |
| 588 | priv->disp_thread[i].thread = |
| 589 | kthread_run(kthread_worker_fn, |
| 590 | &priv->disp_thread[i].worker, |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 591 | "crtc_commit:%d", priv->disp_thread[i].crtc_id); |
Dhaval Patel | 824bbc2 | 2017-06-29 12:26:03 -0700 | [diff] [blame] | 592 | ret = sched_setscheduler(priv->disp_thread[i].thread, |
| 593 | SCHED_FIFO, ¶m); |
| 594 | if (ret) |
| 595 | pr_warn("display thread priority update failed: %d\n", |
| 596 | ret); |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 597 | |
| 598 | if (IS_ERR(priv->disp_thread[i].thread)) { |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 599 | dev_err(dev, "failed to create crtc_commit kthread\n"); |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 600 | priv->disp_thread[i].thread = NULL; |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 601 | } |
| 602 | |
| 603 | /* initialize event thread */ |
| 604 | priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id; |
| 605 | kthread_init_worker(&priv->event_thread[i].worker); |
| 606 | priv->event_thread[i].dev = ddev; |
| 607 | priv->event_thread[i].thread = |
| 608 | kthread_run(kthread_worker_fn, |
| 609 | &priv->event_thread[i].worker, |
| 610 | "crtc_event:%d", priv->event_thread[i].crtc_id); |
Dhaval Patel | 824bbc2 | 2017-06-29 12:26:03 -0700 | [diff] [blame] | 611 | /** |
| 612 | * event thread should also run at same priority as disp_thread |
| 613 | * because it is handling frame_done events. A lower priority |
| 614 | * event thread and higher priority disp_thread can causes |
| 615 | * frame_pending counters beyond 2. This can lead to commit |
| 616 | * failure at crtc commit level. |
| 617 | */ |
| 618 | ret = sched_setscheduler(priv->event_thread[i].thread, |
| 619 | SCHED_FIFO, ¶m); |
| 620 | if (ret) |
| 621 | pr_warn("display event thread priority update failed: %d\n", |
| 622 | ret); |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 623 | |
| 624 | if (IS_ERR(priv->event_thread[i].thread)) { |
| 625 | dev_err(dev, "failed to create crtc_event kthread\n"); |
| 626 | priv->event_thread[i].thread = NULL; |
| 627 | } |
| 628 | |
| 629 | if ((!priv->disp_thread[i].thread) || |
| 630 | !priv->event_thread[i].thread) { |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 631 | /* clean up previously created threads if any */ |
Veera Sundaram Sankaran | 10ea2bd | 2017-06-14 14:10:57 -0700 | [diff] [blame] | 632 | for ( ; i >= 0; i--) { |
| 633 | if (priv->disp_thread[i].thread) { |
| 634 | kthread_stop( |
| 635 | priv->disp_thread[i].thread); |
| 636 | priv->disp_thread[i].thread = NULL; |
| 637 | } |
| 638 | |
| 639 | if (priv->event_thread[i].thread) { |
| 640 | kthread_stop( |
| 641 | priv->event_thread[i].thread); |
| 642 | priv->event_thread[i].thread = NULL; |
| 643 | } |
Sandeep Panda | f48c46a | 2016-10-24 09:48:50 +0530 | [diff] [blame] | 644 | } |
| 645 | goto fail; |
| 646 | } |
| 647 | } |
| 648 | |
Raviteja Tamatam | 1345f2e | 2018-02-08 16:15:51 +0530 | [diff] [blame] | 649 | /** |
| 650 | * Since pp interrupt is heavy weight, try to queue the work |
| 651 | * into a dedicated worker thread, so that they dont interrupt |
| 652 | * other important events. |
| 653 | */ |
| 654 | kthread_init_worker(&priv->pp_event_worker); |
| 655 | priv->pp_event_thread = kthread_run(kthread_worker_fn, |
| 656 | &priv->pp_event_worker, "pp_event"); |
| 657 | |
| 658 | ret = sched_setscheduler(priv->pp_event_thread, |
| 659 | SCHED_FIFO, ¶m); |
| 660 | if (ret) |
| 661 | pr_warn("pp_event thread priority update failed: %d\n", |
| 662 | ret); |
| 663 | |
| 664 | if (IS_ERR(priv->pp_event_thread)) { |
| 665 | dev_err(dev, "failed to create pp_event kthread\n"); |
| 666 | priv->pp_event_thread = NULL; |
| 667 | goto fail; |
| 668 | } |
| 669 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 670 | ret = drm_vblank_init(ddev, priv->num_crtcs); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 671 | if (ret < 0) { |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 672 | dev_err(dev, "failed to initialize vblank\n"); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 673 | goto fail; |
| 674 | } |
| 675 | |
Archit Taneja | a2b3a55 | 2016-05-18 15:06:03 +0530 | [diff] [blame] | 676 | if (kms) { |
| 677 | pm_runtime_get_sync(dev); |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 678 | ret = drm_irq_install(ddev, platform_get_irq(pdev, 0)); |
Archit Taneja | a2b3a55 | 2016-05-18 15:06:03 +0530 | [diff] [blame] | 679 | pm_runtime_put_sync(dev); |
| 680 | if (ret < 0) { |
| 681 | dev_err(dev, "failed to install IRQ handler\n"); |
| 682 | goto fail; |
| 683 | } |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 684 | } |
| 685 | |
Lloyd Atkinson | ab3dd30 | 2017-02-13 10:44:55 -0800 | [diff] [blame] | 686 | ret = drm_dev_register(ddev, 0); |
| 687 | if (ret) |
| 688 | goto fail; |
| 689 | priv->registered = true; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 690 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 691 | drm_mode_config_reset(ddev); |
| 692 | |
Chandan Uddaraju | c5c9201 | 2017-10-30 13:05:28 -0700 | [diff] [blame] | 693 | if (kms && kms->funcs && kms->funcs->cont_splash_config) { |
| 694 | ret = kms->funcs->cont_splash_config(kms); |
| 695 | if (ret) { |
| 696 | dev_err(dev, "kms cont_splash config failed.\n"); |
| 697 | goto fail; |
| 698 | } |
| 699 | } |
| 700 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 701 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
| 702 | if (fbdev) |
| 703 | priv->fbdev = msm_fbdev_init(ddev); |
| 704 | #endif |
| 705 | |
| 706 | ret = msm_debugfs_late_init(ddev); |
| 707 | if (ret) |
| 708 | goto fail; |
| 709 | |
Dhaval Patel | 6c66662 | 2017-03-21 23:02:59 -0700 | [diff] [blame] | 710 | priv->debug_root = debugfs_create_dir("debug", |
| 711 | ddev->primary->debugfs_root); |
| 712 | if (IS_ERR_OR_NULL(priv->debug_root)) { |
| 713 | pr_err("debugfs_root create_dir fail, error %ld\n", |
| 714 | PTR_ERR(priv->debug_root)); |
| 715 | priv->debug_root = NULL; |
| 716 | goto fail; |
| 717 | } |
| 718 | |
| 719 | ret = sde_dbg_debugfs_register(priv->debug_root); |
Lloyd Atkinson | b020e0f | 2017-03-14 08:05:18 -0700 | [diff] [blame] | 720 | if (ret) { |
| 721 | dev_err(dev, "failed to reg sde dbg debugfs: %d\n", ret); |
| 722 | goto fail; |
| 723 | } |
| 724 | |
Alan Kwong | 5a3ac75 | 2016-10-16 01:02:35 -0400 | [diff] [blame] | 725 | /* perform subdriver post initialization */ |
| 726 | if (kms && kms->funcs && kms->funcs->postinit) { |
| 727 | ret = kms->funcs->postinit(kms); |
| 728 | if (ret) { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 729 | pr_err("kms post init failed: %d\n", ret); |
Alan Kwong | 5a3ac75 | 2016-10-16 01:02:35 -0400 | [diff] [blame] | 730 | goto fail; |
| 731 | } |
| 732 | } |
| 733 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 734 | drm_kms_helper_poll_init(ddev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 735 | |
| 736 | return 0; |
| 737 | |
| 738 | fail: |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 739 | msm_drm_uninit(dev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 740 | return ret; |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 741 | bind_fail: |
Dhaval Patel | a243084 | 2017-06-15 14:32:36 -0700 | [diff] [blame] | 742 | sde_dbg_destroy(); |
| 743 | dbg_init_fail: |
Dhaval Patel | 5398f60 | 2017-03-25 18:25:18 -0700 | [diff] [blame] | 744 | sde_power_client_destroy(&priv->phandle, priv->pclient); |
| 745 | power_client_fail: |
| 746 | sde_power_resource_deinit(pdev, &priv->phandle); |
| 747 | power_init_fail: |
| 748 | msm_mdss_destroy(ddev); |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 749 | mdss_init_fail: |
| 750 | kfree(priv); |
| 751 | priv_alloc_fail: |
| 752 | drm_dev_unref(ddev); |
| 753 | return ret; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 754 | } |
| 755 | |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 756 | /* |
| 757 | * DRM operations: |
| 758 | */ |
| 759 | |
Stephane Viau | 32f13f6 | 2015-04-29 15:57:29 -0400 | [diff] [blame] | 760 | #ifdef CONFIG_QCOM_KGSL |
| 761 | static void load_gpu(struct drm_device *dev) |
| 762 | { |
| 763 | } |
| 764 | #else |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 765 | static void load_gpu(struct drm_device *dev) |
| 766 | { |
Rob Clark | a1ad352 | 2014-07-11 11:59:22 -0400 | [diff] [blame] | 767 | static DEFINE_MUTEX(init_lock); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 768 | struct msm_drm_private *priv = dev->dev_private; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 769 | |
Rob Clark | a1ad352 | 2014-07-11 11:59:22 -0400 | [diff] [blame] | 770 | mutex_lock(&init_lock); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 771 | |
Rob Clark | e2550b7 | 2014-09-05 13:30:27 -0400 | [diff] [blame] | 772 | if (!priv->gpu) |
| 773 | priv->gpu = adreno_load_gpu(dev); |
Rob Clark | a1ad352 | 2014-07-11 11:59:22 -0400 | [diff] [blame] | 774 | |
Rob Clark | a1ad352 | 2014-07-11 11:59:22 -0400 | [diff] [blame] | 775 | mutex_unlock(&init_lock); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 776 | } |
Stephane Viau | 32f13f6 | 2015-04-29 15:57:29 -0400 | [diff] [blame] | 777 | #endif |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 778 | |
| 779 | static int msm_open(struct drm_device *dev, struct drm_file *file) |
| 780 | { |
| 781 | struct msm_file_private *ctx; |
| 782 | |
| 783 | /* For now, load gpu on open.. to avoid the requirement of having |
| 784 | * firmware in the initrd. |
| 785 | */ |
| 786 | load_gpu(dev); |
| 787 | |
| 788 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); |
| 789 | if (!ctx) |
| 790 | return -ENOMEM; |
| 791 | |
| 792 | file->driver_priv = ctx; |
| 793 | |
Clarence Ip | 0e19a5d | 2016-08-10 16:36:50 -0400 | [diff] [blame] | 794 | if (dev && dev->dev_private) { |
| 795 | struct msm_drm_private *priv = dev->dev_private; |
| 796 | struct msm_kms *kms; |
| 797 | |
| 798 | kms = priv->kms; |
| 799 | if (kms && kms->funcs && kms->funcs->postopen) |
| 800 | kms->funcs->postopen(kms, file); |
| 801 | } |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 802 | return 0; |
| 803 | } |
| 804 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 805 | static void msm_preclose(struct drm_device *dev, struct drm_file *file) |
| 806 | { |
| 807 | struct msm_drm_private *priv = dev->dev_private; |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 808 | struct msm_kms *kms = priv->kms; |
| 809 | |
| 810 | if (kms && kms->funcs && kms->funcs->preclose) |
| 811 | kms->funcs->preclose(kms, file); |
| 812 | } |
| 813 | |
| 814 | static void msm_postclose(struct drm_device *dev, struct drm_file *file) |
| 815 | { |
| 816 | struct msm_drm_private *priv = dev->dev_private; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 817 | struct msm_file_private *ctx = file->driver_priv; |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 818 | struct msm_kms *kms = priv->kms; |
| 819 | |
| 820 | if (kms && kms->funcs && kms->funcs->postclose) |
| 821 | kms->funcs->postclose(kms, file); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 822 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 823 | mutex_lock(&dev->struct_mutex); |
| 824 | if (ctx == priv->lastctx) |
| 825 | priv->lastctx = NULL; |
| 826 | mutex_unlock(&dev->struct_mutex); |
| 827 | |
| 828 | kfree(ctx); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 829 | } |
| 830 | |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 831 | static int msm_disable_all_modes_commit( |
| 832 | struct drm_device *dev, |
| 833 | struct drm_atomic_state *state) |
| 834 | { |
| 835 | struct drm_plane *plane; |
| 836 | struct drm_crtc *crtc; |
| 837 | unsigned int plane_mask; |
| 838 | int ret; |
| 839 | |
| 840 | plane_mask = 0; |
| 841 | drm_for_each_plane(plane, dev) { |
| 842 | struct drm_plane_state *plane_state; |
| 843 | |
| 844 | plane_state = drm_atomic_get_plane_state(state, plane); |
| 845 | if (IS_ERR(plane_state)) { |
| 846 | ret = PTR_ERR(plane_state); |
| 847 | goto fail; |
| 848 | } |
| 849 | |
Alan Kwong | 76c9d18 | 2016-12-14 14:39:17 -0800 | [diff] [blame] | 850 | plane_state->rotation = 0; |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 851 | |
| 852 | plane->old_fb = plane->fb; |
| 853 | plane_mask |= 1 << drm_plane_index(plane); |
| 854 | |
| 855 | /* disable non-primary: */ |
| 856 | if (plane->type == DRM_PLANE_TYPE_PRIMARY) |
| 857 | continue; |
| 858 | |
| 859 | DRM_DEBUG("disabling plane %d\n", plane->base.id); |
| 860 | |
| 861 | ret = __drm_atomic_helper_disable_plane(plane, plane_state); |
| 862 | if (ret != 0) |
| 863 | DRM_ERROR("error %d disabling plane %d\n", ret, |
| 864 | plane->base.id); |
| 865 | } |
| 866 | |
| 867 | drm_for_each_crtc(crtc, dev) { |
| 868 | struct drm_mode_set mode_set; |
| 869 | |
| 870 | memset(&mode_set, 0, sizeof(struct drm_mode_set)); |
| 871 | mode_set.crtc = crtc; |
| 872 | |
| 873 | DRM_DEBUG("disabling crtc %d\n", crtc->base.id); |
| 874 | |
| 875 | ret = __drm_atomic_helper_set_config(&mode_set, state); |
| 876 | if (ret != 0) |
| 877 | DRM_ERROR("error %d disabling crtc %d\n", ret, |
| 878 | crtc->base.id); |
| 879 | } |
| 880 | |
| 881 | DRM_DEBUG("committing disables\n"); |
| 882 | ret = drm_atomic_commit(state); |
| 883 | |
| 884 | fail: |
| 885 | drm_atomic_clean_old_fb(dev, plane_mask, ret); |
| 886 | DRM_DEBUG("disables result %d\n", ret); |
| 887 | return ret; |
| 888 | } |
| 889 | |
| 890 | /** |
| 891 | * msm_clear_all_modes - disables all planes and crtcs via an atomic commit |
| 892 | * based on restore_fbdev_mode_atomic in drm_fb_helper.c |
| 893 | * @dev: device pointer |
| 894 | * @Return: 0 on success, otherwise -error |
| 895 | */ |
| 896 | static int msm_disable_all_modes(struct drm_device *dev) |
| 897 | { |
| 898 | struct drm_atomic_state *state; |
| 899 | int ret, i; |
| 900 | |
| 901 | state = drm_atomic_state_alloc(dev); |
| 902 | if (!state) |
| 903 | return -ENOMEM; |
| 904 | |
| 905 | state->acquire_ctx = dev->mode_config.acquire_ctx; |
| 906 | |
| 907 | for (i = 0; i < TEARDOWN_DEADLOCK_RETRY_MAX; i++) { |
| 908 | ret = msm_disable_all_modes_commit(dev, state); |
| 909 | if (ret != -EDEADLK) |
| 910 | break; |
| 911 | drm_atomic_state_clear(state); |
| 912 | drm_atomic_legacy_backoff(state); |
| 913 | } |
| 914 | |
| 915 | /* on successful atomic commit state ownership transfers to framework */ |
| 916 | if (ret != 0) |
| 917 | drm_atomic_state_free(state); |
| 918 | |
| 919 | return ret; |
| 920 | } |
| 921 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 922 | static void msm_lastclose(struct drm_device *dev) |
| 923 | { |
| 924 | struct msm_drm_private *priv = dev->dev_private; |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 925 | struct msm_kms *kms = priv->kms; |
Alan Kwong | 5a3ac75 | 2016-10-16 01:02:35 -0400 | [diff] [blame] | 926 | int i; |
| 927 | |
Kalyan Thota | 2f0444a | 2018-04-20 17:50:33 +0530 | [diff] [blame] | 928 | /* check for splash status before triggering cleanup |
| 929 | * if we end up here with splash status ON i.e before first |
| 930 | * commit then ignore the last close call |
| 931 | */ |
| 932 | if (kms && kms->funcs && kms->funcs->check_for_splash |
| 933 | && kms->funcs->check_for_splash(kms)) |
| 934 | return; |
| 935 | |
Alan Kwong | 5a3ac75 | 2016-10-16 01:02:35 -0400 | [diff] [blame] | 936 | /* |
| 937 | * clean up vblank disable immediately as this is the last close. |
| 938 | */ |
| 939 | for (i = 0; i < dev->num_crtcs; i++) { |
| 940 | struct drm_vblank_crtc *vblank = &dev->vblank[i]; |
| 941 | struct timer_list *disable_timer = &vblank->disable_timer; |
| 942 | |
| 943 | if (del_timer_sync(disable_timer)) |
| 944 | disable_timer->function(disable_timer->data); |
| 945 | } |
| 946 | |
| 947 | /* wait for pending vblank requests to be executed by worker thread */ |
| 948 | flush_workqueue(priv->wq); |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 949 | |
| 950 | if (priv->fbdev) { |
Rob Clark | 5ea1f75 | 2014-05-30 12:29:48 -0400 | [diff] [blame] | 951 | drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev); |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 952 | } else { |
| 953 | drm_modeset_lock_all(dev); |
| 954 | msm_disable_all_modes(dev); |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 955 | if (kms && kms->funcs && kms->funcs->lastclose) |
| 956 | kms->funcs->lastclose(kms); |
Lloyd Atkinson | e08229c | 2017-10-02 17:53:30 -0400 | [diff] [blame] | 957 | drm_modeset_unlock_all(dev); |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 958 | } |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 959 | } |
| 960 | |
Daniel Vetter | e9f0d76 | 2013-12-11 11:34:42 +0100 | [diff] [blame] | 961 | static irqreturn_t msm_irq(int irq, void *arg) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 962 | { |
| 963 | struct drm_device *dev = arg; |
| 964 | struct msm_drm_private *priv = dev->dev_private; |
| 965 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 966 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 967 | BUG_ON(!kms); |
| 968 | return kms->funcs->irq(kms); |
| 969 | } |
| 970 | |
| 971 | static void msm_irq_preinstall(struct drm_device *dev) |
| 972 | { |
| 973 | struct msm_drm_private *priv = dev->dev_private; |
| 974 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 975 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 976 | BUG_ON(!kms); |
| 977 | kms->funcs->irq_preinstall(kms); |
| 978 | } |
| 979 | |
| 980 | static int msm_irq_postinstall(struct drm_device *dev) |
| 981 | { |
| 982 | struct msm_drm_private *priv = dev->dev_private; |
| 983 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 984 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 985 | BUG_ON(!kms); |
| 986 | return kms->funcs->irq_postinstall(kms); |
| 987 | } |
| 988 | |
| 989 | static void msm_irq_uninstall(struct drm_device *dev) |
| 990 | { |
| 991 | struct msm_drm_private *priv = dev->dev_private; |
| 992 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 993 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 994 | BUG_ON(!kms); |
| 995 | kms->funcs->irq_uninstall(kms); |
| 996 | } |
| 997 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 998 | static int msm_enable_vblank(struct drm_device *dev, unsigned int pipe) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 999 | { |
| 1000 | struct msm_drm_private *priv = dev->dev_private; |
| 1001 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 1002 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1003 | if (!kms) |
| 1004 | return -ENXIO; |
Lakshmi Narayana Kalavala | 89b6cbe | 2018-05-11 11:28:12 -0700 | [diff] [blame] | 1005 | DBG("dev=%pK, crtc=%u", dev, pipe); |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 1006 | return vblank_ctrl_queue_work(priv, pipe, true); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1007 | } |
| 1008 | |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 1009 | static void msm_disable_vblank(struct drm_device *dev, unsigned int pipe) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1010 | { |
| 1011 | struct msm_drm_private *priv = dev->dev_private; |
| 1012 | struct msm_kms *kms = priv->kms; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 1013 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1014 | if (!kms) |
| 1015 | return; |
Lakshmi Narayana Kalavala | 89b6cbe | 2018-05-11 11:28:12 -0700 | [diff] [blame] | 1016 | DBG("dev=%pK, crtc=%u", dev, pipe); |
Thierry Reding | 88e7271 | 2015-09-24 18:35:31 +0200 | [diff] [blame] | 1017 | vblank_ctrl_queue_work(priv, pipe, false); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1018 | } |
| 1019 | |
| 1020 | /* |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1021 | * DRM ioctls: |
| 1022 | */ |
| 1023 | |
| 1024 | static int msm_ioctl_get_param(struct drm_device *dev, void *data, |
| 1025 | struct drm_file *file) |
| 1026 | { |
| 1027 | struct msm_drm_private *priv = dev->dev_private; |
| 1028 | struct drm_msm_param *args = data; |
| 1029 | struct msm_gpu *gpu; |
| 1030 | |
| 1031 | /* for now, we just have 3d pipe.. eventually this would need to |
| 1032 | * be more clever to dispatch to appropriate gpu module: |
| 1033 | */ |
| 1034 | if (args->pipe != MSM_PIPE_3D0) |
| 1035 | return -EINVAL; |
| 1036 | |
| 1037 | gpu = priv->gpu; |
| 1038 | |
| 1039 | if (!gpu) |
| 1040 | return -ENXIO; |
| 1041 | |
| 1042 | return gpu->funcs->get_param(gpu, args->param, &args->value); |
| 1043 | } |
| 1044 | |
| 1045 | static int msm_ioctl_gem_new(struct drm_device *dev, void *data, |
| 1046 | struct drm_file *file) |
| 1047 | { |
| 1048 | struct drm_msm_gem_new *args = data; |
Rob Clark | 93ddb0d | 2014-03-03 09:42:33 -0500 | [diff] [blame] | 1049 | |
| 1050 | if (args->flags & ~MSM_BO_FLAGS) { |
| 1051 | DRM_ERROR("invalid flags: %08x\n", args->flags); |
| 1052 | return -EINVAL; |
| 1053 | } |
| 1054 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1055 | return msm_gem_new_handle(dev, file, args->size, |
| 1056 | args->flags, &args->handle); |
| 1057 | } |
| 1058 | |
Rob Clark | 56c2da8 | 2015-05-11 11:50:03 -0400 | [diff] [blame] | 1059 | static inline ktime_t to_ktime(struct drm_msm_timespec timeout) |
| 1060 | { |
| 1061 | return ktime_set(timeout.tv_sec, timeout.tv_nsec); |
| 1062 | } |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1063 | |
| 1064 | static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data, |
| 1065 | struct drm_file *file) |
| 1066 | { |
| 1067 | struct drm_msm_gem_cpu_prep *args = data; |
| 1068 | struct drm_gem_object *obj; |
Rob Clark | 56c2da8 | 2015-05-11 11:50:03 -0400 | [diff] [blame] | 1069 | ktime_t timeout = to_ktime(args->timeout); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1070 | int ret; |
| 1071 | |
Rob Clark | 93ddb0d | 2014-03-03 09:42:33 -0500 | [diff] [blame] | 1072 | if (args->op & ~MSM_PREP_FLAGS) { |
| 1073 | DRM_ERROR("invalid op: %08x\n", args->op); |
| 1074 | return -EINVAL; |
| 1075 | } |
| 1076 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 1077 | obj = drm_gem_object_lookup(file, args->handle); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1078 | if (!obj) |
| 1079 | return -ENOENT; |
| 1080 | |
Rob Clark | 56c2da8 | 2015-05-11 11:50:03 -0400 | [diff] [blame] | 1081 | ret = msm_gem_cpu_prep(obj, args->op, &timeout); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1082 | |
| 1083 | drm_gem_object_unreference_unlocked(obj); |
| 1084 | |
| 1085 | return ret; |
| 1086 | } |
| 1087 | |
| 1088 | static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data, |
| 1089 | struct drm_file *file) |
| 1090 | { |
| 1091 | struct drm_msm_gem_cpu_fini *args = data; |
| 1092 | struct drm_gem_object *obj; |
| 1093 | int ret; |
| 1094 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 1095 | obj = drm_gem_object_lookup(file, args->handle); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1096 | if (!obj) |
| 1097 | return -ENOENT; |
| 1098 | |
| 1099 | ret = msm_gem_cpu_fini(obj); |
| 1100 | |
| 1101 | drm_gem_object_unreference_unlocked(obj); |
| 1102 | |
| 1103 | return ret; |
| 1104 | } |
| 1105 | |
| 1106 | static int msm_ioctl_gem_info(struct drm_device *dev, void *data, |
| 1107 | struct drm_file *file) |
| 1108 | { |
| 1109 | struct drm_msm_gem_info *args = data; |
| 1110 | struct drm_gem_object *obj; |
| 1111 | int ret = 0; |
| 1112 | |
| 1113 | if (args->pad) |
| 1114 | return -EINVAL; |
| 1115 | |
Chris Wilson | a8ad0bd | 2016-05-09 11:04:54 +0100 | [diff] [blame] | 1116 | obj = drm_gem_object_lookup(file, args->handle); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1117 | if (!obj) |
| 1118 | return -ENOENT; |
| 1119 | |
| 1120 | args->offset = msm_gem_mmap_offset(obj); |
| 1121 | |
| 1122 | drm_gem_object_unreference_unlocked(obj); |
| 1123 | |
| 1124 | return ret; |
| 1125 | } |
| 1126 | |
| 1127 | static int msm_ioctl_wait_fence(struct drm_device *dev, void *data, |
| 1128 | struct drm_file *file) |
| 1129 | { |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 1130 | struct msm_drm_private *priv = dev->dev_private; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1131 | struct drm_msm_wait_fence *args = data; |
Rob Clark | 56c2da8 | 2015-05-11 11:50:03 -0400 | [diff] [blame] | 1132 | ktime_t timeout = to_ktime(args->timeout); |
Rob Clark | 93ddb0d | 2014-03-03 09:42:33 -0500 | [diff] [blame] | 1133 | |
| 1134 | if (args->pad) { |
| 1135 | DRM_ERROR("invalid pad: %08x\n", args->pad); |
| 1136 | return -EINVAL; |
| 1137 | } |
| 1138 | |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 1139 | if (!priv->gpu) |
| 1140 | return 0; |
| 1141 | |
| 1142 | return msm_wait_fence(priv->gpu->fctx, args->fence, &timeout, true); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1143 | } |
| 1144 | |
Rob Clark | 4cd33c4 | 2016-05-17 15:44:49 -0400 | [diff] [blame] | 1145 | static int msm_ioctl_gem_madvise(struct drm_device *dev, void *data, |
| 1146 | struct drm_file *file) |
| 1147 | { |
| 1148 | struct drm_msm_gem_madvise *args = data; |
| 1149 | struct drm_gem_object *obj; |
| 1150 | int ret; |
| 1151 | |
| 1152 | switch (args->madv) { |
| 1153 | case MSM_MADV_DONTNEED: |
| 1154 | case MSM_MADV_WILLNEED: |
| 1155 | break; |
| 1156 | default: |
| 1157 | return -EINVAL; |
| 1158 | } |
| 1159 | |
| 1160 | ret = mutex_lock_interruptible(&dev->struct_mutex); |
| 1161 | if (ret) |
| 1162 | return ret; |
| 1163 | |
| 1164 | obj = drm_gem_object_lookup(file, args->handle); |
| 1165 | if (!obj) { |
| 1166 | ret = -ENOENT; |
| 1167 | goto unlock; |
| 1168 | } |
| 1169 | |
| 1170 | ret = msm_gem_madvise(obj, args->madv); |
| 1171 | if (ret >= 0) { |
| 1172 | args->retained = ret; |
| 1173 | ret = 0; |
| 1174 | } |
| 1175 | |
| 1176 | drm_gem_object_unreference(obj); |
| 1177 | |
| 1178 | unlock: |
| 1179 | mutex_unlock(&dev->struct_mutex); |
| 1180 | return ret; |
| 1181 | } |
| 1182 | |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1183 | static int msm_drm_object_supports_event(struct drm_device *dev, |
| 1184 | struct drm_msm_event_req *req) |
| 1185 | { |
| 1186 | int ret = -EINVAL; |
| 1187 | struct drm_mode_object *arg_obj; |
| 1188 | |
| 1189 | arg_obj = drm_mode_object_find(dev, req->object_id, req->object_type); |
| 1190 | if (!arg_obj) |
| 1191 | return -ENOENT; |
| 1192 | |
| 1193 | switch (arg_obj->type) { |
| 1194 | case DRM_MODE_OBJECT_CRTC: |
| 1195 | case DRM_MODE_OBJECT_CONNECTOR: |
| 1196 | ret = 0; |
| 1197 | break; |
| 1198 | default: |
| 1199 | ret = -EOPNOTSUPP; |
| 1200 | break; |
| 1201 | } |
| 1202 | |
Jayant Shekhar | b2a8713 | 2017-12-13 13:42:06 +0530 | [diff] [blame] | 1203 | drm_mode_object_unreference(arg_obj); |
| 1204 | |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1205 | return ret; |
| 1206 | } |
| 1207 | |
| 1208 | static int msm_register_event(struct drm_device *dev, |
| 1209 | struct drm_msm_event_req *req, struct drm_file *file, bool en) |
| 1210 | { |
| 1211 | int ret = -EINVAL; |
| 1212 | struct msm_drm_private *priv = dev->dev_private; |
| 1213 | struct msm_kms *kms = priv->kms; |
| 1214 | struct drm_mode_object *arg_obj; |
| 1215 | |
| 1216 | arg_obj = drm_mode_object_find(dev, req->object_id, req->object_type); |
| 1217 | if (!arg_obj) |
| 1218 | return -ENOENT; |
| 1219 | |
| 1220 | ret = kms->funcs->register_events(kms, arg_obj, req->event, en); |
Jayant Shekhar | b2a8713 | 2017-12-13 13:42:06 +0530 | [diff] [blame] | 1221 | |
| 1222 | drm_mode_object_unreference(arg_obj); |
| 1223 | |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1224 | return ret; |
| 1225 | } |
| 1226 | |
| 1227 | static int msm_event_client_count(struct drm_device *dev, |
| 1228 | struct drm_msm_event_req *req_event, bool locked) |
| 1229 | { |
| 1230 | struct msm_drm_private *priv = dev->dev_private; |
| 1231 | unsigned long flag = 0; |
| 1232 | struct msm_drm_event *node; |
| 1233 | int count = 0; |
| 1234 | |
| 1235 | if (!locked) |
| 1236 | spin_lock_irqsave(&dev->event_lock, flag); |
| 1237 | list_for_each_entry(node, &priv->client_event_list, base.link) { |
| 1238 | if (node->event.type == req_event->event && |
| 1239 | node->info.object_id == req_event->object_id) |
| 1240 | count++; |
| 1241 | } |
| 1242 | if (!locked) |
| 1243 | spin_unlock_irqrestore(&dev->event_lock, flag); |
| 1244 | |
| 1245 | return count; |
| 1246 | } |
| 1247 | |
| 1248 | static int msm_ioctl_register_event(struct drm_device *dev, void *data, |
| 1249 | struct drm_file *file) |
| 1250 | { |
| 1251 | struct msm_drm_private *priv = dev->dev_private; |
| 1252 | struct drm_msm_event_req *req_event = data; |
| 1253 | struct msm_drm_event *client, *node; |
| 1254 | unsigned long flag = 0; |
| 1255 | bool dup_request = false; |
| 1256 | int ret = 0, count = 0; |
| 1257 | |
| 1258 | ret = msm_drm_object_supports_event(dev, req_event); |
| 1259 | if (ret) { |
| 1260 | DRM_ERROR("unsupported event %x object %x object id %d\n", |
| 1261 | req_event->event, req_event->object_type, |
| 1262 | req_event->object_id); |
| 1263 | return ret; |
| 1264 | } |
| 1265 | |
| 1266 | spin_lock_irqsave(&dev->event_lock, flag); |
| 1267 | list_for_each_entry(node, &priv->client_event_list, base.link) { |
| 1268 | if (node->base.file_priv != file) |
| 1269 | continue; |
| 1270 | if (node->event.type == req_event->event && |
| 1271 | node->info.object_id == req_event->object_id) { |
| 1272 | DRM_DEBUG("duplicate request for event %x obj id %d\n", |
| 1273 | node->event.type, node->info.object_id); |
| 1274 | dup_request = true; |
| 1275 | break; |
| 1276 | } |
| 1277 | } |
| 1278 | spin_unlock_irqrestore(&dev->event_lock, flag); |
| 1279 | |
| 1280 | if (dup_request) |
| 1281 | return -EALREADY; |
| 1282 | |
| 1283 | client = kzalloc(sizeof(*client), GFP_KERNEL); |
| 1284 | if (!client) |
| 1285 | return -ENOMEM; |
| 1286 | |
| 1287 | client->base.file_priv = file; |
| 1288 | client->base.pid = current->pid; |
| 1289 | client->base.event = &client->event; |
| 1290 | client->event.type = req_event->event; |
| 1291 | memcpy(&client->info, req_event, sizeof(client->info)); |
| 1292 | |
| 1293 | /* Get the count of clients that have registered for event. |
| 1294 | * Event should be enabled for first client, for subsequent enable |
| 1295 | * calls add to client list and return. |
| 1296 | */ |
| 1297 | count = msm_event_client_count(dev, req_event, false); |
| 1298 | /* Add current client to list */ |
| 1299 | spin_lock_irqsave(&dev->event_lock, flag); |
| 1300 | list_add_tail(&client->base.link, &priv->client_event_list); |
| 1301 | spin_unlock_irqrestore(&dev->event_lock, flag); |
| 1302 | |
| 1303 | if (count) |
| 1304 | return 0; |
| 1305 | |
| 1306 | ret = msm_register_event(dev, req_event, file, true); |
| 1307 | if (ret) { |
| 1308 | DRM_ERROR("failed to enable event %x object %x object id %d\n", |
| 1309 | req_event->event, req_event->object_type, |
| 1310 | req_event->object_id); |
| 1311 | spin_lock_irqsave(&dev->event_lock, flag); |
| 1312 | list_del(&client->base.link); |
| 1313 | spin_unlock_irqrestore(&dev->event_lock, flag); |
| 1314 | kfree(client); |
| 1315 | } |
| 1316 | return ret; |
| 1317 | } |
| 1318 | |
| 1319 | static int msm_ioctl_deregister_event(struct drm_device *dev, void *data, |
| 1320 | struct drm_file *file) |
| 1321 | { |
| 1322 | struct msm_drm_private *priv = dev->dev_private; |
| 1323 | struct drm_msm_event_req *req_event = data; |
| 1324 | struct msm_drm_event *client = NULL, *node, *temp; |
| 1325 | unsigned long flag = 0; |
| 1326 | int count = 0; |
| 1327 | bool found = false; |
| 1328 | int ret = 0; |
| 1329 | |
| 1330 | ret = msm_drm_object_supports_event(dev, req_event); |
| 1331 | if (ret) { |
| 1332 | DRM_ERROR("unsupported event %x object %x object id %d\n", |
| 1333 | req_event->event, req_event->object_type, |
| 1334 | req_event->object_id); |
| 1335 | return ret; |
| 1336 | } |
| 1337 | |
| 1338 | spin_lock_irqsave(&dev->event_lock, flag); |
| 1339 | list_for_each_entry_safe(node, temp, &priv->client_event_list, |
| 1340 | base.link) { |
| 1341 | if (node->event.type == req_event->event && |
| 1342 | node->info.object_id == req_event->object_id && |
| 1343 | node->base.file_priv == file) { |
| 1344 | client = node; |
| 1345 | list_del(&client->base.link); |
| 1346 | found = true; |
| 1347 | kfree(client); |
| 1348 | break; |
| 1349 | } |
| 1350 | } |
| 1351 | spin_unlock_irqrestore(&dev->event_lock, flag); |
| 1352 | |
| 1353 | if (!found) |
| 1354 | return -ENOENT; |
| 1355 | |
| 1356 | count = msm_event_client_count(dev, req_event, false); |
| 1357 | if (!count) |
| 1358 | ret = msm_register_event(dev, req_event, file, false); |
| 1359 | |
| 1360 | return ret; |
| 1361 | } |
| 1362 | |
Benjamin Chan | 34a92c7 | 2017-06-28 11:01:18 -0400 | [diff] [blame] | 1363 | void msm_mode_object_event_notify(struct drm_mode_object *obj, |
Gopikrishnaiah Anandan | 84b4f67 | 2017-04-26 10:28:51 -0700 | [diff] [blame] | 1364 | struct drm_device *dev, struct drm_event *event, u8 *payload) |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1365 | { |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1366 | struct msm_drm_private *priv = NULL; |
| 1367 | unsigned long flags; |
| 1368 | struct msm_drm_event *notify, *node; |
| 1369 | int len = 0, ret; |
| 1370 | |
Gopikrishnaiah Anandan | 84b4f67 | 2017-04-26 10:28:51 -0700 | [diff] [blame] | 1371 | if (!obj || !event || !event->length || !payload) { |
| 1372 | DRM_ERROR("err param obj %pK event %pK len %d payload %pK\n", |
| 1373 | obj, event, ((event) ? (event->length) : -1), |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1374 | payload); |
| 1375 | return; |
| 1376 | } |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1377 | priv = (dev) ? dev->dev_private : NULL; |
| 1378 | if (!dev || !priv) { |
| 1379 | DRM_ERROR("invalid dev %pK priv %pK\n", dev, priv); |
| 1380 | return; |
| 1381 | } |
| 1382 | |
| 1383 | spin_lock_irqsave(&dev->event_lock, flags); |
| 1384 | list_for_each_entry(node, &priv->client_event_list, base.link) { |
| 1385 | if (node->event.type != event->type || |
Gopikrishnaiah Anandan | 84b4f67 | 2017-04-26 10:28:51 -0700 | [diff] [blame] | 1386 | obj->id != node->info.object_id) |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1387 | continue; |
Narendra Muppalla | 5b5282a | 2017-11-03 17:24:28 -0700 | [diff] [blame] | 1388 | len = event->length + sizeof(struct msm_drm_event); |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1389 | if (node->base.file_priv->event_space < len) { |
Xu Yang | 1b3a5d9 | 2017-09-13 11:37:54 +0800 | [diff] [blame] | 1390 | DRM_ERROR("Insufficient space %d for event %x len %d\n", |
| 1391 | node->base.file_priv->event_space, event->type, |
| 1392 | len); |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1393 | continue; |
| 1394 | } |
| 1395 | notify = kzalloc(len, GFP_ATOMIC); |
| 1396 | if (!notify) |
| 1397 | continue; |
| 1398 | notify->base.file_priv = node->base.file_priv; |
| 1399 | notify->base.event = ¬ify->event; |
| 1400 | notify->base.pid = node->base.pid; |
| 1401 | notify->event.type = node->event.type; |
Narendra Muppalla | 5b5282a | 2017-11-03 17:24:28 -0700 | [diff] [blame] | 1402 | notify->event.length = event->length + |
| 1403 | sizeof(struct drm_msm_event_resp); |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1404 | memcpy(¬ify->info, &node->info, sizeof(notify->info)); |
| 1405 | memcpy(notify->data, payload, event->length); |
| 1406 | ret = drm_event_reserve_init_locked(dev, node->base.file_priv, |
| 1407 | ¬ify->base, ¬ify->event); |
| 1408 | if (ret) { |
| 1409 | kfree(notify); |
| 1410 | continue; |
| 1411 | } |
| 1412 | drm_send_event_locked(dev, ¬ify->base); |
| 1413 | } |
| 1414 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 1415 | } |
| 1416 | |
| 1417 | static int msm_release(struct inode *inode, struct file *filp) |
| 1418 | { |
| 1419 | struct drm_file *file_priv = filp->private_data; |
| 1420 | struct drm_minor *minor = file_priv->minor; |
| 1421 | struct drm_device *dev = minor->dev; |
| 1422 | struct msm_drm_private *priv = dev->dev_private; |
Raviteja Tamatam | bc0239f | 2018-03-28 17:08:19 +0530 | [diff] [blame] | 1423 | struct msm_drm_event *node, *temp, *tmp_node; |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1424 | u32 count; |
| 1425 | unsigned long flags; |
Raviteja Tamatam | bc0239f | 2018-03-28 17:08:19 +0530 | [diff] [blame] | 1426 | LIST_HEAD(tmp_head); |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1427 | |
| 1428 | spin_lock_irqsave(&dev->event_lock, flags); |
| 1429 | list_for_each_entry_safe(node, temp, &priv->client_event_list, |
| 1430 | base.link) { |
| 1431 | if (node->base.file_priv != file_priv) |
| 1432 | continue; |
| 1433 | list_del(&node->base.link); |
Raviteja Tamatam | bc0239f | 2018-03-28 17:08:19 +0530 | [diff] [blame] | 1434 | list_add_tail(&node->base.link, &tmp_head); |
| 1435 | } |
| 1436 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 1437 | |
| 1438 | list_for_each_entry_safe(node, temp, &tmp_head, |
| 1439 | base.link) { |
| 1440 | list_del(&node->base.link); |
| 1441 | count = msm_event_client_count(dev, &node->info, false); |
| 1442 | |
| 1443 | list_for_each_entry(tmp_node, &tmp_head, base.link) { |
| 1444 | if (tmp_node->event.type == node->info.event && |
| 1445 | tmp_node->info.object_id == |
| 1446 | node->info.object_id) |
| 1447 | count++; |
| 1448 | } |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1449 | if (!count) |
| 1450 | msm_register_event(dev, &node->info, file_priv, false); |
| 1451 | kfree(node); |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1452 | } |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1453 | |
| 1454 | return drm_release(inode, filp); |
| 1455 | } |
| 1456 | |
Lloyd Atkinson | f76121a | 2017-01-30 17:30:55 -0500 | [diff] [blame] | 1457 | /** |
Lloyd Atkinson | f76121a | 2017-01-30 17:30:55 -0500 | [diff] [blame] | 1458 | * msm_ioctl_rmfb2 - remove an FB from the configuration |
| 1459 | * @dev: drm device for the ioctl |
| 1460 | * @data: data pointer for the ioctl |
| 1461 | * @file_priv: drm file for the ioctl call |
| 1462 | * |
| 1463 | * Remove the FB specified by the user. |
| 1464 | * |
| 1465 | * Called by the user via ioctl. |
| 1466 | * |
| 1467 | * Returns: |
| 1468 | * Zero on success, negative errno on failure. |
| 1469 | */ |
| 1470 | int msm_ioctl_rmfb2(struct drm_device *dev, void *data, |
| 1471 | struct drm_file *file_priv) |
| 1472 | { |
| 1473 | struct drm_framebuffer *fb = NULL; |
| 1474 | struct drm_framebuffer *fbl = NULL; |
| 1475 | uint32_t *id = data; |
| 1476 | int found = 0; |
| 1477 | |
| 1478 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) |
| 1479 | return -EINVAL; |
| 1480 | |
| 1481 | fb = drm_framebuffer_lookup(dev, *id); |
| 1482 | if (!fb) |
| 1483 | return -ENOENT; |
| 1484 | |
| 1485 | /* drop extra ref from traversing drm_framebuffer_lookup */ |
| 1486 | drm_framebuffer_unreference(fb); |
| 1487 | |
| 1488 | mutex_lock(&file_priv->fbs_lock); |
| 1489 | list_for_each_entry(fbl, &file_priv->fbs, filp_head) |
| 1490 | if (fb == fbl) |
| 1491 | found = 1; |
| 1492 | if (!found) { |
| 1493 | mutex_unlock(&file_priv->fbs_lock); |
| 1494 | return -ENOENT; |
| 1495 | } |
| 1496 | |
| 1497 | list_del_init(&fb->filp_head); |
| 1498 | mutex_unlock(&file_priv->fbs_lock); |
| 1499 | |
Dhaval Patel | 785f0d1 | 2018-01-04 13:18:55 -0800 | [diff] [blame] | 1500 | drm_framebuffer_unreference(fb); |
Lloyd Atkinson | f76121a | 2017-01-30 17:30:55 -0500 | [diff] [blame] | 1501 | |
| 1502 | return 0; |
| 1503 | } |
| 1504 | EXPORT_SYMBOL(msm_ioctl_rmfb2); |
| 1505 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1506 | static const struct drm_ioctl_desc msm_ioctls[] = { |
Daniel Vetter | f8c4714 | 2015-09-08 13:56:30 +0200 | [diff] [blame] | 1507 | DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1508 | DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1509 | DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1510 | DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1511 | DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1512 | DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_AUTH|DRM_RENDER_ALLOW), |
| 1513 | DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_AUTH|DRM_RENDER_ALLOW), |
Rob Clark | 4cd33c4 | 2016-05-17 15:44:49 -0400 | [diff] [blame] | 1514 | DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH|DRM_RENDER_ALLOW), |
Alan Kwong | bb27c09 | 2016-07-20 16:41:25 -0400 | [diff] [blame] | 1515 | DRM_IOCTL_DEF_DRV(SDE_WB_CONFIG, sde_wb_config, DRM_UNLOCKED|DRM_AUTH), |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1516 | DRM_IOCTL_DEF_DRV(MSM_REGISTER_EVENT, msm_ioctl_register_event, |
| 1517 | DRM_UNLOCKED|DRM_CONTROL_ALLOW), |
| 1518 | DRM_IOCTL_DEF_DRV(MSM_DEREGISTER_EVENT, msm_ioctl_deregister_event, |
| 1519 | DRM_UNLOCKED|DRM_CONTROL_ALLOW), |
Lloyd Atkinson | f76121a | 2017-01-30 17:30:55 -0500 | [diff] [blame] | 1520 | DRM_IOCTL_DEF_DRV(MSM_RMFB2, msm_ioctl_rmfb2, |
| 1521 | DRM_CONTROL_ALLOW|DRM_UNLOCKED), |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1522 | }; |
| 1523 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1524 | static const struct vm_operations_struct vm_ops = { |
| 1525 | .fault = msm_gem_fault, |
| 1526 | .open = drm_gem_vm_open, |
| 1527 | .close = drm_gem_vm_close, |
| 1528 | }; |
| 1529 | |
| 1530 | static const struct file_operations fops = { |
| 1531 | .owner = THIS_MODULE, |
| 1532 | .open = drm_open, |
Gopikrishnaiah Anandan | de2c81b | 2017-03-15 12:41:29 -0700 | [diff] [blame] | 1533 | .release = msm_release, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1534 | .unlocked_ioctl = drm_ioctl, |
| 1535 | #ifdef CONFIG_COMPAT |
| 1536 | .compat_ioctl = drm_compat_ioctl, |
| 1537 | #endif |
| 1538 | .poll = drm_poll, |
| 1539 | .read = drm_read, |
| 1540 | .llseek = no_llseek, |
| 1541 | .mmap = msm_gem_mmap, |
| 1542 | }; |
| 1543 | |
| 1544 | static struct drm_driver msm_driver = { |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 1545 | .driver_features = DRIVER_HAVE_IRQ | |
| 1546 | DRIVER_GEM | |
| 1547 | DRIVER_PRIME | |
Rob Clark | b4b15c8 | 2013-09-28 12:01:25 -0400 | [diff] [blame] | 1548 | DRIVER_RENDER | |
Rob Clark | a5436e1 | 2015-06-04 10:12:22 -0400 | [diff] [blame] | 1549 | DRIVER_ATOMIC | |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 1550 | DRIVER_MODESET, |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1551 | .open = msm_open, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1552 | .preclose = msm_preclose, |
Lloyd Atkinson | 5217336c | 2016-09-15 18:21:18 -0400 | [diff] [blame] | 1553 | .postclose = msm_postclose, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1554 | .lastclose = msm_lastclose, |
| 1555 | .irq_handler = msm_irq, |
| 1556 | .irq_preinstall = msm_irq_preinstall, |
| 1557 | .irq_postinstall = msm_irq_postinstall, |
| 1558 | .irq_uninstall = msm_irq_uninstall, |
Ville Syrjälä | b44f840 | 2015-09-30 16:46:48 +0300 | [diff] [blame] | 1559 | .get_vblank_counter = drm_vblank_no_hw_counter, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1560 | .enable_vblank = msm_enable_vblank, |
| 1561 | .disable_vblank = msm_disable_vblank, |
| 1562 | .gem_free_object = msm_gem_free_object, |
| 1563 | .gem_vm_ops = &vm_ops, |
| 1564 | .dumb_create = msm_gem_dumb_create, |
| 1565 | .dumb_map_offset = msm_gem_dumb_map_offset, |
Rob Clark | 30600a909 | 2013-09-28 10:13:04 -0400 | [diff] [blame] | 1566 | .dumb_destroy = drm_gem_dumb_destroy, |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 1567 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
| 1568 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, |
| 1569 | .gem_prime_export = drm_gem_prime_export, |
| 1570 | .gem_prime_import = drm_gem_prime_import, |
Eric Anholt | b3a42bb | 2017-04-12 12:11:58 -0700 | [diff] [blame] | 1571 | .gem_prime_res_obj = msm_gem_prime_res_obj, |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 1572 | .gem_prime_pin = msm_gem_prime_pin, |
| 1573 | .gem_prime_unpin = msm_gem_prime_unpin, |
| 1574 | .gem_prime_get_sg_table = msm_gem_prime_get_sg_table, |
| 1575 | .gem_prime_import_sg_table = msm_gem_prime_import_sg_table, |
| 1576 | .gem_prime_vmap = msm_gem_prime_vmap, |
| 1577 | .gem_prime_vunmap = msm_gem_prime_vunmap, |
Daniel Thompson | 77a147e | 2014-11-12 11:38:14 +0000 | [diff] [blame] | 1578 | .gem_prime_mmap = msm_gem_prime_mmap, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1579 | #ifdef CONFIG_DEBUG_FS |
| 1580 | .debugfs_init = msm_debugfs_init, |
| 1581 | .debugfs_cleanup = msm_debugfs_cleanup, |
| 1582 | #endif |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1583 | .ioctls = msm_ioctls, |
Jordan Crouse | 1023e9b | 2017-03-07 11:14:04 -0700 | [diff] [blame] | 1584 | .num_ioctls = ARRAY_SIZE(msm_ioctls), |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1585 | .fops = &fops, |
Stephane Viau | aa6ed8b | 2016-07-19 12:59:42 -0400 | [diff] [blame] | 1586 | .name = "msm_drm", |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1587 | .desc = "MSM Snapdragon DRM", |
| 1588 | .date = "20130625", |
Rob Clark | a8d854c | 2016-06-01 14:02:02 -0400 | [diff] [blame] | 1589 | .major = MSM_VERSION_MAJOR, |
| 1590 | .minor = MSM_VERSION_MINOR, |
| 1591 | .patchlevel = MSM_VERSION_PATCHLEVEL, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1592 | }; |
| 1593 | |
| 1594 | #ifdef CONFIG_PM_SLEEP |
| 1595 | static int msm_pm_suspend(struct device *dev) |
| 1596 | { |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1597 | struct drm_device *ddev; |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1598 | struct msm_drm_private *priv; |
Clarence Ip | d86f6e4 | 2017-08-08 18:31:00 -0400 | [diff] [blame] | 1599 | struct msm_kms *kms; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1600 | |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1601 | if (!dev) |
| 1602 | return -EINVAL; |
| 1603 | |
| 1604 | ddev = dev_get_drvdata(dev); |
| 1605 | if (!ddev || !ddev->dev_private) |
| 1606 | return -EINVAL; |
| 1607 | |
| 1608 | priv = ddev->dev_private; |
Clarence Ip | d86f6e4 | 2017-08-08 18:31:00 -0400 | [diff] [blame] | 1609 | kms = priv->kms; |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1610 | |
Clarence Ip | d86f6e4 | 2017-08-08 18:31:00 -0400 | [diff] [blame] | 1611 | if (kms && kms->funcs && kms->funcs->pm_suspend) |
| 1612 | return kms->funcs->pm_suspend(dev); |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1613 | |
| 1614 | /* disable hot-plug polling */ |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1615 | drm_kms_helper_poll_disable(ddev); |
| 1616 | |
| 1617 | return 0; |
| 1618 | } |
| 1619 | |
| 1620 | static int msm_pm_resume(struct device *dev) |
| 1621 | { |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1622 | struct drm_device *ddev; |
| 1623 | struct msm_drm_private *priv; |
Clarence Ip | d86f6e4 | 2017-08-08 18:31:00 -0400 | [diff] [blame] | 1624 | struct msm_kms *kms; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1625 | |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1626 | if (!dev) |
| 1627 | return -EINVAL; |
| 1628 | |
| 1629 | ddev = dev_get_drvdata(dev); |
| 1630 | if (!ddev || !ddev->dev_private) |
| 1631 | return -EINVAL; |
| 1632 | |
| 1633 | priv = ddev->dev_private; |
Clarence Ip | d86f6e4 | 2017-08-08 18:31:00 -0400 | [diff] [blame] | 1634 | kms = priv->kms; |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1635 | |
Clarence Ip | d86f6e4 | 2017-08-08 18:31:00 -0400 | [diff] [blame] | 1636 | if (kms && kms->funcs && kms->funcs->pm_resume) |
| 1637 | return kms->funcs->pm_resume(dev); |
Clarence Ip | e5f1f4c | 2016-11-19 18:02:23 -0500 | [diff] [blame] | 1638 | |
| 1639 | /* enable hot-plug polling */ |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1640 | drm_kms_helper_poll_enable(ddev); |
| 1641 | |
| 1642 | return 0; |
| 1643 | } |
| 1644 | #endif |
| 1645 | |
| 1646 | static const struct dev_pm_ops msm_pm_ops = { |
| 1647 | SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume) |
| 1648 | }; |
| 1649 | |
| 1650 | /* |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 1651 | * Componentized driver support: |
| 1652 | */ |
| 1653 | |
Archit Taneja | e9fbdaf | 2015-11-18 12:15:14 +0530 | [diff] [blame] | 1654 | /* |
| 1655 | * NOTE: duplication of the same code as exynos or imx (or probably any other). |
| 1656 | * so probably some room for some helpers |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 1657 | */ |
| 1658 | static int compare_of(struct device *dev, void *data) |
| 1659 | { |
| 1660 | return dev->of_node == data; |
| 1661 | } |
Rob Clark | 41e6977 | 2013-12-15 16:23:05 -0500 | [diff] [blame] | 1662 | |
Archit Taneja | 812070e | 2016-05-19 10:38:39 +0530 | [diff] [blame] | 1663 | /* |
| 1664 | * Identify what components need to be added by parsing what remote-endpoints |
| 1665 | * our MDP output ports are connected to. In the case of LVDS on MDP4, there |
| 1666 | * is no external component that we need to add since LVDS is within MDP4 |
| 1667 | * itself. |
| 1668 | */ |
| 1669 | static int add_components_mdp(struct device *mdp_dev, |
| 1670 | struct component_match **matchptr) |
| 1671 | { |
| 1672 | struct device_node *np = mdp_dev->of_node; |
| 1673 | struct device_node *ep_node; |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1674 | struct device *master_dev; |
| 1675 | |
| 1676 | /* |
| 1677 | * on MDP4 based platforms, the MDP platform device is the component |
| 1678 | * master that adds other display interface components to itself. |
| 1679 | * |
| 1680 | * on MDP5 based platforms, the MDSS platform device is the component |
| 1681 | * master that adds MDP5 and other display interface components to |
| 1682 | * itself. |
| 1683 | */ |
| 1684 | if (of_device_is_compatible(np, "qcom,mdp4")) |
| 1685 | master_dev = mdp_dev; |
| 1686 | else |
| 1687 | master_dev = mdp_dev->parent; |
Archit Taneja | 812070e | 2016-05-19 10:38:39 +0530 | [diff] [blame] | 1688 | |
| 1689 | for_each_endpoint_of_node(np, ep_node) { |
| 1690 | struct device_node *intf; |
| 1691 | struct of_endpoint ep; |
| 1692 | int ret; |
| 1693 | |
| 1694 | ret = of_graph_parse_endpoint(ep_node, &ep); |
| 1695 | if (ret) { |
| 1696 | dev_err(mdp_dev, "unable to parse port endpoint\n"); |
| 1697 | of_node_put(ep_node); |
| 1698 | return ret; |
| 1699 | } |
| 1700 | |
| 1701 | /* |
| 1702 | * The LCDC/LVDS port on MDP4 is a speacial case where the |
| 1703 | * remote-endpoint isn't a component that we need to add |
| 1704 | */ |
| 1705 | if (of_device_is_compatible(np, "qcom,mdp4") && |
| 1706 | ep.port == 0) { |
| 1707 | of_node_put(ep_node); |
| 1708 | continue; |
| 1709 | } |
| 1710 | |
| 1711 | /* |
| 1712 | * It's okay if some of the ports don't have a remote endpoint |
| 1713 | * specified. It just means that the port isn't connected to |
| 1714 | * any external interface. |
| 1715 | */ |
| 1716 | intf = of_graph_get_remote_port_parent(ep_node); |
| 1717 | if (!intf) { |
| 1718 | of_node_put(ep_node); |
| 1719 | continue; |
| 1720 | } |
| 1721 | |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1722 | component_match_add(master_dev, matchptr, compare_of, intf); |
Archit Taneja | 812070e | 2016-05-19 10:38:39 +0530 | [diff] [blame] | 1723 | |
| 1724 | of_node_put(intf); |
| 1725 | of_node_put(ep_node); |
| 1726 | } |
| 1727 | |
| 1728 | return 0; |
| 1729 | } |
| 1730 | |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1731 | static int compare_name_mdp(struct device *dev, void *data) |
| 1732 | { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1733 | return (strnstr(dev_name(dev), "mdp", strlen("mdp")) != NULL); |
| 1734 | } |
| 1735 | |
| 1736 | static int add_display_components(struct device *dev, |
| 1737 | struct component_match **matchptr) |
| 1738 | { |
| 1739 | struct device *mdp_dev = NULL; |
Shashank Babu Chinta Venkata | ded9c56 | 2017-03-15 14:43:46 -0700 | [diff] [blame] | 1740 | struct device_node *node; |
| 1741 | const char *name; |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1742 | int ret; |
| 1743 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1744 | if (of_device_is_compatible(dev->of_node, "qcom,sde-kms")) { |
| 1745 | struct device_node *np = dev->of_node; |
| 1746 | unsigned int i; |
| 1747 | |
Chandan Uddaraju | c5c9201 | 2017-10-30 13:05:28 -0700 | [diff] [blame] | 1748 | for (i = 0; ; i++) { |
| 1749 | node = of_parse_phandle(np, "connectors", i); |
| 1750 | if (!node) |
| 1751 | break; |
| 1752 | |
| 1753 | component_match_add(dev, matchptr, compare_of, node); |
| 1754 | } |
| 1755 | |
Shashank Babu Chinta Venkata | ded9c56 | 2017-03-15 14:43:46 -0700 | [diff] [blame] | 1756 | for (i = 0; i < MAX_DSI_ACTIVE_DISPLAY; i++) { |
| 1757 | node = dsi_display_get_boot_display(i); |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1758 | |
Shashank Babu Chinta Venkata | ded9c56 | 2017-03-15 14:43:46 -0700 | [diff] [blame] | 1759 | if (node != NULL) { |
| 1760 | name = of_get_property(node, "label", NULL); |
| 1761 | component_match_add(dev, matchptr, compare_of, |
| 1762 | node); |
| 1763 | pr_debug("Added component = %s\n", name); |
| 1764 | } |
| 1765 | } |
| 1766 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1767 | return 0; |
| 1768 | } |
| 1769 | |
| 1770 | /* |
| 1771 | * MDP5 based devices don't have a flat hierarchy. There is a top level |
| 1772 | * parent: MDSS, and children: MDP5, DSI, HDMI, eDP etc. Populate the |
| 1773 | * children devices, find the MDP5 node, and then add the interfaces |
| 1774 | * to our components list. |
| 1775 | */ |
| 1776 | if (of_device_is_compatible(dev->of_node, "qcom,mdss")) { |
| 1777 | ret = of_platform_populate(dev->of_node, NULL, NULL, dev); |
| 1778 | if (ret) { |
| 1779 | dev_err(dev, "failed to populate children devices\n"); |
| 1780 | return ret; |
| 1781 | } |
| 1782 | |
| 1783 | mdp_dev = device_find_child(dev, NULL, compare_name_mdp); |
| 1784 | if (!mdp_dev) { |
| 1785 | dev_err(dev, "failed to find MDSS MDP node\n"); |
| 1786 | of_platform_depopulate(dev); |
| 1787 | return -ENODEV; |
| 1788 | } |
| 1789 | |
| 1790 | put_device(mdp_dev); |
| 1791 | |
| 1792 | /* add the MDP component itself */ |
| 1793 | component_match_add(dev, matchptr, compare_of, |
| 1794 | mdp_dev->of_node); |
| 1795 | } else { |
| 1796 | /* MDP4 */ |
| 1797 | mdp_dev = dev; |
| 1798 | } |
| 1799 | |
| 1800 | ret = add_components_mdp(mdp_dev, matchptr); |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1801 | if (ret) |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1802 | of_platform_depopulate(dev); |
Archit Taneja | 54011e2 | 2016-06-06 13:45:34 +0530 | [diff] [blame] | 1803 | |
| 1804 | return ret; |
Archit Taneja | 7d526fc | 2016-05-19 10:33:57 +0530 | [diff] [blame] | 1805 | } |
| 1806 | |
Ray Zhang | 3436c0d | 2018-03-06 15:41:40 +0800 | [diff] [blame] | 1807 | static int add_bridge_components(struct device *dev, |
| 1808 | struct component_match **matchptr) |
| 1809 | { |
| 1810 | struct device_node *node; |
| 1811 | |
| 1812 | if (of_device_is_compatible(dev->of_node, "qcom,sde-kms")) { |
| 1813 | struct device_node *np = dev->of_node; |
| 1814 | unsigned int i; |
| 1815 | |
| 1816 | for (i = 0; ; i++) { |
| 1817 | node = of_parse_phandle(np, "bridges", i); |
| 1818 | if (!node) |
| 1819 | break; |
| 1820 | |
| 1821 | component_match_add(dev, matchptr, compare_of, node); |
| 1822 | } |
| 1823 | } |
| 1824 | |
| 1825 | return 0; |
| 1826 | } |
| 1827 | |
Jordan Crouse | d8e9652 | 2017-02-13 10:14:16 -0700 | [diff] [blame] | 1828 | struct msm_gem_address_space * |
| 1829 | msm_gem_smmu_address_space_get(struct drm_device *dev, |
| 1830 | unsigned int domain) |
| 1831 | { |
| 1832 | struct msm_drm_private *priv = NULL; |
| 1833 | struct msm_kms *kms; |
| 1834 | const struct msm_kms_funcs *funcs; |
| 1835 | |
| 1836 | if ((!dev) || (!dev->dev_private)) |
| 1837 | return NULL; |
| 1838 | |
| 1839 | priv = dev->dev_private; |
| 1840 | kms = priv->kms; |
| 1841 | if (!kms) |
| 1842 | return NULL; |
| 1843 | |
| 1844 | funcs = kms->funcs; |
| 1845 | |
| 1846 | if ((!funcs) || (!funcs->get_address_space)) |
| 1847 | return NULL; |
| 1848 | |
| 1849 | return funcs->get_address_space(priv->kms, domain); |
| 1850 | } |
| 1851 | |
Archit Taneja | dc3ea26 | 2016-05-19 13:33:52 +0530 | [diff] [blame] | 1852 | /* |
| 1853 | * We don't know what's the best binding to link the gpu with the drm device. |
| 1854 | * Fow now, we just hunt for all the possible gpus that we support, and add them |
| 1855 | * as components. |
| 1856 | */ |
| 1857 | static const struct of_device_id msm_gpu_match[] = { |
| 1858 | { .compatible = "qcom,adreno-3xx" }, |
| 1859 | { .compatible = "qcom,kgsl-3d0" }, |
| 1860 | { }, |
| 1861 | }; |
| 1862 | |
Dhaval Patel | 169bf3a | 2017-04-11 11:00:57 -0700 | [diff] [blame] | 1863 | #ifdef CONFIG_QCOM_KGSL |
| 1864 | static int add_gpu_components(struct device *dev, |
| 1865 | struct component_match **matchptr) |
| 1866 | { |
| 1867 | return 0; |
| 1868 | } |
| 1869 | #else |
Archit Taneja | 7d526fc | 2016-05-19 10:33:57 +0530 | [diff] [blame] | 1870 | static int add_gpu_components(struct device *dev, |
| 1871 | struct component_match **matchptr) |
| 1872 | { |
Archit Taneja | dc3ea26 | 2016-05-19 13:33:52 +0530 | [diff] [blame] | 1873 | struct device_node *np; |
| 1874 | |
| 1875 | np = of_find_matching_node(NULL, msm_gpu_match); |
| 1876 | if (!np) |
| 1877 | return 0; |
| 1878 | |
| 1879 | component_match_add(dev, matchptr, compare_of, np); |
| 1880 | |
| 1881 | of_node_put(np); |
| 1882 | |
| 1883 | return 0; |
Archit Taneja | 7d526fc | 2016-05-19 10:33:57 +0530 | [diff] [blame] | 1884 | } |
Dhaval Patel | 169bf3a | 2017-04-11 11:00:57 -0700 | [diff] [blame] | 1885 | #endif |
Archit Taneja | 7d526fc | 2016-05-19 10:33:57 +0530 | [diff] [blame] | 1886 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1887 | static int msm_drm_bind(struct device *dev) |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1888 | { |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 1889 | return msm_drm_init(dev, &msm_driver); |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1890 | } |
| 1891 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1892 | static void msm_drm_unbind(struct device *dev) |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1893 | { |
Archit Taneja | 2b66987 | 2016-05-02 11:05:54 +0530 | [diff] [blame] | 1894 | msm_drm_uninit(dev); |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1895 | } |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1896 | |
| 1897 | static const struct component_master_ops msm_drm_ops = { |
| 1898 | .bind = msm_drm_bind, |
| 1899 | .unbind = msm_drm_unbind, |
| 1900 | }; |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1901 | |
| 1902 | /* |
| 1903 | * Platform driver: |
| 1904 | */ |
| 1905 | |
| 1906 | static int msm_pdev_probe(struct platform_device *pdev) |
| 1907 | { |
Dhaval Patel | 3949f03 | 2016-06-20 16:24:33 -0700 | [diff] [blame] | 1908 | int ret; |
Russell King | 8444828 | 2014-04-19 11:20:42 +0100 | [diff] [blame] | 1909 | struct component_match *match = NULL; |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 1910 | |
Archit Taneja | 7d526fc | 2016-05-19 10:33:57 +0530 | [diff] [blame] | 1911 | ret = add_display_components(&pdev->dev, &match); |
| 1912 | if (ret) |
| 1913 | return ret; |
| 1914 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1915 | ret = add_gpu_components(&pdev->dev, &match); |
| 1916 | if (ret) |
| 1917 | return ret; |
Dhaval Patel | 3949f03 | 2016-06-20 16:24:33 -0700 | [diff] [blame] | 1918 | |
Ray Zhang | 3436c0d | 2018-03-06 15:41:40 +0800 | [diff] [blame] | 1919 | ret = add_bridge_components(&pdev->dev, &match); |
| 1920 | if (ret) |
| 1921 | return ret; |
| 1922 | |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1923 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); |
| 1924 | return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1925 | } |
| 1926 | |
| 1927 | static int msm_pdev_remove(struct platform_device *pdev) |
| 1928 | { |
Lloyd Atkinson | 6f74f40 | 2016-10-04 10:07:36 -0400 | [diff] [blame] | 1929 | component_master_del(&pdev->dev, &msm_drm_ops); |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1930 | of_platform_depopulate(&pdev->dev); |
| 1931 | |
| 1932 | msm_drm_unbind(&pdev->dev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1933 | return 0; |
| 1934 | } |
| 1935 | |
Dhaval Patel | badfefd | 2017-09-26 13:58:02 -0700 | [diff] [blame] | 1936 | static void msm_pdev_shutdown(struct platform_device *pdev) |
| 1937 | { |
| 1938 | struct drm_device *ddev = platform_get_drvdata(pdev); |
| 1939 | struct msm_drm_private *priv = NULL; |
| 1940 | |
| 1941 | if (!ddev) { |
| 1942 | DRM_ERROR("invalid drm device node\n"); |
| 1943 | return; |
| 1944 | } |
| 1945 | |
| 1946 | priv = ddev->dev_private; |
| 1947 | if (!priv) { |
| 1948 | DRM_ERROR("invalid msm drm private node\n"); |
| 1949 | return; |
| 1950 | } |
| 1951 | |
| 1952 | msm_lastclose(ddev); |
| 1953 | |
| 1954 | /* set this after lastclose to allow kickoff from lastclose */ |
| 1955 | priv->shutdown_in_progress = true; |
| 1956 | } |
| 1957 | |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 1958 | static const struct of_device_id dt_match[] = { |
Dhaval Patel | 5200c60 | 2017-01-17 15:53:37 -0800 | [diff] [blame] | 1959 | { .compatible = "qcom,mdp4", .data = (void *)4 }, /* MDP4 */ |
| 1960 | { .compatible = "qcom,mdss", .data = (void *)5 }, /* MDP5 MDSS */ |
| 1961 | { .compatible = "qcom,sde-kms", .data = (void *)3 }, /* sde */ |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 1962 | {} |
| 1963 | }; |
| 1964 | MODULE_DEVICE_TABLE(of, dt_match); |
| 1965 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1966 | static struct platform_driver msm_platform_driver = { |
| 1967 | .probe = msm_pdev_probe, |
| 1968 | .remove = msm_pdev_remove, |
Dhaval Patel | badfefd | 2017-09-26 13:58:02 -0700 | [diff] [blame] | 1969 | .shutdown = msm_pdev_shutdown, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1970 | .driver = { |
Stephane Viau | aa6ed8b | 2016-07-19 12:59:42 -0400 | [diff] [blame] | 1971 | .name = "msm_drm", |
Rob Clark | 06c0dd9 | 2013-11-30 17:51:47 -0500 | [diff] [blame] | 1972 | .of_match_table = dt_match, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1973 | .pm = &msm_pm_ops, |
Jayant Shekhar | 061c1c0 | 2018-06-20 19:30:09 +0530 | [diff] [blame] | 1974 | .suppress_bind_attrs = true, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1975 | }, |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1976 | }; |
| 1977 | |
Stephane Viau | 32f13f6 | 2015-04-29 15:57:29 -0400 | [diff] [blame] | 1978 | #ifdef CONFIG_QCOM_KGSL |
| 1979 | void __init adreno_register(void) |
| 1980 | { |
| 1981 | } |
| 1982 | |
| 1983 | void __exit adreno_unregister(void) |
| 1984 | { |
| 1985 | } |
| 1986 | #endif |
| 1987 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1988 | static int __init msm_drm_register(void) |
| 1989 | { |
| 1990 | DBG("init"); |
Abhijit Kulkarni | 1774dac | 2017-05-01 10:51:02 -0700 | [diff] [blame] | 1991 | msm_smmu_driver_init(); |
Hai Li | d5af49c | 2015-03-26 19:25:17 -0400 | [diff] [blame] | 1992 | msm_dsi_register(); |
Hai Li | 0045398 | 2014-12-12 14:41:17 -0500 | [diff] [blame] | 1993 | msm_edp_register(); |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 1994 | msm_hdmi_register(); |
Rob Clark | bfd28b1 | 2014-09-05 13:06:37 -0400 | [diff] [blame] | 1995 | adreno_register(); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1996 | return platform_driver_register(&msm_platform_driver); |
| 1997 | } |
| 1998 | |
| 1999 | static void __exit msm_drm_unregister(void) |
| 2000 | { |
| 2001 | DBG("fini"); |
| 2002 | platform_driver_unregister(&msm_platform_driver); |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 2003 | msm_hdmi_unregister(); |
Rob Clark | bfd28b1 | 2014-09-05 13:06:37 -0400 | [diff] [blame] | 2004 | adreno_unregister(); |
Hai Li | 0045398 | 2014-12-12 14:41:17 -0500 | [diff] [blame] | 2005 | msm_edp_unregister(); |
Hai Li | d5af49c | 2015-03-26 19:25:17 -0400 | [diff] [blame] | 2006 | msm_dsi_unregister(); |
Abhijit Kulkarni | 1774dac | 2017-05-01 10:51:02 -0700 | [diff] [blame] | 2007 | msm_smmu_driver_cleanup(); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 2008 | } |
| 2009 | |
| 2010 | module_init(msm_drm_register); |
| 2011 | module_exit(msm_drm_unregister); |
| 2012 | |
| 2013 | MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); |
| 2014 | MODULE_DESCRIPTION("MSM DRM Driver"); |
| 2015 | MODULE_LICENSE("GPL"); |