1. ff2bb89 clk: sunxi: Let divs clocks read the base factor clock name from devicetree by Jens Kuske · 8 years ago
  2. 5ed400d clk: sunxi: Add sun6i/8i display support by Jean-Francois Moine · 8 years ago
  3. d331328 clk: sunxi: Improve divs_clk error handling and reporting by Andre Przywara · 8 years ago
  4. b26803e clk: sunxi: improve divider_clk error handling and reporting by Andre Przywara · 8 years ago
  5. 72360b9 clk: sunxi: improve mux_clk error handling and reporting by Andre Przywara · 8 years ago
  6. b0b6413 clk: sunxi: Remove clk_register_clkdev calls by Maxime Ripard · 8 years ago
  7. 3a4d9af clk: sunxi: Remove old probe and protection code by Maxime Ripard · 8 years ago
  8. c087230 clk: sunxi: convert current clocks registration to CLK_OF_DECLARE by Maxime Ripard · 8 years ago
  9. 5b5226d clk: sunxi: Make clocks setup functions take const pointer by Maxime Ripard · 8 years ago
  10. 96f185a clk: sunxi: Make clocks setup functions return their clock by Maxime Ripard · 8 years ago
  11. d221b7a clk: sunxi: improve error reporting for the mux clock by Andre Przywara · 8 years ago
  12. a78bb35 clk: sunxi: rewrite sun6i-a31-ahb1-clk using factors clk with custom recalc by Chen-Yu Tsai · 8 years ago
  13. cfa63688 clk: sunxi: factors: Consolidate get_factors parameters into a struct by Chen-Yu Tsai · 8 years ago
  14. b3e919e clk: sunxi: factors: Make struct clk_factors_config table const by Chen-Yu Tsai · 8 years ago
  15. ab6e23a clk: sunxi: Add H3 clocks support by Jens Kuske · 9 years ago
  16. bef6229 ARM: sunxi: Add R8 support by Maxime Ripard · 9 years ago
  17. f36fc04 Merge tag 'clk-for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 9 years ago
  18. 1b14afa clk: sunxi: Convert to clk_hw based provider APIs by Stephen Boyd · 9 years ago
  19. 98d8a60 clk: Convert __clk_get_flags() to clk_hw_get_flags() by Stephen Boyd · 9 years ago
  20. 497295a clk: Replace __clk_get_num_parents with clk_hw_get_num_parents() by Stephen Boyd · 9 years ago
  21. ee38b26 clk: sunxi: Add a simple gates driver by Maxime Ripard · 9 years ago
  22. 9cfad9b Merge branch 'cleanup-clk-h-includes' into clk-next by Stephen Boyd · 9 years ago
  23. 8a53fb2 clk: sunxi: make use of of_clk_parent_fill helper function by Dinh Nguyen · 9 years ago
  24. 57d866e clk: fix some determine_rate implementations by Boris Brezillon · 9 years ago
  25. 0817b62 clk: change clk_ops' ->determine_rate() prototype by Boris Brezillon · 9 years ago
  26. 9dfefe8 clk: sunxi: Include clk.h and remove unused clkdev.h includes by Stephen Boyd · 9 years ago
  27. d024bae Merge tag 'sunxi-late-for-4.2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes by Kevin Hilman · 9 years ago
  28. 159870d ARM: sunxi: Add Machine support for A33 by Vishnu Patekar · 9 years ago
  29. 5ac382c clk: sunxi: Fix of_io_request_and_map error check by Maxime Ripard · 9 years ago
  30. f101796 clk: sunxi: Add pll6 / 4 clock output to sun4i-a10-pll6 by Chen-Yu Tsai · 9 years ago
  31. 934fe5f clk: sunxi: Make divs clocks specify which output is the base factor clock by Chen-Yu Tsai · 9 years ago
  32. b712a62 clk: sunxi: Register divs clocks before factor clocks by Chen-Yu Tsai · 9 years ago
  33. 946fd40 clk: sunxi: Add "cpu" to list of protected clocks for sun5i by Chen-Yu Tsai · 9 years ago
  34. 9f24309 clk: sunxi: Add muxable ahb factors clock for sun5i and sun7i by Chen-Yu Tsai · 9 years ago
  35. 6089ef1 clk: sunxi: Move USB clocks to separate file by Chen-Yu Tsai · 9 years ago
  36. 18a8d49 Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux by Linus Torvalds · 9 years ago
  37. 1c8e600 clk: Add rate constraints to clocks by Tomeu Vizoso · 9 years ago
  38. 76820fc sunxi: clk: Set sun6i-pll1 n_start = 1 by Hans de Goede · 9 years ago
  39. a7d1905 clk: sunxi: Remove custom phase function by Maxime Ripard · 10 years ago
  40. 3ec72fa clk: sunxi: Propagate rate changes to parent for mux clocks by Chen-Yu Tsai · 9 years ago
  41. b0f2faa ARM: sunxi: Add "allwinner,sun6i-a31s" to mach-sunxi by Hans de Goede · 10 years ago
  42. 7c74c22 clk: sunxi: Give sunxi_factors_register a registers parameter by Hans de Goede · 10 years ago
  43. 7954dfa clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider by Chen-Yu Tsai · 10 years ago
  44. 75bd2ec clk: sunxi: Remove ahb1_sdram from sun6i/sun8i protected clocks list by Chen-Yu Tsai · 10 years ago
  45. 95e94c1 clk: sunxi: Implement A31 PLL6 as a divs clock for 2x output by Chen-Yu Tsai · 10 years ago
  46. 13d52f6 clk: sunxi: Specify number of child clocks for divs clocks by Chen-Yu Tsai · 10 years ago
  47. eaa2e98 clk: sunxi: Removed unused/incorrect sun6i-a31-apb2-clk driver by Chen-Yu Tsai · 10 years ago
  48. 93746e7 clk: sunxi: unify APB1 clock by Emilio López · 10 years ago
  49. 0b0f080 clk: sunxi: Add support for bus clock gates on Allwinner A80 SoC by Chen-Yu Tsai · 10 years ago
  50. e94f8cb3 clk: sunxi: make factors clock mux mask configurable by Chen-Yu Tsai · 10 years ago
  51. eaa18f5 clk: sunxi: Move mbus to mod0 file by Maxime Ripard · 10 years ago
  52. 992a56e clk: sunxi: Move mod0 clock to a file of its own by Maxime Ripard · 10 years ago
  53. 03e29bb clk: sunxi: Introduce mbus compatible by Maxime Ripard · 10 years ago
  54. 601da9d clk: sunxi: factors: Invert the probing logic by Maxime Ripard · 10 years ago
  55. cfe4c93 clk: sunxi: add correct divider table for sun4i-apb0 clock by Chen-Yu Tsai · 10 years ago
  56. 89a9456 clk: sunxi: add __iomem markings to MMIO pointers by Emilio López · 10 years ago
  57. 515c1a4 clk: sunxi: Add A23 clocks support by Chen-Yu Tsai · 10 years ago
  58. ea5671b clk: sunxi: Add support for table-based divider clocks by Chen-Yu Tsai · 10 years ago
  59. 70eab19 clk: sunxi: move "ahb_sdram" to protected clock list by Chen-Yu Tsai · 10 years ago
  60. d14e470 clk: sunxi: register clock gates with clkdev by Chen-Yu Tsai · 10 years ago
  61. efb3184 clk: sun6i: Protect SDRAM gating bit by Maxime Ripard · 10 years ago
  62. 2df73f4 clk: sun6i: Protect CPU clock by Maxime Ripard · 10 years ago
  63. 134a669 clk: sunxi: Rework clock protection code by Maxime Ripard · 10 years ago
  64. 59cb10e clk: sunxi: Move the GMAC clock to a file of its own by Maxime Ripard · 10 years ago
  65. ff01df2 clk: sunxi: Move the 24M oscillator to a file of its own by Maxime Ripard · 10 years ago
  66. 2c6fba1 clk: sunxi: Remove calls to clk_put by Maxime Ripard · 10 years ago
  67. e0e7943 clk: sunxi: Implement A31 USB clock by Maxime Ripard · 10 years ago
  68. 1a5700b Merge tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/linux into next by Linus Torvalds · 10 years ago
  69. 8322192 clk: sunxi: fix function type for CLK_OF_DECLARE by Rob Herring · 10 years ago
  70. cb7d5f4 clk: sunxi: avoid double DT matching by Rob Herring · 10 years ago
  71. a97181a clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clk by Hans de Goede · 10 years ago
  72. 9571397 clk: sunxi: Implement MMC phase control by Emilio López · 10 years ago
  73. 9ce71ca clk: sunxi: fix thinko in comment by Emilio López · 10 years ago
  74. 2226013 clk: sunxi: fix some calculations by Emilio López · 10 years ago
  75. 5a8ddf2 clk: sunxi: fix A20 PLL4 calculation by Emilio López · 10 years ago
  76. fd1b22f clk: sunxi: Add new clock compatibles by Maxime Ripard · 10 years ago
  77. e4c6d6c clk: sunxi: Add Allwinner A20/A31 GMAC clock unit by Chen-Yu Tsai · 10 years ago
  78. 92ef67c clk: sunxi: Add support for PLL6 on the A31 by Maxime Ripard · 10 years ago
  79. 5abdbf2 clk: sunxi: Add USB clock register defintions by Roman Byshko · 10 years ago
  80. cfb0086 clk: sunxi: Add support for USB clock-register reset bits by Hans de Goede · 10 years ago
  81. 97e36b3 clk: sunxi: get divs parent clock name from parent factor clock by Chen-Yu Tsai · 10 years ago
  82. 667f542 clk: sunxi: add names for pll5, pll6 parent clocks to factors_data by Chen-Yu Tsai · 10 years ago
  83. f64111e clk: sunxi: add clock-output-names dt property support by Chen-Yu Tsai · 10 years ago
  84. d193368 clk: sunxi: fix overflow when setting up divided factors by Emilio López · 10 years ago
  85. 6f86341 clk: sunxi: Allwinner A20 output clock support by Chen-Yu Tsai · 11 years ago
  86. 76192dc clk: sunxi: support better factor DT nodes by Emilio López · 11 years ago
  87. 7551769 clk: sunxi: mod0 support by Emilio López · 11 years ago
  88. d584c13 clk: sunxi: add PLL5 and PLL6 support by Emilio López · 11 years ago
  89. 5f4e0be clk: sunxi: make factors_clk_setup return the clock it registers by Emilio López · 11 years ago
  90. d838ff3 clk: sunxi: add gating support to PLL1 by Emilio López · 11 years ago
  91. edaf3fb clk: sunxi: clean the magic number of mux parents by Emilio López · 11 years ago
  92. 40a5dcb clk: sunxi: register factors clocks behind composite by Emilio López · 11 years ago
  93. 1d9438f Merge tag 'sunxi-clk-for-3.13' of https://github.com/mripard/linux into clk-next-sunxi-rebase by Mike Turquette · 11 years ago
  94. e71c69f drivers: clk: sunxi: Fix memory leakage in clk-sunxi.c by Victor N. Ramos Mello · 11 years ago
  95. 8e6a4c4 clk: sunxi: protect core clocks from accidental shutdown by Emilio López · 11 years ago
  96. be08045 clk: sunxi: declare OF clock provider by Sebastian Hesselbarth · 11 years ago
  97. 52be7cc clk: sunxi: Fix incorrect placement of __initconst by Sachin Kamat · 11 years ago
  98. 1fb2e4a clk: sunxi: Add Allwinner A20 gates by Maxime Ripard · 11 years ago
  99. 6a721db clk: sunxi: Add A31 clocks support by Maxime Ripard · 11 years ago
  100. 70855bb clk: sunxi: Allow to specify the divider width from the dividers data by Maxime Ripard · 11 years ago