blob: cbec5f3019397a31aa787076ea3b72267cc64bbe [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
62#include "core.h"
63#include "reg.h"
64#include "port.h"
65#include "trap.h"
66#include "txheader.h"
67
68static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
69static const char mlxsw_sp_driver_version[] = "1.0";
70
71/* tx_hdr_version
72 * Tx header version.
73 * Must be set to 1.
74 */
75MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
76
77/* tx_hdr_ctl
78 * Packet control type.
79 * 0 - Ethernet control (e.g. EMADs, LACP)
80 * 1 - Ethernet data
81 */
82MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
83
84/* tx_hdr_proto
85 * Packet protocol type. Must be set to 1 (Ethernet).
86 */
87MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
88
89/* tx_hdr_rx_is_router
90 * Packet is sent from the router. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
93
94/* tx_hdr_fid_valid
95 * Indicates if the 'fid' field is valid and should be used for
96 * forwarding lookup. Valid for data packets only.
97 */
98MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
99
100/* tx_hdr_swid
101 * Switch partition ID. Must be set to 0.
102 */
103MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
104
105/* tx_hdr_control_tclass
106 * Indicates if the packet should use the control TClass and not one
107 * of the data TClasses.
108 */
109MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
110
111/* tx_hdr_etclass
112 * Egress TClass to be used on the egress device on the egress port.
113 */
114MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
115
116/* tx_hdr_port_mid
117 * Destination local port for unicast packets.
118 * Destination multicast ID for multicast packets.
119 *
120 * Control packets are directed to a specific egress port, while data
121 * packets are transmitted through the CPU port (0) into the switch partition,
122 * where forwarding rules are applied.
123 */
124MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
125
126/* tx_hdr_fid
127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
128 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
129 * Valid for data packets only.
130 */
131MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
132
133/* tx_hdr_type
134 * 0 - Data packets
135 * 6 - Control packets
136 */
137MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
138
Yotam Gigi763b4b72016-07-21 12:03:17 +0200139static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
140
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
159 char spad_pl[MLXSW_REG_SPAD_LEN];
160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
171 struct mlxsw_resources *resources;
172 int i;
173
174 resources = mlxsw_core_resources_get(mlxsw_sp->core);
175 if (!resources->max_span_valid)
176 return -EIO;
177
178 mlxsw_sp->span.entries_count = resources->max_span;
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
234 span_entry->ref_count = 0;
235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
251struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
252{
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
254 int i;
255
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258
259 if (curr->used && curr->local_port == port->local_port)
260 return curr;
261 }
262 return NULL;
263}
264
265struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
266{
267 struct mlxsw_sp_span_entry *span_entry;
268
269 span_entry = mlxsw_sp_span_entry_find(port);
270 if (span_entry) {
271 span_entry->ref_count++;
272 return span_entry;
273 }
274
275 return mlxsw_sp_span_entry_create(port);
276}
277
278static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
279 struct mlxsw_sp_span_entry *span_entry)
280{
281 if (--span_entry->ref_count == 0)
282 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
283 return 0;
284}
285
286static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
287{
288 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
289 struct mlxsw_sp_span_inspected_port *p;
290 int i;
291
292 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
293 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
294
295 list_for_each_entry(p, &curr->bound_ports_list, list)
296 if (p->local_port == port->local_port &&
297 p->type == MLXSW_SP_SPAN_EGRESS)
298 return true;
299 }
300
301 return false;
302}
303
304static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
305{
306 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
307}
308
309static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
310{
311 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
312 char sbib_pl[MLXSW_REG_SBIB_LEN];
313 int err;
314
315 /* If port is egress mirrored, the shared buffer size should be
316 * updated according to the mtu value
317 */
318 if (mlxsw_sp_span_is_egress_mirror(port)) {
319 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
320 mlxsw_sp_span_mtu_to_buffsize(mtu));
321 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
322 if (err) {
323 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
324 return err;
325 }
326 }
327
328 return 0;
329}
330
331static struct mlxsw_sp_span_inspected_port *
332mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
333 struct mlxsw_sp_span_entry *span_entry)
334{
335 struct mlxsw_sp_span_inspected_port *p;
336
337 list_for_each_entry(p, &span_entry->bound_ports_list, list)
338 if (port->local_port == p->local_port)
339 return p;
340 return NULL;
341}
342
343static int
344mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
345 struct mlxsw_sp_span_entry *span_entry,
346 enum mlxsw_sp_span_type type)
347{
348 struct mlxsw_sp_span_inspected_port *inspected_port;
349 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
350 char mpar_pl[MLXSW_REG_MPAR_LEN];
351 char sbib_pl[MLXSW_REG_SBIB_LEN];
352 int pa_id = span_entry->id;
353 int err;
354
355 /* if it is an egress SPAN, bind a shared buffer to it */
356 if (type == MLXSW_SP_SPAN_EGRESS) {
357 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
358 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
359 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
360 if (err) {
361 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
362 return err;
363 }
364 }
365
366 /* bind the port to the SPAN entry */
367 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
368 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
369 if (err)
370 goto err_mpar_reg_write;
371
372 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
373 if (!inspected_port) {
374 err = -ENOMEM;
375 goto err_inspected_port_alloc;
376 }
377 inspected_port->local_port = port->local_port;
378 inspected_port->type = type;
379 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
380
381 return 0;
382
383err_mpar_reg_write:
384err_inspected_port_alloc:
385 if (type == MLXSW_SP_SPAN_EGRESS) {
386 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
387 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
388 }
389 return err;
390}
391
392static void
393mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
394 struct mlxsw_sp_span_entry *span_entry,
395 enum mlxsw_sp_span_type type)
396{
397 struct mlxsw_sp_span_inspected_port *inspected_port;
398 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
399 char mpar_pl[MLXSW_REG_MPAR_LEN];
400 char sbib_pl[MLXSW_REG_SBIB_LEN];
401 int pa_id = span_entry->id;
402
403 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
404 if (!inspected_port)
405 return;
406
407 /* remove the inspected port */
408 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
409 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
410
411 /* remove the SBIB buffer if it was egress SPAN */
412 if (type == MLXSW_SP_SPAN_EGRESS) {
413 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
415 }
416
417 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
418
419 list_del(&inspected_port->list);
420 kfree(inspected_port);
421}
422
423static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
424 struct mlxsw_sp_port *to,
425 enum mlxsw_sp_span_type type)
426{
427 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
428 struct mlxsw_sp_span_entry *span_entry;
429 int err;
430
431 span_entry = mlxsw_sp_span_entry_get(to);
432 if (!span_entry)
433 return -ENOENT;
434
435 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
436 span_entry->id);
437
438 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
439 if (err)
440 goto err_port_bind;
441
442 return 0;
443
444err_port_bind:
445 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
446 return err;
447}
448
449static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
450 struct mlxsw_sp_port *to,
451 enum mlxsw_sp_span_type type)
452{
453 struct mlxsw_sp_span_entry *span_entry;
454
455 span_entry = mlxsw_sp_span_entry_find(to);
456 if (!span_entry) {
457 netdev_err(from->dev, "no span entry found\n");
458 return;
459 }
460
461 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
462 span_entry->id);
463 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
464}
465
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200466static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
467 bool is_up)
468{
469 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
470 char paos_pl[MLXSW_REG_PAOS_LEN];
471
472 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
473 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
474 MLXSW_PORT_ADMIN_STATUS_DOWN);
475 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
476}
477
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200478static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
479 unsigned char *addr)
480{
481 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
482 char ppad_pl[MLXSW_REG_PPAD_LEN];
483
484 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
485 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
486 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
487}
488
489static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
490{
491 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
492 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
493
494 ether_addr_copy(addr, mlxsw_sp->base_mac);
495 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
496 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
497}
498
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200499static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
500{
501 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
502 char pmtu_pl[MLXSW_REG_PMTU_LEN];
503 int max_mtu;
504 int err;
505
506 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
507 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
508 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
509 if (err)
510 return err;
511 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
512
513 if (mtu > max_mtu)
514 return -EINVAL;
515
516 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
517 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
518}
519
Ido Schimmelbe945352016-06-09 09:51:39 +0200520static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
521 u8 swid)
522{
523 char pspa_pl[MLXSW_REG_PSPA_LEN];
524
525 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
526 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
527}
528
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200529static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
530{
531 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200532
Ido Schimmelbe945352016-06-09 09:51:39 +0200533 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
534 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200535}
536
537static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
538 bool enable)
539{
540 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
541 char svpe_pl[MLXSW_REG_SVPE_LEN];
542
543 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
544 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
545}
546
547int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
548 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
549 u16 vid)
550{
551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
552 char svfa_pl[MLXSW_REG_SVFA_LEN];
553
554 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
555 fid, vid);
556 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
557}
558
Ido Schimmel584d73d2016-08-24 12:00:26 +0200559int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
560 u16 vid_begin, u16 vid_end,
561 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200562{
563 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
564 char *spvmlr_pl;
565 int err;
566
567 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
568 if (!spvmlr_pl)
569 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200570 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
571 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200572 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
573 kfree(spvmlr_pl);
574 return err;
575}
576
Ido Schimmel584d73d2016-08-24 12:00:26 +0200577static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
578 u16 vid, bool learn_enable)
579{
580 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
581 learn_enable);
582}
583
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200584static int
585mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
586{
587 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
588 char sspr_pl[MLXSW_REG_SSPR_LEN];
589
590 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
591 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
592}
593
Ido Schimmeld664b412016-06-09 09:51:40 +0200594static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
595 u8 local_port, u8 *p_module,
596 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200597{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200598 char pmlp_pl[MLXSW_REG_PMLP_LEN];
599 int err;
600
Ido Schimmel558c2d52016-02-26 17:32:29 +0100601 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200602 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
603 if (err)
604 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100605 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
606 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200607 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200608 return 0;
609}
610
Ido Schimmel18f1e702016-02-26 17:32:31 +0100611static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
612 u8 module, u8 width, u8 lane)
613{
614 char pmlp_pl[MLXSW_REG_PMLP_LEN];
615 int i;
616
617 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
618 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
619 for (i = 0; i < width; i++) {
620 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
621 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
622 }
623
624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
625}
626
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100627static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
628{
629 char pmlp_pl[MLXSW_REG_PMLP_LEN];
630
631 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
632 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
633 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
634}
635
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200636static int mlxsw_sp_port_open(struct net_device *dev)
637{
638 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
639 int err;
640
641 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
642 if (err)
643 return err;
644 netif_start_queue(dev);
645 return 0;
646}
647
648static int mlxsw_sp_port_stop(struct net_device *dev)
649{
650 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
651
652 netif_stop_queue(dev);
653 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
654}
655
656static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
657 struct net_device *dev)
658{
659 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
660 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
661 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
662 const struct mlxsw_tx_info tx_info = {
663 .local_port = mlxsw_sp_port->local_port,
664 .is_emad = false,
665 };
666 u64 len;
667 int err;
668
Jiri Pirko307c2432016-04-08 19:11:22 +0200669 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200670 return NETDEV_TX_BUSY;
671
672 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
673 struct sk_buff *skb_orig = skb;
674
675 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
676 if (!skb) {
677 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
678 dev_kfree_skb_any(skb_orig);
679 return NETDEV_TX_OK;
680 }
681 }
682
683 if (eth_skb_pad(skb)) {
684 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
685 return NETDEV_TX_OK;
686 }
687
688 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200689 /* TX header is consumed by HW on the way so we shouldn't count its
690 * bytes as being sent.
691 */
692 len = skb->len - MLXSW_TXHDR_LEN;
693
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200694 /* Due to a race we might fail here because of a full queue. In that
695 * unlikely case we simply drop the packet.
696 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200697 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200698
699 if (!err) {
700 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
701 u64_stats_update_begin(&pcpu_stats->syncp);
702 pcpu_stats->tx_packets++;
703 pcpu_stats->tx_bytes += len;
704 u64_stats_update_end(&pcpu_stats->syncp);
705 } else {
706 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
707 dev_kfree_skb_any(skb);
708 }
709 return NETDEV_TX_OK;
710}
711
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100712static void mlxsw_sp_set_rx_mode(struct net_device *dev)
713{
714}
715
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200716static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
717{
718 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
719 struct sockaddr *addr = p;
720 int err;
721
722 if (!is_valid_ether_addr(addr->sa_data))
723 return -EADDRNOTAVAIL;
724
725 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
726 if (err)
727 return err;
728 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
729 return 0;
730}
731
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200732static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200733 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200734{
735 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
736
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200737 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
738 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200739
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200740 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200741 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200742 pg_size + delay, pg_size);
743 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200744 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200745}
746
747int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200748 u8 *prio_tc, bool pause_en,
749 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200750{
751 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200752 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
753 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200754 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200755 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200756
757 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
758 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
759 if (err)
760 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761
762 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
763 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200764 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200765
766 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
767 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200768 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200769 configure = true;
770 break;
771 }
772 }
773
774 if (!configure)
775 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200776 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200777 }
778
Ido Schimmelff6551e2016-04-06 17:10:03 +0200779 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
780}
781
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200782static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200783 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200784{
785 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
786 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200787 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200788 u8 *prio_tc;
789
790 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200791 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200792
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200793 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200794 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200795}
796
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200797static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
798{
799 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200800 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200801 int err;
802
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200803 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200804 if (err)
805 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200806 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
807 if (err)
808 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200809 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
810 if (err)
811 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200812 dev->mtu = mtu;
813 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200814
815err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200816 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
817err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200818 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200819 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200820}
821
822static struct rtnl_link_stats64 *
823mlxsw_sp_port_get_stats64(struct net_device *dev,
824 struct rtnl_link_stats64 *stats)
825{
826 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
827 struct mlxsw_sp_port_pcpu_stats *p;
828 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
829 u32 tx_dropped = 0;
830 unsigned int start;
831 int i;
832
833 for_each_possible_cpu(i) {
834 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
835 do {
836 start = u64_stats_fetch_begin_irq(&p->syncp);
837 rx_packets = p->rx_packets;
838 rx_bytes = p->rx_bytes;
839 tx_packets = p->tx_packets;
840 tx_bytes = p->tx_bytes;
841 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
842
843 stats->rx_packets += rx_packets;
844 stats->rx_bytes += rx_bytes;
845 stats->tx_packets += tx_packets;
846 stats->tx_bytes += tx_bytes;
847 /* tx_dropped is u32, updated without syncp protection. */
848 tx_dropped += p->tx_dropped;
849 }
850 stats->tx_dropped = tx_dropped;
851 return stats;
852}
853
854int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
855 u16 vid_end, bool is_member, bool untagged)
856{
857 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
858 char *spvm_pl;
859 int err;
860
861 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
862 if (!spvm_pl)
863 return -ENOMEM;
864
865 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
866 vid_end, is_member, untagged);
867 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
868 kfree(spvm_pl);
869 return err;
870}
871
872static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
873{
874 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
875 u16 vid, last_visited_vid;
876 int err;
877
878 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
879 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
880 vid);
881 if (err) {
882 last_visited_vid = vid;
883 goto err_port_vid_to_fid_set;
884 }
885 }
886
887 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
888 if (err) {
889 last_visited_vid = VLAN_N_VID;
890 goto err_port_vid_to_fid_set;
891 }
892
893 return 0;
894
895err_port_vid_to_fid_set:
896 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
897 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
898 vid);
899 return err;
900}
901
902static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
903{
904 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
905 u16 vid;
906 int err;
907
908 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
909 if (err)
910 return err;
911
912 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
913 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
914 vid, vid);
915 if (err)
916 return err;
917 }
918
919 return 0;
920}
921
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100922static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +0200923mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100924{
925 struct mlxsw_sp_port *mlxsw_sp_vport;
926
927 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
928 if (!mlxsw_sp_vport)
929 return NULL;
930
931 /* dev will be set correctly after the VLAN device is linked
932 * with the real device. In case of bridge SELF invocation, dev
933 * will remain as is.
934 */
935 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
936 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
937 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
938 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +0100939 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
940 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +0200941 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100942
943 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
944
945 return mlxsw_sp_vport;
946}
947
948static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
949{
950 list_del(&mlxsw_sp_vport->vport.list);
951 kfree(mlxsw_sp_vport);
952}
953
Ido Schimmel05978482016-08-17 16:39:30 +0200954static int mlxsw_sp_port_add_vid(struct net_device *dev,
955 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200956{
957 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100958 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +0200959 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200960 int err;
961
962 /* VLAN 0 is added to HW filter when device goes up, but it is
963 * reserved in our case, so simply return.
964 */
965 if (!vid)
966 return 0;
967
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200968 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200969 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200970
Ido Schimmel0355b592016-06-20 23:04:13 +0200971 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200972 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +0200973 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200974
975 /* When adding the first VLAN interface on a bridged port we need to
976 * transition all the active 802.1Q bridge VLANs to use explicit
977 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
978 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100979 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200980 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200981 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100982 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200983 }
984
Ido Schimmel52697a92016-07-02 11:00:09 +0200985 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200986 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200987 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200988
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200989 return 0;
990
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200991err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100992 if (list_is_singular(&mlxsw_sp_port->vports_list))
993 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
994err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100995 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200996 return err;
997}
998
Ido Schimmel32d863f2016-07-02 11:00:10 +0200999static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1000 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001001{
1002 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001003 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001004 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001005
1006 /* VLAN 0 is removed from HW filter when device goes down, but
1007 * it is reserved in our case, so simply return.
1008 */
1009 if (!vid)
1010 return 0;
1011
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001012 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001013 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001014 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001015
Ido Schimmel7a355832016-08-17 16:39:28 +02001016 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001017
Ido Schimmel1c800752016-06-20 23:04:20 +02001018 /* Drop FID reference. If this was the last reference the
1019 * resources will be freed.
1020 */
1021 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1022 if (f && !WARN_ON(!f->leave))
1023 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001024
1025 /* When removing the last VLAN interface on a bridged port we need to
1026 * transition all active 802.1Q bridge VLANs to use VID to FID
1027 * mappings and set port's mode to VLAN mode.
1028 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001029 if (list_is_singular(&mlxsw_sp_port->vports_list))
1030 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001031
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001032 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1033
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001034 return 0;
1035}
1036
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001037static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1038 size_t len)
1039{
1040 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001041 u8 module = mlxsw_sp_port->mapping.module;
1042 u8 width = mlxsw_sp_port->mapping.width;
1043 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001044 int err;
1045
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001046 if (!mlxsw_sp_port->split)
1047 err = snprintf(name, len, "p%d", module + 1);
1048 else
1049 err = snprintf(name, len, "p%ds%d", module + 1,
1050 lane / width);
1051
1052 if (err >= len)
1053 return -EINVAL;
1054
1055 return 0;
1056}
1057
Yotam Gigi763b4b72016-07-21 12:03:17 +02001058static struct mlxsw_sp_port_mall_tc_entry *
1059mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1060 unsigned long cookie) {
1061 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1062
1063 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1064 if (mall_tc_entry->cookie == cookie)
1065 return mall_tc_entry;
1066
1067 return NULL;
1068}
1069
1070static int
1071mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1072 struct tc_cls_matchall_offload *cls,
1073 const struct tc_action *a,
1074 bool ingress)
1075{
1076 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1077 struct net *net = dev_net(mlxsw_sp_port->dev);
1078 enum mlxsw_sp_span_type span_type;
1079 struct mlxsw_sp_port *to_port;
1080 struct net_device *to_dev;
1081 int ifindex;
1082 int err;
1083
1084 ifindex = tcf_mirred_ifindex(a);
1085 to_dev = __dev_get_by_index(net, ifindex);
1086 if (!to_dev) {
1087 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1088 return -EINVAL;
1089 }
1090
1091 if (!mlxsw_sp_port_dev_check(to_dev)) {
1092 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1093 return -ENOTSUPP;
1094 }
1095 to_port = netdev_priv(to_dev);
1096
1097 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1098 if (!mall_tc_entry)
1099 return -ENOMEM;
1100
1101 mall_tc_entry->cookie = cls->cookie;
1102 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1103 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1104 mall_tc_entry->mirror.ingress = ingress;
1105 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1106
1107 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1108 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1109 if (err)
1110 goto err_mirror_add;
1111 return 0;
1112
1113err_mirror_add:
1114 list_del(&mall_tc_entry->list);
1115 kfree(mall_tc_entry);
1116 return err;
1117}
1118
1119static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1120 __be16 protocol,
1121 struct tc_cls_matchall_offload *cls,
1122 bool ingress)
1123{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001124 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001125 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001126 int err;
1127
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001128 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001129 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1130 return -ENOTSUPP;
1131 }
1132
WANG Cong22dc13c2016-08-13 22:35:00 -07001133 tcf_exts_to_list(cls->exts, &actions);
1134 list_for_each_entry(a, &actions, list) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001135 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1136 return -ENOTSUPP;
1137
Yotam Gigi763b4b72016-07-21 12:03:17 +02001138 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1139 a, ingress);
1140 if (err)
1141 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001142 }
1143
1144 return 0;
1145}
1146
1147static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1148 struct tc_cls_matchall_offload *cls)
1149{
1150 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1151 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1152 enum mlxsw_sp_span_type span_type;
1153 struct mlxsw_sp_port *to_port;
1154
1155 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1156 cls->cookie);
1157 if (!mall_tc_entry) {
1158 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1159 return;
1160 }
1161
1162 switch (mall_tc_entry->type) {
1163 case MLXSW_SP_PORT_MALL_MIRROR:
1164 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1165 span_type = mall_tc_entry->mirror.ingress ?
1166 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1167
1168 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1169 break;
1170 default:
1171 WARN_ON(1);
1172 }
1173
1174 list_del(&mall_tc_entry->list);
1175 kfree(mall_tc_entry);
1176}
1177
1178static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1179 __be16 proto, struct tc_to_netdev *tc)
1180{
1181 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1182 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1183
1184 if (tc->type == TC_SETUP_MATCHALL) {
1185 switch (tc->cls_mall->command) {
1186 case TC_CLSMATCHALL_REPLACE:
1187 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1188 proto,
1189 tc->cls_mall,
1190 ingress);
1191 case TC_CLSMATCHALL_DESTROY:
1192 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1193 tc->cls_mall);
1194 return 0;
1195 default:
1196 return -EINVAL;
1197 }
1198 }
1199
1200 return -ENOTSUPP;
1201}
1202
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001203static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1204 .ndo_open = mlxsw_sp_port_open,
1205 .ndo_stop = mlxsw_sp_port_stop,
1206 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001207 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001208 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001209 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1210 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1211 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1212 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1213 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001214 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1215 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001216 .ndo_fdb_add = switchdev_port_fdb_add,
1217 .ndo_fdb_del = switchdev_port_fdb_del,
1218 .ndo_fdb_dump = switchdev_port_fdb_dump,
1219 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1220 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1221 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001222 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001223};
1224
1225static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1226 struct ethtool_drvinfo *drvinfo)
1227{
1228 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1229 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1230
1231 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1232 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1233 sizeof(drvinfo->version));
1234 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1235 "%d.%d.%d",
1236 mlxsw_sp->bus_info->fw_rev.major,
1237 mlxsw_sp->bus_info->fw_rev.minor,
1238 mlxsw_sp->bus_info->fw_rev.subminor);
1239 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1240 sizeof(drvinfo->bus_info));
1241}
1242
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001243static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1244 struct ethtool_pauseparam *pause)
1245{
1246 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1247
1248 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1249 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1250}
1251
1252static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1253 struct ethtool_pauseparam *pause)
1254{
1255 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1256
1257 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1258 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1259 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1260
1261 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1262 pfcc_pl);
1263}
1264
1265static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1266 struct ethtool_pauseparam *pause)
1267{
1268 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1269 bool pause_en = pause->tx_pause || pause->rx_pause;
1270 int err;
1271
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001272 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1273 netdev_err(dev, "PFC already enabled on port\n");
1274 return -EINVAL;
1275 }
1276
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001277 if (pause->autoneg) {
1278 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1279 return -EINVAL;
1280 }
1281
1282 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1283 if (err) {
1284 netdev_err(dev, "Failed to configure port's headroom\n");
1285 return err;
1286 }
1287
1288 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1289 if (err) {
1290 netdev_err(dev, "Failed to set PAUSE parameters\n");
1291 goto err_port_pause_configure;
1292 }
1293
1294 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1295 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1296
1297 return 0;
1298
1299err_port_pause_configure:
1300 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1301 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1302 return err;
1303}
1304
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001305struct mlxsw_sp_port_hw_stats {
1306 char str[ETH_GSTRING_LEN];
1307 u64 (*getter)(char *payload);
1308};
1309
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001310static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001311 {
1312 .str = "a_frames_transmitted_ok",
1313 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1314 },
1315 {
1316 .str = "a_frames_received_ok",
1317 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1318 },
1319 {
1320 .str = "a_frame_check_sequence_errors",
1321 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1322 },
1323 {
1324 .str = "a_alignment_errors",
1325 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1326 },
1327 {
1328 .str = "a_octets_transmitted_ok",
1329 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1330 },
1331 {
1332 .str = "a_octets_received_ok",
1333 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1334 },
1335 {
1336 .str = "a_multicast_frames_xmitted_ok",
1337 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1338 },
1339 {
1340 .str = "a_broadcast_frames_xmitted_ok",
1341 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1342 },
1343 {
1344 .str = "a_multicast_frames_received_ok",
1345 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1346 },
1347 {
1348 .str = "a_broadcast_frames_received_ok",
1349 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1350 },
1351 {
1352 .str = "a_in_range_length_errors",
1353 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1354 },
1355 {
1356 .str = "a_out_of_range_length_field",
1357 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1358 },
1359 {
1360 .str = "a_frame_too_long_errors",
1361 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1362 },
1363 {
1364 .str = "a_symbol_error_during_carrier",
1365 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1366 },
1367 {
1368 .str = "a_mac_control_frames_transmitted",
1369 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1370 },
1371 {
1372 .str = "a_mac_control_frames_received",
1373 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1374 },
1375 {
1376 .str = "a_unsupported_opcodes_received",
1377 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1378 },
1379 {
1380 .str = "a_pause_mac_ctrl_frames_received",
1381 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1382 },
1383 {
1384 .str = "a_pause_mac_ctrl_frames_xmitted",
1385 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1386 },
1387};
1388
1389#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1390
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001391static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1392 {
1393 .str = "rx_octets_prio",
1394 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1395 },
1396 {
1397 .str = "rx_frames_prio",
1398 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1399 },
1400 {
1401 .str = "tx_octets_prio",
1402 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1403 },
1404 {
1405 .str = "tx_frames_prio",
1406 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1407 },
1408 {
1409 .str = "rx_pause_prio",
1410 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1411 },
1412 {
1413 .str = "rx_pause_duration_prio",
1414 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1415 },
1416 {
1417 .str = "tx_pause_prio",
1418 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1419 },
1420 {
1421 .str = "tx_pause_duration_prio",
1422 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1423 },
1424};
1425
1426#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1427
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001428static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1429{
1430 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1431
1432 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1433}
1434
1435static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1436 {
1437 .str = "tc_transmit_queue_tc",
1438 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1439 },
1440 {
1441 .str = "tc_no_buffer_discard_uc_tc",
1442 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1443 },
1444};
1445
1446#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1447
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001448#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001449 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1450 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001451 IEEE_8021QAZ_MAX_TCS)
1452
1453static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1454{
1455 int i;
1456
1457 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1458 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1459 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1460 *p += ETH_GSTRING_LEN;
1461 }
1462}
1463
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001464static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1465{
1466 int i;
1467
1468 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1469 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1470 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1471 *p += ETH_GSTRING_LEN;
1472 }
1473}
1474
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001475static void mlxsw_sp_port_get_strings(struct net_device *dev,
1476 u32 stringset, u8 *data)
1477{
1478 u8 *p = data;
1479 int i;
1480
1481 switch (stringset) {
1482 case ETH_SS_STATS:
1483 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1484 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1485 ETH_GSTRING_LEN);
1486 p += ETH_GSTRING_LEN;
1487 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001488
1489 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1490 mlxsw_sp_port_get_prio_strings(&p, i);
1491
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001492 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1493 mlxsw_sp_port_get_tc_strings(&p, i);
1494
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001495 break;
1496 }
1497}
1498
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001499static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1500 enum ethtool_phys_id_state state)
1501{
1502 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1503 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1504 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1505 bool active;
1506
1507 switch (state) {
1508 case ETHTOOL_ID_ACTIVE:
1509 active = true;
1510 break;
1511 case ETHTOOL_ID_INACTIVE:
1512 active = false;
1513 break;
1514 default:
1515 return -EOPNOTSUPP;
1516 }
1517
1518 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1519 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1520}
1521
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001522static int
1523mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1524 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1525{
1526 switch (grp) {
1527 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1528 *p_hw_stats = mlxsw_sp_port_hw_stats;
1529 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1530 break;
1531 case MLXSW_REG_PPCNT_PRIO_CNT:
1532 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1533 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1534 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001535 case MLXSW_REG_PPCNT_TC_CNT:
1536 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1537 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1538 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001539 default:
1540 WARN_ON(1);
1541 return -ENOTSUPP;
1542 }
1543 return 0;
1544}
1545
1546static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1547 enum mlxsw_reg_ppcnt_grp grp, int prio,
1548 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001549{
1550 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001552 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001553 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001554 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001555 int err;
1556
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001557 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1558 if (err)
1559 return;
1560 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001561 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001562 for (i = 0; i < len; i++)
1563 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1564}
1565
1566static void mlxsw_sp_port_get_stats(struct net_device *dev,
1567 struct ethtool_stats *stats, u64 *data)
1568{
1569 int i, data_index = 0;
1570
1571 /* IEEE 802.3 Counters */
1572 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1573 data, data_index);
1574 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1575
1576 /* Per-Priority Counters */
1577 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1578 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1579 data, data_index);
1580 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1581 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001582
1583 /* Per-TC Counters */
1584 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1585 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1586 data, data_index);
1587 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1588 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001589}
1590
1591static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1592{
1593 switch (sset) {
1594 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001595 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001596 default:
1597 return -EOPNOTSUPP;
1598 }
1599}
1600
1601struct mlxsw_sp_port_link_mode {
1602 u32 mask;
1603 u32 supported;
1604 u32 advertised;
1605 u32 speed;
1606};
1607
1608static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1609 {
1610 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1611 .supported = SUPPORTED_100baseT_Full,
1612 .advertised = ADVERTISED_100baseT_Full,
1613 .speed = 100,
1614 },
1615 {
1616 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1617 .speed = 100,
1618 },
1619 {
1620 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1621 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1622 .supported = SUPPORTED_1000baseKX_Full,
1623 .advertised = ADVERTISED_1000baseKX_Full,
1624 .speed = 1000,
1625 },
1626 {
1627 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1628 .supported = SUPPORTED_10000baseT_Full,
1629 .advertised = ADVERTISED_10000baseT_Full,
1630 .speed = 10000,
1631 },
1632 {
1633 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1634 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1635 .supported = SUPPORTED_10000baseKX4_Full,
1636 .advertised = ADVERTISED_10000baseKX4_Full,
1637 .speed = 10000,
1638 },
1639 {
1640 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1641 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1642 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1643 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1644 .supported = SUPPORTED_10000baseKR_Full,
1645 .advertised = ADVERTISED_10000baseKR_Full,
1646 .speed = 10000,
1647 },
1648 {
1649 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1650 .supported = SUPPORTED_20000baseKR2_Full,
1651 .advertised = ADVERTISED_20000baseKR2_Full,
1652 .speed = 20000,
1653 },
1654 {
1655 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1656 .supported = SUPPORTED_40000baseCR4_Full,
1657 .advertised = ADVERTISED_40000baseCR4_Full,
1658 .speed = 40000,
1659 },
1660 {
1661 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1662 .supported = SUPPORTED_40000baseKR4_Full,
1663 .advertised = ADVERTISED_40000baseKR4_Full,
1664 .speed = 40000,
1665 },
1666 {
1667 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1668 .supported = SUPPORTED_40000baseSR4_Full,
1669 .advertised = ADVERTISED_40000baseSR4_Full,
1670 .speed = 40000,
1671 },
1672 {
1673 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1674 .supported = SUPPORTED_40000baseLR4_Full,
1675 .advertised = ADVERTISED_40000baseLR4_Full,
1676 .speed = 40000,
1677 },
1678 {
1679 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1680 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1681 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1682 .speed = 25000,
1683 },
1684 {
1685 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1686 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1687 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1688 .speed = 50000,
1689 },
1690 {
1691 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1692 .supported = SUPPORTED_56000baseKR4_Full,
1693 .advertised = ADVERTISED_56000baseKR4_Full,
1694 .speed = 56000,
1695 },
1696 {
1697 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1698 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1699 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1700 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1701 .speed = 100000,
1702 },
1703};
1704
1705#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1706
1707static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1708{
1709 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1710 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1711 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1712 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1713 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1714 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1715 return SUPPORTED_FIBRE;
1716
1717 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1718 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1719 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1720 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1721 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1722 return SUPPORTED_Backplane;
1723 return 0;
1724}
1725
1726static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1727{
1728 u32 modes = 0;
1729 int i;
1730
1731 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1732 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1733 modes |= mlxsw_sp_port_link_mode[i].supported;
1734 }
1735 return modes;
1736}
1737
1738static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1739{
1740 u32 modes = 0;
1741 int i;
1742
1743 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1744 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1745 modes |= mlxsw_sp_port_link_mode[i].advertised;
1746 }
1747 return modes;
1748}
1749
1750static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1751 struct ethtool_cmd *cmd)
1752{
1753 u32 speed = SPEED_UNKNOWN;
1754 u8 duplex = DUPLEX_UNKNOWN;
1755 int i;
1756
1757 if (!carrier_ok)
1758 goto out;
1759
1760 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1761 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1762 speed = mlxsw_sp_port_link_mode[i].speed;
1763 duplex = DUPLEX_FULL;
1764 break;
1765 }
1766 }
1767out:
1768 ethtool_cmd_speed_set(cmd, speed);
1769 cmd->duplex = duplex;
1770}
1771
1772static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1773{
1774 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1775 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1776 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1777 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1778 return PORT_FIBRE;
1779
1780 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1781 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1782 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1783 return PORT_DA;
1784
1785 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1786 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1787 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1788 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1789 return PORT_NONE;
1790
1791 return PORT_OTHER;
1792}
1793
1794static int mlxsw_sp_port_get_settings(struct net_device *dev,
1795 struct ethtool_cmd *cmd)
1796{
1797 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1798 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1799 char ptys_pl[MLXSW_REG_PTYS_LEN];
1800 u32 eth_proto_cap;
1801 u32 eth_proto_admin;
1802 u32 eth_proto_oper;
1803 int err;
1804
1805 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1806 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1807 if (err) {
1808 netdev_err(dev, "Failed to get proto");
1809 return err;
1810 }
1811 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1812 &eth_proto_admin, &eth_proto_oper);
1813
1814 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1815 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
Ido Schimmelc3f15762016-07-15 11:14:59 +02001816 SUPPORTED_Pause | SUPPORTED_Asym_Pause |
1817 SUPPORTED_Autoneg;
Ido Schimmel0c83f882016-09-12 13:26:23 +02001818 if (mlxsw_sp_port->link.autoneg) {
1819 cmd->advertising =
1820 mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1821 cmd->advertising |= ADVERTISED_Autoneg;
1822 cmd->autoneg = AUTONEG_ENABLE;
1823 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001824 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1825 eth_proto_oper, cmd);
1826
1827 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1828 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1829 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1830
1831 cmd->transceiver = XCVR_INTERNAL;
1832 return 0;
1833}
1834
1835static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1836{
1837 u32 ptys_proto = 0;
1838 int i;
1839
1840 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1841 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1842 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1843 }
1844 return ptys_proto;
1845}
1846
1847static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1848{
1849 u32 ptys_proto = 0;
1850 int i;
1851
1852 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1853 if (speed == mlxsw_sp_port_link_mode[i].speed)
1854 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1855 }
1856 return ptys_proto;
1857}
1858
Ido Schimmel18f1e702016-02-26 17:32:31 +01001859static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1860{
1861 u32 ptys_proto = 0;
1862 int i;
1863
1864 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1865 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1866 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1867 }
1868 return ptys_proto;
1869}
1870
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001871static int mlxsw_sp_port_set_settings(struct net_device *dev,
1872 struct ethtool_cmd *cmd)
1873{
1874 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1875 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1876 char ptys_pl[MLXSW_REG_PTYS_LEN];
1877 u32 speed;
1878 u32 eth_proto_new;
1879 u32 eth_proto_cap;
1880 u32 eth_proto_admin;
Ido Schimmel0c83f882016-09-12 13:26:23 +02001881 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001882 int err;
1883
Ido Schimmel0c83f882016-09-12 13:26:23 +02001884 autoneg = cmd->autoneg == AUTONEG_ENABLE;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001885 speed = ethtool_cmd_speed(cmd);
1886
Ido Schimmel0c83f882016-09-12 13:26:23 +02001887 eth_proto_new = autoneg ?
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001888 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1889 mlxsw_sp_to_ptys_speed(speed);
1890
1891 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1892 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1893 if (err) {
1894 netdev_err(dev, "Failed to get proto");
1895 return err;
1896 }
1897 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1898
1899 eth_proto_new = eth_proto_new & eth_proto_cap;
1900 if (!eth_proto_new) {
1901 netdev_err(dev, "Not supported proto admin requested");
1902 return -EINVAL;
1903 }
1904 if (eth_proto_new == eth_proto_admin)
1905 return 0;
1906
1907 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1908 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1909 if (err) {
1910 netdev_err(dev, "Failed to set proto admin");
1911 return err;
1912 }
1913
Ido Schimmel6277d462016-07-15 11:14:58 +02001914 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001915 return 0;
1916
Ido Schimmel0c83f882016-09-12 13:26:23 +02001917 mlxsw_sp_port->link.autoneg = autoneg;
1918
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001919 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1920 if (err) {
1921 netdev_err(dev, "Failed to set admin status");
1922 return err;
1923 }
1924
1925 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1926 if (err) {
1927 netdev_err(dev, "Failed to set admin status");
1928 return err;
1929 }
1930
1931 return 0;
1932}
1933
1934static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1935 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1936 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001937 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1938 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001939 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001940 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001941 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1942 .get_sset_count = mlxsw_sp_port_get_sset_count,
1943 .get_settings = mlxsw_sp_port_get_settings,
1944 .set_settings = mlxsw_sp_port_set_settings,
1945};
1946
Ido Schimmel18f1e702016-02-26 17:32:31 +01001947static int
1948mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1949{
1950 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1951 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1952 char ptys_pl[MLXSW_REG_PTYS_LEN];
1953 u32 eth_proto_admin;
1954
1955 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1956 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1957 eth_proto_admin);
1958 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1959}
1960
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001961int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1962 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1963 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02001964{
1965 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1966 char qeec_pl[MLXSW_REG_QEEC_LEN];
1967
1968 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1969 next_index);
1970 mlxsw_reg_qeec_de_set(qeec_pl, true);
1971 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1972 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1973 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1974}
1975
Ido Schimmelcc7cf512016-04-06 17:10:11 +02001976int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1977 enum mlxsw_reg_qeec_hr hr, u8 index,
1978 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02001979{
1980 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1981 char qeec_pl[MLXSW_REG_QEEC_LEN];
1982
1983 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1984 next_index);
1985 mlxsw_reg_qeec_mase_set(qeec_pl, true);
1986 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1987 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1988}
1989
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001990int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1991 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02001992{
1993 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1994 char qtct_pl[MLXSW_REG_QTCT_LEN];
1995
1996 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
1997 tclass);
1998 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
1999}
2000
2001static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2002{
2003 int err, i;
2004
2005 /* Setup the elements hierarcy, so that each TC is linked to
2006 * one subgroup, which are all member in the same group.
2007 */
2008 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2009 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2010 0);
2011 if (err)
2012 return err;
2013 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2014 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2015 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2016 0, false, 0);
2017 if (err)
2018 return err;
2019 }
2020 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2021 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2022 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2023 false, 0);
2024 if (err)
2025 return err;
2026 }
2027
2028 /* Make sure the max shaper is disabled in all hierarcies that
2029 * support it.
2030 */
2031 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2032 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2033 MLXSW_REG_QEEC_MAS_DIS);
2034 if (err)
2035 return err;
2036 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2037 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2038 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2039 i, 0,
2040 MLXSW_REG_QEEC_MAS_DIS);
2041 if (err)
2042 return err;
2043 }
2044 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2045 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2046 MLXSW_REG_QEEC_HIERARCY_TC,
2047 i, i,
2048 MLXSW_REG_QEEC_MAS_DIS);
2049 if (err)
2050 return err;
2051 }
2052
2053 /* Map all priorities to traffic class 0. */
2054 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2055 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2056 if (err)
2057 return err;
2058 }
2059
2060 return 0;
2061}
2062
Ido Schimmel05978482016-08-17 16:39:30 +02002063static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2064{
2065 mlxsw_sp_port->pvid = 1;
2066
2067 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2068}
2069
2070static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2071{
2072 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2073}
2074
Ido Schimmelbe945352016-06-09 09:51:39 +02002075static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002076 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002077{
2078 struct mlxsw_sp_port *mlxsw_sp_port;
2079 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002080 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002081 int err;
2082
2083 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2084 if (!dev)
2085 return -ENOMEM;
2086 mlxsw_sp_port = netdev_priv(dev);
2087 mlxsw_sp_port->dev = dev;
2088 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2089 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002090 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002091 mlxsw_sp_port->mapping.module = module;
2092 mlxsw_sp_port->mapping.width = width;
2093 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002094 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002095 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2096 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2097 if (!mlxsw_sp_port->active_vlans) {
2098 err = -ENOMEM;
2099 goto err_port_active_vlans_alloc;
2100 }
Elad Razfc1273a2016-01-06 13:01:11 +01002101 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2102 if (!mlxsw_sp_port->untagged_vlans) {
2103 err = -ENOMEM;
2104 goto err_port_untagged_vlans_alloc;
2105 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002106 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002107 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002108
2109 mlxsw_sp_port->pcpu_stats =
2110 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2111 if (!mlxsw_sp_port->pcpu_stats) {
2112 err = -ENOMEM;
2113 goto err_alloc_stats;
2114 }
2115
2116 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2117 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2118
Ido Schimmel3247ff22016-09-08 08:16:02 +02002119 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2120 if (err) {
2121 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2122 mlxsw_sp_port->local_port);
2123 goto err_port_swid_set;
2124 }
2125
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002126 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2127 if (err) {
2128 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2129 mlxsw_sp_port->local_port);
2130 goto err_dev_addr_init;
2131 }
2132
2133 netif_carrier_off(dev);
2134
2135 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002136 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2137 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002138
2139 /* Each packet needs to have a Tx header (metadata) on top all other
2140 * headers.
2141 */
2142 dev->hard_header_len += MLXSW_TXHDR_LEN;
2143
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002144 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2145 if (err) {
2146 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2147 mlxsw_sp_port->local_port);
2148 goto err_port_system_port_mapping_set;
2149 }
2150
Ido Schimmel18f1e702016-02-26 17:32:31 +01002151 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2152 if (err) {
2153 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2154 mlxsw_sp_port->local_port);
2155 goto err_port_speed_by_width_set;
2156 }
2157
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002158 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2159 if (err) {
2160 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2161 mlxsw_sp_port->local_port);
2162 goto err_port_mtu_set;
2163 }
2164
2165 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2166 if (err)
2167 goto err_port_admin_status_set;
2168
2169 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2170 if (err) {
2171 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2172 mlxsw_sp_port->local_port);
2173 goto err_port_buffers_init;
2174 }
2175
Ido Schimmel90183b92016-04-06 17:10:08 +02002176 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2177 if (err) {
2178 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2179 mlxsw_sp_port->local_port);
2180 goto err_port_ets_init;
2181 }
2182
Ido Schimmelf00817d2016-04-06 17:10:09 +02002183 /* ETS and buffers must be initialized before DCB. */
2184 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2185 if (err) {
2186 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2187 mlxsw_sp_port->local_port);
2188 goto err_port_dcb_init;
2189 }
2190
Ido Schimmel05978482016-08-17 16:39:30 +02002191 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2192 if (err) {
2193 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2194 mlxsw_sp_port->local_port);
2195 goto err_port_pvid_vport_create;
2196 }
2197
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002198 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002199 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002200 err = register_netdev(dev);
2201 if (err) {
2202 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2203 mlxsw_sp_port->local_port);
2204 goto err_register_netdev;
2205 }
2206
Jiri Pirko932762b2016-04-08 19:11:21 +02002207 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2208 mlxsw_sp_port->local_port, dev,
2209 mlxsw_sp_port->split, module);
2210 if (err) {
2211 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2212 mlxsw_sp_port->local_port);
2213 goto err_core_port_init;
2214 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002215
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002216 return 0;
2217
Jiri Pirko932762b2016-04-08 19:11:21 +02002218err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002219 unregister_netdev(dev);
2220err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002221 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002222 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002223 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2224err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002225 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002226err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002227err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002228err_port_buffers_init:
2229err_port_admin_status_set:
2230err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002231err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002232err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002233err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002234 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2235err_port_swid_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002236 free_percpu(mlxsw_sp_port->pcpu_stats);
2237err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002238 kfree(mlxsw_sp_port->untagged_vlans);
2239err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002240 kfree(mlxsw_sp_port->active_vlans);
2241err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002242 free_netdev(dev);
2243 return err;
2244}
2245
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002246static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2247{
2248 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2249
2250 if (!mlxsw_sp_port)
2251 return;
Jiri Pirko932762b2016-04-08 19:11:21 +02002252 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002253 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002254 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002255 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002256 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002257 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002258 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2259 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002260 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002261 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002262 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002263 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002264 free_netdev(mlxsw_sp_port->dev);
2265}
2266
2267static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2268{
2269 int i;
2270
2271 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2272 mlxsw_sp_port_remove(mlxsw_sp, i);
2273 kfree(mlxsw_sp->ports);
2274}
2275
2276static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2277{
Ido Schimmeld664b412016-06-09 09:51:40 +02002278 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002279 size_t alloc_size;
2280 int i;
2281 int err;
2282
2283 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2284 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2285 if (!mlxsw_sp->ports)
2286 return -ENOMEM;
2287
2288 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002289 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002290 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002291 if (err)
2292 goto err_port_module_info_get;
2293 if (!width)
2294 continue;
2295 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002296 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2297 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002298 if (err)
2299 goto err_port_create;
2300 }
2301 return 0;
2302
2303err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002304err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002305 for (i--; i >= 1; i--)
2306 mlxsw_sp_port_remove(mlxsw_sp, i);
2307 kfree(mlxsw_sp->ports);
2308 return err;
2309}
2310
Ido Schimmel18f1e702016-02-26 17:32:31 +01002311static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2312{
2313 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2314
2315 return local_port - offset;
2316}
2317
Ido Schimmelbe945352016-06-09 09:51:39 +02002318static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2319 u8 module, unsigned int count)
2320{
2321 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2322 int err, i;
2323
2324 for (i = 0; i < count; i++) {
2325 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2326 width, i * width);
2327 if (err)
2328 goto err_port_module_map;
2329 }
2330
2331 for (i = 0; i < count; i++) {
2332 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2333 if (err)
2334 goto err_port_swid_set;
2335 }
2336
2337 for (i = 0; i < count; i++) {
2338 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002339 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002340 if (err)
2341 goto err_port_create;
2342 }
2343
2344 return 0;
2345
2346err_port_create:
2347 for (i--; i >= 0; i--)
2348 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2349 i = count;
2350err_port_swid_set:
2351 for (i--; i >= 0; i--)
2352 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2353 MLXSW_PORT_SWID_DISABLED_PORT);
2354 i = count;
2355err_port_module_map:
2356 for (i--; i >= 0; i--)
2357 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2358 return err;
2359}
2360
2361static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2362 u8 base_port, unsigned int count)
2363{
2364 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2365 int i;
2366
2367 /* Split by four means we need to re-create two ports, otherwise
2368 * only one.
2369 */
2370 count = count / 2;
2371
2372 for (i = 0; i < count; i++) {
2373 local_port = base_port + i * 2;
2374 module = mlxsw_sp->port_to_module[local_port];
2375
2376 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2377 0);
2378 }
2379
2380 for (i = 0; i < count; i++)
2381 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2382
2383 for (i = 0; i < count; i++) {
2384 local_port = base_port + i * 2;
2385 module = mlxsw_sp->port_to_module[local_port];
2386
2387 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002388 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002389 }
2390}
2391
Jiri Pirkob2f10572016-04-08 19:11:23 +02002392static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2393 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002394{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002395 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002396 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002397 u8 module, cur_width, base_port;
2398 int i;
2399 int err;
2400
2401 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2402 if (!mlxsw_sp_port) {
2403 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2404 local_port);
2405 return -EINVAL;
2406 }
2407
Ido Schimmeld664b412016-06-09 09:51:40 +02002408 module = mlxsw_sp_port->mapping.module;
2409 cur_width = mlxsw_sp_port->mapping.width;
2410
Ido Schimmel18f1e702016-02-26 17:32:31 +01002411 if (count != 2 && count != 4) {
2412 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2413 return -EINVAL;
2414 }
2415
Ido Schimmel18f1e702016-02-26 17:32:31 +01002416 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2417 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2418 return -EINVAL;
2419 }
2420
2421 /* Make sure we have enough slave (even) ports for the split. */
2422 if (count == 2) {
2423 base_port = local_port;
2424 if (mlxsw_sp->ports[base_port + 1]) {
2425 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2426 return -EINVAL;
2427 }
2428 } else {
2429 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2430 if (mlxsw_sp->ports[base_port + 1] ||
2431 mlxsw_sp->ports[base_port + 3]) {
2432 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2433 return -EINVAL;
2434 }
2435 }
2436
2437 for (i = 0; i < count; i++)
2438 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2439
Ido Schimmelbe945352016-06-09 09:51:39 +02002440 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2441 if (err) {
2442 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2443 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002444 }
2445
2446 return 0;
2447
Ido Schimmelbe945352016-06-09 09:51:39 +02002448err_port_split_create:
2449 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002450 return err;
2451}
2452
Jiri Pirkob2f10572016-04-08 19:11:23 +02002453static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002454{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002455 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002456 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002457 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002458 unsigned int count;
2459 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002460
2461 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2462 if (!mlxsw_sp_port) {
2463 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2464 local_port);
2465 return -EINVAL;
2466 }
2467
2468 if (!mlxsw_sp_port->split) {
2469 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2470 return -EINVAL;
2471 }
2472
Ido Schimmeld664b412016-06-09 09:51:40 +02002473 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002474 count = cur_width == 1 ? 4 : 2;
2475
2476 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2477
2478 /* Determine which ports to remove. */
2479 if (count == 2 && local_port >= base_port + 2)
2480 base_port = base_port + 2;
2481
2482 for (i = 0; i < count; i++)
2483 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2484
Ido Schimmelbe945352016-06-09 09:51:39 +02002485 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002486
2487 return 0;
2488}
2489
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002490static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2491 char *pude_pl, void *priv)
2492{
2493 struct mlxsw_sp *mlxsw_sp = priv;
2494 struct mlxsw_sp_port *mlxsw_sp_port;
2495 enum mlxsw_reg_pude_oper_status status;
2496 u8 local_port;
2497
2498 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2499 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002500 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002501 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002502
2503 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2504 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2505 netdev_info(mlxsw_sp_port->dev, "link up\n");
2506 netif_carrier_on(mlxsw_sp_port->dev);
2507 } else {
2508 netdev_info(mlxsw_sp_port->dev, "link down\n");
2509 netif_carrier_off(mlxsw_sp_port->dev);
2510 }
2511}
2512
2513static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2514 .func = mlxsw_sp_pude_event_func,
2515 .trap_id = MLXSW_TRAP_ID_PUDE,
2516};
2517
2518static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2519 enum mlxsw_event_trap_id trap_id)
2520{
2521 struct mlxsw_event_listener *el;
2522 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2523 int err;
2524
2525 switch (trap_id) {
2526 case MLXSW_TRAP_ID_PUDE:
2527 el = &mlxsw_sp_pude_event;
2528 break;
2529 }
2530 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2531 if (err)
2532 return err;
2533
2534 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2535 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2536 if (err)
2537 goto err_event_trap_set;
2538
2539 return 0;
2540
2541err_event_trap_set:
2542 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2543 return err;
2544}
2545
2546static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2547 enum mlxsw_event_trap_id trap_id)
2548{
2549 struct mlxsw_event_listener *el;
2550
2551 switch (trap_id) {
2552 case MLXSW_TRAP_ID_PUDE:
2553 el = &mlxsw_sp_pude_event;
2554 break;
2555 }
2556 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2557}
2558
2559static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2560 void *priv)
2561{
2562 struct mlxsw_sp *mlxsw_sp = priv;
2563 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2564 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2565
2566 if (unlikely(!mlxsw_sp_port)) {
2567 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2568 local_port);
2569 return;
2570 }
2571
2572 skb->dev = mlxsw_sp_port->dev;
2573
2574 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2575 u64_stats_update_begin(&pcpu_stats->syncp);
2576 pcpu_stats->rx_packets++;
2577 pcpu_stats->rx_bytes += skb->len;
2578 u64_stats_update_end(&pcpu_stats->syncp);
2579
2580 skb->protocol = eth_type_trans(skb, skb->dev);
2581 netif_receive_skb(skb);
2582}
2583
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002584static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2585 void *priv)
2586{
2587 skb->offload_fwd_mark = 1;
2588 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2589}
2590
Ido Schimmel63a81142016-08-25 18:42:39 +02002591#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2592 { \
2593 .func = _func, \
2594 .local_port = MLXSW_PORT_DONT_CARE, \
2595 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2596 .action = MLXSW_REG_HPKT_ACTION_##_action, \
Ido Schimmel93393b32016-08-25 18:42:38 +02002597 }
2598
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002599static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
Ido Schimmel63a81142016-08-25 18:42:39 +02002600 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002601 /* Traps for specific L2 packet types, not trapped as FDB MC */
Ido Schimmel63a81142016-08-25 18:42:39 +02002602 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2603 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2604 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2605 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2606 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2607 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2608 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002609 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2610 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002611 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2612 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2613 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2614 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002615 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2616 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
Ido Schimmel93393b32016-08-25 18:42:38 +02002617 /* L3 traps */
Ido Schimmel63a81142016-08-25 18:42:39 +02002618 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2619 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2620 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002621 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002622 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2623 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2624 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002625};
2626
2627static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2628{
2629 char htgt_pl[MLXSW_REG_HTGT_LEN];
2630 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2631 int i;
2632 int err;
2633
2634 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2635 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2636 if (err)
2637 return err;
2638
2639 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2640 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2641 if (err)
2642 return err;
2643
2644 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2645 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2646 &mlxsw_sp_rx_listener[i],
2647 mlxsw_sp);
2648 if (err)
2649 goto err_rx_listener_register;
2650
Ido Schimmel63a81142016-08-25 18:42:39 +02002651 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002652 mlxsw_sp_rx_listener[i].trap_id);
2653 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2654 if (err)
2655 goto err_rx_trap_set;
2656 }
2657 return 0;
2658
2659err_rx_trap_set:
2660 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2661 &mlxsw_sp_rx_listener[i],
2662 mlxsw_sp);
2663err_rx_listener_register:
2664 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002665 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002666 mlxsw_sp_rx_listener[i].trap_id);
2667 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2668
2669 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2670 &mlxsw_sp_rx_listener[i],
2671 mlxsw_sp);
2672 }
2673 return err;
2674}
2675
2676static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2677{
2678 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2679 int i;
2680
2681 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002682 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002683 mlxsw_sp_rx_listener[i].trap_id);
2684 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2685
2686 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2687 &mlxsw_sp_rx_listener[i],
2688 mlxsw_sp);
2689 }
2690}
2691
2692static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2693 enum mlxsw_reg_sfgc_type type,
2694 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2695{
2696 enum mlxsw_flood_table_type table_type;
2697 enum mlxsw_sp_flood_table flood_table;
2698 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2699
Ido Schimmel19ae6122015-12-15 16:03:39 +01002700 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002701 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002702 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002703 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002704
2705 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2706 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2707 else
2708 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002709
2710 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2711 flood_table);
2712 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2713}
2714
2715static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2716{
2717 int type, err;
2718
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002719 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2720 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2721 continue;
2722
2723 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2724 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2725 if (err)
2726 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002727
2728 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2729 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2730 if (err)
2731 return err;
2732 }
2733
2734 return 0;
2735}
2736
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002737static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2738{
2739 char slcr_pl[MLXSW_REG_SLCR_LEN];
2740
2741 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2742 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2743 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2744 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2745 MLXSW_REG_SLCR_LAG_HASH_SIP |
2746 MLXSW_REG_SLCR_LAG_HASH_DIP |
2747 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2748 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2749 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2750 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2751}
2752
Jiri Pirkob2f10572016-04-08 19:11:23 +02002753static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002754 const struct mlxsw_bus_info *mlxsw_bus_info)
2755{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002756 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002757 int err;
2758
2759 mlxsw_sp->core = mlxsw_core;
2760 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002761 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002762 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002763 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002764
2765 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2766 if (err) {
2767 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2768 return err;
2769 }
2770
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002771 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2772 if (err) {
2773 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002774 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002775 }
2776
2777 err = mlxsw_sp_traps_init(mlxsw_sp);
2778 if (err) {
2779 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2780 goto err_rx_listener_register;
2781 }
2782
2783 err = mlxsw_sp_flood_init(mlxsw_sp);
2784 if (err) {
2785 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2786 goto err_flood_init;
2787 }
2788
2789 err = mlxsw_sp_buffers_init(mlxsw_sp);
2790 if (err) {
2791 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2792 goto err_buffers_init;
2793 }
2794
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002795 err = mlxsw_sp_lag_init(mlxsw_sp);
2796 if (err) {
2797 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2798 goto err_lag_init;
2799 }
2800
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002801 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2802 if (err) {
2803 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2804 goto err_switchdev_init;
2805 }
2806
Ido Schimmel464dce12016-07-02 11:00:15 +02002807 err = mlxsw_sp_router_init(mlxsw_sp);
2808 if (err) {
2809 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2810 goto err_router_init;
2811 }
2812
Yotam Gigi763b4b72016-07-21 12:03:17 +02002813 err = mlxsw_sp_span_init(mlxsw_sp);
2814 if (err) {
2815 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2816 goto err_span_init;
2817 }
2818
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002819 err = mlxsw_sp_ports_create(mlxsw_sp);
2820 if (err) {
2821 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2822 goto err_ports_create;
2823 }
2824
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002825 return 0;
2826
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002827err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02002828 mlxsw_sp_span_fini(mlxsw_sp);
2829err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02002830 mlxsw_sp_router_fini(mlxsw_sp);
2831err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002832 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002833err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002834err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02002835 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002836err_buffers_init:
2837err_flood_init:
2838 mlxsw_sp_traps_fini(mlxsw_sp);
2839err_rx_listener_register:
2840 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002841 return err;
2842}
2843
Jiri Pirkob2f10572016-04-08 19:11:23 +02002844static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002845{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002846 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002847 int i;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002848
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002849 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002850 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02002851 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002852 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02002853 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002854 mlxsw_sp_traps_fini(mlxsw_sp);
2855 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002856 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02002857 WARN_ON(!list_empty(&mlxsw_sp->fids));
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002858 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2859 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002860}
2861
2862static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2863 .used_max_vepa_channels = 1,
2864 .max_vepa_channels = 0,
2865 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002866 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002867 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002868 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002869 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01002870 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002871 .used_max_pgt = 1,
2872 .max_pgt = 0,
2873 .used_max_system_port = 1,
2874 .max_system_port = 64,
2875 .used_max_vlan_groups = 1,
2876 .max_vlan_groups = 127,
2877 .used_max_regions = 1,
2878 .max_regions = 400,
2879 .used_flood_tables = 1,
2880 .used_flood_mode = 1,
2881 .flood_mode = 3,
2882 .max_fid_offset_flood_tables = 2,
2883 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01002884 .max_fid_flood_tables = 2,
2885 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002886 .used_max_ib_mc = 1,
2887 .max_ib_mc = 0,
2888 .used_max_pkey = 1,
2889 .max_pkey = 0,
Jiri Pirkoc6022422016-07-05 11:27:46 +02002890 .used_kvd_sizes = 1,
2891 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2892 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2893 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002894 .swid_config = {
2895 {
2896 .used_type = 1,
2897 .type = MLXSW_PORT_SWID_TYPE_ETH,
2898 }
2899 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02002900 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002901};
2902
2903static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02002904 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2905 .owner = THIS_MODULE,
2906 .priv_size = sizeof(struct mlxsw_sp),
2907 .init = mlxsw_sp_init,
2908 .fini = mlxsw_sp_fini,
2909 .port_split = mlxsw_sp_port_split,
2910 .port_unsplit = mlxsw_sp_port_unsplit,
2911 .sb_pool_get = mlxsw_sp_sb_pool_get,
2912 .sb_pool_set = mlxsw_sp_sb_pool_set,
2913 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2914 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2915 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2916 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2917 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2918 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2919 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2920 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2921 .txhdr_construct = mlxsw_sp_txhdr_construct,
2922 .txhdr_len = MLXSW_TXHDR_LEN,
2923 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002924};
2925
Jiri Pirko7ce856a2016-07-04 08:23:12 +02002926static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2927{
2928 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2929}
2930
2931static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2932{
2933 struct net_device *lower_dev;
2934 struct list_head *iter;
2935
2936 if (mlxsw_sp_port_dev_check(dev))
2937 return netdev_priv(dev);
2938
2939 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
2940 if (mlxsw_sp_port_dev_check(lower_dev))
2941 return netdev_priv(lower_dev);
2942 }
2943 return NULL;
2944}
2945
2946static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
2947{
2948 struct mlxsw_sp_port *mlxsw_sp_port;
2949
2950 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
2951 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
2952}
2953
2954static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
2955{
2956 struct net_device *lower_dev;
2957 struct list_head *iter;
2958
2959 if (mlxsw_sp_port_dev_check(dev))
2960 return netdev_priv(dev);
2961
2962 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
2963 if (mlxsw_sp_port_dev_check(lower_dev))
2964 return netdev_priv(lower_dev);
2965 }
2966 return NULL;
2967}
2968
2969struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
2970{
2971 struct mlxsw_sp_port *mlxsw_sp_port;
2972
2973 rcu_read_lock();
2974 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
2975 if (mlxsw_sp_port)
2976 dev_hold(mlxsw_sp_port->dev);
2977 rcu_read_unlock();
2978 return mlxsw_sp_port;
2979}
2980
2981void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
2982{
2983 dev_put(mlxsw_sp_port->dev);
2984}
2985
Ido Schimmel99724c12016-07-04 08:23:14 +02002986static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
2987 unsigned long event)
2988{
2989 switch (event) {
2990 case NETDEV_UP:
2991 if (!r)
2992 return true;
2993 r->ref_count++;
2994 return false;
2995 case NETDEV_DOWN:
2996 if (r && --r->ref_count == 0)
2997 return true;
2998 /* It is possible we already removed the RIF ourselves
2999 * if it was assigned to a netdev that is now a bridge
3000 * or LAG slave.
3001 */
3002 return false;
3003 }
3004
3005 return false;
3006}
3007
3008static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3009{
3010 int i;
3011
3012 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3013 if (!mlxsw_sp->rifs[i])
3014 return i;
3015
3016 return MLXSW_SP_RIF_MAX;
3017}
3018
3019static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3020 bool *p_lagged, u16 *p_system_port)
3021{
3022 u8 local_port = mlxsw_sp_vport->local_port;
3023
3024 *p_lagged = mlxsw_sp_vport->lagged;
3025 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3026}
3027
3028static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3029 struct net_device *l3_dev, u16 rif,
3030 bool create)
3031{
3032 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3033 bool lagged = mlxsw_sp_vport->lagged;
3034 char ritr_pl[MLXSW_REG_RITR_LEN];
3035 u16 system_port;
3036
3037 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3038 l3_dev->mtu, l3_dev->dev_addr);
3039
3040 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3041 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3042 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3043
3044 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3045}
3046
3047static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3048
3049static struct mlxsw_sp_fid *
3050mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3051{
3052 struct mlxsw_sp_fid *f;
3053
3054 f = kzalloc(sizeof(*f), GFP_KERNEL);
3055 if (!f)
3056 return NULL;
3057
3058 f->leave = mlxsw_sp_vport_rif_sp_leave;
3059 f->ref_count = 0;
3060 f->dev = l3_dev;
3061 f->fid = fid;
3062
3063 return f;
3064}
3065
3066static struct mlxsw_sp_rif *
3067mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3068{
3069 struct mlxsw_sp_rif *r;
3070
3071 r = kzalloc(sizeof(*r), GFP_KERNEL);
3072 if (!r)
3073 return NULL;
3074
3075 ether_addr_copy(r->addr, l3_dev->dev_addr);
3076 r->mtu = l3_dev->mtu;
3077 r->ref_count = 1;
3078 r->dev = l3_dev;
3079 r->rif = rif;
3080 r->f = f;
3081
3082 return r;
3083}
3084
3085static struct mlxsw_sp_rif *
3086mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3087 struct net_device *l3_dev)
3088{
3089 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3090 struct mlxsw_sp_fid *f;
3091 struct mlxsw_sp_rif *r;
3092 u16 fid, rif;
3093 int err;
3094
3095 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3096 if (rif == MLXSW_SP_RIF_MAX)
3097 return ERR_PTR(-ERANGE);
3098
3099 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3100 if (err)
3101 return ERR_PTR(err);
3102
3103 fid = mlxsw_sp_rif_sp_to_fid(rif);
3104 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3105 if (err)
3106 goto err_rif_fdb_op;
3107
3108 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3109 if (!f) {
3110 err = -ENOMEM;
3111 goto err_rfid_alloc;
3112 }
3113
3114 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3115 if (!r) {
3116 err = -ENOMEM;
3117 goto err_rif_alloc;
3118 }
3119
3120 f->r = r;
3121 mlxsw_sp->rifs[rif] = r;
3122
3123 return r;
3124
3125err_rif_alloc:
3126 kfree(f);
3127err_rfid_alloc:
3128 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3129err_rif_fdb_op:
3130 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3131 return ERR_PTR(err);
3132}
3133
3134static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3135 struct mlxsw_sp_rif *r)
3136{
3137 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3138 struct net_device *l3_dev = r->dev;
3139 struct mlxsw_sp_fid *f = r->f;
3140 u16 fid = f->fid;
3141 u16 rif = r->rif;
3142
3143 mlxsw_sp->rifs[rif] = NULL;
3144 f->r = NULL;
3145
3146 kfree(r);
3147
3148 kfree(f);
3149
3150 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3151
3152 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3153}
3154
3155static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3156 struct net_device *l3_dev)
3157{
3158 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3159 struct mlxsw_sp_rif *r;
3160
3161 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3162 if (!r) {
3163 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3164 if (IS_ERR(r))
3165 return PTR_ERR(r);
3166 }
3167
3168 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3169 r->f->ref_count++;
3170
3171 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3172
3173 return 0;
3174}
3175
3176static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3177{
3178 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3179
3180 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3181
3182 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3183 if (--f->ref_count == 0)
3184 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3185}
3186
3187static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3188 struct net_device *port_dev,
3189 unsigned long event, u16 vid)
3190{
3191 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3192 struct mlxsw_sp_port *mlxsw_sp_vport;
3193
3194 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3195 if (WARN_ON(!mlxsw_sp_vport))
3196 return -EINVAL;
3197
3198 switch (event) {
3199 case NETDEV_UP:
3200 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3201 case NETDEV_DOWN:
3202 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3203 break;
3204 }
3205
3206 return 0;
3207}
3208
3209static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3210 unsigned long event)
3211{
3212 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3213 return 0;
3214
3215 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3216}
3217
3218static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3219 struct net_device *lag_dev,
3220 unsigned long event, u16 vid)
3221{
3222 struct net_device *port_dev;
3223 struct list_head *iter;
3224 int err;
3225
3226 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3227 if (mlxsw_sp_port_dev_check(port_dev)) {
3228 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3229 event, vid);
3230 if (err)
3231 return err;
3232 }
3233 }
3234
3235 return 0;
3236}
3237
3238static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3239 unsigned long event)
3240{
3241 if (netif_is_bridge_port(lag_dev))
3242 return 0;
3243
3244 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3245}
3246
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003247static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3248 struct net_device *l3_dev)
3249{
3250 u16 fid;
3251
3252 if (is_vlan_dev(l3_dev))
3253 fid = vlan_dev_vlan_id(l3_dev);
3254 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3255 fid = 1;
3256 else
3257 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3258
3259 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3260}
3261
Ido Schimmelf888f582016-08-24 11:18:51 +02003262static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3263{
3264 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3265 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3266}
3267
3268static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3269{
3270 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3271}
3272
3273static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3274 bool set)
3275{
3276 enum mlxsw_flood_table_type table_type;
3277 char *sftr_pl;
3278 u16 index;
3279 int err;
3280
3281 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3282 if (!sftr_pl)
3283 return -ENOMEM;
3284
3285 table_type = mlxsw_sp_flood_table_type_get(fid);
3286 index = mlxsw_sp_flood_table_index_get(fid);
3287 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3288 1, MLXSW_PORT_ROUTER_PORT, set);
3289 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3290
3291 kfree(sftr_pl);
3292 return err;
3293}
3294
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003295static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3296{
3297 if (mlxsw_sp_fid_is_vfid(fid))
3298 return MLXSW_REG_RITR_FID_IF;
3299 else
3300 return MLXSW_REG_RITR_VLAN_IF;
3301}
3302
3303static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3304 struct net_device *l3_dev,
3305 u16 fid, u16 rif,
3306 bool create)
3307{
3308 enum mlxsw_reg_ritr_if_type rif_type;
3309 char ritr_pl[MLXSW_REG_RITR_LEN];
3310
3311 rif_type = mlxsw_sp_rif_type_get(fid);
3312 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3313 l3_dev->dev_addr);
3314 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3315
3316 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3317}
3318
3319static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3320 struct net_device *l3_dev,
3321 struct mlxsw_sp_fid *f)
3322{
3323 struct mlxsw_sp_rif *r;
3324 u16 rif;
3325 int err;
3326
3327 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3328 if (rif == MLXSW_SP_RIF_MAX)
3329 return -ERANGE;
3330
Ido Schimmelf888f582016-08-24 11:18:51 +02003331 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003332 if (err)
3333 return err;
3334
Ido Schimmelf888f582016-08-24 11:18:51 +02003335 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3336 if (err)
3337 goto err_rif_bridge_op;
3338
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003339 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3340 if (err)
3341 goto err_rif_fdb_op;
3342
3343 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3344 if (!r) {
3345 err = -ENOMEM;
3346 goto err_rif_alloc;
3347 }
3348
3349 f->r = r;
3350 mlxsw_sp->rifs[rif] = r;
3351
3352 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3353
3354 return 0;
3355
3356err_rif_alloc:
3357 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3358err_rif_fdb_op:
3359 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003360err_rif_bridge_op:
3361 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003362 return err;
3363}
3364
3365void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3366 struct mlxsw_sp_rif *r)
3367{
3368 struct net_device *l3_dev = r->dev;
3369 struct mlxsw_sp_fid *f = r->f;
3370 u16 rif = r->rif;
3371
3372 mlxsw_sp->rifs[rif] = NULL;
3373 f->r = NULL;
3374
3375 kfree(r);
3376
3377 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3378
3379 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3380
Ido Schimmelf888f582016-08-24 11:18:51 +02003381 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3382
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003383 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3384}
3385
3386static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3387 struct net_device *br_dev,
3388 unsigned long event)
3389{
3390 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3391 struct mlxsw_sp_fid *f;
3392
3393 /* FID can either be an actual FID if the L3 device is the
3394 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3395 * L3 device is a VLAN-unaware bridge and we get a vFID.
3396 */
3397 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3398 if (WARN_ON(!f))
3399 return -EINVAL;
3400
3401 switch (event) {
3402 case NETDEV_UP:
3403 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3404 case NETDEV_DOWN:
3405 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3406 break;
3407 }
3408
3409 return 0;
3410}
3411
Ido Schimmel99724c12016-07-04 08:23:14 +02003412static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3413 unsigned long event)
3414{
3415 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003416 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003417 u16 vid = vlan_dev_vlan_id(vlan_dev);
3418
3419 if (mlxsw_sp_port_dev_check(real_dev))
3420 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3421 vid);
3422 else if (netif_is_lag_master(real_dev))
3423 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3424 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003425 else if (netif_is_bridge_master(real_dev) &&
3426 mlxsw_sp->master_bridge.dev == real_dev)
3427 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3428 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003429
3430 return 0;
3431}
3432
3433static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3434 unsigned long event, void *ptr)
3435{
3436 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3437 struct net_device *dev = ifa->ifa_dev->dev;
3438 struct mlxsw_sp *mlxsw_sp;
3439 struct mlxsw_sp_rif *r;
3440 int err = 0;
3441
3442 mlxsw_sp = mlxsw_sp_lower_get(dev);
3443 if (!mlxsw_sp)
3444 goto out;
3445
3446 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3447 if (!mlxsw_sp_rif_should_config(r, event))
3448 goto out;
3449
3450 if (mlxsw_sp_port_dev_check(dev))
3451 err = mlxsw_sp_inetaddr_port_event(dev, event);
3452 else if (netif_is_lag_master(dev))
3453 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003454 else if (netif_is_bridge_master(dev))
3455 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003456 else if (is_vlan_dev(dev))
3457 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3458
3459out:
3460 return notifier_from_errno(err);
3461}
3462
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003463static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3464 const char *mac, int mtu)
3465{
3466 char ritr_pl[MLXSW_REG_RITR_LEN];
3467 int err;
3468
3469 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3470 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3471 if (err)
3472 return err;
3473
3474 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3475 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3476 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3477 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3478}
3479
3480static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3481{
3482 struct mlxsw_sp *mlxsw_sp;
3483 struct mlxsw_sp_rif *r;
3484 int err;
3485
3486 mlxsw_sp = mlxsw_sp_lower_get(dev);
3487 if (!mlxsw_sp)
3488 return 0;
3489
3490 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3491 if (!r)
3492 return 0;
3493
3494 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3495 if (err)
3496 return err;
3497
3498 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3499 if (err)
3500 goto err_rif_edit;
3501
3502 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3503 if (err)
3504 goto err_rif_fdb_op;
3505
3506 ether_addr_copy(r->addr, dev->dev_addr);
3507 r->mtu = dev->mtu;
3508
3509 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3510
3511 return 0;
3512
3513err_rif_fdb_op:
3514 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3515err_rif_edit:
3516 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3517 return err;
3518}
3519
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003520static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3521 u16 fid)
3522{
3523 if (mlxsw_sp_fid_is_vfid(fid))
3524 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3525 else
3526 return test_bit(fid, lag_port->active_vlans);
3527}
3528
3529static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3530 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003531{
3532 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003533 u8 local_port = mlxsw_sp_port->local_port;
3534 u16 lag_id = mlxsw_sp_port->lag_id;
3535 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003536
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003537 if (!mlxsw_sp_port->lagged)
3538 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003539
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003540 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3541 struct mlxsw_sp_port *lag_port;
3542
3543 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3544 if (!lag_port || lag_port->local_port == local_port)
3545 continue;
3546 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3547 count++;
3548 }
3549
3550 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003551}
3552
3553static int
3554mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3555 u16 fid)
3556{
3557 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3558 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3559
3560 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3561 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3562 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3563 mlxsw_sp_port->local_port);
3564
Ido Schimmel22305372016-06-20 23:04:21 +02003565 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3566 mlxsw_sp_port->local_port, fid);
3567
Ido Schimmel039c49a2016-01-27 15:20:18 +01003568 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3569}
3570
3571static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003572mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3573 u16 fid)
3574{
3575 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3576 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3577
3578 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3579 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3580 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3581
Ido Schimmel22305372016-06-20 23:04:21 +02003582 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3583 mlxsw_sp_port->lag_id, fid);
3584
Ido Schimmel039c49a2016-01-27 15:20:18 +01003585 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3586}
3587
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003588int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003589{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003590 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3591 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003592
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003593 if (mlxsw_sp_port->lagged)
3594 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003595 fid);
3596 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003597 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003598}
3599
Ido Schimmel701b1862016-07-04 08:23:16 +02003600static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3601{
3602 struct mlxsw_sp_fid *f, *tmp;
3603
3604 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3605 if (--f->ref_count == 0)
3606 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3607 else
3608 WARN_ON_ONCE(1);
3609}
3610
Ido Schimmel7117a572016-06-20 23:04:06 +02003611static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3612 struct net_device *br_dev)
3613{
3614 return !mlxsw_sp->master_bridge.dev ||
3615 mlxsw_sp->master_bridge.dev == br_dev;
3616}
3617
3618static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3619 struct net_device *br_dev)
3620{
3621 mlxsw_sp->master_bridge.dev = br_dev;
3622 mlxsw_sp->master_bridge.ref_count++;
3623}
3624
3625static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3626{
Ido Schimmel701b1862016-07-04 08:23:16 +02003627 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003628 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003629 /* It's possible upper VLAN devices are still holding
3630 * references to underlying FIDs. Drop the reference
3631 * and release the resources if it was the last one.
3632 * If it wasn't, then something bad happened.
3633 */
3634 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3635 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003636}
3637
3638static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3639 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003640{
3641 struct net_device *dev = mlxsw_sp_port->dev;
3642 int err;
3643
3644 /* When port is not bridged untagged packets are tagged with
3645 * PVID=VID=1, thereby creating an implicit VLAN interface in
3646 * the device. Remove it and let bridge code take care of its
3647 * own VLANs.
3648 */
3649 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003650 if (err)
3651 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003652
Ido Schimmel7117a572016-06-20 23:04:06 +02003653 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3654
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003655 mlxsw_sp_port->learning = 1;
3656 mlxsw_sp_port->learning_sync = 1;
3657 mlxsw_sp_port->uc_flood = 1;
3658 mlxsw_sp_port->bridged = 1;
3659
3660 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003661}
3662
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003663static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003664{
3665 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003666
Ido Schimmel28a01d22016-02-18 11:30:02 +01003667 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3668
Ido Schimmel7117a572016-06-20 23:04:06 +02003669 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3670
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003671 mlxsw_sp_port->learning = 0;
3672 mlxsw_sp_port->learning_sync = 0;
3673 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003674 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003675
3676 /* Add implicit VLAN interface in the device, so that untagged
3677 * packets will be classified to the default vFID.
3678 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003679 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003680}
3681
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003682static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003683{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003684 char sldr_pl[MLXSW_REG_SLDR_LEN];
3685
3686 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3687 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3688}
3689
3690static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3691{
3692 char sldr_pl[MLXSW_REG_SLDR_LEN];
3693
3694 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3695 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3696}
3697
3698static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3699 u16 lag_id, u8 port_index)
3700{
3701 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3702 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3703
3704 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3705 lag_id, port_index);
3706 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3707}
3708
3709static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3710 u16 lag_id)
3711{
3712 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3713 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3714
3715 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3716 lag_id);
3717 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3718}
3719
3720static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3721 u16 lag_id)
3722{
3723 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3724 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3725
3726 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3727 lag_id);
3728 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3729}
3730
3731static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3732 u16 lag_id)
3733{
3734 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3735 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3736
3737 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3738 lag_id);
3739 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3740}
3741
3742static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3743 struct net_device *lag_dev,
3744 u16 *p_lag_id)
3745{
3746 struct mlxsw_sp_upper *lag;
3747 int free_lag_id = -1;
3748 int i;
3749
3750 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3751 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3752 if (lag->ref_count) {
3753 if (lag->dev == lag_dev) {
3754 *p_lag_id = i;
3755 return 0;
3756 }
3757 } else if (free_lag_id < 0) {
3758 free_lag_id = i;
3759 }
3760 }
3761 if (free_lag_id < 0)
3762 return -EBUSY;
3763 *p_lag_id = free_lag_id;
3764 return 0;
3765}
3766
3767static bool
3768mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3769 struct net_device *lag_dev,
3770 struct netdev_lag_upper_info *lag_upper_info)
3771{
3772 u16 lag_id;
3773
3774 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3775 return false;
3776 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3777 return false;
3778 return true;
3779}
3780
3781static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3782 u16 lag_id, u8 *p_port_index)
3783{
3784 int i;
3785
3786 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3787 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3788 *p_port_index = i;
3789 return 0;
3790 }
3791 }
3792 return -EBUSY;
3793}
3794
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003795static void
3796mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3797 u16 lag_id)
3798{
3799 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003800 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003801
3802 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3803 if (WARN_ON(!mlxsw_sp_vport))
3804 return;
3805
Ido Schimmel11943ff2016-07-02 11:00:12 +02003806 /* If vPort is assigned a RIF, then leave it since it's no
3807 * longer valid.
3808 */
3809 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3810 if (f)
3811 f->leave(mlxsw_sp_vport);
3812
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003813 mlxsw_sp_vport->lag_id = lag_id;
3814 mlxsw_sp_vport->lagged = 1;
3815}
3816
3817static void
3818mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3819{
3820 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003821 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003822
3823 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3824 if (WARN_ON(!mlxsw_sp_vport))
3825 return;
3826
Ido Schimmel11943ff2016-07-02 11:00:12 +02003827 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3828 if (f)
3829 f->leave(mlxsw_sp_vport);
3830
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003831 mlxsw_sp_vport->lagged = 0;
3832}
3833
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003834static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3835 struct net_device *lag_dev)
3836{
3837 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3838 struct mlxsw_sp_upper *lag;
3839 u16 lag_id;
3840 u8 port_index;
3841 int err;
3842
3843 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3844 if (err)
3845 return err;
3846 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3847 if (!lag->ref_count) {
3848 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3849 if (err)
3850 return err;
3851 lag->dev = lag_dev;
3852 }
3853
3854 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3855 if (err)
3856 return err;
3857 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3858 if (err)
3859 goto err_col_port_add;
3860 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3861 if (err)
3862 goto err_col_port_enable;
3863
3864 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3865 mlxsw_sp_port->local_port);
3866 mlxsw_sp_port->lag_id = lag_id;
3867 mlxsw_sp_port->lagged = 1;
3868 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003869
3870 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3871
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003872 return 0;
3873
Ido Schimmel51554db2016-05-06 22:18:39 +02003874err_col_port_enable:
3875 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003876err_col_port_add:
3877 if (!lag->ref_count)
3878 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003879 return err;
3880}
3881
Ido Schimmel82e6db02016-06-20 23:04:04 +02003882static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3883 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003884{
3885 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003886 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02003887 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003888
3889 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003890 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003891 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3892 WARN_ON(lag->ref_count == 0);
3893
Ido Schimmel82e6db02016-06-20 23:04:04 +02003894 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3895 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003896
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003897 if (mlxsw_sp_port->bridged) {
3898 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003899 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003900 }
3901
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003902 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003903 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003904
3905 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3906 mlxsw_sp_port->local_port);
3907 mlxsw_sp_port->lagged = 0;
3908 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003909
3910 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003911}
3912
Jiri Pirko74581202015-12-03 12:12:30 +01003913static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3914 u16 lag_id)
3915{
3916 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3917 char sldr_pl[MLXSW_REG_SLDR_LEN];
3918
3919 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3920 mlxsw_sp_port->local_port);
3921 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3922}
3923
3924static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3925 u16 lag_id)
3926{
3927 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3928 char sldr_pl[MLXSW_REG_SLDR_LEN];
3929
3930 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3931 mlxsw_sp_port->local_port);
3932 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3933}
3934
3935static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3936 bool lag_tx_enabled)
3937{
3938 if (lag_tx_enabled)
3939 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3940 mlxsw_sp_port->lag_id);
3941 else
3942 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3943 mlxsw_sp_port->lag_id);
3944}
3945
3946static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3947 struct netdev_lag_lower_state_info *info)
3948{
3949 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3950}
3951
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003952static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3953 struct net_device *vlan_dev)
3954{
3955 struct mlxsw_sp_port *mlxsw_sp_vport;
3956 u16 vid = vlan_dev_vlan_id(vlan_dev);
3957
3958 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003959 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003960 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003961
3962 mlxsw_sp_vport->dev = vlan_dev;
3963
3964 return 0;
3965}
3966
Ido Schimmel82e6db02016-06-20 23:04:04 +02003967static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
3968 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003969{
3970 struct mlxsw_sp_port *mlxsw_sp_vport;
3971 u16 vid = vlan_dev_vlan_id(vlan_dev);
3972
3973 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003974 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02003975 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003976
3977 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003978}
3979
Jiri Pirko74581202015-12-03 12:12:30 +01003980static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
3981 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003982{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003983 struct netdev_notifier_changeupper_info *info;
3984 struct mlxsw_sp_port *mlxsw_sp_port;
3985 struct net_device *upper_dev;
3986 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02003987 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003988
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003989 mlxsw_sp_port = netdev_priv(dev);
3990 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3991 info = ptr;
3992
3993 switch (event) {
3994 case NETDEV_PRECHANGEUPPER:
3995 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02003996 if (!is_vlan_dev(upper_dev) &&
3997 !netif_is_lag_master(upper_dev) &&
3998 !netif_is_bridge_master(upper_dev))
3999 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004000 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004001 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004002 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004003 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004004 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004005 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004006 if (netif_is_lag_master(upper_dev) &&
4007 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4008 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004009 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004010 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4011 return -EINVAL;
4012 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4013 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4014 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004015 break;
4016 case NETDEV_CHANGEUPPER:
4017 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004018 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004019 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004020 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4021 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004022 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004023 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4024 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004025 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004026 if (info->linking)
4027 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4028 upper_dev);
4029 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004030 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004031 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004032 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004033 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4034 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004035 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004036 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4037 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004038 } else {
4039 err = -EINVAL;
4040 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004041 }
4042 break;
4043 }
4044
Ido Schimmel80bedf12016-06-20 23:03:59 +02004045 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004046}
4047
Jiri Pirko74581202015-12-03 12:12:30 +01004048static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4049 unsigned long event, void *ptr)
4050{
4051 struct netdev_notifier_changelowerstate_info *info;
4052 struct mlxsw_sp_port *mlxsw_sp_port;
4053 int err;
4054
4055 mlxsw_sp_port = netdev_priv(dev);
4056 info = ptr;
4057
4058 switch (event) {
4059 case NETDEV_CHANGELOWERSTATE:
4060 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4061 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4062 info->lower_state_info);
4063 if (err)
4064 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4065 }
4066 break;
4067 }
4068
Ido Schimmel80bedf12016-06-20 23:03:59 +02004069 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004070}
4071
4072static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4073 unsigned long event, void *ptr)
4074{
4075 switch (event) {
4076 case NETDEV_PRECHANGEUPPER:
4077 case NETDEV_CHANGEUPPER:
4078 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4079 case NETDEV_CHANGELOWERSTATE:
4080 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4081 }
4082
Ido Schimmel80bedf12016-06-20 23:03:59 +02004083 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004084}
4085
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004086static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4087 unsigned long event, void *ptr)
4088{
4089 struct net_device *dev;
4090 struct list_head *iter;
4091 int ret;
4092
4093 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4094 if (mlxsw_sp_port_dev_check(dev)) {
4095 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004096 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004097 return ret;
4098 }
4099 }
4100
Ido Schimmel80bedf12016-06-20 23:03:59 +02004101 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004102}
4103
Ido Schimmel701b1862016-07-04 08:23:16 +02004104static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4105 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004106{
Ido Schimmel701b1862016-07-04 08:23:16 +02004107 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004108 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004109
Ido Schimmel701b1862016-07-04 08:23:16 +02004110 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4111 if (!f) {
4112 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4113 if (IS_ERR(f))
4114 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004115 }
4116
Ido Schimmel701b1862016-07-04 08:23:16 +02004117 f->ref_count++;
4118
4119 return 0;
4120}
4121
4122static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4123 struct net_device *vlan_dev)
4124{
4125 u16 fid = vlan_dev_vlan_id(vlan_dev);
4126 struct mlxsw_sp_fid *f;
4127
4128 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004129 if (f && f->r)
4130 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004131 if (f && --f->ref_count == 0)
4132 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4133}
4134
4135static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4136 unsigned long event, void *ptr)
4137{
4138 struct netdev_notifier_changeupper_info *info;
4139 struct net_device *upper_dev;
4140 struct mlxsw_sp *mlxsw_sp;
4141 int err;
4142
4143 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4144 if (!mlxsw_sp)
4145 return 0;
4146 if (br_dev != mlxsw_sp->master_bridge.dev)
4147 return 0;
4148
4149 info = ptr;
4150
4151 switch (event) {
4152 case NETDEV_CHANGEUPPER:
4153 upper_dev = info->upper_dev;
4154 if (!is_vlan_dev(upper_dev))
4155 break;
4156 if (info->linking) {
4157 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4158 upper_dev);
4159 if (err)
4160 return err;
4161 } else {
4162 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4163 }
4164 break;
4165 }
4166
4167 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004168}
4169
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004170static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004171{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004172 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004173 MLXSW_SP_VFID_MAX);
4174}
4175
4176static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4177{
4178 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4179
4180 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4181 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004182}
4183
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004184static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004185
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004186static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4187 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004188{
4189 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004190 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004191 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004192 int err;
4193
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004194 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004195 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004196 dev_err(dev, "No available vFIDs\n");
4197 return ERR_PTR(-ERANGE);
4198 }
4199
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004200 fid = mlxsw_sp_vfid_to_fid(vfid);
4201 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004202 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004203 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004204 return ERR_PTR(err);
4205 }
4206
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004207 f = kzalloc(sizeof(*f), GFP_KERNEL);
4208 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004209 goto err_allocate_vfid;
4210
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004211 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004212 f->fid = fid;
4213 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004214
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004215 list_add(&f->list, &mlxsw_sp->vfids.list);
4216 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004217
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004218 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004219
4220err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004221 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004222 return ERR_PTR(-ENOMEM);
4223}
4224
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004225static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4226 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004227{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004228 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004229 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004230
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004231 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004232 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004233
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004234 if (f->r)
4235 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004236
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004237 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004238
4239 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004240}
4241
Ido Schimmel99724c12016-07-04 08:23:14 +02004242static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4243 bool valid)
4244{
4245 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4246 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4247
4248 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4249 vid);
4250}
4251
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004252static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4253 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004254{
Ido Schimmel0355b592016-06-20 23:04:13 +02004255 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004256 int err;
4257
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004258 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004259 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004260 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004261 if (IS_ERR(f))
4262 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004263 }
4264
Ido Schimmel0355b592016-06-20 23:04:13 +02004265 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4266 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004267 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004268
Ido Schimmel0355b592016-06-20 23:04:13 +02004269 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4270 if (err)
4271 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004272
Ido Schimmel41b996c2016-06-20 23:04:17 +02004273 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004274 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004275
Ido Schimmel22305372016-06-20 23:04:21 +02004276 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4277
Ido Schimmel0355b592016-06-20 23:04:13 +02004278 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004279
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004280err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004281 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4282err_vport_flood_set:
4283 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004284 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004285 return err;
4286}
4287
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004288static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004289{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004290 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004291
Ido Schimmel22305372016-06-20 23:04:21 +02004292 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4293
Ido Schimmel0355b592016-06-20 23:04:13 +02004294 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4295
4296 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4297
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004298 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4299
Ido Schimmel41b996c2016-06-20 23:04:17 +02004300 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004301 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004302 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004303}
4304
4305static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4306 struct net_device *br_dev)
4307{
Ido Schimmel99724c12016-07-04 08:23:14 +02004308 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004309 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4310 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004311 int err;
4312
Ido Schimmel99724c12016-07-04 08:23:14 +02004313 if (f && !WARN_ON(!f->leave))
4314 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004315
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004316 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004317 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004318 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004319 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004320 }
4321
4322 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4323 if (err) {
4324 netdev_err(dev, "Failed to enable learning\n");
4325 goto err_port_vid_learning_set;
4326 }
4327
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004328 mlxsw_sp_vport->learning = 1;
4329 mlxsw_sp_vport->learning_sync = 1;
4330 mlxsw_sp_vport->uc_flood = 1;
4331 mlxsw_sp_vport->bridged = 1;
4332
4333 return 0;
4334
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004335err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004336 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004337 return err;
4338}
4339
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004340static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004341{
4342 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004343
4344 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4345
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004346 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004347
Ido Schimmel0355b592016-06-20 23:04:13 +02004348 mlxsw_sp_vport->learning = 0;
4349 mlxsw_sp_vport->learning_sync = 0;
4350 mlxsw_sp_vport->uc_flood = 0;
4351 mlxsw_sp_vport->bridged = 0;
4352}
4353
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004354static bool
4355mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4356 const struct net_device *br_dev)
4357{
4358 struct mlxsw_sp_port *mlxsw_sp_vport;
4359
4360 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4361 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004362 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004363
4364 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004365 return false;
4366 }
4367
4368 return true;
4369}
4370
4371static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4372 unsigned long event, void *ptr,
4373 u16 vid)
4374{
4375 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4376 struct netdev_notifier_changeupper_info *info = ptr;
4377 struct mlxsw_sp_port *mlxsw_sp_vport;
4378 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004379 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004380
4381 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4382
4383 switch (event) {
4384 case NETDEV_PRECHANGEUPPER:
4385 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004386 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004387 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004388 if (!info->linking)
4389 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004390 /* We can't have multiple VLAN interfaces configured on
4391 * the same port and being members in the same bridge.
4392 */
4393 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4394 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004395 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004396 break;
4397 case NETDEV_CHANGEUPPER:
4398 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004399 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004400 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004401 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004402 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4403 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004404 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004405 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004406 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004407 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004408 }
4409 }
4410
Ido Schimmel80bedf12016-06-20 23:03:59 +02004411 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004412}
4413
Ido Schimmel272c4472015-12-15 16:03:47 +01004414static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4415 unsigned long event, void *ptr,
4416 u16 vid)
4417{
4418 struct net_device *dev;
4419 struct list_head *iter;
4420 int ret;
4421
4422 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4423 if (mlxsw_sp_port_dev_check(dev)) {
4424 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4425 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004426 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004427 return ret;
4428 }
4429 }
4430
Ido Schimmel80bedf12016-06-20 23:03:59 +02004431 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004432}
4433
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004434static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4435 unsigned long event, void *ptr)
4436{
4437 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4438 u16 vid = vlan_dev_vlan_id(vlan_dev);
4439
Ido Schimmel272c4472015-12-15 16:03:47 +01004440 if (mlxsw_sp_port_dev_check(real_dev))
4441 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4442 vid);
4443 else if (netif_is_lag_master(real_dev))
4444 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4445 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004446
Ido Schimmel80bedf12016-06-20 23:03:59 +02004447 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004448}
4449
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004450static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4451 unsigned long event, void *ptr)
4452{
4453 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004454 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004455
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004456 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4457 err = mlxsw_sp_netdevice_router_port_event(dev);
4458 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004459 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4460 else if (netif_is_lag_master(dev))
4461 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004462 else if (netif_is_bridge_master(dev))
4463 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004464 else if (is_vlan_dev(dev))
4465 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004466
Ido Schimmel80bedf12016-06-20 23:03:59 +02004467 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004468}
4469
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004470static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4471 .notifier_call = mlxsw_sp_netdevice_event,
4472};
4473
Ido Schimmel99724c12016-07-04 08:23:14 +02004474static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4475 .notifier_call = mlxsw_sp_inetaddr_event,
4476 .priority = 10, /* Must be called before FIB notifier block */
4477};
4478
Jiri Pirkoe7322632016-09-01 10:37:43 +02004479static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4480 .notifier_call = mlxsw_sp_router_netevent_event,
4481};
4482
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004483static int __init mlxsw_sp_module_init(void)
4484{
4485 int err;
4486
4487 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004488 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004489 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4490
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004491 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4492 if (err)
4493 goto err_core_driver_register;
4494 return 0;
4495
4496err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004497 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004498 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004499 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4500 return err;
4501}
4502
4503static void __exit mlxsw_sp_module_exit(void)
4504{
4505 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004506 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004507 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004508 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4509}
4510
4511module_init(mlxsw_sp_module_init);
4512module_exit(mlxsw_sp_module_exit);
4513
4514MODULE_LICENSE("Dual BSD/GPL");
4515MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4516MODULE_DESCRIPTION("Mellanox Spectrum driver");
4517MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);