blob: c275bf0fa36db86a09d861a7e17457c2c103dd4e [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/drm_crtc.h>
34#include <drm/drm_edid.h>
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/i915_drm.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010043#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080044
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040046 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080047
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000049#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080050#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010051#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010052#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080053
Jesse Barnes79e53942008-11-07 14:24:08 -080054
Chris Wilson2e88e402010-08-07 11:01:27 +010055static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080056 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63};
64
65#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
Chris Wilsonea5b2132010-08-04 13:50:23 +010067struct intel_sdvo {
68 struct intel_encoder base;
69
Chris Wilsonf899fc62010-07-20 15:44:45 -070070 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070071 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080072
Chris Wilsone957d772010-09-24 12:52:03 +010073 struct i2c_adapter ddc;
74
Jesse Barnese2f0ba92009-02-02 15:11:52 -080075 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010076 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080077
Jesse Barnese2f0ba92009-02-02 15:11:52 -080078 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080080
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
Jesse Barnes79e53942008-11-07 14:24:08 -080085 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080086
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080088 int pixel_clock_min, pixel_clock_max;
89
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080090 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
Simon Farnsworthcc68c812011-09-21 17:13:30 +010096 /*
97 * Hotplug activation bits for this device
98 */
Jani Nikula5fa7ac92012-08-29 16:43:58 +030099 uint16_t hotplug_active;
Simon Farnsworthcc68c812011-09-21 17:13:30 +0100100
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800101 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
106
107 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800108 * This is set if we're going to treat the device as TV-out.
109 *
110 * While we have these nice friendly flags for output types that ought
111 * to decide this for us, the S-Video output on our HDMI+S-Video card
112 * shows up as RGB1 (VGA).
113 */
114 bool is_tv;
115
Daniel Vettereef4eac2012-03-23 23:43:35 +0100116 /* On different gens SDVOB is at different places. */
117 bool is_sdvob;
118
Zhao Yakuice6feab2009-08-24 13:50:26 +0800119 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100120 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800121
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800122 /**
123 * This is set if we treat the device as HDMI, instead of DVI.
124 */
125 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000126 bool has_hdmi_monitor;
127 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800128
Ma Ling7086c872009-05-13 11:20:06 +0800129 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100130 * This is set if we detect output of sdvo device as LVDS and
131 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800132 */
133 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800134
135 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800136 * This is sdvo fixed pannel mode pointer
137 */
138 struct drm_display_mode *sdvo_lvds_fixed_mode;
139
Eric Anholtc751ce42010-03-25 11:48:48 -0700140 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800141 uint8_t ddc_bus;
Egbert Eiche7518232012-10-13 14:29:31 +0200142
143 /*
144 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
145 */
146 uint8_t dtd_sdvo_flags;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800147};
148
149struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100150 struct intel_connector base;
151
Zhenyu Wang14571b42010-03-30 14:06:33 +0800152 /* Mark the type of connector */
153 uint16_t output_flag;
154
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100155 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100156
Zhenyu Wang14571b42010-03-30 14:06:33 +0800157 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100158 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800159 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100160 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800161
Zhao Yakuib9219c52009-09-10 15:45:46 +0800162 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100163 struct drm_property *left;
164 struct drm_property *right;
165 struct drm_property *top;
166 struct drm_property *bottom;
167 struct drm_property *hpos;
168 struct drm_property *vpos;
169 struct drm_property *contrast;
170 struct drm_property *saturation;
171 struct drm_property *hue;
172 struct drm_property *sharpness;
173 struct drm_property *flicker_filter;
174 struct drm_property *flicker_filter_adaptive;
175 struct drm_property *flicker_filter_2d;
176 struct drm_property *tv_chroma_filter;
177 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100178 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800179
180 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100181 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800182
183 /* Add variable to record current setting for the above property */
184 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100185
Zhao Yakuib9219c52009-09-10 15:45:46 +0800186 /* this is to get the range of margin.*/
187 u32 max_hscan, max_vscan;
188 u32 max_hpos, cur_hpos;
189 u32 max_vpos, cur_vpos;
190 u32 cur_brightness, max_brightness;
191 u32 cur_contrast, max_contrast;
192 u32 cur_saturation, max_saturation;
193 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100194 u32 cur_sharpness, max_sharpness;
195 u32 cur_flicker_filter, max_flicker_filter;
196 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
197 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
198 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
199 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100200 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800201};
202
Chris Wilson890f3352010-09-14 16:46:59 +0100203static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100204{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100205 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100206}
207
Chris Wilsondf0e9242010-09-09 16:20:55 +0100208static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
209{
210 return container_of(intel_attached_encoder(connector),
211 struct intel_sdvo, base);
212}
213
Chris Wilson615fb932010-08-04 13:50:24 +0100214static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
215{
216 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
217}
218
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800219static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100220intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100221static bool
222intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector,
224 int type);
225static bool
226intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
227 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800228
Jesse Barnes79e53942008-11-07 14:24:08 -0800229/**
230 * Writes the SDVOB or SDVOC with the given value, but always writes both
231 * SDVOB and SDVOC to work around apparent hardware issues (according to
232 * comments in the BIOS).
233 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100234static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800235{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100236 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800237 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800238 u32 bval = val, cval = val;
239 int i;
240
Chris Wilsonea5b2132010-08-04 13:50:23 +0100241 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
242 I915_WRITE(intel_sdvo->sdvo_reg, val);
243 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800244 return;
245 }
246
Chris Wilsonea5b2132010-08-04 13:50:23 +0100247 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800248 cval = I915_READ(SDVOC);
249 } else {
250 bval = I915_READ(SDVOB);
251 }
252 /*
253 * Write the registers twice for luck. Sometimes,
254 * writing them only once doesn't appear to 'stick'.
255 * The BIOS does this too. Yay, magic
256 */
257 for (i = 0; i < 2; i++)
258 {
259 I915_WRITE(SDVOB, bval);
260 I915_READ(SDVOB);
261 I915_WRITE(SDVOC, cval);
262 I915_READ(SDVOC);
263 }
264}
265
Chris Wilson32aad862010-08-04 13:50:25 +0100266static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800267{
Jesse Barnes79e53942008-11-07 14:24:08 -0800268 struct i2c_msg msgs[] = {
269 {
Chris Wilsone957d772010-09-24 12:52:03 +0100270 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800271 .flags = 0,
272 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100273 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800274 },
275 {
Chris Wilsone957d772010-09-24 12:52:03 +0100276 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800277 .flags = I2C_M_RD,
278 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100279 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800280 }
281 };
Chris Wilson32aad862010-08-04 13:50:25 +0100282 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800283
Chris Wilsonf899fc62010-07-20 15:44:45 -0700284 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800285 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800286
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800287 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800288 return false;
289}
290
Jesse Barnes79e53942008-11-07 14:24:08 -0800291#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
292/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100293static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800294 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100295 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800296} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100340
Akshay Joshi0206e352011-08-16 15:34:10 -0400341 /* Add the op code for SDVO enhancements */
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100386
Akshay Joshi0206e352011-08-16 15:34:10 -0400387 /* HDMI op code */
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800408};
409
Daniel Vettereef4eac2012-03-23 23:43:35 +0100410#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800411
Chris Wilsonea5b2132010-08-04 13:50:23 +0100412static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100413 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800414{
Jesse Barnes79e53942008-11-07 14:24:08 -0800415 int i;
416
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800417 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100418 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800419 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800420 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800421 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800422 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400423 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800424 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800425 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800426 break;
427 }
428 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400429 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800430 DRM_LOG_KMS("(%02X)", cmd);
431 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800432}
Jesse Barnes79e53942008-11-07 14:24:08 -0800433
Jesse Barnes79e53942008-11-07 14:24:08 -0800434static const char *cmd_status_names[] = {
435 "Power on",
436 "Success",
437 "Not supported",
438 "Invalid arg",
439 "Pending",
440 "Target not specified",
441 "Scaling not supported"
442};
443
Chris Wilsone957d772010-09-24 12:52:03 +0100444static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
445 const void *args, int args_len)
446{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700447 u8 *buf, status;
448 struct i2c_msg *msgs;
449 int i, ret = true;
450
Alan Cox0274df32012-07-25 13:51:04 +0100451 /* Would be simpler to allocate both in one go ? */
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700452 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
453 if (!buf)
454 return false;
455
456 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
Alan Cox0274df32012-07-25 13:51:04 +0100457 if (!msgs) {
458 kfree(buf);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700459 return false;
Alan Cox0274df32012-07-25 13:51:04 +0100460 }
Chris Wilsone957d772010-09-24 12:52:03 +0100461
462 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
463
464 for (i = 0; i < args_len; i++) {
465 msgs[i].addr = intel_sdvo->slave_addr;
466 msgs[i].flags = 0;
467 msgs[i].len = 2;
468 msgs[i].buf = buf + 2 *i;
469 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
470 buf[2*i + 1] = ((u8*)args)[i];
471 }
472 msgs[i].addr = intel_sdvo->slave_addr;
473 msgs[i].flags = 0;
474 msgs[i].len = 2;
475 msgs[i].buf = buf + 2*i;
476 buf[2*i + 0] = SDVO_I2C_OPCODE;
477 buf[2*i + 1] = cmd;
478
479 /* the following two are to read the response */
480 status = SDVO_I2C_CMD_STATUS;
481 msgs[i+1].addr = intel_sdvo->slave_addr;
482 msgs[i+1].flags = 0;
483 msgs[i+1].len = 1;
484 msgs[i+1].buf = &status;
485
486 msgs[i+2].addr = intel_sdvo->slave_addr;
487 msgs[i+2].flags = I2C_M_RD;
488 msgs[i+2].len = 1;
489 msgs[i+2].buf = &status;
490
491 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
492 if (ret < 0) {
493 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700494 ret = false;
495 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100496 }
497 if (ret != i+3) {
498 /* failure in I2C transfer */
499 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700500 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100501 }
502
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700503out:
504 kfree(msgs);
505 kfree(buf);
506 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100507}
508
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100509static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
510 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800511{
Chris Wilsonfc373812012-11-23 11:57:56 +0000512 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100513 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800514 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800515
Chris Wilsond121a5d2011-01-25 15:00:01 +0000516 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
517
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100518 /*
519 * The documentation states that all commands will be
520 * processed within 15µs, and that we need only poll
521 * the status byte a maximum of 3 times in order for the
522 * command to be complete.
523 *
524 * Check 5 times in case the hardware failed to read the docs.
Chris Wilsonfc373812012-11-23 11:57:56 +0000525 *
526 * Also beware that the first response by many devices is to
527 * reply PENDING and stall for time. TVs are notorious for
528 * requiring longer than specified to complete their replies.
529 * Originally (in the DDX long ago), the delay was only ever 15ms
530 * with an additional delay of 30ms applied for TVs added later after
531 * many experiments. To accommodate both sets of delays, we do a
532 * sequence of slow checks if the device is falling behind and fails
533 * to reply within 5*15µs.
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100534 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000535 if (!intel_sdvo_read_byte(intel_sdvo,
536 SDVO_I2C_CMD_STATUS,
537 &status))
538 goto log_fail;
539
Chris Wilsonfc373812012-11-23 11:57:56 +0000540 while (status == SDVO_CMD_STATUS_PENDING && --retry) {
541 if (retry < 10)
542 msleep(15);
543 else
544 udelay(15);
545
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100546 if (!intel_sdvo_read_byte(intel_sdvo,
547 SDVO_I2C_CMD_STATUS,
548 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000549 goto log_fail;
550 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100551
Jesse Barnes79e53942008-11-07 14:24:08 -0800552 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800553 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800554 else
yakui_zhao342dc382009-06-02 14:12:00 +0800555 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800556
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100557 if (status != SDVO_CMD_STATUS_SUCCESS)
558 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800559
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100560 /* Read the command response */
561 for (i = 0; i < response_len; i++) {
562 if (!intel_sdvo_read_byte(intel_sdvo,
563 SDVO_I2C_RETURN_0 + i,
564 &((u8 *)response)[i]))
565 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100566 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800567 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100568 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100569 return true;
570
571log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000572 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100573 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800574}
575
Hannes Ederb358d0a2008-12-18 21:18:47 +0100576static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800577{
578 if (mode->clock >= 100000)
579 return 1;
580 else if (mode->clock >= 50000)
581 return 2;
582 else
583 return 4;
584}
585
Chris Wilsone957d772010-09-24 12:52:03 +0100586static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
587 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800588{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000589 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100590 return intel_sdvo_write_cmd(intel_sdvo,
591 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
592 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800593}
594
Chris Wilson32aad862010-08-04 13:50:25 +0100595static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
596{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000597 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
598 return false;
599
600 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100601}
602
603static bool
604intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
605{
606 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
607 return false;
608
609 return intel_sdvo_read_response(intel_sdvo, value, len);
610}
611
612static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800613{
614 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100615 return intel_sdvo_set_value(intel_sdvo,
616 SDVO_CMD_SET_TARGET_INPUT,
617 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800618}
619
620/**
621 * Return whether each input is trained.
622 *
623 * This function is making an assumption about the layout of the response,
624 * which should be checked against the docs.
625 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100626static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800627{
628 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800629
Chris Wilson1a3665c2011-01-25 13:59:37 +0000630 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100631 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
632 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800633 return false;
634
635 *input_1 = response.input0_trained;
636 *input_2 = response.input1_trained;
637 return true;
638}
639
Chris Wilsonea5b2132010-08-04 13:50:23 +0100640static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800641 u16 outputs)
642{
Chris Wilson32aad862010-08-04 13:50:25 +0100643 return intel_sdvo_set_value(intel_sdvo,
644 SDVO_CMD_SET_ACTIVE_OUTPUTS,
645 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800646}
647
Daniel Vetter4ac41f42012-07-02 14:54:00 +0200648static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
649 u16 *outputs)
650{
651 return intel_sdvo_get_value(intel_sdvo,
652 SDVO_CMD_GET_ACTIVE_OUTPUTS,
653 outputs, sizeof(*outputs));
654}
655
Chris Wilsonea5b2132010-08-04 13:50:23 +0100656static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800657 int mode)
658{
Chris Wilson32aad862010-08-04 13:50:25 +0100659 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800660
661 switch (mode) {
662 case DRM_MODE_DPMS_ON:
663 state = SDVO_ENCODER_STATE_ON;
664 break;
665 case DRM_MODE_DPMS_STANDBY:
666 state = SDVO_ENCODER_STATE_STANDBY;
667 break;
668 case DRM_MODE_DPMS_SUSPEND:
669 state = SDVO_ENCODER_STATE_SUSPEND;
670 break;
671 case DRM_MODE_DPMS_OFF:
672 state = SDVO_ENCODER_STATE_OFF;
673 break;
674 }
675
Chris Wilson32aad862010-08-04 13:50:25 +0100676 return intel_sdvo_set_value(intel_sdvo,
677 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800678}
679
Chris Wilsonea5b2132010-08-04 13:50:23 +0100680static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800681 int *clock_min,
682 int *clock_max)
683{
684 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800685
Chris Wilson1a3665c2011-01-25 13:59:37 +0000686 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100687 if (!intel_sdvo_get_value(intel_sdvo,
688 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
689 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800690 return false;
691
692 /* Convert the values from units of 10 kHz to kHz. */
693 *clock_min = clocks.min * 10;
694 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800695 return true;
696}
697
Chris Wilsonea5b2132010-08-04 13:50:23 +0100698static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800699 u16 outputs)
700{
Chris Wilson32aad862010-08-04 13:50:25 +0100701 return intel_sdvo_set_value(intel_sdvo,
702 SDVO_CMD_SET_TARGET_OUTPUT,
703 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800704}
705
Chris Wilsonea5b2132010-08-04 13:50:23 +0100706static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800707 struct intel_sdvo_dtd *dtd)
708{
Chris Wilson32aad862010-08-04 13:50:25 +0100709 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
710 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800711}
712
Chris Wilsonea5b2132010-08-04 13:50:23 +0100713static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800714 struct intel_sdvo_dtd *dtd)
715{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100716 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800717 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
718}
719
Chris Wilsonea5b2132010-08-04 13:50:23 +0100720static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800721 struct intel_sdvo_dtd *dtd)
722{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100723 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800724 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
725}
726
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800727static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100728intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800729 uint16_t clock,
730 uint16_t width,
731 uint16_t height)
732{
733 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800734
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800735 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800736 args.clock = clock;
737 args.width = width;
738 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800739 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800740
Chris Wilsonea5b2132010-08-04 13:50:23 +0100741 if (intel_sdvo->is_lvds &&
742 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
743 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800744 args.scaled = 1;
745
Chris Wilson32aad862010-08-04 13:50:25 +0100746 return intel_sdvo_set_value(intel_sdvo,
747 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
748 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800749}
750
Chris Wilsonea5b2132010-08-04 13:50:23 +0100751static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800752 struct intel_sdvo_dtd *dtd)
753{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000754 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
755 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100756 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
757 &dtd->part1, sizeof(dtd->part1)) &&
758 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
759 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800760}
Jesse Barnes79e53942008-11-07 14:24:08 -0800761
Chris Wilsonea5b2132010-08-04 13:50:23 +0100762static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800763{
Chris Wilson32aad862010-08-04 13:50:25 +0100764 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800765}
766
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800767static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100768 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800769{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800770 uint16_t width, height;
771 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
772 uint16_t h_sync_offset, v_sync_offset;
Daniel Vetter66518192012-04-01 19:16:18 +0200773 int mode_clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800774
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200775 width = mode->hdisplay;
776 height = mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800777
778 /* do some mode translations */
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200779 h_blank_len = mode->htotal - mode->hdisplay;
780 h_sync_len = mode->hsync_end - mode->hsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800781
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200782 v_blank_len = mode->vtotal - mode->vdisplay;
783 v_sync_len = mode->vsync_end - mode->vsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800784
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200785 h_sync_offset = mode->hsync_start - mode->hdisplay;
786 v_sync_offset = mode->vsync_start - mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800787
Daniel Vetter66518192012-04-01 19:16:18 +0200788 mode_clock = mode->clock;
789 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
790 mode_clock /= 10;
791 dtd->part1.clock = mode_clock;
792
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800793 dtd->part1.h_active = width & 0xff;
794 dtd->part1.h_blank = h_blank_len & 0xff;
795 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800796 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800797 dtd->part1.v_active = height & 0xff;
798 dtd->part1.v_blank = v_blank_len & 0xff;
799 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800800 ((v_blank_len >> 8) & 0xf);
801
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800802 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800803 dtd->part2.h_sync_width = h_sync_len & 0xff;
804 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800805 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800806 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800807 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
808 ((v_sync_len & 0x30) >> 4);
809
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800810 dtd->part2.dtd_flags = 0x18;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200811 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
812 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800813 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200814 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800815 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200816 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
Jesse Barnes79e53942008-11-07 14:24:08 -0800817
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800818 dtd->part2.sdvo_flags = 0;
819 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
820 dtd->part2.reserved = 0;
821}
Jesse Barnes79e53942008-11-07 14:24:08 -0800822
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800823static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100824 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800825{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800826 mode->hdisplay = dtd->part1.h_active;
827 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
828 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800829 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800830 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
831 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
832 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
833 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
834
835 mode->vdisplay = dtd->part1.v_active;
836 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
837 mode->vsync_start = mode->vdisplay;
838 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800839 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800840 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
841 mode->vsync_end = mode->vsync_start +
842 (dtd->part2.v_sync_off_width & 0xf);
843 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
844 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
845 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
846
847 mode->clock = dtd->part1.clock * 10;
848
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800849 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200850 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
851 mode->flags |= DRM_MODE_FLAG_INTERLACE;
852 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800853 mode->flags |= DRM_MODE_FLAG_PHSYNC;
Daniel Vetter59d92bf2012-05-12 22:22:58 +0200854 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800855 mode->flags |= DRM_MODE_FLAG_PVSYNC;
856}
857
Chris Wilsone27d8532010-10-22 09:15:22 +0100858static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800859{
Chris Wilsone27d8532010-10-22 09:15:22 +0100860 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800861
Chris Wilson1a3665c2011-01-25 13:59:37 +0000862 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100863 return intel_sdvo_get_value(intel_sdvo,
864 SDVO_CMD_GET_SUPP_ENCODE,
865 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800866}
867
Chris Wilsonea5b2132010-08-04 13:50:23 +0100868static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700869 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800870{
Chris Wilson32aad862010-08-04 13:50:25 +0100871 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800872}
873
Chris Wilsonea5b2132010-08-04 13:50:23 +0100874static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800875 uint8_t mode)
876{
Chris Wilson32aad862010-08-04 13:50:25 +0100877 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800878}
879
880#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100881static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800882{
883 int i, j;
884 uint8_t set_buf_index[2];
885 uint8_t av_split;
886 uint8_t buf_size;
887 uint8_t buf[48];
888 uint8_t *pos;
889
Chris Wilson32aad862010-08-04 13:50:25 +0100890 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800891
892 for (i = 0; i <= av_split; i++) {
893 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700894 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800895 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700896 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
897 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800898
899 pos = buf;
900 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700901 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800902 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700903 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800904 pos += 8;
905 }
906 }
907}
908#endif
909
Daniel Vetterb6e0e542012-10-21 12:52:39 +0200910static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
911 unsigned if_index, uint8_t tx_rate,
912 uint8_t *data, unsigned length)
913{
914 uint8_t set_buf_index[2] = { if_index, 0 };
915 uint8_t hbuf_size, tmp[8];
916 int i;
917
918 if (!intel_sdvo_set_value(intel_sdvo,
919 SDVO_CMD_SET_HBUF_INDEX,
920 set_buf_index, 2))
921 return false;
922
923 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
924 &hbuf_size, 1))
925 return false;
926
927 /* Buffer size is 0 based, hooray! */
928 hbuf_size++;
929
930 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
931 if_index, length, hbuf_size);
932
933 for (i = 0; i < hbuf_size; i += 8) {
934 memset(tmp, 0, 8);
935 if (i < length)
936 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
937
938 if (!intel_sdvo_set_value(intel_sdvo,
939 SDVO_CMD_SET_HBUF_DATA,
940 tmp, 8))
941 return false;
942 }
943
944 return intel_sdvo_set_value(intel_sdvo,
945 SDVO_CMD_SET_HBUF_TXRATE,
946 &tx_rate, 1);
947}
948
David Härdeman3c17fe42010-09-24 21:44:32 +0200949static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800950{
951 struct dip_infoframe avi_if = {
952 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200953 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800954 .len = DIP_LEN_AVI,
955 };
Daniel Vetter81014b92012-05-12 20:22:00 +0200956 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800957
David Härdeman3c17fe42010-09-24 21:44:32 +0200958 intel_dip_infoframe_csum(&avi_if);
959
Daniel Vetter81014b92012-05-12 20:22:00 +0200960 /* sdvo spec says that the ecc is handled by the hw, and it looks like
961 * we must not send the ecc field, either. */
962 memcpy(sdvo_data, &avi_if, 3);
963 sdvo_data[3] = avi_if.checksum;
964 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
965
Daniel Vetterb6e0e542012-10-21 12:52:39 +0200966 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
967 SDVO_HBUF_TX_VSYNC,
968 sdvo_data, sizeof(sdvo_data));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800969}
970
Chris Wilson32aad862010-08-04 13:50:25 +0100971static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800972{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800973 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100974 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800975
Chris Wilson40039752010-08-04 13:50:26 +0100976 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800977 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100978 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800979
Chris Wilson32aad862010-08-04 13:50:25 +0100980 BUILD_BUG_ON(sizeof(format) != 6);
981 return intel_sdvo_set_value(intel_sdvo,
982 SDVO_CMD_SET_TV_FORMAT,
983 &format, sizeof(format));
984}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800985
Chris Wilson32aad862010-08-04 13:50:25 +0100986static bool
987intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +0200988 const struct drm_display_mode *mode)
Chris Wilson32aad862010-08-04 13:50:25 +0100989{
990 struct intel_sdvo_dtd output_dtd;
991
992 if (!intel_sdvo_set_target_output(intel_sdvo,
993 intel_sdvo->attached_output))
994 return false;
995
996 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
997 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
998 return false;
999
1000 return true;
1001}
1002
Daniel Vetterc9a29692012-04-10 13:55:47 +02001003/* Asks the sdvo controller for the preferred input mode given the output mode.
1004 * Unfortunately we have to set up the full output mode to do that. */
Chris Wilson32aad862010-08-04 13:50:25 +01001005static bool
Daniel Vetterc9a29692012-04-10 13:55:47 +02001006intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
Laurent Pincharte811f5a2012-07-17 17:56:50 +02001007 const struct drm_display_mode *mode,
Daniel Vetterc9a29692012-04-10 13:55:47 +02001008 struct drm_display_mode *adjusted_mode)
Chris Wilson32aad862010-08-04 13:50:25 +01001009{
Daniel Vetterc9a29692012-04-10 13:55:47 +02001010 struct intel_sdvo_dtd input_dtd;
1011
Chris Wilson32aad862010-08-04 13:50:25 +01001012 /* Reset the input timing to the screen. Assume always input 0. */
1013 if (!intel_sdvo_set_target_input(intel_sdvo))
1014 return false;
1015
1016 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1017 mode->clock / 10,
1018 mode->hdisplay,
1019 mode->vdisplay))
1020 return false;
1021
1022 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Daniel Vetterc9a29692012-04-10 13:55:47 +02001023 &input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +01001024 return false;
1025
Daniel Vetterc9a29692012-04-10 13:55:47 +02001026 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
Egbert Eiche7518232012-10-13 14:29:31 +02001027 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
Chris Wilson32aad862010-08-04 13:50:25 +01001028
Chris Wilson32aad862010-08-04 13:50:25 +01001029 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001030}
1031
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001032static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
Laurent Pincharte811f5a2012-07-17 17:56:50 +02001033 const struct drm_display_mode *mode,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001034 struct drm_display_mode *adjusted_mode)
1035{
Chris Wilson890f3352010-09-14 16:46:59 +01001036 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001037 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001038
Chris Wilson32aad862010-08-04 13:50:25 +01001039 /* We need to construct preferred input timings based on our
1040 * output timings. To do that, we have to set the output
1041 * timings, even though this isn't really the right place in
1042 * the sequence to do it. Oh well.
1043 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001044 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +01001045 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001046 return false;
Chris Wilson32aad862010-08-04 13:50:25 +01001047
Daniel Vetterc9a29692012-04-10 13:55:47 +02001048 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1049 mode,
1050 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001051 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +01001052 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +01001053 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001054 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001055
Daniel Vetterc9a29692012-04-10 13:55:47 +02001056 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1057 mode,
1058 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001059 }
Chris Wilson32aad862010-08-04 13:50:25 +01001060
1061 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +01001062 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +01001063 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001064 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1065 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +01001066
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001067 return true;
1068}
1069
1070static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1071 struct drm_display_mode *mode,
1072 struct drm_display_mode *adjusted_mode)
1073{
1074 struct drm_device *dev = encoder->dev;
1075 struct drm_i915_private *dev_priv = dev->dev_private;
1076 struct drm_crtc *crtc = encoder->crtc;
1077 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +01001078 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001079 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001080 struct intel_sdvo_in_out_map in_out;
Daniel Vetter66518192012-04-01 19:16:18 +02001081 struct intel_sdvo_dtd input_dtd, output_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001082 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1083 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001084
1085 if (!mode)
1086 return;
1087
1088 /* First, set the input mapping for the first input to our controlled
1089 * output. This is only correct if we're a single-input device, in
1090 * which case the first input is the output from the appropriate SDVO
1091 * channel on the motherboard. In a two-input device, the first input
1092 * will be SDVOB and the second SDVOC.
1093 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001094 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001095 in_out.in1 = 0;
1096
Pavel Roskinc74696b2010-09-02 14:46:34 -04001097 intel_sdvo_set_value(intel_sdvo,
1098 SDVO_CMD_SET_IN_OUT_MAP,
1099 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001100
Chris Wilson6c9547f2010-08-25 10:05:17 +01001101 /* Set the output timings to the screen */
1102 if (!intel_sdvo_set_target_output(intel_sdvo,
1103 intel_sdvo->attached_output))
1104 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001105
Daniel Vetter66518192012-04-01 19:16:18 +02001106 /* lvds has a special fixed output timing. */
1107 if (intel_sdvo->is_lvds)
1108 intel_sdvo_get_dtd_from_mode(&output_dtd,
1109 intel_sdvo->sdvo_lvds_fixed_mode);
1110 else
1111 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001112 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1113 DRM_INFO("Setting output timings on %s failed\n",
1114 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001115
1116 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001117 if (!intel_sdvo_set_target_input(intel_sdvo))
1118 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001119
Chris Wilson97aaf912011-01-04 20:10:52 +00001120 if (intel_sdvo->has_hdmi_monitor) {
1121 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1122 intel_sdvo_set_colorimetry(intel_sdvo,
1123 SDVO_COLORIMETRY_RGB256);
1124 intel_sdvo_set_avi_infoframe(intel_sdvo);
1125 } else
1126 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001127
Chris Wilson6c9547f2010-08-25 10:05:17 +01001128 if (intel_sdvo->is_tv &&
1129 !intel_sdvo_set_tv_format(intel_sdvo))
1130 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001131
Daniel Vetter66518192012-04-01 19:16:18 +02001132 /* We have tried to get input timing in mode_fixup, and filled into
1133 * adjusted_mode.
1134 */
1135 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Egbert Eiche7518232012-10-13 14:29:31 +02001136 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1137 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
Daniel Vetterc8d4bb52012-04-10 13:55:48 +02001138 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1139 DRM_INFO("Setting input timings on %s failed\n",
1140 SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001141
Chris Wilson6c9547f2010-08-25 10:05:17 +01001142 switch (pixel_multiplier) {
1143 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001144 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1145 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1146 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001147 }
Chris Wilson32aad862010-08-04 13:50:25 +01001148 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1149 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001150
1151 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001152 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001153 /* The real mode polarity is set by the SDVO commands, using
1154 * struct intel_sdvo_dtd. */
1155 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Chris Wilsone953fd72011-02-21 22:23:52 +00001156 if (intel_sdvo->is_hdmi)
1157 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001158 if (INTEL_INFO(dev)->gen < 5)
1159 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001160 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001161 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001162 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001163 case SDVOB:
1164 sdvox &= SDVOB_PRESERVE_MASK;
1165 break;
1166 case SDVOC:
1167 sdvox &= SDVOC_PRESERVE_MASK;
1168 break;
1169 }
1170 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1171 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001172
1173 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1174 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1175 else
1176 sdvox |= TRANSCODER(intel_crtc->pipe);
1177
Chris Wilsonda79de92010-11-22 11:12:46 +00001178 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001179 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001180
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001181 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001182 /* done in crtc_mode_set as the dpll_md reg must be written early */
1183 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1184 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001185 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001186 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001187 }
1188
Chris Wilson6714afb2010-12-17 04:10:51 +00001189 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1190 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001191 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001192 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001193}
1194
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001195static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001196{
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001197 struct intel_sdvo_connector *intel_sdvo_connector =
1198 to_intel_sdvo_connector(&connector->base);
1199 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1200 u16 active_outputs;
1201
1202 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1203
1204 if (active_outputs & intel_sdvo_connector->output_flag)
1205 return true;
1206 else
1207 return false;
1208}
1209
1210static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1211 enum pipe *pipe)
1212{
1213 struct drm_device *dev = encoder->base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -08001214 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02001215 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1216 u32 tmp;
1217
1218 tmp = I915_READ(intel_sdvo->sdvo_reg);
1219
1220 if (!(tmp & SDVO_ENABLE))
1221 return false;
1222
1223 if (HAS_PCH_CPT(dev))
1224 *pipe = PORT_TO_PIPE_CPT(tmp);
1225 else
1226 *pipe = PORT_TO_PIPE(tmp);
1227
1228 return true;
1229}
1230
Daniel Vetterce22c322012-07-01 15:31:04 +02001231static void intel_disable_sdvo(struct intel_encoder *encoder)
1232{
1233 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1234 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001235 u32 temp;
1236
Daniel Vetterce22c322012-07-01 15:31:04 +02001237 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1238 if (0)
1239 intel_sdvo_set_encoder_power_state(intel_sdvo,
1240 DRM_MODE_DPMS_OFF);
1241
1242 temp = I915_READ(intel_sdvo->sdvo_reg);
1243 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilson776ca7c2012-11-21 10:44:23 +00001244 /* HW workaround for IBX, we need to move the port to
1245 * transcoder A before disabling it. */
1246 if (HAS_PCH_IBX(encoder->base.dev)) {
1247 struct drm_crtc *crtc = encoder->base.crtc;
1248 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1249
1250 if (temp & SDVO_PIPE_B_SELECT) {
1251 temp &= ~SDVO_PIPE_B_SELECT;
1252 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1253 POSTING_READ(intel_sdvo->sdvo_reg);
1254
1255 /* Again we need to write this twice. */
1256 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1257 POSTING_READ(intel_sdvo->sdvo_reg);
1258
1259 /* Transcoder selection bits only update
1260 * effectively on vblank. */
1261 if (crtc)
1262 intel_wait_for_vblank(encoder->base.dev, pipe);
1263 else
1264 msleep(50);
1265 }
1266 }
1267
Daniel Vetterce22c322012-07-01 15:31:04 +02001268 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1269 }
1270}
1271
1272static void intel_enable_sdvo(struct intel_encoder *encoder)
1273{
1274 struct drm_device *dev = encoder->base.dev;
1275 struct drm_i915_private *dev_priv = dev->dev_private;
1276 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1277 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1278 u32 temp;
1279 bool input1, input2;
1280 int i;
1281 u8 status;
1282
1283 temp = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001284 if ((temp & SDVO_ENABLE) == 0) {
1285 /* HW workaround for IBX, we need to move the port
1286 * to transcoder A before disabling it. */
1287 if (HAS_PCH_IBX(dev)) {
1288 struct drm_crtc *crtc = encoder->base.crtc;
1289 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1290
1291 /* Restore the transcoder select bit. */
1292 if (pipe == PIPE_B)
1293 temp |= SDVO_PIPE_B_SELECT;
1294 }
1295
Daniel Vetterce22c322012-07-01 15:31:04 +02001296 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Chris Wilson776ca7c2012-11-21 10:44:23 +00001297 }
Daniel Vetterce22c322012-07-01 15:31:04 +02001298 for (i = 0; i < 2; i++)
1299 intel_wait_for_vblank(dev, intel_crtc->pipe);
1300
1301 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1302 /* Warn if the device reported failure to sync.
1303 * A lot of SDVO devices fail to notify of sync, but it's
1304 * a given it the status is a success, we succeeded.
1305 */
1306 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1307 DRM_DEBUG_KMS("First %s output reported failure to "
1308 "sync\n", SDVO_NAME(intel_sdvo));
1309 }
1310
1311 if (0)
1312 intel_sdvo_set_encoder_power_state(intel_sdvo,
1313 DRM_MODE_DPMS_ON);
1314 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1315}
1316
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001317static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
Jesse Barnes79e53942008-11-07 14:24:08 -08001318{
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001319 struct drm_crtc *crtc;
1320 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1321
1322 /* dvo supports only 2 dpms states. */
1323 if (mode != DRM_MODE_DPMS_ON)
1324 mode = DRM_MODE_DPMS_OFF;
1325
1326 if (mode == connector->dpms)
1327 return;
1328
1329 connector->dpms = mode;
1330
1331 /* Only need to change hw state when actually enabled */
1332 crtc = intel_sdvo->base.base.crtc;
1333 if (!crtc) {
1334 intel_sdvo->base.connectors_active = false;
1335 return;
1336 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001337
1338 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001339 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001340 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001341 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001342
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001343 intel_sdvo->base.connectors_active = false;
1344
1345 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001346 } else {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001347 intel_sdvo->base.connectors_active = true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001348
Daniel Vetterb2cabb02012-07-01 22:42:24 +02001349 intel_crtc_update_dpms(crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001350
1351 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001352 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1353 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001354 }
Daniel Vetter0a91ca22012-07-02 21:54:27 +02001355
Daniel Vetterb9805142012-08-31 17:37:33 +02001356 intel_modeset_check_state(connector->dev);
Jesse Barnes79e53942008-11-07 14:24:08 -08001357}
1358
Jesse Barnes79e53942008-11-07 14:24:08 -08001359static int intel_sdvo_mode_valid(struct drm_connector *connector,
1360 struct drm_display_mode *mode)
1361{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001362 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001363
1364 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1365 return MODE_NO_DBLESCAN;
1366
Chris Wilsonea5b2132010-08-04 13:50:23 +01001367 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001368 return MODE_CLOCK_LOW;
1369
Chris Wilsonea5b2132010-08-04 13:50:23 +01001370 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001371 return MODE_CLOCK_HIGH;
1372
Chris Wilson85454232010-08-08 14:28:23 +01001373 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001374 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001375 return MODE_PANEL;
1376
Chris Wilsonea5b2132010-08-04 13:50:23 +01001377 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001378 return MODE_PANEL;
1379 }
1380
Jesse Barnes79e53942008-11-07 14:24:08 -08001381 return MODE_OK;
1382}
1383
Chris Wilsonea5b2132010-08-04 13:50:23 +01001384static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001385{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001386 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001387 if (!intel_sdvo_get_value(intel_sdvo,
1388 SDVO_CMD_GET_DEVICE_CAPS,
1389 caps, sizeof(*caps)))
1390 return false;
1391
1392 DRM_DEBUG_KMS("SDVO capabilities:\n"
1393 " vendor_id: %d\n"
1394 " device_id: %d\n"
1395 " device_rev_id: %d\n"
1396 " sdvo_version_major: %d\n"
1397 " sdvo_version_minor: %d\n"
1398 " sdvo_inputs_mask: %d\n"
1399 " smooth_scaling: %d\n"
1400 " sharp_scaling: %d\n"
1401 " up_scaling: %d\n"
1402 " down_scaling: %d\n"
1403 " stall_support: %d\n"
1404 " output_flags: %d\n",
1405 caps->vendor_id,
1406 caps->device_id,
1407 caps->device_rev_id,
1408 caps->sdvo_version_major,
1409 caps->sdvo_version_minor,
1410 caps->sdvo_inputs_mask,
1411 caps->smooth_scaling,
1412 caps->sharp_scaling,
1413 caps->up_scaling,
1414 caps->down_scaling,
1415 caps->stall_support,
1416 caps->output_flags);
1417
1418 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001419}
1420
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001421static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001422{
Daniel Vetter768b1072012-05-04 11:29:56 +02001423 struct drm_device *dev = intel_sdvo->base.base.dev;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001424 uint16_t hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001425
Daniel Vetter768b1072012-05-04 11:29:56 +02001426 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1427 * on the line. */
1428 if (IS_I945G(dev) || IS_I945GM(dev))
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001429 return 0;
Daniel Vetter768b1072012-05-04 11:29:56 +02001430
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001431 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1432 &hotplug, sizeof(hotplug)))
1433 return 0;
1434
1435 return hotplug;
Jesse Barnes79e53942008-11-07 14:24:08 -08001436}
1437
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001438static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001439{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001440 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001441
Jani Nikula5fa7ac92012-08-29 16:43:58 +03001442 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1443 &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001444}
1445
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001446static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001447intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001448{
Chris Wilsonbc652122011-01-25 13:28:29 +00001449 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001450 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001451}
1452
Chris Wilsonf899fc62010-07-20 15:44:45 -07001453static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001454intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001455{
Chris Wilsone957d772010-09-24 12:52:03 +01001456 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1457 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001458}
1459
Chris Wilsonff482d82010-09-15 10:40:38 +01001460/* Mac mini hack -- use the same DDC as the analog connector */
1461static struct edid *
1462intel_sdvo_get_analog_edid(struct drm_connector *connector)
1463{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001464 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001465
Chris Wilson0c1dab82010-11-23 22:37:01 +00001466 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001467 intel_gmbus_get_adapter(dev_priv,
1468 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001469}
1470
Ben Widawskyc43b5632012-04-16 14:07:40 -07001471static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001472intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001473{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001474 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001475 enum drm_connector_status status;
1476 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001477
Chris Wilsone957d772010-09-24 12:52:03 +01001478 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001479
Chris Wilsonea5b2132010-08-04 13:50:23 +01001480 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001481 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001482
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001483 /*
1484 * Don't use the 1 as the argument of DDC bus switch to get
1485 * the EDID. It is used for SDVO SPD ROM.
1486 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001487 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001488 intel_sdvo->ddc_bus = ddc;
1489 edid = intel_sdvo_get_edid(connector);
1490 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001491 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001492 }
Chris Wilsone957d772010-09-24 12:52:03 +01001493 /*
1494 * If we found the EDID on the other bus,
1495 * assume that is the correct DDC bus.
1496 */
1497 if (edid == NULL)
1498 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001499 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001500
1501 /*
1502 * When there is no edid and no monitor is connected with VGA
1503 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001504 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001505 if (edid == NULL)
1506 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001507
Chris Wilson2f551c82010-09-15 10:42:50 +01001508 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001509 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001510 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001511 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1512 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001513 if (intel_sdvo->is_hdmi) {
1514 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1515 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1516 }
Chris Wilson139467432011-02-09 20:01:16 +00001517 } else
1518 status = connector_status_disconnected;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001519 kfree(edid);
1520 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001521
1522 if (status == connector_status_connected) {
1523 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001524 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1525 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001526 }
1527
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001528 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001529}
1530
Chris Wilson52220082011-06-20 14:45:50 +01001531static bool
1532intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1533 struct edid *edid)
1534{
1535 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1536 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1537
1538 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1539 connector_is_digital, monitor_is_digital);
1540 return connector_is_digital == monitor_is_digital;
1541}
1542
Chris Wilson7b334fc2010-09-09 23:51:02 +01001543static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001544intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001545{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001546 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001547 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001548 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001549 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001550
Chris Wilsonfc373812012-11-23 11:57:56 +00001551 if (!intel_sdvo_get_value(intel_sdvo,
1552 SDVO_CMD_GET_ATTACHED_DISPLAYS,
1553 &response, 2))
Chris Wilson32aad862010-08-04 13:50:25 +01001554 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001555
Chris Wilsone957d772010-09-24 12:52:03 +01001556 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1557 response & 0xff, response >> 8,
1558 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001559
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001560 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001561 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001562
Chris Wilsonea5b2132010-08-04 13:50:23 +01001563 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001564
Chris Wilson97aaf912011-01-04 20:10:52 +00001565 intel_sdvo->has_hdmi_monitor = false;
1566 intel_sdvo->has_hdmi_audio = false;
1567
Chris Wilson615fb932010-08-04 13:50:24 +01001568 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001569 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001570 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001571 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001572 else {
1573 struct edid *edid;
1574
1575 /* if we have an edid check it matches the connection */
1576 edid = intel_sdvo_get_edid(connector);
1577 if (edid == NULL)
1578 edid = intel_sdvo_get_analog_edid(connector);
1579 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001580 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1581 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001582 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001583 else
1584 ret = connector_status_disconnected;
1585
Chris Wilson139467432011-02-09 20:01:16 +00001586 kfree(edid);
1587 } else
1588 ret = connector_status_connected;
1589 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001590
1591 /* May update encoder flag for like clock for SDVO TV, etc.*/
1592 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001593 intel_sdvo->is_tv = false;
1594 intel_sdvo->is_lvds = false;
1595 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001596
1597 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001598 intel_sdvo->is_tv = true;
1599 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001600 }
1601 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001602 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001603 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001604
1605 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001606}
1607
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001608static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001609{
Chris Wilsonff482d82010-09-15 10:40:38 +01001610 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001611
1612 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001613 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001614
Keith Packard57cdaf92009-09-04 13:07:54 +08001615 /*
1616 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1617 * link between analog and digital outputs. So, if the regular SDVO
1618 * DDC fails, check to see if the analog output is disconnected, in
1619 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001620 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001621 if (edid == NULL)
1622 edid = intel_sdvo_get_analog_edid(connector);
1623
Chris Wilsonff482d82010-09-15 10:40:38 +01001624 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001625 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1626 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001627 drm_mode_connector_update_edid_property(connector, edid);
1628 drm_add_edid_modes(connector, edid);
1629 }
Chris Wilson139467432011-02-09 20:01:16 +00001630
Chris Wilsonff482d82010-09-15 10:40:38 +01001631 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001632 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001633}
1634
1635/*
1636 * Set of SDVO TV modes.
1637 * Note! This is in reply order (see loop in get_tv_modes).
1638 * XXX: all 60Hz refresh?
1639 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001640static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001641 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1642 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001643 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001644 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1645 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001646 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001647 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1648 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001649 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001650 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1651 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001652 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001653 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1654 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001655 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001656 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1657 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001658 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001659 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1660 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001661 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001662 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1663 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001664 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001665 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1666 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001667 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001668 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1669 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001670 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001671 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1672 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001673 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001674 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1675 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001676 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001677 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1678 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001679 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001680 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1681 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001682 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001683 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1684 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001685 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001686 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1687 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001688 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001689 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1690 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001691 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001692 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1693 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001694 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001695 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1696 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001697 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1698};
1699
1700static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1701{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001702 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001703 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001704 uint32_t reply = 0, format_map = 0;
1705 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001706
1707 /* Read the list of supported input resolutions for the selected TV
1708 * format.
1709 */
Chris Wilson40039752010-08-04 13:50:26 +01001710 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001711 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001712 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001713
Chris Wilson32aad862010-08-04 13:50:25 +01001714 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1715 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001716
Chris Wilson32aad862010-08-04 13:50:25 +01001717 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001718 if (!intel_sdvo_write_cmd(intel_sdvo,
1719 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001720 &tv_res, sizeof(tv_res)))
1721 return;
1722 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001723 return;
1724
1725 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001726 if (reply & (1 << i)) {
1727 struct drm_display_mode *nmode;
1728 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001729 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001730 if (nmode)
1731 drm_mode_probed_add(connector, nmode);
1732 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001733}
1734
Ma Ling7086c872009-05-13 11:20:06 +08001735static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1736{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001737 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001738 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001739 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001740
1741 /*
1742 * Attempt to get the mode list from DDC.
1743 * Assume that the preferred modes are
1744 * arranged in priority order.
1745 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001746 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001747 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001748 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001749
1750 /* Fetch modes from VBT */
1751 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001752 newmode = drm_mode_duplicate(connector->dev,
1753 dev_priv->sdvo_lvds_vbt_mode);
1754 if (newmode != NULL) {
1755 /* Guarantee the mode is preferred */
1756 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1757 DRM_MODE_TYPE_DRIVER);
1758 drm_mode_probed_add(connector, newmode);
1759 }
1760 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001761
1762end:
1763 list_for_each_entry(newmode, &connector->probed_modes, head) {
1764 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001765 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001766 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001767
Chris Wilson85454232010-08-08 14:28:23 +01001768 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001769 break;
1770 }
1771 }
1772
Ma Ling7086c872009-05-13 11:20:06 +08001773}
1774
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001775static int intel_sdvo_get_modes(struct drm_connector *connector)
1776{
Chris Wilson615fb932010-08-04 13:50:24 +01001777 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001778
Chris Wilson615fb932010-08-04 13:50:24 +01001779 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001780 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001781 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001782 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001783 else
1784 intel_sdvo_get_ddc_modes(connector);
1785
Chris Wilson32aad862010-08-04 13:50:25 +01001786 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001787}
1788
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001789static void
1790intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001791{
Chris Wilson615fb932010-08-04 13:50:24 +01001792 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001793 struct drm_device *dev = connector->dev;
1794
Chris Wilsonc5521702010-08-04 13:50:28 +01001795 if (intel_sdvo_connector->left)
1796 drm_property_destroy(dev, intel_sdvo_connector->left);
1797 if (intel_sdvo_connector->right)
1798 drm_property_destroy(dev, intel_sdvo_connector->right);
1799 if (intel_sdvo_connector->top)
1800 drm_property_destroy(dev, intel_sdvo_connector->top);
1801 if (intel_sdvo_connector->bottom)
1802 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1803 if (intel_sdvo_connector->hpos)
1804 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1805 if (intel_sdvo_connector->vpos)
1806 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1807 if (intel_sdvo_connector->saturation)
1808 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1809 if (intel_sdvo_connector->contrast)
1810 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1811 if (intel_sdvo_connector->hue)
1812 drm_property_destroy(dev, intel_sdvo_connector->hue);
1813 if (intel_sdvo_connector->sharpness)
1814 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1815 if (intel_sdvo_connector->flicker_filter)
1816 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1817 if (intel_sdvo_connector->flicker_filter_2d)
1818 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1819 if (intel_sdvo_connector->flicker_filter_adaptive)
1820 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1821 if (intel_sdvo_connector->tv_luma_filter)
1822 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1823 if (intel_sdvo_connector->tv_chroma_filter)
1824 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001825 if (intel_sdvo_connector->dot_crawl)
1826 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001827 if (intel_sdvo_connector->brightness)
1828 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001829}
1830
Jesse Barnes79e53942008-11-07 14:24:08 -08001831static void intel_sdvo_destroy(struct drm_connector *connector)
1832{
Chris Wilson615fb932010-08-04 13:50:24 +01001833 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001834
Chris Wilsonc5521702010-08-04 13:50:28 +01001835 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001836 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001837 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001838
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001839 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001840 drm_sysfs_connector_remove(connector);
1841 drm_connector_cleanup(connector);
Jani Nikula4b745b12012-11-12 18:31:36 +02001842 kfree(intel_sdvo_connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001843}
1844
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001845static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1846{
1847 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1848 struct edid *edid;
1849 bool has_audio = false;
1850
1851 if (!intel_sdvo->is_hdmi)
1852 return false;
1853
1854 edid = intel_sdvo_get_edid(connector);
1855 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1856 has_audio = drm_detect_monitor_audio(edid);
Jani Nikula38ab8a22012-08-15 12:32:36 +03001857 kfree(edid);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001858
1859 return has_audio;
1860}
1861
Zhao Yakuice6feab2009-08-24 13:50:26 +08001862static int
1863intel_sdvo_set_property(struct drm_connector *connector,
1864 struct drm_property *property,
1865 uint64_t val)
1866{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001867 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001868 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001869 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001870 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001871 uint8_t cmd;
1872 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001873
Rob Clark662595d2012-10-11 20:36:04 -05001874 ret = drm_object_property_set_value(&connector->base, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001875 if (ret)
1876 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001877
Chris Wilson3f43c482011-05-12 22:17:24 +01001878 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001879 int i = val;
1880 bool has_audio;
1881
1882 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001883 return 0;
1884
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001885 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001886
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001887 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001888 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1889 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001890 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001891
1892 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001893 return 0;
1894
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001895 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001896 goto done;
1897 }
1898
Chris Wilsone953fd72011-02-21 22:23:52 +00001899 if (property == dev_priv->broadcast_rgb_property) {
1900 if (val == !!intel_sdvo->color_range)
1901 return 0;
1902
1903 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001904 goto done;
1905 }
1906
Chris Wilsonc5521702010-08-04 13:50:28 +01001907#define CHECK_PROPERTY(name, NAME) \
1908 if (intel_sdvo_connector->name == property) { \
1909 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1910 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1911 cmd = SDVO_CMD_SET_##NAME; \
1912 intel_sdvo_connector->cur_##name = temp_value; \
1913 goto set_value; \
1914 }
1915
1916 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001917 if (val >= TV_FORMAT_NUM)
1918 return -EINVAL;
1919
Chris Wilson40039752010-08-04 13:50:26 +01001920 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001921 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001922 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001923
Chris Wilson40039752010-08-04 13:50:26 +01001924 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001925 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001926 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001927 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001928 if (intel_sdvo_connector->left == property) {
Rob Clark662595d2012-10-11 20:36:04 -05001929 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01001930 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001931 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001932 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001933
Chris Wilson615fb932010-08-04 13:50:24 +01001934 intel_sdvo_connector->left_margin = temp_value;
1935 intel_sdvo_connector->right_margin = temp_value;
1936 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001937 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001938 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001939 goto set_value;
1940 } else if (intel_sdvo_connector->right == property) {
Rob Clark662595d2012-10-11 20:36:04 -05001941 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01001942 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001943 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001944 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001945
Chris Wilson615fb932010-08-04 13:50:24 +01001946 intel_sdvo_connector->left_margin = temp_value;
1947 intel_sdvo_connector->right_margin = temp_value;
1948 temp_value = intel_sdvo_connector->max_hscan -
1949 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001950 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001951 goto set_value;
1952 } else if (intel_sdvo_connector->top == property) {
Rob Clark662595d2012-10-11 20:36:04 -05001953 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01001954 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001955 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001956 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001957
Chris Wilson615fb932010-08-04 13:50:24 +01001958 intel_sdvo_connector->top_margin = temp_value;
1959 intel_sdvo_connector->bottom_margin = temp_value;
1960 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001961 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001962 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001963 goto set_value;
1964 } else if (intel_sdvo_connector->bottom == property) {
Rob Clark662595d2012-10-11 20:36:04 -05001965 drm_object_property_set_value(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01001966 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001967 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001968 return 0;
1969
Chris Wilson615fb932010-08-04 13:50:24 +01001970 intel_sdvo_connector->top_margin = temp_value;
1971 intel_sdvo_connector->bottom_margin = temp_value;
1972 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001973 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001974 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001975 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001976 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001977 CHECK_PROPERTY(hpos, HPOS)
1978 CHECK_PROPERTY(vpos, VPOS)
1979 CHECK_PROPERTY(saturation, SATURATION)
1980 CHECK_PROPERTY(contrast, CONTRAST)
1981 CHECK_PROPERTY(hue, HUE)
1982 CHECK_PROPERTY(brightness, BRIGHTNESS)
1983 CHECK_PROPERTY(sharpness, SHARPNESS)
1984 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1985 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1986 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1987 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1988 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001989 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001990 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001991
1992 return -EINVAL; /* unknown property */
1993
1994set_value:
1995 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1996 return -EIO;
1997
1998
1999done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01002000 if (intel_sdvo->base.base.crtc) {
2001 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Daniel Vettera6778b32012-07-02 09:56:42 +02002002 intel_set_mode(crtc, &crtc->mode,
2003 crtc->x, crtc->y, crtc->fb);
Chris Wilsonc5521702010-08-04 13:50:28 +01002004 }
2005
Chris Wilson32aad862010-08-04 13:50:25 +01002006 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01002007#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08002008}
2009
Jesse Barnes79e53942008-11-07 14:24:08 -08002010static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
Jesse Barnes79e53942008-11-07 14:24:08 -08002011 .mode_fixup = intel_sdvo_mode_fixup,
Jesse Barnes79e53942008-11-07 14:24:08 -08002012 .mode_set = intel_sdvo_mode_set,
Daniel Vetter1f703852012-07-11 16:51:39 +02002013 .disable = intel_encoder_noop,
Jesse Barnes79e53942008-11-07 14:24:08 -08002014};
2015
2016static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Daniel Vetterb2cabb02012-07-01 22:42:24 +02002017 .dpms = intel_sdvo_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08002018 .detect = intel_sdvo_detect,
2019 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08002020 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08002021 .destroy = intel_sdvo_destroy,
2022};
2023
2024static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2025 .get_modes = intel_sdvo_get_modes,
2026 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01002027 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08002028};
2029
Hannes Ederb358d0a2008-12-18 21:18:47 +01002030static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08002031{
Chris Wilson890f3352010-09-14 16:46:59 +01002032 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002033
Chris Wilsonea5b2132010-08-04 13:50:23 +01002034 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002035 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002036 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08002037
Chris Wilsone957d772010-09-24 12:52:03 +01002038 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002039 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08002040}
2041
2042static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2043 .destroy = intel_sdvo_enc_destroy,
2044};
2045
Chris Wilsonb66d8422010-08-12 15:26:41 +01002046static void
2047intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2048{
2049 uint16_t mask = 0;
2050 unsigned int num_bits;
2051
2052 /* Make a mask of outputs less than or equal to our own priority in the
2053 * list.
2054 */
2055 switch (sdvo->controlled_output) {
2056 case SDVO_OUTPUT_LVDS1:
2057 mask |= SDVO_OUTPUT_LVDS1;
2058 case SDVO_OUTPUT_LVDS0:
2059 mask |= SDVO_OUTPUT_LVDS0;
2060 case SDVO_OUTPUT_TMDS1:
2061 mask |= SDVO_OUTPUT_TMDS1;
2062 case SDVO_OUTPUT_TMDS0:
2063 mask |= SDVO_OUTPUT_TMDS0;
2064 case SDVO_OUTPUT_RGB1:
2065 mask |= SDVO_OUTPUT_RGB1;
2066 case SDVO_OUTPUT_RGB0:
2067 mask |= SDVO_OUTPUT_RGB0;
2068 break;
2069 }
2070
2071 /* Count bits to find what number we are in the priority list. */
2072 mask &= sdvo->caps.output_flags;
2073 num_bits = hweight16(mask);
2074 /* If more than 3 outputs, default to DDC bus 3 for now. */
2075 if (num_bits > 3)
2076 num_bits = 3;
2077
2078 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2079 sdvo->ddc_bus = 1 << num_bits;
2080}
Jesse Barnes79e53942008-11-07 14:24:08 -08002081
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002082/**
2083 * Choose the appropriate DDC bus for control bus switch command for this
2084 * SDVO output based on the controlled output.
2085 *
2086 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2087 * outputs, then LVDS outputs.
2088 */
2089static void
Adam Jacksonb1083332010-04-23 16:07:40 -04002090intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002091 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002092{
Adam Jacksonb1083332010-04-23 16:07:40 -04002093 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002094
Daniel Vettereef4eac2012-03-23 23:43:35 +01002095 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04002096 mapping = &(dev_priv->sdvo_mappings[0]);
2097 else
2098 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002099
Chris Wilsonb66d8422010-08-12 15:26:41 +01002100 if (mapping->initialized)
2101 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2102 else
2103 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002104}
2105
Chris Wilsone957d772010-09-24 12:52:03 +01002106static void
2107intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2108 struct intel_sdvo *sdvo, u32 reg)
2109{
2110 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04002111 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01002112
Daniel Vettereef4eac2012-03-23 23:43:35 +01002113 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01002114 mapping = &dev_priv->sdvo_mappings[0];
2115 else
2116 mapping = &dev_priv->sdvo_mappings[1];
2117
Jani Nikula6cb16122012-10-22 16:12:17 +03002118 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
Chris Wilsone957d772010-09-24 12:52:03 +01002119 pin = mapping->i2c_pin;
Jani Nikula6cb16122012-10-22 16:12:17 +03002120 else
2121 pin = GMBUS_PORT_DPB;
Chris Wilsone957d772010-09-24 12:52:03 +01002122
Jani Nikula6cb16122012-10-22 16:12:17 +03002123 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2124
2125 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2126 * our code totally fails once we start using gmbus. Hence fall back to
2127 * bit banging for now. */
2128 intel_gmbus_force_bit(sdvo->i2c, true);
Chris Wilsone957d772010-09-24 12:52:03 +01002129}
2130
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002131/* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2132static void
2133intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2134{
2135 intel_gmbus_force_bit(sdvo->i2c, false);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002136}
2137
2138static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01002139intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002140{
Chris Wilson97aaf912011-01-04 20:10:52 +00002141 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002142}
2143
yakui_zhao714605e2009-05-31 17:18:07 +08002144static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01002145intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08002146{
2147 struct drm_i915_private *dev_priv = dev->dev_private;
2148 struct sdvo_device_mapping *my_mapping, *other_mapping;
2149
Daniel Vettereef4eac2012-03-23 23:43:35 +01002150 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08002151 my_mapping = &dev_priv->sdvo_mappings[0];
2152 other_mapping = &dev_priv->sdvo_mappings[1];
2153 } else {
2154 my_mapping = &dev_priv->sdvo_mappings[1];
2155 other_mapping = &dev_priv->sdvo_mappings[0];
2156 }
2157
2158 /* If the BIOS described our SDVO device, take advantage of it. */
2159 if (my_mapping->slave_addr)
2160 return my_mapping->slave_addr;
2161
2162 /* If the BIOS only described a different SDVO device, use the
2163 * address that it isn't using.
2164 */
2165 if (other_mapping->slave_addr) {
2166 if (other_mapping->slave_addr == 0x70)
2167 return 0x72;
2168 else
2169 return 0x70;
2170 }
2171
2172 /* No SDVO device info is found for another DVO port,
2173 * so use mapping assumption we had before BIOS parsing.
2174 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01002175 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08002176 return 0x70;
2177 else
2178 return 0x72;
2179}
2180
Zhenyu Wang14571b42010-03-30 14:06:33 +08002181static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01002182intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2183 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002184{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002185 drm_connector_init(encoder->base.base.dev,
2186 &connector->base.base,
2187 &intel_sdvo_connector_funcs,
2188 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002189
Chris Wilsondf0e9242010-09-09 16:20:55 +01002190 drm_connector_helper_add(&connector->base.base,
2191 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002192
Peter Ross8f4839e2012-01-28 14:49:25 +01002193 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002194 connector->base.base.doublescan_allowed = 0;
2195 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002196 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002197
Chris Wilsondf0e9242010-09-09 16:20:55 +01002198 intel_connector_attach_encoder(&connector->base, &encoder->base);
2199 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002200}
2201
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002202static void
2203intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2204{
2205 struct drm_device *dev = connector->base.base.dev;
2206
Chris Wilson3f43c482011-05-12 22:17:24 +01002207 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00002208 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2209 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002210}
2211
Zhenyu Wang14571b42010-03-30 14:06:33 +08002212static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002213intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002214{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002215 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002216 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002217 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002218 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002219 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002220
Chris Wilson615fb932010-08-04 13:50:24 +01002221 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2222 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002223 return false;
2224
Zhenyu Wang14571b42010-03-30 14:06:33 +08002225 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002226 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002227 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002228 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002229 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002230 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002231 }
2232
Chris Wilson615fb932010-08-04 13:50:24 +01002233 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002234 connector = &intel_connector->base;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002235 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2236 intel_sdvo_connector->output_flag) {
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002237 connector->polled = DRM_CONNECTOR_POLL_HPD;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002238 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002239 /* Some SDVO devices have one-shot hotplug interrupts.
2240 * Ensure that they get re-enabled when an interrupt happens.
2241 */
2242 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2243 intel_sdvo_enable_hotplug(intel_encoder);
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002244 } else {
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002245 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002246 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002247 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2248 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2249
Chris Wilsone27d8532010-10-22 09:15:22 +01002250 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002251 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002252 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002253 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002254
Chris Wilsondf0e9242010-09-09 16:20:55 +01002255 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002256 if (intel_sdvo->is_hdmi)
2257 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002258
2259 return true;
2260}
2261
2262static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002263intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002264{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002265 struct drm_encoder *encoder = &intel_sdvo->base.base;
2266 struct drm_connector *connector;
2267 struct intel_connector *intel_connector;
2268 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002269
Chris Wilson615fb932010-08-04 13:50:24 +01002270 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2271 if (!intel_sdvo_connector)
2272 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002273
Chris Wilson615fb932010-08-04 13:50:24 +01002274 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002275 connector = &intel_connector->base;
2276 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2277 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002278
Chris Wilson4ef69c72010-09-09 15:14:28 +01002279 intel_sdvo->controlled_output |= type;
2280 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002281
Chris Wilson4ef69c72010-09-09 15:14:28 +01002282 intel_sdvo->is_tv = true;
2283 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002284
Chris Wilsondf0e9242010-09-09 16:20:55 +01002285 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002286
Chris Wilson4ef69c72010-09-09 15:14:28 +01002287 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002288 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002289
Chris Wilson4ef69c72010-09-09 15:14:28 +01002290 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002291 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002292
Chris Wilson4ef69c72010-09-09 15:14:28 +01002293 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002294
2295err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002296 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002297 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002298}
2299
2300static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002301intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002302{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002303 struct drm_encoder *encoder = &intel_sdvo->base.base;
2304 struct drm_connector *connector;
2305 struct intel_connector *intel_connector;
2306 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002307
Chris Wilson615fb932010-08-04 13:50:24 +01002308 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2309 if (!intel_sdvo_connector)
2310 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002311
Chris Wilson615fb932010-08-04 13:50:24 +01002312 intel_connector = &intel_sdvo_connector->base;
2313 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002314 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2315 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2316 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002317
Chris Wilson4ef69c72010-09-09 15:14:28 +01002318 if (device == 0) {
2319 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2320 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2321 } else if (device == 1) {
2322 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2323 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2324 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002325
Chris Wilsondf0e9242010-09-09 16:20:55 +01002326 intel_sdvo_connector_init(intel_sdvo_connector,
2327 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002328 return true;
2329}
2330
2331static bool
2332intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2333{
2334 struct drm_encoder *encoder = &intel_sdvo->base.base;
2335 struct drm_connector *connector;
2336 struct intel_connector *intel_connector;
2337 struct intel_sdvo_connector *intel_sdvo_connector;
2338
2339 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2340 if (!intel_sdvo_connector)
2341 return false;
2342
2343 intel_connector = &intel_sdvo_connector->base;
2344 connector = &intel_connector->base;
2345 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2346 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2347
2348 if (device == 0) {
2349 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2350 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2351 } else if (device == 1) {
2352 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2353 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2354 }
2355
Chris Wilsondf0e9242010-09-09 16:20:55 +01002356 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002357 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002358 goto err;
2359
2360 return true;
2361
2362err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002363 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002364 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002365}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002366
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002367static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002368intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002369{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002370 intel_sdvo->is_tv = false;
2371 intel_sdvo->base.needs_tv_clock = false;
2372 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002373
Zhenyu Wang14571b42010-03-30 14:06:33 +08002374 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002375
Zhenyu Wang14571b42010-03-30 14:06:33 +08002376 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002377 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002378 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002379
Zhenyu Wang14571b42010-03-30 14:06:33 +08002380 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002381 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002382 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002383
Zhenyu Wang14571b42010-03-30 14:06:33 +08002384 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002385 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002386 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002387 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002388
Zhenyu Wang14571b42010-03-30 14:06:33 +08002389 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002390 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002391 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002392
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002393 if (flags & SDVO_OUTPUT_YPRPB0)
2394 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2395 return false;
2396
Zhenyu Wang14571b42010-03-30 14:06:33 +08002397 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002398 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002399 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002400
Zhenyu Wang14571b42010-03-30 14:06:33 +08002401 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002402 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002403 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002404
Zhenyu Wang14571b42010-03-30 14:06:33 +08002405 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002406 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002407 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002408
Zhenyu Wang14571b42010-03-30 14:06:33 +08002409 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002410 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002411 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002412
Zhenyu Wang14571b42010-03-30 14:06:33 +08002413 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002414 unsigned char bytes[2];
2415
Chris Wilsonea5b2132010-08-04 13:50:23 +01002416 intel_sdvo->controlled_output = 0;
2417 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002418 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002419 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002420 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002421 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002422 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002423 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002424
Zhenyu Wang14571b42010-03-30 14:06:33 +08002425 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002426}
2427
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002428static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2429{
2430 struct drm_device *dev = intel_sdvo->base.base.dev;
2431 struct drm_connector *connector, *tmp;
2432
2433 list_for_each_entry_safe(connector, tmp,
2434 &dev->mode_config.connector_list, head) {
2435 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2436 intel_sdvo_destroy(connector);
2437 }
2438}
2439
Chris Wilson32aad862010-08-04 13:50:25 +01002440static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2441 struct intel_sdvo_connector *intel_sdvo_connector,
2442 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002443{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002444 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002445 struct intel_sdvo_tv_format format;
2446 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002447
Chris Wilson32aad862010-08-04 13:50:25 +01002448 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2449 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002450
Chris Wilson1a3665c2011-01-25 13:59:37 +00002451 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002452 if (!intel_sdvo_get_value(intel_sdvo,
2453 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2454 &format, sizeof(format)))
2455 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002456
Chris Wilson32aad862010-08-04 13:50:25 +01002457 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002458
2459 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002460 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002461
Chris Wilson615fb932010-08-04 13:50:24 +01002462 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002463 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002464 if (format_map & (1 << i))
2465 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002466
2467
Chris Wilsonc5521702010-08-04 13:50:28 +01002468 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002469 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2470 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002471 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002472 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002473
Chris Wilson615fb932010-08-04 13:50:24 +01002474 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002475 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002476 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002477 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002478
Chris Wilson40039752010-08-04 13:50:26 +01002479 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Rob Clark662595d2012-10-11 20:36:04 -05002480 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002481 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002482 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002483
2484}
2485
Chris Wilsonc5521702010-08-04 13:50:28 +01002486#define ENHANCEMENT(name, NAME) do { \
2487 if (enhancements.name) { \
2488 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2489 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2490 return false; \
2491 intel_sdvo_connector->max_##name = data_value[0]; \
2492 intel_sdvo_connector->cur_##name = response; \
2493 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002494 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002495 if (!intel_sdvo_connector->name) return false; \
Rob Clark662595d2012-10-11 20:36:04 -05002496 drm_object_attach_property(&connector->base, \
Chris Wilsonc5521702010-08-04 13:50:28 +01002497 intel_sdvo_connector->name, \
2498 intel_sdvo_connector->cur_##name); \
2499 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2500 data_value[0], data_value[1], response); \
2501 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002502} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002503
2504static bool
2505intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2506 struct intel_sdvo_connector *intel_sdvo_connector,
2507 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002508{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002509 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002510 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002511 uint16_t response, data_value[2];
2512
Chris Wilsonc5521702010-08-04 13:50:28 +01002513 /* when horizontal overscan is supported, Add the left/right property */
2514 if (enhancements.overscan_h) {
2515 if (!intel_sdvo_get_value(intel_sdvo,
2516 SDVO_CMD_GET_MAX_OVERSCAN_H,
2517 &data_value, 4))
2518 return false;
2519
2520 if (!intel_sdvo_get_value(intel_sdvo,
2521 SDVO_CMD_GET_OVERSCAN_H,
2522 &response, 2))
2523 return false;
2524
2525 intel_sdvo_connector->max_hscan = data_value[0];
2526 intel_sdvo_connector->left_margin = data_value[0] - response;
2527 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2528 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002529 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002530 if (!intel_sdvo_connector->left)
2531 return false;
2532
Rob Clark662595d2012-10-11 20:36:04 -05002533 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002534 intel_sdvo_connector->left,
2535 intel_sdvo_connector->left_margin);
2536
2537 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002538 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002539 if (!intel_sdvo_connector->right)
2540 return false;
2541
Rob Clark662595d2012-10-11 20:36:04 -05002542 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002543 intel_sdvo_connector->right,
2544 intel_sdvo_connector->right_margin);
2545 DRM_DEBUG_KMS("h_overscan: max %d, "
2546 "default %d, current %d\n",
2547 data_value[0], data_value[1], response);
2548 }
2549
2550 if (enhancements.overscan_v) {
2551 if (!intel_sdvo_get_value(intel_sdvo,
2552 SDVO_CMD_GET_MAX_OVERSCAN_V,
2553 &data_value, 4))
2554 return false;
2555
2556 if (!intel_sdvo_get_value(intel_sdvo,
2557 SDVO_CMD_GET_OVERSCAN_V,
2558 &response, 2))
2559 return false;
2560
2561 intel_sdvo_connector->max_vscan = data_value[0];
2562 intel_sdvo_connector->top_margin = data_value[0] - response;
2563 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2564 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002565 drm_property_create_range(dev, 0,
2566 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002567 if (!intel_sdvo_connector->top)
2568 return false;
2569
Rob Clark662595d2012-10-11 20:36:04 -05002570 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002571 intel_sdvo_connector->top,
2572 intel_sdvo_connector->top_margin);
2573
2574 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002575 drm_property_create_range(dev, 0,
2576 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002577 if (!intel_sdvo_connector->bottom)
2578 return false;
2579
Rob Clark662595d2012-10-11 20:36:04 -05002580 drm_object_attach_property(&connector->base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002581 intel_sdvo_connector->bottom,
2582 intel_sdvo_connector->bottom_margin);
2583 DRM_DEBUG_KMS("v_overscan: max %d, "
2584 "default %d, current %d\n",
2585 data_value[0], data_value[1], response);
2586 }
2587
2588 ENHANCEMENT(hpos, HPOS);
2589 ENHANCEMENT(vpos, VPOS);
2590 ENHANCEMENT(saturation, SATURATION);
2591 ENHANCEMENT(contrast, CONTRAST);
2592 ENHANCEMENT(hue, HUE);
2593 ENHANCEMENT(sharpness, SHARPNESS);
2594 ENHANCEMENT(brightness, BRIGHTNESS);
2595 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2596 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2597 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2598 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2599 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2600
Chris Wilsone0442182010-08-04 13:50:29 +01002601 if (enhancements.dot_crawl) {
2602 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2603 return false;
2604
2605 intel_sdvo_connector->max_dot_crawl = 1;
2606 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2607 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002608 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002609 if (!intel_sdvo_connector->dot_crawl)
2610 return false;
2611
Rob Clark662595d2012-10-11 20:36:04 -05002612 drm_object_attach_property(&connector->base,
Chris Wilsone0442182010-08-04 13:50:29 +01002613 intel_sdvo_connector->dot_crawl,
2614 intel_sdvo_connector->cur_dot_crawl);
2615 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2616 }
2617
Chris Wilsonc5521702010-08-04 13:50:28 +01002618 return true;
2619}
2620
2621static bool
2622intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2623 struct intel_sdvo_connector *intel_sdvo_connector,
2624 struct intel_sdvo_enhancements_reply enhancements)
2625{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002626 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002627 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2628 uint16_t response, data_value[2];
2629
2630 ENHANCEMENT(brightness, BRIGHTNESS);
2631
2632 return true;
2633}
2634#undef ENHANCEMENT
2635
2636static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2637 struct intel_sdvo_connector *intel_sdvo_connector)
2638{
2639 union {
2640 struct intel_sdvo_enhancements_reply reply;
2641 uint16_t response;
2642 } enhancements;
2643
Chris Wilson1a3665c2011-01-25 13:59:37 +00002644 BUILD_BUG_ON(sizeof(enhancements) != 2);
2645
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002646 enhancements.response = 0;
2647 intel_sdvo_get_value(intel_sdvo,
2648 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2649 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002650 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002651 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002652 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002653 }
Chris Wilson32aad862010-08-04 13:50:25 +01002654
Chris Wilsonc5521702010-08-04 13:50:28 +01002655 if (IS_TV(intel_sdvo_connector))
2656 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002657 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002658 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2659 else
2660 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002661}
Chris Wilson32aad862010-08-04 13:50:25 +01002662
Chris Wilsone957d772010-09-24 12:52:03 +01002663static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2664 struct i2c_msg *msgs,
2665 int num)
2666{
2667 struct intel_sdvo *sdvo = adapter->algo_data;
2668
2669 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2670 return -EIO;
2671
2672 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2673}
2674
2675static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2676{
2677 struct intel_sdvo *sdvo = adapter->algo_data;
2678 return sdvo->i2c->algo->functionality(sdvo->i2c);
2679}
2680
2681static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2682 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2683 .functionality = intel_sdvo_ddc_proxy_func
2684};
2685
2686static bool
2687intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2688 struct drm_device *dev)
2689{
2690 sdvo->ddc.owner = THIS_MODULE;
2691 sdvo->ddc.class = I2C_CLASS_DDC;
2692 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2693 sdvo->ddc.dev.parent = &dev->pdev->dev;
2694 sdvo->ddc.algo_data = sdvo;
2695 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2696
2697 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002698}
2699
Daniel Vettereef4eac2012-03-23 23:43:35 +01002700bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002701{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002702 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002703 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002704 struct intel_sdvo *intel_sdvo;
Chris Wilson084b6122012-05-11 18:01:33 +01002705 u32 hotplug_mask;
Jesse Barnes79e53942008-11-07 14:24:08 -08002706 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002707
Chris Wilsonea5b2132010-08-04 13:50:23 +01002708 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2709 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002710 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002711
Chris Wilson56184e32011-05-17 14:03:50 +01002712 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002713 intel_sdvo->is_sdvob = is_sdvob;
2714 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002715 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002716 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2717 goto err_i2c_bus;
Chris Wilsone957d772010-09-24 12:52:03 +01002718
Chris Wilson56184e32011-05-17 14:03:50 +01002719 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002720 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002721 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002722 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002723
Jesse Barnes79e53942008-11-07 14:24:08 -08002724 /* Read the regs to test if we can talk to the device */
2725 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002726 u8 byte;
2727
2728 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002729 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2730 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002731 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002732 }
2733 }
2734
Chris Wilson084b6122012-05-11 18:01:33 +01002735 hotplug_mask = 0;
2736 if (IS_G4X(dev)) {
2737 hotplug_mask = intel_sdvo->is_sdvob ?
2738 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2739 } else if (IS_GEN4(dev)) {
2740 hotplug_mask = intel_sdvo->is_sdvob ?
2741 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2742 } else {
2743 hotplug_mask = intel_sdvo->is_sdvob ?
2744 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2745 }
Ma Ling619ac3b2009-05-18 16:12:46 +08002746
Chris Wilson4ef69c72010-09-09 15:14:28 +01002747 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002748
Daniel Vetterce22c322012-07-01 15:31:04 +02002749 intel_encoder->disable = intel_disable_sdvo;
2750 intel_encoder->enable = intel_enable_sdvo;
Daniel Vetter4ac41f42012-07-02 14:54:00 +02002751 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
Daniel Vetterce22c322012-07-01 15:31:04 +02002752
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002753 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002754 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002755 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002756
Chris Wilsonea5b2132010-08-04 13:50:23 +01002757 if (intel_sdvo_output_setup(intel_sdvo,
2758 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002759 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2760 SDVO_NAME(intel_sdvo));
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002761 /* Output_setup can leave behind connectors! */
2762 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002763 }
2764
Daniel Vettere506d6f2012-11-13 17:24:43 +01002765 /*
2766 * Cloning SDVO with anything is often impossible, since the SDVO
2767 * encoder can request a special input timing mode. And even if that's
2768 * not the case we have evidence that cloning a plain unscaled mode with
2769 * VGA doesn't really work. Furthermore the cloning flags are way too
2770 * simplistic anyway to express such constraints, so just give up on
2771 * cloning for SDVO encoders.
2772 */
2773 intel_sdvo->base.cloneable = false;
2774
Jani Nikulafcbc50d2012-08-29 14:08:42 +03002775 /* Only enable the hotplug irq if we need it, to work around noisy
2776 * hotplug lines.
2777 */
Jani Nikula5fa7ac92012-08-29 16:43:58 +03002778 if (intel_sdvo->hotplug_active)
Jani Nikulafcbc50d2012-08-29 14:08:42 +03002779 dev_priv->hotplug_supported_mask |= hotplug_mask;
2780
Chris Wilsonea5b2132010-08-04 13:50:23 +01002781 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002782
Jesse Barnes79e53942008-11-07 14:24:08 -08002783 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002784 if (!intel_sdvo_set_target_input(intel_sdvo))
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002785 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002786
Chris Wilson32aad862010-08-04 13:50:25 +01002787 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2788 &intel_sdvo->pixel_clock_min,
2789 &intel_sdvo->pixel_clock_max))
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002790 goto err_output;
Jesse Barnes79e53942008-11-07 14:24:08 -08002791
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002792 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002793 "clock range %dMHz - %dMHz, "
2794 "input 1: %c, input 2: %c, "
2795 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002796 SDVO_NAME(intel_sdvo),
2797 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2798 intel_sdvo->caps.device_rev_id,
2799 intel_sdvo->pixel_clock_min / 1000,
2800 intel_sdvo->pixel_clock_max / 1000,
2801 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2802 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002803 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002804 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002805 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002806 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002807 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002808 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002809
Jani Nikulad0ddfbd2012-11-12 18:31:35 +02002810err_output:
2811 intel_sdvo_output_cleanup(intel_sdvo);
2812
Chris Wilsonf899fc62010-07-20 15:44:45 -07002813err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002814 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002815 i2c_del_adapter(&intel_sdvo->ddc);
Jani Nikulafbfcc4f2012-10-22 16:12:18 +03002816err_i2c_bus:
2817 intel_sdvo_unselect_i2c_bus(intel_sdvo);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002818 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002819
Eric Anholt7d573822009-01-02 13:33:00 -08002820 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002821}