blob: b26e32f42656358cfab81f80b4e3e46d0d8b3b50 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
Michal Kaziorc5450702015-01-24 12:14:48 +020028#define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
29#define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
Kalle Valo5e3dd152013-06-12 20:52:10 +030030
31/* when under memory pressure rx ring refill may fail and needs a retry */
32#define HTT_RX_RING_REFILL_RETRY_MS 50
33
Michal Kaziorf6dc2092013-09-26 10:12:22 +030034static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020035static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030036
Michal Kaziorc5450702015-01-24 12:14:48 +020037static struct sk_buff *
38ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
39{
40 struct ath10k_skb_rxcb *rxcb;
41
42 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
43 if (rxcb->paddr == paddr)
44 return ATH10K_RXCB_SKB(rxcb);
45
46 WARN_ON_ONCE(1);
47 return NULL;
48}
49
Kalle Valo5e3dd152013-06-12 20:52:10 +030050static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
51{
52 struct sk_buff *skb;
Michal Kaziorc5450702015-01-24 12:14:48 +020053 struct ath10k_skb_rxcb *rxcb;
54 struct hlist_node *n;
Kalle Valo5e3dd152013-06-12 20:52:10 +030055 int i;
56
Michal Kaziorc5450702015-01-24 12:14:48 +020057 if (htt->rx_ring.in_ord_rx) {
58 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
59 skb = ATH10K_RXCB_SKB(rxcb);
60 dma_unmap_single(htt->ar->dev, rxcb->paddr,
61 skb->len + skb_tailroom(skb),
62 DMA_FROM_DEVICE);
63 hash_del(&rxcb->hlist);
64 dev_kfree_skb_any(skb);
65 }
66 } else {
67 for (i = 0; i < htt->rx_ring.size; i++) {
68 skb = htt->rx_ring.netbufs_ring[i];
69 if (!skb)
70 continue;
71
72 rxcb = ATH10K_SKB_RXCB(skb);
73 dma_unmap_single(htt->ar->dev, rxcb->paddr,
74 skb->len + skb_tailroom(skb),
75 DMA_FROM_DEVICE);
76 dev_kfree_skb_any(skb);
77 }
Kalle Valo5e3dd152013-06-12 20:52:10 +030078 }
79
80 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +020081 hash_init(htt->rx_ring.skb_table);
82 memset(htt->rx_ring.netbufs_ring, 0,
83 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
Kalle Valo5e3dd152013-06-12 20:52:10 +030084}
85
86static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
87{
88 struct htt_rx_desc *rx_desc;
Michal Kaziorc5450702015-01-24 12:14:48 +020089 struct ath10k_skb_rxcb *rxcb;
Kalle Valo5e3dd152013-06-12 20:52:10 +030090 struct sk_buff *skb;
91 dma_addr_t paddr;
92 int ret = 0, idx;
93
Michal Kaziorc5450702015-01-24 12:14:48 +020094 /* The Full Rx Reorder firmware has no way of telling the host
95 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
96 * To keep things simple make sure ring is always half empty. This
97 * guarantees there'll be no replenishment overruns possible.
98 */
99 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
100
Kalle Valo8cc7f262014-09-14 12:50:39 +0300101 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300102 while (num > 0) {
103 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
104 if (!skb) {
105 ret = -ENOMEM;
106 goto fail;
107 }
108
109 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
110 skb_pull(skb,
111 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
112 skb->data);
113
114 /* Clear rx_desc attention word before posting to Rx ring */
115 rx_desc = (struct htt_rx_desc *)skb->data;
116 rx_desc->attention.flags = __cpu_to_le32(0);
117
118 paddr = dma_map_single(htt->ar->dev, skb->data,
119 skb->len + skb_tailroom(skb),
120 DMA_FROM_DEVICE);
121
122 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
123 dev_kfree_skb_any(skb);
124 ret = -ENOMEM;
125 goto fail;
126 }
127
Michal Kaziorc5450702015-01-24 12:14:48 +0200128 rxcb = ATH10K_SKB_RXCB(skb);
129 rxcb->paddr = paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300130 htt->rx_ring.netbufs_ring[idx] = skb;
131 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
132 htt->rx_ring.fill_cnt++;
133
Michal Kaziorc5450702015-01-24 12:14:48 +0200134 if (htt->rx_ring.in_ord_rx) {
135 hash_add(htt->rx_ring.skb_table,
136 &ATH10K_SKB_RXCB(skb)->hlist,
137 (u32)paddr);
138 }
139
Kalle Valo5e3dd152013-06-12 20:52:10 +0300140 num--;
141 idx++;
142 idx &= htt->rx_ring.size_mask;
143 }
144
145fail:
Vasanthakumar Thiagarajan5de6dfc2015-01-09 22:49:46 +0530146 /*
147 * Make sure the rx buffer is updated before available buffer
148 * index to avoid any potential rx ring corruption.
149 */
150 mb();
Kalle Valo8cc7f262014-09-14 12:50:39 +0300151 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300152 return ret;
153}
154
155static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
156{
157 lockdep_assert_held(&htt->rx_ring.lock);
158 return __ath10k_htt_rx_ring_fill_n(htt, num);
159}
160
161static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
162{
Michal Kazior6e712d42013-09-24 10:18:36 +0200163 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300164
Michal Kazior6e712d42013-09-24 10:18:36 +0200165 /* Refilling the whole RX ring buffer proves to be a bad idea. The
166 * reason is RX may take up significant amount of CPU cycles and starve
167 * other tasks, e.g. TX on an ethernet device while acting as a bridge
168 * with ath10k wlan interface. This ended up with very poor performance
169 * once CPU the host system was overwhelmed with RX on ath10k.
170 *
171 * By limiting the number of refills the replenishing occurs
172 * progressively. This in turns makes use of the fact tasklets are
173 * processed in FIFO order. This means actual RX processing can starve
174 * out refilling. If there's not enough buffers on RX ring FW will not
175 * report RX until it is refilled with enough buffers. This
176 * automatically balances load wrt to CPU power.
177 *
178 * This probably comes at a cost of lower maximum throughput but
Ben Greear3eafdfd2015-02-15 16:50:39 +0200179 * improves the average and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300180 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200181 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
182 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
183 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300184 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
185 if (ret == -ENOMEM) {
186 /*
187 * Failed to fill it to the desired level -
188 * we'll start a timer and try again next time.
189 * As long as enough buffers are left in the ring for
190 * another A-MPDU rx, no special recovery is needed.
191 */
192 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
193 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200194 } else if (num_deficit > 0) {
195 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300196 }
197 spin_unlock_bh(&htt->rx_ring.lock);
198}
199
200static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
201{
202 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
Kalle Valoaf762c02014-09-14 12:50:17 +0300203
Kalle Valo5e3dd152013-06-12 20:52:10 +0300204 ath10k_htt_rx_msdu_buff_replenish(htt);
205}
206
Michal Kaziorc5450702015-01-24 12:14:48 +0200207int ath10k_htt_rx_ring_refill(struct ath10k *ar)
Michal Kazior3e841fd2014-05-14 16:23:31 +0300208{
Michal Kaziorc5450702015-01-24 12:14:48 +0200209 struct ath10k_htt *htt = &ar->htt;
210 int ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300211
Michal Kaziorc5450702015-01-24 12:14:48 +0200212 spin_lock_bh(&htt->rx_ring.lock);
213 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
214 htt->rx_ring.fill_cnt));
215 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior3e841fd2014-05-14 16:23:31 +0300216
Michal Kaziorc5450702015-01-24 12:14:48 +0200217 if (ret)
218 ath10k_htt_rx_ring_free(htt);
219
220 return ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300221}
222
Michal Kazior95bf21f2014-05-16 17:15:39 +0300223void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300224{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300225 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200226 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200227 tasklet_kill(&htt->txrx_compl_task);
228
229 skb_queue_purge(&htt->tx_compl_q);
230 skb_queue_purge(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200231 skb_queue_purge(&htt->rx_in_ord_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300232
Michal Kaziorc5450702015-01-24 12:14:48 +0200233 ath10k_htt_rx_ring_free(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300234
235 dma_free_coherent(htt->ar->dev,
236 (htt->rx_ring.size *
237 sizeof(htt->rx_ring.paddrs_ring)),
238 htt->rx_ring.paddrs_ring,
239 htt->rx_ring.base_paddr);
240
241 dma_free_coherent(htt->ar->dev,
242 sizeof(*htt->rx_ring.alloc_idx.vaddr),
243 htt->rx_ring.alloc_idx.vaddr,
244 htt->rx_ring.alloc_idx.paddr);
245
246 kfree(htt->rx_ring.netbufs_ring);
247}
248
249static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
250{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200251 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300252 int idx;
253 struct sk_buff *msdu;
254
Michal Kazior45967082014-02-27 18:50:05 +0200255 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256
Michal Kazior8d60ee82014-02-27 18:50:05 +0200257 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200258 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200259 return NULL;
260 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300261
262 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
263 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300264 htt->rx_ring.netbufs_ring[idx] = NULL;
Michal Kaziorc5450702015-01-24 12:14:48 +0200265 htt->rx_ring.paddrs_ring[idx] = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300266
267 idx++;
268 idx &= htt->rx_ring.size_mask;
269 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
270 htt->rx_ring.fill_cnt--;
271
Michal Kazior4de02802014-10-23 17:04:23 +0300272 dma_unmap_single(htt->ar->dev,
Michal Kazior8582bf32015-01-24 12:14:47 +0200273 ATH10K_SKB_RXCB(msdu)->paddr,
Michal Kazior4de02802014-10-23 17:04:23 +0300274 msdu->len + skb_tailroom(msdu),
275 DMA_FROM_DEVICE);
276 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
277 msdu->data, msdu->len + skb_tailroom(msdu));
Michal Kazior4de02802014-10-23 17:04:23 +0300278
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279 return msdu;
280}
281
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100282/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300283static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
284 u8 **fw_desc, int *fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +0200285 struct sk_buff_head *amsdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300286{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200287 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300288 int msdu_len, msdu_chaining = 0;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200289 struct sk_buff *msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300290 struct htt_rx_desc *rx_desc;
291
Michal Kazior45967082014-02-27 18:50:05 +0200292 lockdep_assert_held(&htt->rx_ring.lock);
293
Michal Kazior9aa505d2014-11-18 09:24:47 +0200294 for (;;) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300295 int last_msdu, msdu_len_invalid, msdu_chained;
296
Michal Kazior9aa505d2014-11-18 09:24:47 +0200297 msdu = ath10k_htt_rx_netbuf_pop(htt);
298 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200299 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200300 return -ENOENT;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200301 }
302
303 __skb_queue_tail(amsdu, msdu);
304
Kalle Valo5e3dd152013-06-12 20:52:10 +0300305 rx_desc = (struct htt_rx_desc *)msdu->data;
306
307 /* FIXME: we must report msdu payload since this is what caller
308 * expects now */
309 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
310 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
311
312 /*
313 * Sanity check - confirm the HW is finished filling in the
314 * rx data.
315 * If the HW and SW are working correctly, then it's guaranteed
316 * that the HW's MAC DMA is done before this point in the SW.
317 * To prevent the case that we handle a stale Rx descriptor,
318 * just assert for now until we have a way to recover.
319 */
320 if (!(__le32_to_cpu(rx_desc->attention.flags)
321 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200322 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200323 return -EIO;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300324 }
325
326 /*
327 * Copy the FW rx descriptor for this MSDU from the rx
328 * indication message into the MSDU's netbuf. HL uses the
329 * same rx indication message definition as LL, and simply
330 * appends new info (fields from the HW rx desc, and the
331 * MSDU payload itself). So, the offset into the rx
332 * indication message only has to account for the standard
333 * offset of the per-MSDU FW rx desc info within the
334 * message, and how many bytes of the per-MSDU FW rx desc
335 * info have already been consumed. (And the endianness of
336 * the host, since for a big-endian host, the rx ind
337 * message contents, including the per-MSDU rx desc bytes,
338 * were byteswapped during upload.)
339 */
340 if (*fw_desc_len > 0) {
341 rx_desc->fw_desc.info0 = **fw_desc;
342 /*
343 * The target is expected to only provide the basic
344 * per-MSDU rx descriptors. Just to be sure, verify
345 * that the target has not attached extension data
346 * (e.g. LRO flow ID).
347 */
348
349 /* or more, if there's extension data */
350 (*fw_desc)++;
351 (*fw_desc_len)--;
352 } else {
353 /*
354 * When an oversized AMSDU happened, FW will lost
355 * some of MSDU status - in this case, the FW
356 * descriptors provided will be less than the
357 * actual MSDUs inside this MPDU. Mark the FW
358 * descriptors so that it will still deliver to
359 * upper stack, if no CRC error for this MPDU.
360 *
361 * FIX THIS - the FW descriptors are actually for
362 * MSDUs in the end of this A-MSDU instead of the
363 * beginning.
364 */
365 rx_desc->fw_desc.info0 = 0;
366 }
367
368 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
369 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
370 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
371 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
372 RX_MSDU_START_INFO0_MSDU_LENGTH);
373 msdu_chained = rx_desc->frag_info.ring2_more_count;
374
375 if (msdu_len_invalid)
376 msdu_len = 0;
377
378 skb_trim(msdu, 0);
379 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
380 msdu_len -= msdu->len;
381
Michal Kazior9aa505d2014-11-18 09:24:47 +0200382 /* Note: Chained buffers do not contain rx descriptor */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300383 while (msdu_chained--) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200384 msdu = ath10k_htt_rx_netbuf_pop(htt);
385 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200386 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200387 return -ENOENT;
Michal Kaziorb30595a2014-10-23 17:04:24 +0300388 }
389
Michal Kazior9aa505d2014-11-18 09:24:47 +0200390 __skb_queue_tail(amsdu, msdu);
391 skb_trim(msdu, 0);
392 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
393 msdu_len -= msdu->len;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300394 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300395 }
396
Kalle Valo5e3dd152013-06-12 20:52:10 +0300397 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
398 RX_MSDU_END_INFO0_LAST_MSDU;
399
Michal Kaziorb04e2042014-10-23 17:04:27 +0300400 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300401 sizeof(*rx_desc) - sizeof(u32));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200402
403 if (last_msdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300404 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300405 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300406
Michal Kazior9aa505d2014-11-18 09:24:47 +0200407 if (skb_queue_empty(amsdu))
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100408 msdu_chaining = -1;
409
Kalle Valo5e3dd152013-06-12 20:52:10 +0300410 /*
411 * Don't refill the ring yet.
412 *
413 * First, the elements popped here are still in use - it is not
414 * safe to overwrite them until the matching call to
415 * mpdu_desc_list_next. Second, for efficiency it is preferable to
416 * refill the rx ring with 1 PPDU's worth of rx buffers (something
417 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
418 * (something like 3 buffers). Consequently, we'll rely on the txrx
419 * SW to tell us when it is done pulling all the PPDU's rx buffers
420 * out of the rx ring, and then refill it just once.
421 */
422
423 return msdu_chaining;
424}
425
Michal Kazior6e712d42013-09-24 10:18:36 +0200426static void ath10k_htt_rx_replenish_task(unsigned long ptr)
427{
428 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Kalle Valoaf762c02014-09-14 12:50:17 +0300429
Michal Kazior6e712d42013-09-24 10:18:36 +0200430 ath10k_htt_rx_msdu_buff_replenish(htt);
431}
432
Michal Kaziorc5450702015-01-24 12:14:48 +0200433static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
434 u32 paddr)
435{
436 struct ath10k *ar = htt->ar;
437 struct ath10k_skb_rxcb *rxcb;
438 struct sk_buff *msdu;
439
440 lockdep_assert_held(&htt->rx_ring.lock);
441
442 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
443 if (!msdu)
444 return NULL;
445
446 rxcb = ATH10K_SKB_RXCB(msdu);
447 hash_del(&rxcb->hlist);
448 htt->rx_ring.fill_cnt--;
449
450 dma_unmap_single(htt->ar->dev, rxcb->paddr,
451 msdu->len + skb_tailroom(msdu),
452 DMA_FROM_DEVICE);
453 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
454 msdu->data, msdu->len + skb_tailroom(msdu));
455
456 return msdu;
457}
458
459static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
460 struct htt_rx_in_ord_ind *ev,
461 struct sk_buff_head *list)
462{
463 struct ath10k *ar = htt->ar;
464 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
465 struct htt_rx_desc *rxd;
466 struct sk_buff *msdu;
467 int msdu_count;
468 bool is_offload;
469 u32 paddr;
470
471 lockdep_assert_held(&htt->rx_ring.lock);
472
473 msdu_count = __le16_to_cpu(ev->msdu_count);
474 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
475
476 while (msdu_count--) {
477 paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
478
479 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
480 if (!msdu) {
481 __skb_queue_purge(list);
482 return -ENOENT;
483 }
484
485 __skb_queue_tail(list, msdu);
486
487 if (!is_offload) {
488 rxd = (void *)msdu->data;
489
490 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
491
492 skb_put(msdu, sizeof(*rxd));
493 skb_pull(msdu, sizeof(*rxd));
494 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
495
496 if (!(__le32_to_cpu(rxd->attention.flags) &
497 RX_ATTENTION_FLAGS_MSDU_DONE)) {
498 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
499 return -EIO;
500 }
501 }
502
503 msdu_desc++;
504 }
505
506 return 0;
507}
508
Michal Kazior95bf21f2014-05-16 17:15:39 +0300509int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300510{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200511 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300512 dma_addr_t paddr;
513 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300514 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300515 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
516
Michal Kazior51fc7d72014-10-23 17:04:24 +0300517 htt->rx_confused = false;
518
Michal Kaziorfe2407a2014-11-27 11:12:43 +0100519 /* XXX: The fill level could be changed during runtime in response to
520 * the host processing latency. Is this really worth it?
521 */
522 htt->rx_ring.size = HTT_RX_RING_SIZE;
523 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
524 htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
525
Kalle Valo5e3dd152013-06-12 20:52:10 +0300526 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200527 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300528 return -EINVAL;
529 }
530
Kalle Valo5e3dd152013-06-12 20:52:10 +0300531 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300532 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300533 GFP_KERNEL);
534 if (!htt->rx_ring.netbufs_ring)
535 goto err_netbuf;
536
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300537 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
538
539 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300540 if (!vaddr)
541 goto err_dma_ring;
542
543 htt->rx_ring.paddrs_ring = vaddr;
544 htt->rx_ring.base_paddr = paddr;
545
546 vaddr = dma_alloc_coherent(htt->ar->dev,
547 sizeof(*htt->rx_ring.alloc_idx.vaddr),
548 &paddr, GFP_DMA);
549 if (!vaddr)
550 goto err_dma_idx;
551
552 htt->rx_ring.alloc_idx.vaddr = vaddr;
553 htt->rx_ring.alloc_idx.paddr = paddr;
Michal Kaziorc5450702015-01-24 12:14:48 +0200554 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300555 *htt->rx_ring.alloc_idx.vaddr = 0;
556
557 /* Initialize the Rx refill retry timer */
558 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
559
560 spin_lock_init(&htt->rx_ring.lock);
561
562 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +0200563 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
564 hash_init(htt->rx_ring.skb_table);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300565
Michal Kazior6e712d42013-09-24 10:18:36 +0200566 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
567 (unsigned long)htt);
568
Michal Kazior6c5151a2014-02-27 18:50:04 +0200569 skb_queue_head_init(&htt->tx_compl_q);
570 skb_queue_head_init(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200571 skb_queue_head_init(&htt->rx_in_ord_compl_q);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200572
573 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
574 (unsigned long)htt);
575
Michal Kazior7aa7a722014-08-25 12:09:38 +0200576 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300577 htt->rx_ring.size, htt->rx_ring.fill_level);
578 return 0;
579
Kalle Valo5e3dd152013-06-12 20:52:10 +0300580err_dma_idx:
581 dma_free_coherent(htt->ar->dev,
582 (htt->rx_ring.size *
583 sizeof(htt->rx_ring.paddrs_ring)),
584 htt->rx_ring.paddrs_ring,
585 htt->rx_ring.base_paddr);
586err_dma_ring:
587 kfree(htt->rx_ring.netbufs_ring);
588err_netbuf:
589 return -ENOMEM;
590}
591
Michal Kazior7aa7a722014-08-25 12:09:38 +0200592static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
593 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300594{
595 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300596 case HTT_RX_MPDU_ENCRYPT_NONE:
597 return 0;
Michal Kazior890d3b22014-10-23 17:04:22 +0300598 case HTT_RX_MPDU_ENCRYPT_WEP40:
599 case HTT_RX_MPDU_ENCRYPT_WEP104:
600 return IEEE80211_WEP_IV_LEN;
601 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
602 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
603 return IEEE80211_TKIP_IV_LEN;
604 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
605 return IEEE80211_CCMP_HDR_LEN;
606 case HTT_RX_MPDU_ENCRYPT_WEP128:
607 case HTT_RX_MPDU_ENCRYPT_WAPI:
608 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300609 }
610
Michal Kazior890d3b22014-10-23 17:04:22 +0300611 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300612 return 0;
613}
614
Michal Kazior890d3b22014-10-23 17:04:22 +0300615#define MICHAEL_MIC_LEN 8
616
Michal Kazior7aa7a722014-08-25 12:09:38 +0200617static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
618 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300619{
620 switch (type) {
621 case HTT_RX_MPDU_ENCRYPT_NONE:
Michal Kazior890d3b22014-10-23 17:04:22 +0300622 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300623 case HTT_RX_MPDU_ENCRYPT_WEP40:
624 case HTT_RX_MPDU_ENCRYPT_WEP104:
Michal Kazior890d3b22014-10-23 17:04:22 +0300625 return IEEE80211_WEP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300626 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
627 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
Michal Kazior890d3b22014-10-23 17:04:22 +0300628 return IEEE80211_TKIP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300629 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
Michal Kazior890d3b22014-10-23 17:04:22 +0300630 return IEEE80211_CCMP_MIC_LEN;
631 case HTT_RX_MPDU_ENCRYPT_WEP128:
632 case HTT_RX_MPDU_ENCRYPT_WAPI:
633 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300634 }
635
Michal Kazior890d3b22014-10-23 17:04:22 +0300636 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300637 return 0;
638}
639
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300640struct amsdu_subframe_hdr {
641 u8 dst[ETH_ALEN];
642 u8 src[ETH_ALEN];
643 __be16 len;
644} __packed;
645
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100646static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200647 struct ieee80211_rx_status *status,
648 struct htt_rx_desc *rxd)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100649{
Michal Kazior5528e032015-03-30 09:51:56 +0300650 struct ieee80211_supported_band *sband;
651 u8 cck, rate, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100652 u8 preamble = 0;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200653 u32 info1, info2, info3;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100654
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200655 info1 = __le32_to_cpu(rxd->ppdu_start.info1);
656 info2 = __le32_to_cpu(rxd->ppdu_start.info2);
657 info3 = __le32_to_cpu(rxd->ppdu_start.info3);
658
659 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100660
661 switch (preamble) {
662 case HTT_RX_LEGACY:
Michal Kazior5528e032015-03-30 09:51:56 +0300663 /* To get legacy rate index band is required. Since band can't
664 * be undefined check if freq is non-zero.
665 */
666 if (!status->freq)
667 return;
668
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200669 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
670 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
Michal Kazior5528e032015-03-30 09:51:56 +0300671 rate &= ~RX_PPDU_START_RATE_FLAG;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100672
Michal Kazior5528e032015-03-30 09:51:56 +0300673 sband = &ar->mac.sbands[status->band];
674 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100675 break;
676 case HTT_RX_HT:
677 case HTT_RX_HT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200678 /* HT-SIG - Table 20-11 in info2 and info3 */
679 mcs = info2 & 0x1F;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100680 nss = mcs >> 3;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200681 bw = (info2 >> 7) & 1;
682 sgi = (info3 >> 7) & 1;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100683
684 status->rate_idx = mcs;
685 status->flag |= RX_FLAG_HT;
686 if (sgi)
687 status->flag |= RX_FLAG_SHORT_GI;
688 if (bw)
689 status->flag |= RX_FLAG_40MHZ;
690 break;
691 case HTT_RX_VHT:
692 case HTT_RX_VHT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200693 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100694 TODO check this */
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200695 mcs = (info3 >> 4) & 0x0F;
696 nss = ((info2 >> 10) & 0x07) + 1;
697 bw = info2 & 3;
698 sgi = info3 & 1;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100699
700 status->rate_idx = mcs;
701 status->vht_nss = nss;
702
703 if (sgi)
704 status->flag |= RX_FLAG_SHORT_GI;
705
706 switch (bw) {
707 /* 20MHZ */
708 case 0:
709 break;
710 /* 40MHZ */
711 case 1:
712 status->flag |= RX_FLAG_40MHZ;
713 break;
714 /* 80MHZ */
715 case 2:
716 status->vht_flag |= RX_VHT_FLAG_80MHZ;
717 }
718
719 status->flag |= RX_FLAG_VHT;
720 break;
721 default:
722 break;
723 }
724}
725
Michal Kazior500ff9f2015-03-31 10:26:21 +0000726static struct ieee80211_channel *
727ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
728{
729 struct ath10k_peer *peer;
730 struct ath10k_vif *arvif;
731 struct cfg80211_chan_def def;
732 u16 peer_id;
733
734 lockdep_assert_held(&ar->data_lock);
735
736 if (!rxd)
737 return NULL;
738
739 if (rxd->attention.flags &
740 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
741 return NULL;
742
743 if (!(rxd->msdu_end.info0 &
744 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
745 return NULL;
746
747 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
748 RX_MPDU_START_INFO0_PEER_IDX);
749
750 peer = ath10k_peer_find_by_id(ar, peer_id);
751 if (!peer)
752 return NULL;
753
754 arvif = ath10k_get_arvif(ar, peer->vdev_id);
755 if (WARN_ON_ONCE(!arvif))
756 return NULL;
757
758 if (WARN_ON(ath10k_mac_vif_chan(arvif->vif, &def)))
759 return NULL;
760
761 return def.chan;
762}
763
764static struct ieee80211_channel *
765ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
766{
767 struct ath10k_vif *arvif;
768 struct cfg80211_chan_def def;
769
770 lockdep_assert_held(&ar->data_lock);
771
772 list_for_each_entry(arvif, &ar->arvifs, list) {
773 if (arvif->vdev_id == vdev_id &&
774 ath10k_mac_vif_chan(arvif->vif, &def) == 0)
775 return def.chan;
776 }
777
778 return NULL;
779}
780
781static void
782ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
783 struct ieee80211_chanctx_conf *conf,
784 void *data)
785{
786 struct cfg80211_chan_def *def = data;
787
788 *def = conf->def;
789}
790
791static struct ieee80211_channel *
792ath10k_htt_rx_h_any_channel(struct ath10k *ar)
793{
794 struct cfg80211_chan_def def = {};
795
796 ieee80211_iter_chan_contexts_atomic(ar->hw,
797 ath10k_htt_rx_h_any_chan_iter,
798 &def);
799
800 return def.chan;
801}
802
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100803static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
Michal Kazior500ff9f2015-03-31 10:26:21 +0000804 struct ieee80211_rx_status *status,
805 struct htt_rx_desc *rxd,
806 u32 vdev_id)
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100807{
808 struct ieee80211_channel *ch;
809
810 spin_lock_bh(&ar->data_lock);
811 ch = ar->scan_channel;
812 if (!ch)
813 ch = ar->rx_channel;
Michal Kazior500ff9f2015-03-31 10:26:21 +0000814 if (!ch)
815 ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
816 if (!ch)
817 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
818 if (!ch)
819 ch = ath10k_htt_rx_h_any_channel(ar);
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100820 spin_unlock_bh(&ar->data_lock);
821
822 if (!ch)
823 return false;
824
825 status->band = ch->band;
826 status->freq = ch->center_freq;
827
828 return true;
829}
830
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200831static void ath10k_htt_rx_h_signal(struct ath10k *ar,
832 struct ieee80211_rx_status *status,
833 struct htt_rx_desc *rxd)
834{
835 /* FIXME: Get real NF */
836 status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
837 rxd->ppdu_start.rssi_comb;
838 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
839}
840
841static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
842 struct ieee80211_rx_status *status,
843 struct htt_rx_desc *rxd)
844{
845 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
846 * means all prior MSDUs in a PPDU are reported to mac80211 without the
847 * TSF. Is it worth holding frames until end of PPDU is known?
848 *
849 * FIXME: Can we get/compute 64bit TSF?
850 */
Michal Kazior3ec79e32015-01-24 12:14:48 +0200851 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200852 status->flag |= RX_FLAG_MACTIME_END;
853}
854
855static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
856 struct sk_buff_head *amsdu,
Michal Kazior500ff9f2015-03-31 10:26:21 +0000857 struct ieee80211_rx_status *status,
858 u32 vdev_id)
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200859{
860 struct sk_buff *first;
861 struct htt_rx_desc *rxd;
862 bool is_first_ppdu;
863 bool is_last_ppdu;
864
865 if (skb_queue_empty(amsdu))
866 return;
867
868 first = skb_peek(amsdu);
869 rxd = (void *)first->data - sizeof(*rxd);
870
871 is_first_ppdu = !!(rxd->attention.flags &
872 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
873 is_last_ppdu = !!(rxd->attention.flags &
874 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
875
876 if (is_first_ppdu) {
877 /* New PPDU starts so clear out the old per-PPDU status. */
878 status->freq = 0;
879 status->rate_idx = 0;
880 status->vht_nss = 0;
881 status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
882 status->flag &= ~(RX_FLAG_HT |
883 RX_FLAG_VHT |
884 RX_FLAG_SHORT_GI |
885 RX_FLAG_40MHZ |
886 RX_FLAG_MACTIME_END);
887 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
888
889 ath10k_htt_rx_h_signal(ar, status, rxd);
Michal Kazior500ff9f2015-03-31 10:26:21 +0000890 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200891 ath10k_htt_rx_h_rates(ar, status, rxd);
892 }
893
894 if (is_last_ppdu)
895 ath10k_htt_rx_h_mactime(ar, status, rxd);
896}
897
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300898static const char * const tid_to_ac[] = {
899 "BE",
900 "BK",
901 "BK",
902 "BE",
903 "VI",
904 "VI",
905 "VO",
906 "VO",
907};
908
909static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
910{
911 u8 *qc;
912 int tid;
913
914 if (!ieee80211_is_data_qos(hdr->frame_control))
915 return "";
916
917 qc = ieee80211_get_qos_ctl(hdr);
918 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
919 if (tid < 8)
920 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
921 else
922 snprintf(out, size, "tid %d", tid);
923
924 return out;
925}
926
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100927static void ath10k_process_rx(struct ath10k *ar,
928 struct ieee80211_rx_status *rx_status,
929 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100930{
931 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300932 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
933 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100934
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100935 status = IEEE80211_SKB_RXCB(skb);
936 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100937
Michal Kazior7aa7a722014-08-25 12:09:38 +0200938 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300939 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100940 skb,
941 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300942 ieee80211_get_SA(hdr),
943 ath10k_get_tid(hdr, tid, sizeof(tid)),
944 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
945 "mcast" : "ucast",
946 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100947 status->flag == 0 ? "legacy" : "",
948 status->flag & RX_FLAG_HT ? "ht" : "",
949 status->flag & RX_FLAG_VHT ? "vht" : "",
950 status->flag & RX_FLAG_40MHZ ? "40" : "",
951 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
952 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
953 status->rate_idx,
954 status->vht_nss,
955 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100956 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100957 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300958 !!(status->flag & RX_FLAG_MMIC_ERROR),
959 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +0200960 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100961 skb->data, skb->len);
Rajkumar Manoharan5ce8e7f2014-11-05 19:14:31 +0530962 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
963 trace_ath10k_rx_payload(ar, skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100964
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100965 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100966}
967
Michal Kaziord960c362014-02-25 09:29:57 +0200968static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
969{
970 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
971 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
972}
973
Michal Kazior581c25f2014-11-18 09:24:48 +0200974static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
975 struct sk_buff *msdu,
976 struct ieee80211_rx_status *status,
977 enum htt_rx_mpdu_encrypt_type enctype,
978 bool is_decrypted)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300979{
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300980 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +0200981 struct htt_rx_desc *rxd;
982 size_t hdr_len;
983 size_t crypto_len;
984 bool is_first;
985 bool is_last;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300986
Michal Kazior581c25f2014-11-18 09:24:48 +0200987 rxd = (void *)msdu->data - sizeof(*rxd);
988 is_first = !!(rxd->msdu_end.info0 &
989 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
990 is_last = !!(rxd->msdu_end.info0 &
991 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200992
Michal Kazior581c25f2014-11-18 09:24:48 +0200993 /* Delivered decapped frame:
994 * [802.11 header]
995 * [crypto param] <-- can be trimmed if !fcs_err &&
996 * !decrypt_err && !peer_idx_invalid
997 * [amsdu header] <-- only if A-MSDU
998 * [rfc1042/llc]
999 * [payload]
1000 * [FCS] <-- at end, needs to be trimmed
1001 */
Kalle Valo5e3dd152013-06-12 20:52:10 +03001002
Michal Kazior581c25f2014-11-18 09:24:48 +02001003 /* This probably shouldn't happen but warn just in case */
1004 if (unlikely(WARN_ON_ONCE(!is_first)))
1005 return;
1006
1007 /* This probably shouldn't happen but warn just in case */
1008 if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
1009 return;
1010
1011 skb_trim(msdu, msdu->len - FCS_LEN);
1012
1013 /* In most cases this will be true for sniffed frames. It makes sense
1014 * to deliver them as-is without stripping the crypto param. This would
1015 * also make sense for software based decryption (which is not
1016 * implemented in ath10k).
1017 *
1018 * If there's no error then the frame is decrypted. At least that is
1019 * the case for frames that come in via fragmented rx indication.
1020 */
1021 if (!is_decrypted)
1022 return;
1023
1024 /* The payload is decrypted so strip crypto params. Start from tail
1025 * since hdr is used to compute some stuff.
1026 */
1027
1028 hdr = (void *)msdu->data;
1029
1030 /* Tail */
1031 skb_trim(msdu, msdu->len - ath10k_htt_rx_crypto_tail_len(ar, enctype));
1032
1033 /* MMIC */
1034 if (!ieee80211_has_morefrags(hdr->frame_control) &&
1035 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1036 skb_trim(msdu, msdu->len - 8);
1037
1038 /* Head */
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001039 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001040 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001041
Michal Kazior581c25f2014-11-18 09:24:48 +02001042 memmove((void *)msdu->data + crypto_len,
1043 (void *)msdu->data, hdr_len);
1044 skb_pull(msdu, crypto_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001045}
1046
Michal Kazior581c25f2014-11-18 09:24:48 +02001047static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
1048 struct sk_buff *msdu,
1049 struct ieee80211_rx_status *status,
1050 const u8 first_hdr[64])
Kalle Valo5e3dd152013-06-12 20:52:10 +03001051{
Kalle Valo5e3dd152013-06-12 20:52:10 +03001052 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +02001053 size_t hdr_len;
1054 u8 da[ETH_ALEN];
1055 u8 sa[ETH_ALEN];
Kalle Valo5e3dd152013-06-12 20:52:10 +03001056
Michal Kazior581c25f2014-11-18 09:24:48 +02001057 /* Delivered decapped frame:
1058 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
1059 * [rfc1042/llc]
1060 *
1061 * Note: The nwifi header doesn't have QoS Control and is
1062 * (always?) a 3addr frame.
1063 *
1064 * Note2: There's no A-MSDU subframe header. Even if it's part
1065 * of an A-MSDU.
1066 */
1067
1068 /* pull decapped header and copy SA & DA */
1069 hdr = (struct ieee80211_hdr *)msdu->data;
1070 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
1071 ether_addr_copy(da, ieee80211_get_DA(hdr));
1072 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1073 skb_pull(msdu, hdr_len);
1074
1075 /* push original 802.11 header */
1076 hdr = (struct ieee80211_hdr *)first_hdr;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001077 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001078 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001079
Michal Kazior581c25f2014-11-18 09:24:48 +02001080 /* original 802.11 header has a different DA and in
1081 * case of 4addr it may also have different SA
1082 */
1083 hdr = (struct ieee80211_hdr *)msdu->data;
1084 ether_addr_copy(ieee80211_get_DA(hdr), da);
1085 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1086}
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001087
Michal Kazior581c25f2014-11-18 09:24:48 +02001088static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
1089 struct sk_buff *msdu,
1090 enum htt_rx_mpdu_encrypt_type enctype)
1091{
1092 struct ieee80211_hdr *hdr;
1093 struct htt_rx_desc *rxd;
1094 size_t hdr_len, crypto_len;
1095 void *rfc1042;
1096 bool is_first, is_last, is_amsdu;
Michal Kazior784f69d2013-09-26 10:12:23 +03001097
Michal Kazior581c25f2014-11-18 09:24:48 +02001098 rxd = (void *)msdu->data - sizeof(*rxd);
1099 hdr = (void *)rxd->rx_hdr_status;
1100
1101 is_first = !!(rxd->msdu_end.info0 &
1102 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
1103 is_last = !!(rxd->msdu_end.info0 &
1104 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1105 is_amsdu = !(is_first && is_last);
1106
1107 rfc1042 = hdr;
1108
1109 if (is_first) {
Michal Kazior784f69d2013-09-26 10:12:23 +03001110 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001111 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001112
Michal Kazior581c25f2014-11-18 09:24:48 +02001113 rfc1042 += round_up(hdr_len, 4) +
1114 round_up(crypto_len, 4);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001115 }
1116
Michal Kazior581c25f2014-11-18 09:24:48 +02001117 if (is_amsdu)
1118 rfc1042 += sizeof(struct amsdu_subframe_hdr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001119
Michal Kazior581c25f2014-11-18 09:24:48 +02001120 return rfc1042;
1121}
1122
1123static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
1124 struct sk_buff *msdu,
1125 struct ieee80211_rx_status *status,
1126 const u8 first_hdr[64],
1127 enum htt_rx_mpdu_encrypt_type enctype)
1128{
1129 struct ieee80211_hdr *hdr;
1130 struct ethhdr *eth;
1131 size_t hdr_len;
1132 void *rfc1042;
1133 u8 da[ETH_ALEN];
1134 u8 sa[ETH_ALEN];
1135
1136 /* Delivered decapped frame:
1137 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
1138 * [payload]
1139 */
1140
1141 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
1142 if (WARN_ON_ONCE(!rfc1042))
1143 return;
1144
1145 /* pull decapped header and copy SA & DA */
1146 eth = (struct ethhdr *)msdu->data;
1147 ether_addr_copy(da, eth->h_dest);
1148 ether_addr_copy(sa, eth->h_source);
1149 skb_pull(msdu, sizeof(struct ethhdr));
1150
1151 /* push rfc1042/llc/snap */
1152 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1153 sizeof(struct rfc1042_hdr));
1154
1155 /* push original 802.11 header */
1156 hdr = (struct ieee80211_hdr *)first_hdr;
1157 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1158 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1159
1160 /* original 802.11 header has a different DA and in
1161 * case of 4addr it may also have different SA
1162 */
1163 hdr = (struct ieee80211_hdr *)msdu->data;
1164 ether_addr_copy(ieee80211_get_DA(hdr), da);
1165 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1166}
1167
1168static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1169 struct sk_buff *msdu,
1170 struct ieee80211_rx_status *status,
1171 const u8 first_hdr[64])
1172{
1173 struct ieee80211_hdr *hdr;
1174 size_t hdr_len;
1175
1176 /* Delivered decapped frame:
1177 * [amsdu header] <-- replaced with 802.11 hdr
1178 * [rfc1042/llc]
1179 * [payload]
1180 */
1181
1182 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
1183
1184 hdr = (struct ieee80211_hdr *)first_hdr;
1185 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1186 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1187}
1188
1189static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1190 struct sk_buff *msdu,
1191 struct ieee80211_rx_status *status,
1192 u8 first_hdr[64],
1193 enum htt_rx_mpdu_encrypt_type enctype,
1194 bool is_decrypted)
1195{
1196 struct htt_rx_desc *rxd;
1197 enum rx_msdu_decap_format decap;
1198 struct ieee80211_hdr *hdr;
1199
1200 /* First msdu's decapped header:
1201 * [802.11 header] <-- padded to 4 bytes long
1202 * [crypto param] <-- padded to 4 bytes long
1203 * [amsdu header] <-- only if A-MSDU
1204 * [rfc1042/llc]
1205 *
1206 * Other (2nd, 3rd, ..) msdu's decapped header:
1207 * [amsdu header] <-- only if A-MSDU
1208 * [rfc1042/llc]
1209 */
1210
1211 rxd = (void *)msdu->data - sizeof(*rxd);
1212 hdr = (void *)rxd->rx_hdr_status;
1213 decap = MS(__le32_to_cpu(rxd->msdu_start.info1),
1214 RX_MSDU_START_INFO1_DECAP_FORMAT);
1215
1216 switch (decap) {
1217 case RX_MSDU_DECAP_RAW:
1218 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1219 is_decrypted);
1220 break;
1221 case RX_MSDU_DECAP_NATIVE_WIFI:
1222 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
1223 break;
1224 case RX_MSDU_DECAP_ETHERNET2_DIX:
1225 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1226 break;
1227 case RX_MSDU_DECAP_8023_SNAP_LLC:
1228 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
1229 break;
1230 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001231}
1232
Michal Kazior605f81a2013-07-31 10:47:56 +02001233static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1234{
1235 struct htt_rx_desc *rxd;
1236 u32 flags, info;
1237 bool is_ip4, is_ip6;
1238 bool is_tcp, is_udp;
1239 bool ip_csum_ok, tcpudp_csum_ok;
1240
1241 rxd = (void *)skb->data - sizeof(*rxd);
1242 flags = __le32_to_cpu(rxd->attention.flags);
1243 info = __le32_to_cpu(rxd->msdu_start.info1);
1244
1245 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1246 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1247 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1248 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1249 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1250 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1251
1252 if (!is_ip4 && !is_ip6)
1253 return CHECKSUM_NONE;
1254 if (!is_tcp && !is_udp)
1255 return CHECKSUM_NONE;
1256 if (!ip_csum_ok)
1257 return CHECKSUM_NONE;
1258 if (!tcpudp_csum_ok)
1259 return CHECKSUM_NONE;
1260
1261 return CHECKSUM_UNNECESSARY;
1262}
1263
Michal Kazior581c25f2014-11-18 09:24:48 +02001264static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
1265{
1266 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
1267}
1268
1269static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1270 struct sk_buff_head *amsdu,
1271 struct ieee80211_rx_status *status)
1272{
1273 struct sk_buff *first;
1274 struct sk_buff *last;
1275 struct sk_buff *msdu;
1276 struct htt_rx_desc *rxd;
1277 struct ieee80211_hdr *hdr;
1278 enum htt_rx_mpdu_encrypt_type enctype;
1279 u8 first_hdr[64];
1280 u8 *qos;
1281 size_t hdr_len;
1282 bool has_fcs_err;
1283 bool has_crypto_err;
1284 bool has_tkip_err;
1285 bool has_peer_idx_invalid;
1286 bool is_decrypted;
1287 u32 attention;
1288
1289 if (skb_queue_empty(amsdu))
1290 return;
1291
1292 first = skb_peek(amsdu);
1293 rxd = (void *)first->data - sizeof(*rxd);
1294
1295 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1296 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1297
1298 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1299 * decapped header. It'll be used for undecapping of each MSDU.
1300 */
1301 hdr = (void *)rxd->rx_hdr_status;
1302 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1303 memcpy(first_hdr, hdr, hdr_len);
1304
1305 /* Each A-MSDU subframe will use the original header as the base and be
1306 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1307 */
1308 hdr = (void *)first_hdr;
1309 qos = ieee80211_get_qos_ctl(hdr);
1310 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1311
1312 /* Some attention flags are valid only in the last MSDU. */
1313 last = skb_peek_tail(amsdu);
1314 rxd = (void *)last->data - sizeof(*rxd);
1315 attention = __le32_to_cpu(rxd->attention.flags);
1316
1317 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1318 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1319 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1320 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
1321
1322 /* Note: If hardware captures an encrypted frame that it can't decrypt,
1323 * e.g. due to fcs error, missing peer or invalid key data it will
1324 * report the frame as raw.
1325 */
1326 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
1327 !has_fcs_err &&
1328 !has_crypto_err &&
1329 !has_peer_idx_invalid);
1330
1331 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
1332 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
1333 RX_FLAG_MMIC_ERROR |
1334 RX_FLAG_DECRYPTED |
1335 RX_FLAG_IV_STRIPPED |
1336 RX_FLAG_MMIC_STRIPPED);
1337
1338 if (has_fcs_err)
1339 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1340
1341 if (has_tkip_err)
1342 status->flag |= RX_FLAG_MMIC_ERROR;
1343
1344 if (is_decrypted)
1345 status->flag |= RX_FLAG_DECRYPTED |
1346 RX_FLAG_IV_STRIPPED |
1347 RX_FLAG_MMIC_STRIPPED;
1348
1349 skb_queue_walk(amsdu, msdu) {
1350 ath10k_htt_rx_h_csum_offload(msdu);
1351 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
1352 is_decrypted);
1353
1354 /* Undecapping involves copying the original 802.11 header back
1355 * to sk_buff. If frame is protected and hardware has decrypted
1356 * it then remove the protected bit.
1357 */
1358 if (!is_decrypted)
1359 continue;
1360
1361 hdr = (void *)msdu->data;
1362 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1363 }
1364}
1365
1366static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
1367 struct sk_buff_head *amsdu,
1368 struct ieee80211_rx_status *status)
1369{
1370 struct sk_buff *msdu;
1371
1372 while ((msdu = __skb_dequeue(amsdu))) {
1373 /* Setup per-MSDU flags */
1374 if (skb_queue_empty(amsdu))
1375 status->flag &= ~RX_FLAG_AMSDU_MORE;
1376 else
1377 status->flag |= RX_FLAG_AMSDU_MORE;
1378
1379 ath10k_process_rx(ar, status, msdu);
1380 }
1381}
1382
Michal Kazior9aa505d2014-11-18 09:24:47 +02001383static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
Ben Greearbfa35362014-03-03 14:07:09 -08001384{
Michal Kazior9aa505d2014-11-18 09:24:47 +02001385 struct sk_buff *skb, *first;
Ben Greearbfa35362014-03-03 14:07:09 -08001386 int space;
1387 int total_len = 0;
1388
1389 /* TODO: Might could optimize this by using
1390 * skb_try_coalesce or similar method to
1391 * decrease copying, or maybe get mac80211 to
1392 * provide a way to just receive a list of
1393 * skb?
1394 */
1395
Michal Kazior9aa505d2014-11-18 09:24:47 +02001396 first = __skb_dequeue(amsdu);
Ben Greearbfa35362014-03-03 14:07:09 -08001397
1398 /* Allocate total length all at once. */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001399 skb_queue_walk(amsdu, skb)
1400 total_len += skb->len;
Ben Greearbfa35362014-03-03 14:07:09 -08001401
Michal Kazior9aa505d2014-11-18 09:24:47 +02001402 space = total_len - skb_tailroom(first);
Ben Greearbfa35362014-03-03 14:07:09 -08001403 if ((space > 0) &&
Michal Kazior9aa505d2014-11-18 09:24:47 +02001404 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
Ben Greearbfa35362014-03-03 14:07:09 -08001405 /* TODO: bump some rx-oom error stat */
1406 /* put it back together so we can free the
1407 * whole list at once.
1408 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001409 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001410 return -1;
1411 }
1412
1413 /* Walk list again, copying contents into
1414 * msdu_head
1415 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001416 while ((skb = __skb_dequeue(amsdu))) {
1417 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
1418 skb->len);
1419 dev_kfree_skb_any(skb);
Ben Greearbfa35362014-03-03 14:07:09 -08001420 }
1421
Michal Kazior9aa505d2014-11-18 09:24:47 +02001422 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001423 return 0;
1424}
1425
Michal Kazior581c25f2014-11-18 09:24:48 +02001426static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
1427 struct sk_buff_head *amsdu,
1428 bool chained)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001429{
Michal Kazior581c25f2014-11-18 09:24:48 +02001430 struct sk_buff *first;
1431 struct htt_rx_desc *rxd;
1432 enum rx_msdu_decap_format decap;
Michal Kazior7aa7a722014-08-25 12:09:38 +02001433
Michal Kazior581c25f2014-11-18 09:24:48 +02001434 first = skb_peek(amsdu);
1435 rxd = (void *)first->data - sizeof(*rxd);
1436 decap = MS(__le32_to_cpu(rxd->msdu_start.info1),
1437 RX_MSDU_START_INFO1_DECAP_FORMAT);
1438
1439 if (!chained)
1440 return;
1441
1442 /* FIXME: Current unchaining logic can only handle simple case of raw
1443 * msdu chaining. If decapping is other than raw the chaining may be
1444 * more complex and this isn't handled by the current code. Don't even
1445 * try re-constructing such frames - it'll be pretty much garbage.
1446 */
1447 if (decap != RX_MSDU_DECAP_RAW ||
1448 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
1449 __skb_queue_purge(amsdu);
1450 return;
1451 }
1452
1453 ath10k_unchain_msdu(amsdu);
1454}
1455
1456static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
1457 struct sk_buff_head *amsdu,
1458 struct ieee80211_rx_status *rx_status)
1459{
1460 struct sk_buff *msdu;
1461 struct htt_rx_desc *rxd;
Michal Kaziord67d0a02014-11-24 15:34:08 +01001462 bool is_mgmt;
1463 bool has_fcs_err;
Michal Kazior581c25f2014-11-18 09:24:48 +02001464
1465 msdu = skb_peek(amsdu);
1466 rxd = (void *)msdu->data - sizeof(*rxd);
1467
1468 /* FIXME: It might be a good idea to do some fuzzy-testing to drop
1469 * invalid/dangerous frames.
1470 */
1471
1472 if (!rx_status->freq) {
1473 ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001474 return false;
1475 }
1476
Michal Kaziord67d0a02014-11-24 15:34:08 +01001477 is_mgmt = !!(rxd->attention.flags &
1478 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
1479 has_fcs_err = !!(rxd->attention.flags &
1480 __cpu_to_le32(RX_ATTENTION_FLAGS_FCS_ERR));
1481
Michal Kazior581c25f2014-11-18 09:24:48 +02001482 /* Management frames are handled via WMI events. The pros of such
1483 * approach is that channel is explicitly provided in WMI events
1484 * whereas HTT doesn't provide channel information for Rxed frames.
Michal Kaziord67d0a02014-11-24 15:34:08 +01001485 *
1486 * However some firmware revisions don't report corrupted frames via
1487 * WMI so don't drop them.
Michal Kazior581c25f2014-11-18 09:24:48 +02001488 */
Michal Kaziord67d0a02014-11-24 15:34:08 +01001489 if (is_mgmt && !has_fcs_err) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001490 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001491 return false;
1492 }
1493
Michal Kazior581c25f2014-11-18 09:24:48 +02001494 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1495 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001496 return false;
1497 }
1498
1499 return true;
1500}
1501
Michal Kazior581c25f2014-11-18 09:24:48 +02001502static void ath10k_htt_rx_h_filter(struct ath10k *ar,
1503 struct sk_buff_head *amsdu,
1504 struct ieee80211_rx_status *rx_status)
1505{
1506 if (skb_queue_empty(amsdu))
1507 return;
1508
1509 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
1510 return;
1511
1512 __skb_queue_purge(amsdu);
1513}
1514
Kalle Valo5e3dd152013-06-12 20:52:10 +03001515static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1516 struct htt_rx_indication *rx)
1517{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001518 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001519 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001520 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001521 struct sk_buff_head amsdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001522 int num_mpdu_ranges;
1523 int fw_desc_len;
1524 u8 *fw_desc;
Michal Kaziord5406902014-11-18 09:24:47 +02001525 int i, ret, mpdu_count = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001526
Michal Kazior45967082014-02-27 18:50:05 +02001527 lockdep_assert_held(&htt->rx_ring.lock);
1528
Michal Kaziore0bd7512014-11-18 09:24:48 +02001529 if (htt->rx_confused)
1530 return;
1531
Kalle Valo5e3dd152013-06-12 20:52:10 +03001532 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1533 fw_desc = (u8 *)&rx->fw_desc;
1534
1535 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1536 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1537 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1538
Michal Kazior7aa7a722014-08-25 12:09:38 +02001539 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001540 rx, sizeof(*rx) +
1541 (sizeof(struct htt_rx_indication_mpdu_range) *
1542 num_mpdu_ranges));
1543
Michal Kaziord5406902014-11-18 09:24:47 +02001544 for (i = 0; i < num_mpdu_ranges; i++)
1545 mpdu_count += mpdu_ranges[i].mpdu_count;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001546
Michal Kaziord5406902014-11-18 09:24:47 +02001547 while (mpdu_count--) {
Michal Kaziord5406902014-11-18 09:24:47 +02001548 __skb_queue_head_init(&amsdu);
1549 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001550 &fw_desc_len, &amsdu);
Michal Kaziord5406902014-11-18 09:24:47 +02001551 if (ret < 0) {
Michal Kaziore0bd7512014-11-18 09:24:48 +02001552 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
Michal Kaziord5406902014-11-18 09:24:47 +02001553 __skb_queue_purge(&amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +02001554 /* FIXME: It's probably a good idea to reboot the
1555 * device instead of leaving it inoperable.
1556 */
1557 htt->rx_confused = true;
1558 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001559 }
Michal Kaziord5406902014-11-18 09:24:47 +02001560
Michal Kazior500ff9f2015-03-31 10:26:21 +00001561 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
Michal Kazior581c25f2014-11-18 09:24:48 +02001562 ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
1563 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1564 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1565 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001566 }
1567
Michal Kazior6e712d42013-09-24 10:18:36 +02001568 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001569}
1570
1571static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001572 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001573{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001574 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001575 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001576 struct sk_buff_head amsdu;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001577 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001578 u8 *fw_desc;
Michal Kazior581c25f2014-11-18 09:24:48 +02001579 int fw_desc_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001580
1581 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1582 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1583
Michal Kazior9aa505d2014-11-18 09:24:47 +02001584 __skb_queue_head_init(&amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001585
1586 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001587 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001588 &amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001589 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001590
Michal Kazior686687c2014-10-23 17:04:24 +03001591 tasklet_schedule(&htt->rx_replenish_task);
1592
Michal Kazior7aa7a722014-08-25 12:09:38 +02001593 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001594
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001595 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001596 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001597 ret);
Michal Kazior9aa505d2014-11-18 09:24:47 +02001598 __skb_queue_purge(&amsdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001599 return;
1600 }
1601
Michal Kazior9aa505d2014-11-18 09:24:47 +02001602 if (skb_queue_len(&amsdu) != 1) {
1603 ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
1604 __skb_queue_purge(&amsdu);
1605 return;
1606 }
1607
Michal Kazior500ff9f2015-03-31 10:26:21 +00001608 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
Michal Kazior581c25f2014-11-18 09:24:48 +02001609 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1610 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1611 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001612
Kalle Valo5e3dd152013-06-12 20:52:10 +03001613 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001614 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001615 "expecting more fragmented rx in one indication %d\n",
1616 fw_desc_len);
1617 }
1618}
1619
Michal Kazior6c5151a2014-02-27 18:50:04 +02001620static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1621 struct sk_buff *skb)
1622{
1623 struct ath10k_htt *htt = &ar->htt;
1624 struct htt_resp *resp = (struct htt_resp *)skb->data;
1625 struct htt_tx_done tx_done = {};
1626 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1627 __le16 msdu_id;
1628 int i;
1629
Michal Kazior45967082014-02-27 18:50:05 +02001630 lockdep_assert_held(&htt->tx_lock);
1631
Michal Kazior6c5151a2014-02-27 18:50:04 +02001632 switch (status) {
1633 case HTT_DATA_TX_STATUS_NO_ACK:
1634 tx_done.no_ack = true;
1635 break;
1636 case HTT_DATA_TX_STATUS_OK:
Sujith Manoharan55314fc2015-04-01 22:53:21 +03001637 tx_done.success = true;
Michal Kazior6c5151a2014-02-27 18:50:04 +02001638 break;
1639 case HTT_DATA_TX_STATUS_DISCARD:
1640 case HTT_DATA_TX_STATUS_POSTPONE:
1641 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1642 tx_done.discard = true;
1643 break;
1644 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001645 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001646 tx_done.discard = true;
1647 break;
1648 }
1649
Michal Kazior7aa7a722014-08-25 12:09:38 +02001650 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001651 resp->data_tx_completion.num_msdus);
1652
1653 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1654 msdu_id = resp->data_tx_completion.msdus[i];
1655 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1656 ath10k_txrx_tx_unref(htt, &tx_done);
1657 }
1658}
1659
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001660static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1661{
1662 struct htt_rx_addba *ev = &resp->rx_addba;
1663 struct ath10k_peer *peer;
1664 struct ath10k_vif *arvif;
1665 u16 info0, tid, peer_id;
1666
1667 info0 = __le16_to_cpu(ev->info0);
1668 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1669 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1670
Michal Kazior7aa7a722014-08-25 12:09:38 +02001671 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001672 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1673 tid, peer_id, ev->window_size);
1674
1675 spin_lock_bh(&ar->data_lock);
1676 peer = ath10k_peer_find_by_id(ar, peer_id);
1677 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001678 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001679 peer_id);
1680 spin_unlock_bh(&ar->data_lock);
1681 return;
1682 }
1683
1684 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1685 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001686 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001687 peer->vdev_id);
1688 spin_unlock_bh(&ar->data_lock);
1689 return;
1690 }
1691
Michal Kazior7aa7a722014-08-25 12:09:38 +02001692 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001693 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1694 peer->addr, tid, ev->window_size);
1695
1696 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1697 spin_unlock_bh(&ar->data_lock);
1698}
1699
1700static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1701{
1702 struct htt_rx_delba *ev = &resp->rx_delba;
1703 struct ath10k_peer *peer;
1704 struct ath10k_vif *arvif;
1705 u16 info0, tid, peer_id;
1706
1707 info0 = __le16_to_cpu(ev->info0);
1708 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1709 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1710
Michal Kazior7aa7a722014-08-25 12:09:38 +02001711 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001712 "htt rx delba tid %hu peer_id %hu\n",
1713 tid, peer_id);
1714
1715 spin_lock_bh(&ar->data_lock);
1716 peer = ath10k_peer_find_by_id(ar, peer_id);
1717 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001718 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001719 peer_id);
1720 spin_unlock_bh(&ar->data_lock);
1721 return;
1722 }
1723
1724 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1725 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001726 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001727 peer->vdev_id);
1728 spin_unlock_bh(&ar->data_lock);
1729 return;
1730 }
1731
Michal Kazior7aa7a722014-08-25 12:09:38 +02001732 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001733 "htt rx stop rx ba session sta %pM tid %hu\n",
1734 peer->addr, tid);
1735
1736 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1737 spin_unlock_bh(&ar->data_lock);
1738}
1739
Michal Kaziorc5450702015-01-24 12:14:48 +02001740static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
1741 struct sk_buff_head *amsdu)
1742{
1743 struct sk_buff *msdu;
1744 struct htt_rx_desc *rxd;
1745
1746 if (skb_queue_empty(list))
1747 return -ENOBUFS;
1748
1749 if (WARN_ON(!skb_queue_empty(amsdu)))
1750 return -EINVAL;
1751
1752 while ((msdu = __skb_dequeue(list))) {
1753 __skb_queue_tail(amsdu, msdu);
1754
1755 rxd = (void *)msdu->data - sizeof(*rxd);
1756 if (rxd->msdu_end.info0 &
1757 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
1758 break;
1759 }
1760
1761 msdu = skb_peek_tail(amsdu);
1762 rxd = (void *)msdu->data - sizeof(*rxd);
1763 if (!(rxd->msdu_end.info0 &
1764 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
1765 skb_queue_splice_init(amsdu, list);
1766 return -EAGAIN;
1767 }
1768
1769 return 0;
1770}
1771
1772static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
1773 struct sk_buff *skb)
1774{
1775 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1776
1777 if (!ieee80211_has_protected(hdr->frame_control))
1778 return;
1779
1780 /* Offloaded frames are already decrypted but firmware insists they are
1781 * protected in the 802.11 header. Strip the flag. Otherwise mac80211
1782 * will drop the frame.
1783 */
1784
1785 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1786 status->flag |= RX_FLAG_DECRYPTED |
1787 RX_FLAG_IV_STRIPPED |
1788 RX_FLAG_MMIC_STRIPPED;
1789}
1790
1791static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
1792 struct sk_buff_head *list)
1793{
1794 struct ath10k_htt *htt = &ar->htt;
1795 struct ieee80211_rx_status *status = &htt->rx_status;
1796 struct htt_rx_offload_msdu *rx;
1797 struct sk_buff *msdu;
1798 size_t offset;
1799
1800 while ((msdu = __skb_dequeue(list))) {
1801 /* Offloaded frames don't have Rx descriptor. Instead they have
1802 * a short meta information header.
1803 */
1804
1805 rx = (void *)msdu->data;
1806
1807 skb_put(msdu, sizeof(*rx));
1808 skb_pull(msdu, sizeof(*rx));
1809
1810 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
1811 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
1812 dev_kfree_skb_any(msdu);
1813 continue;
1814 }
1815
1816 skb_put(msdu, __le16_to_cpu(rx->msdu_len));
1817
1818 /* Offloaded rx header length isn't multiple of 2 nor 4 so the
1819 * actual payload is unaligned. Align the frame. Otherwise
1820 * mac80211 complains. This shouldn't reduce performance much
1821 * because these offloaded frames are rare.
1822 */
1823 offset = 4 - ((unsigned long)msdu->data & 3);
1824 skb_put(msdu, offset);
1825 memmove(msdu->data + offset, msdu->data, msdu->len);
1826 skb_pull(msdu, offset);
1827
1828 /* FIXME: The frame is NWifi. Re-construct QoS Control
1829 * if possible later.
1830 */
1831
1832 memset(status, 0, sizeof(*status));
1833 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1834
1835 ath10k_htt_rx_h_rx_offload_prot(status, msdu);
Michal Kazior500ff9f2015-03-31 10:26:21 +00001836 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
Michal Kaziorc5450702015-01-24 12:14:48 +02001837 ath10k_process_rx(ar, status, msdu);
1838 }
1839}
1840
1841static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
1842{
1843 struct ath10k_htt *htt = &ar->htt;
1844 struct htt_resp *resp = (void *)skb->data;
1845 struct ieee80211_rx_status *status = &htt->rx_status;
1846 struct sk_buff_head list;
1847 struct sk_buff_head amsdu;
1848 u16 peer_id;
1849 u16 msdu_count;
1850 u8 vdev_id;
1851 u8 tid;
1852 bool offload;
1853 bool frag;
1854 int ret;
1855
1856 lockdep_assert_held(&htt->rx_ring.lock);
1857
1858 if (htt->rx_confused)
1859 return;
1860
1861 skb_pull(skb, sizeof(resp->hdr));
1862 skb_pull(skb, sizeof(resp->rx_in_ord_ind));
1863
1864 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
1865 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
1866 vdev_id = resp->rx_in_ord_ind.vdev_id;
1867 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
1868 offload = !!(resp->rx_in_ord_ind.info &
1869 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
1870 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
1871
1872 ath10k_dbg(ar, ATH10K_DBG_HTT,
1873 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
1874 vdev_id, peer_id, tid, offload, frag, msdu_count);
1875
1876 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
1877 ath10k_warn(ar, "dropping invalid in order rx indication\n");
1878 return;
1879 }
1880
1881 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
1882 * extracted and processed.
1883 */
1884 __skb_queue_head_init(&list);
1885 ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
1886 if (ret < 0) {
1887 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
1888 htt->rx_confused = true;
1889 return;
1890 }
1891
1892 /* Offloaded frames are very different and need to be handled
1893 * separately.
1894 */
1895 if (offload)
1896 ath10k_htt_rx_h_rx_offload(ar, &list);
1897
1898 while (!skb_queue_empty(&list)) {
1899 __skb_queue_head_init(&amsdu);
1900 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
1901 switch (ret) {
1902 case 0:
1903 /* Note: The in-order indication may report interleaved
1904 * frames from different PPDUs meaning reported rx rate
1905 * to mac80211 isn't accurate/reliable. It's still
1906 * better to report something than nothing though. This
1907 * should still give an idea about rx rate to the user.
1908 */
Michal Kazior500ff9f2015-03-31 10:26:21 +00001909 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
Michal Kaziorc5450702015-01-24 12:14:48 +02001910 ath10k_htt_rx_h_filter(ar, &amsdu, status);
1911 ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
1912 ath10k_htt_rx_h_deliver(ar, &amsdu, status);
1913 break;
1914 case -EAGAIN:
1915 /* fall through */
1916 default:
1917 /* Should not happen. */
1918 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
1919 htt->rx_confused = true;
1920 __skb_queue_purge(&list);
1921 return;
1922 }
1923 }
1924
1925 tasklet_schedule(&htt->rx_replenish_task);
1926}
1927
Kalle Valo5e3dd152013-06-12 20:52:10 +03001928void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1929{
Michal Kazioredb82362013-07-05 16:15:14 +03001930 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001931 struct htt_resp *resp = (struct htt_resp *)skb->data;
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02001932 enum htt_t2h_msg_type type;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001933
1934 /* confirm alignment */
1935 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02001936 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001937
Michal Kazior7aa7a722014-08-25 12:09:38 +02001938 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001939 resp->hdr.msg_type);
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02001940
1941 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
1942 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
1943 resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
1944 dev_kfree_skb_any(skb);
1945 return;
1946 }
1947 type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
1948
1949 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001950 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1951 htt->target_version_major = resp->ver_resp.major;
1952 htt->target_version_minor = resp->ver_resp.minor;
1953 complete(&htt->target_version_received);
1954 break;
1955 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001956 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001957 spin_lock_bh(&htt->rx_ring.lock);
1958 __skb_queue_tail(&htt->rx_compl_q, skb);
1959 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001960 tasklet_schedule(&htt->txrx_compl_task);
1961 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001962 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1963 struct htt_peer_map_event ev = {
1964 .vdev_id = resp->peer_map.vdev_id,
1965 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1966 };
1967 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1968 ath10k_peer_map_event(htt, &ev);
1969 break;
1970 }
1971 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1972 struct htt_peer_unmap_event ev = {
1973 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1974 };
1975 ath10k_peer_unmap_event(htt, &ev);
1976 break;
1977 }
1978 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1979 struct htt_tx_done tx_done = {};
1980 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1981
1982 tx_done.msdu_id =
1983 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1984
1985 switch (status) {
1986 case HTT_MGMT_TX_STATUS_OK:
Sujith Manoharan55314fc2015-04-01 22:53:21 +03001987 tx_done.success = true;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001988 break;
1989 case HTT_MGMT_TX_STATUS_RETRY:
1990 tx_done.no_ack = true;
1991 break;
1992 case HTT_MGMT_TX_STATUS_DROP:
1993 tx_done.discard = true;
1994 break;
1995 }
1996
Michal Kazior6c5151a2014-02-27 18:50:04 +02001997 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001998 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001999 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03002000 break;
2001 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02002002 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
2003 spin_lock_bh(&htt->tx_lock);
2004 __skb_queue_tail(&htt->tx_compl_q, skb);
2005 spin_unlock_bh(&htt->tx_lock);
2006 tasklet_schedule(&htt->txrx_compl_task);
2007 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002008 case HTT_T2H_MSG_TYPE_SEC_IND: {
2009 struct ath10k *ar = htt->ar;
2010 struct htt_security_indication *ev = &resp->security_indication;
2011
Michal Kazior7aa7a722014-08-25 12:09:38 +02002012 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03002013 "sec ind peer_id %d unicast %d type %d\n",
2014 __le16_to_cpu(ev->peer_id),
2015 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
2016 MS(ev->flags, HTT_SECURITY_TYPE));
2017 complete(&ar->install_key_done);
2018 break;
2019 }
2020 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02002021 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002022 skb->data, skb->len);
2023 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
2024 break;
2025 }
2026 case HTT_T2H_MSG_TYPE_TEST:
Kalle Valo5e3dd152013-06-12 20:52:10 +03002027 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002028 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03002029 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03002030 break;
2031 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03002032 /* Firmware can return tx frames if it's unable to fully
2033 * process them and suspects host may be able to fix it. ath10k
2034 * sends all tx frames as already inspected so this shouldn't
2035 * happen unless fw has a bug.
2036 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02002037 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03002038 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002039 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002040 ath10k_htt_rx_addba(ar, resp);
2041 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002042 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002043 ath10k_htt_rx_delba(ar, resp);
2044 break;
Rajkumar Manoharanbfdd7932014-10-03 08:02:40 +03002045 case HTT_T2H_MSG_TYPE_PKTLOG: {
2046 struct ath10k_pktlog_hdr *hdr =
2047 (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
2048
2049 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
2050 sizeof(*hdr) +
2051 __le16_to_cpu(hdr->size));
2052 break;
2053 }
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002054 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
2055 /* Ignore this event because mac80211 takes care of Rx
2056 * aggregation reordering.
2057 */
2058 break;
2059 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002060 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
2061 spin_lock_bh(&htt->rx_ring.lock);
2062 __skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
2063 spin_unlock_bh(&htt->rx_ring.lock);
2064 tasklet_schedule(&htt->txrx_compl_task);
2065 return;
2066 }
2067 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02002068 break;
2069 case HTT_T2H_MSG_TYPE_CHAN_CHANGE:
Michal Kaziorc5450702015-01-24 12:14:48 +02002070 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002071 default:
Michal Kazior2358a542014-10-02 13:32:55 +02002072 ath10k_warn(ar, "htt event (%d) not handled\n",
2073 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02002074 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002075 skb->data, skb->len);
2076 break;
2077 };
2078
2079 /* Free the indication buffer */
2080 dev_kfree_skb_any(skb);
2081}
Michal Kazior6c5151a2014-02-27 18:50:04 +02002082
2083static void ath10k_htt_txrx_compl_task(unsigned long ptr)
2084{
2085 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Michal Kaziorc5450702015-01-24 12:14:48 +02002086 struct ath10k *ar = htt->ar;
Michal Kazior6c5151a2014-02-27 18:50:04 +02002087 struct htt_resp *resp;
2088 struct sk_buff *skb;
2089
Michal Kazior45967082014-02-27 18:50:05 +02002090 spin_lock_bh(&htt->tx_lock);
2091 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002092 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
2093 dev_kfree_skb_any(skb);
2094 }
Michal Kazior45967082014-02-27 18:50:05 +02002095 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002096
Michal Kazior45967082014-02-27 18:50:05 +02002097 spin_lock_bh(&htt->rx_ring.lock);
2098 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002099 resp = (struct htt_resp *)skb->data;
2100 ath10k_htt_rx_handler(htt, &resp->rx_ind);
2101 dev_kfree_skb_any(skb);
2102 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002103
2104 while ((skb = __skb_dequeue(&htt->rx_in_ord_compl_q))) {
2105 ath10k_htt_rx_in_ord_ind(ar, skb);
2106 dev_kfree_skb_any(skb);
2107 }
Michal Kazior45967082014-02-27 18:50:05 +02002108 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002109}