blob: 2006dd488c055782a48a57e35443ef8cd7144a67 [file] [log] [blame]
Yuval Mintze712d522015-10-26 11:02:27 +02001/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
Alexander Duyckf9f082a2016-06-16 12:22:57 -070027#include <net/udp_tunnel.h>
Yuval Mintze712d522015-10-26 11:02:27 +020028#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
Ram Amranicee9fbd2016-10-01 21:59:56 +030039#include <linux/qed/qede_roce.h>
Yuval Mintze712d522015-10-26 11:02:27 +020040#include "qede.h"
41
Yuval Mintz5abd7e922016-02-24 16:52:50 +020042static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
Yuval Mintze712d522015-10-26 11:02:27 +020044
Yuval Mintz5abd7e922016-02-24 16:52:50 +020045MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
Yuval Mintze712d522015-10-26 11:02:27 +020046MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
Yuval Mintz0e7441d2016-02-24 16:52:45 +020056#define CHIP_NUM_57980S_10 0x1666
Yuval Mintze712d522015-10-26 11:02:27 +020057#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
Yuval Mintzfefb0202016-05-11 16:36:19 +030061#define CHIP_NUM_57980S_IOV 0x1664
Yuval Mintze712d522015-10-26 11:02:27 +020062
63#ifndef PCI_DEVICE_ID_NX2_57980E
64#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
Yuval Mintzfefb0202016-05-11 16:36:19 +030070#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
Yuval Mintze712d522015-10-26 11:02:27 +020071#endif
72
Yuval Mintzfefb0202016-05-11 16:36:19 +030073enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
Yuval Mintze712d522015-10-26 11:02:27 +020078static const struct pci_device_id qede_pci_tbl[] = {
Yuval Mintzfefb0202016-05-11 16:36:19 +030079 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020085#ifdef CONFIG_QED_SRIOV
Yuval Mintzfefb0202016-05-11 16:36:19 +030086 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020087#endif
Yuval Mintze712d522015-10-26 11:02:27 +020088 { 0 }
89};
90
91MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95#define TX_TIMEOUT (5 * HZ)
96
97static void qede_remove(struct pci_dev *pdev);
Mintz, Yuval14d39642016-10-31 07:14:23 +020098static void qede_shutdown(struct pci_dev *pdev);
Yuval Mintz29502192015-10-26 11:02:29 +020099static int qede_alloc_rx_buffer(struct qede_dev *edev,
100 struct qede_rx_queue *rxq);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200101static void qede_link_update(void *dev, struct qed_link_output *link);
Yuval Mintze712d522015-10-26 11:02:27 +0200102
Yuval Mintzfefb0202016-05-11 16:36:19 +0300103#ifdef CONFIG_QED_SRIOV
Moshe Shemesh79aab092016-09-22 12:11:15 +0300104static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
105 __be16 vlan_proto)
Yuval Mintz08feecd2016-05-11 16:36:20 +0300106{
107 struct qede_dev *edev = netdev_priv(ndev);
108
109 if (vlan > 4095) {
110 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
111 return -EINVAL;
112 }
113
Moshe Shemesh79aab092016-09-22 12:11:15 +0300114 if (vlan_proto != htons(ETH_P_8021Q))
115 return -EPROTONOSUPPORT;
116
Yuval Mintz08feecd2016-05-11 16:36:20 +0300117 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
118 vlan, vf);
119
120 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
121}
122
Yuval Mintzeff16962016-05-11 16:36:21 +0300123static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
124{
125 struct qede_dev *edev = netdev_priv(ndev);
126
127 DP_VERBOSE(edev, QED_MSG_IOV,
128 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
129 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
130
131 if (!is_valid_ether_addr(mac)) {
132 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
133 return -EINVAL;
134 }
135
136 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
137}
138
Yuval Mintzfefb0202016-05-11 16:36:19 +0300139static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
140{
141 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300142 struct qed_dev_info *qed_info = &edev->dev_info.common;
143 int rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300144
145 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
146
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300147 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
148
149 /* Enable/Disable Tx switching for PF */
150 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
151 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
152 struct qed_update_vport_params params;
153
154 memset(&params, 0, sizeof(params));
155 params.vport_id = 0;
156 params.update_tx_switching_flg = 1;
157 params.tx_switching_flg = num_vfs_param ? 1 : 0;
158 edev->ops->vport_update(edev->cdev, &params);
159 }
160
161 return rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300162}
163#endif
164
Yuval Mintze712d522015-10-26 11:02:27 +0200165static struct pci_driver qede_pci_driver = {
166 .name = "qede",
167 .id_table = qede_pci_tbl,
168 .probe = qede_probe,
169 .remove = qede_remove,
Mintz, Yuval14d39642016-10-31 07:14:23 +0200170 .shutdown = qede_shutdown,
Yuval Mintzfefb0202016-05-11 16:36:19 +0300171#ifdef CONFIG_QED_SRIOV
172 .sriov_configure = qede_sriov_configure,
173#endif
Yuval Mintze712d522015-10-26 11:02:27 +0200174};
175
Yuval Mintzc3aaa402016-10-14 05:19:17 -0400176static void qede_force_mac(void *dev, u8 *mac, bool forced)
Yuval Mintzeff16962016-05-11 16:36:21 +0300177{
178 struct qede_dev *edev = dev;
179
Yuval Mintzc3aaa402016-10-14 05:19:17 -0400180 /* MAC hints take effect only if we haven't set one already */
181 if (is_valid_ether_addr(edev->ndev->dev_addr) && !forced)
182 return;
183
Yuval Mintzeff16962016-05-11 16:36:21 +0300184 ether_addr_copy(edev->ndev->dev_addr, mac);
185 ether_addr_copy(edev->primary_mac, mac);
186}
187
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200188static struct qed_eth_cb_ops qede_ll_ops = {
189 {
190 .link_update = qede_link_update,
191 },
Yuval Mintzeff16962016-05-11 16:36:21 +0300192 .force_mac = qede_force_mac,
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200193};
194
Yuval Mintz29502192015-10-26 11:02:29 +0200195static int qede_netdev_event(struct notifier_block *this, unsigned long event,
196 void *ptr)
197{
198 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
199 struct ethtool_drvinfo drvinfo;
200 struct qede_dev *edev;
201
Ram Amranicee9fbd2016-10-01 21:59:56 +0300202 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
Yuval Mintz29502192015-10-26 11:02:29 +0200203 goto done;
204
205 /* Check whether this is a qede device */
206 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
207 goto done;
208
209 memset(&drvinfo, 0, sizeof(drvinfo));
210 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
211 if (strcmp(drvinfo.driver, "qede"))
212 goto done;
213 edev = netdev_priv(ndev);
214
Ram Amranicee9fbd2016-10-01 21:59:56 +0300215 switch (event) {
216 case NETDEV_CHANGENAME:
217 /* Notify qed of the name change */
218 if (!edev->ops || !edev->ops->common)
219 goto done;
220 edev->ops->common->set_id(edev->cdev, edev->ndev->name, "qede");
221 break;
222 case NETDEV_CHANGEADDR:
223 edev = netdev_priv(ndev);
224 qede_roce_event_changeaddr(edev);
225 break;
226 }
Yuval Mintz29502192015-10-26 11:02:29 +0200227
228done:
229 return NOTIFY_DONE;
230}
231
232static struct notifier_block qede_netdev_notifier = {
233 .notifier_call = qede_netdev_event,
234};
235
Yuval Mintze712d522015-10-26 11:02:27 +0200236static
237int __init qede_init(void)
238{
239 int ret;
Yuval Mintze712d522015-10-26 11:02:27 +0200240
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300241 pr_info("qede_init: %s\n", version);
Yuval Mintze712d522015-10-26 11:02:27 +0200242
Rahul Verma95114342016-04-10 12:42:59 +0300243 qed_ops = qed_get_eth_ops();
Yuval Mintze712d522015-10-26 11:02:27 +0200244 if (!qed_ops) {
245 pr_notice("Failed to get qed ethtool operations\n");
246 return -EINVAL;
247 }
248
Yuval Mintz29502192015-10-26 11:02:29 +0200249 /* Must register notifier before pci ops, since we might miss
250 * interface rename after pci probe and netdev registeration.
251 */
252 ret = register_netdevice_notifier(&qede_netdev_notifier);
253 if (ret) {
254 pr_notice("Failed to register netdevice_notifier\n");
255 qed_put_eth_ops();
256 return -EINVAL;
257 }
258
Yuval Mintze712d522015-10-26 11:02:27 +0200259 ret = pci_register_driver(&qede_pci_driver);
260 if (ret) {
261 pr_notice("Failed to register driver\n");
Yuval Mintz29502192015-10-26 11:02:29 +0200262 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200263 qed_put_eth_ops();
264 return -EINVAL;
265 }
266
267 return 0;
268}
269
270static void __exit qede_cleanup(void)
271{
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300272 if (debug & QED_LOG_INFO_MASK)
273 pr_info("qede_cleanup called\n");
Yuval Mintze712d522015-10-26 11:02:27 +0200274
Yuval Mintz29502192015-10-26 11:02:29 +0200275 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200276 pci_unregister_driver(&qede_pci_driver);
277 qed_put_eth_ops();
278}
279
280module_init(qede_init);
281module_exit(qede_cleanup);
282
283/* -------------------------------------------------------------------------
Yuval Mintz29502192015-10-26 11:02:29 +0200284 * START OF FAST-PATH
285 * -------------------------------------------------------------------------
286 */
287
288/* Unmap the data and free skb */
289static int qede_free_tx_pkt(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300290 struct qede_tx_queue *txq, int *len)
Yuval Mintz29502192015-10-26 11:02:29 +0200291{
292 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
293 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
294 struct eth_tx_1st_bd *first_bd;
295 struct eth_tx_bd *tx_data_bd;
296 int bds_consumed = 0;
297 int nbds;
298 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
299 int i, split_bd_len = 0;
300
301 if (unlikely(!skb)) {
302 DP_ERR(edev,
303 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
304 idx, txq->sw_tx_cons, txq->sw_tx_prod);
305 return -1;
306 }
307
308 *len = skb->len;
309
310 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
311
312 bds_consumed++;
313
314 nbds = first_bd->data.nbds;
315
316 if (data_split) {
317 struct eth_tx_bd *split = (struct eth_tx_bd *)
318 qed_chain_consume(&txq->tx_pbl);
319 split_bd_len = BD_UNMAP_LEN(split);
320 bds_consumed++;
321 }
Manish Choprafabd5452016-10-21 04:43:45 -0400322 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
323 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +0200324
325 /* Unmap the data of the skb frags */
326 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
327 tx_data_bd = (struct eth_tx_bd *)
328 qed_chain_consume(&txq->tx_pbl);
329 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
330 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
331 }
332
333 while (bds_consumed++ < nbds)
334 qed_chain_consume(&txq->tx_pbl);
335
336 /* Free skb */
337 dev_kfree_skb_any(skb);
338 txq->sw_tx_ring[idx].skb = NULL;
339 txq->sw_tx_ring[idx].flags = 0;
340
341 return 0;
342}
343
344/* Unmap the data and free skb when mapping failed during start_xmit */
345static void qede_free_failed_tx_pkt(struct qede_dev *edev,
346 struct qede_tx_queue *txq,
347 struct eth_tx_1st_bd *first_bd,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300348 int nbd, bool data_split)
Yuval Mintz29502192015-10-26 11:02:29 +0200349{
350 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
351 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
352 struct eth_tx_bd *tx_data_bd;
353 int i, split_bd_len = 0;
354
355 /* Return prod to its position before this skb was handled */
356 qed_chain_set_prod(&txq->tx_pbl,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300357 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +0200358
359 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
360
361 if (data_split) {
362 struct eth_tx_bd *split = (struct eth_tx_bd *)
363 qed_chain_produce(&txq->tx_pbl);
364 split_bd_len = BD_UNMAP_LEN(split);
365 nbd--;
366 }
367
Manish Choprafabd5452016-10-21 04:43:45 -0400368 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
369 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +0200370
371 /* Unmap the data of the skb frags */
372 for (i = 0; i < nbd; i++) {
373 tx_data_bd = (struct eth_tx_bd *)
374 qed_chain_produce(&txq->tx_pbl);
375 if (tx_data_bd->nbytes)
376 dma_unmap_page(&edev->pdev->dev,
377 BD_UNMAP_ADDR(tx_data_bd),
378 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
379 }
380
381 /* Return again prod to its position before this skb was handled */
382 qed_chain_set_prod(&txq->tx_pbl,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300383 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +0200384
385 /* Free skb */
386 dev_kfree_skb_any(skb);
387 txq->sw_tx_ring[idx].skb = NULL;
388 txq->sw_tx_ring[idx].flags = 0;
389}
390
391static u32 qede_xmit_type(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300392 struct sk_buff *skb, int *ipv6_ext)
Yuval Mintz29502192015-10-26 11:02:29 +0200393{
394 u32 rc = XMIT_L4_CSUM;
395 __be16 l3_proto;
396
397 if (skb->ip_summed != CHECKSUM_PARTIAL)
398 return XMIT_PLAIN;
399
400 l3_proto = vlan_get_protocol(skb);
401 if (l3_proto == htons(ETH_P_IPV6) &&
402 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
403 *ipv6_ext = 1;
404
Manish Chopraa1502412016-10-14 05:19:18 -0400405 if (skb->encapsulation) {
Manish Chopra14db81d2016-04-14 01:38:33 -0400406 rc |= XMIT_ENC;
Manish Chopraa1502412016-10-14 05:19:18 -0400407 if (skb_is_gso(skb)) {
408 unsigned short gso_type = skb_shinfo(skb)->gso_type;
409
410 if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
411 (gso_type & SKB_GSO_GRE_CSUM))
412 rc |= XMIT_ENC_GSO_L4_CSUM;
413
414 rc |= XMIT_LSO;
415 return rc;
416 }
417 }
Manish Chopra14db81d2016-04-14 01:38:33 -0400418
Yuval Mintz29502192015-10-26 11:02:29 +0200419 if (skb_is_gso(skb))
420 rc |= XMIT_LSO;
421
422 return rc;
423}
424
425static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
426 struct eth_tx_2nd_bd *second_bd,
427 struct eth_tx_3rd_bd *third_bd)
428{
429 u8 l4_proto;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500430 u16 bd2_bits1 = 0, bd2_bits2 = 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200431
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500432 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200433
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500434 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
Yuval Mintz29502192015-10-26 11:02:29 +0200435 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
436 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
437
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500438 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
Yuval Mintz29502192015-10-26 11:02:29 +0200439 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
440
441 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
442 l4_proto = ipv6_hdr(skb)->nexthdr;
443 else
444 l4_proto = ip_hdr(skb)->protocol;
445
446 if (l4_proto == IPPROTO_UDP)
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500447 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200448
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500449 if (third_bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200450 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500451 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
452 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
453 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200454
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500455 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
Yuval Mintz29502192015-10-26 11:02:29 +0200456 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
457}
458
459static int map_frag_to_bd(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300460 skb_frag_t *frag, struct eth_tx_bd *bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200461{
462 dma_addr_t mapping;
463
464 /* Map skb non-linear frag data for DMA */
465 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300466 skb_frag_size(frag), DMA_TO_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +0200467 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
468 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
469 return -ENOMEM;
470 }
471
472 /* Setup the data pointer of the frag data */
473 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
474
475 return 0;
476}
477
Manish Chopra14db81d2016-04-14 01:38:33 -0400478static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
479{
480 if (is_encap_pkt)
481 return (skb_inner_transport_header(skb) +
482 inner_tcp_hdrlen(skb) - skb->data);
483 else
484 return (skb_transport_header(skb) +
485 tcp_hdrlen(skb) - skb->data);
486}
487
Yuval Mintzb1199b12016-02-24 16:52:46 +0200488/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
489#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
490static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
491 u8 xmit_type)
492{
493 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
494
495 if (xmit_type & XMIT_LSO) {
496 int hlen;
497
Manish Chopra14db81d2016-04-14 01:38:33 -0400498 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
Yuval Mintzb1199b12016-02-24 16:52:46 +0200499
500 /* linear payload would require its own BD */
501 if (skb_headlen(skb) > hlen)
502 allowed_frags--;
503 }
504
505 return (skb_shinfo(skb)->nr_frags > allowed_frags);
506}
507#endif
508
Manish Chopra312e0672016-06-30 02:35:20 -0400509static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
510{
511 /* wmb makes sure that the BDs data is updated before updating the
512 * producer, otherwise FW may read old data from the BDs.
513 */
514 wmb();
515 barrier();
516 writel(txq->tx_db.raw, txq->doorbell_addr);
517
518 /* mmiowb is needed to synchronize doorbell writes from more than one
519 * processor. It guarantees that the write arrives to the device before
520 * the queue lock is released and another start_xmit is called (possibly
521 * on another CPU). Without this barrier, the next doorbell can bypass
522 * this doorbell. This is applicable to IA64/Altix systems.
523 */
524 mmiowb();
525}
526
Yuval Mintz29502192015-10-26 11:02:29 +0200527/* Main transmit function */
Yuval Mintz1a635e42016-08-15 10:42:43 +0300528static netdev_tx_t qede_start_xmit(struct sk_buff *skb,
529 struct net_device *ndev)
Yuval Mintz29502192015-10-26 11:02:29 +0200530{
531 struct qede_dev *edev = netdev_priv(ndev);
532 struct netdev_queue *netdev_txq;
533 struct qede_tx_queue *txq;
534 struct eth_tx_1st_bd *first_bd;
535 struct eth_tx_2nd_bd *second_bd = NULL;
536 struct eth_tx_3rd_bd *third_bd = NULL;
537 struct eth_tx_bd *tx_data_bd = NULL;
538 u16 txq_index;
539 u8 nbd = 0;
540 dma_addr_t mapping;
541 int rc, frag_idx = 0, ipv6_ext = 0;
542 u8 xmit_type;
543 u16 idx;
544 u16 hlen;
Dan Carpenter810810f2016-05-05 16:21:30 +0300545 bool data_split = false;
Yuval Mintz29502192015-10-26 11:02:29 +0200546
547 /* Get tx-queue context and netdev index */
548 txq_index = skb_get_queue_mapping(skb);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -0400549 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
Mintz, Yuval80439a12016-11-29 16:47:02 +0200550 txq = edev->fp_array[edev->fp_num_rx + txq_index].txq;
Yuval Mintz29502192015-10-26 11:02:29 +0200551 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
552
Yuval Mintz1a635e42016-08-15 10:42:43 +0300553 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
Yuval Mintz29502192015-10-26 11:02:29 +0200554
555 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
556
Yuval Mintzb1199b12016-02-24 16:52:46 +0200557#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
558 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
559 if (skb_linearize(skb)) {
560 DP_NOTICE(edev,
561 "SKB linearization failed - silently dropping this SKB\n");
562 dev_kfree_skb_any(skb);
563 return NETDEV_TX_OK;
564 }
565 }
566#endif
567
Yuval Mintz29502192015-10-26 11:02:29 +0200568 /* Fill the entry in the SW ring and the BDs in the FW ring */
569 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
570 txq->sw_tx_ring[idx].skb = skb;
571 first_bd = (struct eth_tx_1st_bd *)
572 qed_chain_produce(&txq->tx_pbl);
573 memset(first_bd, 0, sizeof(*first_bd));
574 first_bd->data.bd_flags.bitfields =
575 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
576
577 /* Map skb linear data for DMA and set in the first BD */
578 mapping = dma_map_single(&edev->pdev->dev, skb->data,
579 skb_headlen(skb), DMA_TO_DEVICE);
580 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
581 DP_NOTICE(edev, "SKB mapping failed\n");
582 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
Manish Chopra312e0672016-06-30 02:35:20 -0400583 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200584 return NETDEV_TX_OK;
585 }
586 nbd++;
587 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
588
589 /* In case there is IPv6 with extension headers or LSO we need 2nd and
590 * 3rd BDs.
591 */
592 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
593 second_bd = (struct eth_tx_2nd_bd *)
594 qed_chain_produce(&txq->tx_pbl);
595 memset(second_bd, 0, sizeof(*second_bd));
596
597 nbd++;
598 third_bd = (struct eth_tx_3rd_bd *)
599 qed_chain_produce(&txq->tx_pbl);
600 memset(third_bd, 0, sizeof(*third_bd));
601
602 nbd++;
603 /* We need to fill in additional data in second_bd... */
604 tx_data_bd = (struct eth_tx_bd *)second_bd;
605 }
606
607 if (skb_vlan_tag_present(skb)) {
608 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
609 first_bd->data.bd_flags.bitfields |=
610 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
611 }
612
613 /* Fill the parsing flags & params according to the requested offload */
614 if (xmit_type & XMIT_L4_CSUM) {
615 /* We don't re-calculate IP checksum as it is already done by
616 * the upper stack
617 */
618 first_bd->data.bd_flags.bitfields |=
619 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
620
Manish Chopra14db81d2016-04-14 01:38:33 -0400621 if (xmit_type & XMIT_ENC) {
622 first_bd->data.bd_flags.bitfields |=
623 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300624 first_bd->data.bitfields |=
625 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
Manish Chopra14db81d2016-04-14 01:38:33 -0400626 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500627
Yuval Mintzd8c2c7e2016-08-22 13:25:11 +0300628 /* Legacy FW had flipped behavior in regard to this bit -
629 * I.e., needed to set to prevent FW from touching encapsulated
630 * packets when it didn't need to.
631 */
632 if (unlikely(txq->is_legacy))
633 first_bd->data.bitfields ^=
634 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
635
Yuval Mintz29502192015-10-26 11:02:29 +0200636 /* If the packet is IPv6 with extension header, indicate that
637 * to FW and pass few params, since the device cracker doesn't
638 * support parsing IPv6 with extension header/s.
639 */
640 if (unlikely(ipv6_ext))
641 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
642 }
643
644 if (xmit_type & XMIT_LSO) {
645 first_bd->data.bd_flags.bitfields |=
646 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
647 third_bd->data.lso_mss =
648 cpu_to_le16(skb_shinfo(skb)->gso_size);
649
Manish Chopra14db81d2016-04-14 01:38:33 -0400650 if (unlikely(xmit_type & XMIT_ENC)) {
651 first_bd->data.bd_flags.bitfields |=
652 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
Manish Chopraa1502412016-10-14 05:19:18 -0400653
654 if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
655 u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
656
657 first_bd->data.bd_flags.bitfields |= 1 << tmp;
658 }
Manish Chopra14db81d2016-04-14 01:38:33 -0400659 hlen = qede_get_skb_hlen(skb, true);
660 } else {
661 first_bd->data.bd_flags.bitfields |=
662 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
663 hlen = qede_get_skb_hlen(skb, false);
664 }
Yuval Mintz29502192015-10-26 11:02:29 +0200665
666 /* @@@TBD - if will not be removed need to check */
667 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500668 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
Yuval Mintz29502192015-10-26 11:02:29 +0200669
670 /* Make life easier for FW guys who can't deal with header and
671 * data on same BD. If we need to split, use the second bd...
672 */
673 if (unlikely(skb_headlen(skb) > hlen)) {
674 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
675 "TSO split header size is %d (%x:%x)\n",
676 first_bd->nbytes, first_bd->addr.hi,
677 first_bd->addr.lo);
678
679 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
680 le32_to_cpu(first_bd->addr.lo)) +
681 hlen;
682
683 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
684 le16_to_cpu(first_bd->nbytes) -
685 hlen);
686
687 /* this marks the BD as one that has no
688 * individual mapping
689 */
690 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
691
692 first_bd->nbytes = cpu_to_le16(hlen);
693
694 tx_data_bd = (struct eth_tx_bd *)third_bd;
695 data_split = true;
696 }
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300697 } else {
698 first_bd->data.bitfields |=
699 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
700 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200701 }
702
703 /* Handle fragmented skb */
704 /* special handle for frags inside 2nd and 3rd bds.. */
705 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
706 rc = map_frag_to_bd(edev,
707 &skb_shinfo(skb)->frags[frag_idx],
708 tx_data_bd);
709 if (rc) {
710 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
711 data_split);
Manish Chopra312e0672016-06-30 02:35:20 -0400712 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200713 return NETDEV_TX_OK;
714 }
715
716 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
717 tx_data_bd = (struct eth_tx_bd *)third_bd;
718 else
719 tx_data_bd = NULL;
720
721 frag_idx++;
722 }
723
724 /* map last frags into 4th, 5th .... */
725 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
726 tx_data_bd = (struct eth_tx_bd *)
727 qed_chain_produce(&txq->tx_pbl);
728
729 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
730
731 rc = map_frag_to_bd(edev,
732 &skb_shinfo(skb)->frags[frag_idx],
733 tx_data_bd);
734 if (rc) {
735 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
736 data_split);
Manish Chopra312e0672016-06-30 02:35:20 -0400737 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200738 return NETDEV_TX_OK;
739 }
740 }
741
742 /* update the first BD with the actual num BDs */
743 first_bd->data.nbds = nbd;
744
745 netdev_tx_sent_queue(netdev_txq, skb->len);
746
747 skb_tx_timestamp(skb);
748
749 /* Advance packet producer only before sending the packet since mapping
750 * of pages may fail.
751 */
752 txq->sw_tx_prod++;
753
754 /* 'next page' entries are counted in the producer value */
755 txq->tx_db.data.bd_prod =
756 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
757
Yuval Mintz039a3922016-08-16 18:40:18 +0300758 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
Manish Chopra312e0672016-06-30 02:35:20 -0400759 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200760
761 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
762 < (MAX_SKB_FRAGS + 1))) {
Yuval Mintz039a3922016-08-16 18:40:18 +0300763 if (skb->xmit_more)
764 qede_update_tx_producer(txq);
765
Yuval Mintz29502192015-10-26 11:02:29 +0200766 netif_tx_stop_queue(netdev_txq);
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -0400767 txq->stopped_cnt++;
Yuval Mintz29502192015-10-26 11:02:29 +0200768 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
769 "Stop queue was called\n");
770 /* paired memory barrier is in qede_tx_int(), we have to keep
771 * ordering of set_bit() in netif_tx_stop_queue() and read of
772 * fp->bd_tx_cons
773 */
774 smp_mb();
775
776 if (qed_chain_get_elem_left(&txq->tx_pbl)
777 >= (MAX_SKB_FRAGS + 1) &&
778 (edev->state == QEDE_STATE_OPEN)) {
779 netif_tx_wake_queue(netdev_txq);
780 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
781 "Wake queue was called\n");
782 }
783 }
784
785 return NETDEV_TX_OK;
786}
787
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400788int qede_txq_has_work(struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200789{
790 u16 hw_bd_cons;
791
792 /* Tell compiler that consumer and producer can change */
793 barrier();
794 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
795 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
796 return 0;
797
798 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
799}
800
Yuval Mintz1a635e42016-08-15 10:42:43 +0300801static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200802{
803 struct netdev_queue *netdev_txq;
804 u16 hw_bd_cons;
805 unsigned int pkts_compl = 0, bytes_compl = 0;
806 int rc;
807
808 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
809
810 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
811 barrier();
812
813 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
814 int len = 0;
815
816 rc = qede_free_tx_pkt(edev, txq, &len);
817 if (rc) {
818 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
819 hw_bd_cons,
820 qed_chain_get_cons_idx(&txq->tx_pbl));
821 break;
822 }
823
824 bytes_compl += len;
825 pkts_compl++;
826 txq->sw_tx_cons++;
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -0400827 txq->xmit_pkts++;
Yuval Mintz29502192015-10-26 11:02:29 +0200828 }
829
830 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
831
832 /* Need to make the tx_bd_cons update visible to start_xmit()
833 * before checking for netif_tx_queue_stopped(). Without the
834 * memory barrier, there is a small possibility that
835 * start_xmit() will miss it and cause the queue to be stopped
836 * forever.
837 * On the other hand we need an rmb() here to ensure the proper
838 * ordering of bit testing in the following
839 * netif_tx_queue_stopped(txq) call.
840 */
841 smp_mb();
842
843 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
844 /* Taking tx_lock is needed to prevent reenabling the queue
845 * while it's empty. This could have happen if rx_action() gets
846 * suspended in qede_tx_int() after the condition before
847 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
848 *
849 * stops the queue->sees fresh tx_bd_cons->releases the queue->
850 * sends some packets consuming the whole queue again->
851 * stops the queue
852 */
853
854 __netif_tx_lock(netdev_txq, smp_processor_id());
855
856 if ((netif_tx_queue_stopped(netdev_txq)) &&
857 (edev->state == QEDE_STATE_OPEN) &&
858 (qed_chain_get_elem_left(&txq->tx_pbl)
859 >= (MAX_SKB_FRAGS + 1))) {
860 netif_tx_wake_queue(netdev_txq);
861 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
862 "Wake queue was called\n");
863 }
864
865 __netif_tx_unlock(netdev_txq);
866 }
867
868 return 0;
869}
870
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400871bool qede_has_rx_work(struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +0200872{
873 u16 hw_comp_cons, sw_comp_cons;
874
875 /* Tell compiler that status block fields can change */
876 barrier();
877
878 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
879 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
880
881 return hw_comp_cons != sw_comp_cons;
882}
883
Manish Chopraf86af2d2016-04-20 03:03:27 -0400884static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
885{
886 qed_chain_consume(&rxq->rx_bd_ring);
887 rxq->sw_rx_cons++;
888}
889
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500890/* This function reuses the buffer(from an offset) from
891 * consumer index to producer index in the bd ring
Yuval Mintz29502192015-10-26 11:02:29 +0200892 */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500893static inline void qede_reuse_page(struct qede_dev *edev,
894 struct qede_rx_queue *rxq,
895 struct sw_rx_data *curr_cons)
Yuval Mintz29502192015-10-26 11:02:29 +0200896{
Yuval Mintz29502192015-10-26 11:02:29 +0200897 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500898 struct sw_rx_data *curr_prod;
899 dma_addr_t new_mapping;
Yuval Mintz29502192015-10-26 11:02:29 +0200900
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500901 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
902 *curr_prod = *curr_cons;
Yuval Mintz29502192015-10-26 11:02:29 +0200903
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500904 new_mapping = curr_prod->mapping + curr_prod->page_offset;
Yuval Mintz29502192015-10-26 11:02:29 +0200905
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500906 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
907 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
908
Yuval Mintz29502192015-10-26 11:02:29 +0200909 rxq->sw_rx_prod++;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500910 curr_cons->data = NULL;
911}
912
Manish Chopraf86af2d2016-04-20 03:03:27 -0400913/* In case of allocation failures reuse buffers
914 * from consumer index to produce buffers for firmware
915 */
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400916void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
917 struct qede_dev *edev, u8 count)
Manish Chopraf86af2d2016-04-20 03:03:27 -0400918{
919 struct sw_rx_data *curr_cons;
920
921 for (; count > 0; count--) {
922 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
923 qede_reuse_page(edev, rxq, curr_cons);
924 qede_rx_bd_ring_consume(rxq);
925 }
926}
927
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500928static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
929 struct qede_rx_queue *rxq,
930 struct sw_rx_data *curr_cons)
931{
932 /* Move to the next segment in the page */
933 curr_cons->page_offset += rxq->rx_buf_seg_size;
934
935 if (curr_cons->page_offset == PAGE_SIZE) {
Manish Chopraf86af2d2016-04-20 03:03:27 -0400936 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
937 /* Since we failed to allocate new buffer
938 * current buffer can be used again.
939 */
940 curr_cons->page_offset -= rxq->rx_buf_seg_size;
941
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500942 return -ENOMEM;
Manish Chopraf86af2d2016-04-20 03:03:27 -0400943 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500944
945 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
946 PAGE_SIZE, DMA_FROM_DEVICE);
947 } else {
948 /* Increment refcount of the page as we don't want
949 * network stack to take the ownership of the page
950 * which can be recycled multiple times by the driver.
951 */
Joonsoo Kim6d061f92016-05-19 17:10:46 -0700952 page_ref_inc(curr_cons->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500953 qede_reuse_page(edev, rxq, curr_cons);
954 }
955
956 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200957}
958
Sudarsana Reddy Kalluru837d4eb2016-10-21 04:43:41 -0400959void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +0200960{
961 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
962 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
963 struct eth_rx_prod_data rx_prods = {0};
964
965 /* Update producers */
966 rx_prods.bd_prod = cpu_to_le16(bd_prod);
967 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
968
969 /* Make sure that the BD and SGE data is updated before updating the
970 * producers since FW might read the BD/SGE right after the producer
971 * is updated.
972 */
973 wmb();
974
975 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
976 (u32 *)&rx_prods);
977
978 /* mmiowb is needed to synchronize doorbell writes from more than one
979 * processor. It guarantees that the write arrives to the device before
980 * the napi lock is released and another qede_poll is called (possibly
981 * on another CPU). Without this barrier, the next doorbell can bypass
982 * this doorbell. This is applicable to IA64/Altix systems.
983 */
984 mmiowb();
985}
986
987static u32 qede_get_rxhash(struct qede_dev *edev,
988 u8 bitfields,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300989 __le32 rss_hash, enum pkt_hash_types *rxhash_type)
Yuval Mintz29502192015-10-26 11:02:29 +0200990{
991 enum rss_hash_type htype;
992
993 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
994
995 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
996 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
997 (htype == RSS_HASH_TYPE_IPV6)) ?
998 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
999 return le32_to_cpu(rss_hash);
1000 }
1001 *rxhash_type = PKT_HASH_TYPE_NONE;
1002 return 0;
1003}
1004
1005static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
1006{
1007 skb_checksum_none_assert(skb);
1008
1009 if (csum_flag & QEDE_CSUM_UNNECESSARY)
1010 skb->ip_summed = CHECKSUM_UNNECESSARY;
Manish Chopra14db81d2016-04-14 01:38:33 -04001011
1012 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
1013 skb->csum_level = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02001014}
1015
1016static inline void qede_skb_receive(struct qede_dev *edev,
1017 struct qede_fastpath *fp,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001018 struct sk_buff *skb, u16 vlan_tag)
Yuval Mintz29502192015-10-26 11:02:29 +02001019{
1020 if (vlan_tag)
Yuval Mintz1a635e42016-08-15 10:42:43 +03001021 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
Yuval Mintz29502192015-10-26 11:02:29 +02001022
1023 napi_gro_receive(&fp->napi, skb);
1024}
1025
Manish Chopra55482ed2016-03-04 12:35:06 -05001026static void qede_set_gro_params(struct qede_dev *edev,
1027 struct sk_buff *skb,
1028 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1029{
1030 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1031
1032 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1033 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1034 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1035 else
1036 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1037
1038 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1039 cqe->header_len;
1040}
1041
1042static int qede_fill_frag_skb(struct qede_dev *edev,
1043 struct qede_rx_queue *rxq,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001044 u8 tpa_agg_index, u16 len_on_bd)
Manish Chopra55482ed2016-03-04 12:35:06 -05001045{
1046 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1047 NUM_RX_BDS_MAX];
1048 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1049 struct sk_buff *skb = tpa_info->skb;
1050
Mintz, Yuval01e23012016-11-29 16:47:00 +02001051 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
Manish Chopra55482ed2016-03-04 12:35:06 -05001052 goto out;
1053
1054 /* Add one frag and update the appropriate fields in the skb */
1055 skb_fill_page_desc(skb, tpa_info->frag_id++,
1056 current_bd->data, current_bd->page_offset,
1057 len_on_bd);
1058
1059 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001060 /* Incr page ref count to reuse on allocation failure
1061 * so that it doesn't get freed while freeing SKB.
1062 */
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001063 page_ref_inc(current_bd->data);
Manish Chopra55482ed2016-03-04 12:35:06 -05001064 goto out;
1065 }
1066
1067 qed_chain_consume(&rxq->rx_bd_ring);
1068 rxq->sw_rx_cons++;
1069
1070 skb->data_len += len_on_bd;
1071 skb->truesize += rxq->rx_buf_seg_size;
1072 skb->len += len_on_bd;
1073
1074 return 0;
1075
1076out:
Mintz, Yuval01e23012016-11-29 16:47:00 +02001077 tpa_info->state = QEDE_AGG_STATE_ERROR;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001078 qede_recycle_rx_bd_ring(rxq, edev, 1);
Manish Chopra55482ed2016-03-04 12:35:06 -05001079 return -ENOMEM;
1080}
1081
1082static void qede_tpa_start(struct qede_dev *edev,
1083 struct qede_rx_queue *rxq,
1084 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1085{
1086 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1087 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1088 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
Mintz, Yuval01e23012016-11-29 16:47:00 +02001089 struct sw_rx_data *replace_buf = &tpa_info->buffer;
1090 dma_addr_t mapping = tpa_info->buffer_mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05001091 struct sw_rx_data *sw_rx_data_cons;
1092 struct sw_rx_data *sw_rx_data_prod;
1093 enum pkt_hash_types rxhash_type;
1094 u32 rxhash;
1095
1096 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1097 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1098
1099 /* Use pre-allocated replacement buffer - we can't release the agg.
1100 * start until its over and we don't want to risk allocation failing
1101 * here, so re-allocate when aggregation will be over.
1102 */
Manish Chopra09ec8e72016-05-18 07:43:57 -04001103 sw_rx_data_prod->mapping = replace_buf->mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05001104
1105 sw_rx_data_prod->data = replace_buf->data;
1106 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1107 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1108 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1109
1110 rxq->sw_rx_prod++;
1111
1112 /* move partial skb from cons to pool (don't unmap yet)
1113 * save mapping, incase we drop the packet later on.
1114 */
Mintz, Yuval01e23012016-11-29 16:47:00 +02001115 tpa_info->buffer = *sw_rx_data_cons;
Manish Chopra55482ed2016-03-04 12:35:06 -05001116 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1117 le32_to_cpu(rx_bd_cons->addr.lo));
1118
Mintz, Yuval01e23012016-11-29 16:47:00 +02001119 tpa_info->buffer_mapping = mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05001120 rxq->sw_rx_cons++;
1121
1122 /* set tpa state to start only if we are able to allocate skb
1123 * for this aggregation, otherwise mark as error and aggregation will
1124 * be dropped
1125 */
1126 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1127 le16_to_cpu(cqe->len_on_first_bd));
1128 if (unlikely(!tpa_info->skb)) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001129 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
Mintz, Yuval01e23012016-11-29 16:47:00 +02001130 tpa_info->state = QEDE_AGG_STATE_ERROR;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001131 goto cons_buf;
Manish Chopra55482ed2016-03-04 12:35:06 -05001132 }
1133
Manish Chopra55482ed2016-03-04 12:35:06 -05001134 /* Start filling in the aggregation info */
Mintz, Yuval01e23012016-11-29 16:47:00 +02001135 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
Manish Chopra55482ed2016-03-04 12:35:06 -05001136 tpa_info->frag_id = 0;
Mintz, Yuval01e23012016-11-29 16:47:00 +02001137 tpa_info->state = QEDE_AGG_STATE_START;
Manish Chopra55482ed2016-03-04 12:35:06 -05001138
1139 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1140 cqe->rss_hash, &rxhash_type);
1141 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
Mintz, Yuval01e23012016-11-29 16:47:00 +02001142
1143 /* Store some information from first CQE */
1144 tpa_info->start_cqe_placement_offset = cqe->placement_offset;
1145 tpa_info->start_cqe_bd_len = le16_to_cpu(cqe->len_on_first_bd);
Manish Chopra55482ed2016-03-04 12:35:06 -05001146 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1147 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
Mintz, Yuval01e23012016-11-29 16:47:00 +02001148 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
Manish Chopra55482ed2016-03-04 12:35:06 -05001149 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1150 else
1151 tpa_info->vlan_tag = 0;
1152
1153 /* This is needed in order to enable forwarding support */
1154 qede_set_gro_params(edev, tpa_info->skb, cqe);
1155
Manish Chopraf86af2d2016-04-20 03:03:27 -04001156cons_buf: /* We still need to handle bd_len_list to consume buffers */
Manish Chopra55482ed2016-03-04 12:35:06 -05001157 if (likely(cqe->ext_bd_len_list[0]))
1158 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1159 le16_to_cpu(cqe->ext_bd_len_list[0]));
1160
1161 if (unlikely(cqe->ext_bd_len_list[1])) {
1162 DP_ERR(edev,
1163 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
Mintz, Yuval01e23012016-11-29 16:47:00 +02001164 tpa_info->state = QEDE_AGG_STATE_ERROR;
Manish Chopra55482ed2016-03-04 12:35:06 -05001165 }
1166}
1167
Manish Chopra88f09bd2016-03-08 04:09:44 -05001168#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001169static void qede_gro_ip_csum(struct sk_buff *skb)
1170{
1171 const struct iphdr *iph = ip_hdr(skb);
1172 struct tcphdr *th;
1173
Manish Chopra55482ed2016-03-04 12:35:06 -05001174 skb_set_transport_header(skb, sizeof(struct iphdr));
1175 th = tcp_hdr(skb);
1176
1177 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1178 iph->saddr, iph->daddr, 0);
1179
1180 tcp_gro_complete(skb);
1181}
1182
1183static void qede_gro_ipv6_csum(struct sk_buff *skb)
1184{
1185 struct ipv6hdr *iph = ipv6_hdr(skb);
1186 struct tcphdr *th;
1187
Manish Chopra55482ed2016-03-04 12:35:06 -05001188 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1189 th = tcp_hdr(skb);
1190
1191 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1192 &iph->saddr, &iph->daddr, 0);
1193 tcp_gro_complete(skb);
1194}
Manish Chopra88f09bd2016-03-08 04:09:44 -05001195#endif
Manish Chopra55482ed2016-03-04 12:35:06 -05001196
1197static void qede_gro_receive(struct qede_dev *edev,
1198 struct qede_fastpath *fp,
1199 struct sk_buff *skb,
1200 u16 vlan_tag)
1201{
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001202 /* FW can send a single MTU sized packet from gro flow
1203 * due to aggregation timeout/last segment etc. which
1204 * is not expected to be a gro packet. If a skb has zero
1205 * frags then simply push it in the stack as non gso skb.
1206 */
1207 if (unlikely(!skb->data_len)) {
1208 skb_shinfo(skb)->gso_type = 0;
1209 skb_shinfo(skb)->gso_size = 0;
1210 goto send_skb;
1211 }
1212
Manish Chopra88f09bd2016-03-08 04:09:44 -05001213#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001214 if (skb_shinfo(skb)->gso_size) {
Manish Chopraaad94c02016-04-20 03:03:28 -04001215 skb_set_network_header(skb, 0);
1216
Manish Chopra55482ed2016-03-04 12:35:06 -05001217 switch (skb->protocol) {
1218 case htons(ETH_P_IP):
1219 qede_gro_ip_csum(skb);
1220 break;
1221 case htons(ETH_P_IPV6):
1222 qede_gro_ipv6_csum(skb);
1223 break;
1224 default:
1225 DP_ERR(edev,
1226 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1227 ntohs(skb->protocol));
1228 }
1229 }
Manish Chopra88f09bd2016-03-08 04:09:44 -05001230#endif
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001231
1232send_skb:
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001233 skb_record_rx_queue(skb, fp->rxq->rxq_id);
Manish Chopra55482ed2016-03-04 12:35:06 -05001234 qede_skb_receive(edev, fp, skb, vlan_tag);
1235}
1236
1237static inline void qede_tpa_cont(struct qede_dev *edev,
1238 struct qede_rx_queue *rxq,
1239 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1240{
1241 int i;
1242
1243 for (i = 0; cqe->len_list[i]; i++)
1244 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1245 le16_to_cpu(cqe->len_list[i]));
1246
1247 if (unlikely(i > 1))
1248 DP_ERR(edev,
1249 "Strange - TPA cont with more than a single len_list entry\n");
1250}
1251
1252static void qede_tpa_end(struct qede_dev *edev,
1253 struct qede_fastpath *fp,
1254 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1255{
1256 struct qede_rx_queue *rxq = fp->rxq;
1257 struct qede_agg_info *tpa_info;
1258 struct sk_buff *skb;
1259 int i;
1260
1261 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1262 skb = tpa_info->skb;
1263
1264 for (i = 0; cqe->len_list[i]; i++)
1265 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1266 le16_to_cpu(cqe->len_list[i]));
1267 if (unlikely(i > 1))
1268 DP_ERR(edev,
1269 "Strange - TPA emd with more than a single len_list entry\n");
1270
Mintz, Yuval01e23012016-11-29 16:47:00 +02001271 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
Manish Chopra55482ed2016-03-04 12:35:06 -05001272 goto err;
1273
1274 /* Sanity */
1275 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1276 DP_ERR(edev,
1277 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1278 cqe->num_of_bds, tpa_info->frag_id);
1279 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1280 DP_ERR(edev,
1281 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1282 le16_to_cpu(cqe->total_packet_len), skb->len);
1283
1284 memcpy(skb->data,
Mintz, Yuval01e23012016-11-29 16:47:00 +02001285 page_address(tpa_info->buffer.data) +
1286 tpa_info->start_cqe_placement_offset +
1287 tpa_info->buffer.page_offset, tpa_info->start_cqe_bd_len);
Manish Chopra55482ed2016-03-04 12:35:06 -05001288
1289 /* Finalize the SKB */
1290 skb->protocol = eth_type_trans(skb, edev->ndev);
1291 skb->ip_summed = CHECKSUM_UNNECESSARY;
1292
1293 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1294 * to skb_shinfo(skb)->gso_segs
1295 */
1296 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1297
1298 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1299
Mintz, Yuval01e23012016-11-29 16:47:00 +02001300 tpa_info->state = QEDE_AGG_STATE_NONE;
Manish Chopra55482ed2016-03-04 12:35:06 -05001301
1302 return;
1303err:
Mintz, Yuval01e23012016-11-29 16:47:00 +02001304 tpa_info->state = QEDE_AGG_STATE_NONE;
Manish Chopra55482ed2016-03-04 12:35:06 -05001305 dev_kfree_skb_any(tpa_info->skb);
1306 tpa_info->skb = NULL;
1307}
1308
Manish Chopra14db81d2016-04-14 01:38:33 -04001309static bool qede_tunn_exist(u16 flag)
1310{
1311 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1312 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1313}
1314
1315static u8 qede_check_tunn_csum(u16 flag)
1316{
1317 u16 csum_flag = 0;
1318 u8 tcsum = 0;
1319
1320 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1321 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1322 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1323 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1324
1325 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1326 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1327 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1328 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1329 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1330 }
1331
1332 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1333 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1334 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1335 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1336
1337 if (csum_flag & flag)
1338 return QEDE_CSUM_ERROR;
1339
1340 return QEDE_CSUM_UNNECESSARY | tcsum;
1341}
1342
1343static u8 qede_check_notunn_csum(u16 flag)
Yuval Mintz29502192015-10-26 11:02:29 +02001344{
1345 u16 csum_flag = 0;
1346 u8 csum = 0;
1347
Manish Chopra14db81d2016-04-14 01:38:33 -04001348 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1349 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
Yuval Mintz29502192015-10-26 11:02:29 +02001350 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1351 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1352 csum = QEDE_CSUM_UNNECESSARY;
1353 }
1354
1355 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1356 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1357
1358 if (csum_flag & flag)
1359 return QEDE_CSUM_ERROR;
1360
1361 return csum;
1362}
1363
Manish Chopra14db81d2016-04-14 01:38:33 -04001364static u8 qede_check_csum(u16 flag)
1365{
1366 if (!qede_tunn_exist(flag))
1367 return qede_check_notunn_csum(flag);
1368 else
1369 return qede_check_tunn_csum(flag);
1370}
1371
Manish Choprac72a6122016-06-30 02:35:18 -04001372static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1373 u16 flag)
1374{
1375 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1376
1377 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1378 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1379 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1380 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1381 return true;
1382
1383 return false;
1384}
1385
Yuval Mintz29502192015-10-26 11:02:29 +02001386static int qede_rx_int(struct qede_fastpath *fp, int budget)
1387{
1388 struct qede_dev *edev = fp->edev;
1389 struct qede_rx_queue *rxq = fp->rxq;
1390
1391 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1392 int rx_pkt = 0;
1393 u8 csum_flag;
1394
1395 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1396 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1397
1398 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1399 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1400 * read before it is written by FW, then FW writes CQE and SB, and then
1401 * the CPU reads the hw_comp_cons, it will use an old CQE.
1402 */
1403 rmb();
1404
1405 /* Loop to complete all indicated BDs */
1406 while (sw_comp_cons != hw_comp_cons) {
1407 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1408 enum pkt_hash_types rxhash_type;
1409 enum eth_rx_cqe_type cqe_type;
1410 struct sw_rx_data *sw_rx_data;
1411 union eth_rx_cqe *cqe;
1412 struct sk_buff *skb;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001413 struct page *data;
1414 __le16 flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001415 u16 len, pad;
1416 u32 rx_hash;
Yuval Mintz29502192015-10-26 11:02:29 +02001417
1418 /* Get the CQE from the completion ring */
1419 cqe = (union eth_rx_cqe *)
1420 qed_chain_consume(&rxq->rx_comp_ring);
1421 cqe_type = cqe->fast_path_regular.type;
1422
1423 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1424 edev->ops->eth_cqe_completion(
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001425 edev->cdev, fp->id,
Yuval Mintz29502192015-10-26 11:02:29 +02001426 (struct eth_slow_path_rx_cqe *)cqe);
1427 goto next_cqe;
1428 }
1429
Manish Chopra55482ed2016-03-04 12:35:06 -05001430 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1431 switch (cqe_type) {
1432 case ETH_RX_CQE_TYPE_TPA_START:
1433 qede_tpa_start(edev, rxq,
1434 &cqe->fast_path_tpa_start);
1435 goto next_cqe;
1436 case ETH_RX_CQE_TYPE_TPA_CONT:
1437 qede_tpa_cont(edev, rxq,
1438 &cqe->fast_path_tpa_cont);
1439 goto next_cqe;
1440 case ETH_RX_CQE_TYPE_TPA_END:
1441 qede_tpa_end(edev, fp,
1442 &cqe->fast_path_tpa_end);
1443 goto next_rx_only;
1444 default:
1445 break;
1446 }
1447 }
1448
Yuval Mintz29502192015-10-26 11:02:29 +02001449 /* Get the data from the SW ring */
1450 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1451 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1452 data = sw_rx_data->data;
1453
1454 fp_cqe = &cqe->fast_path_regular;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001455 len = le16_to_cpu(fp_cqe->len_on_first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +02001456 pad = fp_cqe->placement_offset;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001457 flags = cqe->fast_path_regular.pars_flags.flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001458
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001459 /* If this is an error packet then drop it */
1460 parse_flag = le16_to_cpu(flags);
Yuval Mintz29502192015-10-26 11:02:29 +02001461
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001462 csum_flag = qede_check_csum(parse_flag);
1463 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
Manish Choprac72a6122016-06-30 02:35:18 -04001464 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular,
1465 parse_flag)) {
1466 rxq->rx_ip_frags++;
1467 goto alloc_skb;
1468 }
1469
Yuval Mintz29502192015-10-26 11:02:29 +02001470 DP_NOTICE(edev,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001471 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1472 sw_comp_cons, parse_flag);
1473 rxq->rx_hw_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001474 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1475 goto next_cqe;
Yuval Mintz29502192015-10-26 11:02:29 +02001476 }
1477
Manish Choprac72a6122016-06-30 02:35:18 -04001478alloc_skb:
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001479 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1480 if (unlikely(!skb)) {
1481 DP_NOTICE(edev,
Yuval Mintz525ef5c2016-08-15 10:42:45 +03001482 "skb allocation failed, dropping incoming packet\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001483 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001484 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001485 goto next_cqe;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001486 }
Yuval Mintz29502192015-10-26 11:02:29 +02001487
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001488 /* Copy data into SKB */
Manish Chopra3d789992016-06-30 02:35:21 -04001489 if (len + pad <= edev->rx_copybreak) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001490 memcpy(skb_put(skb, len),
1491 page_address(data) + pad +
1492 sw_rx_data->page_offset, len);
1493 qede_reuse_page(edev, rxq, sw_rx_data);
1494 } else {
1495 struct skb_frag_struct *frag;
1496 unsigned int pull_len;
1497 unsigned char *va;
1498
1499 frag = &skb_shinfo(skb)->frags[0];
1500
1501 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1502 pad + sw_rx_data->page_offset,
1503 len, rxq->rx_buf_seg_size);
1504
1505 va = skb_frag_address(frag);
1506 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1507
1508 /* Align the pull_len to optimize memcpy */
1509 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1510
1511 skb_frag_size_sub(frag, pull_len);
1512 frag->page_offset += pull_len;
1513 skb->data_len -= pull_len;
1514 skb->tail += pull_len;
1515
1516 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1517 sw_rx_data))) {
1518 DP_ERR(edev, "Failed to allocate rx buffer\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001519 /* Incr page ref count to reuse on allocation
1520 * failure so that it doesn't get freed while
1521 * freeing SKB.
1522 */
1523
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001524 page_ref_inc(sw_rx_data->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001525 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001526 qede_recycle_rx_bd_ring(rxq, edev,
1527 fp_cqe->bd_num);
1528 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001529 goto next_cqe;
1530 }
1531 }
1532
Manish Chopraf86af2d2016-04-20 03:03:27 -04001533 qede_rx_bd_ring_consume(rxq);
1534
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001535 if (fp_cqe->bd_num != 1) {
1536 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1537 u8 num_frags;
1538
1539 pkt_len -= len;
1540
1541 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1542 num_frags--) {
1543 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1544 rxq->rx_buf_size : pkt_len;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001545 if (unlikely(!cur_size)) {
1546 DP_ERR(edev,
1547 "Still got %d BDs for mapping jumbo, but length became 0\n",
1548 num_frags);
1549 qede_recycle_rx_bd_ring(rxq, edev,
1550 num_frags);
1551 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001552 goto next_cqe;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001553 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001554
Manish Chopraf86af2d2016-04-20 03:03:27 -04001555 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1556 qede_recycle_rx_bd_ring(rxq, edev,
1557 num_frags);
1558 dev_kfree_skb_any(skb);
1559 goto next_cqe;
1560 }
1561
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001562 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1563 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
Manish Chopraf86af2d2016-04-20 03:03:27 -04001564 qede_rx_bd_ring_consume(rxq);
1565
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001566 dma_unmap_page(&edev->pdev->dev,
1567 sw_rx_data->mapping,
1568 PAGE_SIZE, DMA_FROM_DEVICE);
1569
1570 skb_fill_page_desc(skb,
1571 skb_shinfo(skb)->nr_frags++,
1572 sw_rx_data->data, 0,
1573 cur_size);
1574
1575 skb->truesize += PAGE_SIZE;
1576 skb->data_len += cur_size;
1577 skb->len += cur_size;
1578 pkt_len -= cur_size;
1579 }
1580
Manish Chopraf86af2d2016-04-20 03:03:27 -04001581 if (unlikely(pkt_len))
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001582 DP_ERR(edev,
1583 "Mapped all BDs of jumbo, but still have %d bytes\n",
1584 pkt_len);
1585 }
Yuval Mintz29502192015-10-26 11:02:29 +02001586
1587 skb->protocol = eth_type_trans(skb, edev->ndev);
1588
1589 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001590 fp_cqe->rss_hash, &rxhash_type);
Yuval Mintz29502192015-10-26 11:02:29 +02001591
1592 skb_set_hash(skb, rx_hash, rxhash_type);
1593
1594 qede_set_skb_csum(skb, csum_flag);
1595
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001596 skb_record_rx_queue(skb, fp->rxq->rxq_id);
Yuval Mintz29502192015-10-26 11:02:29 +02001597
1598 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
Manish Chopra55482ed2016-03-04 12:35:06 -05001599next_rx_only:
Yuval Mintz29502192015-10-26 11:02:29 +02001600 rx_pkt++;
1601
1602next_cqe: /* don't consume bd rx buffer */
1603 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1604 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1605 /* CR TPA - revisit how to handle budget in TPA perhaps
1606 * increase on "end"
1607 */
1608 if (rx_pkt == budget)
1609 break;
1610 } /* repeat while sw_comp_cons != hw_comp_cons... */
1611
1612 /* Update producers */
1613 qede_update_rx_prod(edev, rxq);
1614
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -04001615 rxq->rcv_pkts += rx_pkt;
1616
Yuval Mintz29502192015-10-26 11:02:29 +02001617 return rx_pkt;
1618}
1619
1620static int qede_poll(struct napi_struct *napi, int budget)
1621{
Yuval Mintz29502192015-10-26 11:02:29 +02001622 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
Manish Choprac7741692016-06-30 02:35:19 -04001623 napi);
Yuval Mintz29502192015-10-26 11:02:29 +02001624 struct qede_dev *edev = fp->edev;
Manish Choprac7741692016-06-30 02:35:19 -04001625 int rx_work_done = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02001626
Mintz, Yuval80439a12016-11-29 16:47:02 +02001627 if (likely(fp->type & QEDE_FASTPATH_TX) && qede_txq_has_work(fp->txq))
1628 qede_tx_int(edev, fp->txq);
Yuval Mintz29502192015-10-26 11:02:29 +02001629
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001630 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
1631 qede_has_rx_work(fp->rxq)) ?
Manish Choprac7741692016-06-30 02:35:19 -04001632 qede_rx_int(fp, budget) : 0;
1633 if (rx_work_done < budget) {
1634 qed_sb_update_sb_idx(fp->sb_info);
1635 /* *_has_*_work() reads the status block,
1636 * thus we need to ensure that status block indices
1637 * have been actually read (qed_sb_update_sb_idx)
1638 * prior to this check (*_has_*_work) so that
1639 * we won't write the "newer" value of the status block
1640 * to HW (if there was a DMA right after
1641 * qede_has_rx_work and if there is no rmb, the memory
1642 * reading (qed_sb_update_sb_idx) may be postponed
1643 * to right before *_ack_sb). In this case there
1644 * will never be another interrupt until there is
1645 * another update of the status block, while there
1646 * is still unhandled work.
1647 */
1648 rmb();
Yuval Mintz29502192015-10-26 11:02:29 +02001649
1650 /* Fall out from the NAPI loop if needed */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001651 if (!((likely(fp->type & QEDE_FASTPATH_RX) &&
1652 qede_has_rx_work(fp->rxq)) ||
1653 (likely(fp->type & QEDE_FASTPATH_TX) &&
Mintz, Yuval80439a12016-11-29 16:47:02 +02001654 qede_txq_has_work(fp->txq)))) {
Manish Choprac7741692016-06-30 02:35:19 -04001655 napi_complete(napi);
Yuval Mintz29502192015-10-26 11:02:29 +02001656
Manish Choprac7741692016-06-30 02:35:19 -04001657 /* Update and reenable interrupts */
1658 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1659 1 /*update*/);
1660 } else {
1661 rx_work_done = budget;
Yuval Mintz29502192015-10-26 11:02:29 +02001662 }
1663 }
1664
Manish Choprac7741692016-06-30 02:35:19 -04001665 return rx_work_done;
Yuval Mintz29502192015-10-26 11:02:29 +02001666}
1667
1668static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1669{
1670 struct qede_fastpath *fp = fp_cookie;
1671
1672 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1673
1674 napi_schedule_irqoff(&fp->napi);
1675 return IRQ_HANDLED;
1676}
1677
1678/* -------------------------------------------------------------------------
1679 * END OF FAST-PATH
1680 * -------------------------------------------------------------------------
1681 */
1682
1683static int qede_open(struct net_device *ndev);
1684static int qede_close(struct net_device *ndev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001685static int qede_set_mac_addr(struct net_device *ndev, void *p);
1686static void qede_set_rx_mode(struct net_device *ndev);
1687static void qede_config_rx_mode(struct net_device *ndev);
1688
1689static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1690 enum qed_filter_xcast_params_type opcode,
1691 unsigned char mac[ETH_ALEN])
1692{
1693 struct qed_filter_params filter_cmd;
1694
1695 memset(&filter_cmd, 0, sizeof(filter_cmd));
1696 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1697 filter_cmd.filter.ucast.type = opcode;
1698 filter_cmd.filter.ucast.mac_valid = 1;
1699 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1700
1701 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1702}
1703
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001704static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1705 enum qed_filter_xcast_params_type opcode,
1706 u16 vid)
1707{
1708 struct qed_filter_params filter_cmd;
1709
1710 memset(&filter_cmd, 0, sizeof(filter_cmd));
1711 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1712 filter_cmd.filter.ucast.type = opcode;
1713 filter_cmd.filter.ucast.vlan_valid = 1;
1714 filter_cmd.filter.ucast.vlan = vid;
1715
1716 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1717}
1718
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001719void qede_fill_by_demand_stats(struct qede_dev *edev)
1720{
1721 struct qed_eth_stats stats;
1722
1723 edev->ops->get_vport_stats(edev->cdev, &stats);
1724 edev->stats.no_buff_discards = stats.no_buff_discards;
Sudarsana Reddy Kalluru1a5a3662016-08-16 10:51:01 -04001725 edev->stats.packet_too_big_discard = stats.packet_too_big_discard;
1726 edev->stats.ttl0_discard = stats.ttl0_discard;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001727 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1728 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1729 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1730 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1731 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1732 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1733 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1734 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1735
1736 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1737 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1738 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1739 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1740 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1741 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1742 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1743 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1744 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1745 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1746 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1747 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1748
1749 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
Yuval Mintzd4967cf2016-04-22 08:41:01 +03001750 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1751 edev->stats.rx_128_to_255_byte_packets =
1752 stats.rx_128_to_255_byte_packets;
1753 edev->stats.rx_256_to_511_byte_packets =
1754 stats.rx_256_to_511_byte_packets;
1755 edev->stats.rx_512_to_1023_byte_packets =
1756 stats.rx_512_to_1023_byte_packets;
1757 edev->stats.rx_1024_to_1518_byte_packets =
1758 stats.rx_1024_to_1518_byte_packets;
1759 edev->stats.rx_1519_to_1522_byte_packets =
1760 stats.rx_1519_to_1522_byte_packets;
1761 edev->stats.rx_1519_to_2047_byte_packets =
1762 stats.rx_1519_to_2047_byte_packets;
1763 edev->stats.rx_2048_to_4095_byte_packets =
1764 stats.rx_2048_to_4095_byte_packets;
1765 edev->stats.rx_4096_to_9216_byte_packets =
1766 stats.rx_4096_to_9216_byte_packets;
1767 edev->stats.rx_9217_to_16383_byte_packets =
1768 stats.rx_9217_to_16383_byte_packets;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001769 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1770 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1771 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1772 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1773 edev->stats.rx_align_errors = stats.rx_align_errors;
1774 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1775 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1776 edev->stats.rx_jabbers = stats.rx_jabbers;
1777 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1778 edev->stats.rx_fragments = stats.rx_fragments;
1779 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1780 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1781 edev->stats.tx_128_to_255_byte_packets =
1782 stats.tx_128_to_255_byte_packets;
1783 edev->stats.tx_256_to_511_byte_packets =
1784 stats.tx_256_to_511_byte_packets;
1785 edev->stats.tx_512_to_1023_byte_packets =
1786 stats.tx_512_to_1023_byte_packets;
1787 edev->stats.tx_1024_to_1518_byte_packets =
1788 stats.tx_1024_to_1518_byte_packets;
1789 edev->stats.tx_1519_to_2047_byte_packets =
1790 stats.tx_1519_to_2047_byte_packets;
1791 edev->stats.tx_2048_to_4095_byte_packets =
1792 stats.tx_2048_to_4095_byte_packets;
1793 edev->stats.tx_4096_to_9216_byte_packets =
1794 stats.tx_4096_to_9216_byte_packets;
1795 edev->stats.tx_9217_to_16383_byte_packets =
1796 stats.tx_9217_to_16383_byte_packets;
1797 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1798 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1799 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1800 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1801 edev->stats.brb_truncates = stats.brb_truncates;
1802 edev->stats.brb_discards = stats.brb_discards;
1803 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1804}
1805
Yuval Mintz1a635e42016-08-15 10:42:43 +03001806static
1807struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev,
1808 struct rtnl_link_stats64 *stats)
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001809{
1810 struct qede_dev *edev = netdev_priv(dev);
1811
1812 qede_fill_by_demand_stats(edev);
1813
1814 stats->rx_packets = edev->stats.rx_ucast_pkts +
1815 edev->stats.rx_mcast_pkts +
1816 edev->stats.rx_bcast_pkts;
1817 stats->tx_packets = edev->stats.tx_ucast_pkts +
1818 edev->stats.tx_mcast_pkts +
1819 edev->stats.tx_bcast_pkts;
1820
1821 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1822 edev->stats.rx_mcast_bytes +
1823 edev->stats.rx_bcast_bytes;
1824
1825 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1826 edev->stats.tx_mcast_bytes +
1827 edev->stats.tx_bcast_bytes;
1828
1829 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1830 stats->multicast = edev->stats.rx_mcast_pkts +
1831 edev->stats.rx_bcast_pkts;
1832
1833 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1834
1835 stats->collisions = edev->stats.tx_total_collisions;
1836 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1837 stats->rx_frame_errors = edev->stats.rx_align_errors;
1838
1839 return stats;
1840}
1841
Yuval Mintz733def62016-05-11 16:36:22 +03001842#ifdef CONFIG_QED_SRIOV
Yuval Mintz73390ac2016-05-11 16:36:24 +03001843static int qede_get_vf_config(struct net_device *dev, int vfidx,
1844 struct ifla_vf_info *ivi)
1845{
1846 struct qede_dev *edev = netdev_priv(dev);
1847
1848 if (!edev->ops)
1849 return -EINVAL;
1850
1851 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1852}
1853
Yuval Mintz733def62016-05-11 16:36:22 +03001854static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1855 int min_tx_rate, int max_tx_rate)
1856{
1857 struct qede_dev *edev = netdev_priv(dev);
1858
Yuval Mintzbe7b6d62016-05-26 11:01:17 +03001859 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
Yuval Mintz733def62016-05-11 16:36:22 +03001860 max_tx_rate);
1861}
1862
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001863static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1864{
1865 struct qede_dev *edev = netdev_priv(dev);
1866
1867 if (!edev->ops)
1868 return -EINVAL;
1869
1870 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1871}
1872
Yuval Mintz733def62016-05-11 16:36:22 +03001873static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1874 int link_state)
1875{
1876 struct qede_dev *edev = netdev_priv(dev);
1877
1878 if (!edev->ops)
1879 return -EINVAL;
1880
1881 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1882}
1883#endif
1884
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001885static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1886{
1887 struct qed_update_vport_params params;
1888 int rc;
1889
1890 /* Proceed only if action actually needs to be performed */
1891 if (edev->accept_any_vlan == action)
1892 return;
1893
1894 memset(&params, 0, sizeof(params));
1895
1896 params.vport_id = 0;
1897 params.accept_any_vlan = action;
1898 params.update_accept_any_vlan_flg = 1;
1899
1900 rc = edev->ops->vport_update(edev->cdev, &params);
1901 if (rc) {
1902 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1903 action ? "enable" : "disable");
1904 } else {
1905 DP_INFO(edev, "%s accept-any-vlan\n",
1906 action ? "enabled" : "disabled");
1907 edev->accept_any_vlan = action;
1908 }
1909}
1910
1911static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1912{
1913 struct qede_dev *edev = netdev_priv(dev);
1914 struct qede_vlan *vlan, *tmp;
1915 int rc;
1916
1917 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1918
1919 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1920 if (!vlan) {
1921 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1922 return -ENOMEM;
1923 }
1924 INIT_LIST_HEAD(&vlan->list);
1925 vlan->vid = vid;
1926 vlan->configured = false;
1927
1928 /* Verify vlan isn't already configured */
1929 list_for_each_entry(tmp, &edev->vlan_list, list) {
1930 if (tmp->vid == vlan->vid) {
1931 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1932 "vlan already configured\n");
1933 kfree(vlan);
1934 return -EEXIST;
1935 }
1936 }
1937
1938 /* If interface is down, cache this VLAN ID and return */
1939 if (edev->state != QEDE_STATE_OPEN) {
1940 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1941 "Interface is down, VLAN %d will be configured when interface is up\n",
1942 vid);
1943 if (vid != 0)
1944 edev->non_configured_vlans++;
1945 list_add(&vlan->list, &edev->vlan_list);
1946
1947 return 0;
1948 }
1949
1950 /* Check for the filter limit.
1951 * Note - vlan0 has a reserved filter and can be added without
1952 * worrying about quota
1953 */
1954 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1955 (vlan->vid == 0)) {
1956 rc = qede_set_ucast_rx_vlan(edev,
1957 QED_FILTER_XCAST_TYPE_ADD,
1958 vlan->vid);
1959 if (rc) {
1960 DP_ERR(edev, "Failed to configure VLAN %d\n",
1961 vlan->vid);
1962 kfree(vlan);
1963 return -EINVAL;
1964 }
1965 vlan->configured = true;
1966
1967 /* vlan0 filter isn't consuming out of our quota */
1968 if (vlan->vid != 0)
1969 edev->configured_vlans++;
1970 } else {
1971 /* Out of quota; Activate accept-any-VLAN mode */
1972 if (!edev->non_configured_vlans)
1973 qede_config_accept_any_vlan(edev, true);
1974
1975 edev->non_configured_vlans++;
1976 }
1977
1978 list_add(&vlan->list, &edev->vlan_list);
1979
1980 return 0;
1981}
1982
1983static void qede_del_vlan_from_list(struct qede_dev *edev,
1984 struct qede_vlan *vlan)
1985{
1986 /* vlan0 filter isn't consuming out of our quota */
1987 if (vlan->vid != 0) {
1988 if (vlan->configured)
1989 edev->configured_vlans--;
1990 else
1991 edev->non_configured_vlans--;
1992 }
1993
1994 list_del(&vlan->list);
1995 kfree(vlan);
1996}
1997
1998static int qede_configure_vlan_filters(struct qede_dev *edev)
1999{
2000 int rc = 0, real_rc = 0, accept_any_vlan = 0;
2001 struct qed_dev_eth_info *dev_info;
2002 struct qede_vlan *vlan = NULL;
2003
2004 if (list_empty(&edev->vlan_list))
2005 return 0;
2006
2007 dev_info = &edev->dev_info;
2008
2009 /* Configure non-configured vlans */
2010 list_for_each_entry(vlan, &edev->vlan_list, list) {
2011 if (vlan->configured)
2012 continue;
2013
2014 /* We have used all our credits, now enable accept_any_vlan */
2015 if ((vlan->vid != 0) &&
2016 (edev->configured_vlans == dev_info->num_vlan_filters)) {
2017 accept_any_vlan = 1;
2018 continue;
2019 }
2020
2021 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
2022
2023 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
2024 vlan->vid);
2025 if (rc) {
2026 DP_ERR(edev, "Failed to configure VLAN %u\n",
2027 vlan->vid);
2028 real_rc = rc;
2029 continue;
2030 }
2031
2032 vlan->configured = true;
2033 /* vlan0 filter doesn't consume our VLAN filter's quota */
2034 if (vlan->vid != 0) {
2035 edev->non_configured_vlans--;
2036 edev->configured_vlans++;
2037 }
2038 }
2039
2040 /* enable accept_any_vlan mode if we have more VLANs than credits,
2041 * or remove accept_any_vlan mode if we've actually removed
2042 * a non-configured vlan, and all remaining vlans are truly configured.
2043 */
2044
2045 if (accept_any_vlan)
2046 qede_config_accept_any_vlan(edev, true);
2047 else if (!edev->non_configured_vlans)
2048 qede_config_accept_any_vlan(edev, false);
2049
2050 return real_rc;
2051}
2052
2053static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2054{
2055 struct qede_dev *edev = netdev_priv(dev);
2056 struct qede_vlan *vlan = NULL;
2057 int rc;
2058
2059 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2060
2061 /* Find whether entry exists */
2062 list_for_each_entry(vlan, &edev->vlan_list, list)
2063 if (vlan->vid == vid)
2064 break;
2065
2066 if (!vlan || (vlan->vid != vid)) {
2067 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2068 "Vlan isn't configured\n");
2069 return 0;
2070 }
2071
2072 if (edev->state != QEDE_STATE_OPEN) {
2073 /* As interface is already down, we don't have a VPORT
2074 * instance to remove vlan filter. So just update vlan list
2075 */
2076 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2077 "Interface is down, removing VLAN from list only\n");
2078 qede_del_vlan_from_list(edev, vlan);
2079 return 0;
2080 }
2081
2082 /* Remove vlan */
Yuval Mintzc524e2f52016-07-27 14:45:19 +03002083 if (vlan->configured) {
2084 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
2085 vid);
2086 if (rc) {
2087 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2088 return -EINVAL;
2089 }
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002090 }
2091
2092 qede_del_vlan_from_list(edev, vlan);
2093
2094 /* We have removed a VLAN - try to see if we can
2095 * configure non-configured VLAN from the list.
2096 */
2097 rc = qede_configure_vlan_filters(edev);
2098
2099 return rc;
2100}
2101
2102static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2103{
2104 struct qede_vlan *vlan = NULL;
2105
2106 if (list_empty(&edev->vlan_list))
2107 return;
2108
2109 list_for_each_entry(vlan, &edev->vlan_list, list) {
2110 if (!vlan->configured)
2111 continue;
2112
2113 vlan->configured = false;
2114
2115 /* vlan0 filter isn't consuming out of our quota */
2116 if (vlan->vid != 0) {
2117 edev->non_configured_vlans++;
2118 edev->configured_vlans--;
2119 }
2120
2121 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002122 "marked vlan %d as non-configured\n", vlan->vid);
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002123 }
2124
2125 edev->accept_any_vlan = false;
2126}
2127
Baoyou Xie94384512016-09-08 16:43:23 +08002128static int qede_set_features(struct net_device *dev, netdev_features_t features)
Yuval Mintzce2b8852016-05-26 11:01:18 +03002129{
2130 struct qede_dev *edev = netdev_priv(dev);
2131 netdev_features_t changes = features ^ dev->features;
2132 bool need_reload = false;
2133
2134 /* No action needed if hardware GRO is disabled during driver load */
2135 if (changes & NETIF_F_GRO) {
2136 if (dev->features & NETIF_F_GRO)
2137 need_reload = !edev->gro_disable;
2138 else
2139 need_reload = edev->gro_disable;
2140 }
2141
2142 if (need_reload && netif_running(edev->ndev)) {
2143 dev->features = features;
2144 qede_reload(edev, NULL, NULL);
2145 return 1;
2146 }
2147
2148 return 0;
2149}
2150
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002151static void qede_udp_tunnel_add(struct net_device *dev,
2152 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002153{
2154 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002155 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002156
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002157 switch (ti->type) {
2158 case UDP_TUNNEL_TYPE_VXLAN:
2159 if (edev->vxlan_dst_port)
2160 return;
2161
2162 edev->vxlan_dst_port = t_port;
2163
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002164 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002165 t_port);
2166
2167 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2168 break;
2169 case UDP_TUNNEL_TYPE_GENEVE:
2170 if (edev->geneve_dst_port)
2171 return;
2172
2173 edev->geneve_dst_port = t_port;
2174
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002175 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002176 t_port);
2177 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2178 break;
2179 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002180 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002181 }
Manish Choprab18e1702016-04-14 01:38:30 -04002182
Manish Choprab18e1702016-04-14 01:38:30 -04002183 schedule_delayed_work(&edev->sp_task, 0);
2184}
2185
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002186static void qede_udp_tunnel_del(struct net_device *dev,
2187 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002188{
2189 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002190 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002191
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002192 switch (ti->type) {
2193 case UDP_TUNNEL_TYPE_VXLAN:
2194 if (t_port != edev->vxlan_dst_port)
2195 return;
2196
2197 edev->vxlan_dst_port = 0;
2198
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002199 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002200 t_port);
2201
2202 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2203 break;
2204 case UDP_TUNNEL_TYPE_GENEVE:
2205 if (t_port != edev->geneve_dst_port)
2206 return;
2207
2208 edev->geneve_dst_port = 0;
2209
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002210 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002211 t_port);
2212 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2213 break;
2214 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002215 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002216 }
Manish Choprab18e1702016-04-14 01:38:30 -04002217
Manish Choprab18e1702016-04-14 01:38:30 -04002218 schedule_delayed_work(&edev->sp_task, 0);
2219}
Manish Chopra9a109dd2016-04-14 01:38:31 -04002220
Manish Chopra25695852016-10-14 05:19:19 -04002221/* 8B udp header + 8B base tunnel header + 32B option length */
2222#define QEDE_MAX_TUN_HDR_LEN 48
2223
2224static netdev_features_t qede_features_check(struct sk_buff *skb,
2225 struct net_device *dev,
2226 netdev_features_t features)
2227{
2228 if (skb->encapsulation) {
2229 u8 l4_proto = 0;
2230
2231 switch (vlan_get_protocol(skb)) {
2232 case htons(ETH_P_IP):
2233 l4_proto = ip_hdr(skb)->protocol;
2234 break;
2235 case htons(ETH_P_IPV6):
2236 l4_proto = ipv6_hdr(skb)->nexthdr;
2237 break;
2238 default:
2239 return features;
2240 }
2241
2242 /* Disable offloads for geneve tunnels, as HW can't parse
2243 * the geneve header which has option length greater than 32B.
2244 */
2245 if ((l4_proto == IPPROTO_UDP) &&
2246 ((skb_inner_mac_header(skb) -
2247 skb_transport_header(skb)) > QEDE_MAX_TUN_HDR_LEN))
2248 return features & ~(NETIF_F_CSUM_MASK |
2249 NETIF_F_GSO_MASK);
2250 }
2251
2252 return features;
2253}
2254
Yuval Mintz29502192015-10-26 11:02:29 +02002255static const struct net_device_ops qede_netdev_ops = {
2256 .ndo_open = qede_open,
2257 .ndo_stop = qede_close,
2258 .ndo_start_xmit = qede_start_xmit,
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002259 .ndo_set_rx_mode = qede_set_rx_mode,
2260 .ndo_set_mac_address = qede_set_mac_addr,
Yuval Mintz29502192015-10-26 11:02:29 +02002261 .ndo_validate_addr = eth_validate_addr,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002262 .ndo_change_mtu = qede_change_mtu,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002263#ifdef CONFIG_QED_SRIOV
Yuval Mintzeff16962016-05-11 16:36:21 +03002264 .ndo_set_vf_mac = qede_set_vf_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002265 .ndo_set_vf_vlan = qede_set_vf_vlan,
2266#endif
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002267 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2268 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
Yuval Mintzce2b8852016-05-26 11:01:18 +03002269 .ndo_set_features = qede_set_features,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002270 .ndo_get_stats64 = qede_get_stats64,
Yuval Mintz733def62016-05-11 16:36:22 +03002271#ifdef CONFIG_QED_SRIOV
2272 .ndo_set_vf_link_state = qede_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03002273 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
Yuval Mintz73390ac2016-05-11 16:36:24 +03002274 .ndo_get_vf_config = qede_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03002275 .ndo_set_vf_rate = qede_set_vf_rate,
2276#endif
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002277 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2278 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
Manish Chopra25695852016-10-14 05:19:19 -04002279 .ndo_features_check = qede_features_check,
Yuval Mintz29502192015-10-26 11:02:29 +02002280};
2281
2282/* -------------------------------------------------------------------------
Yuval Mintze712d522015-10-26 11:02:27 +02002283 * START OF PROBE / REMOVE
2284 * -------------------------------------------------------------------------
2285 */
2286
2287static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2288 struct pci_dev *pdev,
2289 struct qed_dev_eth_info *info,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002290 u32 dp_module, u8 dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002291{
2292 struct net_device *ndev;
2293 struct qede_dev *edev;
2294
2295 ndev = alloc_etherdev_mqs(sizeof(*edev),
Yuval Mintz1a635e42016-08-15 10:42:43 +03002296 info->num_queues, info->num_queues);
Yuval Mintze712d522015-10-26 11:02:27 +02002297 if (!ndev) {
2298 pr_err("etherdev allocation failed\n");
2299 return NULL;
2300 }
2301
2302 edev = netdev_priv(ndev);
2303 edev->ndev = ndev;
2304 edev->cdev = cdev;
2305 edev->pdev = pdev;
2306 edev->dp_module = dp_module;
2307 edev->dp_level = dp_level;
2308 edev->ops = qed_ops;
Yuval Mintz29502192015-10-26 11:02:29 +02002309 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2310 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
Yuval Mintze712d522015-10-26 11:02:27 +02002311
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002312 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
2313 info->num_queues, info->num_queues);
2314
Yuval Mintze712d522015-10-26 11:02:27 +02002315 SET_NETDEV_DEV(ndev, &pdev->dev);
2316
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002317 memset(&edev->stats, 0, sizeof(edev->stats));
Yuval Mintze712d522015-10-26 11:02:27 +02002318 memcpy(&edev->dev_info, info, sizeof(*info));
2319
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002320 INIT_LIST_HEAD(&edev->vlan_list);
2321
Yuval Mintze712d522015-10-26 11:02:27 +02002322 return edev;
2323}
2324
2325static void qede_init_ndev(struct qede_dev *edev)
2326{
2327 struct net_device *ndev = edev->ndev;
2328 struct pci_dev *pdev = edev->pdev;
2329 u32 hw_features;
2330
2331 pci_set_drvdata(pdev, ndev);
2332
2333 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2334 ndev->base_addr = ndev->mem_start;
2335 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2336 ndev->irq = edev->dev_info.common.pci_irq;
2337
2338 ndev->watchdog_timeo = TX_TIMEOUT;
2339
Yuval Mintz29502192015-10-26 11:02:29 +02002340 ndev->netdev_ops = &qede_netdev_ops;
2341
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002342 qede_set_ethtool_ops(ndev);
2343
Mintz, Yuval0183eb12016-10-31 22:26:53 +02002344 ndev->priv_flags |= IFF_UNICAST_FLT;
Yuval Mintz7b7e70f2016-10-14 05:19:20 -04002345
Yuval Mintze712d522015-10-26 11:02:27 +02002346 /* user-changeble features */
2347 hw_features = NETIF_F_GRO | NETIF_F_SG |
2348 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2349 NETIF_F_TSO | NETIF_F_TSO6;
2350
Manish Chopra14db81d2016-04-14 01:38:33 -04002351 /* Encap features*/
2352 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
Manish Chopraa1502412016-10-14 05:19:18 -04002353 NETIF_F_TSO_ECN | NETIF_F_GSO_UDP_TUNNEL_CSUM |
2354 NETIF_F_GSO_GRE_CSUM;
Manish Chopra14db81d2016-04-14 01:38:33 -04002355 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2356 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2357 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
Manish Chopraa1502412016-10-14 05:19:18 -04002358 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM |
2359 NETIF_F_GSO_UDP_TUNNEL_CSUM |
2360 NETIF_F_GSO_GRE_CSUM;
Manish Chopra14db81d2016-04-14 01:38:33 -04002361
Yuval Mintze712d522015-10-26 11:02:27 +02002362 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2363 NETIF_F_HIGHDMA;
2364 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2365 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002366 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
Yuval Mintze712d522015-10-26 11:02:27 +02002367
2368 ndev->hw_features = hw_features;
2369
Jarod Wilsoncaff2a82016-10-17 15:54:08 -04002370 /* MTU range: 46 - 9600 */
2371 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
2372 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
2373
Yuval Mintze712d522015-10-26 11:02:27 +02002374 /* Set network device HW mac */
2375 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02002376
2377 ndev->mtu = edev->dev_info.common.mtu;
Yuval Mintze712d522015-10-26 11:02:27 +02002378}
2379
2380/* This function converts from 32b param to two params of level and module
2381 * Input 32b decoding:
2382 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2383 * 'happy' flow, e.g. memory allocation failed.
2384 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2385 * and provide important parameters.
2386 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2387 * module. VERBOSE prints are for tracking the specific flow in low level.
2388 *
2389 * Notice that the level should be that of the lowest required logs.
2390 */
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002391void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002392{
2393 *p_dp_level = QED_LEVEL_NOTICE;
2394 *p_dp_module = 0;
2395
2396 if (debug & QED_LOG_VERBOSE_MASK) {
2397 *p_dp_level = QED_LEVEL_VERBOSE;
2398 *p_dp_module = (debug & 0x3FFFFFFF);
2399 } else if (debug & QED_LOG_INFO_MASK) {
2400 *p_dp_level = QED_LEVEL_INFO;
2401 } else if (debug & QED_LOG_NOTICE_MASK) {
2402 *p_dp_level = QED_LEVEL_NOTICE;
2403 }
2404}
2405
Yuval Mintz29502192015-10-26 11:02:29 +02002406static void qede_free_fp_array(struct qede_dev *edev)
2407{
2408 if (edev->fp_array) {
2409 struct qede_fastpath *fp;
2410 int i;
2411
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002412 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02002413 fp = &edev->fp_array[i];
2414
2415 kfree(fp->sb_info);
2416 kfree(fp->rxq);
Mintz, Yuval80439a12016-11-29 16:47:02 +02002417 kfree(fp->txq);
Yuval Mintz29502192015-10-26 11:02:29 +02002418 }
2419 kfree(edev->fp_array);
2420 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002421
2422 edev->num_queues = 0;
2423 edev->fp_num_tx = 0;
2424 edev->fp_num_rx = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002425}
2426
2427static int qede_alloc_fp_array(struct qede_dev *edev)
2428{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002429 u8 fp_combined, fp_rx = edev->fp_num_rx;
Yuval Mintz29502192015-10-26 11:02:29 +02002430 struct qede_fastpath *fp;
2431 int i;
2432
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002433 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
Yuval Mintz29502192015-10-26 11:02:29 +02002434 sizeof(*edev->fp_array), GFP_KERNEL);
2435 if (!edev->fp_array) {
2436 DP_NOTICE(edev, "fp array allocation failed\n");
2437 goto err;
2438 }
2439
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002440 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
2441
2442 /* Allocate the FP elements for Rx queues followed by combined and then
2443 * the Tx. This ordering should be maintained so that the respective
2444 * queues (Rx or Tx) will be together in the fastpath array and the
2445 * associated ids will be sequential.
2446 */
2447 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02002448 fp = &edev->fp_array[i];
2449
Mintz, Yuval80439a12016-11-29 16:47:02 +02002450 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
Yuval Mintz29502192015-10-26 11:02:29 +02002451 if (!fp->sb_info) {
2452 DP_NOTICE(edev, "sb info struct allocation failed\n");
2453 goto err;
2454 }
2455
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002456 if (fp_rx) {
2457 fp->type = QEDE_FASTPATH_RX;
2458 fp_rx--;
2459 } else if (fp_combined) {
2460 fp->type = QEDE_FASTPATH_COMBINED;
2461 fp_combined--;
2462 } else {
2463 fp->type = QEDE_FASTPATH_TX;
Yuval Mintz29502192015-10-26 11:02:29 +02002464 }
2465
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002466 if (fp->type & QEDE_FASTPATH_TX) {
Mintz, Yuval80439a12016-11-29 16:47:02 +02002467 fp->txq = kzalloc(sizeof(*fp->txq), GFP_KERNEL);
2468 if (!fp->txq)
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002469 goto err;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002470 }
2471
2472 if (fp->type & QEDE_FASTPATH_RX) {
Mintz, Yuval80439a12016-11-29 16:47:02 +02002473 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
2474 if (!fp->rxq)
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002475 goto err;
Yuval Mintz29502192015-10-26 11:02:29 +02002476 }
2477 }
2478
2479 return 0;
2480err:
2481 qede_free_fp_array(edev);
2482 return -ENOMEM;
2483}
2484
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002485static void qede_sp_task(struct work_struct *work)
2486{
2487 struct qede_dev *edev = container_of(work, struct qede_dev,
2488 sp_task.work);
Manish Choprab18e1702016-04-14 01:38:30 -04002489 struct qed_dev *cdev = edev->cdev;
2490
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002491 mutex_lock(&edev->qede_lock);
2492
2493 if (edev->state == QEDE_STATE_OPEN) {
2494 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2495 qede_config_rx_mode(edev->ndev);
2496 }
2497
Manish Choprab18e1702016-04-14 01:38:30 -04002498 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2499 struct qed_tunn_params tunn_params;
2500
2501 memset(&tunn_params, 0, sizeof(tunn_params));
2502 tunn_params.update_vxlan_port = 1;
2503 tunn_params.vxlan_port = edev->vxlan_dst_port;
2504 qed_ops->tunn_config(cdev, &tunn_params);
2505 }
2506
Manish Chopra9a109dd2016-04-14 01:38:31 -04002507 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2508 struct qed_tunn_params tunn_params;
2509
2510 memset(&tunn_params, 0, sizeof(tunn_params));
2511 tunn_params.update_geneve_port = 1;
2512 tunn_params.geneve_port = edev->geneve_dst_port;
2513 qed_ops->tunn_config(cdev, &tunn_params);
2514 }
2515
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002516 mutex_unlock(&edev->qede_lock);
2517}
2518
Yuval Mintze712d522015-10-26 11:02:27 +02002519static void qede_update_pf_params(struct qed_dev *cdev)
2520{
2521 struct qed_pf_params pf_params;
2522
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002523 /* 64 rx + 64 tx */
Yuval Mintze712d522015-10-26 11:02:27 +02002524 memset(&pf_params, 0, sizeof(struct qed_pf_params));
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002525 pf_params.eth_pf_params.num_cons = 128;
Yuval Mintze712d522015-10-26 11:02:27 +02002526 qed_ops->common->update_pf_params(cdev, &pf_params);
2527}
2528
2529enum qede_probe_mode {
2530 QEDE_PROBE_NORMAL,
2531};
2532
2533static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002534 bool is_vf, enum qede_probe_mode mode)
Yuval Mintze712d522015-10-26 11:02:27 +02002535{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002536 struct qed_probe_params probe_params;
Yuval Mintz1a635e42016-08-15 10:42:43 +03002537 struct qed_slowpath_params sp_params;
Yuval Mintze712d522015-10-26 11:02:27 +02002538 struct qed_dev_eth_info dev_info;
2539 struct qede_dev *edev;
2540 struct qed_dev *cdev;
2541 int rc;
2542
2543 if (unlikely(dp_level & QED_LEVEL_INFO))
2544 pr_notice("Starting qede probe\n");
2545
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002546 memset(&probe_params, 0, sizeof(probe_params));
2547 probe_params.protocol = QED_PROTOCOL_ETH;
2548 probe_params.dp_module = dp_module;
2549 probe_params.dp_level = dp_level;
2550 probe_params.is_vf = is_vf;
2551 cdev = qed_ops->common->probe(pdev, &probe_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002552 if (!cdev) {
2553 rc = -ENODEV;
2554 goto err0;
2555 }
2556
2557 qede_update_pf_params(cdev);
2558
2559 /* Start the Slowpath-process */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002560 memset(&sp_params, 0, sizeof(sp_params));
2561 sp_params.int_mode = QED_INT_MODE_MSIX;
2562 sp_params.drv_major = QEDE_MAJOR_VERSION;
2563 sp_params.drv_minor = QEDE_MINOR_VERSION;
2564 sp_params.drv_rev = QEDE_REVISION_VERSION;
2565 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
2566 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2567 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002568 if (rc) {
2569 pr_notice("Cannot start slowpath\n");
2570 goto err1;
2571 }
2572
2573 /* Learn information crucial for qede to progress */
2574 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2575 if (rc)
2576 goto err2;
2577
2578 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2579 dp_level);
2580 if (!edev) {
2581 rc = -ENOMEM;
2582 goto err2;
2583 }
2584
Yuval Mintzfefb0202016-05-11 16:36:19 +03002585 if (is_vf)
2586 edev->flags |= QEDE_FLAG_IS_VF;
2587
Yuval Mintze712d522015-10-26 11:02:27 +02002588 qede_init_ndev(edev);
2589
Ram Amranicee9fbd2016-10-01 21:59:56 +03002590 rc = qede_roce_dev_add(edev);
2591 if (rc)
2592 goto err3;
2593
Yuval Mintz29502192015-10-26 11:02:29 +02002594 rc = register_netdev(edev->ndev);
2595 if (rc) {
2596 DP_NOTICE(edev, "Cannot register net-device\n");
Ram Amranicee9fbd2016-10-01 21:59:56 +03002597 goto err4;
Yuval Mintz29502192015-10-26 11:02:29 +02002598 }
2599
Yuval Mintze712d522015-10-26 11:02:27 +02002600 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2601
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002602 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2603
Sudarsana Reddy Kalluru489e45a2016-06-08 06:22:12 -04002604#ifdef CONFIG_DCB
Sudarsana Reddy Kalluru5fe118c2016-08-29 08:29:52 -04002605 if (!IS_VF(edev))
2606 qede_set_dcbnl_ops(edev->ndev);
Sudarsana Reddy Kalluru489e45a2016-06-08 06:22:12 -04002607#endif
2608
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002609 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2610 mutex_init(&edev->qede_lock);
Manish Chopra3d789992016-06-30 02:35:21 -04002611 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002612
Yuval Mintze712d522015-10-26 11:02:27 +02002613 DP_INFO(edev, "Ending successfully qede probe\n");
2614
2615 return 0;
2616
Ram Amranicee9fbd2016-10-01 21:59:56 +03002617err4:
2618 qede_roce_dev_remove(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02002619err3:
2620 free_netdev(edev->ndev);
Yuval Mintze712d522015-10-26 11:02:27 +02002621err2:
2622 qed_ops->common->slowpath_stop(cdev);
2623err1:
2624 qed_ops->common->remove(cdev);
2625err0:
2626 return rc;
2627}
2628
2629static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2630{
Yuval Mintzfefb0202016-05-11 16:36:19 +03002631 bool is_vf = false;
Yuval Mintze712d522015-10-26 11:02:27 +02002632 u32 dp_module = 0;
2633 u8 dp_level = 0;
2634
Yuval Mintzfefb0202016-05-11 16:36:19 +03002635 switch ((enum qede_pci_private)id->driver_data) {
2636 case QEDE_PRIVATE_VF:
2637 if (debug & QED_LOG_VERBOSE_MASK)
2638 dev_err(&pdev->dev, "Probing a VF\n");
2639 is_vf = true;
2640 break;
2641 default:
2642 if (debug & QED_LOG_VERBOSE_MASK)
2643 dev_err(&pdev->dev, "Probing a PF\n");
2644 }
2645
Yuval Mintze712d522015-10-26 11:02:27 +02002646 qede_config_debug(debug, &dp_module, &dp_level);
2647
Yuval Mintzfefb0202016-05-11 16:36:19 +03002648 return __qede_probe(pdev, dp_module, dp_level, is_vf,
Yuval Mintze712d522015-10-26 11:02:27 +02002649 QEDE_PROBE_NORMAL);
2650}
2651
2652enum qede_remove_mode {
2653 QEDE_REMOVE_NORMAL,
2654};
2655
2656static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2657{
2658 struct net_device *ndev = pci_get_drvdata(pdev);
2659 struct qede_dev *edev = netdev_priv(ndev);
2660 struct qed_dev *cdev = edev->cdev;
2661
2662 DP_INFO(edev, "Starting qede_remove\n");
2663
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002664 cancel_delayed_work_sync(&edev->sp_task);
Ram Amranicee9fbd2016-10-01 21:59:56 +03002665
Yuval Mintz29502192015-10-26 11:02:29 +02002666 unregister_netdev(ndev);
2667
Ram Amranicee9fbd2016-10-01 21:59:56 +03002668 qede_roce_dev_remove(edev);
2669
Yuval Mintze712d522015-10-26 11:02:27 +02002670 edev->ops->common->set_power_state(cdev, PCI_D0);
2671
2672 pci_set_drvdata(pdev, NULL);
2673
2674 free_netdev(ndev);
2675
2676 /* Use global ops since we've freed edev */
2677 qed_ops->common->slowpath_stop(cdev);
Mintz, Yuval14d39642016-10-31 07:14:23 +02002678 if (system_state == SYSTEM_POWER_OFF)
2679 return;
Yuval Mintze712d522015-10-26 11:02:27 +02002680 qed_ops->common->remove(cdev);
2681
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002682 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
Yuval Mintze712d522015-10-26 11:02:27 +02002683}
2684
2685static void qede_remove(struct pci_dev *pdev)
2686{
2687 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2688}
Yuval Mintz29502192015-10-26 11:02:29 +02002689
Mintz, Yuval14d39642016-10-31 07:14:23 +02002690static void qede_shutdown(struct pci_dev *pdev)
2691{
2692 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2693}
2694
Yuval Mintz29502192015-10-26 11:02:29 +02002695/* -------------------------------------------------------------------------
2696 * START OF LOAD / UNLOAD
2697 * -------------------------------------------------------------------------
2698 */
2699
2700static int qede_set_num_queues(struct qede_dev *edev)
2701{
2702 int rc;
2703 u16 rss_num;
2704
2705 /* Setup queues according to possible resources*/
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002706 if (edev->req_queues)
2707 rss_num = edev->req_queues;
Sudarsana Kalluru8edf0492015-11-30 12:25:01 +02002708 else
2709 rss_num = netif_get_num_default_rss_queues() *
2710 edev->dev_info.common.num_hwfns;
Yuval Mintz29502192015-10-26 11:02:29 +02002711
2712 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2713
2714 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2715 if (rc > 0) {
2716 /* Managed to request interrupts for our queues */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002717 edev->num_queues = rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002718 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002719 QEDE_QUEUE_CNT(edev), rss_num);
Yuval Mintz29502192015-10-26 11:02:29 +02002720 rc = 0;
2721 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002722
2723 edev->fp_num_tx = edev->req_num_tx;
2724 edev->fp_num_rx = edev->req_num_rx;
2725
Yuval Mintz29502192015-10-26 11:02:29 +02002726 return rc;
2727}
2728
2729static void qede_free_mem_sb(struct qede_dev *edev,
2730 struct qed_sb_info *sb_info)
2731{
2732 if (sb_info->sb_virt)
2733 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2734 (void *)sb_info->sb_virt, sb_info->sb_phys);
2735}
2736
2737/* This function allocates fast-path status block memory */
2738static int qede_alloc_mem_sb(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002739 struct qed_sb_info *sb_info, u16 sb_id)
Yuval Mintz29502192015-10-26 11:02:29 +02002740{
2741 struct status_block *sb_virt;
2742 dma_addr_t sb_phys;
2743 int rc;
2744
2745 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002746 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
Yuval Mintz29502192015-10-26 11:02:29 +02002747 if (!sb_virt) {
2748 DP_ERR(edev, "Status block allocation failed\n");
2749 return -ENOMEM;
2750 }
2751
2752 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2753 sb_virt, sb_phys, sb_id,
2754 QED_SB_TYPE_L2_QUEUE);
2755 if (rc) {
2756 DP_ERR(edev, "Status block initialization failed\n");
2757 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2758 sb_virt, sb_phys);
2759 return rc;
2760 }
2761
2762 return 0;
2763}
2764
2765static void qede_free_rx_buffers(struct qede_dev *edev,
2766 struct qede_rx_queue *rxq)
2767{
2768 u16 i;
2769
2770 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2771 struct sw_rx_data *rx_buf;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002772 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002773
2774 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2775 data = rx_buf->data;
2776
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002777 dma_unmap_page(&edev->pdev->dev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002778 rx_buf->mapping, PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002779
2780 rx_buf->data = NULL;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002781 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002782 }
2783}
2784
Yuval Mintz1a635e42016-08-15 10:42:43 +03002785static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
2786{
Manish Chopra55482ed2016-03-04 12:35:06 -05002787 int i;
2788
2789 if (edev->gro_disable)
2790 return;
2791
2792 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2793 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
Mintz, Yuval01e23012016-11-29 16:47:00 +02002794 struct sw_rx_data *replace_buf = &tpa_info->buffer;
Manish Chopra55482ed2016-03-04 12:35:06 -05002795
Manish Chopraf86af2d2016-04-20 03:03:27 -04002796 if (replace_buf->data) {
Manish Chopra55482ed2016-03-04 12:35:06 -05002797 dma_unmap_page(&edev->pdev->dev,
Manish Chopra09ec8e72016-05-18 07:43:57 -04002798 replace_buf->mapping,
Manish Chopra55482ed2016-03-04 12:35:06 -05002799 PAGE_SIZE, DMA_FROM_DEVICE);
2800 __free_page(replace_buf->data);
2801 }
2802 }
2803}
2804
Yuval Mintz1a635e42016-08-15 10:42:43 +03002805static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +02002806{
Manish Chopra55482ed2016-03-04 12:35:06 -05002807 qede_free_sge_mem(edev, rxq);
2808
Yuval Mintz29502192015-10-26 11:02:29 +02002809 /* Free rx buffers */
2810 qede_free_rx_buffers(edev, rxq);
2811
2812 /* Free the parallel SW ring */
2813 kfree(rxq->sw_rx_ring);
2814
2815 /* Free the real RQ ring used by FW */
2816 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2817 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2818}
2819
2820static int qede_alloc_rx_buffer(struct qede_dev *edev,
2821 struct qede_rx_queue *rxq)
2822{
2823 struct sw_rx_data *sw_rx_data;
2824 struct eth_rx_bd *rx_bd;
2825 dma_addr_t mapping;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002826 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002827
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002828 data = alloc_pages(GFP_ATOMIC, 0);
Yuval Mintz29502192015-10-26 11:02:29 +02002829 if (unlikely(!data)) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002830 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
Yuval Mintz29502192015-10-26 11:02:29 +02002831 return -ENOMEM;
2832 }
2833
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002834 /* Map the entire page as it would be used
2835 * for multiple RX buffer segment size mapping.
2836 */
2837 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2838 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002839 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002840 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002841 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2842 return -ENOMEM;
2843 }
2844
2845 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002846 sw_rx_data->page_offset = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002847 sw_rx_data->data = data;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002848 sw_rx_data->mapping = mapping;
Yuval Mintz29502192015-10-26 11:02:29 +02002849
2850 /* Advance PROD and get BD pointer */
2851 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2852 WARN_ON(!rx_bd);
2853 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2854 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2855
2856 rxq->sw_rx_prod++;
2857
2858 return 0;
2859}
2860
Yuval Mintz1a635e42016-08-15 10:42:43 +03002861static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
Manish Chopra55482ed2016-03-04 12:35:06 -05002862{
2863 dma_addr_t mapping;
2864 int i;
2865
2866 if (edev->gro_disable)
2867 return 0;
2868
2869 if (edev->ndev->mtu > PAGE_SIZE) {
2870 edev->gro_disable = 1;
2871 return 0;
2872 }
2873
2874 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2875 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
Mintz, Yuval01e23012016-11-29 16:47:00 +02002876 struct sw_rx_data *replace_buf = &tpa_info->buffer;
Manish Chopra55482ed2016-03-04 12:35:06 -05002877
2878 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2879 if (unlikely(!replace_buf->data)) {
2880 DP_NOTICE(edev,
2881 "Failed to allocate TPA skb pool [replacement buffer]\n");
2882 goto err;
2883 }
2884
2885 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
Mintz, Yuval95129252016-11-02 16:36:46 +02002886 PAGE_SIZE, DMA_FROM_DEVICE);
Manish Chopra55482ed2016-03-04 12:35:06 -05002887 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2888 DP_NOTICE(edev,
2889 "Failed to map TPA replacement buffer\n");
2890 goto err;
2891 }
2892
Manish Chopra09ec8e72016-05-18 07:43:57 -04002893 replace_buf->mapping = mapping;
Mintz, Yuval01e23012016-11-29 16:47:00 +02002894 tpa_info->buffer.page_offset = 0;
2895 tpa_info->buffer_mapping = mapping;
2896 tpa_info->state = QEDE_AGG_STATE_NONE;
Manish Chopra55482ed2016-03-04 12:35:06 -05002897 }
2898
2899 return 0;
2900err:
2901 qede_free_sge_mem(edev, rxq);
2902 edev->gro_disable = 1;
2903 return -ENOMEM;
2904}
2905
Yuval Mintz29502192015-10-26 11:02:29 +02002906/* This function allocates all memory needed per Rx queue */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002907static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +02002908{
Manish Chopraf86af2d2016-04-20 03:03:27 -04002909 int i, rc, size;
Yuval Mintz29502192015-10-26 11:02:29 +02002910
2911 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2912
Yuval Mintz1a635e42016-08-15 10:42:43 +03002913 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
2914
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002915 if (rxq->rx_buf_size > PAGE_SIZE)
2916 rxq->rx_buf_size = PAGE_SIZE;
2917
2918 /* Segment size to spilt a page in multiple equal parts */
2919 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
Yuval Mintz29502192015-10-26 11:02:29 +02002920
2921 /* Allocate the parallel driver ring for Rx buffers */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002922 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02002923 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2924 if (!rxq->sw_rx_ring) {
2925 DP_ERR(edev, "Rx buffers ring allocation failed\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04002926 rc = -ENOMEM;
Yuval Mintz29502192015-10-26 11:02:29 +02002927 goto err;
2928 }
2929
2930 /* Allocate FW Rx ring */
2931 rc = edev->ops->common->chain_alloc(edev->cdev,
2932 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2933 QED_CHAIN_MODE_NEXT_PTR,
Yuval Mintza91eb522016-06-03 14:35:32 +03002934 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002935 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002936 sizeof(struct eth_rx_bd),
2937 &rxq->rx_bd_ring);
2938
2939 if (rc)
2940 goto err;
2941
2942 /* Allocate FW completion ring */
2943 rc = edev->ops->common->chain_alloc(edev->cdev,
2944 QED_CHAIN_USE_TO_CONSUME,
2945 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03002946 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002947 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002948 sizeof(union eth_rx_cqe),
2949 &rxq->rx_comp_ring);
2950 if (rc)
2951 goto err;
2952
2953 /* Allocate buffers for the Rx ring */
2954 for (i = 0; i < rxq->num_rx_buffers; i++) {
2955 rc = qede_alloc_rx_buffer(edev, rxq);
Manish Chopraf86af2d2016-04-20 03:03:27 -04002956 if (rc) {
2957 DP_ERR(edev,
2958 "Rx buffers allocation failed at index %d\n", i);
2959 goto err;
2960 }
Yuval Mintz29502192015-10-26 11:02:29 +02002961 }
2962
Manish Chopraf86af2d2016-04-20 03:03:27 -04002963 rc = qede_alloc_sge_mem(edev, rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02002964err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04002965 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002966}
2967
Yuval Mintz1a635e42016-08-15 10:42:43 +03002968static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +02002969{
2970 /* Free the parallel SW ring */
2971 kfree(txq->sw_tx_ring);
2972
2973 /* Free the real RQ ring used by FW */
2974 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2975}
2976
2977/* This function allocates all memory needed per Tx queue */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002978static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +02002979{
2980 int size, rc;
2981 union eth_tx_bd_types *p_virt;
2982
2983 txq->num_tx_buffers = edev->q_num_tx_buffers;
2984
2985 /* Allocate the parallel driver ring for Tx buffers */
Mintz, Yuval087892d2016-10-29 17:04:35 +03002986 size = sizeof(*txq->sw_tx_ring) * TX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02002987 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2988 if (!txq->sw_tx_ring) {
2989 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2990 goto err;
2991 }
2992
2993 rc = edev->ops->common->chain_alloc(edev->cdev,
2994 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2995 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03002996 QED_CHAIN_CNT_TYPE_U16,
Mintz, Yuval087892d2016-10-29 17:04:35 +03002997 TX_RING_SIZE,
Yuval Mintza91eb522016-06-03 14:35:32 +03002998 sizeof(*p_virt), &txq->tx_pbl);
Yuval Mintz29502192015-10-26 11:02:29 +02002999 if (rc)
3000 goto err;
3001
3002 return 0;
3003
3004err:
3005 qede_free_mem_txq(edev, txq);
3006 return -ENOMEM;
3007}
3008
3009/* This function frees all memory of a single fp */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003010static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
Yuval Mintz29502192015-10-26 11:02:29 +02003011{
Yuval Mintz29502192015-10-26 11:02:29 +02003012 qede_free_mem_sb(edev, fp->sb_info);
3013
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003014 if (fp->type & QEDE_FASTPATH_RX)
3015 qede_free_mem_rxq(edev, fp->rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02003016
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003017 if (fp->type & QEDE_FASTPATH_TX)
Mintz, Yuval80439a12016-11-29 16:47:02 +02003018 qede_free_mem_txq(edev, fp->txq);
Yuval Mintz29502192015-10-26 11:02:29 +02003019}
3020
3021/* This function allocates all memory needed for a single fp (i.e. an entity
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003022 * which contains status block, one rx queue and/or multiple per-TC tx queues.
Yuval Mintz29502192015-10-26 11:02:29 +02003023 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003024static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
Yuval Mintz29502192015-10-26 11:02:29 +02003025{
Mintz, Yuval80439a12016-11-29 16:47:02 +02003026 int rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003027
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003028 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
Yuval Mintz29502192015-10-26 11:02:29 +02003029 if (rc)
3030 goto err;
3031
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003032 if (fp->type & QEDE_FASTPATH_RX) {
3033 rc = qede_alloc_mem_rxq(edev, fp->rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02003034 if (rc)
3035 goto err;
3036 }
3037
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003038 if (fp->type & QEDE_FASTPATH_TX) {
Mintz, Yuval80439a12016-11-29 16:47:02 +02003039 rc = qede_alloc_mem_txq(edev, fp->txq);
3040 if (rc)
3041 goto err;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003042 }
3043
Yuval Mintz29502192015-10-26 11:02:29 +02003044 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003045err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04003046 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003047}
3048
3049static void qede_free_mem_load(struct qede_dev *edev)
3050{
3051 int i;
3052
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003053 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003054 struct qede_fastpath *fp = &edev->fp_array[i];
3055
3056 qede_free_mem_fp(edev, fp);
3057 }
3058}
3059
3060/* This function allocates all qede memory at NIC load. */
3061static int qede_alloc_mem_load(struct qede_dev *edev)
3062{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003063 int rc = 0, queue_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003064
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003065 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
3066 struct qede_fastpath *fp = &edev->fp_array[queue_id];
Yuval Mintz29502192015-10-26 11:02:29 +02003067
3068 rc = qede_alloc_mem_fp(edev, fp);
Manish Chopraf86af2d2016-04-20 03:03:27 -04003069 if (rc) {
Yuval Mintz29502192015-10-26 11:02:29 +02003070 DP_ERR(edev,
Manish Chopraf86af2d2016-04-20 03:03:27 -04003071 "Failed to allocate memory for fastpath - rss id = %d\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003072 queue_id);
Manish Chopraf86af2d2016-04-20 03:03:27 -04003073 qede_free_mem_load(edev);
3074 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003075 }
Yuval Mintz29502192015-10-26 11:02:29 +02003076 }
3077
3078 return 0;
3079}
3080
3081/* This function inits fp content and resets the SB, RXQ and TXQ structures */
3082static void qede_init_fp(struct qede_dev *edev)
3083{
Mintz, Yuval80439a12016-11-29 16:47:02 +02003084 int queue_id, rxq_index = 0, txq_index = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003085 struct qede_fastpath *fp;
3086
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003087 for_each_queue(queue_id) {
3088 fp = &edev->fp_array[queue_id];
Yuval Mintz29502192015-10-26 11:02:29 +02003089
3090 fp->edev = edev;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003091 fp->id = queue_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003092
Yuval Mintz29502192015-10-26 11:02:29 +02003093
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003094 if (fp->type & QEDE_FASTPATH_RX) {
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003095 fp->rxq->rxq_id = rxq_index++;
3096 }
Yuval Mintz29502192015-10-26 11:02:29 +02003097
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003098 if (fp->type & QEDE_FASTPATH_TX) {
Mintz, Yuval80439a12016-11-29 16:47:02 +02003099 fp->txq->index = txq_index++;
3100 if (edev->dev_info.is_legacy)
3101 fp->txq->is_legacy = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02003102 }
3103
3104 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003105 edev->ndev->name, queue_id);
Yuval Mintz29502192015-10-26 11:02:29 +02003106 }
Manish Chopra55482ed2016-03-04 12:35:06 -05003107
3108 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
Yuval Mintz29502192015-10-26 11:02:29 +02003109}
3110
3111static int qede_set_real_num_queues(struct qede_dev *edev)
3112{
3113 int rc = 0;
3114
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003115 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +02003116 if (rc) {
3117 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3118 return rc;
3119 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003120
3121 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +02003122 if (rc) {
3123 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3124 return rc;
3125 }
3126
3127 return 0;
3128}
3129
3130static void qede_napi_disable_remove(struct qede_dev *edev)
3131{
3132 int i;
3133
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003134 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003135 napi_disable(&edev->fp_array[i].napi);
3136
3137 netif_napi_del(&edev->fp_array[i].napi);
3138 }
3139}
3140
3141static void qede_napi_add_enable(struct qede_dev *edev)
3142{
3143 int i;
3144
3145 /* Add NAPI objects */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003146 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003147 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3148 qede_poll, NAPI_POLL_WEIGHT);
3149 napi_enable(&edev->fp_array[i].napi);
3150 }
3151}
3152
3153static void qede_sync_free_irqs(struct qede_dev *edev)
3154{
3155 int i;
3156
3157 for (i = 0; i < edev->int_info.used_cnt; i++) {
3158 if (edev->int_info.msix_cnt) {
3159 synchronize_irq(edev->int_info.msix[i].vector);
3160 free_irq(edev->int_info.msix[i].vector,
3161 &edev->fp_array[i]);
3162 } else {
3163 edev->ops->common->simd_handler_clean(edev->cdev, i);
3164 }
3165 }
3166
3167 edev->int_info.used_cnt = 0;
3168}
3169
3170static int qede_req_msix_irqs(struct qede_dev *edev)
3171{
3172 int i, rc;
3173
3174 /* Sanitize number of interrupts == number of prepared RSS queues */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003175 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
Yuval Mintz29502192015-10-26 11:02:29 +02003176 DP_ERR(edev,
3177 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003178 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
Yuval Mintz29502192015-10-26 11:02:29 +02003179 return -EINVAL;
3180 }
3181
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003182 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
Yuval Mintz29502192015-10-26 11:02:29 +02003183 rc = request_irq(edev->int_info.msix[i].vector,
3184 qede_msix_fp_int, 0, edev->fp_array[i].name,
3185 &edev->fp_array[i]);
3186 if (rc) {
3187 DP_ERR(edev, "Request fp %d irq failed\n", i);
3188 qede_sync_free_irqs(edev);
3189 return rc;
3190 }
3191 DP_VERBOSE(edev, NETIF_MSG_INTR,
3192 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3193 edev->fp_array[i].name, i,
3194 &edev->fp_array[i]);
3195 edev->int_info.used_cnt++;
3196 }
3197
3198 return 0;
3199}
3200
3201static void qede_simd_fp_handler(void *cookie)
3202{
3203 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3204
3205 napi_schedule_irqoff(&fp->napi);
3206}
3207
3208static int qede_setup_irqs(struct qede_dev *edev)
3209{
3210 int i, rc = 0;
3211
3212 /* Learn Interrupt configuration */
3213 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3214 if (rc)
3215 return rc;
3216
3217 if (edev->int_info.msix_cnt) {
3218 rc = qede_req_msix_irqs(edev);
3219 if (rc)
3220 return rc;
3221 edev->ndev->irq = edev->int_info.msix[0].vector;
3222 } else {
3223 const struct qed_common_ops *ops;
3224
3225 /* qed should learn receive the RSS ids and callbacks */
3226 ops = edev->ops->common;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003227 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
Yuval Mintz29502192015-10-26 11:02:29 +02003228 ops->simd_handler_config(edev->cdev,
3229 &edev->fp_array[i], i,
3230 qede_simd_fp_handler);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003231 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003232 }
3233 return 0;
3234}
3235
3236static int qede_drain_txq(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03003237 struct qede_tx_queue *txq, bool allow_drain)
Yuval Mintz29502192015-10-26 11:02:29 +02003238{
3239 int rc, cnt = 1000;
3240
3241 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3242 if (!cnt) {
3243 if (allow_drain) {
3244 DP_NOTICE(edev,
3245 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3246 txq->index);
3247 rc = edev->ops->common->drain(edev->cdev);
3248 if (rc)
3249 return rc;
3250 return qede_drain_txq(edev, txq, false);
3251 }
3252 DP_NOTICE(edev,
3253 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3254 txq->index, txq->sw_tx_prod,
3255 txq->sw_tx_cons);
3256 return -ENODEV;
3257 }
3258 cnt--;
3259 usleep_range(1000, 2000);
3260 barrier();
3261 }
3262
3263 /* FW finished processing, wait for HW to transmit all tx packets */
3264 usleep_range(1000, 2000);
3265
3266 return 0;
3267}
3268
3269static int qede_stop_queues(struct qede_dev *edev)
3270{
3271 struct qed_update_vport_params vport_update_params;
3272 struct qed_dev *cdev = edev->cdev;
Mintz, Yuval80439a12016-11-29 16:47:02 +02003273 struct qede_fastpath *fp;
3274 int rc, i;
Yuval Mintz29502192015-10-26 11:02:29 +02003275
3276 /* Disable the vport */
3277 memset(&vport_update_params, 0, sizeof(vport_update_params));
3278 vport_update_params.vport_id = 0;
3279 vport_update_params.update_vport_active_flg = 1;
3280 vport_update_params.vport_active_flg = 0;
3281 vport_update_params.update_rss_flg = 0;
3282
3283 rc = edev->ops->vport_update(cdev, &vport_update_params);
3284 if (rc) {
3285 DP_ERR(edev, "Failed to update vport\n");
3286 return rc;
3287 }
3288
3289 /* Flush Tx queues. If needed, request drain from MCP */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003290 for_each_queue(i) {
Mintz, Yuval80439a12016-11-29 16:47:02 +02003291 fp = &edev->fp_array[i];
Yuval Mintz29502192015-10-26 11:02:29 +02003292
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003293 if (fp->type & QEDE_FASTPATH_TX) {
Mintz, Yuval80439a12016-11-29 16:47:02 +02003294 rc = qede_drain_txq(edev, fp->txq, true);
3295 if (rc)
3296 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003297 }
3298 }
3299
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003300 /* Stop all Queues in reverse order */
3301 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
Yuval Mintz29502192015-10-26 11:02:29 +02003302 struct qed_stop_rxq_params rx_params;
3303
Mintz, Yuval80439a12016-11-29 16:47:02 +02003304 fp = &edev->fp_array[i];
Yuval Mintz29502192015-10-26 11:02:29 +02003305
Mintz, Yuval80439a12016-11-29 16:47:02 +02003306 /* Stop the Tx Queue(s) */
3307 if (fp->type & QEDE_FASTPATH_TX) {
3308 struct qed_stop_txq_params tx_params;
3309
3310 tx_params.rss_id = i;
3311 tx_params.tx_queue_id = fp->txq->index;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003312 rc = edev->ops->q_tx_stop(cdev, &tx_params);
Mintz, Yuval80439a12016-11-29 16:47:02 +02003313 if (rc)
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003314 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003315 }
3316
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003317 /* Stop the Rx Queue */
Mintz, Yuval80439a12016-11-29 16:47:02 +02003318 if (fp->type & QEDE_FASTPATH_RX) {
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003319 memset(&rx_params, 0, sizeof(rx_params));
3320 rx_params.rss_id = i;
Mintz, Yuval80439a12016-11-29 16:47:02 +02003321 rx_params.rx_queue_id = fp->rxq->rxq_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003322
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003323 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3324 if (rc) {
3325 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3326 return rc;
3327 }
Yuval Mintz29502192015-10-26 11:02:29 +02003328 }
3329 }
3330
3331 /* Stop the vport */
3332 rc = edev->ops->vport_stop(cdev, 0);
3333 if (rc)
3334 DP_ERR(edev, "Failed to stop VPORT\n");
3335
3336 return rc;
3337}
3338
Yuval Mintza0d26d52016-06-19 15:18:13 +03003339static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
Yuval Mintz29502192015-10-26 11:02:29 +02003340{
Manish Chopra088c8612016-03-04 12:35:05 -05003341 int vlan_removal_en = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02003342 struct qed_dev *cdev = edev->cdev;
Yuval Mintz29502192015-10-26 11:02:29 +02003343 struct qed_update_vport_params vport_update_params;
3344 struct qed_queue_start_common_params q_params;
Yuval Mintzfefb0202016-05-11 16:36:19 +03003345 struct qed_dev_info *qed_info = &edev->dev_info.common;
Manish Chopra088c8612016-03-04 12:35:05 -05003346 struct qed_start_vport_params start = {0};
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003347 bool reset_rss_indir = false;
Mintz, Yuval80439a12016-11-29 16:47:02 +02003348 int rc, i;
Yuval Mintz29502192015-10-26 11:02:29 +02003349
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003350 if (!edev->num_queues) {
Yuval Mintz29502192015-10-26 11:02:29 +02003351 DP_ERR(edev,
3352 "Cannot update V-VPORT as active as there are no Rx queues\n");
3353 return -EINVAL;
3354 }
3355
Manish Chopra55482ed2016-03-04 12:35:06 -05003356 start.gro_enable = !edev->gro_disable;
Manish Chopra088c8612016-03-04 12:35:05 -05003357 start.mtu = edev->ndev->mtu;
3358 start.vport_id = 0;
3359 start.drop_ttl0 = true;
3360 start.remove_inner_vlan = vlan_removal_en;
Yuval Mintz7f7a1442016-07-27 14:45:22 +03003361 start.clear_stats = clear_stats;
Manish Chopra088c8612016-03-04 12:35:05 -05003362
3363 rc = edev->ops->vport_start(cdev, &start);
Yuval Mintz29502192015-10-26 11:02:29 +02003364
3365 if (rc) {
3366 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3367 return rc;
3368 }
3369
3370 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3371 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
Manish Chopra088c8612016-03-04 12:35:05 -05003372 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
Yuval Mintz29502192015-10-26 11:02:29 +02003373
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003374 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003375 struct qede_fastpath *fp = &edev->fp_array[i];
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003376 dma_addr_t p_phys_table;
3377 u32 page_cnt;
Yuval Mintz29502192015-10-26 11:02:29 +02003378
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003379 if (fp->type & QEDE_FASTPATH_RX) {
3380 struct qede_rx_queue *rxq = fp->rxq;
3381 __le16 *val;
Yuval Mintz29502192015-10-26 11:02:29 +02003382
3383 memset(&q_params, 0, sizeof(q_params));
3384 q_params.rss_id = i;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003385 q_params.queue_id = rxq->rxq_id;
3386 q_params.vport_id = 0;
3387 q_params.sb = fp->sb_info->igu_sb_id;
3388 q_params.sb_idx = RX_PI;
3389
3390 p_phys_table =
3391 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
3392 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
3393
3394 rc = edev->ops->q_rx_start(cdev, &q_params,
3395 rxq->rx_buf_size,
3396 rxq->rx_bd_ring.p_phys_addr,
3397 p_phys_table,
3398 page_cnt,
3399 &rxq->hw_rxq_prod_addr);
3400 if (rc) {
3401 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
3402 rc);
3403 return rc;
3404 }
3405
3406 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
3407 rxq->hw_cons_ptr = val;
3408
3409 qede_update_rx_prod(edev, rxq);
3410 }
3411
Mintz, Yuval80439a12016-11-29 16:47:02 +02003412 if (fp->type & QEDE_FASTPATH_TX) {
3413 struct qede_tx_queue *txq = fp->txq;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003414
3415 p_phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
3416 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
3417
3418 memset(&q_params, 0, sizeof(q_params));
3419 q_params.rss_id = i;
3420 q_params.queue_id = txq->index;
Yuval Mintz29502192015-10-26 11:02:29 +02003421 q_params.vport_id = 0;
3422 q_params.sb = fp->sb_info->igu_sb_id;
Mintz, Yuval80439a12016-11-29 16:47:02 +02003423 q_params.sb_idx = TX_PI(0);
Yuval Mintz29502192015-10-26 11:02:29 +02003424
3425 rc = edev->ops->q_tx_start(cdev, &q_params,
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003426 p_phys_table, page_cnt,
Yuval Mintz29502192015-10-26 11:02:29 +02003427 &txq->doorbell_addr);
3428 if (rc) {
3429 DP_ERR(edev, "Start TXQ #%d failed %d\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003430 txq->index, rc);
Yuval Mintz29502192015-10-26 11:02:29 +02003431 return rc;
3432 }
3433
3434 txq->hw_cons_ptr =
Mintz, Yuval80439a12016-11-29 16:47:02 +02003435 &fp->sb_info->sb_virt->pi_array[TX_PI(0)];
Yuval Mintz29502192015-10-26 11:02:29 +02003436 SET_FIELD(txq->tx_db.data.params,
3437 ETH_DB_DATA_DEST, DB_DEST_XCM);
3438 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3439 DB_AGG_CMD_SET);
3440 SET_FIELD(txq->tx_db.data.params,
3441 ETH_DB_DATA_AGG_VAL_SEL,
3442 DQ_XCM_ETH_TX_BD_PROD_CMD);
3443
3444 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3445 }
3446 }
3447
3448 /* Prepare and send the vport enable */
3449 memset(&vport_update_params, 0, sizeof(vport_update_params));
Manish Chopra088c8612016-03-04 12:35:05 -05003450 vport_update_params.vport_id = start.vport_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003451 vport_update_params.update_vport_active_flg = 1;
3452 vport_update_params.vport_active_flg = 1;
3453
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03003454 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3455 qed_info->tx_switching) {
3456 vport_update_params.update_tx_switching_flg = 1;
3457 vport_update_params.tx_switching_flg = 1;
3458 }
3459
Yuval Mintz29502192015-10-26 11:02:29 +02003460 /* Fill struct with RSS params */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003461 if (QEDE_RSS_COUNT(edev) > 1) {
Yuval Mintz29502192015-10-26 11:02:29 +02003462 vport_update_params.update_rss_flg = 1;
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003463
3464 /* Need to validate current RSS config uses valid entries */
3465 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3466 if (edev->rss_params.rss_ind_table[i] >=
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003467 QEDE_RSS_COUNT(edev)) {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003468 reset_rss_indir = true;
3469 break;
3470 }
3471 }
3472
3473 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3474 reset_rss_indir) {
3475 u16 val;
3476
3477 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3478 u16 indir_val;
3479
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003480 val = QEDE_RSS_COUNT(edev);
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003481 indir_val = ethtool_rxfh_indir_default(i, val);
3482 edev->rss_params.rss_ind_table[i] = indir_val;
3483 }
3484 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3485 }
3486
3487 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3488 netdev_rss_key_fill(edev->rss_params.rss_key,
3489 sizeof(edev->rss_params.rss_key));
3490 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3491 }
3492
3493 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3494 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3495 QED_RSS_IPV6 |
3496 QED_RSS_IPV4_TCP |
3497 QED_RSS_IPV6_TCP;
3498 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3499 }
3500
3501 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3502 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003503 } else {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003504 memset(&vport_update_params.rss_params, 0,
3505 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003506 }
Yuval Mintz29502192015-10-26 11:02:29 +02003507
3508 rc = edev->ops->vport_update(cdev, &vport_update_params);
3509 if (rc) {
3510 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3511 return rc;
3512 }
3513
3514 return 0;
3515}
3516
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003517static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3518 enum qed_filter_xcast_params_type opcode,
3519 unsigned char *mac, int num_macs)
3520{
3521 struct qed_filter_params filter_cmd;
3522 int i;
3523
3524 memset(&filter_cmd, 0, sizeof(filter_cmd));
3525 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3526 filter_cmd.filter.mcast.type = opcode;
3527 filter_cmd.filter.mcast.num = num_macs;
3528
3529 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3530 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3531
3532 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3533}
3534
Yuval Mintz29502192015-10-26 11:02:29 +02003535enum qede_unload_mode {
3536 QEDE_UNLOAD_NORMAL,
3537};
3538
3539static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3540{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003541 struct qed_link_params link_params;
Yuval Mintz29502192015-10-26 11:02:29 +02003542 int rc;
3543
3544 DP_INFO(edev, "Starting qede unload\n");
3545
Ram Amranicee9fbd2016-10-01 21:59:56 +03003546 qede_roce_dev_event_close(edev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003547 mutex_lock(&edev->qede_lock);
3548 edev->state = QEDE_STATE_CLOSED;
3549
Yuval Mintz29502192015-10-26 11:02:29 +02003550 /* Close OS Tx */
3551 netif_tx_disable(edev->ndev);
3552 netif_carrier_off(edev->ndev);
3553
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003554 /* Reset the link */
3555 memset(&link_params, 0, sizeof(link_params));
3556 link_params.link_up = false;
3557 edev->ops->common->set_link(edev->cdev, &link_params);
Yuval Mintz29502192015-10-26 11:02:29 +02003558 rc = qede_stop_queues(edev);
3559 if (rc) {
3560 qede_sync_free_irqs(edev);
3561 goto out;
3562 }
3563
3564 DP_INFO(edev, "Stopped Queues\n");
3565
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003566 qede_vlan_mark_nonconfigured(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003567 edev->ops->fastpath_stop(edev->cdev);
3568
3569 /* Release the interrupts */
3570 qede_sync_free_irqs(edev);
3571 edev->ops->common->set_fp_int(edev->cdev, 0);
3572
3573 qede_napi_disable_remove(edev);
3574
3575 qede_free_mem_load(edev);
3576 qede_free_fp_array(edev);
3577
3578out:
3579 mutex_unlock(&edev->qede_lock);
3580 DP_INFO(edev, "Ending qede unload\n");
3581}
3582
3583enum qede_load_mode {
3584 QEDE_LOAD_NORMAL,
Yuval Mintza0d26d52016-06-19 15:18:13 +03003585 QEDE_LOAD_RELOAD,
Yuval Mintz29502192015-10-26 11:02:29 +02003586};
3587
3588static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3589{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003590 struct qed_link_params link_params;
3591 struct qed_link_output link_output;
Yuval Mintz29502192015-10-26 11:02:29 +02003592 int rc;
3593
3594 DP_INFO(edev, "Starting qede load\n");
3595
3596 rc = qede_set_num_queues(edev);
3597 if (rc)
3598 goto err0;
3599
3600 rc = qede_alloc_fp_array(edev);
3601 if (rc)
3602 goto err0;
3603
3604 qede_init_fp(edev);
3605
3606 rc = qede_alloc_mem_load(edev);
3607 if (rc)
3608 goto err1;
Mintz, Yuval80439a12016-11-29 16:47:02 +02003609 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
3610 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +02003611
3612 rc = qede_set_real_num_queues(edev);
3613 if (rc)
3614 goto err2;
3615
3616 qede_napi_add_enable(edev);
3617 DP_INFO(edev, "Napi added and enabled\n");
3618
3619 rc = qede_setup_irqs(edev);
3620 if (rc)
3621 goto err3;
3622 DP_INFO(edev, "Setup IRQs succeeded\n");
3623
Yuval Mintza0d26d52016-06-19 15:18:13 +03003624 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
Yuval Mintz29502192015-10-26 11:02:29 +02003625 if (rc)
3626 goto err4;
3627 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3628
3629 /* Add primary mac and set Rx filters */
3630 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3631
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003632 mutex_lock(&edev->qede_lock);
3633 edev->state = QEDE_STATE_OPEN;
3634 mutex_unlock(&edev->qede_lock);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003635
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003636 /* Program un-configured VLANs */
3637 qede_configure_vlan_filters(edev);
3638
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003639 /* Ask for link-up using current configuration */
3640 memset(&link_params, 0, sizeof(link_params));
3641 link_params.link_up = true;
3642 edev->ops->common->set_link(edev->cdev, &link_params);
3643
3644 /* Query whether link is already-up */
3645 memset(&link_output, 0, sizeof(link_output));
3646 edev->ops->common->get_link(edev->cdev, &link_output);
Ram Amranicee9fbd2016-10-01 21:59:56 +03003647 qede_roce_dev_event_open(edev);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003648 qede_link_update(edev, &link_output);
3649
Yuval Mintz29502192015-10-26 11:02:29 +02003650 DP_INFO(edev, "Ending successfully qede load\n");
3651
3652 return 0;
3653
3654err4:
3655 qede_sync_free_irqs(edev);
3656 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3657err3:
3658 qede_napi_disable_remove(edev);
3659err2:
3660 qede_free_mem_load(edev);
3661err1:
3662 edev->ops->common->set_fp_int(edev->cdev, 0);
3663 qede_free_fp_array(edev);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003664 edev->num_queues = 0;
3665 edev->fp_num_tx = 0;
3666 edev->fp_num_rx = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003667err0:
3668 return rc;
3669}
3670
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003671void qede_reload(struct qede_dev *edev,
3672 void (*func)(struct qede_dev *, union qede_reload_args *),
3673 union qede_reload_args *args)
3674{
3675 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3676 /* Call function handler to update parameters
3677 * needed for function load.
3678 */
3679 if (func)
3680 func(edev, args);
3681
Yuval Mintza0d26d52016-06-19 15:18:13 +03003682 qede_load(edev, QEDE_LOAD_RELOAD);
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003683
3684 mutex_lock(&edev->qede_lock);
3685 qede_config_rx_mode(edev->ndev);
3686 mutex_unlock(&edev->qede_lock);
3687}
3688
Yuval Mintz29502192015-10-26 11:02:29 +02003689/* called with rtnl_lock */
3690static int qede_open(struct net_device *ndev)
3691{
3692 struct qede_dev *edev = netdev_priv(ndev);
Manish Choprab18e1702016-04-14 01:38:30 -04003693 int rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003694
3695 netif_carrier_off(ndev);
3696
3697 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3698
Manish Choprab18e1702016-04-14 01:38:30 -04003699 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3700
3701 if (rc)
3702 return rc;
3703
Alexander Duyckf9f082a2016-06-16 12:22:57 -07003704 udp_tunnel_get_rx_info(ndev);
3705
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02003706 edev->ops->common->update_drv_state(edev->cdev, true);
3707
Manish Choprab18e1702016-04-14 01:38:30 -04003708 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003709}
3710
3711static int qede_close(struct net_device *ndev)
3712{
3713 struct qede_dev *edev = netdev_priv(ndev);
3714
3715 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3716
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02003717 edev->ops->common->update_drv_state(edev->cdev, false);
3718
Yuval Mintz29502192015-10-26 11:02:29 +02003719 return 0;
3720}
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003721
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003722static void qede_link_update(void *dev, struct qed_link_output *link)
3723{
3724 struct qede_dev *edev = dev;
3725
3726 if (!netif_running(edev->ndev)) {
3727 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3728 return;
3729 }
3730
3731 if (link->link_up) {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003732 if (!netif_carrier_ok(edev->ndev)) {
3733 DP_NOTICE(edev, "Link is up\n");
3734 netif_tx_start_all_queues(edev->ndev);
3735 netif_carrier_on(edev->ndev);
3736 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003737 } else {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003738 if (netif_carrier_ok(edev->ndev)) {
3739 DP_NOTICE(edev, "Link is down\n");
3740 netif_tx_disable(edev->ndev);
3741 netif_carrier_off(edev->ndev);
3742 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003743 }
3744}
3745
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003746static int qede_set_mac_addr(struct net_device *ndev, void *p)
3747{
3748 struct qede_dev *edev = netdev_priv(ndev);
3749 struct sockaddr *addr = p;
3750 int rc;
3751
3752 ASSERT_RTNL(); /* @@@TBD To be removed */
3753
3754 DP_INFO(edev, "Set_mac_addr called\n");
3755
3756 if (!is_valid_ether_addr(addr->sa_data)) {
3757 DP_NOTICE(edev, "The MAC address is not valid\n");
3758 return -EFAULT;
3759 }
3760
Yuval Mintzeff16962016-05-11 16:36:21 +03003761 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3762 DP_NOTICE(edev, "qed prevents setting MAC\n");
3763 return -EINVAL;
3764 }
3765
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003766 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3767
3768 if (!netif_running(ndev)) {
3769 DP_NOTICE(edev, "The device is currently down\n");
3770 return 0;
3771 }
3772
3773 /* Remove the previous primary mac */
3774 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3775 edev->primary_mac);
3776 if (rc)
3777 return rc;
3778
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +02003779 edev->ops->common->update_mac(edev->cdev, addr->sa_data);
3780
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003781 /* Add MAC filter according to the new unicast HW MAC address */
3782 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3783 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3784 edev->primary_mac);
3785}
3786
3787static int
3788qede_configure_mcast_filtering(struct net_device *ndev,
3789 enum qed_filter_rx_mode_type *accept_flags)
3790{
3791 struct qede_dev *edev = netdev_priv(ndev);
3792 unsigned char *mc_macs, *temp;
3793 struct netdev_hw_addr *ha;
3794 int rc = 0, mc_count;
3795 size_t size;
3796
3797 size = 64 * ETH_ALEN;
3798
3799 mc_macs = kzalloc(size, GFP_KERNEL);
3800 if (!mc_macs) {
3801 DP_NOTICE(edev,
3802 "Failed to allocate memory for multicast MACs\n");
3803 rc = -ENOMEM;
3804 goto exit;
3805 }
3806
3807 temp = mc_macs;
3808
3809 /* Remove all previously configured MAC filters */
3810 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3811 mc_macs, 1);
3812 if (rc)
3813 goto exit;
3814
3815 netif_addr_lock_bh(ndev);
3816
3817 mc_count = netdev_mc_count(ndev);
3818 if (mc_count < 64) {
3819 netdev_for_each_mc_addr(ha, ndev) {
3820 ether_addr_copy(temp, ha->addr);
3821 temp += ETH_ALEN;
3822 }
3823 }
3824
3825 netif_addr_unlock_bh(ndev);
3826
3827 /* Check for all multicast @@@TBD resource allocation */
3828 if ((ndev->flags & IFF_ALLMULTI) ||
3829 (mc_count > 64)) {
3830 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3831 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3832 } else {
3833 /* Add all multicast MAC filters */
3834 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3835 mc_macs, mc_count);
3836 }
3837
3838exit:
3839 kfree(mc_macs);
3840 return rc;
3841}
3842
3843static void qede_set_rx_mode(struct net_device *ndev)
3844{
3845 struct qede_dev *edev = netdev_priv(ndev);
3846
3847 DP_INFO(edev, "qede_set_rx_mode called\n");
3848
3849 if (edev->state != QEDE_STATE_OPEN) {
3850 DP_INFO(edev,
3851 "qede_set_rx_mode called while interface is down\n");
3852 } else {
3853 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3854 schedule_delayed_work(&edev->sp_task, 0);
3855 }
3856}
3857
3858/* Must be called with qede_lock held */
3859static void qede_config_rx_mode(struct net_device *ndev)
3860{
3861 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3862 struct qede_dev *edev = netdev_priv(ndev);
3863 struct qed_filter_params rx_mode;
3864 unsigned char *uc_macs, *temp;
3865 struct netdev_hw_addr *ha;
3866 int rc, uc_count;
3867 size_t size;
3868
3869 netif_addr_lock_bh(ndev);
3870
3871 uc_count = netdev_uc_count(ndev);
3872 size = uc_count * ETH_ALEN;
3873
3874 uc_macs = kzalloc(size, GFP_ATOMIC);
3875 if (!uc_macs) {
3876 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3877 netif_addr_unlock_bh(ndev);
3878 return;
3879 }
3880
3881 temp = uc_macs;
3882 netdev_for_each_uc_addr(ha, ndev) {
3883 ether_addr_copy(temp, ha->addr);
3884 temp += ETH_ALEN;
3885 }
3886
3887 netif_addr_unlock_bh(ndev);
3888
3889 /* Configure the struct for the Rx mode */
3890 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3891 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3892
3893 /* Remove all previous unicast secondary macs and multicast macs
3894 * (configrue / leave the primary mac)
3895 */
3896 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3897 edev->primary_mac);
3898 if (rc)
3899 goto out;
3900
3901 /* Check for promiscuous */
3902 if ((ndev->flags & IFF_PROMISC) ||
Yuval Mintz7b7e70f2016-10-14 05:19:20 -04003903 (uc_count > edev->dev_info.num_mac_filters - 1)) {
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003904 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3905 } else {
3906 /* Add MAC filters according to the unicast secondary macs */
3907 int i;
3908
3909 temp = uc_macs;
3910 for (i = 0; i < uc_count; i++) {
3911 rc = qede_set_ucast_rx_mac(edev,
3912 QED_FILTER_XCAST_TYPE_ADD,
3913 temp);
3914 if (rc)
3915 goto out;
3916
3917 temp += ETH_ALEN;
3918 }
3919
3920 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3921 if (rc)
3922 goto out;
3923 }
3924
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003925 /* take care of VLAN mode */
3926 if (ndev->flags & IFF_PROMISC) {
3927 qede_config_accept_any_vlan(edev, true);
3928 } else if (!edev->non_configured_vlans) {
3929 /* It's possible that accept_any_vlan mode is set due to a
3930 * previous setting of IFF_PROMISC. If vlan credits are
3931 * sufficient, disable accept_any_vlan.
3932 */
3933 qede_config_accept_any_vlan(edev, false);
3934 }
3935
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003936 rx_mode.filter.accept_flags = accept_flags;
3937 edev->ops->filter_config(edev->cdev, &rx_mode);
3938out:
3939 kfree(uc_macs);
3940}