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Yuval Mintz32a47e72016-05-11 16:36:12 +03001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintz32a47e72016-05-11 16:36:12 +03003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintz32a47e72016-05-11 16:36:12 +030031 */
32
Yuval Mintzdacd88d2016-05-11 16:36:16 +030033#include <linux/etherdevice.h>
Yuval Mintz36558c32016-05-11 16:36:17 +030034#include <linux/crc32.h>
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +020035#include <linux/vmalloc.h>
Yuval Mintz0b55e272016-05-11 16:36:15 +030036#include <linux/qed/qed_iov_if.h>
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030037#include "qed_cxt.h"
38#include "qed_hsi.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030039#include "qed_hw.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030040#include "qed_init_ops.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030041#include "qed_int.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030042#include "qed_mcp.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030043#include "qed_reg_addr.h"
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030044#include "qed_sp.h"
Yuval Mintz32a47e72016-05-11 16:36:12 +030045#include "qed_sriov.h"
46#include "qed_vf.h"
Michal Kalderon6c9e80e2017-06-20 16:00:06 +030047static int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
48 u8 opcode,
49 __le16 echo,
50 union event_ring_data *data, u8 fw_return_code);
51
Yuval Mintz32a47e72016-05-11 16:36:12 +030052
Mintz, Yuval3b19f472017-06-04 13:31:04 +030053static u8 qed_vf_calculate_legacy(struct qed_vf_info *p_vf)
54{
Mintz, Yuval08bc8f12017-06-04 13:31:06 +030055 u8 legacy = 0;
Mintz, Yuval3b19f472017-06-04 13:31:04 +030056
57 if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
58 ETH_HSI_VER_NO_PKT_LEN_TUNN)
59 legacy |= QED_QCID_LEGACY_VF_RX_PROD;
60
Mintz, Yuval08bc8f12017-06-04 13:31:06 +030061 if (!(p_vf->acquire.vfdev_info.capabilities &
62 VFPF_ACQUIRE_CAP_QUEUE_QIDS))
63 legacy |= QED_QCID_LEGACY_VF_CID;
64
Mintz, Yuval3b19f472017-06-04 13:31:04 +030065 return legacy;
66}
67
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030068/* IOV ramrods */
Yuval Mintz1fe614d2016-06-05 13:11:11 +030069static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030070{
71 struct vf_start_ramrod_data *p_ramrod = NULL;
72 struct qed_spq_entry *p_ent = NULL;
73 struct qed_sp_init_data init_data;
74 int rc = -EINVAL;
Yuval Mintz1fe614d2016-06-05 13:11:11 +030075 u8 fp_minor;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030076
77 /* Get SPQ entry */
78 memset(&init_data, 0, sizeof(init_data));
79 init_data.cid = qed_spq_get_cid(p_hwfn);
Yuval Mintz1fe614d2016-06-05 13:11:11 +030080 init_data.opaque_fid = p_vf->opaque_fid;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030081 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
82
83 rc = qed_sp_init_request(p_hwfn, &p_ent,
84 COMMON_RAMROD_VF_START,
85 PROTOCOLID_COMMON, &init_data);
86 if (rc)
87 return rc;
88
89 p_ramrod = &p_ent->ramrod.vf_start;
90
Yuval Mintz1fe614d2016-06-05 13:11:11 +030091 p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
92 p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +030093
Yuval Mintz1fe614d2016-06-05 13:11:11 +030094 switch (p_hwfn->hw_info.personality) {
95 case QED_PCI_ETH:
96 p_ramrod->personality = PERSONALITY_ETH;
97 break;
98 case QED_PCI_ETH_ROCE:
99 p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
100 break;
101 default:
102 DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
103 p_hwfn->hw_info.personality);
104 return -EINVAL;
105 }
106
107 fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
Yuval Mintza044df82016-08-22 13:25:09 +0300108 if (fp_minor > ETH_HSI_VER_MINOR &&
109 fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) {
Yuval Mintz1fe614d2016-06-05 13:11:11 +0300110 DP_VERBOSE(p_hwfn,
111 QED_MSG_IOV,
112 "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
113 p_vf->abs_vf_id,
114 ETH_HSI_VER_MAJOR,
115 fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
116 fp_minor = ETH_HSI_VER_MINOR;
117 }
118
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300119 p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
Yuval Mintz1fe614d2016-06-05 13:11:11 +0300120 p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
121
122 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
123 "VF[%d] - Starting using HSI %02x.%02x\n",
124 p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300125
126 return qed_spq_post(p_hwfn, p_ent, NULL);
127}
128
Yuval Mintz0b55e272016-05-11 16:36:15 +0300129static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
130 u32 concrete_vfid, u16 opaque_vfid)
131{
132 struct vf_stop_ramrod_data *p_ramrod = NULL;
133 struct qed_spq_entry *p_ent = NULL;
134 struct qed_sp_init_data init_data;
135 int rc = -EINVAL;
136
137 /* Get SPQ entry */
138 memset(&init_data, 0, sizeof(init_data));
139 init_data.cid = qed_spq_get_cid(p_hwfn);
140 init_data.opaque_fid = opaque_vfid;
141 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
142
143 rc = qed_sp_init_request(p_hwfn, &p_ent,
144 COMMON_RAMROD_VF_STOP,
145 PROTOCOLID_COMMON, &init_data);
146 if (rc)
147 return rc;
148
149 p_ramrod = &p_ent->ramrod.vf_stop;
150
151 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
152
153 return qed_spq_post(p_hwfn, p_ent, NULL);
154}
155
Baoyou Xieba569472016-09-09 09:21:15 +0800156static bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400157 int rel_vf_id,
158 bool b_enabled_only, bool b_non_malicious)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300159{
160 if (!p_hwfn->pf_iov_info) {
161 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
162 return false;
163 }
164
165 if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
166 (rel_vf_id < 0))
167 return false;
168
169 if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
170 b_enabled_only)
171 return false;
172
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400173 if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) &&
174 b_non_malicious)
175 return false;
176
Yuval Mintz32a47e72016-05-11 16:36:12 +0300177 return true;
178}
179
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300180static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
181 u16 relative_vf_id,
182 bool b_enabled_only)
183{
184 struct qed_vf_info *vf = NULL;
185
186 if (!p_hwfn->pf_iov_info) {
187 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
188 return NULL;
189 }
190
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400191 if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id,
192 b_enabled_only, false))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300193 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
194 else
195 DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
196 relative_vf_id);
197
198 return vf;
199}
200
Mintz, Yuval007bc372017-06-04 13:31:05 +0300201static struct qed_queue_cid *
202qed_iov_get_vf_rx_queue_cid(struct qed_vf_queue *p_queue)
203{
204 int i;
205
206 for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) {
207 if (p_queue->cids[i].p_cid && !p_queue->cids[i].b_is_tx)
208 return p_queue->cids[i].p_cid;
209 }
210
211 return NULL;
212}
213
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200214enum qed_iov_validate_q_mode {
215 QED_IOV_VALIDATE_Q_NA,
216 QED_IOV_VALIDATE_Q_ENABLE,
217 QED_IOV_VALIDATE_Q_DISABLE,
218};
219
220static bool qed_iov_validate_queue_mode(struct qed_hwfn *p_hwfn,
221 struct qed_vf_info *p_vf,
222 u16 qid,
223 enum qed_iov_validate_q_mode mode,
224 bool b_is_tx)
Yuval Mintz41086462016-06-05 13:11:13 +0300225{
Mintz, Yuval007bc372017-06-04 13:31:05 +0300226 int i;
227
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200228 if (mode == QED_IOV_VALIDATE_Q_NA)
229 return true;
230
Mintz, Yuval007bc372017-06-04 13:31:05 +0300231 for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) {
232 struct qed_vf_queue_cid *p_qcid;
233
234 p_qcid = &p_vf->vf_queues[qid].cids[i];
235
236 if (!p_qcid->p_cid)
237 continue;
238
239 if (p_qcid->b_is_tx != b_is_tx)
240 continue;
241
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200242 return mode == QED_IOV_VALIDATE_Q_ENABLE;
Mintz, Yuval007bc372017-06-04 13:31:05 +0300243 }
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200244
245 /* In case we haven't found any valid cid, then its disabled */
246 return mode == QED_IOV_VALIDATE_Q_DISABLE;
247}
248
249static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn,
250 struct qed_vf_info *p_vf,
251 u16 rx_qid,
252 enum qed_iov_validate_q_mode mode)
253{
254 if (rx_qid >= p_vf->num_rxqs) {
Yuval Mintz41086462016-06-05 13:11:13 +0300255 DP_VERBOSE(p_hwfn,
256 QED_MSG_IOV,
257 "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n",
258 p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200259 return false;
260 }
261
262 return qed_iov_validate_queue_mode(p_hwfn, p_vf, rx_qid, mode, false);
Yuval Mintz41086462016-06-05 13:11:13 +0300263}
264
265static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn,
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200266 struct qed_vf_info *p_vf,
267 u16 tx_qid,
268 enum qed_iov_validate_q_mode mode)
Yuval Mintz41086462016-06-05 13:11:13 +0300269{
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200270 if (tx_qid >= p_vf->num_txqs) {
Yuval Mintz41086462016-06-05 13:11:13 +0300271 DP_VERBOSE(p_hwfn,
272 QED_MSG_IOV,
273 "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n",
274 p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200275 return false;
276 }
277
278 return qed_iov_validate_queue_mode(p_hwfn, p_vf, tx_qid, mode, true);
Yuval Mintz41086462016-06-05 13:11:13 +0300279}
280
281static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn,
282 struct qed_vf_info *p_vf, u16 sb_idx)
283{
284 int i;
285
286 for (i = 0; i < p_vf->num_sbs; i++)
287 if (p_vf->igu_sbs[i] == sb_idx)
288 return true;
289
290 DP_VERBOSE(p_hwfn,
291 QED_MSG_IOV,
292 "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n",
293 p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
294
295 return false;
296}
297
Mintz, Yuvalf109c242017-03-19 13:08:16 +0200298static bool qed_iov_validate_active_rxq(struct qed_hwfn *p_hwfn,
299 struct qed_vf_info *p_vf)
300{
301 u8 i;
302
303 for (i = 0; i < p_vf->num_rxqs; i++)
304 if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
305 QED_IOV_VALIDATE_Q_ENABLE,
306 false))
307 return true;
308
309 return false;
310}
311
312static bool qed_iov_validate_active_txq(struct qed_hwfn *p_hwfn,
313 struct qed_vf_info *p_vf)
314{
315 u8 i;
316
317 for (i = 0; i < p_vf->num_txqs; i++)
318 if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
319 QED_IOV_VALIDATE_Q_ENABLE,
320 true))
321 return true;
322
323 return false;
324}
325
Baoyou Xieba569472016-09-09 09:21:15 +0800326static int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
327 int vfid, struct qed_ptt *p_ptt)
Yuval Mintz36558c32016-05-11 16:36:17 +0300328{
329 struct qed_bulletin_content *p_bulletin;
330 int crc_size = sizeof(p_bulletin->crc);
331 struct qed_dmae_params params;
332 struct qed_vf_info *p_vf;
333
334 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
335 if (!p_vf)
336 return -EINVAL;
337
338 if (!p_vf->vf_bulletin)
339 return -EINVAL;
340
341 p_bulletin = p_vf->bulletin.p_virt;
342
343 /* Increment bulletin board version and compute crc */
344 p_bulletin->version++;
345 p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
346 p_vf->bulletin.size - crc_size);
347
348 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
349 "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
350 p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
351
352 /* propagate bulletin board via dmae to vm memory */
353 memset(&params, 0, sizeof(params));
354 params.flags = QED_DMAE_FLAG_VF_DST;
355 params.dst_vfid = p_vf->abs_vf_id;
356 return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
357 p_vf->vf_bulletin, p_vf->bulletin.size / 4,
358 &params);
359}
360
Yuval Mintz32a47e72016-05-11 16:36:12 +0300361static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
362{
363 struct qed_hw_sriov_info *iov = cdev->p_iov_info;
364 int pos = iov->pos;
365
366 DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
367 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
368
369 pci_read_config_word(cdev->pdev,
370 pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
371 pci_read_config_word(cdev->pdev,
372 pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
373
374 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
375 if (iov->num_vfs) {
376 DP_VERBOSE(cdev,
377 QED_MSG_IOV,
378 "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
379 iov->num_vfs = 0;
380 }
381
382 pci_read_config_word(cdev->pdev,
383 pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
384
385 pci_read_config_word(cdev->pdev,
386 pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
387
388 pci_read_config_word(cdev->pdev,
389 pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
390
391 pci_read_config_dword(cdev->pdev,
392 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
393
394 pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
395
396 pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
397
398 DP_VERBOSE(cdev,
399 QED_MSG_IOV,
400 "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
401 iov->nres,
402 iov->cap,
403 iov->ctrl,
404 iov->total_vfs,
405 iov->initial_vfs,
406 iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
407
408 /* Some sanity checks */
409 if (iov->num_vfs > NUM_OF_VFS(cdev) ||
410 iov->total_vfs > NUM_OF_VFS(cdev)) {
411 /* This can happen only due to a bug. In this case we set
412 * num_vfs to zero to avoid memory corruption in the code that
413 * assumes max number of vfs
414 */
415 DP_NOTICE(cdev,
416 "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
417 iov->num_vfs);
418
419 iov->num_vfs = 0;
420 iov->total_vfs = 0;
421 }
422
423 return 0;
424}
425
Yuval Mintz32a47e72016-05-11 16:36:12 +0300426static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
427{
428 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
429 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
430 struct qed_bulletin_content *p_bulletin_virt;
431 dma_addr_t req_p, rply_p, bulletin_p;
432 union pfvf_tlvs *p_reply_virt_addr;
433 union vfpf_tlvs *p_req_virt_addr;
434 u8 idx = 0;
435
436 memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
437
438 p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
439 req_p = p_iov_info->mbx_msg_phys_addr;
440 p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
441 rply_p = p_iov_info->mbx_reply_phys_addr;
442 p_bulletin_virt = p_iov_info->p_bulletins;
443 bulletin_p = p_iov_info->bulletins_phys;
444 if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
445 DP_ERR(p_hwfn,
446 "qed_iov_setup_vfdb called without allocating mem first\n");
447 return;
448 }
449
450 for (idx = 0; idx < p_iov->total_vfs; idx++) {
451 struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
452 u32 concrete;
453
454 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
455 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
456 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
457 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
458
459 vf->state = VF_STOPPED;
460 vf->b_init = false;
461
462 vf->bulletin.phys = idx *
463 sizeof(struct qed_bulletin_content) +
464 bulletin_p;
465 vf->bulletin.p_virt = p_bulletin_virt + idx;
466 vf->bulletin.size = sizeof(struct qed_bulletin_content);
467
468 vf->relative_vf_id = idx;
469 vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
470 concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
471 vf->concrete_fid = concrete;
472 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
473 (vf->abs_vf_id << 8);
474 vf->vport_id = idx + 1;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +0300475
476 vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
477 vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
Yuval Mintz32a47e72016-05-11 16:36:12 +0300478 }
479}
480
481static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
482{
483 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
484 void **p_v_addr;
485 u16 num_vfs = 0;
486
487 num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
488
489 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
490 "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
491
492 /* Allocate PF Mailbox buffer (per-VF) */
493 p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
494 p_v_addr = &p_iov_info->mbx_msg_virt_addr;
495 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
496 p_iov_info->mbx_msg_size,
497 &p_iov_info->mbx_msg_phys_addr,
498 GFP_KERNEL);
499 if (!*p_v_addr)
500 return -ENOMEM;
501
502 /* Allocate PF Mailbox Reply buffer (per-VF) */
503 p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
504 p_v_addr = &p_iov_info->mbx_reply_virt_addr;
505 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
506 p_iov_info->mbx_reply_size,
507 &p_iov_info->mbx_reply_phys_addr,
508 GFP_KERNEL);
509 if (!*p_v_addr)
510 return -ENOMEM;
511
512 p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
513 num_vfs;
514 p_v_addr = &p_iov_info->p_bulletins;
515 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
516 p_iov_info->bulletins_size,
517 &p_iov_info->bulletins_phys,
518 GFP_KERNEL);
519 if (!*p_v_addr)
520 return -ENOMEM;
521
522 DP_VERBOSE(p_hwfn,
523 QED_MSG_IOV,
524 "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
525 p_iov_info->mbx_msg_virt_addr,
526 (u64) p_iov_info->mbx_msg_phys_addr,
527 p_iov_info->mbx_reply_virt_addr,
528 (u64) p_iov_info->mbx_reply_phys_addr,
529 p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
530
531 return 0;
532}
533
534static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
535{
536 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
537
538 if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
539 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
540 p_iov_info->mbx_msg_size,
541 p_iov_info->mbx_msg_virt_addr,
542 p_iov_info->mbx_msg_phys_addr);
543
544 if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
545 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
546 p_iov_info->mbx_reply_size,
547 p_iov_info->mbx_reply_virt_addr,
548 p_iov_info->mbx_reply_phys_addr);
549
550 if (p_iov_info->p_bulletins)
551 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
552 p_iov_info->bulletins_size,
553 p_iov_info->p_bulletins,
554 p_iov_info->bulletins_phys);
555}
556
557int qed_iov_alloc(struct qed_hwfn *p_hwfn)
558{
559 struct qed_pf_iov *p_sriov;
560
561 if (!IS_PF_SRIOV(p_hwfn)) {
562 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
563 "No SR-IOV - no need for IOV db\n");
564 return 0;
565 }
566
567 p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700568 if (!p_sriov)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300569 return -ENOMEM;
Yuval Mintz32a47e72016-05-11 16:36:12 +0300570
571 p_hwfn->pf_iov_info = p_sriov;
572
Michal Kalderon6c9e80e2017-06-20 16:00:06 +0300573 qed_spq_register_async_cb(p_hwfn, PROTOCOLID_COMMON,
574 qed_sriov_eqe_event);
575
Yuval Mintz32a47e72016-05-11 16:36:12 +0300576 return qed_iov_allocate_vfdb(p_hwfn);
577}
578
Mintz, Yuval1ee240e2017-06-01 15:29:11 +0300579void qed_iov_setup(struct qed_hwfn *p_hwfn)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300580{
581 if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
582 return;
583
584 qed_iov_setup_vfdb(p_hwfn);
Yuval Mintz32a47e72016-05-11 16:36:12 +0300585}
586
587void qed_iov_free(struct qed_hwfn *p_hwfn)
588{
Michal Kalderon6c9e80e2017-06-20 16:00:06 +0300589 qed_spq_unregister_async_cb(p_hwfn, PROTOCOLID_COMMON);
590
Yuval Mintz32a47e72016-05-11 16:36:12 +0300591 if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
592 qed_iov_free_vfdb(p_hwfn);
593 kfree(p_hwfn->pf_iov_info);
594 }
595}
596
597void qed_iov_free_hw_info(struct qed_dev *cdev)
598{
599 kfree(cdev->p_iov_info);
600 cdev->p_iov_info = NULL;
601}
602
603int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
604{
605 struct qed_dev *cdev = p_hwfn->cdev;
606 int pos;
607 int rc;
608
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300609 if (IS_VF(p_hwfn->cdev))
610 return 0;
611
Yuval Mintz32a47e72016-05-11 16:36:12 +0300612 /* Learn the PCI configuration */
613 pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
614 PCI_EXT_CAP_ID_SRIOV);
615 if (!pos) {
616 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
617 return 0;
618 }
619
620 /* Allocate a new struct for IOV information */
621 cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
Joe Perches2591c282016-09-04 14:24:03 -0700622 if (!cdev->p_iov_info)
Yuval Mintz32a47e72016-05-11 16:36:12 +0300623 return -ENOMEM;
Joe Perches2591c282016-09-04 14:24:03 -0700624
Yuval Mintz32a47e72016-05-11 16:36:12 +0300625 cdev->p_iov_info->pos = pos;
626
627 rc = qed_iov_pci_cfg_info(cdev);
628 if (rc)
629 return rc;
630
631 /* We want PF IOV to be synonemous with the existance of p_iov_info;
632 * In case the capability is published but there are no VFs, simply
633 * de-allocate the struct.
634 */
635 if (!cdev->p_iov_info->total_vfs) {
636 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
637 "IOV capabilities, but no VFs are published\n");
638 kfree(cdev->p_iov_info);
639 cdev->p_iov_info = NULL;
640 return 0;
641 }
642
Mintz, Yuval9c79dda2017-03-14 16:23:54 +0200643 /* First VF index based on offset is tricky:
644 * - If ARI is supported [likely], offset - (16 - pf_id) would
645 * provide the number for eng0. 2nd engine Vfs would begin
646 * after the first engine's VFs.
647 * - If !ARI, VFs would start on next device.
648 * so offset - (256 - pf_id) would provide the number.
649 * Utilize the fact that (256 - pf_id) is achieved only by later
Joe Perches8ac1ed72017-05-08 15:57:56 -0700650 * to differentiate between the two.
Yuval Mintz32a47e72016-05-11 16:36:12 +0300651 */
Mintz, Yuval9c79dda2017-03-14 16:23:54 +0200652
653 if (p_hwfn->cdev->p_iov_info->offset < (256 - p_hwfn->abs_pf_id)) {
654 u32 first = p_hwfn->cdev->p_iov_info->offset +
655 p_hwfn->abs_pf_id - 16;
656
657 cdev->p_iov_info->first_vf_in_pf = first;
658
659 if (QED_PATH_ID(p_hwfn))
660 cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
661 } else {
662 u32 first = p_hwfn->cdev->p_iov_info->offset +
663 p_hwfn->abs_pf_id - 256;
664
665 cdev->p_iov_info->first_vf_in_pf = first;
666 }
Yuval Mintz32a47e72016-05-11 16:36:12 +0300667
668 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
669 "First VF in hwfn 0x%08x\n",
670 cdev->p_iov_info->first_vf_in_pf);
671
672 return 0;
673}
674
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400675bool _qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn,
676 int vfid, bool b_fail_malicious)
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300677{
678 /* Check PF supports sriov */
Yuval Mintzb0409fa2016-05-15 14:48:05 +0300679 if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
680 !IS_PF_SRIOV_ALLOC(p_hwfn))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300681 return false;
682
683 /* Check VF validity */
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400684 if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious))
Yuval Mintz37bff2b2016-05-11 16:36:13 +0300685 return false;
686
687 return true;
688}
689
Yuval Mintz7eff82b2016-10-14 05:19:22 -0400690bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
691{
692 return _qed_iov_pf_sanity_check(p_hwfn, vfid, true);
693}
694
Yuval Mintz0b55e272016-05-11 16:36:15 +0300695static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
696 u16 rel_vf_id, u8 to_disable)
697{
698 struct qed_vf_info *vf;
699 int i;
700
701 for_each_hwfn(cdev, i) {
702 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
703
704 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
705 if (!vf)
706 continue;
707
708 vf->to_disable = to_disable;
709 }
710}
711
Baoyou Xieba569472016-09-09 09:21:15 +0800712static void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
Yuval Mintz0b55e272016-05-11 16:36:15 +0300713{
714 u16 i;
715
716 if (!IS_QED_SRIOV(cdev))
717 return;
718
719 for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
720 qed_iov_set_vf_to_disable(cdev, i, to_disable);
721}
722
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300723static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
724 struct qed_ptt *p_ptt, u8 abs_vfid)
725{
726 qed_wr(p_hwfn, p_ptt,
727 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
728 1 << (abs_vfid & 0x1f));
729}
730
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300731static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
732 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
733{
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300734 int i;
735
736 /* Set VF masks and configuration - pretend */
737 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
738
739 qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
740
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300741 /* unpretend */
742 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
743
744 /* iterate over all queues, clear sb consumer */
Yuval Mintzb2b897e2016-05-15 14:48:06 +0300745 for (i = 0; i < vf->num_sbs; i++)
746 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
747 vf->igu_sbs[i],
748 vf->opaque_fid, true);
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300749}
750
Yuval Mintz0b55e272016-05-11 16:36:15 +0300751static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
752 struct qed_ptt *p_ptt,
753 struct qed_vf_info *vf, bool enable)
754{
755 u32 igu_vf_conf;
756
757 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
758
759 igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
760
761 if (enable)
762 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
763 else
764 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
765
766 qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
767
768 /* unpretend */
769 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
770}
771
Mintz, Yuval88072fd2017-05-29 09:53:08 +0300772static int
773qed_iov_enable_vf_access_msix(struct qed_hwfn *p_hwfn,
774 struct qed_ptt *p_ptt, u8 abs_vf_id, u8 num_sbs)
775{
776 u8 current_max = 0;
777 int i;
778
779 /* For AH onward, configuration is per-PF. Find maximum of all
780 * the currently enabled child VFs, and set the number to be that.
781 */
782 if (!QED_IS_BB(p_hwfn->cdev)) {
783 qed_for_each_vf(p_hwfn, i) {
784 struct qed_vf_info *p_vf;
785
786 p_vf = qed_iov_get_vf_info(p_hwfn, (u16)i, true);
787 if (!p_vf)
788 continue;
789
790 current_max = max_t(u8, current_max, p_vf->num_sbs);
791 }
792 }
793
794 if (num_sbs > current_max)
795 return qed_mcp_config_vf_msix(p_hwfn, p_ptt,
796 abs_vf_id, num_sbs);
797
798 return 0;
799}
800
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300801static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
802 struct qed_ptt *p_ptt,
803 struct qed_vf_info *vf)
804{
805 u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
806 int rc;
807
Mintz, Yuval4e9b2a62017-03-19 13:08:13 +0200808 /* It's possible VF was previously considered malicious -
809 * clear the indication even if we're only going to disable VF.
810 */
811 vf->b_malicious = false;
812
Yuval Mintz0b55e272016-05-11 16:36:15 +0300813 if (vf->to_disable)
814 return 0;
815
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300816 DP_VERBOSE(p_hwfn,
817 QED_MSG_IOV,
818 "Enable internal access for vf %x [abs %x]\n",
819 vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
820
821 qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
822
Yuval Mintzb2b897e2016-05-15 14:48:06 +0300823 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
824
Mintz, Yuval88072fd2017-05-29 09:53:08 +0300825 rc = qed_iov_enable_vf_access_msix(p_hwfn, p_ptt,
826 vf->abs_vf_id, vf->num_sbs);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300827 if (rc)
828 return rc;
829
830 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
831
832 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
833 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
834
835 qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
836 p_hwfn->hw_info.hw_mode);
837
838 /* unpretend */
839 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
840
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300841 vf->state = VF_FREE;
842
843 return rc;
844}
845
Yuval Mintz0b55e272016-05-11 16:36:15 +0300846/**
847 * @brief qed_iov_config_perm_table - configure the permission
848 * zone table.
849 * In E4, queue zone permission table size is 320x9. There
850 * are 320 VF queues for single engine device (256 for dual
851 * engine device), and each entry has the following format:
852 * {Valid, VF[7:0]}
853 * @param p_hwfn
854 * @param p_ptt
855 * @param vf
856 * @param enable
857 */
858static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
859 struct qed_ptt *p_ptt,
860 struct qed_vf_info *vf, u8 enable)
861{
862 u32 reg_addr, val;
863 u16 qzone_id = 0;
864 int qid;
865
866 for (qid = 0; qid < vf->num_rxqs; qid++) {
867 qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
868 &qzone_id);
869
870 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
Yuval Mintz1a635e42016-08-15 10:42:43 +0300871 val = enable ? (vf->abs_vf_id | BIT(8)) : 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300872 qed_wr(p_hwfn, p_ptt, reg_addr, val);
873 }
874}
875
Yuval Mintzdacd88d2016-05-11 16:36:16 +0300876static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
877 struct qed_ptt *p_ptt,
878 struct qed_vf_info *vf)
879{
880 /* Reset vf in IGU - interrupts are still disabled */
881 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
882
883 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
884
885 /* Permission Table */
886 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
887}
888
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300889static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
890 struct qed_ptt *p_ptt,
891 struct qed_vf_info *vf, u16 num_rx_queues)
892{
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300893 struct qed_igu_block *p_block;
894 struct cau_sb_entry sb_entry;
895 int qid = 0;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300896 u32 val = 0;
897
Mintz, Yuval726fdbe2017-06-01 15:29:06 +0300898 if (num_rx_queues > p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov)
899 num_rx_queues = p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov;
900 p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov -= num_rx_queues;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300901
902 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
903 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
904 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
905
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300906 for (qid = 0; qid < num_rx_queues; qid++) {
907 p_block = qed_get_igu_free_sb(p_hwfn, false);
908 vf->igu_sbs[qid] = p_block->igu_sb_id;
909 p_block->status &= ~QED_IGU_STATUS_FREE;
910 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300911
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300912 qed_wr(p_hwfn, p_ptt,
913 IGU_REG_MAPPING_MEMORY +
914 sizeof(u32) * p_block->igu_sb_id, val);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300915
Mintz, Yuval09b6b142017-06-01 15:29:08 +0300916 /* Configure igu sb in CAU which were marked valid */
917 qed_init_cau_sb_entry(p_hwfn, &sb_entry,
918 p_hwfn->rel_pf_id, vf->abs_vf_id, 1);
919 qed_dmae_host2grc(p_hwfn, p_ptt,
920 (u64)(uintptr_t)&sb_entry,
921 CAU_REG_SB_VAR_MEMORY +
922 p_block->igu_sb_id * sizeof(u64), 2, 0);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300923 }
924
925 vf->num_sbs = (u8) num_rx_queues;
926
927 return vf->num_sbs;
928}
929
Yuval Mintz0b55e272016-05-11 16:36:15 +0300930static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
931 struct qed_ptt *p_ptt,
932 struct qed_vf_info *vf)
933{
934 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
935 int idx, igu_id;
936 u32 addr, val;
937
938 /* Invalidate igu CAM lines and mark them as free */
939 for (idx = 0; idx < vf->num_sbs; idx++) {
940 igu_id = vf->igu_sbs[idx];
941 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
942
943 val = qed_rd(p_hwfn, p_ptt, addr);
944 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
945 qed_wr(p_hwfn, p_ptt, addr, val);
946
Mintz, Yuvald749dd02017-06-01 15:29:03 +0300947 p_info->entry[igu_id].status |= QED_IGU_STATUS_FREE;
Mintz, Yuval726fdbe2017-06-01 15:29:06 +0300948 p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov++;
Yuval Mintz0b55e272016-05-11 16:36:15 +0300949 }
950
951 vf->num_sbs = 0;
952}
953
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +0200954static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
955 u16 vfid,
956 struct qed_mcp_link_params *params,
957 struct qed_mcp_link_state *link,
958 struct qed_mcp_link_capabilities *p_caps)
959{
960 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
961 vfid,
962 false);
963 struct qed_bulletin_content *p_bulletin;
964
965 if (!p_vf)
966 return;
967
968 p_bulletin = p_vf->bulletin.p_virt;
969 p_bulletin->req_autoneg = params->speed.autoneg;
970 p_bulletin->req_adv_speed = params->speed.advertised_speeds;
971 p_bulletin->req_forced_speed = params->speed.forced_speed;
972 p_bulletin->req_autoneg_pause = params->pause.autoneg;
973 p_bulletin->req_forced_rx = params->pause.forced_rx;
974 p_bulletin->req_forced_tx = params->pause.forced_tx;
975 p_bulletin->req_loopback = params->loopback_mode;
976
977 p_bulletin->link_up = link->link_up;
978 p_bulletin->speed = link->speed;
979 p_bulletin->full_duplex = link->full_duplex;
980 p_bulletin->autoneg = link->an;
981 p_bulletin->autoneg_complete = link->an_complete;
982 p_bulletin->parallel_detection = link->parallel_detection;
983 p_bulletin->pfc_enabled = link->pfc_enabled;
984 p_bulletin->partner_adv_speed = link->partner_adv_speed;
985 p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
986 p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
987 p_bulletin->partner_adv_pause = link->partner_adv_pause;
988 p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
989
990 p_bulletin->capability_speed = p_caps->speed_capabilities;
991}
992
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300993static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
994 struct qed_ptt *p_ptt,
Mintz, Yuval3da7a372016-11-29 16:47:06 +0200995 struct qed_iov_vf_init_params *p_params)
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300996{
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +0200997 struct qed_mcp_link_capabilities link_caps;
998 struct qed_mcp_link_params link_params;
999 struct qed_mcp_link_state link_state;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001000 u8 num_of_vf_avaiable_chains = 0;
1001 struct qed_vf_info *vf = NULL;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001002 u16 qid, num_irqs;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001003 int rc = 0;
1004 u32 cids;
1005 u8 i;
1006
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001007 vf = qed_iov_get_vf_info(p_hwfn, p_params->rel_vf_id, false);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001008 if (!vf) {
1009 DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
1010 return -EINVAL;
1011 }
1012
1013 if (vf->b_init) {
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001014 DP_NOTICE(p_hwfn, "VF[%d] is already active.\n",
1015 p_params->rel_vf_id);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001016 return -EINVAL;
1017 }
1018
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001019 /* Perform sanity checking on the requested queue_id */
1020 for (i = 0; i < p_params->num_queues; i++) {
1021 u16 min_vf_qzone = FEAT_NUM(p_hwfn, QED_PF_L2_QUE);
1022 u16 max_vf_qzone = min_vf_qzone +
1023 FEAT_NUM(p_hwfn, QED_VF_L2_QUE) - 1;
1024
1025 qid = p_params->req_rx_queue[i];
1026 if (qid < min_vf_qzone || qid > max_vf_qzone) {
1027 DP_NOTICE(p_hwfn,
1028 "Can't enable Rx qid [%04x] for VF[%d]: qids [0x%04x,...,0x%04x] available\n",
1029 qid,
1030 p_params->rel_vf_id,
1031 min_vf_qzone, max_vf_qzone);
1032 return -EINVAL;
1033 }
1034
1035 qid = p_params->req_tx_queue[i];
1036 if (qid > max_vf_qzone) {
1037 DP_NOTICE(p_hwfn,
1038 "Can't enable Tx qid [%04x] for VF[%d]: max qid 0x%04x\n",
1039 qid, p_params->rel_vf_id, max_vf_qzone);
1040 return -EINVAL;
1041 }
1042
1043 /* If client *really* wants, Tx qid can be shared with PF */
1044 if (qid < min_vf_qzone)
1045 DP_VERBOSE(p_hwfn,
1046 QED_MSG_IOV,
1047 "VF[%d] is using PF qid [0x%04x] for Txq[0x%02x]\n",
1048 p_params->rel_vf_id, qid, i);
1049 }
1050
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001051 /* Limit number of queues according to number of CIDs */
1052 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
1053 DP_VERBOSE(p_hwfn,
1054 QED_MSG_IOV,
1055 "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001056 vf->relative_vf_id, p_params->num_queues, (u16)cids);
1057 num_irqs = min_t(u16, p_params->num_queues, ((u16)cids));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001058
1059 num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
1060 p_ptt,
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001061 vf, num_irqs);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001062 if (!num_of_vf_avaiable_chains) {
1063 DP_ERR(p_hwfn, "no available igu sbs\n");
1064 return -ENOMEM;
1065 }
1066
1067 /* Choose queue number and index ranges */
1068 vf->num_rxqs = num_of_vf_avaiable_chains;
1069 vf->num_txqs = num_of_vf_avaiable_chains;
1070
1071 for (i = 0; i < vf->num_rxqs; i++) {
Mintz, Yuval007bc372017-06-04 13:31:05 +03001072 struct qed_vf_queue *p_queue = &vf->vf_queues[i];
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001073
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001074 p_queue->fw_rx_qid = p_params->req_rx_queue[i];
1075 p_queue->fw_tx_qid = p_params->req_tx_queue[i];
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001076
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001077 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
Mintz, Yuval007bc372017-06-04 13:31:05 +03001078 "VF[%d] - Q[%d] SB %04x, qid [Rx %04x Tx %04x]\n",
1079 vf->relative_vf_id, i, vf->igu_sbs[i],
1080 p_queue->fw_rx_qid, p_queue->fw_tx_qid);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001081 }
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001082
Mintz, Yuval33b2fbd2017-02-20 22:43:36 +02001083 /* Update the link configuration in bulletin */
1084 memcpy(&link_params, qed_mcp_get_link_params(p_hwfn),
1085 sizeof(link_params));
1086 memcpy(&link_state, qed_mcp_get_link_state(p_hwfn), sizeof(link_state));
1087 memcpy(&link_caps, qed_mcp_get_link_capabilities(p_hwfn),
1088 sizeof(link_caps));
1089 qed_iov_set_link(p_hwfn, p_params->rel_vf_id,
1090 &link_params, &link_state, &link_caps);
1091
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001092 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
1093 if (!rc) {
1094 vf->b_init = true;
1095
1096 if (IS_LEAD_HWFN(p_hwfn))
1097 p_hwfn->cdev->p_iov_info->num_vfs++;
1098 }
1099
1100 return rc;
1101}
1102
Yuval Mintz0b55e272016-05-11 16:36:15 +03001103static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
1104 struct qed_ptt *p_ptt, u16 rel_vf_id)
1105{
Manish Chopra079d20a2016-05-15 14:48:07 +03001106 struct qed_mcp_link_capabilities caps;
1107 struct qed_mcp_link_params params;
1108 struct qed_mcp_link_state link;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001109 struct qed_vf_info *vf = NULL;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001110
1111 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
1112 if (!vf) {
1113 DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
1114 return -EINVAL;
1115 }
1116
Yuval Mintz36558c32016-05-11 16:36:17 +03001117 if (vf->bulletin.p_virt)
1118 memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
1119
1120 memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
1121
Manish Chopra079d20a2016-05-15 14:48:07 +03001122 /* Get the link configuration back in bulletin so
1123 * that when VFs are re-enabled they get the actual
1124 * link configuration.
1125 */
1126 memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
1127 memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
1128 memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
1129 qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
1130
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001131 /* Forget the VF's acquisition message */
1132 memset(&vf->acquire, 0, sizeof(vf->acquire));
Yuval Mintz0b55e272016-05-11 16:36:15 +03001133
1134 /* disablng interrupts and resetting permission table was done during
1135 * vf-close, however, we could get here without going through vf_close
1136 */
1137 /* Disable Interrupts for VF */
1138 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
1139
1140 /* Reset Permission table */
1141 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
1142
1143 vf->num_rxqs = 0;
1144 vf->num_txqs = 0;
1145 qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
1146
1147 if (vf->b_init) {
1148 vf->b_init = false;
1149
1150 if (IS_LEAD_HWFN(p_hwfn))
1151 p_hwfn->cdev->p_iov_info->num_vfs--;
1152 }
1153
1154 return 0;
1155}
1156
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001157static bool qed_iov_tlv_supported(u16 tlvtype)
1158{
1159 return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
1160}
1161
1162/* place a given tlv on the tlv buffer, continuing current tlv list */
1163void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
1164{
1165 struct channel_tlv *tl = (struct channel_tlv *)*offset;
1166
1167 tl->type = type;
1168 tl->length = length;
1169
1170 /* Offset should keep pointing to next TLV (the end of the last) */
1171 *offset += length;
1172
1173 /* Return a pointer to the start of the added tlv */
1174 return *offset - length;
1175}
1176
1177/* list the types and lengths of the tlvs on the buffer */
1178void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
1179{
1180 u16 i = 1, total_length = 0;
1181 struct channel_tlv *tlv;
1182
1183 do {
1184 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
1185
1186 /* output tlv */
1187 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1188 "TLV number %d: type %d, length %d\n",
1189 i, tlv->type, tlv->length);
1190
1191 if (tlv->type == CHANNEL_TLV_LIST_END)
1192 return;
1193
1194 /* Validate entry - protect against malicious VFs */
1195 if (!tlv->length) {
1196 DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
1197 return;
1198 }
1199
1200 total_length += tlv->length;
1201
1202 if (total_length >= sizeof(struct tlv_buffer_size)) {
1203 DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
1204 return;
1205 }
1206
1207 i++;
1208 } while (1);
1209}
1210
1211static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
1212 struct qed_ptt *p_ptt,
1213 struct qed_vf_info *p_vf,
1214 u16 length, u8 status)
1215{
1216 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
1217 struct qed_dmae_params params;
1218 u8 eng_vf_id;
1219
1220 mbx->reply_virt->default_resp.hdr.status = status;
1221
1222 qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
1223
1224 eng_vf_id = p_vf->abs_vf_id;
1225
1226 memset(&params, 0, sizeof(struct qed_dmae_params));
1227 params.flags = QED_DMAE_FLAG_VF_DST;
1228 params.dst_vfid = eng_vf_id;
1229
1230 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
1231 mbx->req_virt->first_tlv.reply_address +
1232 sizeof(u64),
1233 (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
1234 &params);
1235
Mintz, Yuvald9194082017-03-19 13:08:14 +02001236 /* Once PF copies the rc to the VF, the latter can continue
1237 * and send an additional message. So we have to make sure the
1238 * channel would be re-set to ready prior to that.
1239 */
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001240 REG_WR(p_hwfn,
1241 GTT_BAR0_MAP_REG_USDM_RAM +
1242 USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
Mintz, Yuvald9194082017-03-19 13:08:14 +02001243
1244 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
1245 mbx->req_virt->first_tlv.reply_address,
1246 sizeof(u64) / 4, &params);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001247}
1248
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001249static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
1250 enum qed_iov_vport_update_flag flag)
1251{
1252 switch (flag) {
1253 case QED_IOV_VP_UPDATE_ACTIVATE:
1254 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
Yuval Mintz17b235c2016-05-11 16:36:18 +03001255 case QED_IOV_VP_UPDATE_VLAN_STRIP:
1256 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1257 case QED_IOV_VP_UPDATE_TX_SWITCH:
1258 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001259 case QED_IOV_VP_UPDATE_MCAST:
1260 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
1261 case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
1262 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1263 case QED_IOV_VP_UPDATE_RSS:
1264 return CHANNEL_TLV_VPORT_UPDATE_RSS;
Yuval Mintz17b235c2016-05-11 16:36:18 +03001265 case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
1266 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1267 case QED_IOV_VP_UPDATE_SGE_TPA:
1268 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001269 default:
1270 return 0;
1271 }
1272}
1273
1274static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
1275 struct qed_vf_info *p_vf,
1276 struct qed_iov_vf_mbx *p_mbx,
1277 u8 status,
1278 u16 tlvs_mask, u16 tlvs_accepted)
1279{
1280 struct pfvf_def_resp_tlv *resp;
1281 u16 size, total_len, i;
1282
1283 memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
1284 p_mbx->offset = (u8 *)p_mbx->reply_virt;
1285 size = sizeof(struct pfvf_def_resp_tlv);
1286 total_len = size;
1287
1288 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
1289
1290 /* Prepare response for all extended tlvs if they are found by PF */
1291 for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
Yuval Mintz1a635e42016-08-15 10:42:43 +03001292 if (!(tlvs_mask & BIT(i)))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001293 continue;
1294
1295 resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
1296 qed_iov_vport_to_tlv(p_hwfn, i), size);
1297
Yuval Mintz1a635e42016-08-15 10:42:43 +03001298 if (tlvs_accepted & BIT(i))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001299 resp->hdr.status = status;
1300 else
1301 resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1302
1303 DP_VERBOSE(p_hwfn,
1304 QED_MSG_IOV,
1305 "VF[%d] - vport_update response: TLV %d, status %02x\n",
1306 p_vf->relative_vf_id,
1307 qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1308
1309 total_len += size;
1310 }
1311
1312 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1313 sizeof(struct channel_list_end_tlv));
1314
1315 return total_len;
1316}
1317
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001318static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
1319 struct qed_ptt *p_ptt,
1320 struct qed_vf_info *vf_info,
1321 u16 type, u16 length, u8 status)
1322{
1323 struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1324
1325 mbx->offset = (u8 *)mbx->reply_virt;
1326
1327 qed_add_tlv(p_hwfn, &mbx->offset, type, length);
1328 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1329 sizeof(struct channel_list_end_tlv));
1330
1331 qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1332}
1333
Baoyou Xieba569472016-09-09 09:21:15 +08001334static struct
1335qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
1336 u16 relative_vf_id,
1337 bool b_enabled_only)
Yuval Mintz0b55e272016-05-11 16:36:15 +03001338{
1339 struct qed_vf_info *vf = NULL;
1340
1341 vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
1342 if (!vf)
1343 return NULL;
1344
1345 return &vf->p_vf_info;
1346}
1347
Baoyou Xieba569472016-09-09 09:21:15 +08001348static void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
Yuval Mintz0b55e272016-05-11 16:36:15 +03001349{
1350 struct qed_public_vf_info *vf_info;
1351
1352 vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
1353
1354 if (!vf_info)
1355 return;
1356
1357 /* Clear the VF mac */
Shyam Saini0ee28e32017-01-17 07:35:04 +05301358 eth_zero_addr(vf_info->mac);
Mintz, Yuvalf990c822017-01-01 13:57:08 +02001359
1360 vf_info->rx_accept_mode = 0;
1361 vf_info->tx_accept_mode = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001362}
1363
1364static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
1365 struct qed_vf_info *p_vf)
1366{
Mintz, Yuval007bc372017-06-04 13:31:05 +03001367 u32 i, j;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001368
1369 p_vf->vf_bulletin = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001370 p_vf->vport_instance = 0;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001371 p_vf->configured_features = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03001372
1373 /* If VF previously requested less resources, go back to default */
1374 p_vf->num_rxqs = p_vf->num_sbs;
1375 p_vf->num_txqs = p_vf->num_sbs;
1376
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001377 p_vf->num_active_rxqs = 0;
1378
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001379 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
Mintz, Yuval007bc372017-06-04 13:31:05 +03001380 struct qed_vf_queue *p_queue = &p_vf->vf_queues[i];
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001381
Mintz, Yuval007bc372017-06-04 13:31:05 +03001382 for (j = 0; j < MAX_QUEUES_PER_QZONE; j++) {
1383 if (!p_queue->cids[j].p_cid)
1384 continue;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001385
Mintz, Yuval007bc372017-06-04 13:31:05 +03001386 qed_eth_queue_cid_release(p_hwfn,
1387 p_queue->cids[j].p_cid);
1388 p_queue->cids[j].p_cid = NULL;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001389 }
1390 }
Yuval Mintz0b55e272016-05-11 16:36:15 +03001391
Yuval Mintz08feecd2016-05-11 16:36:20 +03001392 memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001393 memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
Yuval Mintz0b55e272016-05-11 16:36:15 +03001394 qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
1395}
1396
Mintz, Yuval1a850bf2017-06-04 13:31:07 +03001397/* Returns either 0, or log(size) */
1398static u32 qed_iov_vf_db_bar_size(struct qed_hwfn *p_hwfn,
1399 struct qed_ptt *p_ptt)
1400{
1401 u32 val = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_VF_BAR1_SIZE);
1402
1403 if (val)
1404 return val + 11;
1405 return 0;
1406}
1407
1408static void
1409qed_iov_vf_mbx_acquire_resc_cids(struct qed_hwfn *p_hwfn,
1410 struct qed_ptt *p_ptt,
1411 struct qed_vf_info *p_vf,
1412 struct vf_pf_resc_request *p_req,
1413 struct pf_vf_resc *p_resp)
1414{
1415 u8 num_vf_cons = p_hwfn->pf_params.eth_pf_params.num_vf_cons;
1416 u8 db_size = qed_db_addr_vf(1, DQ_DEMS_LEGACY) -
1417 qed_db_addr_vf(0, DQ_DEMS_LEGACY);
1418 u32 bar_size;
1419
1420 p_resp->num_cids = min_t(u8, p_req->num_cids, num_vf_cons);
1421
1422 /* If VF didn't bother asking for QIDs than don't bother limiting
1423 * number of CIDs. The VF doesn't care about the number, and this
1424 * has the likely result of causing an additional acquisition.
1425 */
1426 if (!(p_vf->acquire.vfdev_info.capabilities &
1427 VFPF_ACQUIRE_CAP_QUEUE_QIDS))
1428 return;
1429
1430 /* If doorbell bar was mapped by VF, limit the VF CIDs to an amount
1431 * that would make sure doorbells for all CIDs fall within the bar.
1432 * If it doesn't, make sure regview window is sufficient.
1433 */
1434 if (p_vf->acquire.vfdev_info.capabilities &
1435 VFPF_ACQUIRE_CAP_PHYSICAL_BAR) {
1436 bar_size = qed_iov_vf_db_bar_size(p_hwfn, p_ptt);
1437 if (bar_size)
1438 bar_size = 1 << bar_size;
1439
1440 if (p_hwfn->cdev->num_hwfns > 1)
1441 bar_size /= 2;
1442 } else {
1443 bar_size = PXP_VF_BAR0_DQ_LENGTH;
1444 }
1445
1446 if (bar_size / db_size < 256)
1447 p_resp->num_cids = min_t(u8, p_resp->num_cids,
1448 (u8)(bar_size / db_size));
1449}
1450
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001451static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
1452 struct qed_ptt *p_ptt,
1453 struct qed_vf_info *p_vf,
1454 struct vf_pf_resc_request *p_req,
1455 struct pf_vf_resc *p_resp)
1456{
Mintz, Yuval007bc372017-06-04 13:31:05 +03001457 u8 i;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001458
1459 /* Queue related information */
1460 p_resp->num_rxqs = p_vf->num_rxqs;
1461 p_resp->num_txqs = p_vf->num_txqs;
1462 p_resp->num_sbs = p_vf->num_sbs;
1463
1464 for (i = 0; i < p_resp->num_sbs; i++) {
1465 p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
1466 p_resp->hw_sbs[i].sb_qid = 0;
1467 }
1468
1469 /* These fields are filled for backward compatibility.
1470 * Unused by modern vfs.
1471 */
1472 for (i = 0; i < p_resp->num_rxqs; i++) {
1473 qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
1474 (u16 *)&p_resp->hw_qid[i]);
Mintz, Yuval007bc372017-06-04 13:31:05 +03001475 p_resp->cid[i] = i;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001476 }
1477
1478 /* Filter related information */
1479 p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
1480 p_req->num_mac_filters);
1481 p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
1482 p_req->num_vlan_filters);
1483
Mintz, Yuval1a850bf2017-06-04 13:31:07 +03001484 qed_iov_vf_mbx_acquire_resc_cids(p_hwfn, p_ptt, p_vf, p_req, p_resp);
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03001485
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001486 /* This isn't really needed/enforced, but some legacy VFs might depend
1487 * on the correct filling of this field.
1488 */
1489 p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
1490
1491 /* Validate sufficient resources for VF */
1492 if (p_resp->num_rxqs < p_req->num_rxqs ||
1493 p_resp->num_txqs < p_req->num_txqs ||
1494 p_resp->num_sbs < p_req->num_sbs ||
1495 p_resp->num_mac_filters < p_req->num_mac_filters ||
1496 p_resp->num_vlan_filters < p_req->num_vlan_filters ||
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03001497 p_resp->num_mc_filters < p_req->num_mc_filters ||
1498 p_resp->num_cids < p_req->num_cids) {
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001499 DP_VERBOSE(p_hwfn,
1500 QED_MSG_IOV,
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03001501 "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x] cids [%02x/%02x]\n",
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001502 p_vf->abs_vf_id,
1503 p_req->num_rxqs,
1504 p_resp->num_rxqs,
1505 p_req->num_rxqs,
1506 p_resp->num_txqs,
1507 p_req->num_sbs,
1508 p_resp->num_sbs,
1509 p_req->num_mac_filters,
1510 p_resp->num_mac_filters,
1511 p_req->num_vlan_filters,
1512 p_resp->num_vlan_filters,
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03001513 p_req->num_mc_filters,
1514 p_resp->num_mc_filters,
1515 p_req->num_cids, p_resp->num_cids);
Yuval Mintza044df82016-08-22 13:25:09 +03001516
1517 /* Some legacy OSes are incapable of correctly handling this
1518 * failure.
1519 */
1520 if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1521 ETH_HSI_VER_NO_PKT_LEN_TUNN) &&
1522 (p_vf->acquire.vfdev_info.os_type ==
1523 VFPF_ACQUIRE_OS_WINDOWS))
1524 return PFVF_STATUS_SUCCESS;
1525
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001526 return PFVF_STATUS_NO_RESOURCE;
1527 }
1528
1529 return PFVF_STATUS_SUCCESS;
1530}
1531
1532static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
1533 struct pfvf_stats_info *p_stats)
1534{
1535 p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
1536 offsetof(struct mstorm_vf_zone,
1537 non_trigger.eth_queue_stat);
1538 p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
1539 p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
1540 offsetof(struct ustorm_vf_zone,
1541 non_trigger.eth_queue_stat);
1542 p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
1543 p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
1544 offsetof(struct pstorm_vf_zone,
1545 non_trigger.eth_queue_stat);
1546 p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
1547 p_stats->tstats.address = 0;
1548 p_stats->tstats.len = 0;
1549}
1550
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001551static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
1552 struct qed_ptt *p_ptt,
1553 struct qed_vf_info *vf)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001554{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001555 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1556 struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1557 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1558 struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001559 u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001560 struct pf_vf_resc *resc = &resp->resc;
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001561 int rc;
1562
1563 memset(resp, 0, sizeof(*resp));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001564
Yuval Mintz05fafbf2016-08-19 09:33:31 +03001565 /* Write the PF version so that VF would know which version
1566 * is supported - might be later overriden. This guarantees that
1567 * VF could recognize legacy PF based on lack of versions in reply.
1568 */
1569 pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
1570 pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
1571
Yuval Mintza044df82016-08-22 13:25:09 +03001572 if (vf->state != VF_FREE && vf->state != VF_STOPPED) {
1573 DP_VERBOSE(p_hwfn,
1574 QED_MSG_IOV,
1575 "VF[%d] sent ACQUIRE but is already in state %d - fail request\n",
1576 vf->abs_vf_id, vf->state);
1577 goto out;
1578 }
1579
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001580 /* Validate FW compatibility */
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001581 if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
Yuval Mintza044df82016-08-22 13:25:09 +03001582 if (req->vfdev_info.capabilities &
1583 VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
1584 struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info;
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001585
Yuval Mintza044df82016-08-22 13:25:09 +03001586 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1587 "VF[%d] is pre-fastpath HSI\n",
1588 vf->abs_vf_id);
1589 p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
1590 p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN;
1591 } else {
1592 DP_INFO(p_hwfn,
1593 "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
1594 vf->abs_vf_id,
1595 req->vfdev_info.eth_fp_hsi_major,
1596 req->vfdev_info.eth_fp_hsi_minor,
1597 ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
1598
1599 goto out;
1600 }
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001601 }
1602
1603 /* On 100g PFs, prevent old VFs from loading */
1604 if ((p_hwfn->cdev->num_hwfns > 1) &&
1605 !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
1606 DP_INFO(p_hwfn,
1607 "VF[%d] is running an old driver that doesn't support 100g\n",
1608 vf->abs_vf_id);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001609 goto out;
1610 }
1611
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001612 /* Store the acquire message */
1613 memcpy(&vf->acquire, req, sizeof(vf->acquire));
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001614
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001615 vf->opaque_fid = req->vfdev_info.opaque_fid;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001616
1617 vf->vf_bulletin = req->bulletin_addr;
1618 vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1619 vf->bulletin.size : req->bulletin_size;
1620
1621 /* fill in pfdev info */
1622 pfdev_info->chip_num = p_hwfn->cdev->chip_num;
1623 pfdev_info->db_size = 0;
1624 pfdev_info->indices_per_sb = PIS_PER_SB;
1625
1626 pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
1627 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
1628 if (p_hwfn->cdev->num_hwfns > 1)
1629 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
1630
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03001631 /* Share our ability to use multiple queue-ids only with VFs
1632 * that request it.
1633 */
1634 if (req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_QUEUE_QIDS)
1635 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_QUEUE_QIDS;
1636
Mintz, Yuval1a850bf2017-06-04 13:31:07 +03001637 /* Share the sizes of the bars with VF */
1638 resp->pfdev_info.bar_size = qed_iov_vf_db_bar_size(p_hwfn, p_ptt);
1639
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001640 qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001641
1642 memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1643
1644 pfdev_info->fw_major = FW_MAJOR_VERSION;
1645 pfdev_info->fw_minor = FW_MINOR_VERSION;
1646 pfdev_info->fw_rev = FW_REVISION_VERSION;
1647 pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
Yuval Mintza044df82016-08-22 13:25:09 +03001648
1649 /* Incorrect when legacy, but doesn't matter as legacy isn't reading
1650 * this field.
1651 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03001652 pfdev_info->minor_fp_hsi = min_t(u8, ETH_HSI_VER_MINOR,
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001653 req->vfdev_info.eth_fp_hsi_minor);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001654 pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
1655 qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
1656
1657 pfdev_info->dev_type = p_hwfn->cdev->type;
1658 pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
1659
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001660 /* Fill resources available to VF; Make sure there are enough to
1661 * satisfy the VF's request.
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001662 */
Yuval Mintz1cf2b1a2016-06-05 13:11:12 +03001663 vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
1664 &req->resc_request, resc);
1665 if (vfpf_status != PFVF_STATUS_SUCCESS)
1666 goto out;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001667
Yuval Mintz1fe614d2016-06-05 13:11:11 +03001668 /* Start the VF in FW */
1669 rc = qed_sp_vf_start(p_hwfn, vf);
1670 if (rc) {
1671 DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
1672 vfpf_status = PFVF_STATUS_FAILURE;
1673 goto out;
1674 }
1675
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001676 /* Fill agreed size of bulletin board in response */
1677 resp->bulletin_size = vf->bulletin.size;
Yuval Mintz36558c32016-05-11 16:36:17 +03001678 qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03001679
1680 DP_VERBOSE(p_hwfn,
1681 QED_MSG_IOV,
1682 "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
1683 "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
1684 vf->abs_vf_id,
1685 resp->pfdev_info.chip_num,
1686 resp->pfdev_info.db_size,
1687 resp->pfdev_info.indices_per_sb,
1688 resp->pfdev_info.capabilities,
1689 resc->num_rxqs,
1690 resc->num_txqs,
1691 resc->num_sbs,
1692 resc->num_mac_filters,
1693 resc->num_vlan_filters);
1694 vf->state = VF_ACQUIRED;
1695
1696 /* Prepare Response */
1697out:
1698 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1699 sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03001700}
1701
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001702static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
1703 struct qed_vf_info *p_vf, bool val)
1704{
1705 struct qed_sp_vport_update_params params;
1706 int rc;
1707
1708 if (val == p_vf->spoof_chk) {
1709 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1710 "Spoofchk value[%d] is already configured\n", val);
1711 return 0;
1712 }
1713
1714 memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
1715 params.opaque_fid = p_vf->opaque_fid;
1716 params.vport_id = p_vf->vport_id;
1717 params.update_anti_spoofing_en_flg = 1;
1718 params.anti_spoofing_en = val;
1719
1720 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
Yuval Mintzcb1fa082016-07-27 14:45:20 +03001721 if (!rc) {
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001722 p_vf->spoof_chk = val;
1723 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1724 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1725 "Spoofchk val[%d] configured\n", val);
1726 } else {
1727 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1728 "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1729 val, p_vf->relative_vf_id);
1730 }
1731
1732 return rc;
1733}
1734
Yuval Mintz08feecd2016-05-11 16:36:20 +03001735static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
1736 struct qed_vf_info *p_vf)
1737{
1738 struct qed_filter_ucast filter;
1739 int rc = 0;
1740 int i;
1741
1742 memset(&filter, 0, sizeof(filter));
1743 filter.is_rx_filter = 1;
1744 filter.is_tx_filter = 1;
1745 filter.vport_to_add_to = p_vf->vport_id;
1746 filter.opcode = QED_FILTER_ADD;
1747
1748 /* Reconfigure vlans */
1749 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1750 if (!p_vf->shadow_config.vlans[i].used)
1751 continue;
1752
1753 filter.type = QED_FILTER_VLAN;
1754 filter.vlan = p_vf->shadow_config.vlans[i].vid;
Yuval Mintz1a635e42016-08-15 10:42:43 +03001755 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
Yuval Mintz08feecd2016-05-11 16:36:20 +03001756 "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
1757 filter.vlan, p_vf->relative_vf_id);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001758 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1759 &filter, QED_SPQ_MODE_CB, NULL);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001760 if (rc) {
1761 DP_NOTICE(p_hwfn,
1762 "Failed to configure VLAN [%04x] to VF [%04x]\n",
1763 filter.vlan, p_vf->relative_vf_id);
1764 break;
1765 }
1766 }
1767
1768 return rc;
1769}
1770
1771static int
1772qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
1773 struct qed_vf_info *p_vf, u64 events)
1774{
1775 int rc = 0;
1776
Yuval Mintz1a635e42016-08-15 10:42:43 +03001777 if ((events & BIT(VLAN_ADDR_FORCED)) &&
Yuval Mintz08feecd2016-05-11 16:36:20 +03001778 !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1779 rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1780
1781 return rc;
1782}
1783
1784static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
1785 struct qed_vf_info *p_vf, u64 events)
1786{
1787 int rc = 0;
1788 struct qed_filter_ucast filter;
1789
1790 if (!p_vf->vport_instance)
1791 return -EINVAL;
1792
Yuval Mintz1a635e42016-08-15 10:42:43 +03001793 if (events & BIT(MAC_ADDR_FORCED)) {
Yuval Mintzeff16962016-05-11 16:36:21 +03001794 /* Since there's no way [currently] of removing the MAC,
1795 * we can always assume this means we need to force it.
1796 */
1797 memset(&filter, 0, sizeof(filter));
1798 filter.type = QED_FILTER_MAC;
1799 filter.opcode = QED_FILTER_REPLACE;
1800 filter.is_rx_filter = 1;
1801 filter.is_tx_filter = 1;
1802 filter.vport_to_add_to = p_vf->vport_id;
1803 ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
1804
1805 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1806 &filter, QED_SPQ_MODE_CB, NULL);
1807 if (rc) {
1808 DP_NOTICE(p_hwfn,
1809 "PF failed to configure MAC for VF\n");
1810 return rc;
1811 }
1812
1813 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1814 }
1815
Yuval Mintz1a635e42016-08-15 10:42:43 +03001816 if (events & BIT(VLAN_ADDR_FORCED)) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03001817 struct qed_sp_vport_update_params vport_update;
1818 u8 removal;
1819 int i;
1820
1821 memset(&filter, 0, sizeof(filter));
1822 filter.type = QED_FILTER_VLAN;
1823 filter.is_rx_filter = 1;
1824 filter.is_tx_filter = 1;
1825 filter.vport_to_add_to = p_vf->vport_id;
1826 filter.vlan = p_vf->bulletin.p_virt->pvid;
1827 filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
1828 QED_FILTER_FLUSH;
1829
1830 /* Send the ramrod */
1831 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1832 &filter, QED_SPQ_MODE_CB, NULL);
1833 if (rc) {
1834 DP_NOTICE(p_hwfn,
1835 "PF failed to configure VLAN for VF\n");
1836 return rc;
1837 }
1838
1839 /* Update the default-vlan & silent vlan stripping */
1840 memset(&vport_update, 0, sizeof(vport_update));
1841 vport_update.opaque_fid = p_vf->opaque_fid;
1842 vport_update.vport_id = p_vf->vport_id;
1843 vport_update.update_default_vlan_enable_flg = 1;
1844 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1845 vport_update.update_default_vlan_flg = 1;
1846 vport_update.default_vlan = filter.vlan;
1847
1848 vport_update.update_inner_vlan_removal_flg = 1;
1849 removal = filter.vlan ? 1
1850 : p_vf->shadow_config.inner_vlan_removal;
1851 vport_update.inner_vlan_removal_flg = removal;
1852 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1853 rc = qed_sp_vport_update(p_hwfn,
1854 &vport_update,
1855 QED_SPQ_MODE_EBLOCK, NULL);
1856 if (rc) {
1857 DP_NOTICE(p_hwfn,
1858 "PF failed to configure VF vport for vlan\n");
1859 return rc;
1860 }
1861
1862 /* Update all the Rx queues */
1863 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
Mintz, Yuval007bc372017-06-04 13:31:05 +03001864 struct qed_vf_queue *p_queue = &p_vf->vf_queues[i];
1865 struct qed_queue_cid *p_cid = NULL;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001866
Mintz, Yuval007bc372017-06-04 13:31:05 +03001867 /* There can be at most 1 Rx queue on qzone. Find it */
1868 p_cid = qed_iov_get_vf_rx_queue_cid(p_queue);
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001869 if (!p_cid)
Yuval Mintz08feecd2016-05-11 16:36:20 +03001870 continue;
1871
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001872 rc = qed_sp_eth_rx_queues_update(p_hwfn,
1873 (void **)&p_cid,
Yuval Mintz08feecd2016-05-11 16:36:20 +03001874 1, 0, 1,
1875 QED_SPQ_MODE_EBLOCK,
1876 NULL);
1877 if (rc) {
1878 DP_NOTICE(p_hwfn,
1879 "Failed to send Rx update fo queue[0x%04x]\n",
Mintz, Yuval3da7a372016-11-29 16:47:06 +02001880 p_cid->rel.queue_id);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001881 return rc;
1882 }
1883 }
1884
1885 if (filter.vlan)
1886 p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1887 else
Yuval Mintz1a635e42016-08-15 10:42:43 +03001888 p_vf->configured_features &= ~BIT(VLAN_ADDR_FORCED);
Yuval Mintz08feecd2016-05-11 16:36:20 +03001889 }
1890
1891 /* If forced features are terminated, we need to configure the shadow
1892 * configuration back again.
1893 */
1894 if (events)
1895 qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1896
1897 return rc;
1898}
1899
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001900static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
1901 struct qed_ptt *p_ptt,
1902 struct qed_vf_info *vf)
1903{
1904 struct qed_sp_vport_start_params params = { 0 };
1905 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1906 struct vfpf_vport_start_tlv *start;
1907 u8 status = PFVF_STATUS_SUCCESS;
1908 struct qed_vf_info *vf_info;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001909 u64 *p_bitmap;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001910 int sb_id;
1911 int rc;
1912
1913 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
1914 if (!vf_info) {
1915 DP_NOTICE(p_hwfn->cdev,
1916 "Failed to get VF info, invalid vfid [%d]\n",
1917 vf->relative_vf_id);
1918 return;
1919 }
1920
1921 vf->state = VF_ENABLED;
1922 start = &mbx->req_virt->start_vport;
1923
Mintz, Yuvalb801b152017-03-19 13:08:15 +02001924 qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1925
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001926 /* Initialize Status block in CAU */
1927 for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1928 if (!start->sb_addr[sb_id]) {
1929 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1930 "VF[%d] did not fill the address of SB %d\n",
1931 vf->relative_vf_id, sb_id);
1932 break;
1933 }
1934
1935 qed_int_cau_conf_sb(p_hwfn, p_ptt,
1936 start->sb_addr[sb_id],
Yuval Mintz1a635e42016-08-15 10:42:43 +03001937 vf->igu_sbs[sb_id], vf->abs_vf_id, 1);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001938 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001939
1940 vf->mtu = start->mtu;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001941 vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1942
1943 /* Take into consideration configuration forced by hypervisor;
1944 * If none is configured, use the supplied VF values [for old
1945 * vfs that would still be fine, since they passed '0' as padding].
1946 */
1947 p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
Yuval Mintz1a635e42016-08-15 10:42:43 +03001948 if (!(*p_bitmap & BIT(VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03001949 u8 vf_req = start->only_untagged;
1950
1951 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1952 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1953 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001954
1955 params.tpa_mode = start->tpa_mode;
1956 params.remove_inner_vlan = start->inner_vlan_removal;
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03001957 params.tx_switching = true;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001958
Yuval Mintz08feecd2016-05-11 16:36:20 +03001959 params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001960 params.drop_ttl0 = false;
1961 params.concrete_fid = vf->concrete_fid;
1962 params.opaque_fid = vf->opaque_fid;
1963 params.vport_id = vf->vport_id;
1964 params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1965 params.mtu = vf->mtu;
Yuval Mintz11a85d72016-08-22 13:25:10 +03001966 params.check_mac = true;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001967
1968 rc = qed_sp_eth_vport_start(p_hwfn, &params);
Yuval Mintz1a635e42016-08-15 10:42:43 +03001969 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001970 DP_ERR(p_hwfn,
1971 "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
1972 status = PFVF_STATUS_FAILURE;
1973 } else {
1974 vf->vport_instance++;
Yuval Mintz08feecd2016-05-11 16:36:20 +03001975
1976 /* Force configuration if needed on the newly opened vport */
1977 qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001978
1979 __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001980 }
1981 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1982 sizeof(struct pfvf_def_resp_tlv), status);
1983}
1984
1985static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
1986 struct qed_ptt *p_ptt,
1987 struct qed_vf_info *vf)
1988{
1989 u8 status = PFVF_STATUS_SUCCESS;
1990 int rc;
1991
1992 vf->vport_instance--;
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001993 vf->spoof_chk = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03001994
Mintz, Yuvalf109c242017-03-19 13:08:16 +02001995 if ((qed_iov_validate_active_rxq(p_hwfn, vf)) ||
1996 (qed_iov_validate_active_txq(p_hwfn, vf))) {
1997 vf->b_malicious = true;
1998 DP_NOTICE(p_hwfn,
1999 "VF [%02x] - considered malicious; Unable to stop RX/TX queuess\n",
2000 vf->abs_vf_id);
2001 status = PFVF_STATUS_MALICIOUS;
2002 goto out;
2003 }
2004
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002005 rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
Yuval Mintz1a635e42016-08-15 10:42:43 +03002006 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002007 DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
2008 rc);
2009 status = PFVF_STATUS_FAILURE;
2010 }
2011
Yuval Mintz08feecd2016-05-11 16:36:20 +03002012 /* Forget the configuration on the vport */
2013 vf->configured_features = 0;
2014 memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
2015
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002016out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002017 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
2018 sizeof(struct pfvf_def_resp_tlv), status);
2019}
2020
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002021static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
2022 struct qed_ptt *p_ptt,
Yuval Mintza044df82016-08-22 13:25:09 +03002023 struct qed_vf_info *vf,
2024 u8 status, bool b_legacy)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002025{
2026 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2027 struct pfvf_start_queue_resp_tlv *p_tlv;
2028 struct vfpf_start_rxq_tlv *req;
Yuval Mintza044df82016-08-22 13:25:09 +03002029 u16 length;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002030
2031 mbx->offset = (u8 *)mbx->reply_virt;
2032
Yuval Mintza044df82016-08-22 13:25:09 +03002033 /* Taking a bigger struct instead of adding a TLV to list was a
2034 * mistake, but one which we're now stuck with, as some older
2035 * clients assume the size of the previous response.
2036 */
2037 if (!b_legacy)
2038 length = sizeof(*p_tlv);
2039 else
2040 length = sizeof(struct pfvf_def_resp_tlv);
2041
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002042 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
Yuval Mintza044df82016-08-22 13:25:09 +03002043 length);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002044 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2045 sizeof(struct channel_list_end_tlv));
2046
2047 /* Update the TLV with the response */
Yuval Mintza044df82016-08-22 13:25:09 +03002048 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002049 req = &mbx->req_virt->start_rxq;
Yuval Mintz351a4ded2016-06-02 10:23:29 +03002050 p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
2051 offsetof(struct mstorm_vf_zone,
2052 non_trigger.eth_rx_queue_producers) +
2053 sizeof(struct eth_rx_prod_data) * req->rx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002054 }
2055
Yuval Mintza044df82016-08-22 13:25:09 +03002056 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002057}
2058
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002059static u8 qed_iov_vf_mbx_qid(struct qed_hwfn *p_hwfn,
2060 struct qed_vf_info *p_vf, bool b_is_tx)
2061{
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002062 struct qed_iov_vf_mbx *p_mbx = &p_vf->vf_mbx;
2063 struct vfpf_qid_tlv *p_qid_tlv;
2064
2065 /* Search for the qid if the VF published its going to provide it */
2066 if (!(p_vf->acquire.vfdev_info.capabilities &
2067 VFPF_ACQUIRE_CAP_QUEUE_QIDS)) {
2068 if (b_is_tx)
2069 return QED_IOV_LEGACY_QID_TX;
2070 else
2071 return QED_IOV_LEGACY_QID_RX;
2072 }
2073
2074 p_qid_tlv = (struct vfpf_qid_tlv *)
2075 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2076 CHANNEL_TLV_QID);
2077 if (!p_qid_tlv) {
2078 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2079 "VF[%2x]: Failed to provide qid\n",
2080 p_vf->relative_vf_id);
2081
2082 return QED_IOV_QID_INVALID;
2083 }
2084
2085 if (p_qid_tlv->qid >= MAX_QUEUES_PER_QZONE) {
2086 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2087 "VF[%02x]: Provided qid out-of-bounds %02x\n",
2088 p_vf->relative_vf_id, p_qid_tlv->qid);
2089 return QED_IOV_QID_INVALID;
2090 }
2091
2092 return p_qid_tlv->qid;
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002093}
2094
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002095static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
2096 struct qed_ptt *p_ptt,
2097 struct qed_vf_info *vf)
2098{
2099 struct qed_queue_start_common_params params;
Mintz, Yuval39464972017-06-04 13:31:02 +03002100 struct qed_queue_cid_vf_params vf_params;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002101 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz41086462016-06-05 13:11:13 +03002102 u8 status = PFVF_STATUS_NO_RESOURCE;
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002103 u8 qid_usage_idx, vf_legacy = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002104 struct vfpf_start_rxq_tlv *req;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002105 struct qed_vf_queue *p_queue;
2106 struct qed_queue_cid *p_cid;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03002107 struct qed_sb_info sb_dummy;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002108 int rc;
2109
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002110 req = &mbx->req_virt->start_rxq;
Yuval Mintz41086462016-06-05 13:11:13 +03002111
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002112 if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid,
2113 QED_IOV_VALIDATE_Q_DISABLE) ||
Yuval Mintz41086462016-06-05 13:11:13 +03002114 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
2115 goto out;
2116
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002117 qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false);
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002118 if (qid_usage_idx == QED_IOV_QID_INVALID)
2119 goto out;
2120
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002121 p_queue = &vf->vf_queues[req->rx_qid];
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002122 if (p_queue->cids[qid_usage_idx].p_cid)
2123 goto out;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002124
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002125 vf_legacy = qed_vf_calculate_legacy(vf);
Mintz, Yuval39464972017-06-04 13:31:02 +03002126
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002127 /* Acquire a new queue-cid */
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002128 memset(&params, 0, sizeof(params));
2129 params.queue_id = p_queue->fw_rx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002130 params.vport_id = vf->vport_id;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002131 params.stats_id = vf->abs_vf_id + 0x10;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03002132 /* Since IGU index is passed via sb_info, construct a dummy one */
2133 memset(&sb_dummy, 0, sizeof(sb_dummy));
2134 sb_dummy.igu_sb_id = req->hw_sb;
2135 params.p_sb = &sb_dummy;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002136 params.sb_idx = req->sb_index;
2137
Mintz, Yuval39464972017-06-04 13:31:02 +03002138 memset(&vf_params, 0, sizeof(vf_params));
2139 vf_params.vfid = vf->relative_vf_id;
2140 vf_params.vf_qid = (u8)req->rx_qid;
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002141 vf_params.vf_legacy = vf_legacy;
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002142 vf_params.qid_usage_idx = qid_usage_idx;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002143 p_cid = qed_eth_queue_to_cid(p_hwfn, vf->opaque_fid,
2144 &params, true, &vf_params);
2145 if (!p_cid)
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002146 goto out;
2147
Yuval Mintza044df82016-08-22 13:25:09 +03002148 /* Legacy VFs have their Producers in a different location, which they
2149 * calculate on their own and clean the producer prior to this.
2150 */
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002151 if (!(vf_legacy & QED_QCID_LEGACY_VF_RX_PROD))
Yuval Mintza044df82016-08-22 13:25:09 +03002152 REG_WR(p_hwfn,
2153 GTT_BAR0_MAP_REG_MSDM_RAM +
2154 MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid),
2155 0);
Yuval Mintza044df82016-08-22 13:25:09 +03002156
Mintz, Yuval007bc372017-06-04 13:31:05 +03002157 rc = qed_eth_rxq_start_ramrod(p_hwfn, p_cid,
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002158 req->bd_max_bytes,
2159 req->rxq_addr,
2160 req->cqe_pbl_addr, req->cqe_pbl_size);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002161 if (rc) {
2162 status = PFVF_STATUS_FAILURE;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002163 qed_eth_queue_cid_release(p_hwfn, p_cid);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002164 } else {
Mintz, Yuval007bc372017-06-04 13:31:05 +03002165 p_queue->cids[qid_usage_idx].p_cid = p_cid;
2166 p_queue->cids[qid_usage_idx].b_is_tx = false;
Yuval Mintz41086462016-06-05 13:11:13 +03002167 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002168 vf->num_active_rxqs++;
2169 }
2170
Yuval Mintz41086462016-06-05 13:11:13 +03002171out:
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002172 qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status,
2173 !!(vf_legacy &
2174 QED_QCID_LEGACY_VF_RX_PROD));
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002175}
2176
Chopra, Manisheaf3c0c2017-04-24 10:00:49 -07002177static void
2178qed_iov_pf_update_tun_response(struct pfvf_update_tunn_param_tlv *p_resp,
2179 struct qed_tunnel_info *p_tun,
2180 u16 tunn_feature_mask)
2181{
2182 p_resp->tunn_feature_mask = tunn_feature_mask;
2183 p_resp->vxlan_mode = p_tun->vxlan.b_mode_enabled;
2184 p_resp->l2geneve_mode = p_tun->l2_geneve.b_mode_enabled;
2185 p_resp->ipgeneve_mode = p_tun->ip_geneve.b_mode_enabled;
2186 p_resp->l2gre_mode = p_tun->l2_gre.b_mode_enabled;
2187 p_resp->ipgre_mode = p_tun->l2_gre.b_mode_enabled;
2188 p_resp->vxlan_clss = p_tun->vxlan.tun_cls;
2189 p_resp->l2gre_clss = p_tun->l2_gre.tun_cls;
2190 p_resp->ipgre_clss = p_tun->ip_gre.tun_cls;
2191 p_resp->l2geneve_clss = p_tun->l2_geneve.tun_cls;
2192 p_resp->ipgeneve_clss = p_tun->ip_geneve.tun_cls;
2193 p_resp->geneve_udp_port = p_tun->geneve_port.port;
2194 p_resp->vxlan_udp_port = p_tun->vxlan_port.port;
2195}
2196
2197static void
2198__qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
2199 struct qed_tunn_update_type *p_tun,
2200 enum qed_tunn_mode mask, u8 tun_cls)
2201{
2202 if (p_req->tun_mode_update_mask & BIT(mask)) {
2203 p_tun->b_update_mode = true;
2204
2205 if (p_req->tunn_mode & BIT(mask))
2206 p_tun->b_mode_enabled = true;
2207 }
2208
2209 p_tun->tun_cls = tun_cls;
2210}
2211
2212static void
2213qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
2214 struct qed_tunn_update_type *p_tun,
2215 struct qed_tunn_update_udp_port *p_port,
2216 enum qed_tunn_mode mask,
2217 u8 tun_cls, u8 update_port, u16 port)
2218{
2219 if (update_port) {
2220 p_port->b_update_port = true;
2221 p_port->port = port;
2222 }
2223
2224 __qed_iov_pf_update_tun_param(p_req, p_tun, mask, tun_cls);
2225}
2226
2227static bool
2228qed_iov_pf_validate_tunn_param(struct vfpf_update_tunn_param_tlv *p_req)
2229{
2230 bool b_update_requested = false;
2231
2232 if (p_req->tun_mode_update_mask || p_req->update_tun_cls ||
2233 p_req->update_geneve_port || p_req->update_vxlan_port)
2234 b_update_requested = true;
2235
2236 return b_update_requested;
2237}
2238
2239static void qed_pf_validate_tunn_mode(struct qed_tunn_update_type *tun, int *rc)
2240{
2241 if (tun->b_update_mode && !tun->b_mode_enabled) {
2242 tun->b_update_mode = false;
2243 *rc = -EINVAL;
2244 }
2245}
2246
2247static int
2248qed_pf_validate_modify_tunn_config(struct qed_hwfn *p_hwfn,
2249 u16 *tun_features, bool *update,
2250 struct qed_tunnel_info *tun_src)
2251{
2252 struct qed_eth_cb_ops *ops = p_hwfn->cdev->protocol_ops.eth;
2253 struct qed_tunnel_info *tun = &p_hwfn->cdev->tunnel;
2254 u16 bultn_vxlan_port, bultn_geneve_port;
2255 void *cookie = p_hwfn->cdev->ops_cookie;
2256 int i, rc = 0;
2257
2258 *tun_features = p_hwfn->cdev->tunn_feature_mask;
2259 bultn_vxlan_port = tun->vxlan_port.port;
2260 bultn_geneve_port = tun->geneve_port.port;
2261 qed_pf_validate_tunn_mode(&tun_src->vxlan, &rc);
2262 qed_pf_validate_tunn_mode(&tun_src->l2_geneve, &rc);
2263 qed_pf_validate_tunn_mode(&tun_src->ip_geneve, &rc);
2264 qed_pf_validate_tunn_mode(&tun_src->l2_gre, &rc);
2265 qed_pf_validate_tunn_mode(&tun_src->ip_gre, &rc);
2266
2267 if ((tun_src->b_update_rx_cls || tun_src->b_update_tx_cls) &&
2268 (tun_src->vxlan.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2269 tun_src->l2_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2270 tun_src->ip_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2271 tun_src->l2_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2272 tun_src->ip_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN)) {
2273 tun_src->b_update_rx_cls = false;
2274 tun_src->b_update_tx_cls = false;
2275 rc = -EINVAL;
2276 }
2277
2278 if (tun_src->vxlan_port.b_update_port) {
2279 if (tun_src->vxlan_port.port == tun->vxlan_port.port) {
2280 tun_src->vxlan_port.b_update_port = false;
2281 } else {
2282 *update = true;
2283 bultn_vxlan_port = tun_src->vxlan_port.port;
2284 }
2285 }
2286
2287 if (tun_src->geneve_port.b_update_port) {
2288 if (tun_src->geneve_port.port == tun->geneve_port.port) {
2289 tun_src->geneve_port.b_update_port = false;
2290 } else {
2291 *update = true;
2292 bultn_geneve_port = tun_src->geneve_port.port;
2293 }
2294 }
2295
2296 qed_for_each_vf(p_hwfn, i) {
2297 qed_iov_bulletin_set_udp_ports(p_hwfn, i, bultn_vxlan_port,
2298 bultn_geneve_port);
2299 }
2300
2301 qed_schedule_iov(p_hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
2302 ops->ports_update(cookie, bultn_vxlan_port, bultn_geneve_port);
2303
2304 return rc;
2305}
2306
2307static void qed_iov_vf_mbx_update_tunn_param(struct qed_hwfn *p_hwfn,
2308 struct qed_ptt *p_ptt,
2309 struct qed_vf_info *p_vf)
2310{
2311 struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel;
2312 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
2313 struct pfvf_update_tunn_param_tlv *p_resp;
2314 struct vfpf_update_tunn_param_tlv *p_req;
2315 u8 status = PFVF_STATUS_SUCCESS;
2316 bool b_update_required = false;
2317 struct qed_tunnel_info tunn;
2318 u16 tunn_feature_mask = 0;
2319 int i, rc = 0;
2320
2321 mbx->offset = (u8 *)mbx->reply_virt;
2322
2323 memset(&tunn, 0, sizeof(tunn));
2324 p_req = &mbx->req_virt->tunn_param_update;
2325
2326 if (!qed_iov_pf_validate_tunn_param(p_req)) {
2327 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2328 "No tunnel update requested by VF\n");
2329 status = PFVF_STATUS_FAILURE;
2330 goto send_resp;
2331 }
2332
2333 tunn.b_update_rx_cls = p_req->update_tun_cls;
2334 tunn.b_update_tx_cls = p_req->update_tun_cls;
2335
2336 qed_iov_pf_update_tun_param(p_req, &tunn.vxlan, &tunn.vxlan_port,
2337 QED_MODE_VXLAN_TUNN, p_req->vxlan_clss,
2338 p_req->update_vxlan_port,
2339 p_req->vxlan_port);
2340 qed_iov_pf_update_tun_param(p_req, &tunn.l2_geneve, &tunn.geneve_port,
2341 QED_MODE_L2GENEVE_TUNN,
2342 p_req->l2geneve_clss,
2343 p_req->update_geneve_port,
2344 p_req->geneve_port);
2345 __qed_iov_pf_update_tun_param(p_req, &tunn.ip_geneve,
2346 QED_MODE_IPGENEVE_TUNN,
2347 p_req->ipgeneve_clss);
2348 __qed_iov_pf_update_tun_param(p_req, &tunn.l2_gre,
2349 QED_MODE_L2GRE_TUNN, p_req->l2gre_clss);
2350 __qed_iov_pf_update_tun_param(p_req, &tunn.ip_gre,
2351 QED_MODE_IPGRE_TUNN, p_req->ipgre_clss);
2352
2353 /* If PF modifies VF's req then it should
2354 * still return an error in case of partial configuration
2355 * or modified configuration as opposed to requested one.
2356 */
2357 rc = qed_pf_validate_modify_tunn_config(p_hwfn, &tunn_feature_mask,
2358 &b_update_required, &tunn);
2359
2360 if (rc)
2361 status = PFVF_STATUS_FAILURE;
2362
2363 /* If QED client is willing to update anything ? */
2364 if (b_update_required) {
2365 u16 geneve_port;
2366
Manish Chopra4f646752017-05-23 09:41:20 +03002367 rc = qed_sp_pf_update_tunn_cfg(p_hwfn, p_ptt, &tunn,
Chopra, Manisheaf3c0c2017-04-24 10:00:49 -07002368 QED_SPQ_MODE_EBLOCK, NULL);
2369 if (rc)
2370 status = PFVF_STATUS_FAILURE;
2371
2372 geneve_port = p_tun->geneve_port.port;
2373 qed_for_each_vf(p_hwfn, i) {
2374 qed_iov_bulletin_set_udp_ports(p_hwfn, i,
2375 p_tun->vxlan_port.port,
2376 geneve_port);
2377 }
2378 }
2379
2380send_resp:
2381 p_resp = qed_add_tlv(p_hwfn, &mbx->offset,
2382 CHANNEL_TLV_UPDATE_TUNN_PARAM, sizeof(*p_resp));
2383
2384 qed_iov_pf_update_tun_response(p_resp, p_tun, tunn_feature_mask);
2385 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2386 sizeof(struct channel_list_end_tlv));
2387
2388 qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_resp), status);
2389}
2390
Yuval Mintz5040acf2016-06-05 13:11:14 +03002391static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn,
2392 struct qed_ptt *p_ptt,
Mintz, Yuval007bc372017-06-04 13:31:05 +03002393 struct qed_vf_info *p_vf,
2394 u32 cid, u8 status)
Yuval Mintz5040acf2016-06-05 13:11:14 +03002395{
2396 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
2397 struct pfvf_start_queue_resp_tlv *p_tlv;
Yuval Mintza044df82016-08-22 13:25:09 +03002398 bool b_legacy = false;
2399 u16 length;
Yuval Mintz5040acf2016-06-05 13:11:14 +03002400
2401 mbx->offset = (u8 *)mbx->reply_virt;
2402
Yuval Mintza044df82016-08-22 13:25:09 +03002403 /* Taking a bigger struct instead of adding a TLV to list was a
2404 * mistake, but one which we're now stuck with, as some older
2405 * clients assume the size of the previous response.
2406 */
2407 if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
2408 ETH_HSI_VER_NO_PKT_LEN_TUNN)
2409 b_legacy = true;
2410
2411 if (!b_legacy)
2412 length = sizeof(*p_tlv);
2413 else
2414 length = sizeof(struct pfvf_def_resp_tlv);
2415
Yuval Mintz5040acf2016-06-05 13:11:14 +03002416 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
Yuval Mintza044df82016-08-22 13:25:09 +03002417 length);
Yuval Mintz5040acf2016-06-05 13:11:14 +03002418 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2419 sizeof(struct channel_list_end_tlv));
2420
2421 /* Update the TLV with the response */
Mintz, Yuval007bc372017-06-04 13:31:05 +03002422 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy)
2423 p_tlv->offset = qed_db_addr_vf(cid, DQ_DEMS_LEGACY);
Yuval Mintz5040acf2016-06-05 13:11:14 +03002424
Yuval Mintza044df82016-08-22 13:25:09 +03002425 qed_iov_send_response(p_hwfn, p_ptt, p_vf, length, status);
Yuval Mintz5040acf2016-06-05 13:11:14 +03002426}
2427
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002428static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
2429 struct qed_ptt *p_ptt,
2430 struct qed_vf_info *vf)
2431{
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002432 struct qed_queue_start_common_params params;
Mintz, Yuval39464972017-06-04 13:31:02 +03002433 struct qed_queue_cid_vf_params vf_params;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002434 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz41086462016-06-05 13:11:13 +03002435 u8 status = PFVF_STATUS_NO_RESOURCE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002436 struct vfpf_start_txq_tlv *req;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002437 struct qed_vf_queue *p_queue;
2438 struct qed_queue_cid *p_cid;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03002439 struct qed_sb_info sb_dummy;
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002440 u8 qid_usage_idx, vf_legacy;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002441 u32 cid = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002442 int rc;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002443 u16 pq;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002444
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002445 memset(&params, 0, sizeof(params));
2446 req = &mbx->req_virt->start_txq;
Yuval Mintz41086462016-06-05 13:11:13 +03002447
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002448 if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid,
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002449 QED_IOV_VALIDATE_Q_NA) ||
Yuval Mintz41086462016-06-05 13:11:13 +03002450 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
2451 goto out;
2452
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002453 qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, true);
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002454 if (qid_usage_idx == QED_IOV_QID_INVALID)
2455 goto out;
2456
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002457 p_queue = &vf->vf_queues[req->tx_qid];
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002458 if (p_queue->cids[qid_usage_idx].p_cid)
2459 goto out;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002460
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002461 vf_legacy = qed_vf_calculate_legacy(vf);
Mintz, Yuval39464972017-06-04 13:31:02 +03002462
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002463 /* Acquire a new queue-cid */
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002464 params.queue_id = p_queue->fw_tx_qid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002465 params.vport_id = vf->vport_id;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002466 params.stats_id = vf->abs_vf_id + 0x10;
Mintz, Yuvalf604b172017-06-04 13:31:01 +03002467
2468 /* Since IGU index is passed via sb_info, construct a dummy one */
2469 memset(&sb_dummy, 0, sizeof(sb_dummy));
2470 sb_dummy.igu_sb_id = req->hw_sb;
2471 params.p_sb = &sb_dummy;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002472 params.sb_idx = req->sb_index;
2473
Mintz, Yuval39464972017-06-04 13:31:02 +03002474 memset(&vf_params, 0, sizeof(vf_params));
2475 vf_params.vfid = vf->relative_vf_id;
2476 vf_params.vf_qid = (u8)req->tx_qid;
Mintz, Yuval3b19f472017-06-04 13:31:04 +03002477 vf_params.vf_legacy = vf_legacy;
Mintz, Yuvalbbe3f232017-06-04 13:31:03 +03002478 vf_params.qid_usage_idx = qid_usage_idx;
Mintz, Yuval39464972017-06-04 13:31:02 +03002479
Mintz, Yuval007bc372017-06-04 13:31:05 +03002480 p_cid = qed_eth_queue_to_cid(p_hwfn, vf->opaque_fid,
2481 &params, false, &vf_params);
2482 if (!p_cid)
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002483 goto out;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002484
Ariel Eliorb5a9ee72017-04-03 12:21:09 +03002485 pq = qed_get_cm_pq_idx_vf(p_hwfn, vf->relative_vf_id);
Mintz, Yuval007bc372017-06-04 13:31:05 +03002486 rc = qed_eth_txq_start_ramrod(p_hwfn, p_cid,
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002487 req->pbl_addr, req->pbl_size, pq);
Yuval Mintz41086462016-06-05 13:11:13 +03002488 if (rc) {
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002489 status = PFVF_STATUS_FAILURE;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002490 qed_eth_queue_cid_release(p_hwfn, p_cid);
Yuval Mintz41086462016-06-05 13:11:13 +03002491 } else {
2492 status = PFVF_STATUS_SUCCESS;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002493 p_queue->cids[qid_usage_idx].p_cid = p_cid;
2494 p_queue->cids[qid_usage_idx].b_is_tx = true;
2495 cid = p_cid->cid;
Yuval Mintz41086462016-06-05 13:11:13 +03002496 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002497
Yuval Mintz41086462016-06-05 13:11:13 +03002498out:
Mintz, Yuval007bc372017-06-04 13:31:05 +03002499 qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, cid, status);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002500}
2501
2502static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
2503 struct qed_vf_info *vf,
Mintz, Yuval007bc372017-06-04 13:31:05 +03002504 u16 rxq_id,
2505 u8 qid_usage_idx, bool cqe_completion)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002506{
Mintz, Yuval007bc372017-06-04 13:31:05 +03002507 struct qed_vf_queue *p_queue;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002508 int rc = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002509
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002510 if (!qed_iov_validate_rxq(p_hwfn, vf, rxq_id, QED_IOV_VALIDATE_Q_NA)) {
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002511 DP_VERBOSE(p_hwfn,
2512 QED_MSG_IOV,
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002513 "VF[%d] Tried Closing Rx 0x%04x.%02x which is inactive\n",
2514 vf->relative_vf_id, rxq_id, qid_usage_idx);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002515 return -EINVAL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002516 }
2517
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002518 p_queue = &vf->vf_queues[rxq_id];
2519
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002520 /* We've validated the index and the existence of the active RXQ -
2521 * now we need to make sure that it's using the correct qid.
2522 */
2523 if (!p_queue->cids[qid_usage_idx].p_cid ||
2524 p_queue->cids[qid_usage_idx].b_is_tx) {
2525 struct qed_queue_cid *p_cid;
2526
2527 p_cid = qed_iov_get_vf_rx_queue_cid(p_queue);
2528 DP_VERBOSE(p_hwfn,
2529 QED_MSG_IOV,
2530 "VF[%d] - Tried Closing Rx 0x%04x.%02x, but Rx is at %04x.%02x\n",
2531 vf->relative_vf_id,
2532 rxq_id, qid_usage_idx, rxq_id, p_cid->qid_usage_idx);
2533 return -EINVAL;
2534 }
2535
2536 /* Now that we know we have a valid Rx-queue - close it */
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002537 rc = qed_eth_rx_queue_stop(p_hwfn,
Mintz, Yuval007bc372017-06-04 13:31:05 +03002538 p_queue->cids[qid_usage_idx].p_cid,
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002539 false, cqe_completion);
2540 if (rc)
2541 return rc;
2542
Mintz, Yuval007bc372017-06-04 13:31:05 +03002543 p_queue->cids[qid_usage_idx].p_cid = NULL;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002544 vf->num_active_rxqs--;
2545
2546 return 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002547}
2548
2549static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
Mintz, Yuval007bc372017-06-04 13:31:05 +03002550 struct qed_vf_info *vf,
2551 u16 txq_id, u8 qid_usage_idx)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002552{
Mintz, Yuval007bc372017-06-04 13:31:05 +03002553 struct qed_vf_queue *p_queue;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002554 int rc = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002555
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002556 if (!qed_iov_validate_txq(p_hwfn, vf, txq_id, QED_IOV_VALIDATE_Q_NA))
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002557 return -EINVAL;
2558
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002559 p_queue = &vf->vf_queues[txq_id];
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002560 if (!p_queue->cids[qid_usage_idx].p_cid ||
2561 !p_queue->cids[qid_usage_idx].b_is_tx)
2562 return -EINVAL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002563
Mintz, Yuval007bc372017-06-04 13:31:05 +03002564 rc = qed_eth_tx_queue_stop(p_hwfn, p_queue->cids[qid_usage_idx].p_cid);
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002565 if (rc)
2566 return rc;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002567
Mintz, Yuval007bc372017-06-04 13:31:05 +03002568 p_queue->cids[qid_usage_idx].p_cid = NULL;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002569 return 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002570}
2571
2572static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
2573 struct qed_ptt *p_ptt,
2574 struct qed_vf_info *vf)
2575{
2576 u16 length = sizeof(struct pfvf_def_resp_tlv);
2577 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002578 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002579 struct vfpf_stop_rxqs_tlv *req;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002580 u8 qid_usage_idx;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002581 int rc;
2582
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002583 /* There has never been an official driver that used this interface
2584 * for stopping multiple queues, and it is now considered deprecated.
2585 * Validate this isn't used here.
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002586 */
2587 req = &mbx->req_virt->stop_rxqs;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002588 if (req->num_rxqs != 1) {
2589 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2590 "Odd; VF[%d] tried stopping multiple Rx queues\n",
2591 vf->relative_vf_id);
2592 status = PFVF_STATUS_NOT_SUPPORTED;
2593 goto out;
2594 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002595
Mintz, Yuval007bc372017-06-04 13:31:05 +03002596 /* Find which qid-index is associated with the queue */
2597 qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false);
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002598 if (qid_usage_idx == QED_IOV_QID_INVALID)
2599 goto out;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002600
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002601 rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
Mintz, Yuval007bc372017-06-04 13:31:05 +03002602 qid_usage_idx, req->cqe_completion);
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002603 if (!rc)
2604 status = PFVF_STATUS_SUCCESS;
2605out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002606 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
2607 length, status);
2608}
2609
2610static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
2611 struct qed_ptt *p_ptt,
2612 struct qed_vf_info *vf)
2613{
2614 u16 length = sizeof(struct pfvf_def_resp_tlv);
2615 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002616 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002617 struct vfpf_stop_txqs_tlv *req;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002618 u8 qid_usage_idx;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002619 int rc;
2620
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002621 /* There has never been an official driver that used this interface
2622 * for stopping multiple queues, and it is now considered deprecated.
2623 * Validate this isn't used here.
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002624 */
2625 req = &mbx->req_virt->stop_txqs;
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002626 if (req->num_txqs != 1) {
2627 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2628 "Odd; VF[%d] tried stopping multiple Tx queues\n",
2629 vf->relative_vf_id);
2630 status = PFVF_STATUS_NOT_SUPPORTED;
2631 goto out;
2632 }
Mintz, Yuval007bc372017-06-04 13:31:05 +03002633
2634 /* Find which qid-index is associated with the queue */
2635 qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, true);
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002636 if (qid_usage_idx == QED_IOV_QID_INVALID)
2637 goto out;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002638
2639 rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, qid_usage_idx);
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002640 if (!rc)
2641 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002642
Mintz, Yuval4c4fa792017-03-19 13:08:17 +02002643out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002644 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
2645 length, status);
2646}
2647
Yuval Mintz17b235c2016-05-11 16:36:18 +03002648static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
2649 struct qed_ptt *p_ptt,
2650 struct qed_vf_info *vf)
2651{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002652 struct qed_queue_cid *handlers[QED_MAX_VF_CHAINS_PER_PF];
Yuval Mintz17b235c2016-05-11 16:36:18 +03002653 u16 length = sizeof(struct pfvf_def_resp_tlv);
2654 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2655 struct vfpf_update_rxq_tlv *req;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002656 u8 status = PFVF_STATUS_FAILURE;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002657 u8 complete_event_flg;
2658 u8 complete_cqe_flg;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002659 u8 qid_usage_idx;
Yuval Mintz17b235c2016-05-11 16:36:18 +03002660 int rc;
2661 u8 i;
2662
2663 req = &mbx->req_virt->update_rxq;
2664 complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
2665 complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
2666
Mintz, Yuval007bc372017-06-04 13:31:05 +03002667 qid_usage_idx = qed_iov_vf_mbx_qid(p_hwfn, vf, false);
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002668 if (qid_usage_idx == QED_IOV_QID_INVALID)
2669 goto out;
Mintz, Yuval007bc372017-06-04 13:31:05 +03002670
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002671 /* There shouldn't exist a VF that uses queue-qids yet uses this
2672 * API with multiple Rx queues. Validate this.
2673 */
2674 if ((vf->acquire.vfdev_info.capabilities &
2675 VFPF_ACQUIRE_CAP_QUEUE_QIDS) && req->num_rxqs != 1) {
2676 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2677 "VF[%d] supports QIDs but sends multiple queues\n",
2678 vf->relative_vf_id);
2679 goto out;
2680 }
2681
2682 /* Validate inputs - for the legacy case this is still true since
2683 * qid_usage_idx for each Rx queue would be LEGACY_QID_RX.
2684 */
2685 for (i = req->rx_qid; i < req->rx_qid + req->num_rxqs; i++) {
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002686 if (!qed_iov_validate_rxq(p_hwfn, vf, i,
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002687 QED_IOV_VALIDATE_Q_NA) ||
2688 !vf->vf_queues[i].cids[qid_usage_idx].p_cid ||
2689 vf->vf_queues[i].cids[qid_usage_idx].b_is_tx) {
2690 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2691 "VF[%d]: Incorrect Rxqs [%04x, %02x]\n",
2692 vf->relative_vf_id, req->rx_qid,
2693 req->num_rxqs);
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002694 goto out;
2695 }
Mintz, Yuval08bc8f12017-06-04 13:31:06 +03002696 }
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002697
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002698 /* Prepare the handlers */
2699 for (i = 0; i < req->num_rxqs; i++) {
Mintz, Yuval007bc372017-06-04 13:31:05 +03002700 u16 qid = req->rx_qid + i;
2701
2702 handlers[i] = vf->vf_queues[qid].cids[qid_usage_idx].p_cid;
Mintz, Yuval3da7a372016-11-29 16:47:06 +02002703 }
2704
2705 rc = qed_sp_eth_rx_queues_update(p_hwfn, (void **)&handlers,
2706 req->num_rxqs,
2707 complete_cqe_flg,
2708 complete_event_flg,
2709 QED_SPQ_MODE_EBLOCK, NULL);
2710 if (rc)
2711 goto out;
2712
2713 status = PFVF_STATUS_SUCCESS;
2714out:
Yuval Mintz17b235c2016-05-11 16:36:18 +03002715 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
2716 length, status);
2717}
2718
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002719void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
2720 void *p_tlvs_list, u16 req_type)
2721{
2722 struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
2723 int len = 0;
2724
2725 do {
2726 if (!p_tlv->length) {
2727 DP_NOTICE(p_hwfn, "Zero length TLV found\n");
2728 return NULL;
2729 }
2730
2731 if (p_tlv->type == req_type) {
2732 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2733 "Extended tlv type %d, length %d found\n",
2734 p_tlv->type, p_tlv->length);
2735 return p_tlv;
2736 }
2737
2738 len += p_tlv->length;
2739 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
2740
2741 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
2742 DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
2743 return NULL;
2744 }
2745 } while (p_tlv->type != CHANNEL_TLV_LIST_END);
2746
2747 return NULL;
2748}
2749
2750static void
2751qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
2752 struct qed_sp_vport_update_params *p_data,
2753 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2754{
2755 struct vfpf_vport_update_activate_tlv *p_act_tlv;
2756 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
2757
2758 p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
2759 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2760 if (!p_act_tlv)
2761 return;
2762
2763 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
2764 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
2765 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
2766 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
2767 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
2768}
2769
2770static void
Yuval Mintz17b235c2016-05-11 16:36:18 +03002771qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
2772 struct qed_sp_vport_update_params *p_data,
2773 struct qed_vf_info *p_vf,
2774 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2775{
2776 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
2777 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
2778
2779 p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
2780 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2781 if (!p_vlan_tlv)
2782 return;
2783
Yuval Mintz08feecd2016-05-11 16:36:20 +03002784 p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
2785
2786 /* Ignore the VF request if we're forcing a vlan */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002787 if (!(p_vf->configured_features & BIT(VLAN_ADDR_FORCED))) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03002788 p_data->update_inner_vlan_removal_flg = 1;
2789 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
2790 }
Yuval Mintz17b235c2016-05-11 16:36:18 +03002791
2792 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
2793}
2794
2795static void
2796qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
2797 struct qed_sp_vport_update_params *p_data,
2798 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2799{
2800 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
2801 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
2802
2803 p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
2804 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2805 tlv);
2806 if (!p_tx_switch_tlv)
2807 return;
2808
2809 p_data->update_tx_switching_flg = 1;
2810 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
2811 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
2812}
2813
2814static void
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002815qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
2816 struct qed_sp_vport_update_params *p_data,
2817 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2818{
2819 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
2820 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
2821
2822 p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
2823 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2824 if (!p_mcast_tlv)
2825 return;
2826
2827 p_data->update_approx_mcast_flg = 1;
2828 memcpy(p_data->bins, p_mcast_tlv->bins,
2829 sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
2830 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
2831}
2832
2833static void
2834qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
2835 struct qed_sp_vport_update_params *p_data,
2836 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2837{
2838 struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
2839 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
2840 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
2841
2842 p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
2843 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2844 if (!p_accept_tlv)
2845 return;
2846
2847 p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
2848 p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
2849 p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
2850 p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
2851 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
2852}
2853
2854static void
Yuval Mintz17b235c2016-05-11 16:36:18 +03002855qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
2856 struct qed_sp_vport_update_params *p_data,
2857 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2858{
2859 struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
2860 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
2861
2862 p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
2863 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2864 tlv);
2865 if (!p_accept_any_vlan)
2866 return;
2867
2868 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
2869 p_data->update_accept_any_vlan_flg =
2870 p_accept_any_vlan->update_accept_any_vlan_flg;
2871 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
2872}
2873
2874static void
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002875qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
2876 struct qed_vf_info *vf,
2877 struct qed_sp_vport_update_params *p_data,
2878 struct qed_rss_params *p_rss,
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002879 struct qed_iov_vf_mbx *p_mbx,
2880 u16 *tlvs_mask, u16 *tlvs_accepted)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002881{
2882 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
2883 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002884 bool b_reject = false;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002885 u16 table_size;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002886 u16 i, q_idx;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002887
2888 p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
2889 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2890 if (!p_rss_tlv) {
2891 p_data->rss_params = NULL;
2892 return;
2893 }
2894
2895 memset(p_rss, 0, sizeof(struct qed_rss_params));
2896
2897 p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
2898 VFPF_UPDATE_RSS_CONFIG_FLAG);
2899 p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
2900 VFPF_UPDATE_RSS_CAPS_FLAG);
2901 p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
2902 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
2903 p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
2904 VFPF_UPDATE_RSS_KEY_FLAG);
2905
2906 p_rss->rss_enable = p_rss_tlv->rss_enable;
2907 p_rss->rss_eng_id = vf->relative_vf_id + 1;
2908 p_rss->rss_caps = p_rss_tlv->rss_caps;
2909 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002910 memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
2911
2912 table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
2913 (1 << p_rss_tlv->rss_table_size_log));
2914
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002915 for (i = 0; i < table_size; i++) {
Mintz, Yuval007bc372017-06-04 13:31:05 +03002916 struct qed_queue_cid *p_cid;
2917
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002918 q_idx = p_rss_tlv->rss_ind_table[i];
Mintz, Yuvalf109c242017-03-19 13:08:16 +02002919 if (!qed_iov_validate_rxq(p_hwfn, vf, q_idx,
2920 QED_IOV_VALIDATE_Q_ENABLE)) {
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002921 DP_VERBOSE(p_hwfn,
2922 QED_MSG_IOV,
2923 "VF[%d]: Omitting RSS due to wrong queue %04x\n",
2924 vf->relative_vf_id, q_idx);
2925 b_reject = true;
2926 goto out;
2927 }
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002928
Mintz, Yuval007bc372017-06-04 13:31:05 +03002929 p_cid = qed_iov_get_vf_rx_queue_cid(&vf->vf_queues[q_idx]);
2930 p_rss->rss_ind_table[i] = p_cid;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002931 }
2932
2933 p_data->rss_params = p_rss;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002934out:
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002935 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02002936 if (!b_reject)
2937 *tlvs_accepted |= 1 << QED_IOV_VP_UPDATE_RSS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03002938}
2939
Yuval Mintz17b235c2016-05-11 16:36:18 +03002940static void
2941qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
2942 struct qed_vf_info *vf,
2943 struct qed_sp_vport_update_params *p_data,
2944 struct qed_sge_tpa_params *p_sge_tpa,
2945 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2946{
2947 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2948 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2949
2950 p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2951 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2952
2953 if (!p_sge_tpa_tlv) {
2954 p_data->sge_tpa_params = NULL;
2955 return;
2956 }
2957
2958 memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
2959
2960 p_sge_tpa->update_tpa_en_flg =
2961 !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2962 p_sge_tpa->update_tpa_param_flg =
2963 !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2964 VFPF_UPDATE_TPA_PARAM_FLAG);
2965
2966 p_sge_tpa->tpa_ipv4_en_flg =
2967 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2968 p_sge_tpa->tpa_ipv6_en_flg =
2969 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2970 p_sge_tpa->tpa_pkt_split_flg =
2971 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2972 p_sge_tpa->tpa_hdr_data_split_flg =
2973 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2974 p_sge_tpa->tpa_gro_consistent_flg =
2975 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2976
2977 p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2978 p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2979 p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2980 p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2981 p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2982
2983 p_data->sge_tpa_params = p_sge_tpa;
2984
2985 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
2986}
2987
Mintz, Yuvalf990c822017-01-01 13:57:08 +02002988static int qed_iov_pre_update_vport(struct qed_hwfn *hwfn,
2989 u8 vfid,
2990 struct qed_sp_vport_update_params *params,
2991 u16 *tlvs)
2992{
2993 u8 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
2994 struct qed_filter_accept_flags *flags = &params->accept_flags;
2995 struct qed_public_vf_info *vf_info;
2996
2997 /* Untrusted VFs can't even be trusted to know that fact.
2998 * Simply indicate everything is configured fine, and trace
2999 * configuration 'behind their back'.
3000 */
3001 if (!(*tlvs & BIT(QED_IOV_VP_UPDATE_ACCEPT_PARAM)))
3002 return 0;
3003
3004 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3005
3006 if (flags->update_rx_mode_config) {
3007 vf_info->rx_accept_mode = flags->rx_accept_filter;
3008 if (!vf_info->is_trusted_configured)
3009 flags->rx_accept_filter &= ~mask;
3010 }
3011
3012 if (flags->update_tx_mode_config) {
3013 vf_info->tx_accept_mode = flags->tx_accept_filter;
3014 if (!vf_info->is_trusted_configured)
3015 flags->tx_accept_filter &= ~mask;
3016 }
3017
3018 return 0;
3019}
3020
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003021static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
3022 struct qed_ptt *p_ptt,
3023 struct qed_vf_info *vf)
3024{
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02003025 struct qed_rss_params *p_rss_params = NULL;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003026 struct qed_sp_vport_update_params params;
3027 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
Yuval Mintz17b235c2016-05-11 16:36:18 +03003028 struct qed_sge_tpa_params sge_tpa_params;
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02003029 u16 tlvs_mask = 0, tlvs_accepted = 0;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003030 u8 status = PFVF_STATUS_SUCCESS;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003031 u16 length;
3032 int rc;
3033
Yuval Mintz41086462016-06-05 13:11:13 +03003034 /* Valiate PF can send such a request */
3035 if (!vf->vport_instance) {
3036 DP_VERBOSE(p_hwfn,
3037 QED_MSG_IOV,
3038 "No VPORT instance available for VF[%d], failing vport update\n",
3039 vf->abs_vf_id);
3040 status = PFVF_STATUS_FAILURE;
3041 goto out;
3042 }
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02003043 p_rss_params = vzalloc(sizeof(*p_rss_params));
3044 if (p_rss_params == NULL) {
3045 status = PFVF_STATUS_FAILURE;
3046 goto out;
3047 }
Yuval Mintz41086462016-06-05 13:11:13 +03003048
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003049 memset(&params, 0, sizeof(params));
3050 params.opaque_fid = vf->opaque_fid;
3051 params.vport_id = vf->vport_id;
3052 params.rss_params = NULL;
3053
3054 /* Search for extended tlvs list and update values
3055 * from VF in struct qed_sp_vport_update_params.
3056 */
3057 qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintz17b235c2016-05-11 16:36:18 +03003058 qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
3059 qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003060 qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
3061 qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
Yuval Mintz17b235c2016-05-11 16:36:18 +03003062 qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
3063 qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
3064 &sge_tpa_params, mbx, &tlvs_mask);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003065
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02003066 tlvs_accepted = tlvs_mask;
3067
3068 /* Some of the extended TLVs need to be validated first; In that case,
3069 * they can update the mask without updating the accepted [so that
3070 * PF could communicate to VF it has rejected request].
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003071 */
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02003072 qed_iov_vp_update_rss_param(p_hwfn, vf, &params, p_rss_params,
3073 mbx, &tlvs_mask, &tlvs_accepted);
3074
Mintz, Yuvalf990c822017-01-01 13:57:08 +02003075 if (qed_iov_pre_update_vport(p_hwfn, vf->relative_vf_id,
3076 &params, &tlvs_accepted)) {
3077 tlvs_accepted = 0;
3078 status = PFVF_STATUS_NOT_SUPPORTED;
3079 goto out;
3080 }
3081
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02003082 if (!tlvs_accepted) {
3083 if (tlvs_mask)
3084 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3085 "Upper-layer prevents VF vport configuration\n");
3086 else
3087 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3088 "No feature tlvs found for vport update\n");
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003089 status = PFVF_STATUS_NOT_SUPPORTED;
3090 goto out;
3091 }
3092
3093 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
3094
3095 if (rc)
3096 status = PFVF_STATUS_FAILURE;
3097
3098out:
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02003099 vfree(p_rss_params);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003100 length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
Mintz, Yuvalf29ffdb2017-01-01 13:57:07 +02003101 tlvs_mask, tlvs_accepted);
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003102 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
3103}
3104
Yuval Mintz8246d0b2016-06-05 13:11:15 +03003105static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn,
3106 struct qed_vf_info *p_vf,
3107 struct qed_filter_ucast *p_params)
Yuval Mintz08feecd2016-05-11 16:36:20 +03003108{
3109 int i;
3110
Yuval Mintz08feecd2016-05-11 16:36:20 +03003111 /* First remove entries and then add new ones */
3112 if (p_params->opcode == QED_FILTER_REMOVE) {
3113 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
3114 if (p_vf->shadow_config.vlans[i].used &&
3115 p_vf->shadow_config.vlans[i].vid ==
3116 p_params->vlan) {
3117 p_vf->shadow_config.vlans[i].used = false;
3118 break;
3119 }
3120 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
3121 DP_VERBOSE(p_hwfn,
3122 QED_MSG_IOV,
3123 "VF [%d] - Tries to remove a non-existing vlan\n",
3124 p_vf->relative_vf_id);
3125 return -EINVAL;
3126 }
3127 } else if (p_params->opcode == QED_FILTER_REPLACE ||
3128 p_params->opcode == QED_FILTER_FLUSH) {
3129 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
3130 p_vf->shadow_config.vlans[i].used = false;
3131 }
3132
3133 /* In forced mode, we're willing to remove entries - but we don't add
3134 * new ones.
3135 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003136 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED))
Yuval Mintz08feecd2016-05-11 16:36:20 +03003137 return 0;
3138
3139 if (p_params->opcode == QED_FILTER_ADD ||
3140 p_params->opcode == QED_FILTER_REPLACE) {
3141 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
3142 if (p_vf->shadow_config.vlans[i].used)
3143 continue;
3144
3145 p_vf->shadow_config.vlans[i].used = true;
3146 p_vf->shadow_config.vlans[i].vid = p_params->vlan;
3147 break;
3148 }
3149
3150 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
3151 DP_VERBOSE(p_hwfn,
3152 QED_MSG_IOV,
3153 "VF [%d] - Tries to configure more than %d vlan filters\n",
3154 p_vf->relative_vf_id,
3155 QED_ETH_VF_NUM_VLAN_FILTERS + 1);
3156 return -EINVAL;
3157 }
3158 }
3159
3160 return 0;
3161}
3162
Yuval Mintz8246d0b2016-06-05 13:11:15 +03003163static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn,
3164 struct qed_vf_info *p_vf,
3165 struct qed_filter_ucast *p_params)
3166{
3167 int i;
3168
3169 /* If we're in forced-mode, we don't allow any change */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003170 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))
Yuval Mintz8246d0b2016-06-05 13:11:15 +03003171 return 0;
3172
3173 /* First remove entries and then add new ones */
3174 if (p_params->opcode == QED_FILTER_REMOVE) {
3175 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
3176 if (ether_addr_equal(p_vf->shadow_config.macs[i],
3177 p_params->mac)) {
Shyam Saini0ee28e32017-01-17 07:35:04 +05303178 eth_zero_addr(p_vf->shadow_config.macs[i]);
Yuval Mintz8246d0b2016-06-05 13:11:15 +03003179 break;
3180 }
3181 }
3182
3183 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
3184 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3185 "MAC isn't configured\n");
3186 return -EINVAL;
3187 }
3188 } else if (p_params->opcode == QED_FILTER_REPLACE ||
3189 p_params->opcode == QED_FILTER_FLUSH) {
3190 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++)
Shyam Saini0ee28e32017-01-17 07:35:04 +05303191 eth_zero_addr(p_vf->shadow_config.macs[i]);
Yuval Mintz8246d0b2016-06-05 13:11:15 +03003192 }
3193
3194 /* List the new MAC address */
3195 if (p_params->opcode != QED_FILTER_ADD &&
3196 p_params->opcode != QED_FILTER_REPLACE)
3197 return 0;
3198
3199 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
3200 if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) {
3201 ether_addr_copy(p_vf->shadow_config.macs[i],
3202 p_params->mac);
3203 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3204 "Added MAC at %d entry in shadow\n", i);
3205 break;
3206 }
3207 }
3208
3209 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
3210 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n");
3211 return -EINVAL;
3212 }
3213
3214 return 0;
3215}
3216
3217static int
3218qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
3219 struct qed_vf_info *p_vf,
3220 struct qed_filter_ucast *p_params)
3221{
3222 int rc = 0;
3223
3224 if (p_params->type == QED_FILTER_MAC) {
3225 rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
3226 if (rc)
3227 return rc;
3228 }
3229
3230 if (p_params->type == QED_FILTER_VLAN)
3231 rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
3232
3233 return rc;
3234}
3235
Baoyou Xieba569472016-09-09 09:21:15 +08003236static int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
3237 int vfid, struct qed_filter_ucast *params)
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003238{
3239 struct qed_public_vf_info *vf;
3240
3241 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
3242 if (!vf)
3243 return -EINVAL;
3244
3245 /* No real decision to make; Store the configured MAC */
3246 if (params->type == QED_FILTER_MAC ||
3247 params->type == QED_FILTER_MAC_VLAN)
3248 ether_addr_copy(vf->mac, params->mac);
3249
3250 return 0;
3251}
3252
3253static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
3254 struct qed_ptt *p_ptt,
3255 struct qed_vf_info *vf)
3256{
Yuval Mintz08feecd2016-05-11 16:36:20 +03003257 struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003258 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
3259 struct vfpf_ucast_filter_tlv *req;
3260 u8 status = PFVF_STATUS_SUCCESS;
3261 struct qed_filter_ucast params;
3262 int rc;
3263
3264 /* Prepare the unicast filter params */
3265 memset(&params, 0, sizeof(struct qed_filter_ucast));
3266 req = &mbx->req_virt->ucast_filter;
3267 params.opcode = (enum qed_filter_opcode)req->opcode;
3268 params.type = (enum qed_filter_ucast_type)req->type;
3269
3270 params.is_rx_filter = 1;
3271 params.is_tx_filter = 1;
3272 params.vport_to_remove_from = vf->vport_id;
3273 params.vport_to_add_to = vf->vport_id;
3274 memcpy(params.mac, req->mac, ETH_ALEN);
3275 params.vlan = req->vlan;
3276
3277 DP_VERBOSE(p_hwfn,
3278 QED_MSG_IOV,
3279 "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
3280 vf->abs_vf_id, params.opcode, params.type,
3281 params.is_rx_filter ? "RX" : "",
3282 params.is_tx_filter ? "TX" : "",
3283 params.vport_to_add_to,
3284 params.mac[0], params.mac[1],
3285 params.mac[2], params.mac[3],
3286 params.mac[4], params.mac[5], params.vlan);
3287
3288 if (!vf->vport_instance) {
3289 DP_VERBOSE(p_hwfn,
3290 QED_MSG_IOV,
3291 "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
3292 vf->abs_vf_id);
3293 status = PFVF_STATUS_FAILURE;
3294 goto out;
3295 }
3296
Yuval Mintz08feecd2016-05-11 16:36:20 +03003297 /* Update shadow copy of the VF configuration */
3298 if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
3299 status = PFVF_STATUS_FAILURE;
3300 goto out;
3301 }
3302
3303 /* Determine if the unicast filtering is acceptible by PF */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003304 if ((p_bulletin->valid_bitmap & BIT(VLAN_ADDR_FORCED)) &&
Yuval Mintz08feecd2016-05-11 16:36:20 +03003305 (params.type == QED_FILTER_VLAN ||
3306 params.type == QED_FILTER_MAC_VLAN)) {
3307 /* Once VLAN is forced or PVID is set, do not allow
3308 * to add/replace any further VLANs.
3309 */
3310 if (params.opcode == QED_FILTER_ADD ||
3311 params.opcode == QED_FILTER_REPLACE)
3312 status = PFVF_STATUS_FORCED;
3313 goto out;
3314 }
3315
Yuval Mintz1a635e42016-08-15 10:42:43 +03003316 if ((p_bulletin->valid_bitmap & BIT(MAC_ADDR_FORCED)) &&
Yuval Mintzeff16962016-05-11 16:36:21 +03003317 (params.type == QED_FILTER_MAC ||
3318 params.type == QED_FILTER_MAC_VLAN)) {
3319 if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
3320 (params.opcode != QED_FILTER_ADD &&
3321 params.opcode != QED_FILTER_REPLACE))
3322 status = PFVF_STATUS_FORCED;
3323 goto out;
3324 }
3325
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003326 rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
3327 if (rc) {
3328 status = PFVF_STATUS_FAILURE;
3329 goto out;
3330 }
3331
3332 rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
3333 QED_SPQ_MODE_CB, NULL);
3334 if (rc)
3335 status = PFVF_STATUS_FAILURE;
3336
3337out:
3338 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
3339 sizeof(struct pfvf_def_resp_tlv), status);
3340}
3341
Yuval Mintz0b55e272016-05-11 16:36:15 +03003342static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
3343 struct qed_ptt *p_ptt,
3344 struct qed_vf_info *vf)
3345{
3346 int i;
3347
3348 /* Reset the SBs */
3349 for (i = 0; i < vf->num_sbs; i++)
3350 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
3351 vf->igu_sbs[i],
3352 vf->opaque_fid, false);
3353
3354 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
3355 sizeof(struct pfvf_def_resp_tlv),
3356 PFVF_STATUS_SUCCESS);
3357}
3358
3359static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
3360 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
3361{
3362 u16 length = sizeof(struct pfvf_def_resp_tlv);
3363 u8 status = PFVF_STATUS_SUCCESS;
3364
3365 /* Disable Interrupts for VF */
3366 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
3367
3368 /* Reset Permission table */
3369 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
3370
3371 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
3372 length, status);
3373}
3374
3375static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
3376 struct qed_ptt *p_ptt,
3377 struct qed_vf_info *p_vf)
3378{
3379 u16 length = sizeof(struct pfvf_def_resp_tlv);
Yuval Mintz1fe614d2016-06-05 13:11:11 +03003380 u8 status = PFVF_STATUS_SUCCESS;
3381 int rc = 0;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003382
3383 qed_iov_vf_cleanup(p_hwfn, p_vf);
3384
Yuval Mintz1fe614d2016-06-05 13:11:11 +03003385 if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
3386 /* Stopping the VF */
3387 rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
3388 p_vf->opaque_fid);
3389
3390 if (rc) {
3391 DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
3392 rc);
3393 status = PFVF_STATUS_FAILURE;
3394 }
3395
3396 p_vf->state = VF_STOPPED;
3397 }
3398
Yuval Mintz0b55e272016-05-11 16:36:15 +03003399 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
Yuval Mintz1fe614d2016-06-05 13:11:11 +03003400 length, status);
Yuval Mintz0b55e272016-05-11 16:36:15 +03003401}
3402
Rahul Vermabf5a94b2017-07-26 06:07:14 -07003403static void qed_iov_vf_pf_get_coalesce(struct qed_hwfn *p_hwfn,
3404 struct qed_ptt *p_ptt,
3405 struct qed_vf_info *p_vf)
3406{
3407 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
3408 struct pfvf_read_coal_resp_tlv *p_resp;
3409 struct vfpf_read_coal_req_tlv *req;
3410 u8 status = PFVF_STATUS_FAILURE;
3411 struct qed_vf_queue *p_queue;
3412 struct qed_queue_cid *p_cid;
3413 u16 coal = 0, qid, i;
3414 bool b_is_rx;
3415 int rc = 0;
3416
3417 mbx->offset = (u8 *)mbx->reply_virt;
3418 req = &mbx->req_virt->read_coal_req;
3419
3420 qid = req->qid;
3421 b_is_rx = req->is_rx ? true : false;
3422
3423 if (b_is_rx) {
3424 if (!qed_iov_validate_rxq(p_hwfn, p_vf, qid,
3425 QED_IOV_VALIDATE_Q_ENABLE)) {
3426 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3427 "VF[%d]: Invalid Rx queue_id = %d\n",
3428 p_vf->abs_vf_id, qid);
3429 goto send_resp;
3430 }
3431
3432 p_cid = qed_iov_get_vf_rx_queue_cid(&p_vf->vf_queues[qid]);
3433 rc = qed_get_rxq_coalesce(p_hwfn, p_ptt, p_cid, &coal);
3434 if (rc)
3435 goto send_resp;
3436 } else {
3437 if (!qed_iov_validate_txq(p_hwfn, p_vf, qid,
3438 QED_IOV_VALIDATE_Q_ENABLE)) {
3439 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3440 "VF[%d]: Invalid Tx queue_id = %d\n",
3441 p_vf->abs_vf_id, qid);
3442 goto send_resp;
3443 }
3444 for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) {
3445 p_queue = &p_vf->vf_queues[qid];
3446 if ((!p_queue->cids[i].p_cid) ||
3447 (!p_queue->cids[i].b_is_tx))
3448 continue;
3449
3450 p_cid = p_queue->cids[i].p_cid;
3451
3452 rc = qed_get_txq_coalesce(p_hwfn, p_ptt, p_cid, &coal);
3453 if (rc)
3454 goto send_resp;
3455 break;
3456 }
3457 }
3458
3459 status = PFVF_STATUS_SUCCESS;
3460
3461send_resp:
3462 p_resp = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_COALESCE_READ,
3463 sizeof(*p_resp));
3464 p_resp->coal = coal;
3465
3466 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
3467 sizeof(struct channel_list_end_tlv));
3468
3469 qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_resp), status);
3470}
3471
Rahul Verma477f2d12017-07-26 06:07:13 -07003472static void qed_iov_vf_pf_set_coalesce(struct qed_hwfn *p_hwfn,
3473 struct qed_ptt *p_ptt,
3474 struct qed_vf_info *vf)
3475{
3476 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
3477 struct vfpf_update_coalesce *req;
3478 u8 status = PFVF_STATUS_FAILURE;
3479 struct qed_queue_cid *p_cid;
3480 u16 rx_coal, tx_coal;
3481 int rc = 0, i;
3482 u16 qid;
3483
3484 req = &mbx->req_virt->update_coalesce;
3485
3486 rx_coal = req->rx_coal;
3487 tx_coal = req->tx_coal;
3488 qid = req->qid;
3489
3490 if (!qed_iov_validate_rxq(p_hwfn, vf, qid,
3491 QED_IOV_VALIDATE_Q_ENABLE) && rx_coal) {
3492 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3493 "VF[%d]: Invalid Rx queue_id = %d\n",
3494 vf->abs_vf_id, qid);
3495 goto out;
3496 }
3497
3498 if (!qed_iov_validate_txq(p_hwfn, vf, qid,
3499 QED_IOV_VALIDATE_Q_ENABLE) && tx_coal) {
3500 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3501 "VF[%d]: Invalid Tx queue_id = %d\n",
3502 vf->abs_vf_id, qid);
3503 goto out;
3504 }
3505
3506 DP_VERBOSE(p_hwfn,
3507 QED_MSG_IOV,
3508 "VF[%d]: Setting coalesce for VF rx_coal = %d, tx_coal = %d at queue = %d\n",
3509 vf->abs_vf_id, rx_coal, tx_coal, qid);
3510
3511 if (rx_coal) {
3512 p_cid = qed_iov_get_vf_rx_queue_cid(&vf->vf_queues[qid]);
3513
3514 rc = qed_set_rxq_coalesce(p_hwfn, p_ptt, rx_coal, p_cid);
3515 if (rc) {
3516 DP_VERBOSE(p_hwfn,
3517 QED_MSG_IOV,
3518 "VF[%d]: Unable to set rx queue = %d coalesce\n",
3519 vf->abs_vf_id, vf->vf_queues[qid].fw_rx_qid);
3520 goto out;
3521 }
Rahul Vermabf5a94b2017-07-26 06:07:14 -07003522 vf->rx_coal = rx_coal;
Rahul Verma477f2d12017-07-26 06:07:13 -07003523 }
3524
3525 if (tx_coal) {
3526 struct qed_vf_queue *p_queue = &vf->vf_queues[qid];
3527
3528 for (i = 0; i < MAX_QUEUES_PER_QZONE; i++) {
3529 if (!p_queue->cids[i].p_cid)
3530 continue;
3531
3532 if (!p_queue->cids[i].b_is_tx)
3533 continue;
3534
3535 rc = qed_set_txq_coalesce(p_hwfn, p_ptt, tx_coal,
3536 p_queue->cids[i].p_cid);
3537
3538 if (rc) {
3539 DP_VERBOSE(p_hwfn,
3540 QED_MSG_IOV,
3541 "VF[%d]: Unable to set tx queue coalesce\n",
3542 vf->abs_vf_id);
3543 goto out;
3544 }
3545 }
Rahul Vermabf5a94b2017-07-26 06:07:14 -07003546 vf->tx_coal = tx_coal;
Rahul Verma477f2d12017-07-26 06:07:13 -07003547 }
3548
3549 status = PFVF_STATUS_SUCCESS;
3550out:
3551 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_COALESCE_UPDATE,
3552 sizeof(struct pfvf_def_resp_tlv), status);
3553}
Yuval Mintz0b55e272016-05-11 16:36:15 +03003554static int
3555qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
3556 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3557{
3558 int cnt;
3559 u32 val;
3560
3561 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
3562
3563 for (cnt = 0; cnt < 50; cnt++) {
3564 val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
3565 if (!val)
3566 break;
3567 msleep(20);
3568 }
3569 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
3570
3571 if (cnt == 50) {
3572 DP_ERR(p_hwfn,
3573 "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
3574 p_vf->abs_vf_id, val);
3575 return -EBUSY;
3576 }
3577
3578 return 0;
3579}
3580
3581static int
3582qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
3583 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3584{
3585 u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
3586 int i, cnt;
3587
3588 /* Read initial consumers & producers */
3589 for (i = 0; i < MAX_NUM_VOQS; i++) {
3590 u32 prod;
3591
3592 cons[i] = qed_rd(p_hwfn, p_ptt,
3593 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
3594 i * 0x40);
3595 prod = qed_rd(p_hwfn, p_ptt,
3596 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
3597 i * 0x40);
3598 distance[i] = prod - cons[i];
3599 }
3600
3601 /* Wait for consumers to pass the producers */
3602 i = 0;
3603 for (cnt = 0; cnt < 50; cnt++) {
3604 for (; i < MAX_NUM_VOQS; i++) {
3605 u32 tmp;
3606
3607 tmp = qed_rd(p_hwfn, p_ptt,
3608 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
3609 i * 0x40);
3610 if (distance[i] > tmp - cons[i])
3611 break;
3612 }
3613
3614 if (i == MAX_NUM_VOQS)
3615 break;
3616
3617 msleep(20);
3618 }
3619
3620 if (cnt == 50) {
3621 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
3622 p_vf->abs_vf_id, i);
3623 return -EBUSY;
3624 }
3625
3626 return 0;
3627}
3628
3629static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
3630 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3631{
3632 int rc;
3633
3634 rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
3635 if (rc)
3636 return rc;
3637
3638 rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
3639 if (rc)
3640 return rc;
3641
3642 return 0;
3643}
3644
3645static int
3646qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
3647 struct qed_ptt *p_ptt,
3648 u16 rel_vf_id, u32 *ack_vfs)
3649{
3650 struct qed_vf_info *p_vf;
3651 int rc = 0;
3652
3653 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
3654 if (!p_vf)
3655 return 0;
3656
3657 if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
3658 (1ULL << (rel_vf_id % 64))) {
3659 u16 vfid = p_vf->abs_vf_id;
3660
3661 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3662 "VF[%d] - Handling FLR\n", vfid);
3663
3664 qed_iov_vf_cleanup(p_hwfn, p_vf);
3665
3666 /* If VF isn't active, no need for anything but SW */
3667 if (!p_vf->b_init)
3668 goto cleanup;
3669
3670 rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
3671 if (rc)
3672 goto cleanup;
3673
3674 rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
3675 if (rc) {
3676 DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
3677 return rc;
3678 }
3679
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003680 /* Workaround to make VF-PF channel ready, as FW
3681 * doesn't do that as a part of FLR.
3682 */
3683 REG_WR(p_hwfn,
3684 GTT_BAR0_MAP_REG_USDM_RAM +
3685 USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1);
3686
Yuval Mintz0b55e272016-05-11 16:36:15 +03003687 /* VF_STOPPED has to be set only after final cleanup
3688 * but prior to re-enabling the VF.
3689 */
3690 p_vf->state = VF_STOPPED;
3691
3692 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
3693 if (rc) {
3694 DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
3695 vfid);
3696 return rc;
3697 }
3698cleanup:
3699 /* Mark VF for ack and clean pending state */
3700 if (p_vf->state == VF_RESET)
3701 p_vf->state = VF_STOPPED;
Yuval Mintz1a635e42016-08-15 10:42:43 +03003702 ack_vfs[vfid / 32] |= BIT((vfid % 32));
Yuval Mintz0b55e272016-05-11 16:36:15 +03003703 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
3704 ~(1ULL << (rel_vf_id % 64));
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003705 p_vf->vf_mbx.b_pending_msg = false;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003706 }
3707
3708 return rc;
3709}
3710
Baoyou Xieba569472016-09-09 09:21:15 +08003711static int
3712qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003713{
3714 u32 ack_vfs[VF_MAX_STATIC / 32];
3715 int rc = 0;
3716 u16 i;
3717
3718 memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
3719
3720 /* Since BRB <-> PRS interface can't be tested as part of the flr
3721 * polling due to HW limitations, simply sleep a bit. And since
3722 * there's no need to wait per-vf, do it before looping.
3723 */
3724 msleep(100);
3725
3726 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
3727 qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
3728
3729 rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
3730 return rc;
3731}
3732
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003733bool qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
Yuval Mintz0b55e272016-05-11 16:36:15 +03003734{
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003735 bool found = false;
3736 u16 i;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003737
3738 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
3739 for (i = 0; i < (VF_MAX_STATIC / 32); i++)
3740 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3741 "[%08x,...,%08x]: %08x\n",
3742 i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
3743
3744 if (!p_hwfn->cdev->p_iov_info) {
3745 DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003746 return false;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003747 }
3748
3749 /* Mark VFs */
3750 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
3751 struct qed_vf_info *p_vf;
3752 u8 vfid;
3753
3754 p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
3755 if (!p_vf)
3756 continue;
3757
3758 vfid = p_vf->abs_vf_id;
Yuval Mintz1a635e42016-08-15 10:42:43 +03003759 if (BIT((vfid % 32)) & p_disabled_vfs[vfid / 32]) {
Yuval Mintz0b55e272016-05-11 16:36:15 +03003760 u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
3761 u16 rel_vf_id = p_vf->relative_vf_id;
3762
3763 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3764 "VF[%d] [rel %d] got FLR-ed\n",
3765 vfid, rel_vf_id);
3766
3767 p_vf->state = VF_RESET;
3768
3769 /* No need to lock here, since pending_flr should
3770 * only change here and before ACKing MFw. Since
3771 * MFW will not trigger an additional attention for
3772 * VF flr until ACKs, we're safe.
3773 */
3774 p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
Mintz, Yuvalcccf6f52017-03-19 13:08:18 +02003775 found = true;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003776 }
3777 }
3778
3779 return found;
3780}
3781
Yuval Mintz73390ac2016-05-11 16:36:24 +03003782static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
3783 u16 vfid,
3784 struct qed_mcp_link_params *p_params,
3785 struct qed_mcp_link_state *p_link,
3786 struct qed_mcp_link_capabilities *p_caps)
3787{
3788 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
3789 vfid,
3790 false);
3791 struct qed_bulletin_content *p_bulletin;
3792
3793 if (!p_vf)
3794 return;
3795
3796 p_bulletin = p_vf->bulletin.p_virt;
3797
3798 if (p_params)
3799 __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
3800 if (p_link)
3801 __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
3802 if (p_caps)
3803 __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
3804}
3805
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003806static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
3807 struct qed_ptt *p_ptt, int vfid)
3808{
3809 struct qed_iov_vf_mbx *mbx;
3810 struct qed_vf_info *p_vf;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003811
3812 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3813 if (!p_vf)
3814 return;
3815
3816 mbx = &p_vf->vf_mbx;
3817
3818 /* qed_iov_process_mbx_request */
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003819 if (!mbx->b_pending_msg) {
3820 DP_NOTICE(p_hwfn,
3821 "VF[%02x]: Trying to process mailbox message when none is pending\n",
3822 p_vf->abs_vf_id);
3823 return;
3824 }
3825 mbx->b_pending_msg = false;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003826
3827 mbx->first_tlv = mbx->req_virt->first_tlv;
3828
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003829 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3830 "VF[%02x]: Processing mailbox message [type %04x]\n",
3831 p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3832
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003833 /* check if tlv type is known */
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003834 if (qed_iov_tlv_supported(mbx->first_tlv.tl.type) &&
3835 !p_vf->b_malicious) {
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003836 switch (mbx->first_tlv.tl.type) {
3837 case CHANNEL_TLV_ACQUIRE:
3838 qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
3839 break;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003840 case CHANNEL_TLV_VPORT_START:
3841 qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
3842 break;
3843 case CHANNEL_TLV_VPORT_TEARDOWN:
3844 qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
3845 break;
3846 case CHANNEL_TLV_START_RXQ:
3847 qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
3848 break;
3849 case CHANNEL_TLV_START_TXQ:
3850 qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
3851 break;
3852 case CHANNEL_TLV_STOP_RXQS:
3853 qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
3854 break;
3855 case CHANNEL_TLV_STOP_TXQS:
3856 qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
3857 break;
Yuval Mintz17b235c2016-05-11 16:36:18 +03003858 case CHANNEL_TLV_UPDATE_RXQ:
3859 qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
3860 break;
Yuval Mintzdacd88d2016-05-11 16:36:16 +03003861 case CHANNEL_TLV_VPORT_UPDATE:
3862 qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
3863 break;
3864 case CHANNEL_TLV_UCAST_FILTER:
3865 qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
3866 break;
Yuval Mintz0b55e272016-05-11 16:36:15 +03003867 case CHANNEL_TLV_CLOSE:
3868 qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
3869 break;
3870 case CHANNEL_TLV_INT_CLEANUP:
3871 qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
3872 break;
3873 case CHANNEL_TLV_RELEASE:
3874 qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
3875 break;
Chopra, Manisheaf3c0c2017-04-24 10:00:49 -07003876 case CHANNEL_TLV_UPDATE_TUNN_PARAM:
3877 qed_iov_vf_mbx_update_tunn_param(p_hwfn, p_ptt, p_vf);
3878 break;
Rahul Verma477f2d12017-07-26 06:07:13 -07003879 case CHANNEL_TLV_COALESCE_UPDATE:
3880 qed_iov_vf_pf_set_coalesce(p_hwfn, p_ptt, p_vf);
3881 break;
Rahul Vermabf5a94b2017-07-26 06:07:14 -07003882 case CHANNEL_TLV_COALESCE_READ:
3883 qed_iov_vf_pf_get_coalesce(p_hwfn, p_ptt, p_vf);
3884 break;
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03003885 }
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003886 } else if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
3887 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3888 "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n",
3889 p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3890
3891 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3892 mbx->first_tlv.tl.type,
3893 sizeof(struct pfvf_def_resp_tlv),
3894 PFVF_STATUS_MALICIOUS);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003895 } else {
3896 /* unknown TLV - this may belong to a VF driver from the future
3897 * - a version written after this PF driver was written, which
3898 * supports features unknown as of yet. Too bad since we don't
3899 * support them. Or this may be because someone wrote a crappy
3900 * VF driver and is sending garbage over the channel.
3901 */
Yuval Mintz54fdd802016-06-05 13:11:16 +03003902 DP_NOTICE(p_hwfn,
3903 "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n",
3904 p_vf->abs_vf_id,
3905 mbx->first_tlv.tl.type,
3906 mbx->first_tlv.tl.length,
3907 mbx->first_tlv.padding, mbx->first_tlv.reply_address);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003908
Yuval Mintz54fdd802016-06-05 13:11:16 +03003909 /* Try replying in case reply address matches the acquisition's
3910 * posted address.
3911 */
3912 if (p_vf->acquire.first_tlv.reply_address &&
3913 (mbx->first_tlv.reply_address ==
3914 p_vf->acquire.first_tlv.reply_address)) {
3915 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3916 mbx->first_tlv.tl.type,
3917 sizeof(struct pfvf_def_resp_tlv),
3918 PFVF_STATUS_NOT_SUPPORTED);
3919 } else {
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003920 DP_VERBOSE(p_hwfn,
3921 QED_MSG_IOV,
Yuval Mintz54fdd802016-06-05 13:11:16 +03003922 "VF[%02x]: Can't respond to TLV - no valid reply address\n",
3923 p_vf->abs_vf_id);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003924 }
3925 }
3926}
3927
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003928void qed_iov_pf_get_pending_events(struct qed_hwfn *p_hwfn, u64 *events)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003929{
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003930 int i;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003931
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003932 memset(events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003933
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003934 qed_for_each_vf(p_hwfn, i) {
3935 struct qed_vf_info *p_vf;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003936
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003937 p_vf = &p_hwfn->pf_iov_info->vfs_array[i];
3938 if (p_vf->vf_mbx.b_pending_msg)
3939 events[i / 64] |= 1ULL << (i % 64);
3940 }
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003941}
3942
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003943static struct qed_vf_info *qed_sriov_get_vf_from_absid(struct qed_hwfn *p_hwfn,
3944 u16 abs_vfid)
3945{
3946 u8 min = (u8) p_hwfn->cdev->p_iov_info->first_vf_in_pf;
3947
3948 if (!_qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) {
3949 DP_VERBOSE(p_hwfn,
3950 QED_MSG_IOV,
3951 "Got indication for VF [abs 0x%08x] that cannot be handled by PF\n",
3952 abs_vfid);
3953 return NULL;
3954 }
3955
3956 return &p_hwfn->pf_iov_info->vfs_array[(u8) abs_vfid - min];
3957}
3958
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003959static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
3960 u16 abs_vfid, struct regpair *vf_msg)
3961{
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003962 struct qed_vf_info *p_vf = qed_sriov_get_vf_from_absid(p_hwfn,
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003963 abs_vfid);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003964
3965 if (!p_vf)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003966 return 0;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003967
3968 /* List the physical address of the request so that handler
3969 * could later on copy the message from it.
3970 */
3971 p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
3972
3973 /* Mark the event and schedule the workqueue */
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02003974 p_vf->vf_mbx.b_pending_msg = true;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03003975 qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
3976
3977 return 0;
3978}
3979
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003980static void qed_sriov_vfpf_malicious(struct qed_hwfn *p_hwfn,
3981 struct malicious_vf_eqe_data *p_data)
3982{
3983 struct qed_vf_info *p_vf;
3984
3985 p_vf = qed_sriov_get_vf_from_absid(p_hwfn, p_data->vf_id);
3986
3987 if (!p_vf)
3988 return;
3989
Mintz, Yuvale99a21c2017-03-19 13:08:19 +02003990 if (!p_vf->b_malicious) {
3991 DP_NOTICE(p_hwfn,
3992 "VF [%d] - Malicious behavior [%02x]\n",
3993 p_vf->abs_vf_id, p_data->err_id);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04003994
Mintz, Yuvale99a21c2017-03-19 13:08:19 +02003995 p_vf->b_malicious = true;
3996 } else {
3997 DP_INFO(p_hwfn,
3998 "VF [%d] - Malicious behavior [%02x]\n",
3999 p_vf->abs_vf_id, p_data->err_id);
4000 }
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004001}
4002
Michal Kalderon6c9e80e2017-06-20 16:00:06 +03004003static int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
4004 u8 opcode,
4005 __le16 echo,
4006 union event_ring_data *data, u8 fw_return_code)
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004007{
4008 switch (opcode) {
4009 case COMMON_EVENT_VF_PF_CHANNEL:
4010 return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
4011 &data->vf_pf_channel.msg_addr);
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004012 case COMMON_EVENT_MALICIOUS_VF:
4013 qed_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf);
4014 return 0;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004015 default:
4016 DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
4017 opcode);
4018 return -EINVAL;
4019 }
4020}
4021
Yuval Mintz32a47e72016-05-11 16:36:12 +03004022u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
4023{
4024 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
4025 u16 i;
4026
4027 if (!p_iov)
4028 goto out;
4029
4030 for (i = rel_vf_id; i < p_iov->total_vfs; i++)
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004031 if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false))
Yuval Mintz32a47e72016-05-11 16:36:12 +03004032 return i;
4033
4034out:
4035 return MAX_NUM_VFS;
4036}
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004037
4038static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
4039 int vfid)
4040{
4041 struct qed_dmae_params params;
4042 struct qed_vf_info *vf_info;
4043
4044 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
4045 if (!vf_info)
4046 return -EINVAL;
4047
4048 memset(&params, 0, sizeof(struct qed_dmae_params));
4049 params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
4050 params.src_vfid = vf_info->abs_vf_id;
4051
4052 if (qed_dmae_host2host(p_hwfn, ptt,
4053 vf_info->vf_mbx.pending_req,
4054 vf_info->vf_mbx.req_phys,
4055 sizeof(union vfpf_tlvs) / 4, &params)) {
4056 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
4057 "Failed to copy message from VF 0x%02x\n", vfid);
4058
4059 return -EIO;
4060 }
4061
4062 return 0;
4063}
4064
Yuval Mintzeff16962016-05-11 16:36:21 +03004065static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
4066 u8 *mac, int vfid)
4067{
4068 struct qed_vf_info *vf_info;
4069 u64 feature;
4070
4071 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
4072 if (!vf_info) {
4073 DP_NOTICE(p_hwfn->cdev,
4074 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
4075 return;
4076 }
4077
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004078 if (vf_info->b_malicious) {
4079 DP_NOTICE(p_hwfn->cdev,
4080 "Can't set forced MAC to malicious VF [%d]\n", vfid);
4081 return;
4082 }
4083
Yuval Mintzeff16962016-05-11 16:36:21 +03004084 feature = 1 << MAC_ADDR_FORCED;
4085 memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
4086
4087 vf_info->bulletin.p_virt->valid_bitmap |= feature;
4088 /* Forced MAC will disable MAC_ADDR */
Yuval Mintz1a635e42016-08-15 10:42:43 +03004089 vf_info->bulletin.p_virt->valid_bitmap &= ~BIT(VFPF_BULLETIN_MAC_ADDR);
Yuval Mintzeff16962016-05-11 16:36:21 +03004090
4091 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
4092}
4093
Baoyou Xieba569472016-09-09 09:21:15 +08004094static void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
4095 u16 pvid, int vfid)
Yuval Mintz08feecd2016-05-11 16:36:20 +03004096{
4097 struct qed_vf_info *vf_info;
4098 u64 feature;
4099
4100 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
4101 if (!vf_info) {
4102 DP_NOTICE(p_hwfn->cdev,
4103 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
4104 return;
4105 }
4106
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004107 if (vf_info->b_malicious) {
4108 DP_NOTICE(p_hwfn->cdev,
4109 "Can't set forced vlan to malicious VF [%d]\n", vfid);
4110 return;
4111 }
4112
Yuval Mintz08feecd2016-05-11 16:36:20 +03004113 feature = 1 << VLAN_ADDR_FORCED;
4114 vf_info->bulletin.p_virt->pvid = pvid;
4115 if (pvid)
4116 vf_info->bulletin.p_virt->valid_bitmap |= feature;
4117 else
4118 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
4119
4120 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
4121}
4122
Chopra, Manish97379f12017-04-24 10:00:48 -07004123void qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn,
4124 int vfid, u16 vxlan_port, u16 geneve_port)
4125{
4126 struct qed_vf_info *vf_info;
4127
4128 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
4129 if (!vf_info) {
4130 DP_NOTICE(p_hwfn->cdev,
4131 "Can not set udp ports, invalid vfid [%d]\n", vfid);
4132 return;
4133 }
4134
4135 if (vf_info->b_malicious) {
4136 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
4137 "Can not set udp ports to malicious VF [%d]\n",
4138 vfid);
4139 return;
4140 }
4141
4142 vf_info->bulletin.p_virt->vxlan_udp_port = vxlan_port;
4143 vf_info->bulletin.p_virt->geneve_udp_port = geneve_port;
4144}
4145
Yuval Mintz6ddc7602016-05-11 16:36:23 +03004146static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
4147{
4148 struct qed_vf_info *p_vf_info;
4149
4150 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
4151 if (!p_vf_info)
4152 return false;
4153
4154 return !!p_vf_info->vport_instance;
4155}
4156
Baoyou Xieba569472016-09-09 09:21:15 +08004157static bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
Yuval Mintz0b55e272016-05-11 16:36:15 +03004158{
4159 struct qed_vf_info *p_vf_info;
4160
4161 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
4162 if (!p_vf_info)
4163 return true;
4164
4165 return p_vf_info->state == VF_STOPPED;
4166}
4167
Yuval Mintz73390ac2016-05-11 16:36:24 +03004168static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
4169{
4170 struct qed_vf_info *vf_info;
4171
4172 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
4173 if (!vf_info)
4174 return false;
4175
4176 return vf_info->spoof_chk;
4177}
4178
Baoyou Xieba569472016-09-09 09:21:15 +08004179static int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
Yuval Mintz6ddc7602016-05-11 16:36:23 +03004180{
4181 struct qed_vf_info *vf;
4182 int rc = -EINVAL;
4183
4184 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
4185 DP_NOTICE(p_hwfn,
4186 "SR-IOV sanity check failed, can't set spoofchk\n");
4187 goto out;
4188 }
4189
4190 vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
4191 if (!vf)
4192 goto out;
4193
4194 if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
4195 /* After VF VPORT start PF will configure spoof check */
4196 vf->req_spoofchk_val = val;
4197 rc = 0;
4198 goto out;
4199 }
4200
4201 rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
4202
4203out:
4204 return rc;
4205}
4206
Yuval Mintzeff16962016-05-11 16:36:21 +03004207static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
4208 u16 rel_vf_id)
4209{
4210 struct qed_vf_info *p_vf;
4211
4212 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
4213 if (!p_vf || !p_vf->bulletin.p_virt)
4214 return NULL;
4215
Yuval Mintz1a635e42016-08-15 10:42:43 +03004216 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)))
Yuval Mintzeff16962016-05-11 16:36:21 +03004217 return NULL;
4218
4219 return p_vf->bulletin.p_virt->mac;
4220}
4221
Baoyou Xieba569472016-09-09 09:21:15 +08004222static u16
4223qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
Yuval Mintz08feecd2016-05-11 16:36:20 +03004224{
4225 struct qed_vf_info *p_vf;
4226
4227 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
4228 if (!p_vf || !p_vf->bulletin.p_virt)
4229 return 0;
4230
Yuval Mintz1a635e42016-08-15 10:42:43 +03004231 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED)))
Yuval Mintz08feecd2016-05-11 16:36:20 +03004232 return 0;
4233
4234 return p_vf->bulletin.p_virt->pvid;
4235}
4236
Yuval Mintz733def62016-05-11 16:36:22 +03004237static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
4238 struct qed_ptt *p_ptt, int vfid, int val)
4239{
4240 struct qed_vf_info *vf;
4241 u8 abs_vp_id = 0;
4242 int rc;
4243
4244 vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
4245 if (!vf)
4246 return -EINVAL;
4247
4248 rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
4249 if (rc)
4250 return rc;
4251
4252 return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
4253}
4254
Baoyou Xieba569472016-09-09 09:21:15 +08004255static int
4256qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
Yuval Mintz733def62016-05-11 16:36:22 +03004257{
4258 struct qed_vf_info *vf;
4259 u8 vport_id;
4260 int i;
4261
4262 for_each_hwfn(cdev, i) {
4263 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4264
4265 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
4266 DP_NOTICE(p_hwfn,
4267 "SR-IOV sanity check failed, can't set min rate\n");
4268 return -EINVAL;
4269 }
4270 }
4271
4272 vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
4273 vport_id = vf->vport_id;
4274
4275 return qed_configure_vport_wfq(cdev, vport_id, rate);
4276}
4277
Yuval Mintz73390ac2016-05-11 16:36:24 +03004278static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
4279{
4280 struct qed_wfq_data *vf_vp_wfq;
4281 struct qed_vf_info *vf_info;
4282
4283 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
4284 if (!vf_info)
4285 return 0;
4286
4287 vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
4288
4289 if (vf_vp_wfq->configured)
4290 return vf_vp_wfq->min_speed;
4291 else
4292 return 0;
4293}
4294
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004295/**
4296 * qed_schedule_iov - schedules IOV task for VF and PF
4297 * @hwfn: hardware function pointer
4298 * @flag: IOV flag for VF/PF
4299 */
4300void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
4301{
4302 smp_mb__before_atomic();
4303 set_bit(flag, &hwfn->iov_task_flags);
4304 smp_mb__after_atomic();
4305 DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
4306 queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
4307}
4308
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03004309void qed_vf_start_iov_wq(struct qed_dev *cdev)
4310{
4311 int i;
4312
4313 for_each_hwfn(cdev, i)
4314 queue_delayed_work(cdev->hwfns[i].iov_wq,
4315 &cdev->hwfns[i].iov_task, 0);
4316}
4317
Yuval Mintz0b55e272016-05-11 16:36:15 +03004318int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
4319{
4320 int i, j;
4321
4322 for_each_hwfn(cdev, i)
4323 if (cdev->hwfns[i].iov_wq)
4324 flush_workqueue(cdev->hwfns[i].iov_wq);
4325
4326 /* Mark VFs for disablement */
4327 qed_iov_set_vfs_to_disable(cdev, true);
4328
4329 if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
4330 pci_disable_sriov(cdev->pdev);
4331
4332 for_each_hwfn(cdev, i) {
4333 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4334 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
4335
4336 /* Failure to acquire the ptt in 100g creates an odd error
4337 * where the first engine has already relased IOV.
4338 */
4339 if (!ptt) {
4340 DP_ERR(hwfn, "Failed to acquire ptt\n");
4341 return -EBUSY;
4342 }
4343
Yuval Mintz733def62016-05-11 16:36:22 +03004344 /* Clean WFQ db and configure equal weight for all vports */
4345 qed_clean_wfq_db(hwfn, ptt);
4346
Yuval Mintz0b55e272016-05-11 16:36:15 +03004347 qed_for_each_vf(hwfn, j) {
4348 int k;
4349
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004350 if (!qed_iov_is_valid_vfid(hwfn, j, true, false))
Yuval Mintz0b55e272016-05-11 16:36:15 +03004351 continue;
4352
4353 /* Wait until VF is disabled before releasing */
4354 for (k = 0; k < 100; k++) {
4355 if (!qed_iov_is_vf_stopped(hwfn, j))
4356 msleep(20);
4357 else
4358 break;
4359 }
4360
4361 if (k < 100)
4362 qed_iov_release_hw_for_vf(&cdev->hwfns[i],
4363 ptt, j);
4364 else
4365 DP_ERR(hwfn,
4366 "Timeout waiting for VF's FLR to end\n");
4367 }
4368
4369 qed_ptt_release(hwfn, ptt);
4370 }
4371
4372 qed_iov_set_vfs_to_disable(cdev, false);
4373
4374 return 0;
4375}
4376
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004377static void qed_sriov_enable_qid_config(struct qed_hwfn *hwfn,
4378 u16 vfid,
4379 struct qed_iov_vf_init_params *params)
4380{
4381 u16 base, i;
4382
4383 /* Since we have an equal resource distribution per-VF, and we assume
4384 * PF has acquired the QED_PF_L2_QUE first queues, we start setting
4385 * sequentially from there.
4386 */
4387 base = FEAT_NUM(hwfn, QED_PF_L2_QUE) + vfid * params->num_queues;
4388
4389 params->rel_vf_id = vfid;
4390 for (i = 0; i < params->num_queues; i++) {
4391 params->req_rx_queue[i] = base + i;
4392 params->req_tx_queue[i] = base + i;
4393 }
4394}
4395
Yuval Mintz0b55e272016-05-11 16:36:15 +03004396static int qed_sriov_enable(struct qed_dev *cdev, int num)
4397{
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004398 struct qed_iov_vf_init_params params;
Yuval Mintz0b55e272016-05-11 16:36:15 +03004399 int i, j, rc;
4400
4401 if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
4402 DP_NOTICE(cdev, "Can start at most %d VFs\n",
4403 RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
4404 return -EINVAL;
4405 }
4406
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004407 memset(&params, 0, sizeof(params));
4408
Yuval Mintz0b55e272016-05-11 16:36:15 +03004409 /* Initialize HW for VF access */
4410 for_each_hwfn(cdev, j) {
4411 struct qed_hwfn *hwfn = &cdev->hwfns[j];
4412 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
Mintz, Yuval5a1f9652016-10-31 07:14:26 +02004413
4414 /* Make sure not to use more than 16 queues per VF */
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004415 params.num_queues = min_t(int,
4416 FEAT_NUM(hwfn, QED_VF_L2_QUE) / num,
4417 16);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004418
4419 if (!ptt) {
4420 DP_ERR(hwfn, "Failed to acquire ptt\n");
4421 rc = -EBUSY;
4422 goto err;
4423 }
4424
Yuval Mintz0b55e272016-05-11 16:36:15 +03004425 for (i = 0; i < num; i++) {
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004426 if (!qed_iov_is_valid_vfid(hwfn, i, false, true))
Yuval Mintz0b55e272016-05-11 16:36:15 +03004427 continue;
4428
Mintz, Yuval3da7a372016-11-29 16:47:06 +02004429 qed_sriov_enable_qid_config(hwfn, i, &params);
4430 rc = qed_iov_init_hw_for_vf(hwfn, ptt, &params);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004431 if (rc) {
4432 DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
4433 qed_ptt_release(hwfn, ptt);
4434 goto err;
4435 }
4436 }
4437
4438 qed_ptt_release(hwfn, ptt);
4439 }
4440
4441 /* Enable SRIOV PCIe functions */
4442 rc = pci_enable_sriov(cdev->pdev, num);
4443 if (rc) {
4444 DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
4445 goto err;
4446 }
4447
4448 return num;
4449
4450err:
4451 qed_sriov_disable(cdev, false);
4452 return rc;
4453}
4454
4455static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
4456{
4457 if (!IS_QED_SRIOV(cdev)) {
4458 DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
4459 return -EOPNOTSUPP;
4460 }
4461
4462 if (num_vfs_param)
4463 return qed_sriov_enable(cdev, num_vfs_param);
4464 else
4465 return qed_sriov_disable(cdev, true);
4466}
4467
Yuval Mintzeff16962016-05-11 16:36:21 +03004468static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
4469{
4470 int i;
4471
4472 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
4473 DP_VERBOSE(cdev, QED_MSG_IOV,
4474 "Cannot set a VF MAC; Sriov is not enabled\n");
4475 return -EINVAL;
4476 }
4477
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004478 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
Yuval Mintzeff16962016-05-11 16:36:21 +03004479 DP_VERBOSE(cdev, QED_MSG_IOV,
4480 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
4481 return -EINVAL;
4482 }
4483
4484 for_each_hwfn(cdev, i) {
4485 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4486 struct qed_public_vf_info *vf_info;
4487
4488 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
4489 if (!vf_info)
4490 continue;
4491
4492 /* Set the forced MAC, and schedule the IOV task */
4493 ether_addr_copy(vf_info->forced_mac, mac);
4494 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
4495 }
4496
4497 return 0;
4498}
4499
Yuval Mintz08feecd2016-05-11 16:36:20 +03004500static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
4501{
4502 int i;
4503
4504 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
4505 DP_VERBOSE(cdev, QED_MSG_IOV,
4506 "Cannot set a VF MAC; Sriov is not enabled\n");
4507 return -EINVAL;
4508 }
4509
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004510 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
Yuval Mintz08feecd2016-05-11 16:36:20 +03004511 DP_VERBOSE(cdev, QED_MSG_IOV,
4512 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
4513 return -EINVAL;
4514 }
4515
4516 for_each_hwfn(cdev, i) {
4517 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4518 struct qed_public_vf_info *vf_info;
4519
4520 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
4521 if (!vf_info)
4522 continue;
4523
4524 /* Set the forced vlan, and schedule the IOV task */
4525 vf_info->forced_vlan = vid;
4526 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
4527 }
4528
4529 return 0;
4530}
4531
Yuval Mintz73390ac2016-05-11 16:36:24 +03004532static int qed_get_vf_config(struct qed_dev *cdev,
4533 int vf_id, struct ifla_vf_info *ivi)
4534{
4535 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
4536 struct qed_public_vf_info *vf_info;
4537 struct qed_mcp_link_state link;
4538 u32 tx_rate;
4539
4540 /* Sanitize request */
4541 if (IS_VF(cdev))
4542 return -EINVAL;
4543
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004544 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, false)) {
Yuval Mintz73390ac2016-05-11 16:36:24 +03004545 DP_VERBOSE(cdev, QED_MSG_IOV,
4546 "VF index [%d] isn't active\n", vf_id);
4547 return -EINVAL;
4548 }
4549
4550 vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
4551
4552 qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
4553
4554 /* Fill information about VF */
4555 ivi->vf = vf_id;
4556
4557 if (is_valid_ether_addr(vf_info->forced_mac))
4558 ether_addr_copy(ivi->mac, vf_info->forced_mac);
4559 else
4560 ether_addr_copy(ivi->mac, vf_info->mac);
4561
4562 ivi->vlan = vf_info->forced_vlan;
4563 ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
4564 ivi->linkstate = vf_info->link_state;
4565 tx_rate = vf_info->tx_rate;
4566 ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
4567 ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
4568
4569 return 0;
4570}
4571
Yuval Mintz36558c32016-05-11 16:36:17 +03004572void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
4573{
Mintz, Yuvale50728e2017-03-19 13:08:20 +02004574 struct qed_hwfn *lead_hwfn = QED_LEADING_HWFN(hwfn->cdev);
Yuval Mintz36558c32016-05-11 16:36:17 +03004575 struct qed_mcp_link_capabilities caps;
4576 struct qed_mcp_link_params params;
4577 struct qed_mcp_link_state link;
4578 int i;
4579
4580 if (!hwfn->pf_iov_info)
4581 return;
4582
4583 /* Update bulletin of all future possible VFs with link configuration */
4584 for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
Yuval Mintz733def62016-05-11 16:36:22 +03004585 struct qed_public_vf_info *vf_info;
4586
4587 vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
4588 if (!vf_info)
4589 continue;
4590
Mintz, Yuvale50728e2017-03-19 13:08:20 +02004591 /* Only hwfn0 is actually interested in the link speed.
4592 * But since only it would receive an MFW indication of link,
4593 * need to take configuration from it - otherwise things like
4594 * rate limiting for hwfn1 VF would not work.
4595 */
4596 memcpy(&params, qed_mcp_get_link_params(lead_hwfn),
4597 sizeof(params));
4598 memcpy(&link, qed_mcp_get_link_state(lead_hwfn), sizeof(link));
4599 memcpy(&caps, qed_mcp_get_link_capabilities(lead_hwfn),
Yuval Mintz36558c32016-05-11 16:36:17 +03004600 sizeof(caps));
4601
Yuval Mintz733def62016-05-11 16:36:22 +03004602 /* Modify link according to the VF's configured link state */
4603 switch (vf_info->link_state) {
4604 case IFLA_VF_LINK_STATE_DISABLE:
4605 link.link_up = false;
4606 break;
4607 case IFLA_VF_LINK_STATE_ENABLE:
4608 link.link_up = true;
4609 /* Set speed according to maximum supported by HW.
4610 * that is 40G for regular devices and 100G for CMT
4611 * mode devices.
4612 */
4613 link.speed = (hwfn->cdev->num_hwfns > 1) ?
4614 100000 : 40000;
4615 default:
4616 /* In auto mode pass PF link image to VF */
4617 break;
4618 }
4619
4620 if (link.link_up && vf_info->tx_rate) {
4621 struct qed_ptt *ptt;
4622 int rate;
4623
4624 rate = min_t(int, vf_info->tx_rate, link.speed);
4625
4626 ptt = qed_ptt_acquire(hwfn);
4627 if (!ptt) {
4628 DP_NOTICE(hwfn, "Failed to acquire PTT\n");
4629 return;
4630 }
4631
4632 if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
4633 vf_info->tx_rate = rate;
4634 link.speed = rate;
4635 }
4636
4637 qed_ptt_release(hwfn, ptt);
4638 }
4639
Yuval Mintz36558c32016-05-11 16:36:17 +03004640 qed_iov_set_link(hwfn, i, &params, &link, &caps);
4641 }
4642
4643 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4644}
4645
Yuval Mintz733def62016-05-11 16:36:22 +03004646static int qed_set_vf_link_state(struct qed_dev *cdev,
4647 int vf_id, int link_state)
4648{
4649 int i;
4650
4651 /* Sanitize request */
4652 if (IS_VF(cdev))
4653 return -EINVAL;
4654
Yuval Mintz7eff82b2016-10-14 05:19:22 -04004655 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, true)) {
Yuval Mintz733def62016-05-11 16:36:22 +03004656 DP_VERBOSE(cdev, QED_MSG_IOV,
4657 "VF index [%d] isn't active\n", vf_id);
4658 return -EINVAL;
4659 }
4660
4661 /* Handle configuration of link state */
4662 for_each_hwfn(cdev, i) {
4663 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4664 struct qed_public_vf_info *vf;
4665
4666 vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
4667 if (!vf)
4668 continue;
4669
4670 if (vf->link_state == link_state)
4671 continue;
4672
4673 vf->link_state = link_state;
4674 qed_inform_vf_link_state(&cdev->hwfns[i]);
4675 }
4676
4677 return 0;
4678}
4679
Yuval Mintz6ddc7602016-05-11 16:36:23 +03004680static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
4681{
4682 int i, rc = -EINVAL;
4683
4684 for_each_hwfn(cdev, i) {
4685 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4686
4687 rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
4688 if (rc)
4689 break;
4690 }
4691
4692 return rc;
4693}
4694
Yuval Mintz733def62016-05-11 16:36:22 +03004695static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
4696{
4697 int i;
4698
4699 for_each_hwfn(cdev, i) {
4700 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4701 struct qed_public_vf_info *vf;
4702
4703 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
4704 DP_NOTICE(p_hwfn,
4705 "SR-IOV sanity check failed, can't set tx rate\n");
4706 return -EINVAL;
4707 }
4708
4709 vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
4710
4711 vf->tx_rate = rate;
4712
4713 qed_inform_vf_link_state(p_hwfn);
4714 }
4715
4716 return 0;
4717}
4718
4719static int qed_set_vf_rate(struct qed_dev *cdev,
4720 int vfid, u32 min_rate, u32 max_rate)
4721{
4722 int rc_min = 0, rc_max = 0;
4723
4724 if (max_rate)
4725 rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
4726
4727 if (min_rate)
4728 rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
4729
4730 if (rc_max | rc_min)
4731 return -EINVAL;
4732
4733 return 0;
4734}
4735
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004736static int qed_set_vf_trust(struct qed_dev *cdev, int vfid, bool trust)
4737{
4738 int i;
4739
4740 for_each_hwfn(cdev, i) {
4741 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4742 struct qed_public_vf_info *vf;
4743
4744 if (!qed_iov_pf_sanity_check(hwfn, vfid)) {
4745 DP_NOTICE(hwfn,
4746 "SR-IOV sanity check failed, can't set trust\n");
4747 return -EINVAL;
4748 }
4749
4750 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
4751
4752 if (vf->is_trusted_request == trust)
4753 return 0;
4754 vf->is_trusted_request = trust;
4755
4756 qed_schedule_iov(hwfn, QED_IOV_WQ_TRUST_FLAG);
4757 }
4758
4759 return 0;
4760}
4761
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004762static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
4763{
4764 u64 events[QED_VF_ARRAY_LENGTH];
4765 struct qed_ptt *ptt;
4766 int i;
4767
4768 ptt = qed_ptt_acquire(hwfn);
4769 if (!ptt) {
4770 DP_VERBOSE(hwfn, QED_MSG_IOV,
4771 "Can't acquire PTT; re-scheduling\n");
4772 qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
4773 return;
4774 }
4775
Mintz, Yuvalfd3c6152017-02-27 11:06:32 +02004776 qed_iov_pf_get_pending_events(hwfn, events);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004777
4778 DP_VERBOSE(hwfn, QED_MSG_IOV,
4779 "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
4780 events[0], events[1], events[2]);
4781
4782 qed_for_each_vf(hwfn, i) {
4783 /* Skip VFs with no pending messages */
4784 if (!(events[i / 64] & (1ULL << (i % 64))))
4785 continue;
4786
4787 DP_VERBOSE(hwfn, QED_MSG_IOV,
4788 "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
4789 i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4790
4791 /* Copy VF's message to PF's request buffer for that VF */
4792 if (qed_iov_copy_vf_msg(hwfn, ptt, i))
4793 continue;
4794
4795 qed_iov_process_mbx_req(hwfn, ptt, i);
4796 }
4797
4798 qed_ptt_release(hwfn, ptt);
4799}
4800
Yuval Mintz08feecd2016-05-11 16:36:20 +03004801static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
4802{
4803 int i;
4804
4805 qed_for_each_vf(hwfn, i) {
4806 struct qed_public_vf_info *info;
4807 bool update = false;
Yuval Mintzeff16962016-05-11 16:36:21 +03004808 u8 *mac;
Yuval Mintz08feecd2016-05-11 16:36:20 +03004809
4810 info = qed_iov_get_public_vf_info(hwfn, i, true);
4811 if (!info)
4812 continue;
4813
4814 /* Update data on bulletin board */
Yuval Mintzeff16962016-05-11 16:36:21 +03004815 mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
4816 if (is_valid_ether_addr(info->forced_mac) &&
4817 (!mac || !ether_addr_equal(mac, info->forced_mac))) {
4818 DP_VERBOSE(hwfn,
4819 QED_MSG_IOV,
4820 "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
4821 i,
4822 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4823
4824 /* Update bulletin board with forced MAC */
4825 qed_iov_bulletin_set_forced_mac(hwfn,
4826 info->forced_mac, i);
4827 update = true;
4828 }
Yuval Mintz08feecd2016-05-11 16:36:20 +03004829
4830 if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
4831 info->forced_vlan) {
4832 DP_VERBOSE(hwfn,
4833 QED_MSG_IOV,
4834 "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
4835 info->forced_vlan,
4836 i,
4837 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4838 qed_iov_bulletin_set_forced_vlan(hwfn,
4839 info->forced_vlan, i);
4840 update = true;
4841 }
4842
4843 if (update)
4844 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4845 }
4846}
4847
Yuval Mintz36558c32016-05-11 16:36:17 +03004848static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
4849{
4850 struct qed_ptt *ptt;
4851 int i;
4852
4853 ptt = qed_ptt_acquire(hwfn);
4854 if (!ptt) {
4855 DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
4856 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4857 return;
4858 }
4859
4860 qed_for_each_vf(hwfn, i)
4861 qed_iov_post_vf_bulletin(hwfn, i, ptt);
4862
4863 qed_ptt_release(hwfn, ptt);
4864}
4865
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004866static void qed_iov_handle_trust_change(struct qed_hwfn *hwfn)
4867{
4868 struct qed_sp_vport_update_params params;
4869 struct qed_filter_accept_flags *flags;
4870 struct qed_public_vf_info *vf_info;
4871 struct qed_vf_info *vf;
4872 u8 mask;
4873 int i;
4874
4875 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
4876 flags = &params.accept_flags;
4877
4878 qed_for_each_vf(hwfn, i) {
4879 /* Need to make sure current requested configuration didn't
4880 * flip so that we'll end up configuring something that's not
4881 * needed.
4882 */
4883 vf_info = qed_iov_get_public_vf_info(hwfn, i, true);
4884 if (vf_info->is_trusted_configured ==
4885 vf_info->is_trusted_request)
4886 continue;
4887 vf_info->is_trusted_configured = vf_info->is_trusted_request;
4888
4889 /* Validate that the VF has a configured vport */
4890 vf = qed_iov_get_vf_info(hwfn, i, true);
4891 if (!vf->vport_instance)
4892 continue;
4893
4894 memset(&params, 0, sizeof(params));
4895 params.opaque_fid = vf->opaque_fid;
4896 params.vport_id = vf->vport_id;
4897
4898 if (vf_info->rx_accept_mode & mask) {
4899 flags->update_rx_mode_config = 1;
4900 flags->rx_accept_filter = vf_info->rx_accept_mode;
4901 }
4902
4903 if (vf_info->tx_accept_mode & mask) {
4904 flags->update_tx_mode_config = 1;
4905 flags->tx_accept_filter = vf_info->tx_accept_mode;
4906 }
4907
4908 /* Remove if needed; Otherwise this would set the mask */
4909 if (!vf_info->is_trusted_configured) {
4910 flags->rx_accept_filter &= ~mask;
4911 flags->tx_accept_filter &= ~mask;
4912 }
4913
4914 if (flags->update_rx_mode_config ||
4915 flags->update_tx_mode_config)
4916 qed_sp_vport_update(hwfn, &params,
4917 QED_SPQ_MODE_EBLOCK, NULL);
4918 }
4919}
4920
Baoyou Xieba569472016-09-09 09:21:15 +08004921static void qed_iov_pf_task(struct work_struct *work)
4922
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004923{
4924 struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
4925 iov_task.work);
Yuval Mintz0b55e272016-05-11 16:36:15 +03004926 int rc;
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004927
4928 if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
4929 return;
4930
Yuval Mintz0b55e272016-05-11 16:36:15 +03004931 if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
4932 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
4933
4934 if (!ptt) {
4935 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4936 return;
4937 }
4938
4939 rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
4940 if (rc)
4941 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4942
4943 qed_ptt_release(hwfn, ptt);
4944 }
4945
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004946 if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
4947 qed_handle_vf_msg(hwfn);
Yuval Mintz08feecd2016-05-11 16:36:20 +03004948
4949 if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
4950 &hwfn->iov_task_flags))
4951 qed_handle_pf_set_vf_unicast(hwfn);
4952
Yuval Mintz36558c32016-05-11 16:36:17 +03004953 if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
4954 &hwfn->iov_task_flags))
4955 qed_handle_bulletin_post(hwfn);
Mintz, Yuvalf990c822017-01-01 13:57:08 +02004956
4957 if (test_and_clear_bit(QED_IOV_WQ_TRUST_FLAG, &hwfn->iov_task_flags))
4958 qed_iov_handle_trust_change(hwfn);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004959}
4960
4961void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
4962{
4963 int i;
4964
4965 for_each_hwfn(cdev, i) {
4966 if (!cdev->hwfns[i].iov_wq)
4967 continue;
4968
4969 if (schedule_first) {
4970 qed_schedule_iov(&cdev->hwfns[i],
4971 QED_IOV_WQ_STOP_WQ_FLAG);
4972 cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
4973 }
4974
4975 flush_workqueue(cdev->hwfns[i].iov_wq);
4976 destroy_workqueue(cdev->hwfns[i].iov_wq);
4977 }
4978}
4979
4980int qed_iov_wq_start(struct qed_dev *cdev)
4981{
4982 char name[NAME_SIZE];
4983 int i;
4984
4985 for_each_hwfn(cdev, i) {
4986 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4987
Yuval Mintz36558c32016-05-11 16:36:17 +03004988 /* PFs needs a dedicated workqueue only if they support IOV.
4989 * VFs always require one.
4990 */
4991 if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
Yuval Mintz37bff2b2016-05-11 16:36:13 +03004992 continue;
4993
4994 snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
4995 cdev->pdev->bus->number,
4996 PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
4997
4998 p_hwfn->iov_wq = create_singlethread_workqueue(name);
4999 if (!p_hwfn->iov_wq) {
5000 DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
5001 return -ENOMEM;
5002 }
5003
Yuval Mintz36558c32016-05-11 16:36:17 +03005004 if (IS_PF(cdev))
5005 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
5006 else
5007 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
Yuval Mintz37bff2b2016-05-11 16:36:13 +03005008 }
5009
5010 return 0;
5011}
Yuval Mintz0b55e272016-05-11 16:36:15 +03005012
5013const struct qed_iov_hv_ops qed_iov_ops_pass = {
5014 .configure = &qed_sriov_configure,
Yuval Mintzeff16962016-05-11 16:36:21 +03005015 .set_mac = &qed_sriov_pf_set_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03005016 .set_vlan = &qed_sriov_pf_set_vlan,
Yuval Mintz73390ac2016-05-11 16:36:24 +03005017 .get_config = &qed_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03005018 .set_link_state = &qed_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03005019 .set_spoof = &qed_spoof_configure,
Yuval Mintz733def62016-05-11 16:36:22 +03005020 .set_rate = &qed_set_vf_rate,
Mintz, Yuvalf990c822017-01-01 13:57:08 +02005021 .set_trust = &qed_set_vf_trust,
Yuval Mintz0b55e272016-05-11 16:36:15 +03005022};