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Syed Rameez Mustafa3971c142013-01-09 19:04:53 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafad3935822012-10-09 11:23:20 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070014
15/ {
16 model = "Qualcomm MSM 8610";
17 compatible = "qcom,msm8610";
18 interrupt-parent = <&intc>;
19
20 memory {
21 qsecom_mem: qsecom_region {
22 linux,contiguous-region;
23 reg = <0 0x100000>;
24 label = "qsecom_mem";
25 };
26 };
27
28 aliases {
29 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
30 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
31 };
32
33 soc: soc { };
34};
35
Lokesh Kumar Aakulu25213502013-05-07 17:43:03 -070036/include/ "msm8610-camera.dtsi"
Olav Haugan54166782013-01-28 16:59:51 -080037/include/ "msm-iommu-v0.dtsi"
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -080038/include/ "msm8610-ion.dtsi"
Lokesh Batra8d55eec2013-02-26 11:31:21 -080039/include/ "msm8610-gpu.dtsi"
Matt Wagantall1bf56932012-11-29 15:03:29 -080040/include/ "msm-gdsc.dtsi"
Aparna Dasd16555b2013-03-06 15:46:38 -080041/include/ "msm8610-coresight.dtsi"
Praveen Chidambarama1f98282012-11-29 09:56:57 -070042/include/ "msm8610-pm.dtsi"
Jeff Hugo53dcf0f2013-03-20 12:37:50 -060043/include/ "msm8610-smp2p.dtsi"
Gagan Macbced3872013-02-04 19:18:04 -070044/include/ "msm8610-bus.dtsi"
Xiaoming Zhou5f37a252013-04-09 21:11:50 -040045/include/ "msm8610-mdss.dtsi"
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070046
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070047&soc {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 ranges;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070051
52 intc: interrupt-controller@f9000000 {
53 compatible = "qcom,msm-qgic2";
54 interrupt-controller;
55 #interrupt-cells = <3>;
56 reg = <0xf9000000 0x1000>,
57 <0xf9002000 0x1000>;
58 };
59
60 msmgpio: gpio@fd510000 {
61 compatible = "qcom,msm-gpio";
62 interrupt-controller;
63 #interrupt-cells = <2>;
64 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080065 gpio-controller;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070066 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080067 ngpio = <102>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080068 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080069 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070070 };
71
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -070072 qcom,mpm2-sleep-counter@fc4a3000 {
73 compatible = "qcom,mpm2-sleep-counter";
74 reg = <0xfc4a3000 0x1000>;
75 clock-frequency = <32768>;
76 };
77
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070078 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080079 compatible = "arm,armv7-timer";
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070080 interrupts = <1 2 0 1 3 0>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070081 clock-frequency = <19200000>;
82 };
83
Stephen Boyda61ac642013-04-10 14:20:27 -070084 timer@f9020000 {
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
88 compatible = "arm,armv7-timer-mem";
89 reg = <0xf9020000 0x1000>;
90 clock-frequency = <19200000>;
91
92 frame@f9021000 {
93 frame-number = <0>;
94 interrupts = <0 8 0x4>,
95 <0 7 0x4>;
96 reg = <0xf9021000 0x1000>,
97 <0xf9022000 0x1000>;
98 };
99
100 frame@f9023000 {
101 frame-number = <1>;
102 interrupts = <0 9 0x4>;
103 reg = <0xf9023000 0x1000>;
104 status = "disabled";
105 };
106
107 frame@f9024000 {
108 frame-number = <2>;
109 interrupts = <0 10 0x4>;
110 reg = <0xf9024000 0x1000>;
111 status = "disabled";
112 };
113
114 frame@f9025000 {
115 frame-number = <3>;
116 interrupts = <0 11 0x4>;
117 reg = <0xf9025000 0x1000>;
118 status = "disabled";
119 };
120
121 frame@f9026000 {
122 frame-number = <4>;
123 interrupts = <0 12 0x4>;
124 reg = <0xf9026000 0x1000>;
125 status = "disabled";
126 };
127
128 frame@f9027000 {
129 frame-number = <5>;
130 interrupts = <0 13 0x4>;
131 reg = <0xf9027000 0x1000>;
132 status = "disabled";
133 };
134
135 frame@f9028000 {
136 frame-number = <6>;
137 interrupts = <0 14 0x4>;
138 reg = <0xf9028000 0x1000>;
139 status = "disabled";
140 };
141 };
142
Arun Menon2a7e3772013-01-17 12:06:59 -0800143 qcom,msm-adsp-loader {
144 compatible = "qcom,adsp-loader";
145 qcom,adsp-state = <0>;
146 };
147
Fred Ohe49386d2013-05-02 17:53:27 -0700148 qcom,msm-audio-ion {
149 compatible = "qcom,msm-audio-ion";
150 qcom,smmu-enabled;
151 };
152
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800153 qcom,msm-imem@fe805000 {
154 compatible = "qcom,msm-imem";
155 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
156 };
157
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700158 serial@f991f000 {
159 compatible = "qcom,msm-lsuart-v14";
160 reg = <0xf991f000 0x1000>;
161 interrupts = <0 109 0>;
162 status = "disabled";
163 };
Mayank Rana55db0cb2012-10-15 16:50:06 +0530164
Hanumant Singh6b346712013-04-09 16:26:09 -0700165 serial@f991e000 {
166 compatible = "qcom,msm-lsuart-v14";
167 reg = <0xf991e000 0x1000>;
168 interrupts = <0 108 0>;
169 status = "disabled";
170 };
171
Arun Menon8e25dd42013-01-11 14:11:54 -0800172 qcom,vidc@fdc00000 {
173 compatible = "qcom,msm-vidc";
Sachin Shah4e1c8fe2013-03-20 15:10:05 -0700174 qcom,vidc-ns-map = <0x40000000 0x40000000>;
175 qcom,iommu-groups = <&q6_domain_ns>;
176 qcom,iommu-group-buffer-types = <0xfff>;
177 qcom,buffer-type-tz-usage-map = <0x1 0x1>,
178 <0x1fe 0x2>;
179 qcom,hfi = "q6";
Arun Menonede58642013-04-26 14:19:06 -0700180 qcom,max-hw-load = <108000>; /* 720p @ 30 * 1 */
Arun Menon8e25dd42013-01-11 14:11:54 -0800181 };
182
Vamsi Krishna872fbbc2013-04-09 18:04:52 -0700183 qcom,usbbam@f9a44000 {
184 compatible = "qcom,usb-bam-msm";
185 reg = <0xf9a44000 0x11000>;
186 reg-names = "hsusb";
187 interrupts = <0 135 0>;
188 interrupt-names = "hsusb";
189 qcom,usb-bam-num-pipes = <16>;
190 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
191 qcom,ignore-core-reset-ack;
192 qcom,disable-clk-gating;
193
194 qcom,pipe0 {
195 label = "hsusb-qdss-in-0";
196 qcom,usb-bam-mem-type = <3>;
197 qcom,bam-type = <1>;
198 qcom,dir = <1>;
199 qcom,pipe-num = <0>;
200 qcom,peer-bam = <1>;
201 qcom,src-bam-physical-address = <0xfc37c000>;
202 qcom,src-bam-pipe-index = <0>;
203 qcom,dst-bam-physical-address = <0xf9a44000>;
204 qcom,dst-bam-pipe-index = <2>;
205 qcom,data-fifo-offset = <0x0>;
206 qcom,data-fifo-size = <0x600>;
207 qcom,descriptor-fifo-offset = <0x600>;
208 qcom,descriptor-fifo-size = <0x200>;
209 };
210 };
211
Mayank Rana55db0cb2012-10-15 16:50:06 +0530212 usb@f9a55000 {
213 compatible = "qcom,hsusb-otg";
214 reg = <0xf9a55000 0x400>;
Mayank Rana33d26662013-01-17 10:22:25 +0530215 interrupts = <0 134 0>, <0 140 0>;
216 interrupt-names = "core_irq", "async_irq";
Mayank Rana76c6ce22012-11-07 17:07:58 +0530217 HSUSB_VDDCX-supply = <&pm8110_s1>;
218 HSUSB_1p8-supply = <&pm8110_l10>;
219 HSUSB_3p3-supply = <&pm8110_l20>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530220
221 qcom,hsusb-otg-phy-type = <2>;
222 qcom,hsusb-otg-mode = <1>;
Mayank Rana29bb9f22013-04-04 18:25:12 +0530223 qcom,hsusb-otg-otg-control = <2>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530224 qcom,hsusb-otg-disable-reset;
Mayank Ranaa5491122013-04-04 18:32:25 +0530225 qcom,dp-manual-pullup;
Mayank Ranaf9295802013-04-04 18:36:44 +0530226
227 qcom,msm-bus,name = "usb2";
228 qcom,msm-bus,num-cases = <2>;
229 qcom,msm-bus,active-only = <0>;
230 qcom,msm-bus,num-paths = <1>;
231 qcom,msm-bus,vectors-KBps =
232 <87 512 0 0>,
233 <87 512 60000 960000>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530234 };
235
Mayank Ranacc0c5452013-01-29 16:41:53 +0530236 android_usb@fe8050c8 {
Mayank Rana55db0cb2012-10-15 16:50:06 +0530237 compatible = "qcom,android-usb";
Mayank Ranacc0c5452013-01-29 16:41:53 +0530238 reg = <0xfe8050c8 0xc8>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530239 };
240
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700241 sdcc1: qcom,sdcc@f9824000 {
242 cell-index = <1>; /* SDC1 eMMC slot */
243 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800244 reg = <0xf9824000 0x800>,
245 <0xf9824800 0x100>,
246 <0xf9804000 0x7000>;
247 reg-names = "core_mem", "dml_mem", "bam_mem";
248 interrupts = <0 123 0>, <0 137 0>;
249 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700250
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700251 vdd-supply = <&pm8110_l17>;
252 qcom,vdd-always-on;
253 qcom,vdd-lpm-sup;
254 qcom,vdd-voltage-level = <2900000 2900000>;
255 qcom,vdd-current-level = <9000 400000>;
256
257 vdd-io-supply = <&pm8110_l6>;
258 qcom,vdd-io-always-on;
259 qcom,vdd-io-lpm-sup;
260 qcom,vdd-io-voltage-level = <1800000 1800000>;
261 qcom,vdd-io-current-level = <9000 60000>;
262
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700263 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
264 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700265 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700266 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700267
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700268 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700269 qcom,sup-voltages = <2900 2900>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700270 qcom,bus-width = <8>;
271 qcom,nonremovable;
272 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700273
274 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700275 };
276
277 sdcc2: qcom,sdcc@f98a4000 {
278 cell-index = <2>; /* SDC2 SD card slot */
279 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800280 reg = <0xf98a4000 0x800>,
281 <0xf98a4800 0x100>,
282 <0xf9884000 0x7000>;
283 reg-names = "core_mem", "dml_mem", "bam_mem";
284 interrupts = <0 125 0>, <0 220 0>;
285 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700286
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700287 vdd-supply = <&pm8110_l18>;
288 qcom,vdd-voltage-level = <2950000 2950000>;
289 qcom,vdd-current-level = <9000 400000>;
290
291 vdd-io-supply = <&pm8110_l21>;
292 qcom,vdd-io-voltage-level = <1800000 2950000>;
293 qcom,vdd-io-current-level = <9000 50000>;
294
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700295 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
296 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700297 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700298 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700299
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700300 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
301 qcom,sup-voltages = <2950 2950>;
302 qcom,bus-width = <4>;
303 qcom,xpc;
304 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
305 qcom,current-limit = <800>;
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700306
307 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700308 };
309
Venkat Gopalakrishnana6ce5f22013-04-04 14:24:57 -0700310 sdhc_1: sdhci@f9824900 {
311 compatible = "qcom,sdhci-msm";
312 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
313 reg-names = "hc_mem", "core_mem";
314
315 interrupts = <0 123 0>, <0 138 0>;
316 interrupt-names = "hc_irq", "pwr_irq";
317
318 qcom,bus-width = <8>;
319 status = "disabled";
320 };
321
322 sdhc_2: sdhci@f98a4900 {
323 compatible = "qcom,sdhci-msm";
324 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
325 reg-names = "hc_mem", "core_mem";
326
327 interrupts = <0 125 0>, <0 221 0>;
328 interrupt-names = "hc_irq", "pwr_irq";
329
330 qcom,bus-width = <4>;
331 status = "disabled";
332 };
333
Yan He6c7304c2012-11-09 22:07:08 -0800334 qcom,sps {
335 compatible = "qcom,msm_sps";
336 qcom,device-type = <3>;
337 };
338
Jeff Hugo4e20fda2013-04-10 12:40:19 -0600339 qcom,smem@d900000 {
Jeff Hugo818d0f72012-11-05 14:19:28 -0700340 compatible = "qcom,smem";
Jeff Hugoe1e30e72013-04-08 14:15:34 -0600341 reg = <0xd900000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800342 <0xf9011000 0x1000>,
Jeff Hugo818d0f72012-11-05 14:19:28 -0700343 <0xfc428000 0x4000>;
344 reg-names = "smem", "irq-reg-base", "aux-mem1";
345
346 qcom,smd-modem {
347 compatible = "qcom,smd";
348 qcom,smd-edge = <0>;
349 qcom,smd-irq-offset = <0x8>;
350 qcom,smd-irq-bitmask = <0x1000>;
351 qcom,pil-string = "modem";
352 interrupts = <0 25 1>;
353 };
354
355 qcom,smsm-modem {
356 compatible = "qcom,smsm";
357 qcom,smsm-edge = <0>;
358 qcom,smsm-irq-offset = <0x8>;
359 qcom,smsm-irq-bitmask = <0x2000>;
360 interrupts = <0 26 1>;
361 };
362
363 qcom,smd-adsp {
364 compatible = "qcom,smd";
365 qcom,smd-edge = <1>;
366 qcom,smd-irq-offset = <0x8>;
367 qcom,smd-irq-bitmask = <0x100>;
368 qcom,pil-string = "adsp";
369 interrupts = <0 156 1>;
370 };
371
372 qcom,smsm-adsp {
373 compatible = "qcom,smsm";
374 qcom,smsm-edge = <1>;
375 qcom,smsm-irq-offset = <0x8>;
376 qcom,smsm-irq-bitmask = <0x200>;
377 interrupts = <0 157 1>;
378 };
379
380 qcom,smd-wcnss {
381 compatible = "qcom,smd";
382 qcom,smd-edge = <6>;
383 qcom,smd-irq-offset = <0x8>;
384 qcom,smd-irq-bitmask = <0x20000>;
385 qcom,pil-string = "wcnss";
386 interrupts = <0 142 1>;
387 };
388
389 qcom,smsm-wcnss {
390 compatible = "qcom,smsm";
391 qcom,smsm-edge = <6>;
392 qcom,smsm-irq-offset = <0x8>;
393 qcom,smsm-irq-bitmask = <0x80000>;
394 interrupts = <0 144 1>;
395 };
396
397 qcom,smd-rpm {
398 compatible = "qcom,smd";
399 qcom,smd-edge = <15>;
400 qcom,smd-irq-offset = <0x8>;
401 qcom,smd-irq-bitmask = <0x1>;
402 interrupts = <0 168 1>;
403 qcom,irq-no-suspend;
404 };
David Ng5a3cb232012-12-03 16:42:53 -0800405 };
Hanumant Singh4e334c82012-11-14 10:16:39 -0800406
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700407 rpm_bus: qcom,rpm-smd {
408 compatible = "qcom,rpm-smd";
409 rpm-channel-name = "rpm_requests";
410 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Priyanka Mathur6e993c92013-03-20 11:17:27 -0700411 rpm-standalone;
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700412 };
413
Olav Haugan8340d932013-01-25 12:03:11 -0800414 qcom,msm-mem-hole {
415 compatible = "qcom,msm-mem-hole";
Olav Hauganfcc860e2013-04-06 10:56:06 -0700416 qcom,memblock-remove = <0x07B00000 0x6400000>; /* Address and Size of Hole */
Olav Haugan8340d932013-01-25 12:03:11 -0800417 };
418
Hanumant Singh4e334c82012-11-14 10:16:39 -0800419 qcom,wdt@f9017000 {
420 compatible = "qcom,msm-watchdog";
421 reg = <0xf9017000 0x1000>;
422 interrupts = <0 3 0>, <0 4 0>;
423 qcom,bark-time = <11000>;
424 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800425 qcom,ipi-ping;
Jeff Hugo818d0f72012-11-05 14:19:28 -0700426 };
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700427
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800428 qcom,acpuclk@f9011050 {
429 compatible = "qcom,acpuclk-a7";
430 reg = <0xf9011050 0x8>;
431 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700432 a7_cpu-supply = <&apc_vreg_corner>;
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800433 };
434
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700435 spmi_bus: qcom,spmi@fc4c0000 {
436 cell-index = <0>;
437 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700438 reg-names = "core", "intr", "cnfg";
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700439 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700440 <0Xfc4cb000 0x1000>,
441 <0Xfc4ca000 0x1000>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700442 /* 190,ee0_krait_hlos_spmi_periph_irq */
443 /* 187,channel_0_krait_hlos_trans_done_irq */
444 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700445 qcom,pmic-arb-ee = <0>;
446 qcom,pmic-arb-channel = <0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700447 };
448
Chun Zhangf39a0652013-05-01 15:57:54 -0700449 i2c@f9923000 { /* BLSP-1 QUP-1 */
450 cell-index = <1>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700451 compatible = "qcom,i2c-qup";
452 #address-cells = <1>;
453 #size-cells = <0>;
454 reg-names = "qup_phys_addr";
Chun Zhangf39a0652013-05-01 15:57:54 -0700455 reg = <0xf9923000 0x1000>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700456 interrupt-names = "qup_err_intr";
Chun Zhangf39a0652013-05-01 15:57:54 -0700457 interrupts = <0 95 0>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700458 qcom,i2c-bus-freq = <100000>;
Chun Zhangf39a0652013-05-01 15:57:54 -0700459 qcom,i2c-src-freq = <19200000>;
460 qcom,sda-gpio = <&msmgpio 2 0>;
461 qcom,scl-gpio = <&msmgpio 3 0>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700462 };
463
Kuirong Wangc6d072c2013-01-29 10:33:03 -0800464 i2c_cdc: i2c@f9927000 { /* BLSP1 QUP5 */
465 cell-index = <5>;
466 compatible = "qcom,i2c-qup";
467 #address-cells = <1>;
468 #size-cells = <0>;
469 reg-names = "qup_phys_addr";
470 reg = <0xf9927000 0x1000>;
471 interrupt-names = "qup_err_intr";
472 interrupts = <0 99 0>;
473 qcom,i2c-bus-freq = <100000>;
474 };
475
Lokesh Kumar Aakulu25213502013-05-07 17:43:03 -0700476 i2c: i2c@f9928000 { /* BLSP1 QUP6 */
Kenneth Heitke0d4fbb12013-04-10 12:51:14 -0600477 cell-index = <6>;
478 compatible = "qcom,i2c-qup";
479 #address-cells = <1>;
480 #size-cells = <0>;
481 reg-names = "qup_phys_addr";
482 reg = <0xf9928000 0x1000>;
483 interrupt-names = "qup_err_intr";
484 interrupts = <0 100 0>;
485 qcom,i2c-bus-freq = <100000>;
486 qcom,i2c-src-freq = <19200000>;
487 qcom,sda-gpio = <&msmgpio 16 0>;
488 qcom,scl-gpio = <&msmgpio 17 0>;
489 };
Gilad Avidovf58f1832013-01-09 17:31:28 -0700490
Chun Zhangf39a0652013-05-01 15:57:54 -0700491 i2c@f9925000 { /* BLSP-1 QUP-3 */
492 cell-index = <0>;
493 compatible = "qcom,i2c-qup";
Gilad Avidovf58f1832013-01-09 17:31:28 -0700494 #address-cells = <1>;
495 #size-cells = <0>;
Chun Zhangf39a0652013-05-01 15:57:54 -0700496 reg-names = "qup_phys_addr";
497 reg = <0xf9925000 0x1000>;
498 interrupt-names = "qup_err_intr";
499 interrupts = <0 97 0>;
500 qcom,i2c-bus-freq = <100000>;
Gilad Avidovf58f1832013-01-09 17:31:28 -0700501 };
502
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800503 qcom,pronto@fb21b000 {
504 compatible = "qcom,pil-pronto";
505 reg = <0xfb21b000 0x3000>,
506 <0xfc401700 0x4>,
507 <0xfd485300 0xc>;
508 reg-names = "pmu_base", "clk_base", "halt_base";
509 interrupts = <0 149 1>;
510 vdd_pronto_pll-supply = <&pm8110_l10>;
511
512 qcom,firmware-name = "wcnss";
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700513
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700514 /* GPIO inputs from wcnss */
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700515 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700516 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700517 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700518
519 /* GPIO output to wcnss */
520 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800521 };
522
Sameer Thalappil1b65cd02013-04-03 16:42:34 -0700523 qcom,iris-fm {
524 compatible = "qcom,iris_fm";
525 };
526
Fred Oh92b18a02013-01-22 13:29:41 -0800527 sound {
528 compatible = "qcom,msm8x10-audio-codec";
529 qcom,model = "msm8x10-snd-card";
530 };
531
532 qcom,msm-pcm {
533 compatible = "qcom,msm-pcm-dsp";
Kuirong Wang16f52d62013-03-07 10:49:27 -0800534 qcom,msm-pcm-dsp-id = <0>;
Fred Oh92b18a02013-01-22 13:29:41 -0800535 };
536
Mingming Yin8b92f9b2013-05-01 14:10:26 -0700537 qcom,msm-pcm-low-latency {
538 compatible = "qcom,msm-pcm-dsp";
539 qcom,msm-pcm-dsp-id = <1>;
540 qcom,msm-pcm-low-latency;
541 };
542
Fred Oh92b18a02013-01-22 13:29:41 -0800543 qcom,msm-pcm-routing {
544 compatible = "qcom,msm-pcm-routing";
545 };
546
547 qcom,msm-pcm-lpa {
548 compatible = "qcom,msm-pcm-lpa";
549 };
550
551 qcom,msm-compr-dsp {
552 compatible = "qcom,msm-compr-dsp";
553 };
554
555 qcom,msm-voip-dsp {
556 compatible = "qcom,msm-voip-dsp";
557 };
558
559 qcom,msm-pcm-voice {
560 compatible = "qcom,msm-pcm-voice";
561 };
562
563 qcom,msm-stub-codec {
564 compatible = "qcom,msm-stub-codec";
565 };
566
567 qcom,msm-dai-fe {
568 compatible = "qcom,msm-dai-fe";
569 };
570
571 qcom,msm-pcm-afe {
572 compatible = "qcom,msm-pcm-afe";
573 };
574
575 qcom,msm-dai-mi2s {
576 compatible = "qcom,msm-dai-mi2s";
577 qcom,msm-dai-q6-mi2s-prim {
578 compatible = "qcom,msm-dai-q6-mi2s";
579 qcom,msm-dai-q6-mi2s-dev-id = <0>;
Kuirong Wang16f52d62013-03-07 10:49:27 -0800580 qcom,msm-mi2s-rx-lines = <0>;
581 qcom,msm-mi2s-tx-lines = <3>;
Fred Oh92b18a02013-01-22 13:29:41 -0800582 };
583
584 qcom,msm-dai-q6-mi2s-sec {
585 compatible = "qcom,msm-dai-q6-mi2s";
586 qcom,msm-dai-q6-mi2s-dev-id = <1>;
Kuirong Wang16f52d62013-03-07 10:49:27 -0800587 qcom,msm-mi2s-rx-lines = <3>;
588 qcom,msm-mi2s-tx-lines = <0>;
Fred Oh92b18a02013-01-22 13:29:41 -0800589 };
590 };
591
592 qcom,msm-dai-q6 {
593 compatible = "qcom,msm-dai-q6";
594 qcom,msm-dai-q6-bt-sco-rx {
595 compatible = "qcom,msm-dai-q6-dev";
596 qcom,msm-dai-q6-dev-id = <12288>;
597 };
598
599 qcom,msm-dai-q6-bt-sco-tx {
600 compatible = "qcom,msm-dai-q6-dev";
601 qcom,msm-dai-q6-dev-id = <12289>;
602 };
603
604 qcom,msm-dai-q6-int-fm-rx {
605 compatible = "qcom,msm-dai-q6-dev";
606 qcom,msm-dai-q6-dev-id = <12292>;
607 };
608
609 qcom,msm-dai-q6-int-fm-tx {
610 compatible = "qcom,msm-dai-q6-dev";
611 qcom,msm-dai-q6-dev-id = <12293>;
612 };
613
614 qcom,msm-dai-q6-be-afe-pcm-rx {
615 compatible = "qcom,msm-dai-q6-dev";
616 qcom,msm-dai-q6-dev-id = <224>;
617 };
618
619 qcom,msm-dai-q6-be-afe-pcm-tx {
620 compatible = "qcom,msm-dai-q6-dev";
621 qcom,msm-dai-q6-dev-id = <225>;
622 };
623
624 qcom,msm-dai-q6-afe-proxy-rx {
625 compatible = "qcom,msm-dai-q6-dev";
626 qcom,msm-dai-q6-dev-id = <241>;
627 };
628
629 qcom,msm-dai-q6-afe-proxy-tx {
630 compatible = "qcom,msm-dai-q6-dev";
631 qcom,msm-dai-q6-dev-id = <240>;
632 };
Vicky Sehrawatfc8044f2013-04-18 11:34:32 -0700633
634 qcom,msm-dai-q6-incall-record-rx {
635 compatible = "qcom,msm-dai-q6-dev";
636 qcom,msm-dai-q6-dev-id = <32771>;
637 };
638
639 qcom,msm-dai-q6-incall-record-tx {
640 compatible = "qcom,msm-dai-q6-dev";
641 qcom,msm-dai-q6-dev-id = <32772>;
642 };
643
644 qcom,msm-dai-q6-incall-music-rx {
645 compatible = "qcom,msm-dai-q6-dev";
646 qcom,msm-dai-q6-dev-id = <32773>;
647 };
Fred Oh92b18a02013-01-22 13:29:41 -0800648 };
649
650 qcom,msm-pcm-hostless {
651 compatible = "qcom,msm-pcm-hostless";
652 };
653
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700654 qcom,wcnss-wlan@fb000000 {
655 compatible = "qcom,wcnss_wlan";
Sameer Thalappilb2b93672013-04-18 17:00:46 -0700656 reg = <0xfb000000 0x280000>,
657 <0xf9011008 0x04>;
658 reg-names = "wcnss_mmio", "wcnss_fiq";
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700659 interrupts = <0 145 0>, <0 146 0>;
660 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
661
662 qcom,pronto-vddmx-supply = <&pm8110_l3>;
663 qcom,pronto-vddcx-supply = <&pm8110_s1>;
664 qcom,pronto-vddpx-supply = <&pm8110_l6>;
665 qcom,iris-vddxo-supply = <&pm8110_l10>;
666 qcom,iris-vddrfa-supply = <&pm8110_l5>;
667 qcom,iris-vddpa-supply = <&pm8110_l16>;
668 qcom,iris-vdddig-supply = <&pm8110_l5>;
669
670 gpios = <&msmgpio 23 0>, <&msmgpio 24 0>, <&msmgpio 25 0>, <&msmgpio 26 0>, <&msmgpio 27 0>;
671 qcom,has_pronto_hw;
672 };
673
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800674 qcom,mss@fc880000 {
675 compatible = "qcom,pil-q6v5-mss";
676 reg = <0xfc880000 0x100>,
677 <0xfd485000 0x400>,
678 <0xfc820000 0x020>,
679 <0xfc401680 0x004>,
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800680 <0xfd485194 0x4>;
681 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700682 "restart_reg", "cxrail_bhs_reg";
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800683
684 interrupts = <0 24 1>;
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800685 vdd_cx-supply = <&pm8110_s1_corner>;
686 vdd_mx-supply = <&pm8110_l3>;
687 vdd_pll-supply = <&pm8110_l10>;
688 qcom,vdd_pll = <1800000>;
689 qcom,is-loadable;
690 qcom,firmware-name = "mba";
691 qcom,pil-self-auth;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700692
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800693 /* GPIO inputs from mss */
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700694 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800695 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800696 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700697
698 /* GPIO output to mss */
699 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800700 };
701
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800702 qcom,lpass@fe200000 {
703 compatible = "qcom,pil-q6v5-lpass";
704 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800705 <0xfd485100 0x00010>,
706 <0xfc4016c0 0x00004>;
707 reg-names = "qdsp6_base", "halt_base", "restart_reg";
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800708 interrupts = <0 162 1>;
Matt Wagantall6c515982013-01-29 14:58:43 -0800709 vdd_cx-supply = <&pm8110_s1_corner>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800710 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700711
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700712 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700713 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700714 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700715 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700716
717 /* GPIO output to lpass */
718 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800719 };
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700720
721 tsens: tsens@fc4a8000 {
722 compatible = "qcom,msm-tsens";
723 reg = <0xfc4a8000 0x2000>,
724 <0xfc4b8000 0x1000>;
725 reg-names = "tsens_physical", "tsens_eeprom_physical";
726 interrupts = <0 184 0>;
727 qcom,sensors = <2>;
728 qcom,slope = <2901 2846>;
Siddartha Mohanadossb2f48982013-03-28 13:51:38 -0700729 qcom,calib-mode = "fuse_map3";
Siddartha Mohanadoss921f1f02013-04-04 16:30:03 -0700730 qcom,sensor-id = <0 5>;
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700731 };
732
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700733 qcom,msm-thermal {
734 compatible = "qcom,msm-thermal";
Jennifer Liud17e9eb2013-04-17 11:56:58 -0700735 qcom,sensor-id = <5>;
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700736 qcom,poll-ms = <250>;
737 qcom,limit-temp = <60>;
738 qcom,temp-hysteresis = <10>;
739 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600740 qcom,freq-control-mask = <0xf>;
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700741 };
Jeff Hugoae4ab9f62013-04-08 13:43:08 -0600742
743 qcom,ipc-spinlock@fd484000 {
744 compatible = "qcom,ipc-spinlock-sfpb";
745 reg = <0xfd484000 0x400>;
746 qcom,num-locks = <8>;
747 };
Jeff Hugode2822a2013-04-08 14:09:38 -0600748
749 qcom,bam_dmux@fc834000 {
750 compatible = "qcom,bam_dmux";
751 reg = <0xfc834000 0x7000>;
752 interrupts = <0 29 1>;
753 };
Hariprasad Dhalinarasimha3a3e4e32013-04-14 16:18:30 -0700754
755 qcom,qseecom@7B00000 {
756 compatible = "qcom,qseecom";
757 reg = <0x7B00000 0x500000>;
758 reg-names = "secapp-region";
759 qcom,disk-encrypt-pipe-pair = <2>;
760 qcom,hlos-ce-hw-instance = <0>;
761 qcom,qsee-ce-hw-instance = <0>;
762 qcom,msm-bus,name = "qseecom-noc";
763 qcom,msm-bus,num-cases = <4>;
764 qcom,msm-bus,active-only = <0>;
765 qcom,msm-bus,num-paths = <1>;
766 qcom,msm-bus,vectors-KBps =
767 <55 512 0 0>,
768 <55 512 3936000 393600>,
769 <55 512 3936000 393600>,
770 <55 512 3936000 393600>;
771 };
Aparna Dase7cab2e2013-04-16 16:54:47 -0700772
Hariprasad Dhalinarasimhac8e0f312013-04-13 17:18:50 -0700773 qcom,msm-rng@f9bff000 {
774 compatible = "qcom,msm-rng";
775 reg = <0xf9bff000 0x200>;
776 qcom,msm-rng-iface-clk;
777 };
778
Aparna Das2948da92013-04-25 10:11:15 -0700779 qcom,msm-rtb {
780 compatible = "qcom,msm-rtb";
781 qcom,memory-reservation-type = "EBI1";
782 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
783 };
784
Aparna Dase7cab2e2013-04-16 16:54:47 -0700785 jtag_mm0: jtagmm@fc34c000 {
786 compatible = "qcom,jtag-mm";
787 reg = <0xfc34c000 0x1000>,
788 <0xfc340000 0x1000>;
789 reg-names = "etm-base","debug-base";
790 };
791
792 jtag_mm1: jtagmm@fc34d000 {
793 compatible = "qcom,jtag-mm";
794 reg = <0xfc34d000 0x1000>,
795 <0xfc342000 0x1000>;
796 reg-names = "etm-base","debug-base";
797 };
798
799 jtag_mm2: jtagmm@fc34e000 {
800 compatible = "qcom,jtag-mm";
801 reg = <0xfc34e000 0x1000>,
802 <0xfc344000 0x1000>;
803 reg-names = "etm-base","debug-base";
804 };
805
806 jtag_mm3: jtagmm@fc34f000 {
807 compatible = "qcom,jtag-mm";
808 reg = <0xfc34f000 0x1000>,
809 <0xfc346000 0x1000>;
810 reg-names = "etm-base","debug-base";
811 };
Hariprasad Dhalinarasimha9d3638a2013-04-13 22:42:11 -0700812
813 qcom,tz-log@fe805720 {
814 compatible = "qcom,tz-log";
815 reg = <0x0fe805720 0x1000>;
816 };
Hariprasad Dhalinarasimha30af29a2013-05-07 17:48:04 -0700817
818 qcom,qcrypto@fd404000 {
819 compatible = "qcom,qcrypto";
820 reg = <0xfd400000 0x20000>,
821 <0xfd404000 0x8000>;
822 reg-names = "crypto-base","crypto-bam-base";
823 interrupts = <0 207 0>;
824 qcom,bam-pipe-pair = <2>;
825 qcom,ce-hw-instance = <1>;
826 qcom,ce-hw-shared;
827 qcom,msm-bus,name = "qcrypto-noc";
828 qcom,msm-bus,num-cases = <2>;
829 qcom,msm-bus,active-only = <0>;
830 qcom,msm-bus,num-paths = <1>;
831 qcom,msm-bus,vectors-KBps =
832 <55 512 0 0>,
833 <55 512 393600 3936000>;
834 };
835
836 qcom,qcedev@fd400000 {
837 compatible = "qcom,qcedev";
838 reg = <0xfd400000 0x20000>,
839 <0xfd404000 0x8000>;
840 reg-names = "crypto-base","crypto-bam-base";
841 interrupts = <0 207 0>;
842 qcom,bam-pipe-pair = <1>;
843 qcom,ce-hw-instance = <1>;
844 qcom,ce-hw-shared;
845 qcom,msm-bus,name = "qcedev-noc";
846 qcom,msm-bus,num-cases = <2>;
847 qcom,msm-bus,active-only = <0>;
848 qcom,msm-bus,num-paths = <1>;
849 qcom,msm-bus,vectors-KBps =
850 <55 512 0 0>,
851 <55 512 393600 3936000>;
852 };
853
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700854};
David Collinsc6b34832012-10-24 12:57:57 -0700855
Matt Wagantall1bf56932012-11-29 15:03:29 -0800856&gdsc_vfe {
857 status = "ok";
858};
859
860&gdsc_oxili_cx {
861 status = "ok";
862};
863
Olav Haugan9c255522012-11-16 16:43:17 -0800864&lpass_iommu {
865 status = "ok";
866};
867
868&copss_iommu {
869 status = "ok";
870};
871
872&mdpe_iommu {
873 status = "ok";
874};
875
876&mdps_iommu {
877 status = "ok";
878};
879
880&gfx_iommu {
881 status = "ok";
882};
883
884&vfe_iommu {
885 status = "ok";
886};
887
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -0800888/include/ "msm8610-iommu-domains.dtsi"
Olav Haugan4bc4b692012-12-10 18:29:35 -0800889
Xiaozhe Shi350baa92013-04-09 18:13:50 -0700890/include/ "msm-pm8110-rpm-regulator.dtsi"
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700891/include/ "msm-pm8110.dtsi"
Xiaozhe Shi1581a7b2013-02-21 15:17:57 -0800892/include/ "msm8610-regulator.dtsi"
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700893
894&pm8110_vadc {
895 chan@0 {
896 label = "usb_in";
897 reg = <0>;
898 qcom,decimation = <0>;
899 qcom,pre-div-channel-scaling = <4>;
900 qcom,calibration-type = "absolute";
901 qcom,scale-function = <0>;
902 qcom,hw-settle-time = <0>;
903 qcom,fast-avg-setup = <0>;
904 };
905
906 chan@2 {
907 label = "vchg_sns";
908 reg = <2>;
909 qcom,decimation = <0>;
Siddartha Mohanadoss478e5c92013-05-01 19:53:27 -0700910 qcom,pre-div-channel-scaling = <2>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700911 qcom,calibration-type = "absolute";
912 qcom,scale-function = <0>;
913 qcom,hw-settle-time = <0>;
914 qcom,fast-avg-setup = <0>;
915 };
916
917 chan@5 {
918 label = "vcoin";
919 reg = <5>;
920 qcom,decimation = <0>;
921 qcom,pre-div-channel-scaling = <1>;
922 qcom,calibration-type = "absolute";
923 qcom,scale-function = <0>;
924 qcom,hw-settle-time = <0>;
925 qcom,fast-avg-setup = <0>;
926 };
927
928 chan@6 {
929 label = "vbat_sns";
930 reg = <6>;
931 qcom,decimation = <0>;
932 qcom,pre-div-channel-scaling = <1>;
933 qcom,calibration-type = "absolute";
934 qcom,scale-function = <0>;
935 qcom,hw-settle-time = <0>;
936 qcom,fast-avg-setup = <0>;
937 };
938
939 chan@7 {
940 label = "vph_pwr";
941 reg = <7>;
942 qcom,decimation = <0>;
943 qcom,pre-div-channel-scaling = <1>;
944 qcom,calibration-type = "absolute";
945 qcom,scale-function = <0>;
946 qcom,hw-settle-time = <0>;
947 qcom,fast-avg-setup = <0>;
948 };
949
950 chan@30 {
951 label = "batt_therm";
952 reg = <0x30>;
953 qcom,decimation = <0>;
954 qcom,pre-div-channel-scaling = <0>;
955 qcom,calibration-type = "ratiometric";
956 qcom,scale-function = <1>;
957 qcom,hw-settle-time = <2>;
958 qcom,fast-avg-setup = <0>;
959 };
960
961 chan@31 {
962 label = "batt_id";
963 reg = <0x31>;
964 qcom,decimation = <0>;
965 qcom,pre-div-channel-scaling = <0>;
966 qcom,calibration-type = "ratiometric";
967 qcom,scale-function = <0>;
968 qcom,hw-settle-time = <2>;
969 qcom,fast-avg-setup = <0>;
970 };
971
972 chan@b2 {
973 label = "xo_therm_pu2";
974 reg = <0xb2>;
975 qcom,decimation = <0>;
976 qcom,pre-div-channel-scaling = <0>;
977 qcom,calibration-type = "ratiometric";
978 qcom,scale-function = <4>;
979 qcom,hw-settle-time = <2>;
980 qcom,fast-avg-setup = <0>;
981 };
982};
983
984