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Syed Rameez Mustafa3971c142013-01-09 19:04:53 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafad3935822012-10-09 11:23:20 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070014
15/ {
16 model = "Qualcomm MSM 8610";
17 compatible = "qcom,msm8610";
18 interrupt-parent = <&intc>;
19
20 memory {
21 qsecom_mem: qsecom_region {
22 linux,contiguous-region;
23 reg = <0 0x100000>;
24 label = "qsecom_mem";
25 };
26 };
27
28 aliases {
29 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
30 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidova460c472013-04-12 16:23:32 -060031 spi4 = &spi_4;
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070032 };
33
34 soc: soc { };
35};
36
Lokesh Kumar Aakulu25213502013-05-07 17:43:03 -070037/include/ "msm8610-camera.dtsi"
Olav Haugan54166782013-01-28 16:59:51 -080038/include/ "msm-iommu-v0.dtsi"
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -080039/include/ "msm8610-ion.dtsi"
Lokesh Batra8d55eec2013-02-26 11:31:21 -080040/include/ "msm8610-gpu.dtsi"
Matt Wagantall1bf56932012-11-29 15:03:29 -080041/include/ "msm-gdsc.dtsi"
Aparna Dasd16555b2013-03-06 15:46:38 -080042/include/ "msm8610-coresight.dtsi"
Praveen Chidambarama1f98282012-11-29 09:56:57 -070043/include/ "msm8610-pm.dtsi"
Jeff Hugo53dcf0f2013-03-20 12:37:50 -060044/include/ "msm8610-smp2p.dtsi"
Gagan Macbced3872013-02-04 19:18:04 -070045/include/ "msm8610-bus.dtsi"
Xiaoming Zhou5f37a252013-04-09 21:11:50 -040046/include/ "msm8610-mdss.dtsi"
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070047
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070048&soc {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070052
53 intc: interrupt-controller@f9000000 {
54 compatible = "qcom,msm-qgic2";
55 interrupt-controller;
56 #interrupt-cells = <3>;
57 reg = <0xf9000000 0x1000>,
58 <0xf9002000 0x1000>;
59 };
60
61 msmgpio: gpio@fd510000 {
62 compatible = "qcom,msm-gpio";
63 interrupt-controller;
64 #interrupt-cells = <2>;
65 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080066 gpio-controller;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070067 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080068 ngpio = <102>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080069 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080070 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070071 };
72
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -070073 qcom,mpm2-sleep-counter@fc4a3000 {
74 compatible = "qcom,mpm2-sleep-counter";
75 reg = <0xfc4a3000 0x1000>;
76 clock-frequency = <32768>;
77 };
78
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070079 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080080 compatible = "arm,armv7-timer";
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070081 interrupts = <1 2 0 1 3 0>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070082 clock-frequency = <19200000>;
83 };
84
Stephen Boyda61ac642013-04-10 14:20:27 -070085 timer@f9020000 {
86 #address-cells = <1>;
87 #size-cells = <1>;
88 ranges;
89 compatible = "arm,armv7-timer-mem";
90 reg = <0xf9020000 0x1000>;
91 clock-frequency = <19200000>;
92
93 frame@f9021000 {
94 frame-number = <0>;
95 interrupts = <0 8 0x4>,
96 <0 7 0x4>;
97 reg = <0xf9021000 0x1000>,
98 <0xf9022000 0x1000>;
99 };
100
101 frame@f9023000 {
102 frame-number = <1>;
103 interrupts = <0 9 0x4>;
104 reg = <0xf9023000 0x1000>;
105 status = "disabled";
106 };
107
108 frame@f9024000 {
109 frame-number = <2>;
110 interrupts = <0 10 0x4>;
111 reg = <0xf9024000 0x1000>;
112 status = "disabled";
113 };
114
115 frame@f9025000 {
116 frame-number = <3>;
117 interrupts = <0 11 0x4>;
118 reg = <0xf9025000 0x1000>;
119 status = "disabled";
120 };
121
122 frame@f9026000 {
123 frame-number = <4>;
124 interrupts = <0 12 0x4>;
125 reg = <0xf9026000 0x1000>;
126 status = "disabled";
127 };
128
129 frame@f9027000 {
130 frame-number = <5>;
131 interrupts = <0 13 0x4>;
132 reg = <0xf9027000 0x1000>;
133 status = "disabled";
134 };
135
136 frame@f9028000 {
137 frame-number = <6>;
138 interrupts = <0 14 0x4>;
139 reg = <0xf9028000 0x1000>;
140 status = "disabled";
141 };
142 };
143
Arun Menon2a7e3772013-01-17 12:06:59 -0800144 qcom,msm-adsp-loader {
145 compatible = "qcom,adsp-loader";
146 qcom,adsp-state = <0>;
147 };
148
Fred Ohe49386d2013-05-02 17:53:27 -0700149 qcom,msm-audio-ion {
150 compatible = "qcom,msm-audio-ion";
151 qcom,smmu-enabled;
152 };
153
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800154 qcom,msm-imem@fe805000 {
155 compatible = "qcom,msm-imem";
156 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
157 };
158
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700159 serial@f991f000 {
160 compatible = "qcom,msm-lsuart-v14";
161 reg = <0xf991f000 0x1000>;
162 interrupts = <0 109 0>;
163 status = "disabled";
164 };
Mayank Rana55db0cb2012-10-15 16:50:06 +0530165
Hanumant Singh6b346712013-04-09 16:26:09 -0700166 serial@f991e000 {
167 compatible = "qcom,msm-lsuart-v14";
168 reg = <0xf991e000 0x1000>;
169 interrupts = <0 108 0>;
170 status = "disabled";
171 };
172
Arun Menon8e25dd42013-01-11 14:11:54 -0800173 qcom,vidc@fdc00000 {
174 compatible = "qcom,msm-vidc";
Sachin Shah4e1c8fe2013-03-20 15:10:05 -0700175 qcom,vidc-ns-map = <0x40000000 0x40000000>;
176 qcom,iommu-groups = <&q6_domain_ns>;
177 qcom,iommu-group-buffer-types = <0xfff>;
178 qcom,buffer-type-tz-usage-map = <0x1 0x1>,
179 <0x1fe 0x2>;
180 qcom,hfi = "q6";
Arun Menonede58642013-04-26 14:19:06 -0700181 qcom,max-hw-load = <108000>; /* 720p @ 30 * 1 */
Arun Menon8e25dd42013-01-11 14:11:54 -0800182 };
183
Vamsi Krishna872fbbc2013-04-09 18:04:52 -0700184 qcom,usbbam@f9a44000 {
185 compatible = "qcom,usb-bam-msm";
186 reg = <0xf9a44000 0x11000>;
187 reg-names = "hsusb";
188 interrupts = <0 135 0>;
189 interrupt-names = "hsusb";
190 qcom,usb-bam-num-pipes = <16>;
191 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
192 qcom,ignore-core-reset-ack;
193 qcom,disable-clk-gating;
194
195 qcom,pipe0 {
196 label = "hsusb-qdss-in-0";
197 qcom,usb-bam-mem-type = <3>;
198 qcom,bam-type = <1>;
199 qcom,dir = <1>;
200 qcom,pipe-num = <0>;
201 qcom,peer-bam = <1>;
202 qcom,src-bam-physical-address = <0xfc37c000>;
203 qcom,src-bam-pipe-index = <0>;
204 qcom,dst-bam-physical-address = <0xf9a44000>;
205 qcom,dst-bam-pipe-index = <2>;
206 qcom,data-fifo-offset = <0x0>;
207 qcom,data-fifo-size = <0x600>;
208 qcom,descriptor-fifo-offset = <0x600>;
209 qcom,descriptor-fifo-size = <0x200>;
210 };
211 };
212
Mayank Rana55db0cb2012-10-15 16:50:06 +0530213 usb@f9a55000 {
214 compatible = "qcom,hsusb-otg";
215 reg = <0xf9a55000 0x400>;
Mayank Rana33d26662013-01-17 10:22:25 +0530216 interrupts = <0 134 0>, <0 140 0>;
217 interrupt-names = "core_irq", "async_irq";
Mayank Rana76c6ce22012-11-07 17:07:58 +0530218 HSUSB_VDDCX-supply = <&pm8110_s1>;
219 HSUSB_1p8-supply = <&pm8110_l10>;
220 HSUSB_3p3-supply = <&pm8110_l20>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530221
222 qcom,hsusb-otg-phy-type = <2>;
223 qcom,hsusb-otg-mode = <1>;
Mayank Rana29bb9f22013-04-04 18:25:12 +0530224 qcom,hsusb-otg-otg-control = <2>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530225 qcom,hsusb-otg-disable-reset;
Mayank Ranaa5491122013-04-04 18:32:25 +0530226 qcom,dp-manual-pullup;
Mayank Ranaf9295802013-04-04 18:36:44 +0530227
228 qcom,msm-bus,name = "usb2";
229 qcom,msm-bus,num-cases = <2>;
230 qcom,msm-bus,active-only = <0>;
231 qcom,msm-bus,num-paths = <1>;
232 qcom,msm-bus,vectors-KBps =
233 <87 512 0 0>,
234 <87 512 60000 960000>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530235 };
236
Mayank Ranacc0c5452013-01-29 16:41:53 +0530237 android_usb@fe8050c8 {
Mayank Rana55db0cb2012-10-15 16:50:06 +0530238 compatible = "qcom,android-usb";
Mayank Ranacc0c5452013-01-29 16:41:53 +0530239 reg = <0xfe8050c8 0xc8>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530240 };
241
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700242 sdcc1: qcom,sdcc@f9824000 {
243 cell-index = <1>; /* SDC1 eMMC slot */
244 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800245 reg = <0xf9824000 0x800>,
246 <0xf9824800 0x100>,
247 <0xf9804000 0x7000>;
248 reg-names = "core_mem", "dml_mem", "bam_mem";
249 interrupts = <0 123 0>, <0 137 0>;
250 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700251
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700252 vdd-supply = <&pm8110_l17>;
253 qcom,vdd-always-on;
254 qcom,vdd-lpm-sup;
255 qcom,vdd-voltage-level = <2900000 2900000>;
256 qcom,vdd-current-level = <9000 400000>;
257
258 vdd-io-supply = <&pm8110_l6>;
259 qcom,vdd-io-always-on;
260 qcom,vdd-io-lpm-sup;
261 qcom,vdd-io-voltage-level = <1800000 1800000>;
262 qcom,vdd-io-current-level = <9000 60000>;
263
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700264 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
265 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700266 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700267 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700268
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700269 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700270 qcom,sup-voltages = <2900 2900>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700271 qcom,bus-width = <8>;
272 qcom,nonremovable;
273 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700274
275 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700276 };
277
278 sdcc2: qcom,sdcc@f98a4000 {
279 cell-index = <2>; /* SDC2 SD card slot */
280 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800281 reg = <0xf98a4000 0x800>,
282 <0xf98a4800 0x100>,
283 <0xf9884000 0x7000>;
284 reg-names = "core_mem", "dml_mem", "bam_mem";
285 interrupts = <0 125 0>, <0 220 0>;
286 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700287
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700288 vdd-supply = <&pm8110_l18>;
289 qcom,vdd-voltage-level = <2950000 2950000>;
290 qcom,vdd-current-level = <9000 400000>;
291
292 vdd-io-supply = <&pm8110_l21>;
293 qcom,vdd-io-voltage-level = <1800000 2950000>;
294 qcom,vdd-io-current-level = <9000 50000>;
295
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700296 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
297 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700298 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700299 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700300
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700301 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
302 qcom,sup-voltages = <2950 2950>;
303 qcom,bus-width = <4>;
304 qcom,xpc;
305 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
306 qcom,current-limit = <800>;
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700307
308 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700309 };
310
Venkat Gopalakrishnana6ce5f22013-04-04 14:24:57 -0700311 sdhc_1: sdhci@f9824900 {
312 compatible = "qcom,sdhci-msm";
313 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
314 reg-names = "hc_mem", "core_mem";
315
316 interrupts = <0 123 0>, <0 138 0>;
317 interrupt-names = "hc_irq", "pwr_irq";
318
319 qcom,bus-width = <8>;
320 status = "disabled";
321 };
322
323 sdhc_2: sdhci@f98a4900 {
324 compatible = "qcom,sdhci-msm";
325 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
326 reg-names = "hc_mem", "core_mem";
327
328 interrupts = <0 125 0>, <0 221 0>;
329 interrupt-names = "hc_irq", "pwr_irq";
330
331 qcom,bus-width = <4>;
332 status = "disabled";
333 };
334
Yan He6c7304c2012-11-09 22:07:08 -0800335 qcom,sps {
336 compatible = "qcom,msm_sps";
337 qcom,device-type = <3>;
338 };
339
Jeff Hugo4e20fda2013-04-10 12:40:19 -0600340 qcom,smem@d900000 {
Jeff Hugo818d0f72012-11-05 14:19:28 -0700341 compatible = "qcom,smem";
Jeff Hugoe1e30e72013-04-08 14:15:34 -0600342 reg = <0xd900000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800343 <0xf9011000 0x1000>,
Jeff Hugo818d0f72012-11-05 14:19:28 -0700344 <0xfc428000 0x4000>;
345 reg-names = "smem", "irq-reg-base", "aux-mem1";
346
347 qcom,smd-modem {
348 compatible = "qcom,smd";
349 qcom,smd-edge = <0>;
350 qcom,smd-irq-offset = <0x8>;
351 qcom,smd-irq-bitmask = <0x1000>;
352 qcom,pil-string = "modem";
353 interrupts = <0 25 1>;
354 };
355
356 qcom,smsm-modem {
357 compatible = "qcom,smsm";
358 qcom,smsm-edge = <0>;
359 qcom,smsm-irq-offset = <0x8>;
360 qcom,smsm-irq-bitmask = <0x2000>;
361 interrupts = <0 26 1>;
362 };
363
364 qcom,smd-adsp {
365 compatible = "qcom,smd";
366 qcom,smd-edge = <1>;
367 qcom,smd-irq-offset = <0x8>;
368 qcom,smd-irq-bitmask = <0x100>;
369 qcom,pil-string = "adsp";
370 interrupts = <0 156 1>;
371 };
372
373 qcom,smsm-adsp {
374 compatible = "qcom,smsm";
375 qcom,smsm-edge = <1>;
376 qcom,smsm-irq-offset = <0x8>;
377 qcom,smsm-irq-bitmask = <0x200>;
378 interrupts = <0 157 1>;
379 };
380
381 qcom,smd-wcnss {
382 compatible = "qcom,smd";
383 qcom,smd-edge = <6>;
384 qcom,smd-irq-offset = <0x8>;
385 qcom,smd-irq-bitmask = <0x20000>;
386 qcom,pil-string = "wcnss";
387 interrupts = <0 142 1>;
388 };
389
390 qcom,smsm-wcnss {
391 compatible = "qcom,smsm";
392 qcom,smsm-edge = <6>;
393 qcom,smsm-irq-offset = <0x8>;
394 qcom,smsm-irq-bitmask = <0x80000>;
395 interrupts = <0 144 1>;
396 };
397
398 qcom,smd-rpm {
399 compatible = "qcom,smd";
400 qcom,smd-edge = <15>;
401 qcom,smd-irq-offset = <0x8>;
402 qcom,smd-irq-bitmask = <0x1>;
403 interrupts = <0 168 1>;
404 qcom,irq-no-suspend;
405 };
David Ng5a3cb232012-12-03 16:42:53 -0800406 };
Hanumant Singh4e334c82012-11-14 10:16:39 -0800407
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700408 rpm_bus: qcom,rpm-smd {
409 compatible = "qcom,rpm-smd";
410 rpm-channel-name = "rpm_requests";
411 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Priyanka Mathur6e993c92013-03-20 11:17:27 -0700412 rpm-standalone;
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700413 };
414
Olav Haugan8340d932013-01-25 12:03:11 -0800415 qcom,msm-mem-hole {
416 compatible = "qcom,msm-mem-hole";
Olav Hauganfcc860e2013-04-06 10:56:06 -0700417 qcom,memblock-remove = <0x07B00000 0x6400000>; /* Address and Size of Hole */
Olav Haugan8340d932013-01-25 12:03:11 -0800418 };
419
Hanumant Singh4e334c82012-11-14 10:16:39 -0800420 qcom,wdt@f9017000 {
421 compatible = "qcom,msm-watchdog";
422 reg = <0xf9017000 0x1000>;
423 interrupts = <0 3 0>, <0 4 0>;
424 qcom,bark-time = <11000>;
425 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800426 qcom,ipi-ping;
Jeff Hugo818d0f72012-11-05 14:19:28 -0700427 };
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700428
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800429 qcom,acpuclk@f9011050 {
430 compatible = "qcom,acpuclk-a7";
431 reg = <0xf9011050 0x8>;
432 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700433 a7_cpu-supply = <&apc_vreg_corner>;
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800434 };
435
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700436 spmi_bus: qcom,spmi@fc4c0000 {
437 cell-index = <0>;
438 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700439 reg-names = "core", "intr", "cnfg";
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700440 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700441 <0Xfc4cb000 0x1000>,
442 <0Xfc4ca000 0x1000>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700443 /* 190,ee0_krait_hlos_spmi_periph_irq */
444 /* 187,channel_0_krait_hlos_trans_done_irq */
445 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700446 qcom,pmic-arb-ee = <0>;
447 qcom,pmic-arb-channel = <0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700448 };
449
Chun Zhangf39a0652013-05-01 15:57:54 -0700450 i2c@f9923000 { /* BLSP-1 QUP-1 */
451 cell-index = <1>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700452 compatible = "qcom,i2c-qup";
453 #address-cells = <1>;
454 #size-cells = <0>;
455 reg-names = "qup_phys_addr";
Chun Zhangf39a0652013-05-01 15:57:54 -0700456 reg = <0xf9923000 0x1000>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700457 interrupt-names = "qup_err_intr";
Chun Zhangf39a0652013-05-01 15:57:54 -0700458 interrupts = <0 95 0>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700459 qcom,i2c-bus-freq = <100000>;
Chun Zhangf39a0652013-05-01 15:57:54 -0700460 qcom,i2c-src-freq = <19200000>;
461 qcom,sda-gpio = <&msmgpio 2 0>;
462 qcom,scl-gpio = <&msmgpio 3 0>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700463 };
464
Kuirong Wangc6d072c2013-01-29 10:33:03 -0800465 i2c_cdc: i2c@f9927000 { /* BLSP1 QUP5 */
466 cell-index = <5>;
467 compatible = "qcom,i2c-qup";
468 #address-cells = <1>;
469 #size-cells = <0>;
470 reg-names = "qup_phys_addr";
471 reg = <0xf9927000 0x1000>;
472 interrupt-names = "qup_err_intr";
473 interrupts = <0 99 0>;
474 qcom,i2c-bus-freq = <100000>;
475 };
476
Lokesh Kumar Aakulu25213502013-05-07 17:43:03 -0700477 i2c: i2c@f9928000 { /* BLSP1 QUP6 */
Kenneth Heitke0d4fbb12013-04-10 12:51:14 -0600478 cell-index = <6>;
479 compatible = "qcom,i2c-qup";
480 #address-cells = <1>;
481 #size-cells = <0>;
482 reg-names = "qup_phys_addr";
483 reg = <0xf9928000 0x1000>;
484 interrupt-names = "qup_err_intr";
485 interrupts = <0 100 0>;
486 qcom,i2c-bus-freq = <100000>;
487 qcom,i2c-src-freq = <19200000>;
488 qcom,sda-gpio = <&msmgpio 16 0>;
489 qcom,scl-gpio = <&msmgpio 17 0>;
490 };
Gilad Avidovf58f1832013-01-09 17:31:28 -0700491
Chun Zhangf39a0652013-05-01 15:57:54 -0700492 i2c@f9925000 { /* BLSP-1 QUP-3 */
493 cell-index = <0>;
494 compatible = "qcom,i2c-qup";
Gilad Avidovf58f1832013-01-09 17:31:28 -0700495 #address-cells = <1>;
496 #size-cells = <0>;
Chun Zhangf39a0652013-05-01 15:57:54 -0700497 reg-names = "qup_phys_addr";
498 reg = <0xf9925000 0x1000>;
499 interrupt-names = "qup_err_intr";
500 interrupts = <0 97 0>;
501 qcom,i2c-bus-freq = <100000>;
Gilad Avidovf58f1832013-01-09 17:31:28 -0700502 };
503
Gilad Avidova460c472013-04-12 16:23:32 -0600504 spi_4: spi@f9926000 { /* BLSP1 QUP4 */
505 compatible = "qcom,spi-qup-v2";
506 #address-cells = <1>;
507 #size-cells = <0>;
508 reg-names = "spi_physical", "spi_bam_physical";
509 reg = <0xf9926000 0x1000>,
510 <0xf9904000 0x15000>;
511 interrupt-names = "spi_irq", "spi_bam_irq";
512 interrupts = <0 98 0>, <0 238 0>;
513 spi-max-frequency = <50000000>;
514
515 gpios = <&msmgpio 89 0>, /* CLK */
516 <&msmgpio 87 0>, /* MISO */
517 <&msmgpio 86 0>; /* MOSI */
518 cs-gpios = <&msmgpio 88 0>;
519
520 qcom,infinite-mode = <0>;
521 qcom,use-bam;
522 qcom,ver-reg-exists;
523 qcom,bam-consumer-pipe-index = <18>;
524 qcom,bam-producer-pipe-index = <19>;
525 };
526
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800527 qcom,pronto@fb21b000 {
528 compatible = "qcom,pil-pronto";
529 reg = <0xfb21b000 0x3000>,
530 <0xfc401700 0x4>,
531 <0xfd485300 0xc>;
532 reg-names = "pmu_base", "clk_base", "halt_base";
533 interrupts = <0 149 1>;
534 vdd_pronto_pll-supply = <&pm8110_l10>;
535
536 qcom,firmware-name = "wcnss";
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700537
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700538 /* GPIO inputs from wcnss */
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700539 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700540 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700541 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700542
543 /* GPIO output to wcnss */
544 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800545 };
546
Sameer Thalappil1b65cd02013-04-03 16:42:34 -0700547 qcom,iris-fm {
548 compatible = "qcom,iris_fm";
549 };
550
Fred Oh92b18a02013-01-22 13:29:41 -0800551 sound {
552 compatible = "qcom,msm8x10-audio-codec";
553 qcom,model = "msm8x10-snd-card";
554 };
555
556 qcom,msm-pcm {
557 compatible = "qcom,msm-pcm-dsp";
Kuirong Wang16f52d62013-03-07 10:49:27 -0800558 qcom,msm-pcm-dsp-id = <0>;
Fred Oh92b18a02013-01-22 13:29:41 -0800559 };
560
Mingming Yin8b92f9b2013-05-01 14:10:26 -0700561 qcom,msm-pcm-low-latency {
562 compatible = "qcom,msm-pcm-dsp";
563 qcom,msm-pcm-dsp-id = <1>;
564 qcom,msm-pcm-low-latency;
565 };
566
Fred Oh92b18a02013-01-22 13:29:41 -0800567 qcom,msm-pcm-routing {
568 compatible = "qcom,msm-pcm-routing";
569 };
570
571 qcom,msm-pcm-lpa {
572 compatible = "qcom,msm-pcm-lpa";
573 };
574
575 qcom,msm-compr-dsp {
576 compatible = "qcom,msm-compr-dsp";
577 };
578
579 qcom,msm-voip-dsp {
580 compatible = "qcom,msm-voip-dsp";
581 };
582
583 qcom,msm-pcm-voice {
584 compatible = "qcom,msm-pcm-voice";
585 };
586
587 qcom,msm-stub-codec {
588 compatible = "qcom,msm-stub-codec";
589 };
590
591 qcom,msm-dai-fe {
592 compatible = "qcom,msm-dai-fe";
593 };
594
595 qcom,msm-pcm-afe {
596 compatible = "qcom,msm-pcm-afe";
597 };
598
599 qcom,msm-dai-mi2s {
600 compatible = "qcom,msm-dai-mi2s";
601 qcom,msm-dai-q6-mi2s-prim {
602 compatible = "qcom,msm-dai-q6-mi2s";
603 qcom,msm-dai-q6-mi2s-dev-id = <0>;
Kuirong Wang16f52d62013-03-07 10:49:27 -0800604 qcom,msm-mi2s-rx-lines = <0>;
605 qcom,msm-mi2s-tx-lines = <3>;
Fred Oh92b18a02013-01-22 13:29:41 -0800606 };
607
608 qcom,msm-dai-q6-mi2s-sec {
609 compatible = "qcom,msm-dai-q6-mi2s";
610 qcom,msm-dai-q6-mi2s-dev-id = <1>;
Kuirong Wang16f52d62013-03-07 10:49:27 -0800611 qcom,msm-mi2s-rx-lines = <3>;
612 qcom,msm-mi2s-tx-lines = <0>;
Fred Oh92b18a02013-01-22 13:29:41 -0800613 };
614 };
615
616 qcom,msm-dai-q6 {
617 compatible = "qcom,msm-dai-q6";
618 qcom,msm-dai-q6-bt-sco-rx {
619 compatible = "qcom,msm-dai-q6-dev";
620 qcom,msm-dai-q6-dev-id = <12288>;
621 };
622
623 qcom,msm-dai-q6-bt-sco-tx {
624 compatible = "qcom,msm-dai-q6-dev";
625 qcom,msm-dai-q6-dev-id = <12289>;
626 };
627
628 qcom,msm-dai-q6-int-fm-rx {
629 compatible = "qcom,msm-dai-q6-dev";
630 qcom,msm-dai-q6-dev-id = <12292>;
631 };
632
633 qcom,msm-dai-q6-int-fm-tx {
634 compatible = "qcom,msm-dai-q6-dev";
635 qcom,msm-dai-q6-dev-id = <12293>;
636 };
637
638 qcom,msm-dai-q6-be-afe-pcm-rx {
639 compatible = "qcom,msm-dai-q6-dev";
640 qcom,msm-dai-q6-dev-id = <224>;
641 };
642
643 qcom,msm-dai-q6-be-afe-pcm-tx {
644 compatible = "qcom,msm-dai-q6-dev";
645 qcom,msm-dai-q6-dev-id = <225>;
646 };
647
648 qcom,msm-dai-q6-afe-proxy-rx {
649 compatible = "qcom,msm-dai-q6-dev";
650 qcom,msm-dai-q6-dev-id = <241>;
651 };
652
653 qcom,msm-dai-q6-afe-proxy-tx {
654 compatible = "qcom,msm-dai-q6-dev";
655 qcom,msm-dai-q6-dev-id = <240>;
656 };
Vicky Sehrawatfc8044f2013-04-18 11:34:32 -0700657
658 qcom,msm-dai-q6-incall-record-rx {
659 compatible = "qcom,msm-dai-q6-dev";
660 qcom,msm-dai-q6-dev-id = <32771>;
661 };
662
663 qcom,msm-dai-q6-incall-record-tx {
664 compatible = "qcom,msm-dai-q6-dev";
665 qcom,msm-dai-q6-dev-id = <32772>;
666 };
667
668 qcom,msm-dai-q6-incall-music-rx {
669 compatible = "qcom,msm-dai-q6-dev";
670 qcom,msm-dai-q6-dev-id = <32773>;
671 };
Fred Oh92b18a02013-01-22 13:29:41 -0800672 };
673
674 qcom,msm-pcm-hostless {
675 compatible = "qcom,msm-pcm-hostless";
676 };
677
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700678 qcom,wcnss-wlan@fb000000 {
679 compatible = "qcom,wcnss_wlan";
Sameer Thalappilb2b93672013-04-18 17:00:46 -0700680 reg = <0xfb000000 0x280000>,
681 <0xf9011008 0x04>;
682 reg-names = "wcnss_mmio", "wcnss_fiq";
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700683 interrupts = <0 145 0>, <0 146 0>;
684 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
685
686 qcom,pronto-vddmx-supply = <&pm8110_l3>;
687 qcom,pronto-vddcx-supply = <&pm8110_s1>;
688 qcom,pronto-vddpx-supply = <&pm8110_l6>;
689 qcom,iris-vddxo-supply = <&pm8110_l10>;
690 qcom,iris-vddrfa-supply = <&pm8110_l5>;
691 qcom,iris-vddpa-supply = <&pm8110_l16>;
692 qcom,iris-vdddig-supply = <&pm8110_l5>;
693
694 gpios = <&msmgpio 23 0>, <&msmgpio 24 0>, <&msmgpio 25 0>, <&msmgpio 26 0>, <&msmgpio 27 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700695 qcom,has-pronto-hw;
Sameer Thalappilb56dc142013-05-21 14:23:46 -0700696 qcom,wlan-rx-buff-count = <256>;
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700697 };
698
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800699 qcom,mss@fc880000 {
700 compatible = "qcom,pil-q6v5-mss";
701 reg = <0xfc880000 0x100>,
702 <0xfd485000 0x400>,
703 <0xfc820000 0x020>,
704 <0xfc401680 0x004>,
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800705 <0xfd485194 0x4>;
706 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700707 "restart_reg", "cxrail_bhs_reg";
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800708
709 interrupts = <0 24 1>;
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800710 vdd_cx-supply = <&pm8110_s1_corner>;
711 vdd_mx-supply = <&pm8110_l3>;
712 vdd_pll-supply = <&pm8110_l10>;
713 qcom,vdd_pll = <1800000>;
714 qcom,is-loadable;
715 qcom,firmware-name = "mba";
716 qcom,pil-self-auth;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700717
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800718 /* GPIO inputs from mss */
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700719 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800720 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800721 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700722 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700723
724 /* GPIO output to mss */
725 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800726 };
727
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800728 qcom,lpass@fe200000 {
729 compatible = "qcom,pil-q6v5-lpass";
730 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800731 <0xfd485100 0x00010>,
732 <0xfc4016c0 0x00004>;
733 reg-names = "qdsp6_base", "halt_base", "restart_reg";
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800734 interrupts = <0 162 1>;
Matt Wagantall6c515982013-01-29 14:58:43 -0800735 vdd_cx-supply = <&pm8110_s1_corner>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800736 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700737
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700738 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700739 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700740 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700741 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700742
743 /* GPIO output to lpass */
744 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800745 };
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700746
747 tsens: tsens@fc4a8000 {
748 compatible = "qcom,msm-tsens";
749 reg = <0xfc4a8000 0x2000>,
750 <0xfc4b8000 0x1000>;
751 reg-names = "tsens_physical", "tsens_eeprom_physical";
752 interrupts = <0 184 0>;
753 qcom,sensors = <2>;
754 qcom,slope = <2901 2846>;
Siddartha Mohanadossb2f48982013-03-28 13:51:38 -0700755 qcom,calib-mode = "fuse_map3";
Siddartha Mohanadoss921f1f02013-04-04 16:30:03 -0700756 qcom,sensor-id = <0 5>;
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700757 };
758
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700759 qcom,msm-thermal {
760 compatible = "qcom,msm-thermal";
Jennifer Liud17e9eb2013-04-17 11:56:58 -0700761 qcom,sensor-id = <5>;
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700762 qcom,poll-ms = <250>;
763 qcom,limit-temp = <60>;
764 qcom,temp-hysteresis = <10>;
765 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600766 qcom,freq-control-mask = <0xf>;
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700767 };
Jeff Hugoae4ab9f62013-04-08 13:43:08 -0600768
769 qcom,ipc-spinlock@fd484000 {
770 compatible = "qcom,ipc-spinlock-sfpb";
771 reg = <0xfd484000 0x400>;
772 qcom,num-locks = <8>;
773 };
Jeff Hugode2822a2013-04-08 14:09:38 -0600774
775 qcom,bam_dmux@fc834000 {
776 compatible = "qcom,bam_dmux";
777 reg = <0xfc834000 0x7000>;
778 interrupts = <0 29 1>;
779 };
Hariprasad Dhalinarasimha3a3e4e32013-04-14 16:18:30 -0700780
781 qcom,qseecom@7B00000 {
782 compatible = "qcom,qseecom";
783 reg = <0x7B00000 0x500000>;
784 reg-names = "secapp-region";
785 qcom,disk-encrypt-pipe-pair = <2>;
786 qcom,hlos-ce-hw-instance = <0>;
787 qcom,qsee-ce-hw-instance = <0>;
788 qcom,msm-bus,name = "qseecom-noc";
789 qcom,msm-bus,num-cases = <4>;
790 qcom,msm-bus,active-only = <0>;
791 qcom,msm-bus,num-paths = <1>;
792 qcom,msm-bus,vectors-KBps =
793 <55 512 0 0>,
794 <55 512 3936000 393600>,
795 <55 512 3936000 393600>,
796 <55 512 3936000 393600>;
797 };
Aparna Dase7cab2e2013-04-16 16:54:47 -0700798
Hariprasad Dhalinarasimhac8e0f312013-04-13 17:18:50 -0700799 qcom,msm-rng@f9bff000 {
800 compatible = "qcom,msm-rng";
801 reg = <0xf9bff000 0x200>;
802 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700803 qcom,msm-bus,name = "msm-rng-noc";
804 qcom,msm-bus,num-cases = <2>;
805 qcom,msm-bus,num-paths = <1>;
806 qcom,msm-bus,vectors-KBps =
807 <1 618 0 0>,
808 <1 618 0 800>;
Hariprasad Dhalinarasimhac8e0f312013-04-13 17:18:50 -0700809 };
810
Aparna Das2948da92013-04-25 10:11:15 -0700811 qcom,msm-rtb {
812 compatible = "qcom,msm-rtb";
813 qcom,memory-reservation-type = "EBI1";
814 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
815 };
816
Aparna Dase7cab2e2013-04-16 16:54:47 -0700817 jtag_mm0: jtagmm@fc34c000 {
818 compatible = "qcom,jtag-mm";
819 reg = <0xfc34c000 0x1000>,
820 <0xfc340000 0x1000>;
821 reg-names = "etm-base","debug-base";
822 };
823
824 jtag_mm1: jtagmm@fc34d000 {
825 compatible = "qcom,jtag-mm";
826 reg = <0xfc34d000 0x1000>,
827 <0xfc342000 0x1000>;
828 reg-names = "etm-base","debug-base";
829 };
830
831 jtag_mm2: jtagmm@fc34e000 {
832 compatible = "qcom,jtag-mm";
833 reg = <0xfc34e000 0x1000>,
834 <0xfc344000 0x1000>;
835 reg-names = "etm-base","debug-base";
836 };
837
838 jtag_mm3: jtagmm@fc34f000 {
839 compatible = "qcom,jtag-mm";
840 reg = <0xfc34f000 0x1000>,
841 <0xfc346000 0x1000>;
842 reg-names = "etm-base","debug-base";
843 };
Hariprasad Dhalinarasimha9d3638a2013-04-13 22:42:11 -0700844
845 qcom,tz-log@fe805720 {
846 compatible = "qcom,tz-log";
847 reg = <0x0fe805720 0x1000>;
848 };
Hariprasad Dhalinarasimha30af29a2013-05-07 17:48:04 -0700849
850 qcom,qcrypto@fd404000 {
851 compatible = "qcom,qcrypto";
852 reg = <0xfd400000 0x20000>,
853 <0xfd404000 0x8000>;
854 reg-names = "crypto-base","crypto-bam-base";
855 interrupts = <0 207 0>;
856 qcom,bam-pipe-pair = <2>;
857 qcom,ce-hw-instance = <1>;
858 qcom,ce-hw-shared;
859 qcom,msm-bus,name = "qcrypto-noc";
860 qcom,msm-bus,num-cases = <2>;
861 qcom,msm-bus,active-only = <0>;
862 qcom,msm-bus,num-paths = <1>;
863 qcom,msm-bus,vectors-KBps =
864 <55 512 0 0>,
865 <55 512 393600 3936000>;
866 };
867
868 qcom,qcedev@fd400000 {
869 compatible = "qcom,qcedev";
870 reg = <0xfd400000 0x20000>,
871 <0xfd404000 0x8000>;
872 reg-names = "crypto-base","crypto-bam-base";
873 interrupts = <0 207 0>;
874 qcom,bam-pipe-pair = <1>;
875 qcom,ce-hw-instance = <1>;
876 qcom,ce-hw-shared;
877 qcom,msm-bus,name = "qcedev-noc";
878 qcom,msm-bus,num-cases = <2>;
879 qcom,msm-bus,active-only = <0>;
880 qcom,msm-bus,num-paths = <1>;
881 qcom,msm-bus,vectors-KBps =
882 <55 512 0 0>,
883 <55 512 393600 3936000>;
884 };
885
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700886};
David Collinsc6b34832012-10-24 12:57:57 -0700887
Matt Wagantall1bf56932012-11-29 15:03:29 -0800888&gdsc_vfe {
889 status = "ok";
890};
891
892&gdsc_oxili_cx {
893 status = "ok";
894};
895
Olav Haugan9c255522012-11-16 16:43:17 -0800896&lpass_iommu {
897 status = "ok";
898};
899
900&copss_iommu {
901 status = "ok";
902};
903
904&mdpe_iommu {
905 status = "ok";
906};
907
908&mdps_iommu {
909 status = "ok";
910};
911
912&gfx_iommu {
913 status = "ok";
914};
915
916&vfe_iommu {
917 status = "ok";
918};
919
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -0800920/include/ "msm8610-iommu-domains.dtsi"
Olav Haugan4bc4b692012-12-10 18:29:35 -0800921
Xiaozhe Shi350baa92013-04-09 18:13:50 -0700922/include/ "msm-pm8110-rpm-regulator.dtsi"
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700923/include/ "msm-pm8110.dtsi"
Xiaozhe Shi1581a7b2013-02-21 15:17:57 -0800924/include/ "msm8610-regulator.dtsi"
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700925
926&pm8110_vadc {
927 chan@0 {
928 label = "usb_in";
929 reg = <0>;
930 qcom,decimation = <0>;
931 qcom,pre-div-channel-scaling = <4>;
932 qcom,calibration-type = "absolute";
933 qcom,scale-function = <0>;
934 qcom,hw-settle-time = <0>;
935 qcom,fast-avg-setup = <0>;
936 };
937
938 chan@2 {
939 label = "vchg_sns";
940 reg = <2>;
941 qcom,decimation = <0>;
Siddartha Mohanadoss478e5c92013-05-01 19:53:27 -0700942 qcom,pre-div-channel-scaling = <2>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700943 qcom,calibration-type = "absolute";
944 qcom,scale-function = <0>;
945 qcom,hw-settle-time = <0>;
946 qcom,fast-avg-setup = <0>;
947 };
948
949 chan@5 {
950 label = "vcoin";
951 reg = <5>;
952 qcom,decimation = <0>;
953 qcom,pre-div-channel-scaling = <1>;
954 qcom,calibration-type = "absolute";
955 qcom,scale-function = <0>;
956 qcom,hw-settle-time = <0>;
957 qcom,fast-avg-setup = <0>;
958 };
959
960 chan@6 {
961 label = "vbat_sns";
962 reg = <6>;
963 qcom,decimation = <0>;
964 qcom,pre-div-channel-scaling = <1>;
965 qcom,calibration-type = "absolute";
966 qcom,scale-function = <0>;
967 qcom,hw-settle-time = <0>;
968 qcom,fast-avg-setup = <0>;
969 };
970
971 chan@7 {
972 label = "vph_pwr";
973 reg = <7>;
974 qcom,decimation = <0>;
975 qcom,pre-div-channel-scaling = <1>;
976 qcom,calibration-type = "absolute";
977 qcom,scale-function = <0>;
978 qcom,hw-settle-time = <0>;
979 qcom,fast-avg-setup = <0>;
980 };
981
982 chan@30 {
983 label = "batt_therm";
984 reg = <0x30>;
985 qcom,decimation = <0>;
986 qcom,pre-div-channel-scaling = <0>;
987 qcom,calibration-type = "ratiometric";
988 qcom,scale-function = <1>;
989 qcom,hw-settle-time = <2>;
990 qcom,fast-avg-setup = <0>;
991 };
992
993 chan@31 {
994 label = "batt_id";
995 reg = <0x31>;
996 qcom,decimation = <0>;
997 qcom,pre-div-channel-scaling = <0>;
998 qcom,calibration-type = "ratiometric";
999 qcom,scale-function = <0>;
1000 qcom,hw-settle-time = <2>;
1001 qcom,fast-avg-setup = <0>;
1002 };
1003
1004 chan@b2 {
1005 label = "xo_therm_pu2";
1006 reg = <0xb2>;
1007 qcom,decimation = <0>;
1008 qcom,pre-div-channel-scaling = <0>;
1009 qcom,calibration-type = "ratiometric";
1010 qcom,scale-function = <4>;
1011 qcom,hw-settle-time = <2>;
1012 qcom,fast-avg-setup = <0>;
1013 };
Siddartha Mohanadoss984b11e2013-05-31 18:05:51 -07001014
1015 chan@13 {
1016 label = "pa_therm0";
1017 reg = <0x13>;
1018 qcom,decimation = <0>;
1019 qcom,pre-div-channel-scaling = <0>;
1020 qcom,calibration-type = "ratiometric";
1021 qcom,scale-function = <2>;
1022 qcom,hw-settle-time = <2>;
1023 qcom,fast-avg-setup = <0>;
1024 };
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -07001025};
1026
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -07001027&pm8110_adc_tm {
1028 /* Channel Node */
1029 chan@30 {
1030 label = "batt_therm";
1031 reg = <0x30>;
1032 qcom,decimation = <0>;
1033 qcom,pre-div-channel-scaling = <0>;
1034 qcom,calibration-type = "ratiometric";
1035 qcom,scale-function = <1>;
1036 qcom,hw-settle-time = <2>;
1037 qcom,fast-avg-setup = <3>;
1038 qcom,btm-channel-number = <0x48>;
1039 };
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -07001040
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -07001041 chan@8 {
1042 label = "die_temp";
1043 reg = <8>;
1044 qcom,decimation = <0>;
1045 qcom,pre-div-channel-scaling = <0>;
1046 qcom,calibration-type = "absolute";
1047 qcom,scale-function = <3>;
1048 qcom,hw-settle-time = <0>;
1049 qcom,fast-avg-setup = <3>;
1050 qcom,btm-channel-number = <0x68>;
1051 };
1052
1053 chan@6 {
1054 label = "vbat_sns";
1055 reg = <6>;
1056 qcom,decimation = <0>;
1057 qcom,pre-div-channel-scaling = <1>;
1058 qcom,calibration-type = "absolute";
1059 qcom,scale-function = <0>;
1060 qcom,hw-settle-time = <0>;
1061 qcom,fast-avg-setup = <3>;
1062 qcom,btm-channel-number = <0x70>;
1063 };
Siddartha Mohanadoss984b11e2013-05-31 18:05:51 -07001064
1065 chan@13 {
1066 label = "pa_therm0";
1067 reg = <0x13>;
1068 qcom,decimation = <0>;
1069 qcom,pre-div-channel-scaling = <0>;
1070 qcom,calibration-type = "ratiometric";
1071 qcom,scale-function = <2>;
1072 qcom,hw-settle-time = <2>;
1073 qcom,fast-avg-setup = <0>;
1074 qcom,btm-channel-number = <0x78>;
1075 qcom,thermal-node;
1076 };
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -07001077};