Gitiles
Code Review Sign In
gerrit-public.fairphone.software / platform / external / XNNPACK / 8b283aa30a3186c6e640aed520543e9c067132d2 / . / BUILD.bazel
blob: 92c2a36211c4b113113b4692f94a5b850bd69c55 [file] [log] [blame]
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1# Copyright 2019 Google LLC
2#
3# This source code is licensed under the BSD-style license found in the
4# LICENSE file in the root directory of this source tree.
5#
6# Description:
7# XNNPACK - optimized floating-point neural network operators library
8
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]9load(":build_defs.bzl", "xnnpack_aggregate_library", "xnnpack_benchmark", "xnnpack_binary", "xnnpack_cc_library", "xnnpack_gcc_std_copts", "xnnpack_min_size_copts", "xnnpack_msvc_std_copts", "xnnpack_optional_armcl_copts", "xnnpack_optional_armcl_deps", "xnnpack_optional_dnnl_copts", "xnnpack_optional_dnnl_deps", "xnnpack_optional_gemmlowp_copts", "xnnpack_optional_gemmlowp_deps", "xnnpack_optional_ruy_copts", "xnnpack_optional_ruy_deps", "xnnpack_optional_tflite_copts", "xnnpack_optional_tflite_deps", "xnnpack_std_cxxopts", "xnnpack_unit_test", "xnnpack_visibility")
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]10
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]11licenses(["notice"])
12
13exports_files(["LICENSE"])
14
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]15OPERATOR_BENCHMARK_DEPS = [
16 ":XNNPACK",
17 ":bench_utils",
18 "@cpuinfo",
Frank Barchard0c849732020-06-12 13:31:32 -0700[diff] [blame]19 "@FP16",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]20 "@pthreadpool",
21]
22
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]23MICROKERNEL_BENCHMARK_DEPS = [
24 ":ukernels",
25 ":bench_utils",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]26 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]27 "@cpuinfo",
28 "@FP16",
29 "@pthreadpool",
30]
31
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]32ACCURACY_EVAL_DEPS = [
33 ":XNNPACK",
34 ":ukernels",
35 "@FP16",
36 "@pthreadpool",
37]
38
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]39MICROKERNEL_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]40 ":ukernels_test_mode",
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]41 ":enable_assembly",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]42 "@cpuinfo",
43 "@FP16",
44 "@pthreadpool",
45]
46
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]47OPERATOR_TEST_DEPS = [
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]48 ":XNNPACK_test_mode",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]49 "@pthreadpool",
50 "@FP16",
51]
52
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]53OPERATOR_SRCS = [
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]54 "src/operators/argmax-pooling-nhwc.c",
55 "src/operators/average-pooling-nhwc.c",
56 "src/operators/binary-elementwise-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]57 "src/operators/channel-shuffle-nc.c",
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]58 "src/operators/constant-pad-nd.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]59 "src/operators/convolution-nchw.c",
60 "src/operators/convolution-nhwc.c",
61 "src/operators/deconvolution-nhwc.c",
62 "src/operators/fully-connected-nc.c",
63 "src/operators/global-average-pooling-ncw.c",
64 "src/operators/global-average-pooling-nwc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]65 "src/operators/leaky-relu-nc.c",
66 "src/operators/max-pooling-nhwc.c",
67 "src/operators/prelu-nc.c",
68 "src/operators/resize-bilinear-nhwc.c",
69 "src/operators/sigmoid-nc.c",
70 "src/operators/softmax-nc.c",
Marat Dukhanc3065f52020-06-04 13:33:32 -0700[diff] [blame]71 "src/operators/unary-elementwise-nc.c",
Marat Dukhane8265432020-04-28 18:42:59 -0700[diff] [blame]72 "src/operators/unpooling-nhwc.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]73]
74
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]75SUBGRAPH_SRCS = [
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]76 "src/subgraph/abs.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]77 "src/subgraph/add2.c",
78 "src/subgraph/argmax-pooling-2d.c",
79 "src/subgraph/average-pooling-2d.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]80 "src/subgraph/bankers-rounding.c",
81 "src/subgraph/ceiling.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]82 "src/subgraph/clamp.c",
83 "src/subgraph/convolution-2d.c",
84 "src/subgraph/deconvolution-2d.c",
85 "src/subgraph/depthwise-convolution-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]86 "src/subgraph/divide.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]87 "src/subgraph/fully-connected.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]88 "src/subgraph/floor.c",
Marat Dukhana059b7d2020-06-11 11:41:27 -0700[diff] [blame]89 "src/subgraph/global-average-pooling-2d.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]90 "src/subgraph/hardswish.c",
Marat Dukhan5bbebac2020-06-10 19:42:15 -0700[diff] [blame]91 "src/subgraph/leaky-relu.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]92 "src/subgraph/max-pooling-2d.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]93 "src/subgraph/maximum2.c",
94 "src/subgraph/minimum2.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]95 "src/subgraph/multiply2.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]96 "src/subgraph/negate.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]97 "src/subgraph/prelu.c",
98 "src/subgraph/sigmoid.c",
99 "src/subgraph/softmax.c",
100 "src/subgraph/static-constant-pad.c",
Marat Dukhan5fab4092020-06-10 01:28:28 -0700[diff] [blame]101 "src/subgraph/square.c",
Marat Dukhan9d3a4592020-06-05 16:52:42 -0700[diff] [blame]102 "src/subgraph/squared-difference.c",
103 "src/subgraph/subtract.c",
Marat Dukhan95e8b7a2020-06-03 12:46:26 -0700[diff] [blame]104 "src/subgraph/unpooling-2d.c",
105]
106
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]107TABLE_SRCS = [
108 "src/tables/exp2-k-over-64.c",
109 "src/tables/exp2-k-over-2048.c",
110]
111
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]112SCALAR_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]113 "src/f32-argmaxpool/4x-scalar-c1.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]114 "src/f32-argmaxpool/9p8x-scalar-c1.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]115 "src/f32-argmaxpool/9x-scalar-c1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]116 "src/f32-avgpool/9p8x-minmax-scalar-c1.c",
117 "src/f32-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]118 "src/f32-clamp/gen/scalar-x1.c",
119 "src/f32-clamp/gen/scalar-x2.c",
120 "src/f32-clamp/gen/scalar-x4.c",
Marat Dukhan441e2212019-12-04 18:30:49 -0800[diff] [blame]121 "src/f32-conv-hwc/3x3s2p0p1c3x4-scalar-1x1.c",
Marat Dukhan6b7dfae2019-12-04 16:00:52 -0800[diff] [blame]122 "src/f32-conv-hwc/3x3s2p1c3x4-scalar-1x1.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]123 "src/f32-conv-hwc2chw/3x3s2p1c3x4-scalar-1x1.c",
124 "src/f32-dwconv-chw/3x3p1-scalar.c",
125 "src/f32-dwconv-chw/3x3s2p1-scalar.c",
126 "src/f32-dwconv-chw/5x5p2-scalar.c",
127 "src/f32-dwconv-chw/5x5s2p2-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]128 "src/f32-dwconv/gen/up1x4-scalar-acc2.c",
129 "src/f32-dwconv/gen/up1x4-scalar.c",
130 "src/f32-dwconv/gen/up1x9-scalar-acc2.c",
131 "src/f32-dwconv/gen/up1x9-scalar.c",
132 "src/f32-dwconv/gen/up1x25-scalar-acc2.c",
133 "src/f32-dwconv/gen/up1x25-scalar.c",
134 "src/f32-dwconv/gen/up2x4-scalar-acc2.c",
135 "src/f32-dwconv/gen/up2x4-scalar.c",
136 "src/f32-dwconv/gen/up2x9-scalar-acc2.c",
137 "src/f32-dwconv/gen/up2x9-scalar.c",
138 "src/f32-dwconv/gen/up2x25-scalar-acc2.c",
139 "src/f32-dwconv/gen/up2x25-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]140 "src/f32-dwconv/gen/up1x4-minmax-scalar-acc2.c",
141 "src/f32-dwconv/gen/up1x4-minmax-scalar.c",
142 "src/f32-dwconv/gen/up1x9-minmax-scalar-acc2.c",
143 "src/f32-dwconv/gen/up1x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]144 "src/f32-dwconv/gen/up1x25-minmax-scalar-acc2.c",
145 "src/f32-dwconv/gen/up1x25-minmax-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]146 "src/f32-dwconv/gen/up2x4-minmax-scalar-acc2.c",
147 "src/f32-dwconv/gen/up2x4-minmax-scalar.c",
148 "src/f32-dwconv/gen/up2x9-minmax-scalar-acc2.c",
149 "src/f32-dwconv/gen/up2x9-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]150 "src/f32-dwconv/gen/up2x25-minmax-scalar-acc2.c",
151 "src/f32-dwconv/gen/up2x25-minmax-scalar.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]152 "src/f32-gavgpool-cw/scalar-x1.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]153 "src/f32-gavgpool/7p7x-minmax-scalar-c1.c",
154 "src/f32-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]155 "src/f32-gemm/gen-inc/1x4inc-minmax-scalar.c",
156 "src/f32-gemm/gen-inc/2x4inc-minmax-scalar.c",
157 "src/f32-gemm/gen-inc/4x4inc-minmax-scalar.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]158 "src/f32-gemm/gen/1x4-scalar.c",
159 "src/f32-gemm/gen/2x4-scalar.c",
160 "src/f32-gemm/gen/4x2-scalar.c",
161 "src/f32-gemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]162 "src/f32-gemm/gen/1x4-relu-scalar.c",
163 "src/f32-gemm/gen/2x4-relu-scalar.c",
164 "src/f32-gemm/gen/4x2-relu-scalar.c",
165 "src/f32-gemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]166 "src/f32-gemm/gen/1x4-minmax-scalar.c",
167 "src/f32-gemm/gen/2x4-minmax-scalar.c",
168 "src/f32-gemm/gen/4x2-minmax-scalar.c",
169 "src/f32-gemm/gen/4x4-minmax-scalar.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]170 "src/f32-hswish/gen/scalar-x1.c",
171 "src/f32-hswish/gen/scalar-x2.c",
172 "src/f32-hswish/gen/scalar-x4.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]173 "src/f32-ibilinear/gen/scalar-c1.c",
174 "src/f32-ibilinear/gen/scalar-c2.c",
175 "src/f32-ibilinear/gen/scalar-c4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]176 "src/f32-igemm/gen/1x4-scalar.c",
177 "src/f32-igemm/gen/2x4-scalar.c",
178 "src/f32-igemm/gen/4x2-scalar.c",
179 "src/f32-igemm/gen/4x4-scalar.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]180 "src/f32-igemm/gen/1x4-relu-scalar.c",
181 "src/f32-igemm/gen/2x4-relu-scalar.c",
182 "src/f32-igemm/gen/4x2-relu-scalar.c",
183 "src/f32-igemm/gen/4x4-relu-scalar.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]184 "src/f32-igemm/gen/1x4-minmax-scalar.c",
185 "src/f32-igemm/gen/2x4-minmax-scalar.c",
186 "src/f32-igemm/gen/4x2-minmax-scalar.c",
187 "src/f32-igemm/gen/4x4-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]188 "src/f32-maxpool/9p8x-minmax-scalar-c1.c",
189 "src/f32-pavgpool/9p8x-minmax-scalar-c1.c",
190 "src/f32-pavgpool/9x-minmax-scalar-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]191 "src/f32-ppmm/gen/2x4-minmax-scalar.c",
192 "src/f32-ppmm/gen/3x3-minmax-scalar.c",
193 "src/f32-ppmm/gen/4x2-minmax-scalar.c",
194 "src/f32-ppmm/gen/4x4-minmax-scalar.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]195 "src/f32-prelu/gen/scalar-2x1.c",
196 "src/f32-prelu/gen/scalar-2x4.c",
Marat Dukhanf46f6752020-01-21 11:03:49 -0800[diff] [blame]197 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x1.c",
198 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2.c",
199 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x2-acc2.c",
200 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4.c",
201 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc2.c",
202 "src/f32-raddstoreexpminusmax/gen/scalar-lut64-p2-x4-acc4.c",
203 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x1.c",
204 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2.c",
205 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x2-acc2.c",
206 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4.c",
207 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc2.c",
208 "src/f32-raddstoreexpminusmax/gen/scalar-p5-x4-acc4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]209 "src/f32-rmax/scalar.c",
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]210 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x1.c",
211 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x2.c",
212 "src/f32-sigmoid/gen/scalar-lut2048-p1-div-x4.c",
213 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x1.c",
214 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x2.c",
215 "src/f32-sigmoid/gen/scalar-lut64-p2-div-x4.c",
216 "src/f32-sigmoid/gen/scalar-p5-div-x1.c",
217 "src/f32-sigmoid/gen/scalar-p5-div-x2.c",
218 "src/f32-sigmoid/gen/scalar-p5-div-x4.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]219 "src/f32-spmm/gen/1x1-minmax-scalar-pipelined.c",
220 "src/f32-spmm/gen/1x1-minmax-scalar.c",
221 "src/f32-spmm/gen/2x1-minmax-scalar-pipelined.c",
222 "src/f32-spmm/gen/2x1-minmax-scalar.c",
223 "src/f32-spmm/gen/4x1-minmax-scalar-pipelined.c",
224 "src/f32-spmm/gen/4x1-minmax-scalar.c",
225 "src/f32-spmm/gen/8x1-minmax-scalar-pipelined.c",
226 "src/f32-spmm/gen/8x1-minmax-scalar.c",
227 "src/f32-spmm/gen/8x2-minmax-scalar.c",
228 "src/f32-spmm/gen/8x4-minmax-scalar.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]229 "src/f32-vbinary/gen/vadd-minmax-scalar-x1.c",
230 "src/f32-vbinary/gen/vadd-minmax-scalar-x2.c",
231 "src/f32-vbinary/gen/vadd-minmax-scalar-x4.c",
232 "src/f32-vbinary/gen/vaddc-minmax-scalar-x1.c",
233 "src/f32-vbinary/gen/vaddc-minmax-scalar-x2.c",
234 "src/f32-vbinary/gen/vaddc-minmax-scalar-x4.c",
235 "src/f32-vbinary/gen/vdiv-minmax-scalar-x1.c",
236 "src/f32-vbinary/gen/vdiv-minmax-scalar-x2.c",
237 "src/f32-vbinary/gen/vdiv-minmax-scalar-x4.c",
238 "src/f32-vbinary/gen/vdivc-minmax-scalar-x1.c",
239 "src/f32-vbinary/gen/vdivc-minmax-scalar-x2.c",
240 "src/f32-vbinary/gen/vdivc-minmax-scalar-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]241 "src/f32-vbinary/gen/vmax-scalar-x1.c",
242 "src/f32-vbinary/gen/vmax-scalar-x2.c",
243 "src/f32-vbinary/gen/vmax-scalar-x4.c",
244 "src/f32-vbinary/gen/vmaxc-scalar-x1.c",
245 "src/f32-vbinary/gen/vmaxc-scalar-x2.c",
246 "src/f32-vbinary/gen/vmaxc-scalar-x4.c",
247 "src/f32-vbinary/gen/vmin-scalar-x1.c",
248 "src/f32-vbinary/gen/vmin-scalar-x2.c",
249 "src/f32-vbinary/gen/vmin-scalar-x4.c",
250 "src/f32-vbinary/gen/vminc-scalar-x1.c",
251 "src/f32-vbinary/gen/vminc-scalar-x2.c",
252 "src/f32-vbinary/gen/vminc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]253 "src/f32-vbinary/gen/vmul-minmax-scalar-x1.c",
254 "src/f32-vbinary/gen/vmul-minmax-scalar-x2.c",
255 "src/f32-vbinary/gen/vmul-minmax-scalar-x4.c",
256 "src/f32-vbinary/gen/vmulc-minmax-scalar-x1.c",
257 "src/f32-vbinary/gen/vmulc-minmax-scalar-x2.c",
258 "src/f32-vbinary/gen/vmulc-minmax-scalar-x4.c",
259 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x1.c",
260 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x2.c",
261 "src/f32-vbinary/gen/vrdivc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]262 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x1.c",
263 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x2.c",
264 "src/f32-vbinary/gen/vrsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]265 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x1.c",
266 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x2.c",
267 "src/f32-vbinary/gen/vrsubc-minmax-scalar-x4.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]268 "src/f32-vbinary/gen/vsqrdiff-scalar-x1.c",
269 "src/f32-vbinary/gen/vsqrdiff-scalar-x2.c",
270 "src/f32-vbinary/gen/vsqrdiff-scalar-x4.c",
271 "src/f32-vbinary/gen/vsqrdiffc-scalar-x1.c",
272 "src/f32-vbinary/gen/vsqrdiffc-scalar-x2.c",
273 "src/f32-vbinary/gen/vsqrdiffc-scalar-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]274 "src/f32-vbinary/gen/vsub-minmax-scalar-x1.c",
275 "src/f32-vbinary/gen/vsub-minmax-scalar-x2.c",
276 "src/f32-vbinary/gen/vsub-minmax-scalar-x4.c",
277 "src/f32-vbinary/gen/vsubc-minmax-scalar-x1.c",
278 "src/f32-vbinary/gen/vsubc-minmax-scalar-x2.c",
279 "src/f32-vbinary/gen/vsubc-minmax-scalar-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]280 "src/f32-vlrelu/gen/scalar-x1.c",
281 "src/f32-vlrelu/gen/scalar-x2.c",
282 "src/f32-vlrelu/gen/scalar-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]283 "src/f32-vmulcaddc/gen/c1-minmax-scalar-2x.c",
284 "src/f32-vmulcaddc/gen/c2-minmax-scalar-2x.c",
285 "src/f32-vmulcaddc/gen/c4-minmax-scalar-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]286 "src/f32-vrnd/gen/vrndne-scalar-libm-x1.c",
287 "src/f32-vrnd/gen/vrndne-scalar-libm-x2.c",
288 "src/f32-vrnd/gen/vrndne-scalar-libm-x4.c",
289 "src/f32-vrnd/gen/vrndz-scalar-libm-x1.c",
290 "src/f32-vrnd/gen/vrndz-scalar-libm-x2.c",
291 "src/f32-vrnd/gen/vrndz-scalar-libm-x4.c",
292 "src/f32-vrnd/gen/vrndu-scalar-libm-x1.c",
293 "src/f32-vrnd/gen/vrndu-scalar-libm-x2.c",
294 "src/f32-vrnd/gen/vrndu-scalar-libm-x4.c",
295 "src/f32-vrnd/gen/vrndd-scalar-libm-x1.c",
296 "src/f32-vrnd/gen/vrndd-scalar-libm-x2.c",
297 "src/f32-vrnd/gen/vrndd-scalar-libm-x4.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]298 "src/f32-vunary/gen/vabs-scalar-x1.c",
299 "src/f32-vunary/gen/vabs-scalar-x2.c",
300 "src/f32-vunary/gen/vabs-scalar-x4.c",
301 "src/f32-vunary/gen/vneg-scalar-x1.c",
302 "src/f32-vunary/gen/vneg-scalar-x2.c",
303 "src/f32-vunary/gen/vneg-scalar-x4.c",
304 "src/f32-vunary/gen/vsqr-scalar-x1.c",
305 "src/f32-vunary/gen/vsqr-scalar-x2.c",
306 "src/f32-vunary/gen/vsqr-scalar-x4.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]307 "src/math/expminus-scalar-lut2048-p1.c",
308 "src/math/expminus-scalar-lut64-p2.c",
309 "src/math/expminus-scalar-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]310 "src/math/roundne-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]311 "src/math/roundne-scalar-nearbyint.c",
312 "src/math/roundne-scalar-rint.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]313 "src/math/roundd-scalar-addsub.c",
314 "src/math/roundd-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]315 "src/math/roundd-scalar-floor.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]316 "src/math/roundu-scalar-addsub.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]317 "src/math/roundu-scalar-ceil.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]318 "src/math/roundu-scalar-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]319 "src/math/roundz-scalar-addsub.c",
320 "src/math/roundz-scalar-cvt.c",
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]321 "src/math/roundz-scalar-trunc.c",
Marat Dukhan5739f702019-12-22 19:45:09 -0800[diff] [blame]322 "src/math/sigmoid-scalar-lut2048-p1-div.c",
323 "src/math/sigmoid-scalar-lut64-p2-div.c",
324 "src/math/sigmoid-scalar-p5-div.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]325 "src/q8-avgpool/9p8x-minmax-scalar-c1.c",
326 "src/q8-avgpool/9x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]327 "src/q8-dwconv/up1x9-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]328 "src/q8-gavgpool/7p7x-minmax-scalar-c1.c",
329 "src/q8-gavgpool/7x-minmax-scalar-c1.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]330 "src/q8-gemm/2x2-minmax-scalar.c",
331 "src/q8-igemm/2x2-minmax-scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]332 "src/q8-vadd/minmax-scalar.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]333 "src/u8-clamp/scalar-x4.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]334 "src/u8-lut32norm/scalar.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]335 "src/u8-maxpool/9p8x-minmax-scalar-c1.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]336 "src/u8-rmax/scalar.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]337 "src/x32-fill/scalar-float.c",
338 "src/x32-fill/scalar-int.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]339 "src/x32-packx/x2-scalar.c",
340 "src/x32-packx/x3-scalar.c",
341 "src/x32-packx/x4-scalar.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]342 "src/x32-pad/scalar-int.c",
343 "src/x32-pad/scalar-float.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]344 "src/x32-unpool/scalar.c",
345 "src/x32-zip/x2-scalar.c",
346 "src/x32-zip/x3-scalar.c",
347 "src/x32-zip/x4-scalar.c",
348 "src/x32-zip/xm-scalar.c",
349 "src/x8-lut/scalar.c",
350 "src/x8-zip/x2-scalar.c",
351 "src/x8-zip/x3-scalar.c",
352 "src/x8-zip/x4-scalar.c",
353 "src/x8-zip/xm-scalar.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]354 "src/requantization/precise-scalar.c",
355 "src/requantization/fp32-scalar.c",
356 "src/requantization/q31-scalar.c",
357 "src/requantization/gemmlowp-scalar.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]358]
359
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]360WASM_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]361 "src/f32-avgpool/9p8x-minmax-wasm-c1.c",
362 "src/f32-avgpool/9x-minmax-wasm-c1.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]363 "src/f32-clamp/gen/wasm-x1.c",
364 "src/f32-clamp/gen/wasm-x2.c",
365 "src/f32-clamp/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]366 "src/f32-dwconv/gen/up1x4-wasm-acc2.c",
367 "src/f32-dwconv/gen/up1x4-wasm.c",
368 "src/f32-dwconv/gen/up1x9-wasm-acc2.c",
369 "src/f32-dwconv/gen/up1x9-wasm.c",
370 "src/f32-dwconv/gen/up1x25-wasm-acc2.c",
371 "src/f32-dwconv/gen/up1x25-wasm.c",
372 "src/f32-dwconv/gen/up2x4-wasm-acc2.c",
373 "src/f32-dwconv/gen/up2x4-wasm.c",
374 "src/f32-dwconv/gen/up2x9-wasm-acc2.c",
375 "src/f32-dwconv/gen/up2x9-wasm.c",
376 "src/f32-dwconv/gen/up2x25-wasm-acc2.c",
377 "src/f32-dwconv/gen/up2x25-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]378 "src/f32-dwconv/gen/up1x4-minmax-wasm-acc2.c",
379 "src/f32-dwconv/gen/up1x4-minmax-wasm.c",
380 "src/f32-dwconv/gen/up1x9-minmax-wasm-acc2.c",
381 "src/f32-dwconv/gen/up1x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]382 "src/f32-dwconv/gen/up1x25-minmax-wasm-acc2.c",
383 "src/f32-dwconv/gen/up1x25-minmax-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]384 "src/f32-dwconv/gen/up2x4-minmax-wasm-acc2.c",
385 "src/f32-dwconv/gen/up2x4-minmax-wasm.c",
386 "src/f32-dwconv/gen/up2x9-minmax-wasm-acc2.c",
387 "src/f32-dwconv/gen/up2x9-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]388 "src/f32-dwconv/gen/up2x25-minmax-wasm-acc2.c",
389 "src/f32-dwconv/gen/up2x25-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]390 "src/f32-gavgpool/7p7x-minmax-wasm-c1.c",
391 "src/f32-gavgpool/7x-minmax-wasm-c1.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]392 "src/f32-gemm/gen-inc/1x4inc-minmax-wasm.c",
393 "src/f32-gemm/gen-inc/2x4inc-minmax-wasm.c",
394 "src/f32-gemm/gen-inc/4x4inc-minmax-wasm.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]395 "src/f32-gemm/gen/1x4-wasm.c",
396 "src/f32-gemm/gen/2x4-wasm.c",
397 "src/f32-gemm/gen/4x2-wasm.c",
398 "src/f32-gemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]399 "src/f32-gemm/gen/1x4-relu-wasm.c",
400 "src/f32-gemm/gen/2x4-relu-wasm.c",
401 "src/f32-gemm/gen/4x2-relu-wasm.c",
402 "src/f32-gemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]403 "src/f32-gemm/gen/1x4-minmax-wasm.c",
404 "src/f32-gemm/gen/2x4-minmax-wasm.c",
405 "src/f32-gemm/gen/4x2-minmax-wasm.c",
406 "src/f32-gemm/gen/4x4-minmax-wasm.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]407 "src/f32-hswish/gen/wasm-x1.c",
408 "src/f32-hswish/gen/wasm-x2.c",
409 "src/f32-hswish/gen/wasm-x4.c",
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]410 "src/f32-igemm/gen/1x4-wasm.c",
411 "src/f32-igemm/gen/2x4-wasm.c",
412 "src/f32-igemm/gen/4x2-wasm.c",
413 "src/f32-igemm/gen/4x4-wasm.c",
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]414 "src/f32-igemm/gen/1x4-relu-wasm.c",
415 "src/f32-igemm/gen/2x4-relu-wasm.c",
416 "src/f32-igemm/gen/4x2-relu-wasm.c",
417 "src/f32-igemm/gen/4x4-relu-wasm.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]418 "src/f32-igemm/gen/1x4-minmax-wasm.c",
419 "src/f32-igemm/gen/2x4-minmax-wasm.c",
420 "src/f32-igemm/gen/4x2-minmax-wasm.c",
421 "src/f32-igemm/gen/4x4-minmax-wasm.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]422 "src/f32-maxpool/9p8x-minmax-wasm-c1.c",
423 "src/f32-pavgpool/9p8x-minmax-wasm-c1.c",
424 "src/f32-pavgpool/9x-minmax-wasm-c1.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]425 "src/f32-vbinary/gen/vadd-minmax-wasm-x1.c",
426 "src/f32-vbinary/gen/vadd-minmax-wasm-x2.c",
427 "src/f32-vbinary/gen/vadd-minmax-wasm-x4.c",
428 "src/f32-vbinary/gen/vaddc-minmax-wasm-x1.c",
429 "src/f32-vbinary/gen/vaddc-minmax-wasm-x2.c",
430 "src/f32-vbinary/gen/vaddc-minmax-wasm-x4.c",
431 "src/f32-vbinary/gen/vdiv-minmax-wasm-x1.c",
432 "src/f32-vbinary/gen/vdiv-minmax-wasm-x2.c",
433 "src/f32-vbinary/gen/vdiv-minmax-wasm-x4.c",
434 "src/f32-vbinary/gen/vdivc-minmax-wasm-x1.c",
435 "src/f32-vbinary/gen/vdivc-minmax-wasm-x2.c",
436 "src/f32-vbinary/gen/vdivc-minmax-wasm-x4.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]437 "src/f32-vbinary/gen/vmax-wasm-x1.c",
438 "src/f32-vbinary/gen/vmax-wasm-x2.c",
439 "src/f32-vbinary/gen/vmax-wasm-x4.c",
440 "src/f32-vbinary/gen/vmaxc-wasm-x1.c",
441 "src/f32-vbinary/gen/vmaxc-wasm-x2.c",
442 "src/f32-vbinary/gen/vmaxc-wasm-x4.c",
443 "src/f32-vbinary/gen/vmin-wasm-x1.c",
444 "src/f32-vbinary/gen/vmin-wasm-x2.c",
445 "src/f32-vbinary/gen/vmin-wasm-x4.c",
446 "src/f32-vbinary/gen/vminc-wasm-x1.c",
447 "src/f32-vbinary/gen/vminc-wasm-x2.c",
448 "src/f32-vbinary/gen/vminc-wasm-x4.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]449 "src/f32-vbinary/gen/vmul-minmax-wasm-x1.c",
450 "src/f32-vbinary/gen/vmul-minmax-wasm-x2.c",
451 "src/f32-vbinary/gen/vmul-minmax-wasm-x4.c",
452 "src/f32-vbinary/gen/vmulc-minmax-wasm-x1.c",
453 "src/f32-vbinary/gen/vmulc-minmax-wasm-x2.c",
454 "src/f32-vbinary/gen/vmulc-minmax-wasm-x4.c",
455 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x1.c",
456 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x2.c",
457 "src/f32-vbinary/gen/vrdivc-minmax-wasm-x4.c",
458 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x1.c",
459 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x2.c",
460 "src/f32-vbinary/gen/vrsubc-minmax-wasm-x4.c",
461 "src/f32-vbinary/gen/vsub-minmax-wasm-x1.c",
462 "src/f32-vbinary/gen/vsub-minmax-wasm-x2.c",
463 "src/f32-vbinary/gen/vsub-minmax-wasm-x4.c",
464 "src/f32-vbinary/gen/vsubc-minmax-wasm-x1.c",
465 "src/f32-vbinary/gen/vsubc-minmax-wasm-x2.c",
466 "src/f32-vbinary/gen/vsubc-minmax-wasm-x4.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]467 "src/f32-vlrelu/gen/wasm-x1.c",
468 "src/f32-vlrelu/gen/wasm-x2.c",
469 "src/f32-vlrelu/gen/wasm-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]470 "src/f32-vmulcaddc/gen/c1-minmax-wasm-2x.c",
471 "src/f32-vmulcaddc/gen/c2-minmax-wasm-2x.c",
472 "src/f32-vmulcaddc/gen/c4-minmax-wasm-2x.c",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]473]
474
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]475WASMSIMD_UKERNELS = [
Marat Dukhanb8e7b072020-06-16 12:34:23 -0700[diff] [blame]476 "src/f32-dwconv/gen/up4x25-wasmsimd.c",
477 "src/f32-dwconv/gen/up4x4-wasmsimd.c",
478 "src/f32-dwconv/gen/up4x9-wasmsimd.c",
479 "src/f32-dwconv/gen/up8x25-wasmsimd.c",
480 "src/f32-dwconv/gen/up8x4-wasmsimd.c",
481 "src/f32-dwconv/gen/up8x9-wasmsimd.c",
Marat Dukhanac014d72020-06-16 08:36:47 -0700[diff] [blame]482 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-arm.c",
483 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-arm.c",
484 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-arm.c",
485 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-arm.c",
486 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-arm.c",
487 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-arm.c",
488 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-arm.c",
489 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-arm.c",
490 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-arm.c",
491 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-arm.c",
492 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-arm.c",
493 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-arm.c",
494 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-acc2-x86.c",
495 "src/f32-dwconv/gen/up4x25-minmax-wasmsimd-x86.c",
496 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-acc2-x86.c",
497 "src/f32-dwconv/gen/up4x4-minmax-wasmsimd-x86.c",
498 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-acc2-x86.c",
499 "src/f32-dwconv/gen/up4x9-minmax-wasmsimd-x86.c",
500 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-acc2-x86.c",
501 "src/f32-dwconv/gen/up8x25-minmax-wasmsimd-x86.c",
502 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-acc2-x86.c",
503 "src/f32-dwconv/gen/up8x4-minmax-wasmsimd-x86.c",
504 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-acc2-x86.c",
505 "src/f32-dwconv/gen/up8x9-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]506 "src/f32-gemm/gen/1x8-wasmsimd-splat.c",
507 "src/f32-gemm/gen/4x8-wasmsimd-splat.c",
508 "src/f32-gemm/gen/5x8-wasmsimd-splat.c",
509 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-arm.c",
510 "src/f32-gemm/gen/5x8-relu-wasmsimd-splat-arm.c",
511 "src/f32-gemm/gen/1x8-relu-wasmsimd-splat-x86.c",
512 "src/f32-gemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]513 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
514 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
515 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-arm.c",
516 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
517 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
518 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-arm.c",
519 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
520 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
521 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-arm.c",
522 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
523 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
524 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-arm.c",
525 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
526 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
527 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-arm.c",
528 "src/f32-gemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
529 "src/f32-gemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
530 "src/f32-gemm/gen/1x8s4-minmax-wasmsimd-x86.c",
531 "src/f32-gemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
532 "src/f32-gemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
533 "src/f32-gemm/gen/3x8s4-minmax-wasmsimd-x86.c",
534 "src/f32-gemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
535 "src/f32-gemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
536 "src/f32-gemm/gen/4x8s4-minmax-wasmsimd-x86.c",
537 "src/f32-gemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
538 "src/f32-gemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
539 "src/f32-gemm/gen/5x8s4-minmax-wasmsimd-x86.c",
540 "src/f32-gemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
541 "src/f32-gemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
542 "src/f32-gemm/gen/6x8s4-minmax-wasmsimd-x86.c",
543 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-arm.c",
544 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-arm.c",
545 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-arm.c",
546 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-arm.c",
547 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-arm.c",
548 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-arm.c",
549 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-arm.c",
550 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-arm.c",
551 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-arm.c",
552 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-arm.c",
553 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-arm.c",
554 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-arm.c",
555 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-arm.c",
556 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-arm.c",
557 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-arm.c",
558 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-loadsplat-x86.c",
559 "src/f32-gemm/gen-inc/1x8inc-minmax-wasmsimd-splat-x86.c",
560 "src/f32-gemm/gen-inc/1x8s4inc-minmax-wasmsimd-x86.c",
561 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-loadsplat-x86.c",
562 "src/f32-gemm/gen-inc/3x8inc-minmax-wasmsimd-splat-x86.c",
563 "src/f32-gemm/gen-inc/3x8s4inc-minmax-wasmsimd-x86.c",
564 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-loadsplat-x86.c",
565 "src/f32-gemm/gen-inc/4x8inc-minmax-wasmsimd-splat-x86.c",
566 "src/f32-gemm/gen-inc/4x8s4inc-minmax-wasmsimd-x86.c",
567 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-loadsplat-x86.c",
568 "src/f32-gemm/gen-inc/5x8inc-minmax-wasmsimd-splat-x86.c",
569 "src/f32-gemm/gen-inc/5x8s4inc-minmax-wasmsimd-x86.c",
570 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-loadsplat-x86.c",
571 "src/f32-gemm/gen-inc/6x8inc-minmax-wasmsimd-splat-x86.c",
572 "src/f32-gemm/gen-inc/6x8s4inc-minmax-wasmsimd-x86.c",
Marat Dukhan802808c2020-06-16 11:01:17 -0700[diff] [blame]573 "src/f32-igemm/gen/1x8-wasmsimd-splat.c",
574 "src/f32-igemm/gen/4x8-wasmsimd-splat.c",
575 "src/f32-igemm/gen/5x8-wasmsimd-splat.c",
576 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-arm.c",
577 "src/f32-igemm/gen/5x8-relu-wasmsimd-splat-arm.c",
578 "src/f32-igemm/gen/1x8-relu-wasmsimd-splat-x86.c",
579 "src/f32-igemm/gen/4x8-relu-wasmsimd-splat-x86.c",
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]580 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-arm.c",
581 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-arm.c",
582 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-arm.c",
583 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-arm.c",
584 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-arm.c",
585 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-arm.c",
586 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-arm.c",
587 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-arm.c",
588 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-arm.c",
589 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-arm.c",
590 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-arm.c",
591 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-arm.c",
592 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-arm.c",
593 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-arm.c",
594 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-arm.c",
595 "src/f32-igemm/gen/1x8-minmax-wasmsimd-loadsplat-x86.c",
596 "src/f32-igemm/gen/1x8-minmax-wasmsimd-splat-x86.c",
597 "src/f32-igemm/gen/1x8s4-minmax-wasmsimd-x86.c",
598 "src/f32-igemm/gen/3x8-minmax-wasmsimd-loadsplat-x86.c",
599 "src/f32-igemm/gen/3x8-minmax-wasmsimd-splat-x86.c",
600 "src/f32-igemm/gen/3x8s4-minmax-wasmsimd-x86.c",
601 "src/f32-igemm/gen/4x8-minmax-wasmsimd-loadsplat-x86.c",
602 "src/f32-igemm/gen/4x8-minmax-wasmsimd-splat-x86.c",
603 "src/f32-igemm/gen/4x8s4-minmax-wasmsimd-x86.c",
604 "src/f32-igemm/gen/5x8-minmax-wasmsimd-loadsplat-x86.c",
605 "src/f32-igemm/gen/5x8-minmax-wasmsimd-splat-x86.c",
606 "src/f32-igemm/gen/5x8s4-minmax-wasmsimd-x86.c",
607 "src/f32-igemm/gen/6x8-minmax-wasmsimd-loadsplat-x86.c",
608 "src/f32-igemm/gen/6x8-minmax-wasmsimd-splat-x86.c",
609 "src/f32-igemm/gen/6x8s4-minmax-wasmsimd-x86.c",
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]610 "src/requantization/fp32-wasmsimd.c",
611]
612
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]613PSIMD_FASTMATH_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]614 "src/f32-argmaxpool/4x-psimd-c4.c",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]615 "src/f32-argmaxpool/9p8x-psimd-c4.c",
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]616 "src/f32-argmaxpool/9x-psimd-c4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]617 "src/f32-avgpool/9p8x-minmax-psimd-c4.c",
618 "src/f32-avgpool/9x-minmax-psimd-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]619 "src/f32-clamp/gen/psimd-x4.c",
620 "src/f32-clamp/gen/psimd-x8.c",
Erich Elsen0a1970e2020-06-10 09:24:59 -0700[diff] [blame]621 "src/f32-conv-hwc2chw/3x3s2p1c3x4-psimd-2x2.c",
Erich Elsene6214af2020-06-10 22:17:22 -0700[diff] [blame]622 "src/f32-dwconv-chw/3x3p1-psimd.c",
Erich Elsenfd7a6e32020-06-11 12:04:44 -0700[diff] [blame]623 "src/f32-dwconv-chw/3x3s2p1-psimd.c",
Erich Elsen28928892020-06-12 08:08:19 -0700[diff] [blame]624 "src/f32-dwconv-chw/5x5p2-psimd.c",
Erich Elsen7465a892020-06-13 14:02:04 -0700[diff] [blame]625 "src/f32-dwconv-chw/5x5s2p2-psimd.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]626 "src/f32-dwconv/gen/up4x25-minmax-psimd-acc2.c",
627 "src/f32-dwconv/gen/up4x25-minmax-psimd.c",
628 "src/f32-dwconv/gen/up4x4-minmax-psimd-acc2.c",
629 "src/f32-dwconv/gen/up4x4-minmax-psimd.c",
630 "src/f32-dwconv/gen/up4x9-minmax-psimd-acc2.c",
631 "src/f32-dwconv/gen/up4x9-minmax-psimd.c",
632 "src/f32-dwconv/gen/up8x25-minmax-psimd-acc2.c",
633 "src/f32-dwconv/gen/up8x25-minmax-psimd.c",
634 "src/f32-dwconv/gen/up8x4-minmax-psimd-acc2.c",
635 "src/f32-dwconv/gen/up8x4-minmax-psimd.c",
636 "src/f32-dwconv/gen/up8x9-minmax-psimd-acc2.c",
637 "src/f32-dwconv/gen/up8x9-minmax-psimd.c",
Erich Elsen6f278b52020-06-10 16:13:11 -0700[diff] [blame]638 "src/f32-gavgpool-cw/psimd-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]639 "src/f32-gavgpool/7p7x-minmax-psimd-c4.c",
640 "src/f32-gavgpool/7x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]641 "src/f32-gemm/gen/1x8-minmax-psimd-loadsplat.c",
642 "src/f32-gemm/gen/1x8-minmax-psimd-splat.c",
643 "src/f32-gemm/gen/1x8s4-minmax-psimd.c",
644 "src/f32-gemm/gen/4x2c4-minmax-psimd.c",
645 "src/f32-gemm/gen/4x8-minmax-psimd-loadsplat.c",
646 "src/f32-gemm/gen/4x8-minmax-psimd-splat.c",
647 "src/f32-gemm/gen/4x8s4-minmax-psimd.c",
648 "src/f32-gemm/gen/6x8-minmax-psimd-loadsplat.c",
649 "src/f32-gemm/gen/6x8-minmax-psimd-splat.c",
650 "src/f32-gemm/gen/6x8s4-minmax-psimd.c",
651 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-loadsplat.c",
652 "src/f32-gemm/gen-inc/1x8inc-minmax-psimd-splat.c",
653 "src/f32-gemm/gen-inc/1x8s4inc-minmax-psimd.c",
654 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-loadsplat.c",
655 "src/f32-gemm/gen-inc/4x8inc-minmax-psimd-splat.c",
656 "src/f32-gemm/gen-inc/4x8s4inc-minmax-psimd.c",
657 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-loadsplat.c",
658 "src/f32-gemm/gen-inc/6x8inc-minmax-psimd-splat.c",
659 "src/f32-gemm/gen-inc/6x8s4inc-minmax-psimd.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]660 "src/f32-hswish/gen/psimd-x4.c",
661 "src/f32-hswish/gen/psimd-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]662 "src/f32-ibilinear/gen/psimd-c4.c",
663 "src/f32-ibilinear/gen/psimd-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]664 "src/f32-igemm/gen/1x8-minmax-psimd-loadsplat.c",
665 "src/f32-igemm/gen/1x8-minmax-psimd-splat.c",
666 "src/f32-igemm/gen/1x8s4-minmax-psimd.c",
667 "src/f32-igemm/gen/4x2c4-minmax-psimd.c",
668 "src/f32-igemm/gen/4x8-minmax-psimd-loadsplat.c",
669 "src/f32-igemm/gen/4x8-minmax-psimd-splat.c",
670 "src/f32-igemm/gen/4x8s4-minmax-psimd.c",
671 "src/f32-igemm/gen/6x8-minmax-psimd-loadsplat.c",
672 "src/f32-igemm/gen/6x8-minmax-psimd-splat.c",
673 "src/f32-igemm/gen/6x8s4-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]674 "src/f32-maxpool/9p8x-minmax-psimd-c4.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]675 "src/f32-spmm/gen/4x1-minmax-psimd.c",
676 "src/f32-spmm/gen/8x1-minmax-psimd.c",
677 "src/f32-spmm/gen/16x1-minmax-psimd.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]678 "src/f32-pavgpool/9p8x-minmax-psimd-c4.c",
679 "src/f32-pavgpool/9x-minmax-psimd-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]680 "src/f32-ppmm/gen/4x8-minmax-psimd.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]681 "src/f32-prelu/gen/psimd-2x4.c",
682 "src/f32-prelu/gen/psimd-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]683 "src/f32-rmax/psimd.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]684 "src/f32-vbinary/gen/vadd-minmax-psimd-x4.c",
685 "src/f32-vbinary/gen/vadd-minmax-psimd-x8.c",
686 "src/f32-vbinary/gen/vaddc-minmax-psimd-x4.c",
687 "src/f32-vbinary/gen/vaddc-minmax-psimd-x8.c",
688 "src/f32-vbinary/gen/vdiv-minmax-psimd-x4.c",
689 "src/f32-vbinary/gen/vdiv-minmax-psimd-x8.c",
690 "src/f32-vbinary/gen/vdivc-minmax-psimd-x4.c",
691 "src/f32-vbinary/gen/vdivc-minmax-psimd-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]692 "src/f32-vbinary/gen/vmax-psimd-x4.c",
693 "src/f32-vbinary/gen/vmax-psimd-x8.c",
694 "src/f32-vbinary/gen/vmaxc-psimd-x4.c",
695 "src/f32-vbinary/gen/vmaxc-psimd-x8.c",
696 "src/f32-vbinary/gen/vmin-psimd-x4.c",
697 "src/f32-vbinary/gen/vmin-psimd-x8.c",
698 "src/f32-vbinary/gen/vminc-psimd-x4.c",
699 "src/f32-vbinary/gen/vminc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]700 "src/f32-vbinary/gen/vmul-minmax-psimd-x4.c",
701 "src/f32-vbinary/gen/vmul-minmax-psimd-x8.c",
702 "src/f32-vbinary/gen/vmulc-minmax-psimd-x4.c",
703 "src/f32-vbinary/gen/vmulc-minmax-psimd-x8.c",
704 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x4.c",
705 "src/f32-vbinary/gen/vrdivc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]706 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x4.c",
707 "src/f32-vbinary/gen/vrsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]708 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x4.c",
709 "src/f32-vbinary/gen/vrsubc-minmax-psimd-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]710 "src/f32-vbinary/gen/vsqrdiff-psimd-x4.c",
711 "src/f32-vbinary/gen/vsqrdiff-psimd-x8.c",
712 "src/f32-vbinary/gen/vsqrdiffc-psimd-x4.c",
713 "src/f32-vbinary/gen/vsqrdiffc-psimd-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]714 "src/f32-vbinary/gen/vsub-minmax-psimd-x4.c",
715 "src/f32-vbinary/gen/vsub-minmax-psimd-x8.c",
716 "src/f32-vbinary/gen/vsubc-minmax-psimd-x4.c",
717 "src/f32-vbinary/gen/vsubc-minmax-psimd-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]718 "src/f32-vlrelu/gen/psimd-x4.c",
719 "src/f32-vlrelu/gen/psimd-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]720 "src/f32-vmulcaddc/gen/c4-minmax-psimd-2x.c",
721 "src/f32-vmulcaddc/gen/c8-minmax-psimd-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]722 "src/f32-vunary/gen/vabs-psimd-x4.c",
723 "src/f32-vunary/gen/vabs-psimd-x8.c",
724 "src/f32-vunary/gen/vneg-psimd-x4.c",
725 "src/f32-vunary/gen/vneg-psimd-x8.c",
726 "src/f32-vunary/gen/vsqr-psimd-x4.c",
727 "src/f32-vunary/gen/vsqr-psimd-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]728 "src/x32-fill/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]729 "src/x32-packx/x4-psimd.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]730 "src/x32-pad/psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]731 "src/x32-unpool/psimd.c",
732 "src/x32-zip/x2-psimd.c",
733 "src/x32-zip/x3-psimd.c",
734 "src/x32-zip/x4-psimd.c",
735 "src/x32-zip/xm-psimd.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]736 "src/requantization/precise-psimd.c",
737 "src/requantization/fp32-psimd.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]738]
739
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]740PSIMD_ACCMATH_UKERNELS = [
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]741 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x4.c",
742 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8.c",
743 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x8-acc2.c",
744 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12.c",
745 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc2.c",
746 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x12-acc3.c",
747 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16.c",
748 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc2.c",
749 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x16-acc4.c",
750 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20.c",
751 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc2.c",
752 "src/f32-raddstoreexpminusmax/gen/psimd-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]753 "src/f32-sigmoid/gen/psimd-p5-div-x4.c",
754 "src/f32-sigmoid/gen/psimd-p5-div-x8.c",
755 "src/f32-sigmoid/gen/psimd-p5-div-x12.c",
756 "src/f32-sigmoid/gen/psimd-p5-div-x16.c",
757 "src/f32-sigmoid/gen/psimd-p5-div-x20.c",
758 "src/f32-sigmoid/gen/psimd-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]759 "src/f32-vrnd/gen/vrndne-psimd-x4.c",
760 "src/f32-vrnd/gen/vrndne-psimd-x8.c",
761 "src/f32-vrnd/gen/vrndz-psimd-x4.c",
762 "src/f32-vrnd/gen/vrndz-psimd-x8.c",
763 "src/f32-vrnd/gen/vrndu-psimd-x4.c",
764 "src/f32-vrnd/gen/vrndu-psimd-x8.c",
765 "src/f32-vrnd/gen/vrndd-psimd-x4.c",
766 "src/f32-vrnd/gen/vrndd-psimd-x8.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]767 "src/math/roundne-psimd-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]768 "src/math/roundd-psimd-addsub.c",
769 "src/math/roundu-psimd-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]770 "src/math/roundz-psimd-addsub.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]771 "src/math/sigmoid-psimd-p5-div.c",
772]
773
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]774# ISA-specific micro-kernels
775NEON_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]776 "src/f32-avgpool/9p8x-minmax-neon-c4.c",
777 "src/f32-avgpool/9x-minmax-neon-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]778 "src/f32-clamp/gen/neon-x4.c",
779 "src/f32-clamp/gen/neon-x8.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]780 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x1.c",
781 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]782 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neon-2x2.c",
783 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neon-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]784 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x1.c",
785 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]786 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neon-2x2.c",
787 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neon-2x2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]788 "src/f32-dwconv/gen/up4x4-minmax-neon.c",
789 "src/f32-dwconv/gen/up4x4-minmax-neon-acc2.c",
790 "src/f32-dwconv/gen/up8x4-minmax-neon.c",
791 "src/f32-dwconv/gen/up8x4-minmax-neon-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]792 "src/f32-dwconv/gen/up4x9-minmax-neon.c",
793 "src/f32-dwconv/gen/up4x9-minmax-neon-acc2.c",
794 "src/f32-dwconv/gen/up8x9-minmax-neon.c",
795 "src/f32-dwconv/gen/up8x9-minmax-neon-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]796 "src/f32-dwconv/gen/up4x25-minmax-neon.c",
797 "src/f32-dwconv/gen/up4x25-minmax-neon-acc2.c",
798 "src/f32-dwconv/gen/up8x25-minmax-neon.c",
799 "src/f32-dwconv/gen/up8x25-minmax-neon-acc2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]800 "src/f32-gavgpool-cw/neon-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]801 "src/f32-gavgpool/7p7x-minmax-neon-c4.c",
802 "src/f32-gavgpool/7x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]803 "src/f32-gemm/gen/1x8-minmax-neon-lane-ld64.c",
804 "src/f32-gemm/gen/4x2-minmax-neon-lane-ld64.c",
805 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld128.c",
806 "src/f32-gemm/gen/4x8-minmax-neon-lane-ld64.c",
807 "src/f32-gemm/gen/5x8-minmax-neon-lane-ld64.c",
808 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld64.c",
809 "src/f32-gemm/gen/6x8-minmax-neon-lane-ld128.c",
810 "src/f32-gemm/gen/1x8-minmax-neon-dup-ld64.c",
811 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld128.c",
812 "src/f32-gemm/gen/4x8-minmax-neon-dup-ld64.c",
813 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld64.c",
814 "src/f32-gemm/gen/6x8-minmax-neon-dup-ld128.c",
815 "src/f32-gemm/gen/1x8s4-minmax-neon.c",
816 "src/f32-gemm/gen/4x8s4-minmax-neon.c",
817 "src/f32-gemm/gen/6x8s4-minmax-neon.c",
818 "src/f32-gemm/gen/8x8s4-minmax-neon.c",
819 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-lane-ld64.c",
820 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld128.c",
821 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-lane-ld64.c",
822 "src/f32-gemm/gen-inc/5x8inc-minmax-neon-lane-ld64.c",
823 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld64.c",
824 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-lane-ld128.c",
825 "src/f32-gemm/gen-inc/1x8inc-minmax-neon-dup-ld64.c",
826 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld128.c",
827 "src/f32-gemm/gen-inc/4x8inc-minmax-neon-dup-ld64.c",
828 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld64.c",
829 "src/f32-gemm/gen-inc/6x8inc-minmax-neon-dup-ld128.c",
830 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neon.c",
831 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neon.c",
832 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neon.c",
833 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neon.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]834 "src/f32-hswish/gen/neon-x4.c",
835 "src/f32-hswish/gen/neon-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]836 "src/f32-ibilinear/gen/neon-c4.c",
837 "src/f32-ibilinear/gen/neon-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]838 "src/f32-igemm/gen/1x8-minmax-neon-lane-ld64.c",
839 "src/f32-igemm/gen/4x2-minmax-neon-lane-ld64.c",
840 "src/f32-igemm/gen/4x4-minmax-neon-lane-ld64.c",
841 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld128.c",
842 "src/f32-igemm/gen/4x8-minmax-neon-lane-ld64.c",
843 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld64.c",
844 "src/f32-igemm/gen/6x8-minmax-neon-lane-ld128.c",
845 "src/f32-igemm/gen/1x8-minmax-neon-dup-ld64.c",
846 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld128.c",
847 "src/f32-igemm/gen/4x8-minmax-neon-dup-ld64.c",
848 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld64.c",
849 "src/f32-igemm/gen/6x8-minmax-neon-dup-ld128.c",
850 "src/f32-igemm/gen/1x8s4-minmax-neon.c",
851 "src/f32-igemm/gen/4x8s4-minmax-neon.c",
852 "src/f32-igemm/gen/6x8s4-minmax-neon.c",
853 "src/f32-igemm/gen/8x8s4-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]854 "src/f32-maxpool/9p8x-minmax-neon-c4.c",
855 "src/f32-pavgpool/9p8x-minmax-neon-c4.c",
856 "src/f32-pavgpool/9x-minmax-neon-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]857 "src/f32-ppmm/gen/4x8-minmax-neon.c",
858 "src/f32-ppmm/gen/8x8-minmax-neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]859 "src/f32-prelu/gen/neon-2x4.c",
860 "src/f32-prelu/gen/neon-2x8.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]861 "src/f32-raddstoreexpminusmax/gen/neon-p5-x4.c",
862 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8.c",
863 "src/f32-raddstoreexpminusmax/gen/neon-p5-x8-acc2.c",
864 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12.c",
865 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc2.c",
866 "src/f32-raddstoreexpminusmax/gen/neon-p5-x12-acc3.c",
867 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16.c",
868 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc2.c",
869 "src/f32-raddstoreexpminusmax/gen/neon-p5-x16-acc4.c",
870 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20.c",
871 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc2.c",
872 "src/f32-raddstoreexpminusmax/gen/neon-p5-x20-acc5.c",
873 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x4.c",
874 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8.c",
875 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x8-acc2.c",
876 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12.c",
877 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc2.c",
878 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x12-acc3.c",
879 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16.c",
880 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc2.c",
881 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x16-acc4.c",
882 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20.c",
883 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc2.c",
884 "src/f32-raddstoreexpminusmax/gen/neon-lut64-p2-x20-acc5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]885 "src/f32-rmax/neon.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]886 "src/f32-sigmoid/gen/neon-frac-p9-p10-nr1recps-x16.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]887 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x4.c",
888 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x8.c",
889 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x12.c",
890 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x16.c",
891 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x20.c",
892 "src/f32-sigmoid/gen/neon-rr2-p5-nr2recps-x24.c",
893 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x4.c",
894 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x8.c",
895 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x12.c",
896 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x16.c",
897 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x20.c",
898 "src/f32-sigmoid/gen/neon-rr2-lut64-p2-nr2recps-x24.c",
899 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x4.c",
900 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x8.c",
901 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x12.c",
902 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x16.c",
903 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x20.c",
904 "src/f32-sigmoid/gen/neon-rr2-lut2048-p1-nr2recps-x24.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]905 "src/f32-vbinary/gen/vadd-minmax-neon-x4.c",
906 "src/f32-vbinary/gen/vadd-minmax-neon-x8.c",
907 "src/f32-vbinary/gen/vaddc-minmax-neon-x4.c",
908 "src/f32-vbinary/gen/vaddc-minmax-neon-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]909 "src/f32-vbinary/gen/vmax-neon-x4.c",
910 "src/f32-vbinary/gen/vmax-neon-x8.c",
911 "src/f32-vbinary/gen/vmaxc-neon-x4.c",
912 "src/f32-vbinary/gen/vmaxc-neon-x8.c",
913 "src/f32-vbinary/gen/vmin-neon-x4.c",
914 "src/f32-vbinary/gen/vmin-neon-x8.c",
915 "src/f32-vbinary/gen/vminc-neon-x4.c",
916 "src/f32-vbinary/gen/vminc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]917 "src/f32-vbinary/gen/vmul-minmax-neon-x4.c",
918 "src/f32-vbinary/gen/vmul-minmax-neon-x8.c",
919 "src/f32-vbinary/gen/vmulc-minmax-neon-x4.c",
920 "src/f32-vbinary/gen/vmulc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]921 "src/f32-vbinary/gen/vrsqrdiffc-neon-x4.c",
922 "src/f32-vbinary/gen/vrsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]923 "src/f32-vbinary/gen/vrsubc-minmax-neon-x4.c",
924 "src/f32-vbinary/gen/vrsubc-minmax-neon-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]925 "src/f32-vbinary/gen/vsqrdiff-neon-x4.c",
926 "src/f32-vbinary/gen/vsqrdiff-neon-x8.c",
927 "src/f32-vbinary/gen/vsqrdiffc-neon-x4.c",
928 "src/f32-vbinary/gen/vsqrdiffc-neon-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]929 "src/f32-vbinary/gen/vsub-minmax-neon-x4.c",
930 "src/f32-vbinary/gen/vsub-minmax-neon-x8.c",
931 "src/f32-vbinary/gen/vsubc-minmax-neon-x4.c",
932 "src/f32-vbinary/gen/vsubc-minmax-neon-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]933 "src/f32-vlrelu/gen/neon-x4.c",
934 "src/f32-vlrelu/gen/neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]935 "src/f32-vmulcaddc/gen/c4-minmax-neon-2x.c",
936 "src/f32-vmulcaddc/gen/c8-minmax-neon-2x.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]937 "src/f32-vrnd/gen/vrndne-neon-x4.c",
938 "src/f32-vrnd/gen/vrndne-neon-x8.c",
939 "src/f32-vrnd/gen/vrndz-neon-x4.c",
940 "src/f32-vrnd/gen/vrndz-neon-x8.c",
941 "src/f32-vrnd/gen/vrndu-neon-x4.c",
942 "src/f32-vrnd/gen/vrndu-neon-x8.c",
943 "src/f32-vrnd/gen/vrndd-neon-x4.c",
944 "src/f32-vrnd/gen/vrndd-neon-x8.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]945 "src/f32-vunary/gen/vabs-neon-x4.c",
946 "src/f32-vunary/gen/vabs-neon-x8.c",
947 "src/f32-vunary/gen/vneg-neon-x4.c",
948 "src/f32-vunary/gen/vneg-neon-x8.c",
949 "src/f32-vunary/gen/vsqr-neon-x4.c",
950 "src/f32-vunary/gen/vsqr-neon-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]951 "src/q8-avgpool/9p8x-minmax-neon-c8.c",
952 "src/q8-avgpool/9x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]953 "src/q8-dwconv/up8x9-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]954 "src/q8-gavgpool/7p7x-minmax-neon-c8.c",
955 "src/q8-gavgpool/7x-minmax-neon-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]956 "src/q8-gemm/4x8-minmax-neon.c",
957 "src/q8-gemm/8x8-minmax-neon.c",
958 "src/q8-igemm/4x8-minmax-neon.c",
959 "src/q8-igemm/8x8-minmax-neon.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]960 "src/q8-vadd/minmax-neon.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]961 "src/u8-clamp/neon-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]962 "src/u8-maxpool/9p8x-minmax-neon-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]963 "src/u8-rmax/neon.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]964 "src/x32-fill/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]965 "src/x32-packx/x4-neon-st4.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]966 "src/x32-pad/neon.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]967 "src/x32-unpool/neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]968 "src/x32-zip/x2-neon.c",
969 "src/x32-zip/x3-neon.c",
970 "src/x32-zip/x4-neon.c",
971 "src/x32-zip/xm-neon.c",
972 "src/x8-zip/x2-neon.c",
973 "src/x8-zip/x3-neon.c",
974 "src/x8-zip/x4-neon.c",
975 "src/x8-zip/xm-neon.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]976 "src/math/roundne-neon-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]977 "src/math/roundd-neon-addsub.c",
978 "src/math/roundd-neon-cvt.c",
979 "src/math/roundu-neon-addsub.c",
980 "src/math/roundu-neon-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]981 "src/math/roundz-neon-addsub.c",
982 "src/math/roundz-neon-cvt.c",
Marat Dukhan68b3b452020-01-02 10:11:15 -0800[diff] [blame]983 "src/math/sigmoid-neon-frac-p9-p10-nr1recps.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]984 "src/math/sigmoid-neon-rr1-lut2048-p1-nr2recps.c",
985 "src/math/sigmoid-neon-rr1-lut64-p2-nr2recps.c",
986 "src/math/sigmoid-neon-rr1-p5-nr2recps.c",
987 "src/math/sigmoid-neon-rr2-lut2048-p1-nr2recps.c",
988 "src/math/sigmoid-neon-rr2-lut64-p2-nr2recps.c",
989 "src/math/sigmoid-neon-rr2-p5-nr2recps.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]990 "src/requantization/precise-neon.c",
991 "src/requantization/fp32-neon.c",
992 "src/requantization/q31-neon.c",
993 "src/requantization/gemmlowp-neon.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]994]
995
996NEONFMA_UKERNELS = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]997 "src/f32-ibilinear/gen/neonfma-c4.c",
998 "src/f32-ibilinear/gen/neonfma-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]999 "src/f32-igemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1000 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1001 "src/f32-igemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1002 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1003 "src/f32-igemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1004 "src/f32-igemm/gen/1x8s4-minmax-neonfma.c",
1005 "src/f32-igemm/gen/4x8s4-minmax-neonfma.c",
1006 "src/f32-igemm/gen/6x8s4-minmax-neonfma.c",
1007 "src/f32-igemm/gen/8x8s4-minmax-neonfma.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1008 "src/f32-dwconv/gen/up4x4-minmax-neonfma.c",
1009 "src/f32-dwconv/gen/up4x4-minmax-neonfma-acc2.c",
1010 "src/f32-dwconv/gen/up8x4-minmax-neonfma.c",
1011 "src/f32-dwconv/gen/up8x4-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1012 "src/f32-dwconv/gen/up4x9-minmax-neonfma.c",
1013 "src/f32-dwconv/gen/up4x9-minmax-neonfma-acc2.c",
1014 "src/f32-dwconv/gen/up8x9-minmax-neonfma.c",
1015 "src/f32-dwconv/gen/up8x9-minmax-neonfma-acc2.c",
Marat Dukhanf5425ea2020-04-24 01:46:00 -0700[diff] [blame]1016 "src/f32-dwconv/gen/up4x25-minmax-neonfma.c",
1017 "src/f32-dwconv/gen/up4x25-minmax-neonfma-acc2.c",
1018 "src/f32-dwconv/gen/up8x25-minmax-neonfma.c",
1019 "src/f32-dwconv/gen/up8x25-minmax-neonfma-acc2.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1020 "src/f32-gemm/gen/1x8-minmax-neonfma-dup-ld64.c",
1021 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld128.c",
1022 "src/f32-gemm/gen/4x8-minmax-neonfma-dup-ld64.c",
1023 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld64.c",
1024 "src/f32-gemm/gen/6x8-minmax-neonfma-dup-ld128.c",
1025 "src/f32-gemm/gen/1x8s4-minmax-neonfma.c",
1026 "src/f32-gemm/gen/4x8s4-minmax-neonfma.c",
1027 "src/f32-gemm/gen/6x8s4-minmax-neonfma.c",
1028 "src/f32-gemm/gen/8x8s4-minmax-neonfma.c",
1029 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-dup-ld64.c",
1030 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld128.c",
1031 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-dup-ld64.c",
1032 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld64.c",
1033 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-dup-ld128.c",
1034 "src/f32-gemm/gen-inc/1x8s4inc-minmax-neonfma.c",
1035 "src/f32-gemm/gen-inc/4x8s4inc-minmax-neonfma.c",
1036 "src/f32-gemm/gen-inc/6x8s4inc-minmax-neonfma.c",
1037 "src/f32-gemm/gen-inc/8x8s4inc-minmax-neonfma.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1038 "src/f32-hswish/gen/neonfma-x4.c",
1039 "src/f32-hswish/gen/neonfma-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1040 "src/f32-ppmm/gen/4x8-minmax-neonfma.c",
1041 "src/f32-ppmm/gen/8x8-minmax-neonfma.c",
Marat Dukhan8137e4c2020-01-25 12:56:58 -0800[diff] [blame]1042 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x4.c",
1043 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8.c",
1044 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x8-acc2.c",
1045 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12.c",
1046 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc2.c",
1047 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x12-acc3.c",
1048 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16.c",
1049 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc2.c",
1050 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x16-acc4.c",
1051 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20.c",
1052 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc2.c",
1053 "src/f32-raddstoreexpminusmax/gen/neonfma-p5-x20-acc5.c",
1054 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x4.c",
1055 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8.c",
1056 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x8-acc2.c",
1057 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12.c",
1058 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc2.c",
1059 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x12-acc3.c",
1060 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16.c",
1061 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc2.c",
1062 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x16-acc4.c",
1063 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20.c",
1064 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc2.c",
1065 "src/f32-raddstoreexpminusmax/gen/neonfma-lut64-p2-x20-acc5.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1066 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x4.c",
1067 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x8.c",
1068 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x12.c",
1069 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x16.c",
1070 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x20.c",
1071 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2fma-x24.c",
1072 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x4.c",
1073 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x8.c",
1074 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x12.c",
1075 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x16.c",
1076 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x20.c",
1077 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr1recps1fma-x24.c",
1078 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x4.c",
1079 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x8.c",
1080 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x12.c",
1081 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x16.c",
1082 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x20.c",
1083 "src/f32-sigmoid/gen/neonfma-rr1-p5-nr2recps-x24.c",
1084 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x4.c",
1085 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x8.c",
1086 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x12.c",
1087 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x16.c",
1088 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x20.c",
1089 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2fma-x24.c",
1090 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x4.c",
1091 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x8.c",
1092 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x12.c",
1093 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x16.c",
1094 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x20.c",
1095 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr1recps1fma-x24.c",
1096 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x4.c",
1097 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x8.c",
1098 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x12.c",
1099 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x16.c",
1100 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x20.c",
1101 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-nr2recps-x24.c",
1102 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x4.c",
1103 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x8.c",
1104 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x12.c",
1105 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x16.c",
1106 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x20.c",
1107 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2fma-x24.c",
1108 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x4.c",
1109 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x8.c",
1110 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x12.c",
1111 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x16.c",
1112 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x20.c",
1113 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr1recps1fma-x24.c",
1114 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x4.c",
1115 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x8.c",
1116 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x12.c",
1117 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x16.c",
1118 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x20.c",
1119 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-nr2recps-x24.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1120 "src/f32-vmulcaddc/gen/c4-minmax-neonfma-2x.c",
1121 "src/f32-vmulcaddc/gen/c8-minmax-neonfma-2x.c",
Marat Dukhan797a8fe2019-11-14 20:21:57 -0800[diff] [blame]1122 "src/math/exp-neonfma-lut64-p2.c",
1123 "src/math/exp-neonfma-p5.c",
Marat Dukhan189ae802019-11-26 11:28:44 -0800[diff] [blame]1124 "src/math/expminus-neonfma-lut2048-p1.c",
1125 "src/math/expminus-neonfma-lut64-p2.c",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]1126 "src/math/expminus-neonfma-p5.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1127 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr1recps1fma.c",
1128 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2fma.c",
1129 "src/math/sigmoid-neonfma-rr1-lut2048-p1-nr2recps.c",
1130 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr1recps1fma.c",
1131 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2fma.c",
1132 "src/math/sigmoid-neonfma-rr1-lut64-p2-nr2recps.c",
1133 "src/math/sigmoid-neonfma-rr1-p5-nr1recps1fma.c",
1134 "src/math/sigmoid-neonfma-rr1-p5-nr2fma.c",
1135 "src/math/sigmoid-neonfma-rr1-p5-nr2recps.c",
1136 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr1recps1fma.c",
1137 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2fma.c",
1138 "src/math/sigmoid-neonfma-rr2-lut2048-p1-nr2recps.c",
1139 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr1recps1fma.c",
1140 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2fma.c",
1141 "src/math/sigmoid-neonfma-rr2-lut64-p2-nr2recps.c",
1142 "src/math/sigmoid-neonfma-rr2-p5-nr1recps1fma.c",
1143 "src/math/sigmoid-neonfma-rr2-p5-nr2fma.c",
1144 "src/math/sigmoid-neonfma-rr2-p5-nr2recps.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1145]
1146
1147AARCH64_NEONFMA_UKERNELS = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1148 "src/f32-vbinary/gen/vdiv-minmax-neon-x4.c",
1149 "src/f32-vbinary/gen/vdiv-minmax-neon-x8.c",
1150 "src/f32-vbinary/gen/vdivc-minmax-neon-x4.c",
1151 "src/f32-vbinary/gen/vdivc-minmax-neon-x8.c",
1152 "src/f32-vbinary/gen/vrdivc-minmax-neon-x4.c",
1153 "src/f32-vbinary/gen/vrdivc-minmax-neon-x8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1154 "src/f32-gemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1155 "src/f32-gemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1156 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1157 "src/f32-gemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1158 "src/f32-gemm/gen/5x8-minmax-neonfma-lane-ld64.c",
1159 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1160 "src/f32-gemm/gen/6x8-minmax-neonfma-lane-ld128.c",
1161 "src/f32-gemm/gen-inc/1x8inc-minmax-neonfma-lane-ld64.c",
1162 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld128.c",
1163 "src/f32-gemm/gen-inc/4x8inc-minmax-neonfma-lane-ld64.c",
1164 "src/f32-gemm/gen-inc/5x8inc-minmax-neonfma-lane-ld64.c",
1165 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld64.c",
1166 "src/f32-gemm/gen-inc/6x8inc-minmax-neonfma-lane-ld128.c",
1167 "src/f32-igemm/gen/1x8-minmax-neonfma-lane-ld64.c",
1168 "src/f32-igemm/gen/4x2-minmax-neonfma-lane-ld64.c",
1169 "src/f32-igemm/gen/4x4-minmax-neonfma-lane-ld64.c",
1170 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld128.c",
1171 "src/f32-igemm/gen/4x8-minmax-neonfma-lane-ld64.c",
1172 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld64.c",
1173 "src/f32-igemm/gen/6x8-minmax-neonfma-lane-ld128.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1174 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x1.c",
1175 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1176 "src/f32-conv-hwc/gen/3x3s2p0p1c3x4-neonfma-2x2.c",
1177 "src/f32-conv-hwc/gen/3x3s2p0p1c3x8-neonfma-2x2.c",
Marat Dukhan56b10cd2020-05-18 09:35:49 -0700[diff] [blame]1178 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x1.c",
1179 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x1.c",
Marat Dukhance7a3f82020-05-17 21:46:44 -0700[diff] [blame]1180 "src/f32-conv-hwc/gen/3x3s2p1c3x4-neonfma-2x2.c",
1181 "src/f32-conv-hwc/gen/3x3s2p1c3x8-neonfma-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1182 "src/f32-conv-hwc2chw/3x3s2p1c3x4-neonfma-2x2.c",
1183 "src/f32-dwconv-chw/3x3p1-neonfma.c",
1184 "src/f32-dwconv-chw/5x5p2-neonfma.c",
1185 "src/f32-dwconv-chw/3x3s2p1-neonfma.c",
1186 "src/f32-dwconv-chw/5x5s2p2-neonfma.c",
Marat Dukhan4a24a582020-01-06 13:30:00 -0800[diff] [blame]1187 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x4.c",
1188 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x8.c",
1189 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x12.c",
1190 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x16.c",
1191 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x20.c",
1192 "src/f32-sigmoid/gen/neonfma-rr1-p5-div-x24.c",
1193 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x4.c",
1194 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x8.c",
1195 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x12.c",
1196 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x16.c",
1197 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x20.c",
1198 "src/f32-sigmoid/gen/neonfma-rr1-lut64-p2-div-x24.c",
1199 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x4.c",
1200 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x8.c",
1201 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x12.c",
1202 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x16.c",
1203 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x20.c",
1204 "src/f32-sigmoid/gen/neonfma-rr1-lut2048-p1-div-x24.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1205 "src/f32-spmm/gen/12x1-minmax-neonfma.c",
1206 "src/f32-spmm/gen/12x2-minmax-neonfma.c",
1207 "src/f32-spmm/gen/12x4-minmax-neonfma.c",
1208 "src/f32-spmm/gen/16x1-minmax-neonfma-pipelined.c",
1209 "src/f32-spmm/gen/16x1-minmax-neonfma-unroll2.c",
1210 "src/f32-spmm/gen/16x1-minmax-neonfma.c",
1211 "src/f32-spmm/gen/16x2-minmax-neonfma.c",
1212 "src/f32-spmm/gen/16x4-minmax-neonfma.c",
1213 "src/f32-spmm/gen/4x1-minmax-neonfma-pipelined.c",
1214 "src/f32-spmm/gen/4x1-minmax-neonfma-unroll2.c",
1215 "src/f32-spmm/gen/4x1-minmax-neonfma.c",
1216 "src/f32-spmm/gen/4x2-minmax-neonfma.c",
1217 "src/f32-spmm/gen/4x4-minmax-neonfma.c",
1218 "src/f32-spmm/gen/8x1-minmax-neonfma-pipelined.c",
1219 "src/f32-spmm/gen/8x1-minmax-neonfma-unroll2.c",
1220 "src/f32-spmm/gen/8x1-minmax-neonfma.c",
1221 "src/f32-spmm/gen/8x2-minmax-neonfma.c",
1222 "src/f32-spmm/gen/8x4-minmax-neonfma.c",
Marat Dukhan77221d32020-01-06 10:04:39 -0800[diff] [blame]1223 "src/math/sigmoid-neonfma-rr1-lut2048-p1-div.c",
1224 "src/math/sigmoid-neonfma-rr1-lut64-p2-div.c",
1225 "src/math/sigmoid-neonfma-rr1-p5-div.c",
1226 "src/math/sigmoid-neonfma-rr2-lut2048-p1-div.c",
1227 "src/math/sigmoid-neonfma-rr2-lut64-p2-div.c",
1228 "src/math/sigmoid-neonfma-rr2-p5-div.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1229]
1230
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1231NEONV8_UKERNELS = [
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1232 "src/f32-vrnd/gen/vrndne-neonv8-x4.c",
1233 "src/f32-vrnd/gen/vrndne-neonv8-x8.c",
1234 "src/f32-vrnd/gen/vrndz-neonv8-x4.c",
1235 "src/f32-vrnd/gen/vrndz-neonv8-x8.c",
1236 "src/f32-vrnd/gen/vrndu-neonv8-x4.c",
1237 "src/f32-vrnd/gen/vrndu-neonv8-x8.c",
1238 "src/f32-vrnd/gen/vrndd-neonv8-x4.c",
1239 "src/f32-vrnd/gen/vrndd-neonv8-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1240 "src/math/roundne-neonv8.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1241 "src/math/roundd-neonv8.c",
1242 "src/math/roundu-neonv8.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1243 "src/math/roundz-neonv8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1244]
1245
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1246AARCH64_NEONFP16ARITH_UKERNELS = [
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1247 "src/f16-clamp/gen/neonfp16arith-x16.c",
1248 "src/f16-clamp/gen/neonfp16arith-x8.c",
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]1249 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith-acc2.c",
1250 "src/f16-dwconv/gen/up16x25-minmax-neonfp16arith.c",
1251 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith-acc2.c",
1252 "src/f16-dwconv/gen/up16x4-minmax-neonfp16arith.c",
1253 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith-acc2.c",
1254 "src/f16-dwconv/gen/up16x9-minmax-neonfp16arith.c",
1255 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith-acc2.c",
1256 "src/f16-dwconv/gen/up8x25-minmax-neonfp16arith.c",
1257 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith-acc2.c",
1258 "src/f16-dwconv/gen/up8x4-minmax-neonfp16arith.c",
1259 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith-acc2.c",
1260 "src/f16-dwconv/gen/up8x9-minmax-neonfp16arith.c",
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]1261 "src/f16-gavgpool/7p7x-minmax-neonfp16arith-c8.c",
1262 "src/f16-gavgpool/7x-minmax-neonfp16arith-c8.c",
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]1263 "src/f16-hswish/gen/neonfp16arith-x16.c",
1264 "src/f16-hswish/gen/neonfp16arith-x8.c",
1265 "src/f16-prelu/gen/neonfp16arith-2x16.c",
1266 "src/f16-prelu/gen/neonfp16arith-2x8.c",
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]1267 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x16.c",
1268 "src/f16-vbinary/gen/vaddc-minmax-neonfp16arith-x8.c",
1269 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x16.c",
1270 "src/f16-vbinary/gen/vadd-minmax-neonfp16arith-x8.c",
1271 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x16.c",
1272 "src/f16-vbinary/gen/vdivc-minmax-neonfp16arith-x8.c",
1273 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x16.c",
1274 "src/f16-vbinary/gen/vdiv-minmax-neonfp16arith-x8.c",
1275 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x16.c",
1276 "src/f16-vbinary/gen/vmaxc-neonfp16arith-x8.c",
1277 "src/f16-vbinary/gen/vmax-neonfp16arith-x16.c",
1278 "src/f16-vbinary/gen/vmax-neonfp16arith-x8.c",
1279 "src/f16-vbinary/gen/vminc-neonfp16arith-x16.c",
1280 "src/f16-vbinary/gen/vminc-neonfp16arith-x8.c",
1281 "src/f16-vbinary/gen/vmin-neonfp16arith-x16.c",
1282 "src/f16-vbinary/gen/vmin-neonfp16arith-x8.c",
1283 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x16.c",
1284 "src/f16-vbinary/gen/vmulc-minmax-neonfp16arith-x8.c",
1285 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x16.c",
1286 "src/f16-vbinary/gen/vmul-minmax-neonfp16arith-x8.c",
1287 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x16.c",
1288 "src/f16-vbinary/gen/vrdivc-minmax-neonfp16arith-x8.c",
1289 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x16.c",
1290 "src/f16-vbinary/gen/vrsubc-minmax-neonfp16arith-x8.c",
1291 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x16.c",
1292 "src/f16-vbinary/gen/vsubc-minmax-neonfp16arith-x8.c",
1293 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x16.c",
1294 "src/f16-vbinary/gen/vsub-minmax-neonfp16arith-x8.c",
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]1295 "src/f16-vmulcaddc/gen/c16-minmax-neonfp16arith-2x.c",
1296 "src/f16-vmulcaddc/gen/c8-minmax-neonfp16arith-2x.c",
Frank Barchard83ea9392020-04-20 20:15:14 -0700[diff] [blame]1297 "src/f16-gemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1298 "src/f16-gemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1299 "src/f16-gemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1300 "src/f16-gemm/gen/8x8-minmax-neonfp16arith-ld64.c",
1301 "src/f16-gemm/gen-inc/1x8inc-minmax-neonfp16arith-ld64.c",
1302 "src/f16-gemm/gen-inc/4x8inc-minmax-neonfp16arith-ld64.c",
1303 "src/f16-gemm/gen-inc/6x8inc-minmax-neonfp16arith-ld64.c",
1304 "src/f16-gemm/gen-inc/8x8inc-minmax-neonfp16arith-ld64.c",
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]1305 "src/f16-igemm/gen/1x8-minmax-neonfp16arith-ld64.c",
1306 "src/f16-igemm/gen/4x8-minmax-neonfp16arith-ld64.c",
1307 "src/f16-igemm/gen/6x8-minmax-neonfp16arith-ld64.c",
1308 "src/f16-igemm/gen/8x8-minmax-neonfp16arith-ld64.c",
Frank Barchard3f9f99f2020-05-06 01:12:04 -0700[diff] [blame]1309 "src/f16-gemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1310 "src/f16-gemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1311 "src/f16-gemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1312 "src/f16-gemm/gen/8x16-minmax-neonfp16arith-ld64.c",
1313 "src/f16-gemm/gen-inc/1x16inc-minmax-neonfp16arith-ld64.c",
1314 "src/f16-gemm/gen-inc/4x16inc-minmax-neonfp16arith-ld64.c",
1315 "src/f16-gemm/gen-inc/6x16inc-minmax-neonfp16arith-ld64.c",
1316 "src/f16-gemm/gen-inc/8x16inc-minmax-neonfp16arith-ld64.c",
1317 "src/f16-igemm/gen/1x16-minmax-neonfp16arith-ld64.c",
1318 "src/f16-igemm/gen/4x16-minmax-neonfp16arith-ld64.c",
1319 "src/f16-igemm/gen/6x16-minmax-neonfp16arith-ld64.c",
1320 "src/f16-igemm/gen/8x16-minmax-neonfp16arith-ld64.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1321 "src/f16-spmm/gen/8x1-minmax-neonfp16arith.c",
1322 "src/f16-spmm/gen/8x1-minmax-neonfp16arith-unroll2.c",
1323 "src/f16-spmm/gen/16x1-minmax-neonfp16arith.c",
1324 "src/f16-spmm/gen/16x1-minmax-neonfp16arith-unroll2.c",
1325 "src/f16-spmm/gen/24x1-minmax-neonfp16arith.c",
1326 "src/f16-spmm/gen/24x1-minmax-neonfp16arith-unroll2.c",
1327 "src/f16-spmm/gen/32x1-minmax-neonfp16arith.c",
1328 "src/f16-spmm/gen/32x1-minmax-neonfp16arith-unroll2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1329]
1330
1331SSE_UKERNELS = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1332 "src/f32-avgpool/9p8x-minmax-sse-c4.c",
1333 "src/f32-avgpool/9x-minmax-sse-c4.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1334 "src/f32-clamp/gen/sse-x4.c",
1335 "src/f32-clamp/gen/sse-x8.c",
Erich Elsenb1233402020-06-08 15:53:15 -0700[diff] [blame]1336 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-1x1.c",
1337 "src/f32-conv-hwc2chw/3x3s2p1c3x4-sse-2x2.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1338 "src/f32-dwconv-chw/3x3p1-sse.c",
1339 "src/f32-dwconv-chw/3x3s2p1-sse.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1340 "src/f32-dwconv/gen/up4x25-minmax-sse-acc2.c",
1341 "src/f32-dwconv/gen/up4x25-minmax-sse.c",
1342 "src/f32-dwconv/gen/up4x4-minmax-sse-acc2.c",
1343 "src/f32-dwconv/gen/up4x4-minmax-sse.c",
1344 "src/f32-dwconv/gen/up4x9-minmax-sse-acc2.c",
1345 "src/f32-dwconv/gen/up4x9-minmax-sse.c",
1346 "src/f32-dwconv/gen/up8x25-minmax-sse-acc2.c",
1347 "src/f32-dwconv/gen/up8x25-minmax-sse.c",
1348 "src/f32-dwconv/gen/up8x4-minmax-sse-acc2.c",
1349 "src/f32-dwconv/gen/up8x4-minmax-sse.c",
1350 "src/f32-dwconv/gen/up8x9-minmax-sse-acc2.c",
1351 "src/f32-dwconv/gen/up8x9-minmax-sse.c",
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]1352 "src/f32-gavgpool-cw/sse-x4.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1353 "src/f32-gavgpool/7p7x-minmax-sse-c4.c",
1354 "src/f32-gavgpool/7x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1355 "src/f32-gemm/gen/1x8-minmax-sse-dup.c",
1356 "src/f32-gemm/gen/1x8-minmax-sse-load1.c",
1357 "src/f32-gemm/gen/1x8s4-minmax-sse.c",
1358 "src/f32-gemm/gen/4x2c4-minmax-sse.c",
1359 "src/f32-gemm/gen/4x8-minmax-sse-dup.c",
1360 "src/f32-gemm/gen/4x8-minmax-sse-load1.c",
1361 "src/f32-gemm/gen/4x8s4-minmax-sse.c",
1362 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-dup.c",
1363 "src/f32-gemm/gen-inc/1x8inc-minmax-sse-load1.c",
1364 "src/f32-gemm/gen-inc/1x8s4inc-minmax-sse.c",
1365 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-dup.c",
1366 "src/f32-gemm/gen-inc/4x8inc-minmax-sse-load1.c",
1367 "src/f32-gemm/gen-inc/4x8s4inc-minmax-sse.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1368 "src/f32-hswish/gen/sse-x4.c",
1369 "src/f32-hswish/gen/sse-x8.c",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]1370 "src/f32-ibilinear/gen/sse-c4.c",
1371 "src/f32-ibilinear/gen/sse-c8.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1372 "src/f32-igemm/gen/1x8-minmax-sse-dup.c",
1373 "src/f32-igemm/gen/1x8-minmax-sse-load1.c",
1374 "src/f32-igemm/gen/1x8s4-minmax-sse.c",
1375 "src/f32-igemm/gen/4x2c4-minmax-sse.c",
1376 "src/f32-igemm/gen/4x8-minmax-sse-dup.c",
1377 "src/f32-igemm/gen/4x8-minmax-sse-load1.c",
1378 "src/f32-igemm/gen/4x8s4-minmax-sse.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1379 "src/f32-maxpool/9p8x-minmax-sse-c4.c",
1380 "src/f32-pavgpool/9p8x-minmax-sse-c4.c",
1381 "src/f32-pavgpool/9x-minmax-sse-c4.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1382 "src/f32-ppmm/gen/4x8-minmax-sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1383 "src/f32-rmax/sse.c",
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]1384 "src/f32-spmm/gen/4x1-minmax-sse.c",
1385 "src/f32-spmm/gen/8x1-minmax-sse.c",
Erich Elsen6e80fdc2020-06-09 15:35:37 -0700[diff] [blame]1386 "src/f32-spmm/gen/16x1-minmax-sse.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1387 "src/f32-vbinary/gen/vadd-minmax-sse-x4.c",
1388 "src/f32-vbinary/gen/vadd-minmax-sse-x8.c",
1389 "src/f32-vbinary/gen/vaddc-minmax-sse-x4.c",
1390 "src/f32-vbinary/gen/vaddc-minmax-sse-x8.c",
1391 "src/f32-vbinary/gen/vdiv-minmax-sse-x4.c",
1392 "src/f32-vbinary/gen/vdiv-minmax-sse-x8.c",
1393 "src/f32-vbinary/gen/vdivc-minmax-sse-x4.c",
1394 "src/f32-vbinary/gen/vdivc-minmax-sse-x8.c",
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]1395 "src/f32-vbinary/gen/vmax-sse-x4.c",
1396 "src/f32-vbinary/gen/vmax-sse-x8.c",
1397 "src/f32-vbinary/gen/vmaxc-sse-x4.c",
1398 "src/f32-vbinary/gen/vmaxc-sse-x8.c",
1399 "src/f32-vbinary/gen/vmin-sse-x4.c",
1400 "src/f32-vbinary/gen/vmin-sse-x8.c",
1401 "src/f32-vbinary/gen/vminc-sse-x4.c",
1402 "src/f32-vbinary/gen/vminc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1403 "src/f32-vbinary/gen/vmul-minmax-sse-x4.c",
1404 "src/f32-vbinary/gen/vmul-minmax-sse-x8.c",
1405 "src/f32-vbinary/gen/vmulc-minmax-sse-x4.c",
1406 "src/f32-vbinary/gen/vmulc-minmax-sse-x8.c",
1407 "src/f32-vbinary/gen/vrdivc-minmax-sse-x4.c",
1408 "src/f32-vbinary/gen/vrdivc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1409 "src/f32-vbinary/gen/vrsqrdiffc-sse-x4.c",
1410 "src/f32-vbinary/gen/vrsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1411 "src/f32-vbinary/gen/vrsubc-minmax-sse-x4.c",
1412 "src/f32-vbinary/gen/vrsubc-minmax-sse-x8.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1413 "src/f32-vbinary/gen/vsqrdiff-sse-x4.c",
1414 "src/f32-vbinary/gen/vsqrdiff-sse-x8.c",
1415 "src/f32-vbinary/gen/vsqrdiffc-sse-x4.c",
1416 "src/f32-vbinary/gen/vsqrdiffc-sse-x8.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1417 "src/f32-vbinary/gen/vsub-minmax-sse-x4.c",
1418 "src/f32-vbinary/gen/vsub-minmax-sse-x8.c",
1419 "src/f32-vbinary/gen/vsubc-minmax-sse-x4.c",
1420 "src/f32-vbinary/gen/vsubc-minmax-sse-x8.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1421 "src/f32-vlrelu/gen/sse-x4.c",
1422 "src/f32-vlrelu/gen/sse-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1423 "src/f32-vmulcaddc/gen/c4-minmax-sse-2x.c",
1424 "src/f32-vmulcaddc/gen/c8-minmax-sse-2x.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1425 "src/f32-vunary/gen/vabs-sse-x4.c",
1426 "src/f32-vunary/gen/vabs-sse-x8.c",
1427 "src/f32-vunary/gen/vneg-sse-x4.c",
1428 "src/f32-vunary/gen/vneg-sse-x8.c",
1429 "src/f32-vunary/gen/vsqr-sse-x4.c",
1430 "src/f32-vunary/gen/vsqr-sse-x8.c",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]1431 "src/x32-fill/sse.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1432 "src/x32-packx/x4-sse.c",
Marat Dukhan63523d42020-05-22 17:07:33 -0700[diff] [blame]1433 "src/x32-pad/sse.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1434 "src/math/roundne-sse-addsub.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1435 "src/math/roundd-sse-addsub.c",
1436 "src/math/roundu-sse-addsub.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1437 "src/math/roundz-sse-addsub.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1438]
1439
1440SSE2_UKERNELS = [
Marat Dukhan329da642019-11-19 21:44:39 -0800[diff] [blame]1441 "src/f32-argmaxpool/9p8x-sse2-c4.c",
1442 "src/f32-argmaxpool/4x-sse2-c4.c",
1443 "src/f32-argmaxpool/9x-sse2-c4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1444 "src/f32-prelu/gen/sse2-2x4.c",
1445 "src/f32-prelu/gen/sse2-2x8.c",
Marat Dukhanb39689d2020-01-24 13:32:20 -0800[diff] [blame]1446 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x4.c",
1447 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8.c",
1448 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x8-acc2.c",
1449 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12.c",
1450 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc2.c",
1451 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x12-acc3.c",
1452 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16.c",
1453 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc2.c",
1454 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x16-acc4.c",
1455 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20.c",
1456 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc2.c",
1457 "src/f32-raddstoreexpminusmax/gen/sse2-p5-x20-acc5.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1458 "src/f32-sigmoid/gen/sse2-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1459 "src/f32-sigmoid/gen/sse2-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1460 "src/f32-sigmoid/gen/sse2-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1461 "src/f32-sigmoid/gen/sse2-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1462 "src/f32-sigmoid/gen/sse2-p5-div-x20.c",
1463 "src/f32-sigmoid/gen/sse2-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1464 "src/f32-vrnd/gen/vrndne-sse2-x4.c",
1465 "src/f32-vrnd/gen/vrndne-sse2-x8.c",
1466 "src/f32-vrnd/gen/vrndz-sse2-x4.c",
1467 "src/f32-vrnd/gen/vrndz-sse2-x8.c",
1468 "src/f32-vrnd/gen/vrndu-sse2-x4.c",
1469 "src/f32-vrnd/gen/vrndu-sse2-x8.c",
1470 "src/f32-vrnd/gen/vrndd-sse2-x4.c",
1471 "src/f32-vrnd/gen/vrndd-sse2-x8.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1472 "src/q8-avgpool/9p8x-minmax-sse2-c8.c",
1473 "src/q8-avgpool/9x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1474 "src/q8-igemm/4x4c2-minmax-sse2.c",
1475 "src/q8-dwconv/up8x9-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1476 "src/q8-gavgpool/7p7x-minmax-sse2-c8.c",
1477 "src/q8-gavgpool/7x-minmax-sse2-c8.c",
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]1478 "src/q8-gemm/2x4c8-minmax-sse2.c",
1479 "src/q8-gemm/4x4c2-minmax-sse2.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1480 "src/q8-vadd/minmax-sse2.c",
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1481 "src/u8-clamp/sse2-x64.c",
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]1482 "src/u8-maxpool/9p8x-minmax-sse2-c16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1483 "src/u8-rmax/sse2.c",
Marat Dukhan57dccd82020-04-14 00:53:10 -0700[diff] [blame]1484 "src/x32-unpool/sse2.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1485 "src/x32-zip/x2-sse2.c",
1486 "src/x32-zip/x3-sse2.c",
1487 "src/x32-zip/x4-sse2.c",
1488 "src/x32-zip/xm-sse2.c",
1489 "src/x8-zip/x2-sse2.c",
1490 "src/x8-zip/x3-sse2.c",
1491 "src/x8-zip/x4-sse2.c",
1492 "src/x8-zip/xm-sse2.c",
Marat Dukhanffd68402019-11-15 15:19:11 -0800[diff] [blame]1493 "src/math/exp-sse2-p5.c",
1494 "src/math/expminus-sse2-p5.c",
Marat Dukhan075088a2020-05-12 19:42:12 -0700[diff] [blame]1495 "src/math/roundne-sse2-cvt.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1496 "src/math/roundd-sse2-cvt.c",
1497 "src/math/roundu-sse2-cvt.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1498 "src/math/roundz-sse2-cvt.c",
Marat Dukhan80bafd22019-11-18 10:16:01 -0800[diff] [blame]1499 "src/math/sigmoid-sse2-p5-div.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1500 "src/requantization/precise-sse2.c",
1501 "src/requantization/fp32-sse2.c",
1502 "src/requantization/q31-sse2.c",
1503 "src/requantization/gemmlowp-sse2.c",
1504]
1505
1506SSSE3_UKERNELS = [
1507 "src/requantization/precise-ssse3.c",
1508 "src/requantization/q31-ssse3.c",
1509 "src/requantization/gemmlowp-ssse3.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1510]
1511
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1512SSE41_UKERNELS = [
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1513 "src/f32-prelu/gen/sse41-2x4.c",
1514 "src/f32-prelu/gen/sse41-2x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1515 "src/f32-sigmoid/gen/sse41-p5-div-x4.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1516 "src/f32-sigmoid/gen/sse41-p5-div-x8.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1517 "src/f32-sigmoid/gen/sse41-p5-div-x12.c",
Marat Dukhan40a672f2019-11-25 03:08:22 -0800[diff] [blame]1518 "src/f32-sigmoid/gen/sse41-p5-div-x16.c",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]1519 "src/f32-sigmoid/gen/sse41-p5-div-x20.c",
1520 "src/f32-sigmoid/gen/sse41-p5-div-x24.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1521 "src/f32-vrnd/gen/vrndne-sse41-x4.c",
1522 "src/f32-vrnd/gen/vrndne-sse41-x8.c",
1523 "src/f32-vrnd/gen/vrndz-sse41-x4.c",
1524 "src/f32-vrnd/gen/vrndz-sse41-x8.c",
1525 "src/f32-vrnd/gen/vrndu-sse41-x4.c",
1526 "src/f32-vrnd/gen/vrndu-sse41-x8.c",
1527 "src/f32-vrnd/gen/vrndd-sse41-x4.c",
1528 "src/f32-vrnd/gen/vrndd-sse41-x8.c",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]1529 "src/math/roundne-sse41.c",
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]1530 "src/math/roundd-sse41.c",
1531 "src/math/roundu-sse41.c",
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]1532 "src/math/roundz-sse41.c",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]1533 "src/requantization/precise-sse4.c",
1534 "src/requantization/q31-sse4.c",
1535 "src/requantization/gemmlowp-sse4.c",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]1536]
1537
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1538AVX_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1539 "src/f32-clamp/gen/avx-x8.c",
1540 "src/f32-clamp/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1541 "src/f32-dwconv/gen/up16x4-minmax-avx-acc2.c",
1542 "src/f32-dwconv/gen/up16x4-minmax-avx.c",
1543 "src/f32-dwconv/gen/up8x4-minmax-avx-acc2.c",
1544 "src/f32-dwconv/gen/up8x4-minmax-avx.c",
1545 "src/f32-dwconv/gen/up16x9-minmax-avx-acc2.c",
1546 "src/f32-dwconv/gen/up16x9-minmax-avx.c",
1547 "src/f32-dwconv/gen/up8x9-minmax-avx-acc2.c",
1548 "src/f32-dwconv/gen/up8x9-minmax-avx.c",
1549 "src/f32-dwconv/gen/up16x25-minmax-avx-acc2.c",
1550 "src/f32-dwconv/gen/up16x25-minmax-avx.c",
1551 "src/f32-dwconv/gen/up8x25-minmax-avx-acc2.c",
1552 "src/f32-dwconv/gen/up8x25-minmax-avx.c",
1553 "src/f32-gemm/gen/1x8-minmax-avx-broadcast.c",
1554 "src/f32-gemm/gen/4x8-minmax-avx-broadcast.c",
1555 "src/f32-gemm/gen/5x8-minmax-avx-broadcast.c",
1556 "src/f32-gemm/gen/6x8-minmax-avx-broadcast.c",
1557 "src/f32-gemm/gen/7x8-minmax-avx-broadcast.c",
1558 "src/f32-gemm/gen/1x16-minmax-avx-broadcast.c",
1559 "src/f32-gemm/gen/3x16-minmax-avx-broadcast.c",
1560 "src/f32-gemm/gen/4x16-minmax-avx-broadcast.c",
1561 "src/f32-gemm/gen/5x16-minmax-avx-broadcast.c",
1562 "src/f32-gemm/gen-inc/1x8inc-minmax-avx-broadcast.c",
1563 "src/f32-gemm/gen-inc/4x8inc-minmax-avx-broadcast.c",
1564 "src/f32-gemm/gen-inc/5x8inc-minmax-avx-broadcast.c",
1565 "src/f32-gemm/gen-inc/6x8inc-minmax-avx-broadcast.c",
1566 "src/f32-gemm/gen-inc/7x8inc-minmax-avx-broadcast.c",
1567 "src/f32-gemm/gen-inc/1x16inc-minmax-avx-broadcast.c",
1568 "src/f32-gemm/gen-inc/3x16inc-minmax-avx-broadcast.c",
1569 "src/f32-gemm/gen-inc/4x16inc-minmax-avx-broadcast.c",
1570 "src/f32-gemm/gen-inc/5x16inc-minmax-avx-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1571 "src/f32-hswish/gen/avx-x8.c",
1572 "src/f32-hswish/gen/avx-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1573 "src/f32-igemm/gen/1x8-minmax-avx-broadcast.c",
1574 "src/f32-igemm/gen/4x8-minmax-avx-broadcast.c",
1575 "src/f32-igemm/gen/5x8-minmax-avx-broadcast.c",
1576 "src/f32-igemm/gen/6x8-minmax-avx-broadcast.c",
1577 "src/f32-igemm/gen/7x8-minmax-avx-broadcast.c",
1578 "src/f32-igemm/gen/1x16-minmax-avx-broadcast.c",
1579 "src/f32-igemm/gen/3x16-minmax-avx-broadcast.c",
1580 "src/f32-igemm/gen/4x16-minmax-avx-broadcast.c",
1581 "src/f32-igemm/gen/5x16-minmax-avx-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1582 "src/f32-prelu/gen/avx-2x8.c",
1583 "src/f32-prelu/gen/avx-2x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1584 "src/f32-rmax/avx.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1585 "src/f32-vbinary/gen/vadd-minmax-avx-x8.c",
1586 "src/f32-vbinary/gen/vadd-minmax-avx-x16.c",
1587 "src/f32-vbinary/gen/vaddc-minmax-avx-x8.c",
1588 "src/f32-vbinary/gen/vaddc-minmax-avx-x16.c",
1589 "src/f32-vbinary/gen/vdiv-minmax-avx-x8.c",
1590 "src/f32-vbinary/gen/vdiv-minmax-avx-x16.c",
1591 "src/f32-vbinary/gen/vdivc-minmax-avx-x8.c",
1592 "src/f32-vbinary/gen/vdivc-minmax-avx-x16.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1593 "src/f32-vbinary/gen/vmax-avx-x8.c",
1594 "src/f32-vbinary/gen/vmax-avx-x16.c",
1595 "src/f32-vbinary/gen/vmaxc-avx-x8.c",
1596 "src/f32-vbinary/gen/vmaxc-avx-x16.c",
1597 "src/f32-vbinary/gen/vmin-avx-x8.c",
1598 "src/f32-vbinary/gen/vmin-avx-x16.c",
1599 "src/f32-vbinary/gen/vminc-avx-x8.c",
1600 "src/f32-vbinary/gen/vminc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1601 "src/f32-vbinary/gen/vmul-minmax-avx-x8.c",
1602 "src/f32-vbinary/gen/vmul-minmax-avx-x16.c",
1603 "src/f32-vbinary/gen/vmulc-minmax-avx-x8.c",
1604 "src/f32-vbinary/gen/vmulc-minmax-avx-x16.c",
1605 "src/f32-vbinary/gen/vrdivc-minmax-avx-x8.c",
1606 "src/f32-vbinary/gen/vrdivc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1607 "src/f32-vbinary/gen/vrsqrdiffc-avx-x8.c",
1608 "src/f32-vbinary/gen/vrsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1609 "src/f32-vbinary/gen/vrsubc-minmax-avx-x8.c",
1610 "src/f32-vbinary/gen/vrsubc-minmax-avx-x16.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1611 "src/f32-vbinary/gen/vsqrdiff-avx-x8.c",
1612 "src/f32-vbinary/gen/vsqrdiff-avx-x16.c",
1613 "src/f32-vbinary/gen/vsqrdiffc-avx-x8.c",
1614 "src/f32-vbinary/gen/vsqrdiffc-avx-x16.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1615 "src/f32-vbinary/gen/vsub-minmax-avx-x8.c",
1616 "src/f32-vbinary/gen/vsub-minmax-avx-x16.c",
1617 "src/f32-vbinary/gen/vsubc-minmax-avx-x8.c",
1618 "src/f32-vbinary/gen/vsubc-minmax-avx-x16.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1619 "src/f32-vlrelu/gen/avx-x8.c",
1620 "src/f32-vlrelu/gen/avx-x16.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1621 "src/f32-vscale/avx-unroll32.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1622 "src/f32-vrnd/gen/vrndne-avx-x8.c",
1623 "src/f32-vrnd/gen/vrndne-avx-x16.c",
1624 "src/f32-vrnd/gen/vrndz-avx-x8.c",
1625 "src/f32-vrnd/gen/vrndz-avx-x16.c",
1626 "src/f32-vrnd/gen/vrndu-avx-x8.c",
1627 "src/f32-vrnd/gen/vrndu-avx-x16.c",
1628 "src/f32-vrnd/gen/vrndd-avx-x8.c",
1629 "src/f32-vrnd/gen/vrndd-avx-x16.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1630 "src/f32-vunary/gen/vabs-avx-x8.c",
1631 "src/f32-vunary/gen/vabs-avx-x16.c",
1632 "src/f32-vunary/gen/vneg-avx-x8.c",
1633 "src/f32-vunary/gen/vneg-avx-x16.c",
1634 "src/f32-vunary/gen/vsqr-avx-x8.c",
1635 "src/f32-vunary/gen/vsqr-avx-x16.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1636]
1637
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1638FMA3_UKERNELS = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1639 "src/f32-dwconv/gen/up16x4-minmax-fma3-acc2.c",
1640 "src/f32-dwconv/gen/up16x4-minmax-fma3.c",
1641 "src/f32-dwconv/gen/up8x4-minmax-fma3-acc2.c",
1642 "src/f32-dwconv/gen/up8x4-minmax-fma3.c",
1643 "src/f32-dwconv/gen/up16x9-minmax-fma3-acc2.c",
1644 "src/f32-dwconv/gen/up16x9-minmax-fma3.c",
1645 "src/f32-dwconv/gen/up8x9-minmax-fma3-acc2.c",
1646 "src/f32-dwconv/gen/up8x9-minmax-fma3.c",
1647 "src/f32-dwconv/gen/up16x25-minmax-fma3-acc2.c",
1648 "src/f32-dwconv/gen/up16x25-minmax-fma3.c",
1649 "src/f32-dwconv/gen/up8x25-minmax-fma3-acc2.c",
1650 "src/f32-dwconv/gen/up8x25-minmax-fma3.c",
1651 "src/f32-gemm/gen/1x8-minmax-fma3-broadcast.c",
1652 "src/f32-gemm/gen/4x8-minmax-fma3-broadcast.c",
1653 "src/f32-gemm/gen/5x8-minmax-fma3-broadcast.c",
1654 "src/f32-gemm/gen/6x8-minmax-fma3-broadcast.c",
1655 "src/f32-gemm/gen/7x8-minmax-fma3-broadcast.c",
1656 "src/f32-gemm/gen/8x8-minmax-fma3-broadcast.c",
1657 "src/f32-gemm/gen/1x16-minmax-fma3-broadcast.c",
1658 "src/f32-gemm/gen/3x16-minmax-fma3-broadcast.c",
1659 "src/f32-gemm/gen/4x16-minmax-fma3-broadcast.c",
1660 "src/f32-gemm/gen/5x16-minmax-fma3-broadcast.c",
1661 "src/f32-gemm/gen/1x16s4-minmax-fma3-broadcast.c",
1662 "src/f32-gemm/gen/3x16s4-minmax-fma3-broadcast.c",
1663 "src/f32-gemm/gen/4x16s4-minmax-fma3-broadcast.c",
1664 "src/f32-gemm/gen/5x16s4-minmax-fma3-broadcast.c",
1665 "src/f32-gemm/gen-inc/1x8inc-minmax-fma3-broadcast.c",
1666 "src/f32-gemm/gen-inc/4x8inc-minmax-fma3-broadcast.c",
1667 "src/f32-gemm/gen-inc/5x8inc-minmax-fma3-broadcast.c",
1668 "src/f32-gemm/gen-inc/6x8inc-minmax-fma3-broadcast.c",
1669 "src/f32-gemm/gen-inc/7x8inc-minmax-fma3-broadcast.c",
1670 "src/f32-gemm/gen-inc/8x8inc-minmax-fma3-broadcast.c",
1671 "src/f32-gemm/gen-inc/1x16inc-minmax-fma3-broadcast.c",
1672 "src/f32-gemm/gen-inc/3x16inc-minmax-fma3-broadcast.c",
1673 "src/f32-gemm/gen-inc/4x16inc-minmax-fma3-broadcast.c",
1674 "src/f32-gemm/gen-inc/5x16inc-minmax-fma3-broadcast.c",
1675 "src/f32-gemm/gen-inc/1x16s4inc-minmax-fma3-broadcast.c",
1676 "src/f32-gemm/gen-inc/3x16s4inc-minmax-fma3-broadcast.c",
1677 "src/f32-gemm/gen-inc/4x16s4inc-minmax-fma3-broadcast.c",
1678 "src/f32-gemm/gen-inc/5x16s4inc-minmax-fma3-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1679 "src/f32-hswish/gen/fma3-x8.c",
1680 "src/f32-hswish/gen/fma3-x16.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1681 "src/f32-igemm/gen/1x8-minmax-fma3-broadcast.c",
1682 "src/f32-igemm/gen/4x8-minmax-fma3-broadcast.c",
1683 "src/f32-igemm/gen/5x8-minmax-fma3-broadcast.c",
1684 "src/f32-igemm/gen/6x8-minmax-fma3-broadcast.c",
1685 "src/f32-igemm/gen/7x8-minmax-fma3-broadcast.c",
1686 "src/f32-igemm/gen/8x8-minmax-fma3-broadcast.c",
1687 "src/f32-igemm/gen/1x16-minmax-fma3-broadcast.c",
1688 "src/f32-igemm/gen/3x16-minmax-fma3-broadcast.c",
1689 "src/f32-igemm/gen/4x16-minmax-fma3-broadcast.c",
1690 "src/f32-igemm/gen/5x16-minmax-fma3-broadcast.c",
1691 "src/f32-igemm/gen/1x16s4-minmax-fma3-broadcast.c",
1692 "src/f32-igemm/gen/3x16s4-minmax-fma3-broadcast.c",
1693 "src/f32-igemm/gen/4x16s4-minmax-fma3-broadcast.c",
1694 "src/f32-igemm/gen/5x16s4-minmax-fma3-broadcast.c",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]1695]
1696
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1697AVX2_UKERNELS = [
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1698 "src/f32-raddexpminusmax/gen/avx2-p5-x64.c",
1699 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc2.c",
1700 "src/f32-raddexpminusmax/gen/avx2-p5-x64-acc4.c",
1701 "src/f32-raddexpminusmax/gen/avx2-p5-x72.c",
1702 "src/f32-raddexpminusmax/gen/avx2-p5-x72-acc3.c",
1703 "src/f32-raddexpminusmax/gen/avx2-p5-x80.c",
1704 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc2.c",
1705 "src/f32-raddexpminusmax/gen/avx2-p5-x80-acc5.c",
1706 "src/f32-raddexpminusmax/gen/avx2-p5-x96.c",
1707 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc2.c",
1708 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc3.c",
1709 "src/f32-raddexpminusmax/gen/avx2-p5-x96-acc6.c",
1710 "src/f32-raddextexp/gen/avx2-p5-x64.c",
1711 "src/f32-raddextexp/gen/avx2-p5-x64-acc2.c",
1712 "src/f32-raddextexp/gen/avx2-p5-x64-acc4.c",
1713 "src/f32-raddextexp/gen/avx2-p5-x72.c",
1714 "src/f32-raddextexp/gen/avx2-p5-x72-acc3.c",
1715 "src/f32-raddextexp/gen/avx2-p5-x80.c",
1716 "src/f32-raddextexp/gen/avx2-p5-x80-acc2.c",
1717 "src/f32-raddextexp/gen/avx2-p5-x80-acc5.c",
1718 "src/f32-raddextexp/gen/avx2-p5-x96.c",
1719 "src/f32-raddextexp/gen/avx2-p5-x96-acc2.c",
1720 "src/f32-raddextexp/gen/avx2-p5-x96-acc3.c",
1721 "src/f32-raddextexp/gen/avx2-p5-x96-acc6.c",
1722 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64.c",
1723 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc2.c",
1724 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x64-acc4.c",
1725 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72.c",
1726 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x72-acc3.c",
1727 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80.c",
1728 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc2.c",
1729 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x80-acc5.c",
1730 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96.c",
1731 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc2.c",
1732 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc3.c",
1733 "src/f32-raddstoreexpminusmax/gen/avx2-p5-x96-acc6.c",
Marat Dukhanfa0a4322020-01-06 16:14:29 -0800[diff] [blame]1734 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x8.c",
1735 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x16.c",
1736 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x24.c",
1737 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x32.c",
1738 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x40.c",
1739 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x48.c",
1740 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x56.c",
1741 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x64.c",
1742 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x72.c",
1743 "src/f32-sigmoid/gen/avx2-rr1-p5-div-x80.c",
1744 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x8.c",
1745 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x16.c",
1746 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x24.c",
1747 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x32.c",
1748 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x40.c",
1749 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x48.c",
1750 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x56.c",
1751 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x64.c",
1752 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x72.c",
1753 "src/f32-sigmoid/gen/avx2-rr1-p5-nr1fma-x80.c",
1754 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x8.c",
1755 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x16.c",
1756 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x24.c",
1757 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x32.c",
1758 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x40.c",
1759 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x48.c",
1760 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x56.c",
1761 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x64.c",
1762 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x72.c",
1763 "src/f32-sigmoid/gen/avx2-rr1-p5-nr2fma-x80.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1764 "src/f32-vscaleexpminusmax/gen/avx2-p5-x8.c",
1765 "src/f32-vscaleexpminusmax/gen/avx2-p5-x16.c",
1766 "src/f32-vscaleexpminusmax/gen/avx2-p5-x24.c",
1767 "src/f32-vscaleexpminusmax/gen/avx2-p5-x32.c",
1768 "src/f32-vscaleexpminusmax/gen/avx2-p5-x40.c",
1769 "src/f32-vscaleexpminusmax/gen/avx2-p5-x48.c",
1770 "src/f32-vscaleexpminusmax/gen/avx2-p5-x56.c",
1771 "src/f32-vscaleexpminusmax/gen/avx2-p5-x64.c",
1772 "src/f32-vscaleexpminusmax/gen/avx2-p5-x72.c",
1773 "src/f32-vscaleexpminusmax/gen/avx2-p5-x80.c",
1774 "src/f32-vscaleexpminusmax/gen/avx2-p5-x88.c",
1775 "src/f32-vscaleexpminusmax/gen/avx2-p5-x96.c",
1776 "src/f32-vscaleextexp/gen/avx2-p5-x8.c",
1777 "src/f32-vscaleextexp/gen/avx2-p5-x16.c",
1778 "src/f32-vscaleextexp/gen/avx2-p5-x24.c",
1779 "src/f32-vscaleextexp/gen/avx2-p5-x32.c",
1780 "src/f32-vscaleextexp/gen/avx2-p5-x40.c",
1781 "src/f32-vscaleextexp/gen/avx2-p5-x48.c",
1782 "src/f32-vscaleextexp/gen/avx2-p5-x56.c",
1783 "src/f32-vscaleextexp/gen/avx2-p5-x64.c",
1784 "src/f32-vscaleextexp/gen/avx2-p5-x72.c",
1785 "src/f32-vscaleextexp/gen/avx2-p5-x80.c",
1786 "src/f32-vscaleextexp/gen/avx2-p5-x88.c",
1787 "src/f32-vscaleextexp/gen/avx2-p5-x96.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1788 "src/math/exp-avx2-p5.c",
1789 "src/math/exp-avx2-perm-p3.c",
1790 "src/math/exp-avx2-perm-p4.c",
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]1791 "src/math/expminus-avx2-p5.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1792 "src/math/extexp-avx2-p5.c",
Marat Dukhan72416002020-01-05 21:53:19 -0800[diff] [blame]1793 "src/math/sigmoid-avx2-rr2-p5-div.c",
1794 "src/math/sigmoid-avx2-rr1-p5-div.c",
1795 "src/math/sigmoid-avx2-rr2-p5-nr2fma.c",
1796 "src/math/sigmoid-avx2-rr1-p5-nr2fma.c",
1797 "src/math/sigmoid-avx2-rr2-p5-nr1fma.c",
1798 "src/math/sigmoid-avx2-rr1-p5-nr1fma.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1799]
1800
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1801AVX512F_UKERNELS = [
Marat Dukhan5c5fa962020-03-10 18:38:33 -0700[diff] [blame]1802 "src/f32-clamp/gen/avx512f-x16.c",
1803 "src/f32-clamp/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1804 "src/f32-dwconv/gen/up32x4-minmax-avx512f-acc2.c",
1805 "src/f32-dwconv/gen/up32x4-minmax-avx512f.c",
1806 "src/f32-dwconv/gen/up16x4-minmax-avx512f-acc2.c",
1807 "src/f32-dwconv/gen/up16x4-minmax-avx512f.c",
1808 "src/f32-dwconv/gen/up32x9-minmax-avx512f-acc2.c",
1809 "src/f32-dwconv/gen/up32x9-minmax-avx512f.c",
1810 "src/f32-dwconv/gen/up16x9-minmax-avx512f-acc2.c",
1811 "src/f32-dwconv/gen/up16x9-minmax-avx512f.c",
1812 "src/f32-dwconv/gen/up32x25-minmax-avx512f-acc2.c",
1813 "src/f32-dwconv/gen/up32x25-minmax-avx512f.c",
1814 "src/f32-dwconv/gen/up16x25-minmax-avx512f-acc2.c",
1815 "src/f32-dwconv/gen/up16x25-minmax-avx512f.c",
1816 "src/f32-gemm/gen/1x16-minmax-avx512f-broadcast.c",
1817 "src/f32-gemm/gen/4x16-minmax-avx512f-broadcast.c",
1818 "src/f32-gemm/gen/5x16-minmax-avx512f-broadcast.c",
1819 "src/f32-gemm/gen/6x16-minmax-avx512f-broadcast.c",
1820 "src/f32-gemm/gen/7x16-minmax-avx512f-broadcast.c",
1821 "src/f32-gemm/gen/8x16-minmax-avx512f-broadcast.c",
1822 "src/f32-gemm/gen-inc/1x16inc-minmax-avx512f-broadcast.c",
1823 "src/f32-gemm/gen-inc/4x16inc-minmax-avx512f-broadcast.c",
1824 "src/f32-gemm/gen-inc/5x16inc-minmax-avx512f-broadcast.c",
1825 "src/f32-gemm/gen-inc/6x16inc-minmax-avx512f-broadcast.c",
1826 "src/f32-gemm/gen-inc/7x16inc-minmax-avx512f-broadcast.c",
1827 "src/f32-gemm/gen-inc/8x16inc-minmax-avx512f-broadcast.c",
Marat Dukhan662faa02019-12-09 22:48:16 -0800[diff] [blame]1828 "src/f32-hswish/gen/avx512f-x16.c",
1829 "src/f32-hswish/gen/avx512f-x32.c",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1830 "src/f32-igemm/gen/1x16-minmax-avx512f-broadcast.c",
1831 "src/f32-igemm/gen/4x16-minmax-avx512f-broadcast.c",
1832 "src/f32-igemm/gen/5x16-minmax-avx512f-broadcast.c",
1833 "src/f32-igemm/gen/6x16-minmax-avx512f-broadcast.c",
1834 "src/f32-igemm/gen/7x16-minmax-avx512f-broadcast.c",
1835 "src/f32-igemm/gen/8x16-minmax-avx512f-broadcast.c",
Marat Dukhan90eca0a2020-03-11 00:52:23 -0700[diff] [blame]1836 "src/f32-prelu/gen/avx512f-2x16.c",
1837 "src/f32-prelu/gen/avx512f-2x32.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1838 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128.c",
1839 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1840 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1841 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144.c",
1842 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1843 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160.c",
1844 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1845 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1846 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192.c",
1847 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1848 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1849 "src/f32-raddexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
1850 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128.c",
1851 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc2.c",
1852 "src/f32-raddextexp/gen/avx512f-p5-scalef-x128-acc4.c",
1853 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144.c",
1854 "src/f32-raddextexp/gen/avx512f-p5-scalef-x144-acc3.c",
1855 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160.c",
1856 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc2.c",
1857 "src/f32-raddextexp/gen/avx512f-p5-scalef-x160-acc5.c",
1858 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192.c",
1859 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc2.c",
1860 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc3.c",
1861 "src/f32-raddextexp/gen/avx512f-p5-scalef-x192-acc6.c",
1862 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128.c",
1863 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc2.c",
1864 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x128-acc4.c",
1865 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144.c",
1866 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x144-acc3.c",
1867 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160.c",
1868 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc2.c",
1869 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x160-acc5.c",
1870 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192.c",
1871 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc2.c",
1872 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc3.c",
1873 "src/f32-raddstoreexpminusmax/gen/avx512f-p5-scalef-x192-acc6.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1874 "src/f32-rmax/avx512f.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1875 "src/f32-vbinary/gen/vadd-minmax-avx512f-x16.c",
1876 "src/f32-vbinary/gen/vadd-minmax-avx512f-x32.c",
1877 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x16.c",
1878 "src/f32-vbinary/gen/vaddc-minmax-avx512f-x32.c",
1879 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x16.c",
1880 "src/f32-vbinary/gen/vdiv-minmax-avx512f-x32.c",
1881 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x16.c",
1882 "src/f32-vbinary/gen/vdivc-minmax-avx512f-x32.c",
Marat Dukhan9a88efe2019-12-10 15:54:24 -0800[diff] [blame]1883 "src/f32-vbinary/gen/vmax-avx512f-x16.c",
1884 "src/f32-vbinary/gen/vmax-avx512f-x32.c",
1885 "src/f32-vbinary/gen/vmaxc-avx512f-x16.c",
1886 "src/f32-vbinary/gen/vmaxc-avx512f-x32.c",
1887 "src/f32-vbinary/gen/vmin-avx512f-x16.c",
1888 "src/f32-vbinary/gen/vmin-avx512f-x32.c",
1889 "src/f32-vbinary/gen/vminc-avx512f-x16.c",
1890 "src/f32-vbinary/gen/vminc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1891 "src/f32-vbinary/gen/vmul-minmax-avx512f-x16.c",
1892 "src/f32-vbinary/gen/vmul-minmax-avx512f-x32.c",
1893 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x16.c",
1894 "src/f32-vbinary/gen/vmulc-minmax-avx512f-x32.c",
1895 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x16.c",
1896 "src/f32-vbinary/gen/vrdivc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1897 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x16.c",
1898 "src/f32-vbinary/gen/vrsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1899 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x16.c",
1900 "src/f32-vbinary/gen/vrsubc-minmax-avx512f-x32.c",
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]1901 "src/f32-vbinary/gen/vsqrdiff-avx512f-x16.c",
1902 "src/f32-vbinary/gen/vsqrdiff-avx512f-x32.c",
1903 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x16.c",
1904 "src/f32-vbinary/gen/vsqrdiffc-avx512f-x32.c",
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]1905 "src/f32-vbinary/gen/vsub-minmax-avx512f-x16.c",
1906 "src/f32-vbinary/gen/vsub-minmax-avx512f-x32.c",
1907 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x16.c",
1908 "src/f32-vbinary/gen/vsubc-minmax-avx512f-x32.c",
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]1909 "src/f32-vlrelu/gen/avx512f-x16.c",
1910 "src/f32-vlrelu/gen/avx512f-x32.c",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]1911 "src/f32-vscale/avx512f-unroll64.c",
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]1912 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x16.c",
1913 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x32.c",
1914 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x48.c",
1915 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x64.c",
1916 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x80.c",
1917 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x96.c",
1918 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x112.c",
1919 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x128.c",
1920 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x144.c",
1921 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x160.c",
1922 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x176.c",
1923 "src/f32-vscaleexpminusmax/gen/avx512f-p5-scalef-x192.c",
1924 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x16.c",
1925 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x32.c",
1926 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x48.c",
1927 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x64.c",
1928 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x80.c",
1929 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x96.c",
1930 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x112.c",
1931 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x128.c",
1932 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x144.c",
1933 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x160.c",
1934 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x176.c",
1935 "src/f32-vscaleextexp/gen/avx512f-p5-scalef-x192.c",
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]1936 "src/f32-vrnd/gen/vrndne-avx512f-x16.c",
1937 "src/f32-vrnd/gen/vrndne-avx512f-x32.c",
1938 "src/f32-vrnd/gen/vrndz-avx512f-x16.c",
1939 "src/f32-vrnd/gen/vrndz-avx512f-x32.c",
1940 "src/f32-vrnd/gen/vrndu-avx512f-x16.c",
1941 "src/f32-vrnd/gen/vrndu-avx512f-x32.c",
1942 "src/f32-vrnd/gen/vrndd-avx512f-x16.c",
1943 "src/f32-vrnd/gen/vrndd-avx512f-x32.c",
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]1944 "src/f32-vunary/gen/vabs-avx512f-x16.c",
1945 "src/f32-vunary/gen/vabs-avx512f-x32.c",
1946 "src/f32-vunary/gen/vneg-avx512f-x16.c",
1947 "src/f32-vunary/gen/vneg-avx512f-x32.c",
1948 "src/f32-vunary/gen/vsqr-avx512f-x16.c",
1949 "src/f32-vunary/gen/vsqr-avx512f-x32.c",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]1950 "src/math/exp-avx512f-p5-scalef.c",
1951 "src/math/exp-avx512f-p5.c",
1952 "src/math/exp-avx512f-perm-p3.c",
Marat Dukhanfeb49232019-10-28 11:03:31 -0700[diff] [blame]1953 "src/math/exp-avx512f-perm2-p2.c",
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]1954 "src/math/extexp-avx512f-p5.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1955]
1956
1957AARCH32_ASM_UKERNELS = [
Marat Dukhan32f93812020-05-17 20:31:21 -0700[diff] [blame]1958 "src/f32-gemm/4x4-aarch32-vfp-ld64.S",
Marat Dukhan3b98f6b2020-05-17 10:09:22 -0700[diff] [blame]1959 "src/f32-gemm/4x4-minmax-aarch32-vfp-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1960 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1961 "src/f32-gemm/4x8-minmax-aarch32-neon-cortex-a55.S",
1962 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1963 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
Frank Barchard569561d2020-06-17 13:11:12 -0700[diff] [blame]1964 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-ld64.S",
1965 "src/f32-gemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
1966 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-ld64.S",
1967 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1968 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-cortex-a75.S",
1969 "src/f32-igemm/gen/4x8-minmax-aarch32-neon-pld-cortex-a75.S",
1970 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a53.S",
1971 "src/f32-igemm/4x8-minmax-aarch32-neon-cortex-a55.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]1972]
1973
1974AARCH64_ASM_UKERNELS = [
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1975 "src/f16-gemm/gen/1x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1976 "src/f16-gemm/gen/4x16-minmax-aarch64-neonfp16arith-ld32.S",
1977 "src/f16-gemm/gen/6x16-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard36b76b62020-04-10 12:39:17 -0700[diff] [blame]1978 "src/f16-gemm/gen-inc/1x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]1979 "src/f16-gemm/gen-inc/4x16inc-minmax-aarch64-neonfp16arith-ld32.S",
1980 "src/f16-gemm/gen-inc/6x16inc-minmax-aarch64-neonfp16arith-ld32.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1981 "src/f16-gemm/gen/1x8-minmax-aarch64-neonfp16arith-ld64.S",
1982 "src/f16-gemm/gen/4x8-minmax-aarch64-neonfp16arith-ld64.S",
1983 "src/f16-gemm/gen/6x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1984 "src/f16-gemm/gen/8x8-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchardbddfbcd2020-04-15 12:32:41 -0700[diff] [blame]1985 "src/f16-gemm/gen-inc/1x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1986 "src/f16-gemm/gen-inc/4x8inc-minmax-aarch64-neonfp16arith-ld64.S",
1987 "src/f16-gemm/gen-inc/6x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Frank Barchard3b8e5662020-04-20 12:12:53 -0700[diff] [blame]1988 "src/f16-gemm/gen-inc/8x8inc-minmax-aarch64-neonfp16arith-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1989 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma-cortex-a55.S",
1990 "src/f32-dwconv/up4x9-minmax-aarch64-neonfma.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]1991 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]1992 "src/f32-gemm/gen/1x12-minmax-aarch64-neonfma-cortex-a53.S",
1993 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a53.S",
1994 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
1995 "src/f32-gemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
1996 "src/f32-gemm/gen/4x12-minmax-aarch64-neonfma-cortex-a53.S",
1997 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a53.S",
1998 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a55.S",
1999 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2000 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2001 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld128.S",
2002 "src/f32-gemm/gen/4x8-minmax-aarch64-neonfma-ld64.S",
2003 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2004 "src/f32-gemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2005 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2006 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2007 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2008 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2009 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2010 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld128.S",
2011 "src/f32-gemm/gen/6x8-minmax-aarch64-neonfma-ld64.S",
Frank Barchard3cb54f92020-04-10 10:46:08 -0700[diff] [blame]2012 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-ld64.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2013 "src/f32-gemm/gen-inc/1x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2014 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2015 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2016 "src/f32-gemm/gen-inc/1x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2017 "src/f32-gemm/gen-inc/4x12inc-minmax-aarch64-neonfma-cortex-a53.S",
2018 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2019 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2020 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2021 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2022 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld128.S",
2023 "src/f32-gemm/gen-inc/4x8inc-minmax-aarch64-neonfma-ld64.S",
2024 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2025 "src/f32-gemm/gen-inc/5x8inc-minmax-aarch64-neonfma-cortex-a75.S",
2026 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a53.S",
2027 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a55.S",
2028 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a73.S",
2029 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a57.S",
2030 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]2031 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld128.S",
2032 "src/f32-gemm/gen-inc/6x8inc-minmax-aarch64-neonfma-ld64.S",
2033 "src/f32-igemm/1x12-minmax-aarch64-neonfma-cortex-a53.S",
2034 "src/f32-igemm/1x8-minmax-aarch64-neonfma-cortex-a53.S",
2035 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a57.S",
2036 "src/f32-igemm/gen/1x8-minmax-aarch64-neonfma-cortex-a75.S",
2037 "src/f32-igemm/4x12-minmax-aarch64-neonfma-cortex-a53.S",
2038 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a53.S",
2039 "src/f32-igemm/4x8-minmax-aarch64-neonfma-cortex-a55.S",
2040 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a57.S",
2041 "src/f32-igemm/gen/4x8-minmax-aarch64-neonfma-cortex-a75.S",
2042 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a57.S",
2043 "src/f32-igemm/gen/5x8-minmax-aarch64-neonfma-cortex-a75.S",
2044 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a53.S",
2045 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a55.S",
2046 "src/f32-igemm/6x8-minmax-aarch64-neonfma-cortex-a73.S",
2047 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a57.S",
2048 "src/f32-igemm/gen/6x8-minmax-aarch64-neonfma-cortex-a75.S",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2049]
2050
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2051INTERNAL_MICROKERNEL_HDRS = [
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2052 "src/requantization/gemmlowp-requantization.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2053 "src/xnnpack/argmaxpool.h",
2054 "src/xnnpack/avgpool.h",
2055 "src/xnnpack/clamp.h",
2056 "src/xnnpack/common.h",
2057 "src/xnnpack/conv.h",
2058 "src/xnnpack/dwconv.h",
2059 "src/xnnpack/gavgpool.h",
2060 "src/xnnpack/gemm.h",
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]2061 "src/xnnpack/fill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2062 "src/xnnpack/hswish.h",
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]2063 "src/xnnpack/ibilinear.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2064 "src/xnnpack/igemm.h",
Marat Dukhancfb31342019-12-05 10:42:57 -0800[diff] [blame]2065 "src/xnnpack/intrinsics-polyfill.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2066 "src/xnnpack/lut.h",
2067 "src/xnnpack/math.h",
2068 "src/xnnpack/maxpool.h",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2069 "src/xnnpack/memory.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2070 "src/xnnpack/packx.h",
2071 "src/xnnpack/pad.h",
2072 "src/xnnpack/params.h",
2073 "src/xnnpack/pavgpool.h",
2074 "src/xnnpack/ppmm.h",
2075 "src/xnnpack/prelu.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2076 "src/xnnpack/raddexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2077 "src/xnnpack/raddextexp.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2078 "src/xnnpack/raddstoreexpminusmax.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2079 "src/xnnpack/rmax.h",
2080 "src/xnnpack/scalar-utils.h",
2081 "src/xnnpack/spmm.h",
2082 "src/xnnpack/unpool.h",
2083 "src/xnnpack/vadd.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2084 "src/xnnpack/vbinary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2085 "src/xnnpack/vmulcaddc.h",
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]2086 "src/xnnpack/vscale.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]2087 "src/xnnpack/vscaleexpminusmax.h",
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]2088 "src/xnnpack/vscaleextexp.h",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]2089 "src/xnnpack/vunary.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2090 "src/xnnpack/zip.h",
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2091]
2092
2093INTERNAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2094 "include/xnnpack.h",
2095 "src/xnnpack/allocator.h",
2096 "src/xnnpack/compute.h",
2097 "src/xnnpack/im2col.h",
2098 "src/xnnpack/indirection.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2099 "src/xnnpack/math-stubs.h",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2100 "src/xnnpack/memory-planner.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2101 "src/xnnpack/operator.h",
2102 "src/xnnpack/pack.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2103 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2104 "src/xnnpack/requantization-stubs.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2105 "src/xnnpack/requantization.h",
Marat Dukhan1d75a542020-02-03 12:23:01 -0800[diff] [blame]2106 "src/xnnpack/subgraph.h",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2107]
2108
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2109ACCURACY_EVAL_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2110 "src/xnnpack/math-stubs.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2111]
2112
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2113MICROKERNEL_BENCHMARK_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2114 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2115 "include/xnnpack.h",
2116]
2117
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]2118MICROKERNEL_TEST_HDRS = INTERNAL_MICROKERNEL_HDRS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2119 "src/xnnpack/isa-checks.h",
Marat Dukhaneeaa7bd2019-10-25 17:31:25 -0700[diff] [blame]2120 "src/xnnpack/params-init.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2121 "src/xnnpack/requantization.h",
2122 "include/xnnpack.h",
2123]
2124
2125OPERATOR_TEST_PARAMS_HDRS = [
2126 "src/xnnpack/params.h",
2127 "src/xnnpack/common.h",
2128]
2129
2130WEIGHTS_PACK_HDRS = [
2131 "src/xnnpack/pack.h",
2132 "src/xnnpack/operator.h",
2133 "src/xnnpack/compute.h",
2134]
2135
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2136LOGGING_COPTS = select({
2137 # No logging in optimized mode
2138 ":optimized_build": ["-DXNN_LOG_LEVEL=0"],
2139 # Full logging in debug mode
2140 ":debug_build": ["-DXNN_LOG_LEVEL=5"],
2141 # Error-only logging in default (fastbuild) mode
2142 "//conditions:default": ["-DXNN_LOG_LEVEL=2"],
2143})
2144
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2145LOGGING_SRCS = select({
2146 # No logging in optimized mode
2147 ":optimized_build": [],
2148 "//conditions:default": [
2149 "src/operator-strings.c",
2150 "src/subgraph-strings.c",
2151 ],
2152})
2153
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2154LOGGING_HDRS = [
2155 "src/xnnpack/log.h",
2156]
2157
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2158xnnpack_cc_library(
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2159 name = "tables",
2160 srcs = TABLE_SRCS,
2161 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2162 gcc_copts = xnnpack_gcc_std_copts(),
2163 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2164)
2165
2166xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2167 name = "scalar_ukernels",
2168 srcs = SCALAR_UKERNELS,
2169 hdrs = INTERNAL_HDRS,
2170 aarch32_copts = ["-marm"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2171 gcc_copts = xnnpack_gcc_std_copts(),
2172 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2173 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2174 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2175 "@FP16",
2176 "@FXdiv",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2177 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2178 ],
2179)
2180
2181xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2182 name = "scalar_ukernels_test_mode",
2183 srcs = SCALAR_UKERNELS,
2184 hdrs = INTERNAL_HDRS,
2185 aarch32_copts = ["-marm"],
2186 copts = [
2187 "-UNDEBUG",
2188 "-DXNN_TEST_MODE=1",
2189 ],
2190 gcc_copts = xnnpack_gcc_std_copts(),
2191 msvc_copts = xnnpack_msvc_std_copts(),
2192 deps = [
2193 ":tables",
2194 "@FP16",
2195 "@FXdiv",
2196 "@pthreadpool",
2197 ],
2198)
2199
2200xnnpack_cc_library(
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2201 name = "wasm_ukernels",
2202 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2203 gcc_copts = xnnpack_gcc_std_copts(),
2204 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2205 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2206 wasmsimd_copts = [
2207 "-msimd128",
2208 "-munimplemented-simd128",
2209 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2210 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2211 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2212 ":tables",
Marat Dukhan436ebe62019-12-04 15:10:12 -0800[diff] [blame]2213 "@FP16",
2214 "@FXdiv",
2215 "@pthreadpool",
2216 ],
2217)
2218
2219xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2220 name = "wasm_ukernels_test_mode",
2221 hdrs = INTERNAL_HDRS,
2222 copts = [
2223 "-UNDEBUG",
2224 "-DXNN_TEST_MODE=1",
2225 ],
2226 gcc_copts = xnnpack_gcc_std_copts(),
2227 msvc_copts = xnnpack_msvc_std_copts(),
2228 wasm_srcs = WASM_UKERNELS,
Marat Dukhan1bbf96b2020-06-15 23:01:20 -0700[diff] [blame]2229 wasmsimd_copts = [
2230 "-msimd128",
2231 "-munimplemented-simd128",
2232 ],
Marat Dukhan290055c2020-06-09 12:24:29 -0700[diff] [blame]2233 wasmsimd_srcs = WASMSIMD_UKERNELS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2234 deps = [
2235 ":tables",
2236 "@FP16",
2237 "@FXdiv",
2238 "@pthreadpool",
2239 ],
2240)
2241
2242xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2243 name = "psimd_fastmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2244 hdrs = INTERNAL_HDRS,
2245 aarch32_copts = [
2246 "-marm",
2247 "-mfpu=neon",
2248 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2249 gcc_copts = xnnpack_gcc_std_copts(),
2250 gcc_x86_copts = ["-msse2"],
2251 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2252 optimized_copts = [
2253 "-O3",
2254 "-ffast-math",
2255 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2256 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2257 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2258 ":tables",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2259 "@FP16",
2260 "@psimd",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2261 "@pthreadpool",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2262 ],
2263)
2264
2265xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2266 name = "psimd_fastmath_ukernels_test_mode",
2267 hdrs = INTERNAL_HDRS,
2268 aarch32_copts = [
2269 "-marm",
2270 "-mfpu=neon",
2271 ],
2272 copts = [
2273 "-UNDEBUG",
2274 "-DXNN_TEST_MODE=1",
2275 ],
2276 gcc_copts = xnnpack_gcc_std_copts(),
2277 gcc_x86_copts = ["-msse2"],
2278 msvc_copts = xnnpack_msvc_std_copts(),
2279 optimized_copts = [
2280 "-O3",
2281 "-ffast-math",
2282 ],
2283 psimd_srcs = PSIMD_FASTMATH_UKERNELS,
2284 deps = [
2285 ":tables",
2286 "@FP16",
2287 "@psimd",
2288 "@pthreadpool",
2289 ],
2290)
2291
2292xnnpack_cc_library(
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2293 name = "psimd_accmath_ukernels",
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2294 hdrs = INTERNAL_HDRS,
2295 aarch32_copts = [
2296 "-marm",
2297 "-mfpu=neon",
2298 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2299 gcc_copts = xnnpack_gcc_std_copts(),
2300 gcc_x86_copts = ["-msse2"],
2301 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2302 optimized_copts = [
2303 "-O3",
2304 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2305 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2306 deps = [
2307 ":tables",
2308 "@FP16",
2309 "@psimd",
2310 "@pthreadpool",
2311 ],
2312)
2313
2314xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2315 name = "psimd_accmath_ukernels_test_mode",
2316 hdrs = INTERNAL_HDRS,
2317 aarch32_copts = [
2318 "-marm",
2319 "-mfpu=neon",
2320 ],
2321 copts = [
2322 "-UNDEBUG",
2323 "-DXNN_TEST_MODE=1",
2324 ],
2325 gcc_copts = xnnpack_gcc_std_copts(),
2326 gcc_x86_copts = ["-msse2"],
2327 msvc_copts = xnnpack_msvc_std_copts(),
2328 optimized_copts = [
2329 "-O3",
2330 ],
2331 psimd_srcs = PSIMD_ACCMATH_UKERNELS,
2332 deps = [
2333 ":tables",
2334 "@FP16",
2335 "@psimd",
2336 "@pthreadpool",
2337 ],
2338)
2339
2340xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2341 name = "neon_ukernels",
2342 hdrs = INTERNAL_HDRS,
2343 aarch32_copts = [
2344 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2345 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2346 "-mfpu=neon",
2347 ],
2348 aarch32_srcs = NEON_UKERNELS,
2349 aarch64_srcs = NEON_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2350 gcc_copts = xnnpack_gcc_std_copts(),
2351 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2352 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2353 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2354 "@FP16",
2355 "@pthreadpool",
2356 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2357)
2358
2359xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2360 name = "neon_ukernels_test_mode",
2361 hdrs = INTERNAL_HDRS,
2362 aarch32_copts = [
2363 "-marm",
2364 "-march=armv7-a",
2365 "-mfpu=neon",
2366 ],
2367 aarch32_srcs = NEON_UKERNELS,
2368 aarch64_srcs = NEON_UKERNELS,
2369 copts = [
2370 "-UNDEBUG",
2371 "-DXNN_TEST_MODE=1",
2372 ],
2373 gcc_copts = xnnpack_gcc_std_copts(),
2374 msvc_copts = xnnpack_msvc_std_copts(),
2375 deps = [
2376 ":tables",
2377 "@FP16",
2378 "@pthreadpool",
2379 ],
2380)
2381
2382xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2383 name = "neonfma_ukernels",
2384 hdrs = INTERNAL_HDRS,
2385 aarch32_copts = [
2386 "-marm",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2387 "-march=armv7-a",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2388 "-mfpu=neon-vfpv4",
2389 ],
2390 aarch32_srcs = NEONFMA_UKERNELS,
2391 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2392 apple_aarch32_copts = [
2393 "-mcpu=swift",
2394 "-mtune=generic",
2395 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2396 gcc_copts = xnnpack_gcc_std_copts(),
2397 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2398 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2399 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2400 "@FP16",
2401 "@pthreadpool",
2402 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2403)
2404
2405xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2406 name = "neonfma_ukernels_test_mode",
2407 hdrs = INTERNAL_HDRS,
2408 aarch32_copts = [
2409 "-marm",
2410 "-march=armv7-a",
2411 "-mfpu=neon-vfpv4",
2412 ],
2413 aarch32_srcs = NEONFMA_UKERNELS,
2414 aarch64_srcs = NEONFMA_UKERNELS + AARCH64_NEONFMA_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2415 apple_aarch32_copts = [
2416 "-mcpu=swift",
2417 "-mtune=generic",
2418 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2419 copts = [
2420 "-UNDEBUG",
2421 "-DXNN_TEST_MODE=1",
2422 ],
2423 gcc_copts = xnnpack_gcc_std_copts(),
2424 msvc_copts = xnnpack_msvc_std_copts(),
2425 deps = [
2426 ":tables",
2427 "@FP16",
2428 "@pthreadpool",
2429 ],
2430)
2431
2432xnnpack_cc_library(
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2433 name = "neonv8_ukernels",
2434 hdrs = INTERNAL_HDRS,
2435 aarch32_copts = [
2436 "-marm",
2437 "-march=armv8-a",
2438 "-mfpu=neon-fp-armv8",
2439 ],
2440 aarch32_srcs = NEONV8_UKERNELS,
2441 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2442 apple_aarch32_copts = [
2443 "-mcpu=cyclone",
2444 "-mtune=generic",
2445 ],
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2446 gcc_copts = xnnpack_gcc_std_copts(),
2447 msvc_copts = xnnpack_msvc_std_copts(),
2448 deps = [
2449 ":tables",
2450 "@FP16",
2451 "@pthreadpool",
2452 ],
2453)
2454
2455xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2456 name = "neonv8_ukernels_test_mode",
2457 hdrs = INTERNAL_HDRS,
2458 aarch32_copts = [
2459 "-marm",
2460 "-march=armv8-a",
2461 "-mfpu=neon-fp-armv8",
2462 ],
2463 aarch32_srcs = NEONV8_UKERNELS,
2464 aarch64_srcs = NEONV8_UKERNELS,
Marat Dukhanbc69ed62020-06-09 21:34:56 -0700[diff] [blame]2465 apple_aarch32_copts = [
2466 "-mcpu=cyclone",
2467 "-mtune=generic",
2468 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2469 copts = [
2470 "-UNDEBUG",
2471 "-DXNN_TEST_MODE=1",
2472 ],
2473 gcc_copts = xnnpack_gcc_std_copts(),
2474 msvc_copts = xnnpack_msvc_std_copts(),
2475 deps = [
2476 ":tables",
2477 "@FP16",
2478 "@pthreadpool",
2479 ],
2480)
2481
2482xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2483 name = "neonfp16arith_ukernels",
2484 hdrs = INTERNAL_HDRS,
2485 aarch64_copts = ["-march=armv8.2-a+fp16"],
2486 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2487 gcc_copts = xnnpack_gcc_std_copts(),
2488 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2489 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2490 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2491 "@FP16",
2492 "@pthreadpool",
2493 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2494)
2495
2496xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2497 name = "neonfp16arith_ukernels_test_mode",
2498 hdrs = INTERNAL_HDRS,
2499 aarch64_copts = ["-march=armv8.2-a+fp16"],
2500 aarch64_srcs = AARCH64_NEONFP16ARITH_UKERNELS,
2501 copts = [
2502 "-UNDEBUG",
2503 "-DXNN_TEST_MODE=1",
2504 ],
2505 gcc_copts = xnnpack_gcc_std_copts(),
2506 msvc_copts = xnnpack_msvc_std_copts(),
2507 deps = [
2508 ":tables",
2509 "@FP16",
2510 "@pthreadpool",
2511 ],
2512)
2513
2514xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2515 name = "sse2_ukernels",
2516 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2517 gcc_copts = xnnpack_gcc_std_copts(),
2518 gcc_x86_copts = ["-msse2"],
2519 msvc_copts = xnnpack_msvc_std_copts(),
2520 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2521 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2522 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2523 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2524 "@FP16",
2525 "@pthreadpool",
2526 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2527)
2528
2529xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2530 name = "sse2_ukernels_test_mode",
2531 hdrs = INTERNAL_HDRS,
2532 copts = [
2533 "-UNDEBUG",
2534 "-DXNN_TEST_MODE=1",
2535 ],
2536 gcc_copts = xnnpack_gcc_std_copts(),
2537 gcc_x86_copts = ["-msse2"],
2538 msvc_copts = xnnpack_msvc_std_copts(),
2539 msvc_x86_32_copts = ["/arch:SSE2"],
2540 x86_srcs = SSE_UKERNELS + SSE2_UKERNELS,
2541 deps = [
2542 ":tables",
2543 "@FP16",
2544 "@pthreadpool",
2545 ],
2546)
2547
2548xnnpack_cc_library(
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2549 name = "ssse3_ukernels",
2550 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2551 gcc_copts = xnnpack_gcc_std_copts(),
2552 gcc_x86_copts = ["-mssse3"],
2553 msvc_copts = xnnpack_msvc_std_copts(),
2554 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2555 x86_srcs = SSSE3_UKERNELS,
2556 deps = [
2557 ":tables",
2558 "@FP16",
2559 "@pthreadpool",
2560 ],
2561)
2562
2563xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2564 name = "ssse3_ukernels_test_mode",
2565 hdrs = INTERNAL_HDRS,
2566 copts = [
2567 "-UNDEBUG",
2568 "-DXNN_TEST_MODE=1",
2569 ],
2570 gcc_copts = xnnpack_gcc_std_copts(),
2571 gcc_x86_copts = ["-mssse3"],
2572 msvc_copts = xnnpack_msvc_std_copts(),
2573 msvc_x86_32_copts = ["/arch:SSE2"],
2574 x86_srcs = SSSE3_UKERNELS,
2575 deps = [
2576 ":tables",
2577 "@FP16",
2578 "@pthreadpool",
2579 ],
2580)
2581
2582xnnpack_cc_library(
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2583 name = "sse41_ukernels",
2584 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2585 gcc_copts = xnnpack_gcc_std_copts(),
2586 gcc_x86_copts = ["-msse4.1"],
2587 msvc_copts = xnnpack_msvc_std_copts(),
2588 msvc_x86_32_copts = ["/arch:SSE2"],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2589 x86_srcs = SSE41_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2590 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2591 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2592 "@FP16",
2593 "@pthreadpool",
2594 ],
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2595)
2596
2597xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2598 name = "sse41_ukernels_test_mode",
2599 hdrs = INTERNAL_HDRS,
2600 copts = [
2601 "-UNDEBUG",
2602 "-DXNN_TEST_MODE=1",
2603 ],
2604 gcc_copts = xnnpack_gcc_std_copts(),
2605 gcc_x86_copts = ["-msse4.1"],
2606 msvc_copts = xnnpack_msvc_std_copts(),
2607 msvc_x86_32_copts = ["/arch:SSE2"],
2608 x86_srcs = SSE41_UKERNELS,
2609 deps = [
2610 ":tables",
2611 "@FP16",
2612 "@pthreadpool",
2613 ],
2614)
2615
2616xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2617 name = "avx_ukernels",
2618 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2619 gcc_copts = xnnpack_gcc_std_copts(),
2620 gcc_x86_copts = ["-mavx"],
2621 msvc_copts = xnnpack_msvc_std_copts(),
2622 msvc_x86_32_copts = ["/arch:AVX"],
2623 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2624 x86_srcs = AVX_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2625 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2626 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2627 "@FP16",
2628 "@pthreadpool",
2629 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2630)
2631
2632xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2633 name = "avx_ukernels_test_mode",
2634 hdrs = INTERNAL_HDRS,
2635 copts = [
2636 "-UNDEBUG",
2637 "-DXNN_TEST_MODE=1",
2638 ],
2639 gcc_copts = xnnpack_gcc_std_copts(),
2640 gcc_x86_copts = ["-mavx"],
2641 msvc_copts = xnnpack_msvc_std_copts(),
2642 msvc_x86_32_copts = ["/arch:AVX"],
2643 msvc_x86_64_copts = ["/arch:AVX"],
2644 x86_srcs = AVX_UKERNELS,
2645 deps = [
2646 ":tables",
2647 "@FP16",
2648 "@pthreadpool",
2649 ],
2650)
2651
2652xnnpack_cc_library(
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2653 name = "fma3_ukernels",
2654 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2655 gcc_copts = xnnpack_gcc_std_copts(),
2656 gcc_x86_copts = ["-mfma"],
2657 msvc_copts = xnnpack_msvc_std_copts(),
2658 msvc_x86_32_copts = ["/arch:AVX"],
2659 msvc_x86_64_copts = ["/arch:AVX"],
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2660 x86_srcs = FMA3_UKERNELS,
2661 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2662 ":tables",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2663 "@FP16",
2664 "@pthreadpool",
2665 ],
2666)
2667
2668xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2669 name = "fma3_ukernels_test_mode",
2670 hdrs = INTERNAL_HDRS,
2671 copts = [
2672 "-UNDEBUG",
2673 "-DXNN_TEST_MODE=1",
2674 ],
2675 gcc_copts = xnnpack_gcc_std_copts(),
2676 gcc_x86_copts = ["-mfma"],
2677 msvc_copts = xnnpack_msvc_std_copts(),
2678 msvc_x86_32_copts = ["/arch:AVX"],
2679 msvc_x86_64_copts = ["/arch:AVX"],
2680 x86_srcs = FMA3_UKERNELS,
2681 deps = [
2682 ":tables",
2683 "@FP16",
2684 "@pthreadpool",
2685 ],
2686)
2687
2688xnnpack_cc_library(
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2689 name = "avx2_ukernels",
2690 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2691 gcc_copts = xnnpack_gcc_std_copts(),
2692 gcc_x86_copts = [
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2693 "-mfma",
2694 "-mavx2",
2695 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2696 msvc_copts = xnnpack_msvc_std_copts(),
2697 msvc_x86_32_copts = ["/arch:AVX2"],
2698 msvc_x86_64_copts = ["/arch:AVX2"],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2699 x86_srcs = AVX2_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2700 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2701 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2702 "@FP16",
2703 "@pthreadpool",
2704 ],
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2705)
2706
2707xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2708 name = "avx2_ukernels_test_mode",
2709 hdrs = INTERNAL_HDRS,
2710 copts = [
2711 "-UNDEBUG",
2712 "-DXNN_TEST_MODE=1",
2713 ],
2714 gcc_copts = xnnpack_gcc_std_copts(),
2715 gcc_x86_copts = [
2716 "-mfma",
2717 "-mavx2",
2718 ],
2719 msvc_copts = xnnpack_msvc_std_copts(),
2720 msvc_x86_32_copts = ["/arch:AVX2"],
2721 msvc_x86_64_copts = ["/arch:AVX2"],
2722 x86_srcs = AVX2_UKERNELS,
2723 deps = [
2724 ":tables",
2725 "@FP16",
2726 "@pthreadpool",
2727 ],
2728)
2729
2730xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2731 name = "avx512f_ukernels",
2732 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2733 gcc_copts = xnnpack_gcc_std_copts(),
2734 gcc_x86_copts = ["-mavx512f"],
2735 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2736 msvc_copts = xnnpack_msvc_std_copts(),
2737 msvc_x86_32_copts = ["/arch:AVX512"],
2738 msvc_x86_64_copts = ["/arch:AVX512"],
2739 msys_copts = ["-fno-asynchronous-unwind-tables"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2740 x86_srcs = AVX512F_UKERNELS,
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2741 deps = [
Marat Dukhan3a77ea72019-12-23 12:10:24 -0800[diff] [blame]2742 ":tables",
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]2743 "@FP16",
2744 "@pthreadpool",
2745 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2746)
2747
2748xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2749 name = "avx512f_ukernels_test_mode",
2750 hdrs = INTERNAL_HDRS,
2751 copts = [
2752 "-UNDEBUG",
2753 "-DXNN_TEST_MODE=1",
2754 ],
2755 gcc_copts = xnnpack_gcc_std_copts(),
2756 gcc_x86_copts = ["-mavx512f"],
2757 mingw_copts = ["-fno-asynchronous-unwind-tables"],
2758 msvc_copts = xnnpack_msvc_std_copts(),
2759 msvc_x86_32_copts = ["/arch:AVX512"],
2760 msvc_x86_64_copts = ["/arch:AVX512"],
2761 msys_copts = ["-fno-asynchronous-unwind-tables"],
2762 x86_srcs = AVX512F_UKERNELS,
2763 deps = [
2764 ":tables",
2765 "@FP16",
2766 "@pthreadpool",
2767 ],
2768)
2769
2770xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2771 name = "asm_ukernels",
2772 hdrs = ["src/xnnpack/assembly.h"],
2773 aarch32_srcs = AARCH32_ASM_UKERNELS,
Frank Barchard683f5592020-04-10 00:48:26 -0700[diff] [blame]2774 aarch64_copts = ["-march=armv8.2-a+fp16"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2775 aarch64_srcs = AARCH64_ASM_UKERNELS,
2776)
2777
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2778xnnpack_cc_library(
2779 name = "logging_utils",
2780 srcs = LOGGING_SRCS,
2781 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2782 copts = LOGGING_COPTS + [
2783 "-Isrc",
2784 "-Iinclude",
2785 ] + select({
2786 ":debug_build": [],
2787 "//conditions:default": xnnpack_min_size_copts(),
2788 }),
2789 gcc_copts = xnnpack_gcc_std_copts(),
2790 msvc_copts = xnnpack_msvc_std_copts(),
2791 visibility = xnnpack_visibility(),
2792 deps = [
2793 "@FP16",
2794 "@clog",
2795 "@pthreadpool",
2796 ],
2797)
2798
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2799xnnpack_aggregate_library(
2800 name = "ukernels",
2801 aarch32_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2802 ":neon_ukernels",
2803 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2804 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2805 ":asm_ukernels",
2806 ],
2807 aarch64_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2808 ":neon_ukernels",
2809 ":neonfma_ukernels",
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]2810 ":neonv8_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2811 ":neonfp16arith_ukernels",
2812 ":asm_ukernels",
2813 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2814 generic_deps = [
2815 ":scalar_ukernels",
2816 ],
Marat Dukhan500b8892020-04-15 17:09:50 -0700[diff] [blame]2817 psimd_deps = [
Marat Dukhan8d3c07e2020-01-02 01:20:59 -0800[diff] [blame]2818 ":psimd_fastmath_ukernels",
2819 ":psimd_accmath_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2820 ],
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2821 wasm_deps = [
2822 ":wasm_ukernels",
2823 ],
2824 wasmsimd_deps = [
2825 ":wasm_ukernels",
2826 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2827 x86_deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2828 ":sse2_ukernels",
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]2829 ":ssse3_ukernels",
Marat Dukhan69c3f2c2019-11-06 12:30:01 -0800[diff] [blame]2830 ":sse41_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2831 ":avx_ukernels",
Marat Dukhanfda12b82019-11-21 12:27:59 -0800[diff] [blame]2832 ":fma3_ukernels",
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]2833 ":avx2_ukernels",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2834 ":avx512f_ukernels",
2835 ],
2836)
2837
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2838xnnpack_aggregate_library(
2839 name = "ukernels_test_mode",
2840 aarch32_deps = [
2841 ":neon_ukernels_test_mode",
2842 ":neonfma_ukernels_test_mode",
2843 ":neonv8_ukernels_test_mode",
2844 ":asm_ukernels",
2845 ],
2846 aarch64_deps = [
2847 ":neon_ukernels_test_mode",
2848 ":neonfma_ukernels_test_mode",
2849 ":neonv8_ukernels_test_mode",
2850 ":neonfp16arith_ukernels_test_mode",
2851 ":asm_ukernels",
2852 ],
2853 generic_deps = [
2854 ":scalar_ukernels_test_mode",
2855 ],
2856 psimd_deps = [
2857 ":psimd_fastmath_ukernels_test_mode",
2858 ":psimd_accmath_ukernels_test_mode",
2859 ],
2860 wasm_deps = [
2861 ":wasm_ukernels_test_mode",
2862 ],
2863 wasmsimd_deps = [
2864 ":wasm_ukernels_test_mode",
2865 ],
2866 x86_deps = [
2867 ":sse2_ukernels_test_mode",
2868 ":ssse3_ukernels_test_mode",
2869 ":sse41_ukernels_test_mode",
2870 ":avx_ukernels_test_mode",
2871 ":fma3_ukernels_test_mode",
2872 ":avx2_ukernels_test_mode",
2873 ":avx512f_ukernels_test_mode",
2874 ],
2875)
2876
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2877# This target must be compatible with Android NDK r17 and compile with Clang 6.
2878# It is similar to :ukernels target, but excludes microkernels which require
2879# NEON FP16 arithmetics, NEON Dot Product, and newer intrinsics.
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2880xnnpack_aggregate_library(
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]2881 name = "ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]2882 aarch32_deps = [
2883 ":neon_ukernels",
2884 ":neonfma_ukernels",
2885 ":neonv8_ukernels",
2886 ":asm_ukernels",
2887 ],
2888 aarch64_deps = [
2889 ":neon_ukernels",
2890 ":neonfma_ukernels",
2891 ":neonv8_ukernels",
2892 ":asm_ukernels",
2893 ],
2894 generic_deps = [
2895 ":scalar_ukernels",
2896 ],
2897 psimd_deps = [
2898 ":psimd_fastmath_ukernels",
2899 ":psimd_accmath_ukernels",
2900 ],
2901 wasm_deps = [
2902 ":wasm_ukernels",
2903 ],
2904 wasmsimd_deps = [
2905 ":wasm_ukernels",
2906 ],
2907 x86_deps = [
2908 ":sse2_ukernels",
2909 ":ssse3_ukernels",
2910 ":sse41_ukernels",
2911 ":avx_ukernels",
2912 ":fma3_ukernels",
2913 ":avx2_ukernels",
2914 ":avx512f_ukernels",
2915 ],
2916)
2917
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2918xnnpack_cc_library(
2919 name = "im2col",
2920 srcs = ["src/im2col.c"],
2921 hdrs = [
2922 "src/xnnpack/common.h",
2923 "src/xnnpack/im2col.h",
2924 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2925 gcc_copts = xnnpack_gcc_std_copts(),
2926 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2927)
2928
2929xnnpack_cc_library(
2930 name = "indirection",
2931 srcs = ["src/indirection.c"],
2932 hdrs = INTERNAL_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2933 gcc_copts = xnnpack_gcc_std_copts(),
2934 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2935 deps = [
2936 "@FP16",
2937 "@FXdiv",
2938 "@pthreadpool",
2939 ],
2940)
2941
2942xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2943 name = "indirection_test_mode",
2944 srcs = ["src/indirection.c"],
2945 hdrs = INTERNAL_HDRS,
2946 copts = [
2947 "-UNDEBUG",
2948 "-DXNN_TEST_MODE=1",
2949 ],
2950 gcc_copts = xnnpack_gcc_std_copts(),
2951 msvc_copts = xnnpack_msvc_std_copts(),
2952 deps = [
2953 "@FP16",
2954 "@FXdiv",
2955 "@pthreadpool",
2956 ],
2957)
2958
2959xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2960 name = "operator_run",
2961 srcs = ["src/operator-run.c"],
Marat Dukhanc8e00eb2019-10-04 14:55:26 -0700[diff] [blame]2962 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2963 copts = LOGGING_COPTS + select({
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]2964 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2965 "//conditions:default": [],
2966 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]2967 gcc_copts = xnnpack_gcc_std_copts(),
2968 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2969 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2970 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]2971 "@FP16",
2972 "@FXdiv",
2973 "@clog",
2974 "@pthreadpool",
2975 ],
2976)
2977
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]2978xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2979 name = "operator_run_test_mode",
2980 srcs = ["src/operator-run.c"],
2981 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
2982 copts = LOGGING_COPTS + [
2983 "-UNDEBUG",
2984 "-DXNN_TEST_MODE=1",
2985 ] + select({
2986 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
2987 "//conditions:default": [],
2988 }),
2989 gcc_copts = xnnpack_gcc_std_copts(),
2990 msvc_copts = xnnpack_msvc_std_copts(),
2991 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]2992 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]2993 "@FP16",
2994 "@FXdiv",
2995 "@clog",
2996 "@pthreadpool",
2997 ],
2998)
2999
3000xnnpack_cc_library(
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3001 name = "memory_planner",
3002 srcs = ["src/memory-planner.c"],
3003 hdrs = INTERNAL_HDRS,
3004 defines = select({
3005 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3006 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3007 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3008 }),
3009 gcc_copts = xnnpack_gcc_std_copts(),
3010 msvc_copts = xnnpack_msvc_std_copts(),
3011 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3012 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3013 "@pthreadpool",
3014 ],
3015)
3016
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3017xnnpack_cc_library(
3018 name = "memory_planner_test_mode",
3019 srcs = ["src/memory-planner.c"],
3020 hdrs = INTERNAL_HDRS,
3021 copts = [
3022 "-UNDEBUG",
3023 "-DXNN_TEST_MODE=1",
3024 ],
3025 defines = select({
3026 ":xnn_enable_memopt_explicit_true": ["XNN_ENABLE_MEMOPT=1"],
3027 ":xnn_enable_memopt_explicit_false": ["XNN_ENABLE_MEMOPT=0"],
3028 "//conditions:default": ["XNN_ENABLE_MEMOPT=1"],
3029 }),
3030 gcc_copts = xnnpack_gcc_std_copts(),
3031 msvc_copts = xnnpack_msvc_std_copts(),
3032 deps = [
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3033 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3034 "@pthreadpool",
3035 ],
3036)
3037
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3038cc_library(
3039 name = "enable_assembly",
3040 defines = select({
3041 ":xnn_enable_assembly_explicit_true": ["XNN_ENABLE_ASSEMBLY=1"],
3042 ":xnn_enable_assembly_explicit_false": ["XNN_ENABLE_ASSEMBLY=0"],
Frank Barchard810171d2019-10-10 10:34:51 -0700[diff] [blame]3043 "//conditions:default": ["XNN_ENABLE_ASSEMBLY=1"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3044 }),
3045)
3046
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3047cc_library(
3048 name = "enable_sparse",
3049 defines = select({
3050 ":xnn_enable_sparse_explicit_true": ["XNN_ENABLE_SPARSE=1"],
3051 ":xnn_enable_sparse_explicit_false": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan8b283aa2020-06-18 16:48:57 -0700[diff] [blame^]3052 "//conditions:default": ["XNN_ENABLE_SPARSE=0"],
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3053 }),
3054)
3055
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3056xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3057 name = "operators",
3058 srcs = OPERATOR_SRCS + [
Marat Dukhan04f03be2019-11-19 12:36:47 -0800[diff] [blame]3059 "src/memory.c",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3060 "src/operator-delete.c",
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3061 ],
3062 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3063 copts = LOGGING_COPTS + [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3064 "-Isrc",
3065 "-Iinclude",
3066 ] + select({
3067 ":debug_build": [],
3068 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3069 }) + select({
3070 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3071 "//conditions:default": [],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3072 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3073 gcc_copts = xnnpack_gcc_std_copts(),
3074 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3075 deps = [
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3076 ":indirection",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3077 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3078 "@FP16",
3079 "@FXdiv",
3080 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3081 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3082 ],
3083)
3084
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3085xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3086 name = "operators_test_mode",
3087 srcs = OPERATOR_SRCS + [
3088 "src/memory.c",
3089 "src/operator-delete.c",
3090 ],
3091 hdrs = INTERNAL_HDRS + LOGGING_HDRS,
3092 copts = LOGGING_COPTS + [
3093 "-Isrc",
3094 "-Iinclude",
3095 "-UNDEBUG",
3096 "-DXNN_TEST_MODE=1",
3097 ] + select({
3098 ":debug_build": [],
3099 "//conditions:default": xnnpack_min_size_copts(),
3100 }) + select({
3101 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3102 "//conditions:default": [],
3103 }),
3104 gcc_copts = xnnpack_gcc_std_copts(),
3105 msvc_copts = xnnpack_msvc_std_copts(),
3106 deps = [
3107 ":indirection_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3108 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3109 "@FP16",
3110 "@FXdiv",
3111 "@clog",
3112 "@pthreadpool",
3113 ],
3114)
3115
3116xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3117 name = "XNNPACK",
3118 srcs = [
3119 "src/init.c",
Marat Dukhanccfdbd12020-02-03 14:27:45 -0800[diff] [blame]3120 "src/runtime.c",
3121 "src/subgraph.c",
3122 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3123 ] + SUBGRAPH_SRCS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3124 hdrs = ["include/xnnpack.h"],
3125 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3126 "-Isrc",
3127 "-Iinclude",
3128 ] + select({
3129 ":debug_build": [],
3130 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3131 }) + select({
3132 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3133 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3134 }),
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3135 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3136 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3137 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3138 visibility = xnnpack_visibility(),
3139 deps = [
3140 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3141 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3142 ":logging_utils",
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]3143 ":memory_planner",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3144 ":operator_run",
3145 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3146 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3147 "@clog",
Marat Dukhanab2946c2020-05-21 20:04:13 -0700[diff] [blame]3148 "@FP16",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3149 "@pthreadpool",
Marat Dukhand343c222019-10-07 09:22:14 -0700[diff] [blame]3150 ] + select({
3151 ":emscripten": [],
3152 "//conditions:default": ["@cpuinfo"],
3153 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3154)
3155
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3156xnnpack_cc_library(
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3157 name = "XNNPACK_test_mode",
3158 srcs = [
3159 "src/init.c",
3160 "src/runtime.c",
3161 "src/subgraph.c",
3162 "src/tensor.c",
Marat Dukhanf03da0d2020-06-10 16:00:20 -0700[diff] [blame]3163 ] + SUBGRAPH_SRCS,
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3164 hdrs = ["include/xnnpack.h"],
3165 copts = LOGGING_COPTS + [
3166 "-Isrc",
3167 "-Iinclude",
3168 "-UNDEBUG",
3169 "-DXNN_TEST_MODE=1",
3170 ] + select({
3171 ":debug_build": [],
3172 "//conditions:default": xnnpack_min_size_copts(),
3173 }) + select({
3174 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3175 "//conditions:default": [],
3176 }),
3177 gcc_copts = xnnpack_gcc_std_copts(),
3178 includes = ["include"],
3179 msvc_copts = xnnpack_msvc_std_copts(),
3180 visibility = xnnpack_visibility(),
3181 deps = [
3182 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3183 ":enable_sparse",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3184 ":logging_utils",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3185 ":memory_planner_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3186 ":operator_run_test_mode",
3187 ":operators_test_mode",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3188 ":ukernels_test_mode",
Marat Dukhan33fcf782020-05-24 14:27:15 -0700[diff] [blame]3189 "@clog",
3190 "@FP16",
3191 "@pthreadpool",
3192 ] + select({
3193 ":emscripten": [],
3194 "//conditions:default": ["@cpuinfo"],
3195 }),
3196)
3197
3198xnnpack_cc_library(
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3199 name = "xnnpack_f32",
3200 srcs = [
3201 "src/init.c",
3202 "src/runtime.c",
3203 "src/subgraph.c",
3204 "src/tensor.c",
3205 ] + SUBGRAPH_SRCS,
3206 hdrs = ["include/xnnpack.h"],
3207 copts = LOGGING_COPTS + [
3208 "-Isrc",
3209 "-Iinclude",
3210 ] + select({
3211 ":debug_build": [],
3212 "//conditions:default": xnnpack_min_size_copts(),
3213 }) + select({
3214 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3215 "//conditions:default": [],
3216 }),
3217 defines = [
3218 "XNN_NO_Q8_OPERATORS",
3219 "XNN_NO_U8_OPERATORS",
3220 "XNN_NO_X8_OPERATORS",
3221 "XNN_NO_F16_OPERATORS",
3222 "XNN_NO_X16_OPERATORS",
3223 ],
3224 gcc_copts = xnnpack_gcc_std_copts(),
3225 includes = ["include"],
3226 msvc_copts = xnnpack_msvc_std_copts(),
3227 visibility = xnnpack_visibility(),
3228 deps = [
3229 ":enable_assembly",
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]3230 ":enable_sparse",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3231 ":logging_utils",
3232 ":memory_planner",
3233 ":operator_run",
3234 ":operators",
Marat Dukhan86df3842020-06-17 14:03:31 -0700[diff] [blame]3235 ":ukernels_max_compatibility",
Marat Dukhanae046f52020-06-15 13:16:14 -0700[diff] [blame]3236 "@clog",
3237 "@FP16",
3238 "@pthreadpool",
3239 ] + select({
3240 ":emscripten": [],
3241 "//conditions:default": ["@cpuinfo"],
3242 }),
3243)
3244
3245xnnpack_cc_library(
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3246 name = "xnnpack_operators_nhwc_f32",
3247 srcs = [
3248 "src/init.c",
3249 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3250 hdrs = ["include/xnnpack.h"],
3251 copts = LOGGING_COPTS + [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3252 "-Isrc",
3253 "-Iinclude",
3254 ] + select({
3255 ":debug_build": [],
3256 "//conditions:default": xnnpack_min_size_copts(),
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]3257 }) + select({
3258 ":xnn_enable_hmp_explicit_false": ["-DXNN_MAX_UARCH_TYPES=1"],
3259 "//conditions:default": [],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3260 }),
3261 defines = [
3262 "XNN_NO_Q8_OPERATORS",
3263 "XNN_NO_U8_OPERATORS",
3264 "XNN_NO_X8_OPERATORS",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]3265 "XNN_NO_NCHW_OPERATORS",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3266 ],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3267 gcc_copts = xnnpack_gcc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3268 includes = ["include"],
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3269 msvc_copts = xnnpack_msvc_std_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3270 visibility = xnnpack_visibility(),
3271 deps = [
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3272 ":enable_assembly",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3273 ":logging_utils",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3274 ":operator_run",
3275 ":operators",
Marat Dukhan3b59de22020-06-03 20:15:19 -0700[diff] [blame]3276 ":ukernels",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3277 "@clog",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3278 "@pthreadpool",
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]3279 ] + select({
3280 ":emscripten": [],
3281 "//conditions:default": ["@cpuinfo"],
3282 }),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3283)
3284
Marat Dukhancf056b22019-10-07 10:26:29 -0700[diff] [blame]3285xnnpack_cc_library(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3286 name = "bench_utils",
3287 srcs = ["bench/utils.cc"],
3288 hdrs = ["bench/utils.h"],
Marat Dukhanbad48fe2019-11-04 10:35:22 -0800[diff] [blame]3289 deps = [
3290 "@com_google_benchmark//:benchmark",
3291 "@cpuinfo",
3292 ],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3293)
3294
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3295######################### Benchmarks for micro-kernels #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3296
3297xnnpack_benchmark(
3298 name = "q8_gemm_bench",
3299 srcs = [
3300 "bench/gemm.h",
3301 "bench/q8-gemm.cc",
3302 "src/xnnpack/AlignedAllocator.h",
3303 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3304 copts = xnnpack_optional_ruy_copts() + xnnpack_optional_gemmlowp_copts(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3305 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps() + xnnpack_optional_gemmlowp_deps(),
3306)
3307
3308xnnpack_benchmark(
Frank Barchard40d20fe2020-05-05 00:37:45 -0700[diff] [blame]3309 name = "f16_igemm_bench",
3310 srcs = [
3311 "bench/f16-igemm.cc",
3312 "bench/conv.h",
3313 "bench/google/conv.h",
3314 "src/xnnpack/AlignedAllocator.h",
3315 ] + MICROKERNEL_BENCHMARK_HDRS,
3316 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3317)
3318
3319xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3320 name = "f16_gemm_bench",
3321 srcs = [
3322 "bench/f16-gemm.cc",
3323 "bench/gemm.h",
3324 "src/xnnpack/AlignedAllocator.h",
3325 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3326 deps = MICROKERNEL_BENCHMARK_DEPS,
3327)
3328
3329xnnpack_benchmark(
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3330 name = "f16_spmm_bench",
3331 srcs = [
3332 "bench/f16-spmm.cc",
3333 "bench/gemm.h",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3334 "src/xnnpack/AlignedAllocator.h",
3335 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3336 deps = MICROKERNEL_BENCHMARK_DEPS,
3337)
3338
3339xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3340 name = "f32_igemm_bench",
3341 srcs = [
3342 "bench/f32-igemm.cc",
3343 "bench/conv.h",
3344 "src/xnnpack/AlignedAllocator.h",
3345 ] + MICROKERNEL_BENCHMARK_HDRS,
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3346 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3347)
3348
3349xnnpack_benchmark(
3350 name = "f32_conv_hwc_bench",
3351 srcs = [
3352 "bench/f32-conv-hwc.cc",
3353 "bench/dconv.h",
3354 "src/xnnpack/AlignedAllocator.h",
3355 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3356 deps = MICROKERNEL_BENCHMARK_DEPS,
3357)
3358
3359xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3360 name = "f32_conv_hwc2chw_bench",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3361 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3362 "bench/f32-conv-hwc2chw.cc",
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3363 "bench/dconv.h",
3364 "src/xnnpack/AlignedAllocator.h",
3365 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Erich Elsen563df5f2019-10-23 08:02:21 -0700[diff] [blame]3366 deps = MICROKERNEL_BENCHMARK_DEPS,
3367)
3368
3369xnnpack_benchmark(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3370 name = "f16_dwconv_bench",
3371 srcs = [
3372 "bench/f16-dwconv.cc",
3373 "bench/dwconv.h",
3374 "bench/google/dwconv.h",
3375 "src/xnnpack/AlignedAllocator.h",
3376 ] + MICROKERNEL_BENCHMARK_HDRS,
3377 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3378)
3379
3380xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3381 name = "f32_dwconv_bench",
3382 srcs = [
3383 "bench/f32-dwconv.cc",
3384 "bench/dwconv.h",
3385 "src/xnnpack/AlignedAllocator.h",
3386 ] + MICROKERNEL_BENCHMARK_HDRS,
3387 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3388)
3389
3390xnnpack_benchmark(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3391 name = "f32_dwconv_chw_bench",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3392 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3393 "bench/f32-dwconv-chw.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3394 "bench/dwconv.h",
3395 "src/xnnpack/AlignedAllocator.h",
3396 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3397 deps = MICROKERNEL_BENCHMARK_DEPS + [":indirection"],
3398)
3399
3400xnnpack_benchmark(
3401 name = "f32_gemm_bench",
3402 srcs = [
3403 "bench/f32-gemm.cc",
3404 "bench/gemm.h",
3405 "src/xnnpack/AlignedAllocator.h",
3406 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3407 copts = xnnpack_optional_ruy_copts(),
Frank Barchard7e955972019-10-11 10:34:25 -0700[diff] [blame]3408 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_ruy_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3409)
3410
3411xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3412 name = "f32_raddexpminusmax_bench",
3413 srcs = [
3414 "bench/f32-raddexpminusmax.cc",
3415 "src/xnnpack/AlignedAllocator.h",
3416 ] + MICROKERNEL_BENCHMARK_HDRS,
3417 deps = MICROKERNEL_BENCHMARK_DEPS,
3418)
3419
3420xnnpack_benchmark(
3421 name = "f32_raddextexp_bench",
3422 srcs = [
3423 "bench/f32-raddextexp.cc",
3424 "src/xnnpack/AlignedAllocator.h",
3425 ] + MICROKERNEL_BENCHMARK_HDRS,
3426 deps = MICROKERNEL_BENCHMARK_DEPS,
3427)
3428
3429xnnpack_benchmark(
3430 name = "f32_raddstoreexpminusmax_bench",
3431 srcs = [
3432 "bench/f32-raddstoreexpminusmax.cc",
3433 "src/xnnpack/AlignedAllocator.h",
3434 ] + MICROKERNEL_BENCHMARK_HDRS,
3435 deps = MICROKERNEL_BENCHMARK_DEPS,
3436)
3437
3438xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3439 name = "f32_rmax_bench",
3440 srcs = [
3441 "bench/f32-rmax.cc",
3442 "src/xnnpack/AlignedAllocator.h",
3443 ] + MICROKERNEL_BENCHMARK_HDRS,
3444 deps = MICROKERNEL_BENCHMARK_DEPS,
3445)
3446
3447xnnpack_benchmark(
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3448 name = "f32_sigmoid_bench",
3449 srcs = [
3450 "bench/f32-sigmoid.cc",
3451 "src/xnnpack/AlignedAllocator.h",
3452 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan14bec502019-11-18 11:35:31 -0800[diff] [blame]3453 deps = MICROKERNEL_BENCHMARK_DEPS,
3454)
3455
3456xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3457 name = "f32_spmm_bench",
3458 srcs = [
3459 "bench/f32-spmm.cc",
3460 "bench/gemm.h",
3461 "src/xnnpack/AlignedAllocator.h",
3462 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3463 deps = MICROKERNEL_BENCHMARK_DEPS,
3464)
3465
3466xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3467 name = "f32_softmax_bench",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3468 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3469 "bench/f32-softmax.cc",
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3470 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]3471 copts = xnnpack_optional_dnnl_copts(),
Marat Dukhan8d3c6932020-03-06 20:27:27 -0800[diff] [blame]3472 deps = MICROKERNEL_BENCHMARK_DEPS + xnnpack_optional_dnnl_deps(),
Marat Dukhan4a4a7fa2019-10-21 13:46:14 -0700[diff] [blame]3473)
3474
3475xnnpack_benchmark(
Marat Dukhan4c4eb002019-12-08 21:27:49 -0800[diff] [blame]3476 name = "f32_vscaleexpminusmax_bench",
3477 srcs = [
3478 "bench/f32-vscaleexpminusmax.cc",
3479 "src/xnnpack/AlignedAllocator.h",
3480 ] + MICROKERNEL_BENCHMARK_HDRS,
3481 deps = MICROKERNEL_BENCHMARK_DEPS,
3482)
3483
3484xnnpack_benchmark(
3485 name = "f32_vscaleextexp_bench",
3486 srcs = [
3487 "bench/f32-vscaleextexp.cc",
3488 "src/xnnpack/AlignedAllocator.h",
3489 ] + MICROKERNEL_BENCHMARK_HDRS,
3490 deps = MICROKERNEL_BENCHMARK_DEPS,
3491)
3492
3493xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3494 name = "f32_im2col_gemm_bench",
3495 srcs = [
3496 "bench/f32-im2col-gemm.cc",
3497 "bench/conv.h",
3498 "src/xnnpack/AlignedAllocator.h",
3499 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_BENCHMARK_HDRS,
3500 deps = MICROKERNEL_BENCHMARK_DEPS + [":im2col"],
3501)
3502
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]3503xnnpack_benchmark(
3504 name = "requantization_bench",
3505 srcs = [
3506 "bench/requantization.cc",
3507 "src/xnnpack/requantization-stubs.h",
3508 "src/xnnpack/AlignedAllocator.h",
3509 ] + MICROKERNEL_BENCHMARK_HDRS,
3510 deps = MICROKERNEL_BENCHMARK_DEPS,
3511)
3512
Marat Dukhanffbf96a2020-05-14 02:59:08 -0700[diff] [blame]3513xnnpack_benchmark(
3514 name = "rounding_bench",
3515 srcs = [
3516 "bench/rounding.cc",
3517 "src/xnnpack/math-stubs.h",
3518 "src/xnnpack/AlignedAllocator.h",
3519 ] + MICROKERNEL_BENCHMARK_HDRS,
3520 deps = MICROKERNEL_BENCHMARK_DEPS,
3521)
3522
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3523########################### Benchmarks for operators ###########################
3524
3525xnnpack_benchmark(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3526 name = "average_pooling_bench",
3527 srcs = ["bench/average-pooling.cc"],
Marat Dukhan7a16d8b2020-03-11 04:22:44 -0700[diff] [blame]3528 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3529 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3530 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3531)
3532
3533xnnpack_benchmark(
3534 name = "channel_shuffle_bench",
3535 srcs = ["bench/channel-shuffle.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3536 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3537)
3538
3539xnnpack_benchmark(
3540 name = "convolution_bench",
3541 srcs = ["bench/convolution.cc"],
3542 copts = xnnpack_optional_tflite_copts() + xnnpack_optional_armcl_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3543 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3544 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps() + xnnpack_optional_armcl_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3545)
3546
3547xnnpack_benchmark(
3548 name = "deconvolution_bench",
3549 srcs = ["bench/deconvolution.cc"],
3550 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3551 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3552 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3553)
3554
3555xnnpack_benchmark(
3556 name = "global_average_pooling_bench",
3557 srcs = ["bench/global-average-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3558 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3559)
3560
3561xnnpack_benchmark(
3562 name = "max_pooling_bench",
3563 srcs = ["bench/max-pooling.cc"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3564 deps = OPERATOR_BENCHMARK_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3565)
3566
3567xnnpack_benchmark(
3568 name = "sigmoid_bench",
3569 srcs = ["bench/sigmoid.cc"],
Marat Dukhanc3b9e862019-11-17 13:18:54 -0800[diff] [blame]3570 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3571 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3572 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3573)
3574
3575xnnpack_benchmark(
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3576 name = "prelu_bench",
3577 srcs = ["bench/prelu.cc"],
3578 copts = xnnpack_optional_tflite_copts(),
Marat Dukhan8ea0b072020-04-23 16:12:18 -0700[diff] [blame]3579 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3580 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan95b22432019-10-30 16:30:14 -0700[diff] [blame]3581)
3582
3583xnnpack_benchmark(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]3584 name = "softmax_bench",
3585 srcs = ["bench/softmax.cc"],
Marat Dukhan9c0db962020-01-28 12:30:14 -0800[diff] [blame]3586 copts = xnnpack_optional_tflite_copts(),
Marat Dukhanca2ba702020-04-24 01:31:47 -0700[diff] [blame]3587 tags = ["nowin32"],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]3588 deps = OPERATOR_BENCHMARK_DEPS + xnnpack_optional_tflite_deps(),
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3589)
3590
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3591############################# End-to-end benchmarks ############################
3592
3593cc_library(
3594 name = "mobilenet_v1",
3595 srcs = ["models/mobilenet-v1.cc"],
3596 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3597 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3598 linkstatic = True,
3599 deps = [
3600 ":XNNPACK",
3601 "@pthreadpool",
3602 ],
3603)
3604
3605cc_library(
3606 name = "mobilenet_v2",
3607 srcs = ["models/mobilenet-v2.cc"],
3608 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3609 copts = xnnpack_std_cxxopts(),
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3610 linkstatic = True,
3611 deps = [
3612 ":XNNPACK",
3613 "@pthreadpool",
3614 ],
3615)
3616
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3617cc_library(
3618 name = "mobilenet_v3_large",
3619 srcs = ["models/mobilenet-v3-large.cc"],
3620 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3621 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3622 linkstatic = True,
3623 deps = [
3624 ":XNNPACK",
3625 "@pthreadpool",
3626 ],
3627)
3628
3629cc_library(
3630 name = "mobilenet_v3_small",
3631 srcs = ["models/mobilenet-v3-small.cc"],
3632 hdrs = ["models/models.h"],
Marat Dukhana84e40b2019-12-11 15:38:03 -0800[diff] [blame]3633 copts = xnnpack_std_cxxopts(),
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3634 linkstatic = True,
3635 deps = [
3636 ":XNNPACK",
3637 "@pthreadpool",
3638 ],
3639)
3640
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3641xnnpack_benchmark(
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3642 name = "f32_dwconv_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3643 srcs = [
3644 "bench/f32-dwconv-e2e.cc",
3645 "bench/end2end.h",
3646 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3647 deps = MICROKERNEL_BENCHMARK_DEPS + [
3648 ":XNNPACK",
3649 ":mobilenet_v1",
3650 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3651 ":mobilenet_v3_large",
3652 ":mobilenet_v3_small",
Marat Dukhanef4416e2019-10-31 13:44:40 -0700[diff] [blame]3653 ],
3654)
3655
3656xnnpack_benchmark(
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3657 name = "f32_gemm_e2e_bench",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3658 srcs = [
3659 "bench/f32-gemm-e2e.cc",
3660 "bench/end2end.h",
3661 ] + MICROKERNEL_BENCHMARK_HDRS,
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3662 deps = MICROKERNEL_BENCHMARK_DEPS + [
3663 ":XNNPACK",
3664 ":mobilenet_v1",
3665 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3666 ":mobilenet_v3_large",
3667 ":mobilenet_v3_small",
Marat Dukhan5f18d262019-10-31 10:24:14 -0700[diff] [blame]3668 ],
3669)
3670
3671xnnpack_benchmark(
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3672 name = "end2end_bench",
3673 srcs = ["bench/end2end.cc"],
3674 deps = [
3675 ":XNNPACK",
Frank Barchardc712fa42019-10-31 14:00:21 -0700[diff] [blame]3676 ":bench_utils",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3677 ":mobilenet_v1",
3678 ":mobilenet_v2",
Marat Dukhanc08cdf52019-12-09 09:17:51 -0800[diff] [blame]3679 ":mobilenet_v3_large",
3680 ":mobilenet_v3_small",
Marat Dukhanc068bb62019-10-04 13:24:39 -0700[diff] [blame]3681 "@pthreadpool",
3682 ],
3683)
3684
Marat Dukhan6adff4e2019-10-14 18:32:07 -0700[diff] [blame]3685#################### Accuracy evaluation for math functions ####################
3686
3687xnnpack_benchmark(
3688 name = "f32_exp_eval",
3689 srcs = [
3690 "eval/f32-exp.cc",
3691 "src/xnnpack/AlignedAllocator.h",
3692 ] + ACCURACY_EVAL_HDRS,
3693 deps = ACCURACY_EVAL_DEPS,
3694)
3695
Marat Dukhan515c9772019-10-17 18:07:57 -0700[diff] [blame]3696xnnpack_benchmark(
3697 name = "f32_expminus_eval",
3698 srcs = [
3699 "eval/f32-expminus.cc",
3700 "src/xnnpack/AlignedAllocator.h",
3701 ] + ACCURACY_EVAL_HDRS,
3702 deps = ACCURACY_EVAL_DEPS,
3703)
3704
Marat Dukhan98ba4412019-10-23 02:14:28 -0700[diff] [blame]3705xnnpack_benchmark(
3706 name = "f32_extexp_eval",
3707 srcs = [
3708 "eval/f32-extexp.cc",
3709 "src/xnnpack/AlignedAllocator.h",
3710 ] + ACCURACY_EVAL_HDRS,
3711 deps = ACCURACY_EVAL_DEPS,
3712)
3713
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3714xnnpack_unit_test(
3715 name = "f32_roundne_eval",
3716 srcs = [
3717 "eval/f32-roundne.cc",
3718 "src/xnnpack/AlignedAllocator.h",
3719 "src/xnnpack/math-stubs.h",
3720 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhan22eed3d2020-05-11 20:13:37 -0700[diff] [blame]3721 automatic = False,
Marat Dukhan8853b822020-05-07 12:19:01 -0700[diff] [blame]3722 deps = MICROKERNEL_TEST_DEPS,
3723)
3724
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3725xnnpack_unit_test(
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3726 name = "f32_roundd_eval",
3727 srcs = [
3728 "eval/f32-roundd.cc",
3729 "src/xnnpack/AlignedAllocator.h",
3730 "src/xnnpack/math-stubs.h",
3731 ] + MICROKERNEL_TEST_HDRS,
3732 automatic = False,
3733 deps = MICROKERNEL_TEST_DEPS,
3734)
3735
3736xnnpack_unit_test(
3737 name = "f32_roundu_eval",
3738 srcs = [
3739 "eval/f32-roundu.cc",
3740 "src/xnnpack/AlignedAllocator.h",
3741 "src/xnnpack/math-stubs.h",
3742 ] + MICROKERNEL_TEST_HDRS,
3743 automatic = False,
3744 deps = MICROKERNEL_TEST_DEPS,
3745)
3746
3747xnnpack_unit_test(
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3748 name = "f32_roundz_eval",
3749 srcs = [
3750 "eval/f32-roundz.cc",
3751 "src/xnnpack/AlignedAllocator.h",
3752 "src/xnnpack/math-stubs.h",
3753 ] + MICROKERNEL_TEST_HDRS,
Marat Dukhanc9852ba2020-05-13 17:21:29 -0700[diff] [blame]3754 automatic = False,
Marat Dukhan2dbb9442020-05-12 20:43:43 -0700[diff] [blame]3755 deps = MICROKERNEL_TEST_DEPS,
3756)
3757
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]3758xnnpack_benchmark(
3759 name = "f32_sigmoid_eval",
3760 srcs = [
3761 "eval/f32-sigmoid.cc",
3762 "src/xnnpack/AlignedAllocator.h",
3763 ] + ACCURACY_EVAL_HDRS,
3764 deps = ACCURACY_EVAL_DEPS,
3765)
3766
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3767######################### Unit tests for micro-kernels #########################
3768
3769xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3770 name = "f16_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3771 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]3772 "test/f16-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3773 "test/gemm-microkernel-tester.h",
3774 "src/xnnpack/AlignedAllocator.h",
3775 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3776 deps = MICROKERNEL_TEST_DEPS,
3777)
3778
3779xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3780 name = "f16_spmm_minmax_test",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3781 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]3782 "test/f16-spmm-minmax.cc",
Marat Dukhanbdb56f52020-02-05 21:42:49 -0800[diff] [blame]3783 "test/spmm-microkernel-tester.h",
3784 "src/xnnpack/AlignedAllocator.h",
3785 ] + MICROKERNEL_TEST_HDRS,
3786 deps = MICROKERNEL_TEST_DEPS,
3787)
3788
3789xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3790 name = "f32_argmaxpool_test",
3791 srcs = [
3792 "test/f32-argmaxpool.cc",
3793 "test/argmaxpool-microkernel-tester.h",
3794 "src/xnnpack/AlignedAllocator.h",
3795 ] + MICROKERNEL_TEST_HDRS,
3796 deps = MICROKERNEL_TEST_DEPS,
3797)
3798
3799xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3800 name = "f32_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3801 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3802 "test/f32-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3803 "test/avgpool-microkernel-tester.h",
3804 "src/xnnpack/AlignedAllocator.h",
3805 ] + MICROKERNEL_TEST_HDRS,
3806 deps = MICROKERNEL_TEST_DEPS,
3807)
3808
3809xnnpack_unit_test(
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3810 name = "f32_ibilinear_test",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3811 srcs = [
Marat Dukhan660fd192020-03-10 04:55:30 -0700[diff] [blame]3812 "test/f32-ibilinear.cc",
3813 "test/ibilinear-microkernel-tester.h",
Marat Dukhan35dacfb2019-11-07 19:18:16 -0800[diff] [blame]3814 "src/xnnpack/AlignedAllocator.h",
3815 ] + MICROKERNEL_TEST_HDRS,
3816 deps = MICROKERNEL_TEST_DEPS,
3817)
3818
3819xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]3820 name = "f16_clamp_test",
3821 srcs = [
3822 "test/f16-clamp.cc",
3823 "test/clamp-microkernel-tester.h",
3824 ] + MICROKERNEL_TEST_HDRS,
3825 deps = MICROKERNEL_TEST_DEPS,
3826)
3827
3828xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3829 name = "f32_clamp_test",
3830 srcs = [
3831 "test/f32-clamp.cc",
3832 "test/clamp-microkernel-tester.h",
3833 ] + MICROKERNEL_TEST_HDRS,
3834 deps = MICROKERNEL_TEST_DEPS,
3835)
3836
3837xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3838 name = "f32_igemm_test",
3839 srcs = [
3840 "test/f32-igemm.cc",
3841 "test/gemm-microkernel-tester.h",
3842 "src/xnnpack/AlignedAllocator.h",
3843 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3844 deps = MICROKERNEL_TEST_DEPS,
3845)
3846
3847xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3848 name = "f32_igemm_relu_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3849 srcs = [
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3850 "test/f32-igemm-relu.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3851 "test/gemm-microkernel-tester.h",
3852 "src/xnnpack/AlignedAllocator.h",
3853 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3854 deps = MICROKERNEL_TEST_DEPS,
3855)
3856
3857xnnpack_unit_test(
Marat Dukhane207b7b2020-05-28 16:27:42 -0700[diff] [blame]3858 name = "f32_igemm_minmax_test",
3859 srcs = [
3860 "test/f32-igemm-minmax.cc",
3861 "test/gemm-microkernel-tester.h",
3862 "src/xnnpack/AlignedAllocator.h",
3863 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3864 deps = MICROKERNEL_TEST_DEPS,
3865)
3866
3867xnnpack_unit_test(
Frank Barchardb0e4fae2020-05-04 15:27:51 -0700[diff] [blame]3868 name = "f16_igemm_minmax_test",
3869 srcs = [
3870 "test/f16-igemm-minmax.cc",
3871 "test/gemm-microkernel-tester.h",
3872 "src/xnnpack/AlignedAllocator.h",
3873 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3874 deps = MICROKERNEL_TEST_DEPS,
3875)
3876
3877xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3878 name = "f32_conv_hwc_test",
3879 srcs = [
3880 "test/f32-conv-hwc.cc",
3881 "test/conv-hwc-microkernel-tester.h",
3882 "src/xnnpack/AlignedAllocator.h",
3883 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3884 deps = MICROKERNEL_TEST_DEPS,
3885)
3886
3887xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3888 name = "f32_conv_hwc2chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3889 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3890 "test/f32-conv-hwc2chw.cc",
3891 "test/conv-hwc2chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3892 "src/xnnpack/AlignedAllocator.h",
3893 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3894 deps = MICROKERNEL_TEST_DEPS,
3895)
3896
3897xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3898 name = "f32_dwconv_test",
3899 srcs = [
3900 "test/f32-dwconv.cc",
3901 "test/dwconv-microkernel-tester.h",
3902 "src/xnnpack/AlignedAllocator.h",
3903 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3904 deps = MICROKERNEL_TEST_DEPS,
3905)
3906
3907xnnpack_unit_test(
Frank Barchard5a599a62020-06-04 20:12:44 -0700[diff] [blame]3908 name = "f16_dwconv_minmax_test",
3909 srcs = [
3910 "test/f16-dwconv-minmax.cc",
3911 "test/dwconv-microkernel-tester.h",
3912 "src/xnnpack/AlignedAllocator.h",
3913 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3914 deps = MICROKERNEL_TEST_DEPS,
3915)
3916
3917xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3918 name = "f32_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3919 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3920 "test/f32-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3921 "test/dwconv-microkernel-tester.h",
3922 "src/xnnpack/AlignedAllocator.h",
3923 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3924 deps = MICROKERNEL_TEST_DEPS,
3925)
3926
3927xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3928 name = "f32_dwconv_chw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3929 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3930 "test/f32-dwconv-chw.cc",
3931 "test/dwconv-chw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3932 "src/xnnpack/AlignedAllocator.h",
3933 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3934 deps = MICROKERNEL_TEST_DEPS,
3935)
3936
3937xnnpack_unit_test(
Frank Barchard0bb49a72020-06-04 11:35:11 -0700[diff] [blame]3938 name = "f16_gavgpool_minmax_test",
3939 srcs = [
3940 "test/f16-gavgpool-minmax.cc",
3941 "test/gavgpool-microkernel-tester.h",
3942 "src/xnnpack/AlignedAllocator.h",
3943 ] + MICROKERNEL_TEST_HDRS,
3944 deps = MICROKERNEL_TEST_DEPS,
3945)
3946
3947xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3948 name = "f32_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3949 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]3950 "test/f32-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3951 "test/gavgpool-microkernel-tester.h",
3952 "src/xnnpack/AlignedAllocator.h",
3953 ] + MICROKERNEL_TEST_HDRS,
3954 deps = MICROKERNEL_TEST_DEPS,
3955)
3956
3957xnnpack_unit_test(
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3958 name = "f32_gavgpool_cw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3959 srcs = [
Marat Dukhan1f29b802020-05-15 23:46:39 -0700[diff] [blame]3960 "test/f32-gavgpool-cw.cc",
3961 "test/gavgpool-cw-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3962 "src/xnnpack/AlignedAllocator.h",
3963 ] + MICROKERNEL_TEST_HDRS,
3964 deps = MICROKERNEL_TEST_DEPS,
3965)
3966
3967xnnpack_unit_test(
Marat Dukhan163a7e62020-04-09 04:19:26 -0700[diff] [blame]3968 name = "f32_gemm_test",
3969 srcs = [
3970 "test/f32-gemm.cc",
3971 "test/gemm-microkernel-tester.h",
3972 "src/xnnpack/AlignedAllocator.h",
3973 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3974 deps = MICROKERNEL_TEST_DEPS,
3975)
3976
3977xnnpack_unit_test(
Marat Dukhan467f6362020-05-22 23:21:55 -0700[diff] [blame]3978 name = "f32_gemm_relu_test",
3979 srcs = [
3980 "test/f32-gemm-relu.cc",
3981 "test/gemm-microkernel-tester.h",
3982 "src/xnnpack/AlignedAllocator.h",
3983 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3984 deps = MICROKERNEL_TEST_DEPS,
3985)
3986
3987xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3988 name = "f32_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3989 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3990 "test/f32-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3991 "test/gemm-microkernel-tester.h",
3992 "src/xnnpack/AlignedAllocator.h",
3993 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
3994 deps = MICROKERNEL_TEST_DEPS,
3995)
3996
3997xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]3998 name = "f32_gemminc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]3999 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4000 "test/f32-gemminc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4001 "test/gemm-microkernel-tester.h",
4002 "src/xnnpack/AlignedAllocator.h",
4003 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4004 deps = MICROKERNEL_TEST_DEPS,
4005)
4006
4007xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4008 name = "f16_hswish_test",
4009 srcs = [
4010 "test/f16-hswish.cc",
4011 "test/hswish-microkernel-tester.h",
4012 ] + MICROKERNEL_TEST_HDRS,
4013 deps = MICROKERNEL_TEST_DEPS,
4014)
4015
4016xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4017 name = "f32_hswish_test",
4018 srcs = [
4019 "test/f32-hswish.cc",
4020 "test/hswish-microkernel-tester.h",
4021 ] + MICROKERNEL_TEST_HDRS,
4022 deps = MICROKERNEL_TEST_DEPS,
4023)
4024
4025xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4026 name = "f32_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4027 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4028 "test/f32-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4029 "test/maxpool-microkernel-tester.h",
4030 ] + MICROKERNEL_TEST_HDRS,
4031 deps = MICROKERNEL_TEST_DEPS,
4032)
4033
4034xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4035 name = "f32_pavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4036 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4037 "test/f32-pavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4038 "test/avgpool-microkernel-tester.h",
4039 "src/xnnpack/AlignedAllocator.h",
4040 ] + MICROKERNEL_TEST_HDRS,
4041 deps = MICROKERNEL_TEST_DEPS,
4042)
4043
4044xnnpack_unit_test(
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4045 name = "f32_ppmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4046 srcs = [
Marat Dukhan1c587112020-04-08 20:04:28 -0700[diff] [blame]4047 "test/f32-ppmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4048 "test/gemm-microkernel-tester.h",
4049 "src/xnnpack/AlignedAllocator.h",
4050 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4051 deps = MICROKERNEL_TEST_DEPS,
4052)
4053
4054xnnpack_unit_test(
Frank Barchardb1966592020-05-12 13:47:06 -0700[diff] [blame]4055 name = "f16_prelu_test",
4056 srcs = [
4057 "test/f16-prelu.cc",
4058 "test/prelu-microkernel-tester.h",
4059 "src/xnnpack/AlignedAllocator.h",
4060 ] + MICROKERNEL_TEST_HDRS,
4061 deps = MICROKERNEL_TEST_DEPS,
4062)
4063
4064xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4065 name = "f32_prelu_test",
4066 srcs = [
4067 "test/f32-prelu.cc",
4068 "test/prelu-microkernel-tester.h",
4069 "src/xnnpack/AlignedAllocator.h",
4070 ] + MICROKERNEL_TEST_HDRS,
4071 deps = MICROKERNEL_TEST_DEPS,
4072)
4073
4074xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4075 name = "f32_raddexpminusmax_test",
4076 srcs = [
4077 "test/f32-raddexpminusmax.cc",
4078 "test/raddexpminusmax-microkernel-tester.h",
4079 ] + MICROKERNEL_TEST_HDRS,
4080 deps = MICROKERNEL_TEST_DEPS,
4081)
4082
4083xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4084 name = "f32_raddextexp_test",
4085 srcs = [
4086 "test/f32-raddextexp.cc",
4087 "test/raddextexp-microkernel-tester.h",
4088 ] + MICROKERNEL_TEST_HDRS,
4089 deps = MICROKERNEL_TEST_DEPS,
4090)
4091
4092xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4093 name = "f32_raddstoreexpminusmax_test",
4094 srcs = [
4095 "test/f32-raddstoreexpminusmax.cc",
4096 "test/raddstoreexpminusmax-microkernel-tester.h",
4097 ] + MICROKERNEL_TEST_HDRS,
4098 deps = MICROKERNEL_TEST_DEPS,
4099)
4100
4101xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4102 name = "f32_rmax_test",
4103 srcs = [
4104 "test/f32-rmax.cc",
4105 "test/rmax-microkernel-tester.h",
4106 ] + MICROKERNEL_TEST_HDRS,
4107 deps = MICROKERNEL_TEST_DEPS,
4108)
4109
4110xnnpack_unit_test(
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4111 name = "f32_sigmoid_test",
4112 srcs = [
4113 "test/f32-sigmoid.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4114 "test/vunary-microkernel-tester.h",
Marat Dukhan346a9e52019-11-15 09:06:30 -0800[diff] [blame]4115 ] + MICROKERNEL_TEST_HDRS,
4116 deps = MICROKERNEL_TEST_DEPS,
4117)
4118
4119xnnpack_unit_test(
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4120 name = "f32_spmm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4121 srcs = [
Marat Dukhan355ab432020-04-09 19:01:52 -0700[diff] [blame]4122 "test/f32-spmm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4123 "test/spmm-microkernel-tester.h",
4124 "src/xnnpack/AlignedAllocator.h",
4125 ] + MICROKERNEL_TEST_HDRS,
4126 deps = MICROKERNEL_TEST_DEPS,
4127)
4128
4129xnnpack_unit_test(
Frank Barchardd793f6c2020-05-08 13:37:43 -0700[diff] [blame]4130 name = "f16_vadd_minmax_test",
4131 srcs = [
4132 "test/f16-vadd-minmax.cc",
4133 "test/vbinary-microkernel-tester.h",
4134 ] + MICROKERNEL_TEST_HDRS,
4135 deps = MICROKERNEL_TEST_DEPS,
4136)
4137
4138xnnpack_unit_test(
4139 name = "f16_vaddc_minmax_test",
4140 srcs = [
4141 "test/f16-vaddc-minmax.cc",
4142 "test/vbinaryc-microkernel-tester.h",
4143 ] + MICROKERNEL_TEST_HDRS,
4144 deps = MICROKERNEL_TEST_DEPS,
4145)
4146
4147xnnpack_unit_test(
4148 name = "f16_vdiv_minmax_test",
4149 srcs = [
4150 "test/f16-vdiv-minmax.cc",
4151 "test/vbinary-microkernel-tester.h",
4152 ] + MICROKERNEL_TEST_HDRS,
4153 deps = MICROKERNEL_TEST_DEPS,
4154)
4155
4156xnnpack_unit_test(
4157 name = "f16_vdivc_minmax_test",
4158 srcs = [
4159 "test/f16-vdivc-minmax.cc",
4160 "test/vbinaryc-microkernel-tester.h",
4161 ] + MICROKERNEL_TEST_HDRS,
4162 deps = MICROKERNEL_TEST_DEPS,
4163)
4164
4165xnnpack_unit_test(
4166 name = "f16_vrdivc_minmax_test",
4167 srcs = [
4168 "test/f16-vrdivc-minmax.cc",
4169 "test/vbinaryc-microkernel-tester.h",
4170 ] + MICROKERNEL_TEST_HDRS,
4171 deps = MICROKERNEL_TEST_DEPS,
4172)
4173
4174xnnpack_unit_test(
4175 name = "f16_vmax_test",
4176 srcs = [
4177 "test/f16-vmax.cc",
4178 "test/vbinary-microkernel-tester.h",
4179 ] + MICROKERNEL_TEST_HDRS,
4180 deps = MICROKERNEL_TEST_DEPS,
4181)
4182
4183xnnpack_unit_test(
4184 name = "f16_vmaxc_test",
4185 srcs = [
4186 "test/f16-vmaxc.cc",
4187 "test/vbinaryc-microkernel-tester.h",
4188 ] + MICROKERNEL_TEST_HDRS,
4189 deps = MICROKERNEL_TEST_DEPS,
4190)
4191
4192xnnpack_unit_test(
4193 name = "f16_vmin_test",
4194 srcs = [
4195 "test/f16-vmin.cc",
4196 "test/vbinary-microkernel-tester.h",
4197 ] + MICROKERNEL_TEST_HDRS,
4198 deps = MICROKERNEL_TEST_DEPS,
4199)
4200
4201xnnpack_unit_test(
4202 name = "f16_vminc_test",
4203 srcs = [
4204 "test/f16-vminc.cc",
4205 "test/vbinaryc-microkernel-tester.h",
4206 ] + MICROKERNEL_TEST_HDRS,
4207 deps = MICROKERNEL_TEST_DEPS,
4208)
4209
4210xnnpack_unit_test(
4211 name = "f16_vmul_minmax_test",
4212 srcs = [
4213 "test/f16-vmul-minmax.cc",
4214 "test/vbinary-microkernel-tester.h",
4215 ] + MICROKERNEL_TEST_HDRS,
4216 deps = MICROKERNEL_TEST_DEPS,
4217)
4218
4219xnnpack_unit_test(
4220 name = "f16_vmulc_minmax_test",
4221 srcs = [
4222 "test/f16-vmulc-minmax.cc",
4223 "test/vbinaryc-microkernel-tester.h",
4224 ] + MICROKERNEL_TEST_HDRS,
4225 deps = MICROKERNEL_TEST_DEPS,
4226)
4227
4228xnnpack_unit_test(
4229 name = "f16_vsub_minmax_test",
4230 srcs = [
4231 "test/f16-vsub-minmax.cc",
4232 "test/vbinary-microkernel-tester.h",
4233 ] + MICROKERNEL_TEST_HDRS,
4234 deps = MICROKERNEL_TEST_DEPS,
4235)
4236
4237xnnpack_unit_test(
4238 name = "f16_vsubc_minmax_test",
4239 srcs = [
4240 "test/f16-vsubc-minmax.cc",
4241 "test/vbinaryc-microkernel-tester.h",
4242 ] + MICROKERNEL_TEST_HDRS,
4243 deps = MICROKERNEL_TEST_DEPS,
4244)
4245
4246xnnpack_unit_test(
4247 name = "f16_vrsubc_minmax_test",
4248 srcs = [
4249 "test/f16-vrsubc-minmax.cc",
4250 "test/vbinaryc-microkernel-tester.h",
4251 ] + MICROKERNEL_TEST_HDRS,
4252 deps = MICROKERNEL_TEST_DEPS,
4253)
4254
4255xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4256 name = "f32_vabs_test",
4257 srcs = [
4258 "test/f32-vabs.cc",
4259 "test/vunary-microkernel-tester.h",
4260 ] + MICROKERNEL_TEST_HDRS,
4261 deps = MICROKERNEL_TEST_DEPS,
4262)
4263
4264xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4265 name = "f32_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4266 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4267 "test/f32-vadd-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4268 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4269 ] + MICROKERNEL_TEST_HDRS,
4270 deps = MICROKERNEL_TEST_DEPS,
4271)
4272
4273xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4274 name = "f32_vaddc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4275 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4276 "test/f32-vaddc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4277 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4278 ] + MICROKERNEL_TEST_HDRS,
4279 deps = MICROKERNEL_TEST_DEPS,
4280)
4281
4282xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4283 name = "f32_vdiv_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4284 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4285 "test/f32-vdiv-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4286 "test/vbinary-microkernel-tester.h",
4287 ] + MICROKERNEL_TEST_HDRS,
4288 deps = MICROKERNEL_TEST_DEPS,
4289)
4290
4291xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4292 name = "f32_vdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4293 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4294 "test/f32-vdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4295 "test/vbinaryc-microkernel-tester.h",
4296 ] + MICROKERNEL_TEST_HDRS,
4297 deps = MICROKERNEL_TEST_DEPS,
4298)
4299
4300xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4301 name = "f32_vrdivc_minmax_test",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4302 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4303 "test/f32-vrdivc-minmax.cc",
Marat Dukhan77ca6302019-12-06 12:48:15 -0800[diff] [blame]4304 "test/vbinaryc-microkernel-tester.h",
4305 ] + MICROKERNEL_TEST_HDRS,
4306 deps = MICROKERNEL_TEST_DEPS,
4307)
4308
4309xnnpack_unit_test(
Marat Dukhan403b7d42019-12-05 12:49:11 -0800[diff] [blame]4310 name = "f32_vmax_test",
4311 srcs = [
4312 "test/f32-vmax.cc",
4313 "test/vbinary-microkernel-tester.h",
4314 ] + MICROKERNEL_TEST_HDRS,
4315 deps = MICROKERNEL_TEST_DEPS,
4316)
4317
4318xnnpack_unit_test(
4319 name = "f32_vmaxc_test",
4320 srcs = [
4321 "test/f32-vmaxc.cc",
4322 "test/vbinaryc-microkernel-tester.h",
4323 ] + MICROKERNEL_TEST_HDRS,
4324 deps = MICROKERNEL_TEST_DEPS,
4325)
4326
4327xnnpack_unit_test(
4328 name = "f32_vmin_test",
4329 srcs = [
4330 "test/f32-vmin.cc",
4331 "test/vbinary-microkernel-tester.h",
4332 ] + MICROKERNEL_TEST_HDRS,
4333 deps = MICROKERNEL_TEST_DEPS,
4334)
4335
4336xnnpack_unit_test(
4337 name = "f32_vminc_test",
4338 srcs = [
4339 "test/f32-vminc.cc",
4340 "test/vbinaryc-microkernel-tester.h",
4341 ] + MICROKERNEL_TEST_HDRS,
4342 deps = MICROKERNEL_TEST_DEPS,
4343)
4344
4345xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4346 name = "f32_vmul_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4347 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4348 "test/f32-vmul-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4349 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4350 ] + MICROKERNEL_TEST_HDRS,
4351 deps = MICROKERNEL_TEST_DEPS,
4352)
4353
4354xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4355 name = "f32_vmulc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4356 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4357 "test/f32-vmulc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4358 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4359 ] + MICROKERNEL_TEST_HDRS,
4360 deps = MICROKERNEL_TEST_DEPS,
4361)
4362
4363xnnpack_unit_test(
Frank Barchard2a1049c2020-06-03 02:31:27 -0700[diff] [blame]4364 name = "f16_vmulcaddc_minmax_test",
4365 srcs = [
4366 "test/f16-vmulcaddc-minmax.cc",
4367 "test/vmulcaddc-microkernel-tester.h",
4368 "src/xnnpack/AlignedAllocator.h",
4369 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4370 deps = MICROKERNEL_TEST_DEPS,
4371)
4372
4373xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4374 name = "f32_vmulcaddc_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4375 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4376 "test/f32-vmulcaddc-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4377 "test/vmulcaddc-microkernel-tester.h",
4378 "src/xnnpack/AlignedAllocator.h",
4379 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4380 deps = MICROKERNEL_TEST_DEPS,
4381)
4382
4383xnnpack_unit_test(
Marat Dukhan8cc7efe2020-06-10 16:24:27 -0700[diff] [blame]4384 name = "f32_vlrelu_test",
4385 srcs = [
4386 "test/f32-vlrelu.cc",
4387 "test/vunary-microkernel-tester.h",
4388 ] + MICROKERNEL_TEST_HDRS,
4389 deps = MICROKERNEL_TEST_DEPS,
4390)
4391
4392xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4393 name = "f32_vneg_test",
4394 srcs = [
4395 "test/f32-vneg.cc",
4396 "test/vunary-microkernel-tester.h",
4397 ] + MICROKERNEL_TEST_HDRS,
4398 deps = MICROKERNEL_TEST_DEPS,
4399)
4400
4401xnnpack_unit_test(
Marat Dukhaneecf8fd2020-06-09 08:59:37 -0700[diff] [blame]4402 name = "f32_vrndne_test",
4403 srcs = [
4404 "test/f32-vrndne.cc",
4405 "test/vunary-microkernel-tester.h",
4406 ] + MICROKERNEL_TEST_HDRS,
4407 deps = MICROKERNEL_TEST_DEPS,
4408)
4409
4410xnnpack_unit_test(
4411 name = "f32_vrndz_test",
4412 srcs = [
4413 "test/f32-vrndz.cc",
4414 "test/vunary-microkernel-tester.h",
4415 ] + MICROKERNEL_TEST_HDRS,
4416 deps = MICROKERNEL_TEST_DEPS,
4417)
4418
4419xnnpack_unit_test(
4420 name = "f32_vrndu_test",
4421 srcs = [
4422 "test/f32-vrndu.cc",
4423 "test/vunary-microkernel-tester.h",
4424 ] + MICROKERNEL_TEST_HDRS,
4425 deps = MICROKERNEL_TEST_DEPS,
4426)
4427
4428xnnpack_unit_test(
4429 name = "f32_vrndd_test",
4430 srcs = [
4431 "test/f32-vrndd.cc",
4432 "test/vunary-microkernel-tester.h",
4433 ] + MICROKERNEL_TEST_HDRS,
4434 deps = MICROKERNEL_TEST_DEPS,
4435)
4436
4437xnnpack_unit_test(
Marat Dukhan05ac8e32019-10-21 15:39:33 -0700[diff] [blame]4438 name = "f32_vscale_test",
4439 srcs = [
4440 "test/f32-vscale.cc",
4441 "test/vscale-microkernel-tester.h",
4442 ] + MICROKERNEL_TEST_HDRS,
4443 deps = MICROKERNEL_TEST_DEPS,
4444)
4445
4446xnnpack_unit_test(
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4447 name = "f32_vscaleexpminusmax_test",
4448 srcs = [
4449 "test/f32-vscaleexpminusmax.cc",
4450 "test/vscaleexpminusmax-microkernel-tester.h",
4451 ] + MICROKERNEL_TEST_HDRS,
4452 deps = MICROKERNEL_TEST_DEPS,
4453)
4454
4455xnnpack_unit_test(
Marat Dukhan6f8d4d32019-10-25 17:07:09 -0700[diff] [blame]4456 name = "f32_vscaleextexp_test",
4457 srcs = [
4458 "test/f32-vscaleextexp.cc",
4459 "test/vscaleextexp-microkernel-tester.h",
4460 ] + MICROKERNEL_TEST_HDRS,
4461 deps = MICROKERNEL_TEST_DEPS,
4462)
4463
4464xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4465 name = "f32_vsqr_test",
4466 srcs = [
4467 "test/f32-vsqr.cc",
4468 "test/vunary-microkernel-tester.h",
4469 ] + MICROKERNEL_TEST_HDRS,
4470 deps = MICROKERNEL_TEST_DEPS,
4471)
4472
4473xnnpack_unit_test(
Marat Dukhan13bafb02020-06-05 00:43:11 -0700[diff] [blame]4474 name = "f32_vsqrdiff_test",
4475 srcs = [
4476 "test/f32-vsqrdiff.cc",
4477 "test/vbinary-microkernel-tester.h",
4478 ] + MICROKERNEL_TEST_HDRS,
4479 deps = MICROKERNEL_TEST_DEPS,
4480)
4481
4482xnnpack_unit_test(
4483 name = "f32_vsqrdiffc_test",
4484 srcs = [
4485 "test/f32-vsqrdiffc.cc",
4486 "test/vbinaryc-microkernel-tester.h",
4487 ] + MICROKERNEL_TEST_HDRS,
4488 deps = MICROKERNEL_TEST_DEPS,
4489)
4490
4491xnnpack_unit_test(
4492 name = "f32_vrsqrdiffc_test",
4493 srcs = [
4494 "test/f32-vrsqrdiffc.cc",
4495 "test/vbinaryc-microkernel-tester.h",
4496 ] + MICROKERNEL_TEST_HDRS,
4497 deps = MICROKERNEL_TEST_DEPS,
4498)
4499
4500xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4501 name = "f32_vsub_minmax_test",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4502 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4503 "test/f32-vsub-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4504 "test/vbinary-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4505 ] + MICROKERNEL_TEST_HDRS,
4506 deps = MICROKERNEL_TEST_DEPS,
4507)
4508
4509xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4510 name = "f32_vsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4511 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4512 "test/f32-vsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4513 "test/vbinaryc-microkernel-tester.h",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4514 ] + MICROKERNEL_TEST_HDRS,
4515 deps = MICROKERNEL_TEST_DEPS,
4516)
4517
4518xnnpack_unit_test(
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4519 name = "f32_vrsubc_minmax_test",
Marat Dukhanc07cb7f2019-11-14 15:32:05 -0800[diff] [blame]4520 srcs = [
Marat Dukhan91cd2b72020-04-09 23:57:31 -0700[diff] [blame]4521 "test/f32-vrsubc-minmax.cc",
Marat Dukhan1e782c42019-11-21 17:02:40 -0800[diff] [blame]4522 "test/vbinaryc-microkernel-tester.h",
Marat Dukhan97579532019-10-18 16:40:39 -0700[diff] [blame]4523 ] + MICROKERNEL_TEST_HDRS,
4524 deps = MICROKERNEL_TEST_DEPS,
4525)
4526
4527xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4528 name = "q8_avgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4529 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4530 "test/q8-avgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4531 "test/avgpool-microkernel-tester.h",
4532 "src/xnnpack/AlignedAllocator.h",
4533 ] + MICROKERNEL_TEST_HDRS,
4534 deps = MICROKERNEL_TEST_DEPS,
4535)
4536
4537xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4538 name = "q8_igemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4539 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4540 "test/q8-igemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4541 "test/gemm-microkernel-tester.h",
4542 "src/xnnpack/AlignedAllocator.h",
4543 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4544 deps = MICROKERNEL_TEST_DEPS,
4545)
4546
4547xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4548 name = "q8_dwconv_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4549 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4550 "test/q8-dwconv-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4551 "test/dwconv-microkernel-tester.h",
4552 "src/xnnpack/AlignedAllocator.h",
4553 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4554 deps = MICROKERNEL_TEST_DEPS,
4555)
4556
4557xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4558 name = "q8_gavgpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4559 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4560 "test/q8-gavgpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4561 "test/gavgpool-microkernel-tester.h",
4562 "src/xnnpack/AlignedAllocator.h",
4563 ] + MICROKERNEL_TEST_HDRS,
4564 deps = MICROKERNEL_TEST_DEPS,
4565)
4566
4567xnnpack_unit_test(
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4568 name = "q8_gemm_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4569 srcs = [
Marat Dukhande06f492020-04-09 00:19:31 -0700[diff] [blame]4570 "test/q8-gemm-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4571 "test/gemm-microkernel-tester.h",
4572 "src/xnnpack/AlignedAllocator.h",
4573 ] + WEIGHTS_PACK_HDRS + MICROKERNEL_TEST_HDRS,
4574 deps = MICROKERNEL_TEST_DEPS,
4575)
4576
4577xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4578 name = "q8_vadd_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4579 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4580 "test/q8-vadd-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4581 "test/vadd-microkernel-tester.h",
4582 ] + MICROKERNEL_TEST_HDRS,
4583 deps = MICROKERNEL_TEST_DEPS,
4584)
4585
4586xnnpack_unit_test(
4587 name = "u8_clamp_test",
4588 srcs = [
4589 "test/u8-clamp.cc",
4590 "test/clamp-microkernel-tester.h",
4591 ] + MICROKERNEL_TEST_HDRS,
4592 deps = MICROKERNEL_TEST_DEPS,
4593)
4594
4595xnnpack_unit_test(
4596 name = "u8_lut32norm_test",
4597 srcs = [
4598 "test/u8-lut32norm.cc",
4599 "test/lut-norm-microkernel-tester.h",
4600 ] + MICROKERNEL_TEST_HDRS,
4601 deps = MICROKERNEL_TEST_DEPS,
4602)
4603
4604xnnpack_unit_test(
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4605 name = "u8_maxpool_minmax_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4606 srcs = [
Marat Dukhan99936602020-04-11 16:47:01 -0700[diff] [blame]4607 "test/u8-maxpool-minmax.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4608 "test/maxpool-microkernel-tester.h",
4609 ] + MICROKERNEL_TEST_HDRS,
4610 deps = MICROKERNEL_TEST_DEPS,
4611)
4612
4613xnnpack_unit_test(
4614 name = "u8_rmax_test",
4615 srcs = [
4616 "test/u8-rmax.cc",
4617 "test/rmax-microkernel-tester.h",
4618 ] + MICROKERNEL_TEST_HDRS,
4619 deps = MICROKERNEL_TEST_DEPS,
4620)
4621
4622xnnpack_unit_test(
Marat Dukhan3bb3bfc2020-05-19 17:42:46 -0700[diff] [blame]4623 name = "x32_fill_test",
4624 srcs = [
4625 "test/x32-fill.cc",
4626 "test/fill-microkernel-tester.h",
4627 ] + MICROKERNEL_TEST_HDRS,
4628 deps = MICROKERNEL_TEST_DEPS,
4629)
4630
4631xnnpack_unit_test(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4632 name = "x32_packx_test",
4633 srcs = [
4634 "test/x32-packx.cc",
4635 "test/pack-microkernel-tester.h",
4636 "src/xnnpack/AlignedAllocator.h",
4637 ] + MICROKERNEL_TEST_HDRS,
4638 deps = MICROKERNEL_TEST_DEPS,
4639)
4640
4641xnnpack_unit_test(
4642 name = "x32_pad_test",
4643 srcs = [
4644 "test/x32-pad.cc",
4645 "test/pad-microkernel-tester.h",
4646 ] + MICROKERNEL_TEST_HDRS,
4647 deps = MICROKERNEL_TEST_DEPS,
4648)
4649
4650xnnpack_unit_test(
4651 name = "x32_unpool_test",
4652 srcs = [
4653 "test/x32-unpool.cc",
4654 "test/unpool-microkernel-tester.h",
4655 ] + MICROKERNEL_TEST_HDRS,
4656 deps = MICROKERNEL_TEST_DEPS,
4657)
4658
4659xnnpack_unit_test(
4660 name = "x32_zip_test",
4661 srcs = [
4662 "test/x32-zip.cc",
4663 "test/zip-microkernel-tester.h",
4664 ] + MICROKERNEL_TEST_HDRS,
4665 deps = MICROKERNEL_TEST_DEPS,
4666)
4667
4668xnnpack_unit_test(
4669 name = "x8_lut_test",
4670 srcs = [
4671 "test/x8-lut.cc",
4672 "test/lut-microkernel-tester.h",
4673 ] + MICROKERNEL_TEST_HDRS,
4674 deps = MICROKERNEL_TEST_DEPS,
4675)
4676
4677xnnpack_unit_test(
4678 name = "x8_zip_test",
4679 srcs = [
4680 "test/x8-zip.cc",
4681 "test/zip-microkernel-tester.h",
4682 ] + MICROKERNEL_TEST_HDRS,
4683 deps = MICROKERNEL_TEST_DEPS,
4684)
4685
Marat Dukhanfe7acb62020-03-09 19:30:05 -0700[diff] [blame]4686xnnpack_unit_test(
4687 name = "requantization_test",
4688 srcs = [
4689 "src/xnnpack/requantization-stubs.h",
4690 "test/requantization.cc",
4691 "test/requantization-tester.h",
4692 ] + MICROKERNEL_TEST_HDRS,
4693 deps = MICROKERNEL_TEST_DEPS,
4694)
4695
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4696########################## Size tests for the library #########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4697
4698xnnpack_binary(
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4699 name = "operator_size_test",
4700 srcs = ["test/operator-size.c"],
Marat Dukhan8fe54e42019-10-10 14:12:59 -0700[diff] [blame]4701 deps = [":xnnpack_operators_nhwc_f32"],
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4702)
4703
Marat Dukhan20c3b922020-03-10 03:45:06 -0700[diff] [blame]4704xnnpack_binary(
4705 name = "subgraph_size_test",
4706 srcs = ["test/subgraph-size.c"],
4707 deps = [":XNNPACK"],
4708)
4709
4710########################### Unit tests for operators ##########################
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4711
4712xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4713 name = "abs_nc_test",
4714 srcs = [
4715 "test/abs-nc.cc",
4716 "test/abs-operator-tester.h",
4717 ],
4718 deps = OPERATOR_TEST_DEPS,
4719)
4720
4721xnnpack_unit_test(
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4722 name = "add_nd_test",
4723 srcs = [
4724 "test/add-nd.cc",
4725 "test/binary-elementwise-operator-tester.h",
4726 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4727 deps = OPERATOR_TEST_DEPS,
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4728)
4729
4730xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4731 name = "argmax_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4732 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4733 "test/argmax-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4734 "test/argmax-pooling-operator-tester.h",
4735 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4736 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4737)
4738
4739xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4740 name = "average_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4741 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4742 "test/average-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4743 "test/average-pooling-operator-tester.h",
4744 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4745 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4746)
4747
4748xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4749 name = "bankers_rounding_nc_test",
4750 srcs = [
4751 "test/bankers-rounding-nc.cc",
4752 "test/bankers-rounding-operator-tester.h",
4753 ],
4754 deps = OPERATOR_TEST_DEPS,
4755)
4756
4757xnnpack_unit_test(
4758 name = "ceiling_nc_test",
4759 srcs = [
4760 "test/ceiling-nc.cc",
4761 "test/ceiling-operator-tester.h",
4762 ],
4763 deps = OPERATOR_TEST_DEPS,
4764)
4765
4766xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4767 name = "channel_shuffle_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4768 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4769 "test/channel-shuffle-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4770 "test/channel-shuffle-operator-tester.h",
4771 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4772 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4773)
4774
4775xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4776 name = "clamp_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4777 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4778 "test/clamp-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4779 "test/clamp-operator-tester.h",
4780 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4781 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4782)
4783
4784xnnpack_unit_test(
Marat Dukhan065b11e2020-05-22 09:49:41 -0700[diff] [blame]4785 name = "constant_pad_nd_test",
4786 srcs = [
4787 "test/constant-pad-nd.cc",
4788 "test/constant-pad-operator-tester.h",
4789 ],
4790 deps = OPERATOR_TEST_DEPS,
4791)
4792
4793xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4794 name = "convolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4795 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4796 "test/convolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4797 "test/convolution-operator-tester.h",
4798 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4799 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4800)
4801
4802xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4803 name = "convolution_nchw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4804 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4805 "test/convolution-nchw.cc",
4806 "test/convolution-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4807 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4808 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4809)
4810
4811xnnpack_unit_test(
Marat Dukhan4e21b272020-06-04 18:45:01 -0700[diff] [blame]4812 name = "copy_nc_test",
4813 srcs = [
4814 "test/copy-nc.cc",
4815 "test/copy-operator-tester.h",
4816 ],
4817 deps = OPERATOR_TEST_DEPS,
4818)
4819
4820xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4821 name = "deconvolution_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4822 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4823 "test/deconvolution-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4824 "test/deconvolution-operator-tester.h",
4825 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4826 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4827)
4828
4829xnnpack_unit_test(
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4830 name = "divide_nd_test",
4831 srcs = [
4832 "test/binary-elementwise-operator-tester.h",
4833 "test/divide-nd.cc",
4834 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4835 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69180502019-12-06 15:00:31 -0800[diff] [blame]4836)
4837
4838xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4839 name = "fully_connected_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4840 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4841 "test/fully-connected-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4842 "test/fully-connected-operator-tester.h",
4843 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4844 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4845)
4846
4847xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]4848 name = "floor_nc_test",
4849 srcs = [
4850 "test/floor-nc.cc",
4851 "test/floor-operator-tester.h",
4852 ],
4853 deps = OPERATOR_TEST_DEPS,
4854)
4855
4856xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4857 name = "global_average_pooling_nwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4858 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4859 "test/global-average-pooling-nwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4860 "test/global-average-pooling-operator-tester.h",
4861 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4862 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4863)
4864
4865xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4866 name = "global_average_pooling_ncw_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4867 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4868 "test/global-average-pooling-ncw.cc",
4869 "test/global-average-pooling-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4870 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4871 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4872)
4873
4874xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4875 name = "hardswish_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4876 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4877 "test/hardswish-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4878 "test/hardswish-operator-tester.h",
4879 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4880 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4881)
4882
4883xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4884 name = "leaky_relu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4885 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4886 "test/leaky-relu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4887 "test/leaky-relu-operator-tester.h",
4888 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4889 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4890)
4891
4892xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4893 name = "max_pooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4894 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4895 "test/max-pooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4896 "test/max-pooling-operator-tester.h",
4897 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4898 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4899)
4900
4901xnnpack_unit_test(
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4902 name = "maximum_nd_test",
4903 srcs = [
4904 "test/binary-elementwise-operator-tester.h",
4905 "test/maximum-nd.cc",
4906 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4907 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4908)
4909
4910xnnpack_unit_test(
4911 name = "minimum_nd_test",
4912 srcs = [
4913 "test/binary-elementwise-operator-tester.h",
4914 "test/minimum-nd.cc",
4915 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4916 deps = OPERATOR_TEST_DEPS,
Marat Dukhan79e7f842019-12-05 14:35:50 -0800[diff] [blame]4917)
4918
4919xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4920 name = "multiply_nd_test",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4921 srcs = [
Marat Dukhanb1a0fc32019-12-02 19:32:02 -0800[diff] [blame]4922 "test/binary-elementwise-operator-tester.h",
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4923 "test/multiply-nd.cc",
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4924 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4925 deps = OPERATOR_TEST_DEPS,
Marat Dukhanca2733c2019-11-15 23:21:17 -0800[diff] [blame]4926)
4927
4928xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4929 name = "negate_nc_test",
4930 srcs = [
4931 "test/negate-nc.cc",
4932 "test/negate-operator-tester.h",
4933 ],
4934 deps = OPERATOR_TEST_DEPS,
4935)
4936
4937xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4938 name = "prelu_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4939 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4940 "test/prelu-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4941 "test/prelu-operator-tester.h",
4942 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4943 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4944)
4945
4946xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4947 name = "resize_bilinear_nhwc_test",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4948 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4949 "test/resize-bilinear-nhwc.cc",
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4950 "test/resize-bilinear-operator-tester.h",
4951 ] + OPERATOR_TEST_PARAMS_HDRS,
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4952 deps = OPERATOR_TEST_DEPS,
Marat Dukhan69722492019-11-11 19:55:50 -0800[diff] [blame]4953)
4954
4955xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4956 name = "sigmoid_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4957 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]4958 "test/sigmoid-nc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4959 "test/sigmoid-operator-tester.h",
4960 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4961 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4962)
4963
4964xnnpack_unit_test(
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4965 name = "softmax_nc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4966 srcs = [
Marat Dukhanfd8e6892020-01-27 15:25:25 -0800[diff] [blame]4967 "test/softmax-nc.cc",
4968 "test/softmax-operator-tester.h",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4969 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4970 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]4971)
4972
4973xnnpack_unit_test(
Marat Dukhan5020b962020-06-08 13:30:10 -0700[diff] [blame]4974 name = "square_nc_test",
4975 srcs = [
4976 "test/square-nc.cc",
4977 "test/square-operator-tester.h",
4978 ],
4979 deps = OPERATOR_TEST_DEPS,
4980)
4981
4982xnnpack_unit_test(
Marat Dukhanf7399262020-06-05 10:58:44 -0700[diff] [blame]4983 name = "squared_difference_nd_test",
4984 srcs = [
4985 "test/binary-elementwise-operator-tester.h",
4986 "test/squared-difference-nd.cc",
4987 ],
4988 deps = OPERATOR_TEST_DEPS,
4989)
4990
4991xnnpack_unit_test(
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4992 name = "subtract_nd_test",
4993 srcs = [
4994 "test/binary-elementwise-operator-tester.h",
4995 "test/subtract-nd.cc",
4996 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]4997 deps = OPERATOR_TEST_DEPS,
Marat Dukhan05f3f6d2019-12-03 15:13:53 -0800[diff] [blame]4998)
4999
5000xnnpack_unit_test(
Marat Dukhan64e52512020-06-09 13:41:16 -0700[diff] [blame]5001 name = "truncation_nc_test",
5002 srcs = [
5003 "test/truncation-nc.cc",
5004 "test/truncation-operator-tester.h",
5005 ],
5006 deps = OPERATOR_TEST_DEPS,
5007)
5008
5009xnnpack_unit_test(
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5010 name = "unpooling_nhwc_test",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5011 srcs = [
Marat Dukhanefc47b82019-11-18 09:25:38 -0800[diff] [blame]5012 "test/unpooling-nhwc.cc",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5013 "test/unpooling-operator-tester.h",
5014 ],
Marat Dukhan1b354632020-03-23 12:50:22 -0700[diff] [blame]5015 deps = OPERATOR_TEST_DEPS,
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5016)
5017
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5018############################### Misc unit tests ###############################
5019
5020xnnpack_unit_test(
5021 name = "memory_planner_test",
5022 srcs = [
5023 "test/memory-planner-test.cc",
5024 ],
5025 deps = [
5026 ":XNNPACK",
5027 ":memory_planner",
5028 ],
5029)
5030
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5031############################# Build configurations #############################
5032
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5033# Enables usage of assembly kernels.
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5034config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5035 name = "xnn_enable_assembly_explicit_true",
5036 define_values = {"xnn_enable_assembly": "true"},
5037)
5038
5039# Disables usage of assembly kernels.
5040config_setting(
5041 name = "xnn_enable_assembly_explicit_false",
5042 define_values = {"xnn_enable_assembly": "false"},
5043)
5044
Marat Dukhan9de90e02020-06-18 16:04:12 -0700[diff] [blame]5045# Enables usage of sparse inference.
5046config_setting(
5047 name = "xnn_enable_sparse_explicit_true",
5048 define_values = {"xnn_enable_sparse": "true"},
5049)
5050
5051# Disables usage of sparse inference.
5052config_setting(
5053 name = "xnn_enable_sparse_explicit_false",
5054 define_values = {"xnn_enable_sparse": "false"},
5055)
5056
Marat Dukhan05702cf2020-03-26 15:41:33 -0700[diff] [blame]5057# Disables usage of HMP-aware optimizations.
5058config_setting(
5059 name = "xnn_enable_hmp_explicit_false",
5060 define_values = {"xnn_enable_hmp": "false"},
5061)
5062
Chao Mei6ddfc602020-05-13 22:29:36 -0700[diff] [blame]5063# Enable usage of optimized memory allocation
5064config_setting(
5065 name = "xnn_enable_memopt_explicit_true",
5066 define_values = {"xnnpack_enable_memopt": "true"},
5067)
5068
5069# Disable usage of optimized memory allocation
5070config_setting(
5071 name = "xnn_enable_memopt_explicit_false",
5072 define_values = {"xnnpack_enable_memopt": "false"},
5073)
5074
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5075# Builds with -c dbg
5076config_setting(
5077 name = "debug_build",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5078 values = {
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5079 "compilation_mode": "dbg",
5080 },
5081)
5082
5083# Builds with -c opt
5084config_setting(
5085 name = "optimized_build",
5086 values = {
5087 "compilation_mode": "opt",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5088 },
5089)
5090
5091config_setting(
Marat Dukhanb8642352019-10-30 15:43:02 -0700[diff] [blame]5092 name = "linux_k8",
5093 values = {"cpu": "k8"},
5094)
5095
5096config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5097 name = "linux_arm",
5098 values = {"cpu": "arm"},
Marat Dukhan4e45e662019-10-03 15:40:24 -0700[diff] [blame]5099)
5100
5101config_setting(
Marat Dukhanf0bd4de2020-06-15 15:53:19 -0700[diff] [blame]5102 name = "linux_armeabi",
5103 values = {"cpu": "armeabi"},
5104)
5105
5106config_setting(
Terry Heo68eef3f2020-04-13 22:53:52 -0700[diff] [blame]5107 name = "linux_armhf",
5108 values = {"cpu": "armhf"},
5109)
5110
5111config_setting(
Marat Dukhana720e932020-06-10 13:01:11 -0700[diff] [blame]5112 name = "linux_armv7a",
5113 values = {"cpu": "armv7a"},
5114)
5115
5116config_setting(
Marat Dukhan582094e2020-04-30 17:21:25 -0700[diff] [blame]5117 name = "linux_aarch64",
5118 values = {"cpu": "aarch64"},
5119)
5120
5121config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5122 name = "android",
5123 values = {"crosstool_top": "//external:android/crosstool"},
5124)
5125
5126config_setting(
5127 name = "android_armv7",
5128 values = {
5129 "crosstool_top": "//external:android/crosstool",
5130 "cpu": "armeabi-v7a",
5131 },
5132)
5133
5134config_setting(
5135 name = "android_arm64",
5136 values = {
5137 "crosstool_top": "//external:android/crosstool",
5138 "cpu": "arm64-v8a",
5139 },
5140)
5141
5142config_setting(
5143 name = "android_x86",
5144 values = {
5145 "crosstool_top": "//external:android/crosstool",
5146 "cpu": "x86",
5147 },
5148)
5149
5150config_setting(
5151 name = "android_x86_64",
5152 values = {
5153 "crosstool_top": "//external:android/crosstool",
5154 "cpu": "x86_64",
5155 },
5156)
5157
5158config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5159 name = "windows_x86_64",
5160 values = {"cpu": "x64_windows"},
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5161)
5162
5163config_setting(
Marat Dukhan10a38082020-04-17 03:58:35 -0700[diff] [blame]5164 name = "windows_x86_64_clang",
5165 values = {
5166 "compiler": "clang-cl",
5167 "cpu": "x64_windows",
5168 },
5169)
5170
5171config_setting(
5172 name = "windows_x86_64_mingw",
5173 values = {
5174 "compiler": "mingw-gcc",
5175 "cpu": "x64_windows",
5176 },
5177)
5178
5179config_setting(
5180 name = "windows_x86_64_msys",
5181 values = {
5182 "compiler": "msys-gcc",
5183 "cpu": "x64_windows",
5184 },
Marat Dukhan9fe932e2020-04-11 17:14:15 -0700[diff] [blame]5185)
5186
5187config_setting(
Marat Dukhan885ca242019-10-07 09:17:32 -0700[diff] [blame]5188 name = "macos_x86_64",
5189 values = {
5190 "apple_platform_type": "macos",
5191 "cpu": "darwin",
5192 },
5193)
5194
5195config_setting(
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5196 name = "emscripten",
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5197 values = {"crosstool_top": "//toolchain:emscripten"},
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5198)
5199
5200config_setting(
5201 name = "emscripten_wasm",
5202 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5203 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5204 "cpu": "wasm",
5205 },
5206)
5207
5208config_setting(
5209 name = "emscripten_wasmsimd",
5210 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5211 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5212 "cpu": "wasm",
Marat Dukhan81c62602020-05-29 13:22:49 -0700[diff] [blame]5213 "copt": "-msimd128",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5214 },
5215)
5216
5217config_setting(
5218 name = "emscripten_asmjs",
5219 values = {
Marat Dukhan1a729ec2019-10-07 09:31:44 -0700[diff] [blame]5220 "crosstool_top": "//toolchain:emscripten",
Marat Dukhan08c4a432019-10-03 09:29:21 -0700[diff] [blame]5221 "cpu": "asmjs",
5222 },
5223)
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5224
5225config_setting(
5226 name = "ios_armv7",
5227 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5228 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5229 "cpu": "ios_armv7",
5230 },
5231)
5232
5233config_setting(
5234 name = "ios_arm64",
5235 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5236 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5237 "cpu": "ios_arm64",
5238 },
5239)
5240
5241config_setting(
5242 name = "ios_arm64e",
5243 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5244 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5245 "cpu": "ios_arm64e",
5246 },
5247)
5248
5249config_setting(
5250 name = "ios_x86",
5251 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5252 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5253 "cpu": "ios_i386",
5254 },
5255)
5256
5257config_setting(
5258 name = "ios_x86_64",
5259 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5260 "apple_platform_type": "ios",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5261 "cpu": "ios_x86_64",
5262 },
5263)
5264
5265config_setting(
5266 name = "watchos_armv7k",
5267 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5268 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5269 "cpu": "watchos_armv7k",
5270 },
5271)
5272
5273config_setting(
5274 name = "watchos_arm64_32",
5275 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5276 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5277 "cpu": "watchos_arm64_32",
5278 },
5279)
5280
5281config_setting(
5282 name = "watchos_x86",
5283 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5284 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5285 "cpu": "watchos_i386",
5286 },
5287)
5288
5289config_setting(
5290 name = "watchos_x86_64",
5291 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5292 "apple_platform_type": "watchos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5293 "cpu": "watchos_x86_64",
5294 },
5295)
5296
5297config_setting(
5298 name = "tvos_arm64",
5299 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5300 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5301 "cpu": "tvos_arm64",
5302 },
5303)
5304
5305config_setting(
5306 name = "tvos_x86_64",
5307 values = {
Marat Dukhanf85fc332020-02-13 00:05:20 -0800[diff] [blame]5308 "apple_platform_type": "tvos",
Marat Dukhan1498d1d2020-02-11 20:00:05 -0800[diff] [blame]5309 "cpu": "tvos_x86_64",
5310 },
5311)