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gerrit-public.fairphone.software / platform / external / mesa3d / 7d72af4f09c0482661096797594287e6d7d5c1b2
  1. 61e99ce egl/android: add a note about .swap_buffers_with_damage by Emil Velikov · 7 years ago
  2. c7b65c3 wayland-drm: static inline wayland_drm_buffer_get by Emil Velikov · 7 years ago
  3. ba414db automake: intel: correctly append to the LIBADD variable by Emil Velikov · 7 years ago
  4. 6ef9482 configure: enable the OpenCL ICD by default by Emil Velikov · 7 years ago
  5. 0cd0958 targets/opencl: don't hardcode the icd file install to /etc/... by Emil Velikov · 7 years ago
  6. 01d91b3 amd: add amdgpu_asic_addr.h to the sources list by Emil Velikov · 7 years ago
  7. 5d61fa4 gallivm: Use new LLVM fast-math-flags API by Tobias Droste · 7 years ago
  8. d5a6411 glsl: add varying resources for arrays of complex types by Juan A. Suarez Romero · 7 years ago
  9. 36be8c2 st/glsl_to_nir: use nir_shader_gather_info() by Timothy Arceri · 7 years ago
  10. c980a3a st/glsl_to_nir: generate NIR earlier by Timothy Arceri · 7 years ago
  11. f6c0504 st/glsl_to_nir: delay adding built-in uniforms to Parameters list by Timothy Arceri · 7 years ago
  12. 7f33e94 amd/addrlib: update to latest version by Marek Olšák · 7 years ago
  13. 3bfcd31 braodcom/vc5: Flush the job when it grows over 1GB. by Eric Anholt · 7 years ago
  14. 50906e4 broadcom/vc5: Do 16-bit unpacking of integer texture returns properly. by Eric Anholt · 7 years ago
  15. 80da609 broadcom/vc5: Fix pausing of transform feedback. by Eric Anholt · 7 years ago
  16. 25d199f broadcom/vc5: Add support for GL_RASTERIZER_DISCARD by Eric Anholt · 7 years ago
  17. dfff9ce broadcom/vc5: Fix scheduling for a non-SFU R4 write after a dead R4 write. by Eric Anholt · 7 years ago
  18. 9ccb662 broadcom/vc5: Add partial transform feedback query support. by Eric Anholt · 7 years ago
  19. 4f33344 broadcom/vc5: Add occlusion query support. by Eric Anholt · 7 years ago
  20. d002950 intel/fs/nir: Return Q types from brw_reg_type_for_bit_size by Jason Ekstrand · 7 years ago
  21. dee58ec intel/fs/nir: Use Q immediates for load_const on gen8+ by Jason Ekstrand · 7 years ago
  22. 9bb3489 intel/fs/nir: Setup immediates based on type in i2b and f2b by Jason Ekstrand · 7 years ago
  23. 1cb210f intel/reg: Add helpers for 64-bit integer immediates by Jason Ekstrand · 7 years ago
  24. df81b81 compiler/nir_types: Handle vectors in glsl_get_array_element by Jason Ekstrand · 7 years ago
  25. ad77775 nir: Validate base types on array dereferences by Jason Ekstrand · 7 years ago
  26. ab9220e nir,intel/compiler: Use a fixed subgroup size by Jason Ekstrand · 7 years ago
  27. a026458 nir/lower_subgroups: Lower ballot intrinsics to the specified bit size by Jason Ekstrand · 7 years ago
  28. 8c2bf02 nir/builder: Add a nir_imm_intN_t helper by Jason Ekstrand · 7 years ago
  29. 9b35fab nir/lower_system_values: Lower SUBGROUP_*_MASK based on type by Jason Ekstrand · 7 years ago
  30. 3ee91ee nir: Make ballot intrinsics variable-size by Jason Ekstrand · 7 years ago
  31. ad127af nir: Add a ssa_dest_init_for_type helper by Jason Ekstrand · 7 years ago
  32. 28da82f nir: Add a new subgroups lowering pass by Jason Ekstrand · 7 years ago
  33. 1ca3a94 intel/fs: Don't use automatic exec size inference by Jason Ekstrand · 7 years ago
  34. dc4cf11 intel/fs: Explicitly set EXECUTE_1 where needed by Jason Ekstrand · 7 years ago
  35. ab37873 intel/eu: Explicitly set EXECUTE_1 where needed by Jason Ekstrand · 7 years ago
  36. 8280560 intel/eu: Make automatic exec sizes a configurable option by Jason Ekstrand · 7 years ago
  37. 7a82ad5 intel/fs: Rework zero-length URB write handling by Jason Ekstrand · 7 years ago
  38. 6132992 intel/compiler/fs: Set up subgroup invocation as a system value by Jason Ekstrand · 7 years ago
  39. 295605c intel/cs: Push subgroup ID instead of base thread ID by Jason Ekstrand · 7 years ago
  40. 6411def intel/cs: Re-run final NIR optimizations for each SIMD size by Jason Ekstrand · 7 years ago
  41. 4e79a77 intel/compiler: Move the destructor from vec4_visitor to backend_shader by Jason Ekstrand · 7 years ago
  42. 16ada41 i965/fs: Get rid of the early return in brw_compile_cs by Jason Ekstrand · 7 years ago
  43. 80ddfab intel/cs: Rework the way thread local ID is handled by Jason Ekstrand · 7 years ago
  44. 25f7453 intel/fs: Mark 64-bit values as being contiguous by Jason Ekstrand · 7 years ago
  45. c4c8cba intel/cs: Ignore runtime_check_aads_emit for CS by Jason Ekstrand · 7 years ago
  46. d4de813 intel/cs: Stop setting dispatch_grf_start_reg by Jason Ekstrand · 7 years ago
  47. b1a9cde intel/cs: Drop max_dispatch_width checks from compile_cs by Jason Ekstrand · 7 years ago
  48. 1077981 intel/fs: Remove min_dispatch_width from fs_visitor by Jason Ekstrand · 7 years ago
  49. b299ded intel/fs: use pull constant locations to check for first compile of a shader by Jason Ekstrand · 7 years ago
  50. 103081c intel/fs: Retype dest to match value in read[First]Invocation by Jason Ekstrand · 7 years ago
  51. ebaee9d intel/fs: Uniformize the index in readInvocation by Jason Ekstrand · 7 years ago
  52. b67230d intel/fs: Protect opt_algebraic from OOB BROADCAST indices by Jason Ekstrand · 7 years ago
  53. aa4ff4b i965/fs/nir: Don't stomp 64-bit values to D in get_nir_src by Jason Ekstrand · 7 years ago
  54. ec8c664 i965/fs/nir: Minor refactor of store_output by Jason Ekstrand · 7 years ago
  55. 030d2b5 i965/fs: Return a fs_reg from shuffle_64bit_data_for_32bit_write by Jason Ekstrand · 7 years ago
  56. 6197a6b i965/fs/nir: Simplify 64-bit store_output by Jason Ekstrand · 7 years ago
  57. 18fde36 intel/fs: Use the original destination region for int MUL lowering by Jason Ekstrand · 7 years ago
  58. d54f8ec intel/fs: Fix integer multiplication lowering for src/dst hazards by Jason Ekstrand · 7 years ago
  59. fd1bccc intel/fs: Fix MOV_INDIRECT for 64-bit values on little-core by Jason Ekstrand · 7 years ago
  60. 6041a31 intel/eu: Fix broadcast instruction for 64-bit values on little-core by Jason Ekstrand · 7 years ago
  61. 10e4fee intel/eu/reg: Add a subscript() helper by Jason Ekstrand · 7 years ago
  62. 068beb4 intel/eu: Just modify the offset in brw_broadcast by Jason Ekstrand · 7 years ago
  63. e3bcc86 intel/compiler: Add some restrictions to MOV_INDIRECT and BROADCAST by Jason Ekstrand · 7 years ago
  64. 1b8ef49 intel/fs: Use a pair of 1-wide MOVs instead of SEL for any/all by Jason Ekstrand · 7 years ago
  65. 1f41663 intel/fs: Use an explicit D type for vote any/all/eq intrinsics by Jason Ekstrand · 7 years ago
  66. 6c00240 intel/fs: Don't stomp f0.1 in SIMD16 ballot by Jason Ekstrand · 7 years ago
  67. def013a intel/fs: Use ANY/ALL32 predicates in SIMD32 by Jason Ekstrand · 7 years ago
  68. 0d90559 intel/fs: Be more explicit about our placement of [un]zip by Jason Ekstrand · 7 years ago
  69. fcd4adb intel/fs: Pass builders instead of blocks into emit_[un]zip by Jason Ekstrand · 7 years ago
  70. e8c9e65 intel/fs: Use a pure vertical stride for large register strides by Jason Ekstrand · 7 years ago
  71. bd24f48 broadcom/vc5: Skip emitting textures that aren't used. by Eric Anholt · 7 years ago
  72. 3d5e62d broadcom/vc5: Add missing SRGBA8 ETC2 support. by Eric Anholt · 7 years ago
  73. 6079f7c broadcom/vc5: Disable early Z test when the FS writes Z. by Eric Anholt · 7 years ago
  74. eeb9e80 broadcom/vc5: Shift the min/max lod fields by the BASE_LEVEL. by Eric Anholt · 7 years ago
  75. 521e1d0 broadcom/vc5: Add support for anisotropic filtering. by Eric Anholt · 7 years ago
  76. a266f78 broadcom/vc5: Fix mipmap filtering enums. by Eric Anholt · 7 years ago
  77. 73ec70b broadcom/vc5: Fix height padding of small UIF slices. by Eric Anholt · 7 years ago
  78. e23c699 broadcom/vc5: Print the actual offsets in HW for our resource layout debug. by Eric Anholt · 7 years ago
  79. 426c352 broadcom/vc5: Set the available VS outputs to match the FS inputs. by Eric Anholt · 7 years ago
  80. f179792 broadcom/vc5: Set the max texture LOD bias. by Eric Anholt · 7 years ago
  81. 47bd9da broadcom/vc5: Fix translation of stencil ops. by Eric Anholt · 7 years ago
  82. 3be8204 broadcom/vc5: Move stencil state packing to the CSO. by Eric Anholt · 7 years ago
  83. 3da39f2 broadcom/vc5: Introduce a helper for pre-packing our V3DXX structs. by Eric Anholt · 7 years ago
  84. 078b163 broadcom/vc5: Add a cl_emit() variant for merging with a pre-packed struct. by Eric Anholt · 7 years ago
  85. 735b844 broadcom/vc5: Skip emitting depth offset while disabled. by Eric Anholt · 7 years ago
  86. 386e936 broadcom/vc5: Don't emit stencil config if not doing stencil test. by Eric Anholt · 7 years ago
  87. f90ee6e broadcom/vc5: Don't emit updated blend factors/funcs while disabled. by Eric Anholt · 7 years ago
  88. dd429cb broadcom/vc5: Fix missing enum decode for indexed primitives. by Eric Anholt · 7 years ago
  89. bb6997e broadcom/vc5: Drop padding bits from the bottom of the TSDA address. by Eric Anholt · 7 years ago
  90. 949ac63 broadcom/vc5: Make sure the TMU indirect struct is appropriately aligned. by Eric Anholt · 7 years ago
  91. cb47de4 broadcom/genxml: Fix decoding of groups with small fields. by Kenneth Graunke · 7 years ago
  92. 47dac5d broadcom/vc5: Use DEPTH24_STENCIL8 for rendering to depth-only textures. by Eric Anholt · 7 years ago
  93. 3ea37d0 anv: Suffix anv-private 'VK' tokens with 'ANV' by Chad Versace · 7 years ago
  94. 012b54c anv: Remove unused variable 'gen' by Chad Versace · 7 years ago
  95. 33000e7 radeonsi: add si_screen::has_ls_vgpr_init_bug by Marek Olšák · 7 years ago
  96. cde664a radeonsi: use ac_create_target_machine by Marek Olšák · 7 years ago
  97. 81f81fd radeonsi: use ac_get_llvm_processor_name by Marek Olšák · 7 years ago
  98. c29f5fe radeonsi/gfx9: don't set gs_table_depth by Marek Olšák · 7 years ago
  99. e616743 radeonsi/gfx9: limit the scissor bug workaround to Vega10 and Raven only by Marek Olšák · 7 years ago
  100. 24e9004 radeonsi: remove unused field in the PCI ID table by Marek Olšák · 7 years ago