Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 1 | /* |
Daniele Castagna | 7a755de | 2016-12-16 17:32:30 -0500 | [diff] [blame] | 2 | * Copyright 2014 The Chromium OS Authors. All rights reserved. |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 3 | * Use of this source code is governed by a BSD-style license that can be |
| 4 | * found in the LICENSE file. |
| 5 | */ |
| 6 | |
Gurchetan Singh | 46faf6b | 2016-08-05 14:40:07 -0700 | [diff] [blame] | 7 | #ifdef DRV_I915 |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 8 | |
| 9 | #include <errno.h> |
Gurchetan Singh | 82a8eed | 2017-01-03 13:01:37 -0800 | [diff] [blame] | 10 | #include <i915_drm.h> |
Kristian H. Kristensen | 9c3fb32 | 2018-04-11 15:55:13 -0700 | [diff] [blame^] | 11 | #include <stdbool.h> |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 12 | #include <stdio.h> |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 13 | #include <string.h> |
Gurchetan Singh | ef92053 | 2016-08-12 16:38:25 -0700 | [diff] [blame] | 14 | #include <sys/mman.h> |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 15 | #include <xf86drm.h> |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 16 | |
Gurchetan Singh | 46faf6b | 2016-08-05 14:40:07 -0700 | [diff] [blame] | 17 | #include "drv_priv.h" |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 18 | #include "helpers.h" |
| 19 | #include "util.h" |
| 20 | |
Gurchetan Singh | 68af9c2 | 2017-01-18 13:48:11 -0800 | [diff] [blame] | 21 | #define I915_CACHELINE_SIZE 64 |
| 22 | #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1) |
| 23 | |
Gurchetan Singh | 29ed8d2 | 2017-10-31 10:39:43 -0700 | [diff] [blame] | 24 | static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB1555, |
| 25 | DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565, |
Daniele Castagna | 7a2df90 | 2017-10-18 16:15:44 -0400 | [diff] [blame] | 26 | DRM_FORMAT_XBGR2101010, DRM_FORMAT_XBGR8888, |
Gurchetan Singh | 29ed8d2 | 2017-10-31 10:39:43 -0700 | [diff] [blame] | 27 | DRM_FORMAT_XRGB1555, DRM_FORMAT_XRGB2101010, |
Gurchetan Singh | 8ac0c9a | 2017-05-15 09:34:22 -0700 | [diff] [blame] | 28 | DRM_FORMAT_XRGB8888 }; |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 29 | |
Tomasz Figa | b92e4f8 | 2017-06-22 16:52:43 +0900 | [diff] [blame] | 30 | static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8, |
| 31 | DRM_FORMAT_UYVY, DRM_FORMAT_YUYV }; |
Gurchetan Singh | 8ac0c9a | 2017-05-15 09:34:22 -0700 | [diff] [blame] | 32 | |
Tomasz Figa | b92e4f8 | 2017-06-22 16:52:43 +0900 | [diff] [blame] | 33 | static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID, |
| 34 | DRM_FORMAT_NV12 }; |
Gurchetan Singh | 179687e | 2016-10-28 10:07:35 -0700 | [diff] [blame] | 35 | |
Gurchetan Singh | 1b1d56a | 2017-03-10 16:25:23 -0800 | [diff] [blame] | 36 | struct i915_device { |
Gurchetan Singh | 68af9c2 | 2017-01-18 13:48:11 -0800 | [diff] [blame] | 37 | uint32_t gen; |
| 38 | int32_t has_llc; |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 39 | }; |
| 40 | |
Gurchetan Singh | 68af9c2 | 2017-01-18 13:48:11 -0800 | [diff] [blame] | 41 | static uint32_t i915_get_gen(int device_id) |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 42 | { |
Gurchetan Singh | 1b1d56a | 2017-03-10 16:25:23 -0800 | [diff] [blame] | 43 | const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE, |
| 44 | 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 }; |
Stéphane Marchesin | a39dfde | 2014-09-15 15:38:25 -0700 | [diff] [blame] | 45 | unsigned i; |
Gurchetan Singh | 1b1d56a | 2017-03-10 16:25:23 -0800 | [diff] [blame] | 46 | for (i = 0; i < ARRAY_SIZE(gen3_ids); i++) |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 47 | if (gen3_ids[i] == device_id) |
| 48 | return 3; |
| 49 | |
| 50 | return 4; |
| 51 | } |
| 52 | |
Kristian H. Kristensen | 9c3fb32 | 2018-04-11 15:55:13 -0700 | [diff] [blame^] | 53 | /* |
| 54 | * We allow allocation of ARGB formats for SCANOUT if the corresponding XRGB |
| 55 | * formats supports it. It's up to the caller (chrome ozone) to ultimately not |
| 56 | * scan out ARGB if the display controller only supports XRGB, but we'll allow |
| 57 | * the allocation of the bo here. |
| 58 | */ |
| 59 | static bool format_compatible(const struct combination *combo, uint32_t format) |
| 60 | { |
| 61 | if (combo->format == format) |
| 62 | return true; |
| 63 | |
| 64 | switch (format) { |
| 65 | case DRM_FORMAT_XRGB8888: |
| 66 | return combo->format == DRM_FORMAT_ARGB8888; |
| 67 | case DRM_FORMAT_XBGR8888: |
| 68 | return combo->format == DRM_FORMAT_ABGR8888; |
| 69 | case DRM_FORMAT_RGBX8888: |
| 70 | return combo->format == DRM_FORMAT_RGBA8888; |
| 71 | case DRM_FORMAT_BGRX8888: |
| 72 | return combo->format == DRM_FORMAT_BGRA8888; |
| 73 | default: |
| 74 | return false; |
| 75 | } |
| 76 | } |
| 77 | |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 78 | static int i915_add_kms_item(struct driver *drv, const struct kms_item *item) |
| 79 | { |
| 80 | uint32_t i; |
| 81 | struct combination *combo; |
| 82 | |
| 83 | /* |
| 84 | * Older hardware can't scanout Y-tiled formats. Newer devices can, and |
| 85 | * report this functionality via format modifiers. |
| 86 | */ |
Gurchetan Singh | bc9a87d | 2017-11-03 17:17:35 -0700 | [diff] [blame] | 87 | for (i = 0; i < drv_array_size(drv->combos); i++) { |
| 88 | combo = (struct combination *)drv_array_at_idx(drv->combos, i); |
Kristian H. Kristensen | 9c3fb32 | 2018-04-11 15:55:13 -0700 | [diff] [blame^] | 89 | if (!format_compatible(combo, item->format)) |
Tomasz Figa | e821cc2 | 2017-07-08 15:53:11 +0900 | [diff] [blame] | 90 | continue; |
| 91 | |
Gurchetan Singh | d118a0e | 2018-01-12 23:31:50 +0000 | [diff] [blame] | 92 | if (item->modifier == DRM_FORMAT_MOD_LINEAR && |
Tomasz Figa | e821cc2 | 2017-07-08 15:53:11 +0900 | [diff] [blame] | 93 | combo->metadata.tiling == I915_TILING_X) { |
| 94 | /* |
| 95 | * FIXME: drv_query_kms() does not report the available modifiers |
| 96 | * yet, but we know that all hardware can scanout from X-tiled |
| 97 | * buffers, so let's add this to our combinations, except for |
| 98 | * cursor, which must not be tiled. |
| 99 | */ |
Gurchetan Singh | a1892b2 | 2017-09-28 16:40:52 -0700 | [diff] [blame] | 100 | combo->use_flags |= item->use_flags & ~BO_USE_CURSOR; |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 101 | } |
Tomasz Figa | e821cc2 | 2017-07-08 15:53:11 +0900 | [diff] [blame] | 102 | |
| 103 | if (combo->metadata.modifier == item->modifier) |
Gurchetan Singh | a1892b2 | 2017-09-28 16:40:52 -0700 | [diff] [blame] | 104 | combo->use_flags |= item->use_flags; |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 105 | } |
| 106 | |
| 107 | return 0; |
| 108 | } |
| 109 | |
| 110 | static int i915_add_combinations(struct driver *drv) |
| 111 | { |
| 112 | int ret; |
Gurchetan Singh | bc9a87d | 2017-11-03 17:17:35 -0700 | [diff] [blame] | 113 | uint32_t i; |
| 114 | struct drv_array *kms_items; |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 115 | struct format_metadata metadata; |
Gurchetan Singh | a1892b2 | 2017-09-28 16:40:52 -0700 | [diff] [blame] | 116 | uint64_t render_use_flags, texture_use_flags; |
Gurchetan Singh | 8ac0c9a | 2017-05-15 09:34:22 -0700 | [diff] [blame] | 117 | |
Gurchetan Singh | a1892b2 | 2017-09-28 16:40:52 -0700 | [diff] [blame] | 118 | render_use_flags = BO_USE_RENDER_MASK; |
| 119 | texture_use_flags = BO_USE_TEXTURE_MASK; |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 120 | |
| 121 | metadata.tiling = I915_TILING_NONE; |
| 122 | metadata.priority = 1; |
Kristian H. Kristensen | bc8c593 | 2017-10-24 18:36:32 -0700 | [diff] [blame] | 123 | metadata.modifier = DRM_FORMAT_MOD_LINEAR; |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 124 | |
Gurchetan Singh | d300145 | 2017-11-03 17:18:36 -0700 | [diff] [blame] | 125 | drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), |
| 126 | &metadata, render_use_flags); |
Gurchetan Singh | 1b1d56a | 2017-03-10 16:25:23 -0800 | [diff] [blame] | 127 | |
Gurchetan Singh | d300145 | 2017-11-03 17:18:36 -0700 | [diff] [blame] | 128 | drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats), |
| 129 | &metadata, texture_use_flags); |
Gurchetan Singh | 8ac0c9a | 2017-05-15 09:34:22 -0700 | [diff] [blame] | 130 | |
Gurchetan Singh | d300145 | 2017-11-03 17:18:36 -0700 | [diff] [blame] | 131 | drv_add_combinations(drv, tileable_texture_source_formats, |
| 132 | ARRAY_SIZE(tileable_texture_source_formats), &metadata, |
| 133 | texture_use_flags); |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 134 | |
Gurchetan Singh | 1b1d56a | 2017-03-10 16:25:23 -0800 | [diff] [blame] | 135 | drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT); |
| 136 | drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT); |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 137 | |
Tomasz Figa | d30c0a5 | 2017-07-05 17:50:18 +0900 | [diff] [blame] | 138 | /* IPU3 camera ISP supports only NV12 output. */ |
| 139 | drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata, |
Tomasz Figa | fd0b016 | 2017-07-11 18:28:02 +0900 | [diff] [blame] | 140 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE); |
Tomasz Figa | d30c0a5 | 2017-07-05 17:50:18 +0900 | [diff] [blame] | 141 | /* |
| 142 | * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots |
| 143 | * from camera. |
| 144 | */ |
| 145 | drv_modify_combination(drv, DRM_FORMAT_R8, &metadata, |
Tomasz Figa | fd0b016 | 2017-07-11 18:28:02 +0900 | [diff] [blame] | 146 | BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE); |
Tomasz Figa | d30c0a5 | 2017-07-05 17:50:18 +0900 | [diff] [blame] | 147 | |
Gurchetan Singh | a1892b2 | 2017-09-28 16:40:52 -0700 | [diff] [blame] | 148 | render_use_flags &= ~BO_USE_RENDERSCRIPT; |
| 149 | render_use_flags &= ~BO_USE_SW_WRITE_OFTEN; |
| 150 | render_use_flags &= ~BO_USE_SW_READ_OFTEN; |
| 151 | render_use_flags &= ~BO_USE_LINEAR; |
Gurchetan Singh | 8ac0c9a | 2017-05-15 09:34:22 -0700 | [diff] [blame] | 152 | |
Gurchetan Singh | a1892b2 | 2017-09-28 16:40:52 -0700 | [diff] [blame] | 153 | texture_use_flags &= ~BO_USE_RENDERSCRIPT; |
| 154 | texture_use_flags &= ~BO_USE_SW_WRITE_OFTEN; |
| 155 | texture_use_flags &= ~BO_USE_SW_READ_OFTEN; |
| 156 | texture_use_flags &= ~BO_USE_LINEAR; |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 157 | |
| 158 | metadata.tiling = I915_TILING_X; |
| 159 | metadata.priority = 2; |
Tomasz Figa | e821cc2 | 2017-07-08 15:53:11 +0900 | [diff] [blame] | 160 | metadata.modifier = I915_FORMAT_MOD_X_TILED; |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 161 | |
Gurchetan Singh | d300145 | 2017-11-03 17:18:36 -0700 | [diff] [blame] | 162 | drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), |
| 163 | &metadata, render_use_flags); |
Gurchetan Singh | 8ac0c9a | 2017-05-15 09:34:22 -0700 | [diff] [blame] | 164 | |
Gurchetan Singh | d300145 | 2017-11-03 17:18:36 -0700 | [diff] [blame] | 165 | drv_add_combinations(drv, tileable_texture_source_formats, |
| 166 | ARRAY_SIZE(tileable_texture_source_formats), &metadata, |
| 167 | texture_use_flags); |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 168 | |
| 169 | metadata.tiling = I915_TILING_Y; |
| 170 | metadata.priority = 3; |
Tomasz Figa | e821cc2 | 2017-07-08 15:53:11 +0900 | [diff] [blame] | 171 | metadata.modifier = I915_FORMAT_MOD_Y_TILED; |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 172 | |
Gurchetan Singh | d300145 | 2017-11-03 17:18:36 -0700 | [diff] [blame] | 173 | drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), |
| 174 | &metadata, render_use_flags); |
Gurchetan Singh | 8ac0c9a | 2017-05-15 09:34:22 -0700 | [diff] [blame] | 175 | |
Gurchetan Singh | d300145 | 2017-11-03 17:18:36 -0700 | [diff] [blame] | 176 | drv_add_combinations(drv, tileable_texture_source_formats, |
| 177 | ARRAY_SIZE(tileable_texture_source_formats), &metadata, |
| 178 | texture_use_flags); |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 179 | |
Gurchetan Singh | bc9a87d | 2017-11-03 17:17:35 -0700 | [diff] [blame] | 180 | kms_items = drv_query_kms(drv); |
| 181 | if (!kms_items) |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 182 | return 0; |
| 183 | |
Gurchetan Singh | bc9a87d | 2017-11-03 17:17:35 -0700 | [diff] [blame] | 184 | for (i = 0; i < drv_array_size(kms_items); i++) { |
| 185 | ret = i915_add_kms_item(drv, (struct kms_item *)drv_array_at_idx(kms_items, i)); |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 186 | if (ret) { |
Gurchetan Singh | bc9a87d | 2017-11-03 17:17:35 -0700 | [diff] [blame] | 187 | drv_array_destroy(kms_items); |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 188 | return ret; |
| 189 | } |
| 190 | } |
| 191 | |
Gurchetan Singh | bc9a87d | 2017-11-03 17:17:35 -0700 | [diff] [blame] | 192 | drv_array_destroy(kms_items); |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 193 | return 0; |
| 194 | } |
| 195 | |
Gurchetan Singh | 1b1d56a | 2017-03-10 16:25:23 -0800 | [diff] [blame] | 196 | static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride, |
| 197 | uint32_t *aligned_height) |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 198 | { |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 199 | struct i915_device *i915 = bo->drv->priv; |
| 200 | uint32_t horizontal_alignment = 4; |
| 201 | uint32_t vertical_alignment = 4; |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 202 | |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 203 | switch (tiling) { |
Gurchetan Singh | d6fb577 | 2016-08-29 19:13:51 -0700 | [diff] [blame] | 204 | default: |
| 205 | case I915_TILING_NONE: |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 206 | horizontal_alignment = 64; |
Gurchetan Singh | d6fb577 | 2016-08-29 19:13:51 -0700 | [diff] [blame] | 207 | break; |
Stéphane Marchesin | 5d867a4 | 2014-11-24 17:09:49 -0800 | [diff] [blame] | 208 | |
Gurchetan Singh | d6fb577 | 2016-08-29 19:13:51 -0700 | [diff] [blame] | 209 | case I915_TILING_X: |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 210 | horizontal_alignment = 512; |
| 211 | vertical_alignment = 8; |
Gurchetan Singh | d6fb577 | 2016-08-29 19:13:51 -0700 | [diff] [blame] | 212 | break; |
| 213 | |
| 214 | case I915_TILING_Y: |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 215 | if (i915->gen == 3) { |
| 216 | horizontal_alignment = 512; |
| 217 | vertical_alignment = 8; |
Gurchetan Singh | 1b1d56a | 2017-03-10 16:25:23 -0800 | [diff] [blame] | 218 | } else { |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 219 | horizontal_alignment = 128; |
| 220 | vertical_alignment = 32; |
Gurchetan Singh | d6fb577 | 2016-08-29 19:13:51 -0700 | [diff] [blame] | 221 | } |
| 222 | break; |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 223 | } |
Stéphane Marchesin | 5d867a4 | 2014-11-24 17:09:49 -0800 | [diff] [blame] | 224 | |
Tomasz Figa | 33615a5 | 2017-07-29 15:37:58 +0900 | [diff] [blame] | 225 | /* |
| 226 | * The alignment calculated above is based on the full size luma plane and to have chroma |
| 227 | * planes properly aligned with subsampled formats, we need to multiply luma alignment by |
| 228 | * subsampling factor. |
| 229 | */ |
| 230 | switch (bo->format) { |
| 231 | case DRM_FORMAT_YVU420_ANDROID: |
| 232 | case DRM_FORMAT_YVU420: |
| 233 | horizontal_alignment *= 2; |
Gurchetan Singh | 7dcdff1 | 2017-09-14 13:04:11 -0700 | [diff] [blame] | 234 | /* Fall through */ |
Tomasz Figa | 33615a5 | 2017-07-29 15:37:58 +0900 | [diff] [blame] | 235 | case DRM_FORMAT_NV12: |
| 236 | vertical_alignment *= 2; |
| 237 | break; |
| 238 | } |
| 239 | |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 240 | *aligned_height = ALIGN(bo->height, vertical_alignment); |
| 241 | if (i915->gen > 3) { |
| 242 | *stride = ALIGN(*stride, horizontal_alignment); |
Stéphane Marchesin | 5d867a4 | 2014-11-24 17:09:49 -0800 | [diff] [blame] | 243 | } else { |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 244 | while (*stride > horizontal_alignment) |
| 245 | horizontal_alignment <<= 1; |
| 246 | |
| 247 | *stride = horizontal_alignment; |
Stéphane Marchesin | 5d867a4 | 2014-11-24 17:09:49 -0800 | [diff] [blame] | 248 | } |
Stéphane Marchesin | 5d867a4 | 2014-11-24 17:09:49 -0800 | [diff] [blame] | 249 | |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 250 | if (i915->gen <= 3 && *stride > 8192) |
| 251 | return -EINVAL; |
Stéphane Marchesin | 5d867a4 | 2014-11-24 17:09:49 -0800 | [diff] [blame] | 252 | |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 253 | return 0; |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 254 | } |
| 255 | |
Gurchetan Singh | 68af9c2 | 2017-01-18 13:48:11 -0800 | [diff] [blame] | 256 | static void i915_clflush(void *start, size_t size) |
| 257 | { |
| 258 | void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK); |
| 259 | void *end = (void *)((uintptr_t)start + size); |
| 260 | |
| 261 | __builtin_ia32_mfence(); |
| 262 | while (p < end) { |
| 263 | __builtin_ia32_clflush(p); |
| 264 | p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE); |
| 265 | } |
| 266 | } |
| 267 | |
Gurchetan Singh | 3eb8d8f | 2017-01-03 13:36:13 -0800 | [diff] [blame] | 268 | static int i915_init(struct driver *drv) |
| 269 | { |
Gurchetan Singh | 3eb8d8f | 2017-01-03 13:36:13 -0800 | [diff] [blame] | 270 | int ret; |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 271 | int device_id; |
| 272 | struct i915_device *i915; |
| 273 | drm_i915_getparam_t get_param; |
Gurchetan Singh | 3eb8d8f | 2017-01-03 13:36:13 -0800 | [diff] [blame] | 274 | |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 275 | i915 = calloc(1, sizeof(*i915)); |
| 276 | if (!i915) |
| 277 | return -ENOMEM; |
Gurchetan Singh | 3eb8d8f | 2017-01-03 13:36:13 -0800 | [diff] [blame] | 278 | |
| 279 | memset(&get_param, 0, sizeof(get_param)); |
| 280 | get_param.param = I915_PARAM_CHIPSET_ID; |
| 281 | get_param.value = &device_id; |
| 282 | ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param); |
| 283 | if (ret) { |
Alistair Strachan | 0cfaaa5 | 2018-03-19 14:03:23 -0700 | [diff] [blame] | 284 | drv_log("Failed to get I915_PARAM_CHIPSET_ID\n"); |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 285 | free(i915); |
Gurchetan Singh | 82a8eed | 2017-01-03 13:01:37 -0800 | [diff] [blame] | 286 | return -EINVAL; |
Gurchetan Singh | 3eb8d8f | 2017-01-03 13:36:13 -0800 | [diff] [blame] | 287 | } |
| 288 | |
Gurchetan Singh | 68af9c2 | 2017-01-18 13:48:11 -0800 | [diff] [blame] | 289 | i915->gen = i915_get_gen(device_id); |
| 290 | |
| 291 | memset(&get_param, 0, sizeof(get_param)); |
| 292 | get_param.param = I915_PARAM_HAS_LLC; |
| 293 | get_param.value = &i915->has_llc; |
| 294 | ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param); |
| 295 | if (ret) { |
Alistair Strachan | 0cfaaa5 | 2018-03-19 14:03:23 -0700 | [diff] [blame] | 296 | drv_log("Failed to get I915_PARAM_HAS_LLC\n"); |
Gurchetan Singh | 68af9c2 | 2017-01-18 13:48:11 -0800 | [diff] [blame] | 297 | free(i915); |
| 298 | return -EINVAL; |
| 299 | } |
| 300 | |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 301 | drv->priv = i915; |
Gurchetan Singh | 3eb8d8f | 2017-01-03 13:36:13 -0800 | [diff] [blame] | 302 | |
Gurchetan Singh | 6b41fb5 | 2017-03-01 20:14:39 -0800 | [diff] [blame] | 303 | return i915_add_combinations(drv); |
Gurchetan Singh | 3eb8d8f | 2017-01-03 13:36:13 -0800 | [diff] [blame] | 304 | } |
| 305 | |
Kristian H. Kristensen | 6061eab | 2017-10-03 13:53:19 -0700 | [diff] [blame] | 306 | static int i915_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t height, |
| 307 | uint32_t format, uint64_t modifier) |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 308 | { |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 309 | int ret; |
Gurchetan Singh | 82a8eed | 2017-01-03 13:01:37 -0800 | [diff] [blame] | 310 | size_t plane; |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 311 | uint32_t stride; |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 312 | struct drm_i915_gem_create gem_create; |
| 313 | struct drm_i915_gem_set_tiling gem_set_tiling; |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 314 | |
Kristian H. Kristensen | 6061eab | 2017-10-03 13:53:19 -0700 | [diff] [blame] | 315 | switch (modifier) { |
| 316 | case DRM_FORMAT_MOD_LINEAR: |
| 317 | bo->tiling = I915_TILING_NONE; |
| 318 | break; |
| 319 | case I915_FORMAT_MOD_X_TILED: |
| 320 | bo->tiling = I915_TILING_X; |
| 321 | break; |
| 322 | case I915_FORMAT_MOD_Y_TILED: |
| 323 | bo->tiling = I915_TILING_Y; |
| 324 | break; |
| 325 | } |
Owen Lin | bbb69fd | 2017-06-05 14:33:08 +0800 | [diff] [blame] | 326 | |
Kristian H. Kristensen | 2b8f89e | 2018-02-07 16:10:06 -0800 | [diff] [blame] | 327 | bo->format_modifiers[0] = modifier; |
| 328 | |
Owen Lin | bbb69fd | 2017-06-05 14:33:08 +0800 | [diff] [blame] | 329 | stride = drv_stride_from_format(format, width, 0); |
Gurchetan Singh | 507f5dd | 2017-03-16 13:14:30 -0700 | [diff] [blame] | 330 | |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 331 | ret = i915_align_dimensions(bo, bo->tiling, &stride, &height); |
Gurchetan Singh | 6423ecb | 2017-03-29 08:23:40 -0700 | [diff] [blame] | 332 | if (ret) |
| 333 | return ret; |
Stéphane Marchesin | 5d867a4 | 2014-11-24 17:09:49 -0800 | [diff] [blame] | 334 | |
Owen Lin | bbb69fd | 2017-06-05 14:33:08 +0800 | [diff] [blame] | 335 | /* |
Tomasz Figa | d846de6 | 2017-07-29 15:47:54 +0900 | [diff] [blame] | 336 | * HAL_PIXEL_FORMAT_YV12 requires the buffer height not be aligned, but we need to keep |
| 337 | * total size as with aligned height to ensure enough padding space after each plane to |
| 338 | * satisfy GPU alignment requirements. |
| 339 | * |
| 340 | * We do it by first calling drv_bo_from_format() with aligned height and |
| 341 | * DRM_FORMAT_YVU420, which allows height alignment, saving the total size it calculates |
| 342 | * and then calling it again with requested parameters. |
| 343 | * |
| 344 | * This relies on the fact that i965 driver uses separate surfaces for each plane and |
| 345 | * contents of padding bytes is not affected, as it is only used to satisfy GPU cache |
| 346 | * requests. |
| 347 | * |
| 348 | * This is enforced by Mesa in src/intel/isl/isl_gen8.c, inside |
| 349 | * isl_gen8_choose_image_alignment_el(), which is used for GEN9 and GEN8. |
Owen Lin | bbb69fd | 2017-06-05 14:33:08 +0800 | [diff] [blame] | 350 | */ |
Tomasz Figa | d846de6 | 2017-07-29 15:47:54 +0900 | [diff] [blame] | 351 | if (format == DRM_FORMAT_YVU420_ANDROID) { |
| 352 | uint32_t unaligned_height = bo->height; |
| 353 | size_t total_size; |
Owen Lin | bbb69fd | 2017-06-05 14:33:08 +0800 | [diff] [blame] | 354 | |
Tomasz Figa | d846de6 | 2017-07-29 15:47:54 +0900 | [diff] [blame] | 355 | drv_bo_from_format(bo, stride, height, DRM_FORMAT_YVU420); |
| 356 | total_size = bo->total_size; |
| 357 | drv_bo_from_format(bo, stride, unaligned_height, format); |
| 358 | bo->total_size = total_size; |
| 359 | } else { |
| 360 | drv_bo_from_format(bo, stride, height, format); |
| 361 | } |
Stéphane Marchesin | 5d867a4 | 2014-11-24 17:09:49 -0800 | [diff] [blame] | 362 | |
Tomasz Figa | 581f3a5 | 2017-07-23 15:02:19 +0900 | [diff] [blame] | 363 | /* |
| 364 | * Quoting Mesa ISL library: |
| 365 | * |
| 366 | * - For linear surfaces, additional padding of 64 bytes is required at |
| 367 | * the bottom of the surface. This is in addition to the padding |
| 368 | * required above. |
| 369 | */ |
| 370 | if (bo->tiling == I915_TILING_NONE) |
| 371 | bo->total_size += 64; |
| 372 | |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 373 | memset(&gem_create, 0, sizeof(gem_create)); |
| 374 | gem_create.size = bo->total_size; |
Stéphane Marchesin | 5d867a4 | 2014-11-24 17:09:49 -0800 | [diff] [blame] | 375 | |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 376 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create); |
| 377 | if (ret) { |
Alistair Strachan | 0cfaaa5 | 2018-03-19 14:03:23 -0700 | [diff] [blame] | 378 | drv_log("DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n", gem_create.size); |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 379 | return ret; |
Ilja H. Friedel | f9d2ab7 | 2015-04-09 14:08:36 -0700 | [diff] [blame] | 380 | } |
Gurchetan Singh | 83dc4fb | 2016-07-19 15:52:33 -0700 | [diff] [blame] | 381 | |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 382 | for (plane = 0; plane < bo->num_planes; plane++) |
| 383 | bo->handles[plane].u32 = gem_create.handle; |
Daniel Nicoara | 1de26dc | 2014-09-25 18:53:19 -0400 | [diff] [blame] | 384 | |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 385 | memset(&gem_set_tiling, 0, sizeof(gem_set_tiling)); |
| 386 | gem_set_tiling.handle = bo->handles[0].u32; |
| 387 | gem_set_tiling.tiling_mode = bo->tiling; |
| 388 | gem_set_tiling.stride = bo->strides[0]; |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 389 | |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 390 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling); |
| 391 | if (ret) { |
| 392 | struct drm_gem_close gem_close; |
| 393 | memset(&gem_close, 0, sizeof(gem_close)); |
| 394 | gem_close.handle = bo->handles[0].u32; |
| 395 | drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close); |
Gurchetan Singh | 82a8eed | 2017-01-03 13:01:37 -0800 | [diff] [blame] | 396 | |
Alistair Strachan | 0cfaaa5 | 2018-03-19 14:03:23 -0700 | [diff] [blame] | 397 | drv_log("DRM_IOCTL_I915_GEM_SET_TILING failed with %d\n", errno); |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 398 | return -errno; |
| 399 | } |
| 400 | |
| 401 | return 0; |
| 402 | } |
| 403 | |
Kristian H. Kristensen | 6061eab | 2017-10-03 13:53:19 -0700 | [diff] [blame] | 404 | static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, |
| 405 | uint64_t use_flags) |
| 406 | { |
| 407 | struct combination *combo; |
| 408 | |
| 409 | combo = drv_get_combination(bo->drv, format, use_flags); |
| 410 | if (!combo) |
| 411 | return -EINVAL; |
| 412 | |
| 413 | return i915_bo_create_for_modifier(bo, width, height, format, combo->metadata.modifier); |
| 414 | } |
| 415 | |
| 416 | static int i915_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height, |
| 417 | uint32_t format, const uint64_t *modifiers, uint32_t count) |
| 418 | { |
| 419 | static const uint64_t modifier_order[] = { |
Gurchetan Singh | ee43c30 | 2017-11-14 18:20:27 -0800 | [diff] [blame] | 420 | I915_FORMAT_MOD_Y_TILED, |
| 421 | I915_FORMAT_MOD_X_TILED, |
| 422 | DRM_FORMAT_MOD_LINEAR, |
Kristian H. Kristensen | 6061eab | 2017-10-03 13:53:19 -0700 | [diff] [blame] | 423 | }; |
| 424 | uint64_t modifier; |
| 425 | |
| 426 | modifier = drv_pick_modifier(modifiers, count, modifier_order, ARRAY_SIZE(modifier_order)); |
| 427 | |
Kristian H. Kristensen | 6061eab | 2017-10-03 13:53:19 -0700 | [diff] [blame] | 428 | return i915_bo_create_for_modifier(bo, width, height, format, modifier); |
| 429 | } |
| 430 | |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 431 | static void i915_close(struct driver *drv) |
Gurchetan Singh | 82a8eed | 2017-01-03 13:01:37 -0800 | [diff] [blame] | 432 | { |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 433 | free(drv->priv); |
| 434 | drv->priv = NULL; |
Gurchetan Singh | 82a8eed | 2017-01-03 13:01:37 -0800 | [diff] [blame] | 435 | } |
| 436 | |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 437 | static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data) |
| 438 | { |
| 439 | int ret; |
| 440 | struct drm_i915_gem_get_tiling gem_get_tiling; |
| 441 | |
| 442 | ret = drv_prime_bo_import(bo, data); |
| 443 | if (ret) |
| 444 | return ret; |
| 445 | |
| 446 | /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */ |
| 447 | memset(&gem_get_tiling, 0, sizeof(gem_get_tiling)); |
| 448 | gem_get_tiling.handle = bo->handles[0].u32; |
| 449 | |
| 450 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling); |
| 451 | if (ret) { |
Joe Kniss | 9e5d12a | 2017-06-29 11:54:22 -0700 | [diff] [blame] | 452 | drv_gem_bo_destroy(bo); |
Alistair Strachan | 0cfaaa5 | 2018-03-19 14:03:23 -0700 | [diff] [blame] | 453 | drv_log("DRM_IOCTL_I915_GEM_GET_TILING failed.\n"); |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 454 | return ret; |
| 455 | } |
| 456 | |
| 457 | bo->tiling = gem_get_tiling.tiling_mode; |
| 458 | return 0; |
| 459 | } |
| 460 | |
Gurchetan Singh | ee43c30 | 2017-11-14 18:20:27 -0800 | [diff] [blame] | 461 | static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags) |
Gurchetan Singh | ef92053 | 2016-08-12 16:38:25 -0700 | [diff] [blame] | 462 | { |
| 463 | int ret; |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 464 | void *addr; |
Gurchetan Singh | ef92053 | 2016-08-12 16:38:25 -0700 | [diff] [blame] | 465 | |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 466 | if (bo->tiling == I915_TILING_NONE) { |
| 467 | struct drm_i915_gem_mmap gem_map; |
| 468 | memset(&gem_map, 0, sizeof(gem_map)); |
Gurchetan Singh | ef92053 | 2016-08-12 16:38:25 -0700 | [diff] [blame] | 469 | |
Gurchetan Singh | a1892b2 | 2017-09-28 16:40:52 -0700 | [diff] [blame] | 470 | if ((bo->use_flags & BO_USE_SCANOUT) && !(bo->use_flags & BO_USE_RENDERSCRIPT)) |
Gurchetan Singh | 5af2023 | 2017-09-19 15:10:58 -0700 | [diff] [blame] | 471 | gem_map.flags = I915_MMAP_WC; |
| 472 | |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 473 | gem_map.handle = bo->handles[0].u32; |
| 474 | gem_map.offset = 0; |
| 475 | gem_map.size = bo->total_size; |
| 476 | |
| 477 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map); |
| 478 | if (ret) { |
Alistair Strachan | 0cfaaa5 | 2018-03-19 14:03:23 -0700 | [diff] [blame] | 479 | drv_log("DRM_IOCTL_I915_GEM_MMAP failed\n"); |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 480 | return MAP_FAILED; |
| 481 | } |
| 482 | |
| 483 | addr = (void *)(uintptr_t)gem_map.addr_ptr; |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 484 | } else { |
| 485 | struct drm_i915_gem_mmap_gtt gem_map; |
| 486 | memset(&gem_map, 0, sizeof(gem_map)); |
| 487 | |
| 488 | gem_map.handle = bo->handles[0].u32; |
| 489 | |
| 490 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map); |
| 491 | if (ret) { |
Alistair Strachan | 0cfaaa5 | 2018-03-19 14:03:23 -0700 | [diff] [blame] | 492 | drv_log("DRM_IOCTL_I915_GEM_MMAP_GTT failed\n"); |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 493 | return MAP_FAILED; |
| 494 | } |
| 495 | |
Gurchetan Singh | cfb8876 | 2017-09-28 17:14:50 -0700 | [diff] [blame] | 496 | addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd, |
| 497 | gem_map.offset); |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 498 | } |
| 499 | |
| 500 | if (addr == MAP_FAILED) { |
Alistair Strachan | 0cfaaa5 | 2018-03-19 14:03:23 -0700 | [diff] [blame] | 501 | drv_log("i915 GEM mmap failed\n"); |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 502 | return addr; |
| 503 | } |
| 504 | |
Gurchetan Singh | ee43c30 | 2017-11-14 18:20:27 -0800 | [diff] [blame] | 505 | vma->length = bo->total_size; |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 506 | return addr; |
| 507 | } |
Gurchetan Singh | 1a31e60 | 2016-10-06 10:58:00 -0700 | [diff] [blame] | 508 | |
Gurchetan Singh | 47e629b | 2017-11-02 14:07:18 -0700 | [diff] [blame] | 509 | static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping) |
Gurchetan Singh | 2d1877f | 2017-10-10 14:12:46 -0700 | [diff] [blame] | 510 | { |
| 511 | int ret; |
| 512 | struct drm_i915_gem_set_domain set_domain; |
| 513 | |
| 514 | memset(&set_domain, 0, sizeof(set_domain)); |
| 515 | set_domain.handle = bo->handles[0].u32; |
| 516 | if (bo->tiling == I915_TILING_NONE) { |
| 517 | set_domain.read_domains = I915_GEM_DOMAIN_CPU; |
Gurchetan Singh | 47e629b | 2017-11-02 14:07:18 -0700 | [diff] [blame] | 518 | if (mapping->vma->map_flags & BO_MAP_WRITE) |
Gurchetan Singh | 2d1877f | 2017-10-10 14:12:46 -0700 | [diff] [blame] | 519 | set_domain.write_domain = I915_GEM_DOMAIN_CPU; |
| 520 | } else { |
| 521 | set_domain.read_domains = I915_GEM_DOMAIN_GTT; |
Gurchetan Singh | 47e629b | 2017-11-02 14:07:18 -0700 | [diff] [blame] | 522 | if (mapping->vma->map_flags & BO_MAP_WRITE) |
Gurchetan Singh | 2d1877f | 2017-10-10 14:12:46 -0700 | [diff] [blame] | 523 | set_domain.write_domain = I915_GEM_DOMAIN_GTT; |
| 524 | } |
| 525 | |
| 526 | ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain); |
| 527 | if (ret) { |
Alistair Strachan | 0cfaaa5 | 2018-03-19 14:03:23 -0700 | [diff] [blame] | 528 | drv_log("DRM_IOCTL_I915_GEM_SET_DOMAIN with %d\n", ret); |
Gurchetan Singh | 2d1877f | 2017-10-10 14:12:46 -0700 | [diff] [blame] | 529 | return ret; |
| 530 | } |
| 531 | |
| 532 | return 0; |
| 533 | } |
| 534 | |
Gurchetan Singh | 47e629b | 2017-11-02 14:07:18 -0700 | [diff] [blame] | 535 | static int i915_bo_flush(struct bo *bo, struct mapping *mapping) |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 536 | { |
Gurchetan Singh | 68af9c2 | 2017-01-18 13:48:11 -0800 | [diff] [blame] | 537 | struct i915_device *i915 = bo->drv->priv; |
| 538 | if (!i915->has_llc && bo->tiling == I915_TILING_NONE) |
Gurchetan Singh | 47e629b | 2017-11-02 14:07:18 -0700 | [diff] [blame] | 539 | i915_clflush(mapping->vma->addr, mapping->vma->length); |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 540 | |
Gurchetan Singh | 8e02e05 | 2017-09-14 14:18:43 -0700 | [diff] [blame] | 541 | return 0; |
Gurchetan Singh | ef92053 | 2016-08-12 16:38:25 -0700 | [diff] [blame] | 542 | } |
| 543 | |
Gurchetan Singh | a1892b2 | 2017-09-28 16:40:52 -0700 | [diff] [blame] | 544 | static uint32_t i915_resolve_format(uint32_t format, uint64_t use_flags) |
Gurchetan Singh | bfba8c2 | 2016-08-16 17:57:10 -0700 | [diff] [blame] | 545 | { |
| 546 | switch (format) { |
Gurchetan Singh | f3b22da | 2016-11-21 10:46:38 -0800 | [diff] [blame] | 547 | case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED: |
Tomasz Figa | d30c0a5 | 2017-07-05 17:50:18 +0900 | [diff] [blame] | 548 | /* KBL camera subsystem requires NV12. */ |
Gurchetan Singh | a1892b2 | 2017-09-28 16:40:52 -0700 | [diff] [blame] | 549 | if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)) |
Tomasz Figa | d30c0a5 | 2017-07-05 17:50:18 +0900 | [diff] [blame] | 550 | return DRM_FORMAT_NV12; |
Gurchetan Singh | d6fb577 | 2016-08-29 19:13:51 -0700 | [diff] [blame] | 551 | /*HACK: See b/28671744 */ |
Gurchetan Singh | f3b22da | 2016-11-21 10:46:38 -0800 | [diff] [blame] | 552 | return DRM_FORMAT_XBGR8888; |
| 553 | case DRM_FORMAT_FLEX_YCbCr_420_888: |
Tomasz Figa | b92e4f8 | 2017-06-22 16:52:43 +0900 | [diff] [blame] | 554 | /* |
| 555 | * KBL camera subsystem requires NV12. Our other use cases |
| 556 | * don't care: |
| 557 | * - Hardware video supports NV12, |
| 558 | * - USB Camera HALv3 supports NV12, |
| 559 | * - USB Camera HALv1 doesn't use this format. |
| 560 | * Moreover, NV12 is preferred for video, due to overlay |
| 561 | * support on SKL+. |
| 562 | */ |
| 563 | return DRM_FORMAT_NV12; |
Gurchetan Singh | d6fb577 | 2016-08-29 19:13:51 -0700 | [diff] [blame] | 564 | default: |
| 565 | return format; |
Gurchetan Singh | bfba8c2 | 2016-08-16 17:57:10 -0700 | [diff] [blame] | 566 | } |
| 567 | } |
| 568 | |
Gurchetan Singh | 3e9d383 | 2017-10-31 10:36:25 -0700 | [diff] [blame] | 569 | const struct backend backend_i915 = { |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 570 | .name = "i915", |
Gurchetan Singh | d7c84fd | 2016-08-16 18:18:24 -0700 | [diff] [blame] | 571 | .init = i915_init, |
| 572 | .close = i915_close, |
| 573 | .bo_create = i915_bo_create, |
Kristian H. Kristensen | 6061eab | 2017-10-03 13:53:19 -0700 | [diff] [blame] | 574 | .bo_create_with_modifiers = i915_bo_create_with_modifiers, |
Gurchetan Singh | cc015e8 | 2017-01-17 16:15:25 -0800 | [diff] [blame] | 575 | .bo_destroy = drv_gem_bo_destroy, |
Gurchetan Singh | fcad5ad | 2017-01-05 20:39:31 -0800 | [diff] [blame] | 576 | .bo_import = i915_bo_import, |
Gurchetan Singh | d7c84fd | 2016-08-16 18:18:24 -0700 | [diff] [blame] | 577 | .bo_map = i915_bo_map, |
Gurchetan Singh | 8e02e05 | 2017-09-14 14:18:43 -0700 | [diff] [blame] | 578 | .bo_unmap = drv_bo_munmap, |
Gurchetan Singh | 2d1877f | 2017-10-10 14:12:46 -0700 | [diff] [blame] | 579 | .bo_invalidate = i915_bo_invalidate, |
Gurchetan Singh | 8e02e05 | 2017-09-14 14:18:43 -0700 | [diff] [blame] | 580 | .bo_flush = i915_bo_flush, |
Gurchetan Singh | bfba8c2 | 2016-08-16 17:57:10 -0700 | [diff] [blame] | 581 | .resolve_format = i915_resolve_format, |
Stéphane Marchesin | 25a2606 | 2014-09-12 16:18:59 -0700 | [diff] [blame] | 582 | }; |
| 583 | |
| 584 | #endif |