sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 1 | |
| 2 | /*---------------------------------------------------------------*/ |
| 3 | /*--- ---*/ |
sewardj | c0ee2ed | 2004-07-27 10:29:41 +0000 | [diff] [blame] | 4 | /*--- This file (main/vex_main.c) is ---*/ |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 5 | /*--- Copyright (c) 2004 OpenWorks LLP. All rights reserved. ---*/ |
| 6 | /*--- ---*/ |
| 7 | /*---------------------------------------------------------------*/ |
| 8 | |
sewardj | f8ed9d8 | 2004-11-12 17:40:23 +0000 | [diff] [blame] | 9 | /* |
| 10 | This file is part of LibVEX, a library for dynamic binary |
| 11 | instrumentation and translation. |
| 12 | |
| 13 | Copyright (C) 2004 OpenWorks, LLP. |
| 14 | |
| 15 | This program is free software; you can redistribute it and/or modify |
| 16 | it under the terms of the GNU General Public License as published by |
| 17 | the Free Software Foundation; Version 2 dated June 1991 of the |
| 18 | license. |
| 19 | |
| 20 | This program is distributed in the hope that it will be useful, |
| 21 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, or liability |
| 23 | for damages. See the GNU General Public License for more details. |
| 24 | |
| 25 | Neither the names of the U.S. Department of Energy nor the |
| 26 | University of California nor the names of its contributors may be |
| 27 | used to endorse or promote products derived from this software |
| 28 | without prior written permission. |
| 29 | |
| 30 | You should have received a copy of the GNU General Public License |
| 31 | along with this program; if not, write to the Free Software |
| 32 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 |
| 33 | USA. |
| 34 | */ |
| 35 | |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 36 | #include "libvex.h" |
sewardj | 81ec418 | 2004-10-25 23:15:52 +0000 | [diff] [blame] | 37 | #include "libvex_guest_x86.h" |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 38 | #include "libvex_guest_arm.h" |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 39 | |
sewardj | c0ee2ed | 2004-07-27 10:29:41 +0000 | [diff] [blame] | 40 | #include "main/vex_globals.h" |
| 41 | #include "main/vex_util.h" |
| 42 | #include "host-generic/h_generic_regs.h" |
sewardj | edf4d69 | 2004-08-17 13:52:58 +0000 | [diff] [blame] | 43 | #include "ir/iropt.h" |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 44 | |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 45 | #include "host-x86/hdefs.h" |
| 46 | |
| 47 | #include "guest-x86/gdefs.h" |
| 48 | #include "guest-arm/gdefs.h" |
| 49 | |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 50 | |
| 51 | /* This file contains the top level interface to the library. */ |
| 52 | |
| 53 | /* --------- Initialise the library. --------- */ |
| 54 | |
| 55 | /* Exported to library client. */ |
| 56 | |
sewardj | 0861374 | 2004-10-25 13:01:45 +0000 | [diff] [blame] | 57 | void LibVEX_default_VexControl ( /*OUT*/ VexControl* vcon ) |
| 58 | { |
| 59 | vcon->iropt_verbosity = 0; |
| 60 | vcon->iropt_level = 2; |
| 61 | vcon->iropt_precise_memory_exns = False; |
| 62 | vcon->iropt_unroll_thresh = 120; |
| 63 | vcon->guest_max_insns = 50; |
| 64 | vcon->guest_chase_thresh = 10; |
| 65 | } |
| 66 | |
| 67 | |
| 68 | /* Exported to library client. */ |
| 69 | |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 70 | void LibVEX_Init ( |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 71 | /* failure exit function */ |
sewardj | 2b51587 | 2004-07-05 20:50:45 +0000 | [diff] [blame] | 72 | __attribute__ ((noreturn)) |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 73 | void (*failure_exit) ( void ), |
| 74 | /* logging output function */ |
| 75 | void (*log_bytes) ( Char*, Int nbytes ), |
| 76 | /* debug paranoia level */ |
| 77 | Int debuglevel, |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 78 | /* Are we supporting valgrind checking? */ |
| 79 | Bool valgrind_support, |
sewardj | 0861374 | 2004-10-25 13:01:45 +0000 | [diff] [blame] | 80 | /* Control ... */ |
| 81 | /*READONLY*/VexControl* vcon |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 82 | ) |
| 83 | { |
sewardj | 0861374 | 2004-10-25 13:01:45 +0000 | [diff] [blame] | 84 | /* First off, do enough minimal setup so that the following |
| 85 | assertions can fail in a sane fashion, if need be. */ |
sewardj | ea602bc | 2004-10-14 21:40:12 +0000 | [diff] [blame] | 86 | vex_failure_exit = failure_exit; |
| 87 | vex_log_bytes = log_bytes; |
| 88 | |
| 89 | /* Now it's safe to check parameters for sanity. */ |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 90 | vassert(!vex_initdone); |
| 91 | vassert(failure_exit); |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 92 | vassert(log_bytes); |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 93 | vassert(debuglevel >= 0); |
sewardj | 0861374 | 2004-10-25 13:01:45 +0000 | [diff] [blame] | 94 | |
| 95 | vassert(vcon->iropt_verbosity >= 0); |
| 96 | vassert(vcon->iropt_level >= 0); |
| 97 | vassert(vcon->iropt_level <= 2); |
| 98 | vassert(vcon->iropt_unroll_thresh >= 0); |
| 99 | vassert(vcon->iropt_unroll_thresh <= 400); |
| 100 | vassert(vcon->guest_max_insns >= 1); |
| 101 | vassert(vcon->guest_max_insns <= 100); |
| 102 | vassert(vcon->guest_chase_thresh >= 0); |
| 103 | vassert(vcon->guest_chase_thresh < vcon->guest_max_insns); |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 104 | |
sewardj | 81ec418 | 2004-10-25 23:15:52 +0000 | [diff] [blame] | 105 | /* All the guest state structs must have an 8-aligned size. */ |
| 106 | vassert(0 == sizeof(VexGuestX86State) % 8); |
| 107 | |
sewardj | ea602bc | 2004-10-14 21:40:12 +0000 | [diff] [blame] | 108 | /* Check that Vex has been built with sizes of basic types as |
| 109 | stated in priv/libvex_basictypes.h. Failure of any of these is |
| 110 | a serious configuration error and should be corrected |
| 111 | immediately. If any of these assertions fail you can fully |
| 112 | expect Vex not to work properly, if at all. */ |
| 113 | |
| 114 | vassert(1 == sizeof(UChar)); |
| 115 | vassert(1 == sizeof(Char)); |
| 116 | vassert(2 == sizeof(UShort)); |
| 117 | vassert(2 == sizeof(Short)); |
| 118 | vassert(4 == sizeof(UInt)); |
| 119 | vassert(4 == sizeof(Int)); |
| 120 | vassert(8 == sizeof(ULong)); |
| 121 | vassert(8 == sizeof(Long)); |
| 122 | vassert(4 == sizeof(Float)); |
| 123 | vassert(8 == sizeof(Double)); |
| 124 | vassert(1 == sizeof(Bool)); |
| 125 | vassert(4 == sizeof(Addr32)); |
| 126 | vassert(8 == sizeof(Addr64)); |
| 127 | |
| 128 | vassert(sizeof(void*) == 4 || sizeof(void*) == 8); |
| 129 | vassert(sizeof(void*) == sizeof(int*)); |
| 130 | vassert(sizeof(void*) == sizeof(HWord)); |
| 131 | |
| 132 | /* Really start up .. */ |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 133 | vex_debuglevel = debuglevel; |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 134 | vex_valgrind_support = valgrind_support; |
sewardj | 0861374 | 2004-10-25 13:01:45 +0000 | [diff] [blame] | 135 | vex_control = *vcon; |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 136 | vex_initdone = True; |
| 137 | LibVEX_SetAllocMode ( AllocModeTEMPORARY ); |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 138 | } |
| 139 | |
| 140 | |
| 141 | /* --------- Make a translation. --------- */ |
| 142 | |
| 143 | /* Exported to library client. */ |
| 144 | |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 145 | TranslateResult LibVEX_Translate ( |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 146 | /* The instruction sets we are translating from and to. */ |
| 147 | InsnSet iset_guest, |
| 148 | InsnSet iset_host, |
| 149 | /* IN: the block to translate, and its guest address. */ |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 150 | UChar* guest_bytes, |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 151 | Addr64 guest_bytes_addr, |
sewardj | 5bd4d16 | 2004-11-10 13:02:48 +0000 | [diff] [blame] | 152 | Bool (*chase_into_ok) ( Addr64 ), |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 153 | /* OUT: the number of bytes actually read */ |
| 154 | Int* guest_bytes_read, |
| 155 | /* IN: a place to put the resulting code, and its size */ |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 156 | UChar* host_bytes, |
| 157 | Int host_bytes_size, |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 158 | /* OUT: how much of the output area is used. */ |
| 159 | Int* host_bytes_used, |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 160 | /* IN: optionally, two instrumentation functions. */ |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 161 | IRBB* (*instrument1) ( IRBB*, VexGuestLayout*, IRType hWordTy ), |
| 162 | IRBB* (*instrument2) ( IRBB*, VexGuestLayout*, IRType hWordTy ), |
sewardj | 9578a8b | 2004-11-04 19:44:48 +0000 | [diff] [blame] | 163 | Bool cleanup_after_instrumentation, |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 164 | /* IN: optionally, an access check function for guest code. */ |
sewardj | 58800ff | 2004-07-28 01:51:10 +0000 | [diff] [blame] | 165 | Bool (*byte_accessible) ( Addr64 ), |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 166 | /* IN: debug: trace vex activity at various points */ |
| 167 | Int traceflags |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 168 | ) |
| 169 | { |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 170 | /* This the bundle of functions we need to do the back-end stuff |
| 171 | (insn selection, reg-alloc, assembly) whilst being insulated |
| 172 | from the target instruction set. */ |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 173 | HReg* available_real_regs; |
| 174 | Int n_available_real_regs; |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 175 | Bool (*isMove) (HInstr*, HReg*, HReg*); |
| 176 | void (*getRegUsage) (HRegUsage*, HInstr*); |
| 177 | void (*mapRegs) (HRegRemap*, HInstr*); |
| 178 | HInstr* (*genSpill) ( HReg, Int ); |
| 179 | HInstr* (*genReload) ( HReg, Int ); |
| 180 | void (*ppInstr) ( HInstr* ); |
| 181 | void (*ppReg) ( HReg ); |
sewardj | 8ea867b | 2004-10-30 19:03:02 +0000 | [diff] [blame] | 182 | HInstrArray* (*iselBB) ( IRBB* ); |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 183 | IRBB* (*bbToIR) ( UChar*, Addr64, Int*, |
sewardj | 5bd4d16 | 2004-11-10 13:02:48 +0000 | [diff] [blame] | 184 | Bool(*)(Addr64), |
| 185 | Bool(*)(Addr64), Bool ); |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 186 | Int (*emit) ( UChar*, Int, HInstr* ); |
sewardj | 84ff065 | 2004-08-23 16:16:08 +0000 | [diff] [blame] | 187 | IRExpr* (*specHelper) ( Char*, IRExpr** ); |
sewardj | 8d2291c | 2004-10-25 14:50:21 +0000 | [diff] [blame] | 188 | Bool (*preciseMemExnsFn) ( Int, Int ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 189 | |
sewardj | eeac841 | 2004-11-02 00:26:55 +0000 | [diff] [blame] | 190 | VexGuestLayout* guest_layout; |
| 191 | Bool host_is_bigendian = False; |
| 192 | IRBB* irbb; |
| 193 | HInstrArray* vcode; |
| 194 | HInstrArray* rcode; |
| 195 | Int i, j, k, out_used, guest_sizeB; |
| 196 | UChar insn_bytes[32]; |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 197 | IRType guest_word_type; |
| 198 | IRType host_word_type; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 199 | |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 200 | guest_layout = NULL; |
sewardj | 36ca513 | 2004-07-24 13:12:23 +0000 | [diff] [blame] | 201 | available_real_regs = NULL; |
| 202 | n_available_real_regs = 0; |
| 203 | isMove = NULL; |
| 204 | getRegUsage = NULL; |
| 205 | mapRegs = NULL; |
| 206 | genSpill = NULL; |
| 207 | genReload = NULL; |
| 208 | ppInstr = NULL; |
| 209 | ppReg = NULL; |
| 210 | iselBB = NULL; |
| 211 | bbToIR = NULL; |
| 212 | emit = NULL; |
sewardj | 84ff065 | 2004-08-23 16:16:08 +0000 | [diff] [blame] | 213 | specHelper = NULL; |
sewardj | 8d2291c | 2004-10-25 14:50:21 +0000 | [diff] [blame] | 214 | preciseMemExnsFn = NULL; |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 215 | guest_word_type = Ity_INVALID; |
| 216 | host_word_type = Ity_INVALID; |
sewardj | 36ca513 | 2004-07-24 13:12:23 +0000 | [diff] [blame] | 217 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 218 | vex_traceflags = traceflags; |
sewardj | 58800ff | 2004-07-28 01:51:10 +0000 | [diff] [blame] | 219 | |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 220 | vassert(vex_initdone); |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 221 | LibVEX_ClearTemporary(False); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 222 | |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 223 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 224 | /* First off, check that the guest and host insn sets |
| 225 | are supported. */ |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 226 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 227 | switch (iset_host) { |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 228 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 229 | case InsnSetX86: |
| 230 | getAllocableRegs_X86 ( &n_available_real_regs, |
| 231 | &available_real_regs ); |
| 232 | isMove = (Bool(*)(HInstr*,HReg*,HReg*)) isMove_X86Instr; |
| 233 | getRegUsage = (void(*)(HRegUsage*,HInstr*)) getRegUsage_X86Instr; |
| 234 | mapRegs = (void(*)(HRegRemap*,HInstr*)) mapRegs_X86Instr; |
| 235 | genSpill = (HInstr*(*)(HReg,Int)) genSpill_X86; |
| 236 | genReload = (HInstr*(*)(HReg,Int)) genReload_X86; |
sewardj | 2b51587 | 2004-07-05 20:50:45 +0000 | [diff] [blame] | 237 | ppInstr = (void(*)(HInstr*)) ppX86Instr; |
| 238 | ppReg = (void(*)(HReg)) ppHRegX86; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 239 | iselBB = iselBB_X86; |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 240 | emit = (Int(*)(UChar*,Int,HInstr*)) emit_X86Instr; |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 241 | host_is_bigendian = False; |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 242 | host_word_type = Ity_I32; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 243 | break; |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 244 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 245 | default: |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 246 | vpanic("LibVEX_Translate: unsupported target insn set"); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 247 | } |
| 248 | |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 249 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 250 | switch (iset_guest) { |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 251 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 252 | case InsnSetX86: |
sewardj | 8d2291c | 2004-10-25 14:50:21 +0000 | [diff] [blame] | 253 | preciseMemExnsFn = guest_x86_state_requires_precise_mem_exns; |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 254 | bbToIR = bbToIR_X86; |
| 255 | specHelper = guest_x86_spechelper; |
sewardj | 81ec418 | 2004-10-25 23:15:52 +0000 | [diff] [blame] | 256 | guest_sizeB = sizeof(VexGuestX86State); |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 257 | guest_word_type = Ity_I32; |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 258 | guest_layout = &x86guest_layout; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 259 | break; |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 260 | |
| 261 | case InsnSetARM: |
| 262 | preciseMemExnsFn = guest_arm_state_requires_precise_mem_exns; |
| 263 | bbToIR = NULL; /*bbToIR_ARM;*/ |
| 264 | specHelper = guest_arm_spechelper; |
| 265 | guest_sizeB = sizeof(VexGuestARMState); |
| 266 | guest_word_type = Ity_I32; |
| 267 | guest_layout = &armGuest_layout; |
| 268 | break; |
| 269 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 270 | default: |
sewardj | 887a11a | 2004-07-05 17:26:47 +0000 | [diff] [blame] | 271 | vpanic("LibVEX_Translate: unsupported guest insn set"); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 272 | } |
| 273 | |
sewardj | 2a9ad02 | 2004-11-25 02:46:58 +0000 | [diff] [blame^] | 274 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 275 | if (vex_traceflags & VEX_TRACE_FE) |
| 276 | vex_printf("\n------------------------" |
| 277 | " Front end " |
| 278 | "------------------------\n\n"); |
| 279 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 280 | irbb = bbToIR ( guest_bytes, |
| 281 | guest_bytes_addr, |
| 282 | guest_bytes_read, |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 283 | byte_accessible, |
sewardj | 5bd4d16 | 2004-11-10 13:02:48 +0000 | [diff] [blame] | 284 | chase_into_ok, |
sewardj | c9a6570 | 2004-07-07 16:32:57 +0000 | [diff] [blame] | 285 | host_is_bigendian ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 286 | |
| 287 | if (irbb == NULL) { |
| 288 | /* Access failure. */ |
sewardj | 443cd9d | 2004-07-18 23:06:45 +0000 | [diff] [blame] | 289 | LibVEX_ClearTemporary(False); |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 290 | vex_traceflags = 0; |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 291 | return TransAccessFail; |
| 292 | } |
sewardj | aa59f94 | 2004-10-09 09:34:36 +0000 | [diff] [blame] | 293 | |
| 294 | /* If debugging, show the raw guest bytes for this bb. */ |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 295 | if (vex_traceflags & VEX_TRACE_FE) { |
sewardj | aa59f94 | 2004-10-09 09:34:36 +0000 | [diff] [blame] | 296 | UChar* p = guest_bytes; |
sewardj | aa59f94 | 2004-10-09 09:34:36 +0000 | [diff] [blame] | 297 | vex_printf(". 0 %llx %d\n.", guest_bytes_addr, *guest_bytes_read ); |
| 298 | for (i = 0; i < *guest_bytes_read; i++) |
| 299 | vex_printf(" %02x", (Int)p[i] ); |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 300 | vex_printf("\n\n"); |
sewardj | aa59f94 | 2004-10-09 09:34:36 +0000 | [diff] [blame] | 301 | } |
| 302 | |
| 303 | /* Sanity check the initial IR. */ |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 304 | sanityCheckIRBB(irbb, guest_word_type); |
sewardj | e8e9d73 | 2004-07-16 21:03:45 +0000 | [diff] [blame] | 305 | |
sewardj | edf4d69 | 2004-08-17 13:52:58 +0000 | [diff] [blame] | 306 | /* Clean it up, hopefully a lot. */ |
sewardj | 8d2291c | 2004-10-25 14:50:21 +0000 | [diff] [blame] | 307 | irbb = do_iropt_BB ( irbb, specHelper, preciseMemExnsFn, |
| 308 | guest_bytes_addr ); |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 309 | sanityCheckIRBB(irbb, guest_word_type); |
sewardj | edf4d69 | 2004-08-17 13:52:58 +0000 | [diff] [blame] | 310 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 311 | if (vex_traceflags & VEX_TRACE_OPT1) { |
| 312 | vex_printf("\n------------------------" |
| 313 | " After pre-instr IR optimisation " |
| 314 | "------------------------\n\n"); |
sewardj | edf4d69 | 2004-08-17 13:52:58 +0000 | [diff] [blame] | 315 | ppIRBB ( irbb ); |
| 316 | vex_printf("\n"); |
| 317 | } |
| 318 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 319 | /* Get the thing instrumented. */ |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 320 | if (instrument1) |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 321 | irbb = (*instrument1)(irbb, guest_layout, host_word_type); |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 322 | if (instrument2) |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 323 | irbb = (*instrument2)(irbb, guest_layout, host_word_type); |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 324 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 325 | if (vex_traceflags & VEX_TRACE_INST) { |
| 326 | vex_printf("\n------------------------" |
| 327 | " After instrumentation " |
| 328 | "------------------------\n\n"); |
| 329 | ppIRBB ( irbb ); |
| 330 | vex_printf("\n"); |
| 331 | } |
| 332 | |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 333 | if (instrument1 || instrument2) |
sewardj | cf78790 | 2004-11-03 09:08:33 +0000 | [diff] [blame] | 334 | sanityCheckIRBB(irbb, guest_word_type); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 335 | |
sewardj | 9578a8b | 2004-11-04 19:44:48 +0000 | [diff] [blame] | 336 | /* Do a post-instrumentation cleanup pass. */ |
| 337 | if (cleanup_after_instrumentation) { |
| 338 | do_deadcode_BB( irbb ); |
| 339 | irbb = cprop_BB( irbb ); |
| 340 | do_deadcode_BB( irbb ); |
| 341 | sanityCheckIRBB(irbb, guest_word_type); |
| 342 | } |
| 343 | |
| 344 | if (vex_traceflags & VEX_TRACE_OPT2) { |
| 345 | vex_printf("\n------------------------" |
| 346 | " After post-instr IR optimisation " |
| 347 | "------------------------\n\n"); |
| 348 | ppIRBB ( irbb ); |
| 349 | vex_printf("\n"); |
| 350 | } |
| 351 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 352 | /* Turn it into virtual-registerised code. */ |
sewardj | 49651f4 | 2004-10-28 22:11:04 +0000 | [diff] [blame] | 353 | do_deadcode_BB( irbb ); |
| 354 | do_treebuild_BB( irbb ); |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 355 | |
| 356 | if (vex_traceflags & VEX_TRACE_TREES) { |
| 357 | vex_printf("\n------------------------" |
| 358 | " After tree-building " |
| 359 | "------------------------\n\n"); |
| 360 | ppIRBB ( irbb ); |
| 361 | vex_printf("\n"); |
| 362 | } |
| 363 | |
| 364 | if (vex_traceflags & VEX_TRACE_VCODE) |
| 365 | vex_printf("\n------------------------" |
| 366 | " Instruction selection " |
| 367 | "------------------------\n"); |
| 368 | |
sewardj | 8ea867b | 2004-10-30 19:03:02 +0000 | [diff] [blame] | 369 | vcode = iselBB ( irbb ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 370 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 371 | if (vex_traceflags & VEX_TRACE_VCODE) |
| 372 | vex_printf("\n"); |
| 373 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 374 | if (vex_traceflags & VEX_TRACE_VCODE) { |
sewardj | 1f40a0a | 2004-07-21 12:28:07 +0000 | [diff] [blame] | 375 | for (i = 0; i < vcode->arr_used; i++) { |
| 376 | vex_printf("%3d ", i); |
| 377 | ppInstr(vcode->arr[i]); |
| 378 | vex_printf("\n"); |
| 379 | } |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame] | 380 | vex_printf("\n"); |
| 381 | } |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame] | 382 | |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 383 | /* Register allocate. */ |
| 384 | rcode = doRegisterAllocation ( vcode, available_real_regs, |
| 385 | n_available_real_regs, |
| 386 | isMove, getRegUsage, mapRegs, |
sewardj | 81ec418 | 2004-10-25 23:15:52 +0000 | [diff] [blame] | 387 | genSpill, genReload, guest_sizeB, |
sewardj | 2b51587 | 2004-07-05 20:50:45 +0000 | [diff] [blame] | 388 | ppInstr, ppReg ); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 389 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 390 | if (vex_traceflags & VEX_TRACE_RCODE) { |
| 391 | vex_printf("\n------------------------" |
| 392 | " Register-allocated code " |
| 393 | "------------------------\n\n"); |
sewardj | 1f40a0a | 2004-07-21 12:28:07 +0000 | [diff] [blame] | 394 | for (i = 0; i < rcode->arr_used; i++) { |
| 395 | vex_printf("%3d ", i); |
| 396 | ppInstr(rcode->arr[i]); |
| 397 | vex_printf("\n"); |
| 398 | } |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame] | 399 | vex_printf("\n"); |
| 400 | } |
sewardj | fbcaf33 | 2004-07-08 01:46:01 +0000 | [diff] [blame] | 401 | |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 402 | /* Assemble */ |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 403 | if (vex_traceflags & VEX_TRACE_ASM) { |
| 404 | vex_printf("\n------------------------" |
| 405 | " Assembly " |
| 406 | "------------------------\n\n"); |
| 407 | } |
| 408 | |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 409 | out_used = 0; /* tracks along the host_bytes array */ |
| 410 | for (i = 0; i < rcode->arr_used; i++) { |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 411 | if (vex_traceflags & VEX_TRACE_ASM) { |
sewardj | bad34a9 | 2004-07-22 01:14:11 +0000 | [diff] [blame] | 412 | ppInstr(rcode->arr[i]); |
| 413 | vex_printf("\n"); |
| 414 | } |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 415 | j = (*emit)( insn_bytes, 32, rcode->arr[i] ); |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 416 | if (vex_traceflags & VEX_TRACE_ASM) { |
sewardj | bad34a9 | 2004-07-22 01:14:11 +0000 | [diff] [blame] | 417 | for (k = 0; k < j; k++) |
sewardj | 86898e8 | 2004-07-22 17:26:12 +0000 | [diff] [blame] | 418 | if (insn_bytes[k] < 16) |
| 419 | vex_printf("0%x ", (UInt)insn_bytes[k]); |
| 420 | else |
| 421 | vex_printf("%x ", (UInt)insn_bytes[k]); |
sewardj | bad34a9 | 2004-07-22 01:14:11 +0000 | [diff] [blame] | 422 | vex_printf("\n\n"); |
| 423 | } |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 424 | if (out_used + j > host_bytes_size) { |
| 425 | LibVEX_ClearTemporary(False); |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 426 | vex_traceflags = 0; |
sewardj | 81bd550 | 2004-07-21 18:49:27 +0000 | [diff] [blame] | 427 | return TransOutputFull; |
| 428 | } |
| 429 | for (k = 0; k < j; k++) { |
| 430 | host_bytes[out_used] = insn_bytes[k]; |
| 431 | out_used++; |
| 432 | } |
| 433 | vassert(out_used <= host_bytes_size); |
| 434 | } |
| 435 | *host_bytes_used = out_used; |
| 436 | |
sewardj | 1f40a0a | 2004-07-21 12:28:07 +0000 | [diff] [blame] | 437 | LibVEX_ClearTemporary(False); |
sewardj | f13a16a | 2004-07-05 17:10:14 +0000 | [diff] [blame] | 438 | |
sewardj | f48ac19 | 2004-10-29 00:41:29 +0000 | [diff] [blame] | 439 | vex_traceflags = 0; |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 440 | return TransOK; |
| 441 | } |
| 442 | |
| 443 | |
| 444 | |
| 445 | /*---------------------------------------------------------------*/ |
sewardj | c0ee2ed | 2004-07-27 10:29:41 +0000 | [diff] [blame] | 446 | /*--- end main/vex_main.c ---*/ |
sewardj | 35421a3 | 2004-07-05 13:12:34 +0000 | [diff] [blame] | 447 | /*---------------------------------------------------------------*/ |