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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
37#include "libvex_guest_s390x.h" /* VexGuestS390XState */
38#include "libvex.h" /* needed for bb_to_IR.h */
39#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */
florian933065d2011-07-11 01:48:02 +000040#include "libvex_s390x_common.h"
sewardj2019a972011-03-07 16:04:07 +000041#include "main_util.h" /* vassert */
42#include "main_globals.h" /* vex_traceflags */
43#include "guest_generic_bb_to_IR.h" /* DisResult */
44#include "guest_s390_defs.h" /* prototypes for this file's functions */
45#include "host_s390_disasm.h"
46#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
47
sewardj2019a972011-03-07 16:04:07 +000048
49/*------------------------------------------------------------*/
florianb4df7682011-07-05 02:09:01 +000050/*--- Forward declarations ---*/
51/*------------------------------------------------------------*/
52static UInt s390_decode_and_irgen(UChar *, UInt, DisResult *);
53
54
55/*------------------------------------------------------------*/
sewardj2019a972011-03-07 16:04:07 +000056/*--- Globals ---*/
57/*------------------------------------------------------------*/
58
59/* The IRSB* into which we're generating code. */
60static IRSB *irsb;
61
62/* The guest address for the instruction currently being
63 translated. */
64static Addr64 guest_IA_curr_instr;
65
66/* The guest address for the instruction following the current instruction. */
67static Addr64 guest_IA_next_instr;
68
69/* Result of disassembly step. */
70static DisResult *dis_res;
71
floriana64c2432011-07-16 02:11:50 +000072/* Resteer function and callback data */
73static Bool (*resteer_fn)(void *, Addr64);
74static void *resteer_data;
75
sewardj2019a972011-03-07 16:04:07 +000076/* The last seen execute target instruction */
77ULong last_execute_target;
78
79/* The possible outcomes of a decoding operation */
80typedef enum {
81 S390_DECODE_OK,
82 S390_DECODE_UNKNOWN_INSN,
83 S390_DECODE_UNIMPLEMENTED_INSN,
84 S390_DECODE_UNKNOWN_SPECIAL_INSN,
85 S390_DECODE_ERROR
86} s390_decode_t;
87
88/*------------------------------------------------------------*/
89/*--- Helpers for constructing IR. ---*/
90/*------------------------------------------------------------*/
91
92/* Sign extend a value with the given number of bits. This is a
93 macro because it allows us to overload the type of the value.
94 Note that VALUE must have a signed type! */
95#undef sign_extend
96#define sign_extend(value,num_bits) \
97(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
98 (sizeof(__typeof__(value)) * 8 - (num_bits)))
99
100
101/* Add a statement to the current irsb. */
102static __inline__ void
103stmt(IRStmt *st)
104{
105 addStmtToIRSB(irsb, st);
106}
107
108/* Allocate a new temporary of the given type. */
109static __inline__ IRTemp
110newTemp(IRType type)
111{
112 vassert(isPlausibleIRType(type));
113
114 return newIRTemp(irsb->tyenv, type);
115}
116
117/* Create an expression node for a temporary */
118static __inline__ IRExpr *
119mkexpr(IRTemp tmp)
120{
121 return IRExpr_RdTmp(tmp);
122}
123
124/* Add a statement that assigns to a temporary */
125static __inline__ void
126assign(IRTemp dst, IRExpr *expr)
127{
128 stmt(IRStmt_WrTmp(dst, expr));
129}
130
131/* Create a temporary of the given type and assign the expression to it */
132static __inline__ IRTemp
133mktemp(IRType type, IRExpr *expr)
134{
135 IRTemp temp = newTemp(type);
136
137 assign(temp, expr);
138
139 return temp;
140}
141
142/* Create a unary expression */
143static __inline__ IRExpr *
144unop(IROp kind, IRExpr *op)
145{
146 return IRExpr_Unop(kind, op);
147}
148
149/* Create a binary expression */
150static __inline__ IRExpr *
151binop(IROp kind, IRExpr *op1, IRExpr *op2)
152{
153 return IRExpr_Binop(kind, op1, op2);
154}
155
156/* Create a ternary expression */
157static __inline__ IRExpr *
158triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
159{
160 return IRExpr_Triop(kind, op1, op2, op3);
161}
162
163/* Create a quaternary expression */
164static __inline__ IRExpr *
165qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
166{
167 return IRExpr_Qop(kind, op1, op2, op3, op4);
168}
169
170/* Create an expression node for an 8-bit integer constant */
171static __inline__ IRExpr *
172mkU8(UInt value)
173{
174 vassert(value < 256);
175
176 return IRExpr_Const(IRConst_U8((UChar)value));
177}
178
179/* Create an expression node for a 16-bit integer constant */
180static __inline__ IRExpr *
181mkU16(UInt value)
182{
183 vassert(value < 65536);
184
185 return IRExpr_Const(IRConst_U16((UShort)value));
186}
187
188/* Create an expression node for a 32-bit integer constant */
189static __inline__ IRExpr *
190mkU32(UInt value)
191{
192 return IRExpr_Const(IRConst_U32(value));
193}
194
195/* Create an expression node for a 64-bit integer constant */
196static __inline__ IRExpr *
197mkU64(ULong value)
198{
199 return IRExpr_Const(IRConst_U64(value));
200}
201
202/* Create an expression node for a 32-bit floating point constant
203 whose value is given by a bit pattern. */
204static __inline__ IRExpr *
205mkF32i(UInt value)
206{
207 return IRExpr_Const(IRConst_F32i(value));
208}
209
210/* Create an expression node for a 32-bit floating point constant
211 whose value is given by a bit pattern. */
212static __inline__ IRExpr *
213mkF64i(ULong value)
214{
215 return IRExpr_Const(IRConst_F64i(value));
216}
217
218/* Little helper function for my sanity. ITE = if-then-else */
219static IRExpr *
220mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
221{
222 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
223
224 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
225}
226
227/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
228static void __inline__
229store(IRExpr *addr, IRExpr *data)
230{
231 stmt(IRStmt_Store(Iend_BE, addr, data));
232}
233
234/* Create an expression that loads a TYPE sized value from ADDR.
235 This is a big-endian machine. */
236static __inline__ IRExpr *
237load(IRType type, IRExpr *addr)
238{
239 return IRExpr_Load(Iend_BE, type, addr);
240}
241
242/* Function call */
243static void
244call_function(IRExpr *callee_address)
245{
246 irsb->next = callee_address;
247 irsb->jumpkind = Ijk_Call;
248
249 dis_res->whatNext = Dis_StopHere;
250}
251
floriana64c2432011-07-16 02:11:50 +0000252/* Function call with known target. */
253static void
254call_function_and_chase(Addr64 callee_address)
255{
256 if (resteer_fn(resteer_data, callee_address)) {
257 dis_res->whatNext = Dis_ResteerU;
258 dis_res->continueAt = callee_address;
259 } else {
260 irsb->next = mkU64(callee_address);
261 irsb->jumpkind = Ijk_Call;
262 dis_res->whatNext = Dis_StopHere;
263 }
264}
265
sewardj2019a972011-03-07 16:04:07 +0000266/* Function return sequence */
267static void
268return_from_function(IRExpr *return_address)
269{
270 irsb->next = return_address;
271 irsb->jumpkind = Ijk_Ret;
272
273 dis_res->whatNext = Dis_StopHere;
274}
275
276/* A conditional branch whose target is not known at instrumentation time.
277
278 if (condition) goto computed_target;
279
280 Needs to be represented as:
281
282 if (! condition) goto next_instruction;
283 goto computed_target;
284
285 This inversion is being handled at code generation time. So we just
286 take the condition here as is.
287*/
288static void
289if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
290{
291 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
292
293 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
294
295 irsb->next = target;
296 irsb->jumpkind = Ijk_Boring;
297
298 dis_res->whatNext = Dis_StopHere;
299}
300
301/* A conditional branch whose target is known at instrumentation time. */
302static void
303if_condition_goto(IRExpr *condition, Addr64 target)
304{
305 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
306
307 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
308 dis_res->whatNext = Dis_Continue;
309}
310
311/* An unconditional branch. Target may or may not be known at instrumentation
312 time. */
313static void
314always_goto(IRExpr *target)
315{
316 irsb->next = target;
317 irsb->jumpkind = Ijk_Boring;
318
319 dis_res->whatNext = Dis_StopHere;
320}
321
floriana64c2432011-07-16 02:11:50 +0000322/* An unconditional branch to a known target. */
323static void
324always_goto_and_chase(Addr64 target)
325{
326 if (resteer_fn(resteer_data, target)) {
327 dis_res->whatNext = Dis_ResteerU;
328 dis_res->continueAt = target;
329 } else {
330 irsb->next = mkU64(target);
331 irsb->jumpkind = Ijk_Boring;
332 dis_res->whatNext = Dis_StopHere;
333 }
334}
335
sewardj2019a972011-03-07 16:04:07 +0000336/* A system call */
337static void
338system_call(IRExpr *sysno)
339{
340 /* Store the system call number in the pseudo register. */
341 stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
342
sewardj69007022011-04-28 20:13:45 +0000343 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
sewardj2019a972011-03-07 16:04:07 +0000344 stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
345
346 /* It's important that all ArchRegs carry their up-to-date value
347 at this point. So we declare an end-of-block here, which
348 forces any TempRegs caching ArchRegs to be flushed. */
349 irsb->next = mkU64(guest_IA_next_instr);
350
351 irsb->jumpkind = Ijk_Sys_syscall;
352
353 dis_res->whatNext = Dis_StopHere;
354}
355
356/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
357 instructions to VEX's IRRoundingMode. */
358static IRRoundingMode
359encode_rounding_mode(UChar mode)
360{
361 switch (mode) {
362 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
363 case S390_ROUND_ZERO: return Irrm_ZERO;
364 case S390_ROUND_POSINF: return Irrm_PosINF;
365 case S390_ROUND_NEGINF: return Irrm_NegINF;
366 }
367 vpanic("encode_rounding_mode");
368}
369
370static __inline__ IRExpr *get_fpr_dw0(UInt);
371static __inline__ void put_fpr_dw0(UInt, IRExpr *);
372
373/* Read a floating point register pair and combine their contents into a
374 128-bit value */
375static IRExpr *
376get_fpr_pair(UInt archreg)
377{
378 IRExpr *high = get_fpr_dw0(archreg);
379 IRExpr *low = get_fpr_dw0(archreg + 2);
380
381 return binop(Iop_F64HLtoF128, high, low);
382}
383
384/* Write a 128-bit floating point value into a register pair. */
385static void
386put_fpr_pair(UInt archreg, IRExpr *expr)
387{
388 IRExpr *high = unop(Iop_F128HItoF64, expr);
389 IRExpr *low = unop(Iop_F128LOtoF64, expr);
390
391 put_fpr_dw0(archreg, high);
392 put_fpr_dw0(archreg + 2, low);
393}
394
395
396/* Flags thunk offsets */
floriane88b3c92011-07-05 02:48:39 +0000397#define S390X_GUEST_OFFSET_CC_OP S390X_GUEST_OFFSET(guest_CC_OP)
398#define S390X_GUEST_OFFSET_CC_DEP1 S390X_GUEST_OFFSET(guest_CC_DEP1)
399#define S390X_GUEST_OFFSET_CC_DEP2 S390X_GUEST_OFFSET(guest_CC_DEP2)
400#define S390X_GUEST_OFFSET_CC_NDEP S390X_GUEST_OFFSET(guest_CC_NDEP)
sewardj2019a972011-03-07 16:04:07 +0000401
402/*------------------------------------------------------------*/
403/*--- Build the flags thunk. ---*/
404/*------------------------------------------------------------*/
405
406/* Completely fill the flags thunk. We're always filling all fields.
407 Apparently, that is better for redundant PUT elimination. */
408static void
409s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
410{
411 UInt op_off, dep1_off, dep2_off, ndep_off;
412
413 op_off = S390X_GUEST_OFFSET_CC_OP;
414 dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
415 dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
416 ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
417
418 stmt(IRStmt_Put(op_off, op));
419 stmt(IRStmt_Put(dep1_off, dep1));
420 stmt(IRStmt_Put(dep2_off, dep2));
421 stmt(IRStmt_Put(ndep_off, ndep));
422}
423
424
425/* Create an expression for V and widen the result to 64 bit. */
426static IRExpr *
427s390_cc_widen(IRTemp v, Bool sign_extend)
428{
429 IRExpr *expr;
430
431 expr = mkexpr(v);
432
433 switch (typeOfIRTemp(irsb->tyenv, v)) {
434 case Ity_I64:
435 break;
436 case Ity_I32:
437 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
438 break;
439 case Ity_I16:
440 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
441 break;
442 case Ity_I8:
443 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
444 break;
445 default:
446 vpanic("s390_cc_widen");
447 }
448
449 return expr;
450}
451
452static void
453s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
454{
455 IRExpr *op, *dep1, *dep2, *ndep;
456
457 op = mkU64(opc);
458 dep1 = s390_cc_widen(d1, sign_extend);
459 dep2 = mkU64(0);
460 ndep = mkU64(0);
461
462 s390_cc_thunk_fill(op, dep1, dep2, ndep);
463}
464
465
466static void
467s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
468{
469 IRExpr *op, *dep1, *dep2, *ndep;
470
471 op = mkU64(opc);
472 dep1 = s390_cc_widen(d1, sign_extend);
473 dep2 = s390_cc_widen(d2, sign_extend);
474 ndep = mkU64(0);
475
476 s390_cc_thunk_fill(op, dep1, dep2, ndep);
477}
478
479
480/* memcheck believes that the NDEP field in the flags thunk is always
481 defined. But for some flag computations (e.g. add with carry) that is
482 just not true. We therefore need to convey to memcheck that the value
483 of the ndep field does matter and therefore we make the DEP2 field
484 depend on it:
485
486 DEP2 = original_DEP2 ^ NDEP
487
488 In s390_calculate_cc we exploit that (a^b)^b == a
489 I.e. we xor the DEP2 value with the NDEP value to recover the
490 original_DEP2 value. */
491static void
492s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
493{
494 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
495
496 op = mkU64(opc);
497 dep1 = s390_cc_widen(d1, sign_extend);
498 dep2 = s390_cc_widen(d2, sign_extend);
499 ndep = s390_cc_widen(nd, sign_extend);
500
501 dep2x = binop(Iop_Xor64, dep2, ndep);
502
503 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
504}
505
506
507/* Write one floating point value into the flags thunk */
508static void
509s390_cc_thunk_put1f(UInt opc, IRTemp d1)
510{
511 IRExpr *op, *dep1, *dep2, *ndep;
512
513 op = mkU64(opc);
514 dep1 = mkexpr(d1);
515 dep2 = mkU64(0);
516 ndep = mkU64(0);
517
518 s390_cc_thunk_fill(op, dep1, dep2, ndep);
519}
520
521
522/* Write a floating point value and an integer into the flags thunk. The
523 integer value is zero-extended first. */
524static void
525s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
526{
527 IRExpr *op, *dep1, *dep2, *ndep;
528
529 op = mkU64(opc);
530 dep1 = mkexpr(d1);
531 dep2 = s390_cc_widen(d2, False);
532 ndep = mkU64(0);
533
534 s390_cc_thunk_fill(op, dep1, dep2, ndep);
535}
536
537
538/* Write a 128-bit floating point value into the flags thunk. This is
539 done by splitting the value into two 64-bits values. */
540static void
541s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
542{
543 IRExpr *op, *hi, *lo, *ndep;
544
545 op = mkU64(opc);
546 hi = unop(Iop_F128HItoF64, mkexpr(d1));
547 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
548 ndep = mkU64(0);
549
550 s390_cc_thunk_fill(op, hi, lo, ndep);
551}
552
553
554/* Write a 128-bit floating point value and an integer into the flags thunk.
555 The integer value is zero-extended first. */
556static void
557s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
558{
559 IRExpr *op, *hi, *lo, *lox, *ndep;
560
561 op = mkU64(opc);
562 hi = unop(Iop_F128HItoF64, mkexpr(d1));
563 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
564 ndep = s390_cc_widen(nd, False);
565
566 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
567
568 s390_cc_thunk_fill(op, hi, lox, ndep);
569}
570
571
572static void
573s390_cc_set(UInt val)
574{
575 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
576 mkU64(val), mkU64(0), mkU64(0));
577}
578
579/* Build IR to calculate the condition code from flags thunk.
580 Returns an expression of type Ity_I32 */
581static IRExpr *
582s390_call_calculate_cc(void)
583{
584 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
585
586 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
587 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
588 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
589 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
590
591 args = mkIRExprVec_4(op, dep1, dep2, ndep);
592 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
593 "s390_calculate_cc", &s390_calculate_cc, args);
594
595 /* Exclude OP and NDEP from definedness checking. We're only
596 interested in DEP1 and DEP2. */
597 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
598
599 return call;
600}
601
602/* Build IR to calculate the internal condition code for a "compare and branch"
603 insn. Returns an expression of type Ity_I32 */
604static IRExpr *
605s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
606{
607 IRExpr **args, *call, *op, *dep1, *dep2;
608
609 op = mkU64(opc);
610 dep1 = s390_cc_widen(op1, sign_extend);
611 dep2 = s390_cc_widen(op2, sign_extend);
612
613 args = mkIRExprVec_3(op, dep1, dep2);
614 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
615 "s390_calculate_icc", &s390_calculate_icc, args);
616
617 /* Exclude OP from definedness checking. We're only
618 interested in DEP1 and DEP2. */
619 call->Iex.CCall.cee->mcx_mask = (1<<0);
620
621 return call;
622}
623
624/* Build IR to calculate the condition code from flags thunk.
625 Returns an expression of type Ity_I32 */
626static IRExpr *
627s390_call_calculate_cond(UInt m)
628{
629 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
630
631 mask = mkU64(m);
632 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
633 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
634 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
635 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
636
637 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
638 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
639 "s390_calculate_cond", &s390_calculate_cond, args);
640
641 /* Exclude the requested condition, OP and NDEP from definedness
642 checking. We're only interested in DEP1 and DEP2. */
643 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
644
645 return call;
646}
647
648#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
649#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
650#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
651#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
652#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
653#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
654#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
655 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
656#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
657 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
658#define s390_call_calculate_iccZZ(op,dep1,dep2) \
659 s390_call_calculate_icc(op,dep1,dep2,False)
660#define s390_call_calculate_iccSS(op,dep1,dep2) \
661 s390_call_calculate_icc(op,dep1,dep2,True)
662
663
floriane88b3c92011-07-05 02:48:39 +0000664#define OFFB_TISTART S390X_GUEST_OFFSET(guest_TISTART)
665#define OFFB_TILEN S390X_GUEST_OFFSET(guest_TILEN)
sewardj2019a972011-03-07 16:04:07 +0000666
667
668/*------------------------------------------------------------*/
669/*--- Guest register access ---*/
670/*------------------------------------------------------------*/
671
672
673/*------------------------------------------------------------*/
674/*--- ar registers ---*/
675/*------------------------------------------------------------*/
676
677/* Return the guest state offset of a ar register. */
678static UInt
679ar_offset(UInt archreg)
680{
681 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000682 S390X_GUEST_OFFSET(guest_a0),
683 S390X_GUEST_OFFSET(guest_a1),
684 S390X_GUEST_OFFSET(guest_a2),
685 S390X_GUEST_OFFSET(guest_a3),
686 S390X_GUEST_OFFSET(guest_a4),
687 S390X_GUEST_OFFSET(guest_a5),
688 S390X_GUEST_OFFSET(guest_a6),
689 S390X_GUEST_OFFSET(guest_a7),
690 S390X_GUEST_OFFSET(guest_a8),
691 S390X_GUEST_OFFSET(guest_a9),
692 S390X_GUEST_OFFSET(guest_a10),
693 S390X_GUEST_OFFSET(guest_a11),
694 S390X_GUEST_OFFSET(guest_a12),
695 S390X_GUEST_OFFSET(guest_a13),
696 S390X_GUEST_OFFSET(guest_a14),
697 S390X_GUEST_OFFSET(guest_a15),
sewardj2019a972011-03-07 16:04:07 +0000698 };
699
700 vassert(archreg < 16);
701
702 return offset[archreg];
703}
704
705
706/* Return the guest state offset of word #0 of a ar register. */
707static __inline__ UInt
708ar_w0_offset(UInt archreg)
709{
710 return ar_offset(archreg) + 0;
711}
712
713/* Write word #0 of a ar to the guest state. */
714static __inline__ void
715put_ar_w0(UInt archreg, IRExpr *expr)
716{
717 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
718
719 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
720}
721
722/* Read word #0 of a ar register. */
723static __inline__ IRExpr *
724get_ar_w0(UInt archreg)
725{
726 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
727}
728
729
730/*------------------------------------------------------------*/
731/*--- fpr registers ---*/
732/*------------------------------------------------------------*/
733
734/* Return the guest state offset of a fpr register. */
735static UInt
736fpr_offset(UInt archreg)
737{
738 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000739 S390X_GUEST_OFFSET(guest_f0),
740 S390X_GUEST_OFFSET(guest_f1),
741 S390X_GUEST_OFFSET(guest_f2),
742 S390X_GUEST_OFFSET(guest_f3),
743 S390X_GUEST_OFFSET(guest_f4),
744 S390X_GUEST_OFFSET(guest_f5),
745 S390X_GUEST_OFFSET(guest_f6),
746 S390X_GUEST_OFFSET(guest_f7),
747 S390X_GUEST_OFFSET(guest_f8),
748 S390X_GUEST_OFFSET(guest_f9),
749 S390X_GUEST_OFFSET(guest_f10),
750 S390X_GUEST_OFFSET(guest_f11),
751 S390X_GUEST_OFFSET(guest_f12),
752 S390X_GUEST_OFFSET(guest_f13),
753 S390X_GUEST_OFFSET(guest_f14),
754 S390X_GUEST_OFFSET(guest_f15),
sewardj2019a972011-03-07 16:04:07 +0000755 };
756
757 vassert(archreg < 16);
758
759 return offset[archreg];
760}
761
762
763/* Return the guest state offset of word #0 of a fpr register. */
764static __inline__ UInt
765fpr_w0_offset(UInt archreg)
766{
767 return fpr_offset(archreg) + 0;
768}
769
770/* Write word #0 of a fpr to the guest state. */
771static __inline__ void
772put_fpr_w0(UInt archreg, IRExpr *expr)
773{
774 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
775
776 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
777}
778
779/* Read word #0 of a fpr register. */
780static __inline__ IRExpr *
781get_fpr_w0(UInt archreg)
782{
783 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
784}
785
786/* Return the guest state offset of double word #0 of a fpr register. */
787static __inline__ UInt
788fpr_dw0_offset(UInt archreg)
789{
790 return fpr_offset(archreg) + 0;
791}
792
793/* Write double word #0 of a fpr to the guest state. */
794static __inline__ void
795put_fpr_dw0(UInt archreg, IRExpr *expr)
796{
797 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
798
799 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
800}
801
802/* Read double word #0 of a fpr register. */
803static __inline__ IRExpr *
804get_fpr_dw0(UInt archreg)
805{
806 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
807}
808
809
810/*------------------------------------------------------------*/
811/*--- gpr registers ---*/
812/*------------------------------------------------------------*/
813
814/* Return the guest state offset of a gpr register. */
815static UInt
816gpr_offset(UInt archreg)
817{
818 static const UInt offset[16] = {
floriane88b3c92011-07-05 02:48:39 +0000819 S390X_GUEST_OFFSET(guest_r0),
820 S390X_GUEST_OFFSET(guest_r1),
821 S390X_GUEST_OFFSET(guest_r2),
822 S390X_GUEST_OFFSET(guest_r3),
823 S390X_GUEST_OFFSET(guest_r4),
824 S390X_GUEST_OFFSET(guest_r5),
825 S390X_GUEST_OFFSET(guest_r6),
826 S390X_GUEST_OFFSET(guest_r7),
827 S390X_GUEST_OFFSET(guest_r8),
828 S390X_GUEST_OFFSET(guest_r9),
829 S390X_GUEST_OFFSET(guest_r10),
830 S390X_GUEST_OFFSET(guest_r11),
831 S390X_GUEST_OFFSET(guest_r12),
832 S390X_GUEST_OFFSET(guest_r13),
833 S390X_GUEST_OFFSET(guest_r14),
834 S390X_GUEST_OFFSET(guest_r15),
sewardj2019a972011-03-07 16:04:07 +0000835 };
836
837 vassert(archreg < 16);
838
839 return offset[archreg];
840}
841
842
843/* Return the guest state offset of word #0 of a gpr register. */
844static __inline__ UInt
845gpr_w0_offset(UInt archreg)
846{
847 return gpr_offset(archreg) + 0;
848}
849
850/* Write word #0 of a gpr to the guest state. */
851static __inline__ void
852put_gpr_w0(UInt archreg, IRExpr *expr)
853{
854 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
855
856 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
857}
858
859/* Read word #0 of a gpr register. */
860static __inline__ IRExpr *
861get_gpr_w0(UInt archreg)
862{
863 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
864}
865
866/* Return the guest state offset of double word #0 of a gpr register. */
867static __inline__ UInt
868gpr_dw0_offset(UInt archreg)
869{
870 return gpr_offset(archreg) + 0;
871}
872
873/* Write double word #0 of a gpr to the guest state. */
874static __inline__ void
875put_gpr_dw0(UInt archreg, IRExpr *expr)
876{
877 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
878
879 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
880}
881
882/* Read double word #0 of a gpr register. */
883static __inline__ IRExpr *
884get_gpr_dw0(UInt archreg)
885{
886 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
887}
888
889/* Return the guest state offset of half word #1 of a gpr register. */
890static __inline__ UInt
891gpr_hw1_offset(UInt archreg)
892{
893 return gpr_offset(archreg) + 2;
894}
895
896/* Write half word #1 of a gpr to the guest state. */
897static __inline__ void
898put_gpr_hw1(UInt archreg, IRExpr *expr)
899{
900 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
901
902 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
903}
904
905/* Read half word #1 of a gpr register. */
906static __inline__ IRExpr *
907get_gpr_hw1(UInt archreg)
908{
909 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
910}
911
912/* Return the guest state offset of byte #6 of a gpr register. */
913static __inline__ UInt
914gpr_b6_offset(UInt archreg)
915{
916 return gpr_offset(archreg) + 6;
917}
918
919/* Write byte #6 of a gpr to the guest state. */
920static __inline__ void
921put_gpr_b6(UInt archreg, IRExpr *expr)
922{
923 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
924
925 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
926}
927
928/* Read byte #6 of a gpr register. */
929static __inline__ IRExpr *
930get_gpr_b6(UInt archreg)
931{
932 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
933}
934
935/* Return the guest state offset of byte #3 of a gpr register. */
936static __inline__ UInt
937gpr_b3_offset(UInt archreg)
938{
939 return gpr_offset(archreg) + 3;
940}
941
942/* Write byte #3 of a gpr to the guest state. */
943static __inline__ void
944put_gpr_b3(UInt archreg, IRExpr *expr)
945{
946 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
947
948 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
949}
950
951/* Read byte #3 of a gpr register. */
952static __inline__ IRExpr *
953get_gpr_b3(UInt archreg)
954{
955 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
956}
957
958/* Return the guest state offset of byte #0 of a gpr register. */
959static __inline__ UInt
960gpr_b0_offset(UInt archreg)
961{
962 return gpr_offset(archreg) + 0;
963}
964
965/* Write byte #0 of a gpr to the guest state. */
966static __inline__ void
967put_gpr_b0(UInt archreg, IRExpr *expr)
968{
969 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
970
971 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
972}
973
974/* Read byte #0 of a gpr register. */
975static __inline__ IRExpr *
976get_gpr_b0(UInt archreg)
977{
978 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
979}
980
981/* Return the guest state offset of word #1 of a gpr register. */
982static __inline__ UInt
983gpr_w1_offset(UInt archreg)
984{
985 return gpr_offset(archreg) + 4;
986}
987
988/* Write word #1 of a gpr to the guest state. */
989static __inline__ void
990put_gpr_w1(UInt archreg, IRExpr *expr)
991{
992 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
993
994 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
995}
996
997/* Read word #1 of a gpr register. */
998static __inline__ IRExpr *
999get_gpr_w1(UInt archreg)
1000{
1001 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
1002}
1003
1004/* Return the guest state offset of half word #3 of a gpr register. */
1005static __inline__ UInt
1006gpr_hw3_offset(UInt archreg)
1007{
1008 return gpr_offset(archreg) + 6;
1009}
1010
1011/* Write half word #3 of a gpr to the guest state. */
1012static __inline__ void
1013put_gpr_hw3(UInt archreg, IRExpr *expr)
1014{
1015 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1016
1017 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
1018}
1019
1020/* Read half word #3 of a gpr register. */
1021static __inline__ IRExpr *
1022get_gpr_hw3(UInt archreg)
1023{
1024 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
1025}
1026
1027/* Return the guest state offset of byte #7 of a gpr register. */
1028static __inline__ UInt
1029gpr_b7_offset(UInt archreg)
1030{
1031 return gpr_offset(archreg) + 7;
1032}
1033
1034/* Write byte #7 of a gpr to the guest state. */
1035static __inline__ void
1036put_gpr_b7(UInt archreg, IRExpr *expr)
1037{
1038 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1039
1040 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1041}
1042
1043/* Read byte #7 of a gpr register. */
1044static __inline__ IRExpr *
1045get_gpr_b7(UInt archreg)
1046{
1047 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1048}
1049
1050/* Return the guest state offset of half word #0 of a gpr register. */
1051static __inline__ UInt
1052gpr_hw0_offset(UInt archreg)
1053{
1054 return gpr_offset(archreg) + 0;
1055}
1056
1057/* Write half word #0 of a gpr to the guest state. */
1058static __inline__ void
1059put_gpr_hw0(UInt archreg, IRExpr *expr)
1060{
1061 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1062
1063 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1064}
1065
1066/* Read half word #0 of a gpr register. */
1067static __inline__ IRExpr *
1068get_gpr_hw0(UInt archreg)
1069{
1070 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1071}
1072
1073/* Return the guest state offset of byte #4 of a gpr register. */
1074static __inline__ UInt
1075gpr_b4_offset(UInt archreg)
1076{
1077 return gpr_offset(archreg) + 4;
1078}
1079
1080/* Write byte #4 of a gpr to the guest state. */
1081static __inline__ void
1082put_gpr_b4(UInt archreg, IRExpr *expr)
1083{
1084 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1085
1086 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1087}
1088
1089/* Read byte #4 of a gpr register. */
1090static __inline__ IRExpr *
1091get_gpr_b4(UInt archreg)
1092{
1093 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1094}
1095
1096/* Return the guest state offset of byte #1 of a gpr register. */
1097static __inline__ UInt
1098gpr_b1_offset(UInt archreg)
1099{
1100 return gpr_offset(archreg) + 1;
1101}
1102
1103/* Write byte #1 of a gpr to the guest state. */
1104static __inline__ void
1105put_gpr_b1(UInt archreg, IRExpr *expr)
1106{
1107 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1108
1109 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1110}
1111
1112/* Read byte #1 of a gpr register. */
1113static __inline__ IRExpr *
1114get_gpr_b1(UInt archreg)
1115{
1116 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1117}
1118
1119/* Return the guest state offset of half word #2 of a gpr register. */
1120static __inline__ UInt
1121gpr_hw2_offset(UInt archreg)
1122{
1123 return gpr_offset(archreg) + 4;
1124}
1125
1126/* Write half word #2 of a gpr to the guest state. */
1127static __inline__ void
1128put_gpr_hw2(UInt archreg, IRExpr *expr)
1129{
1130 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1131
1132 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1133}
1134
1135/* Read half word #2 of a gpr register. */
1136static __inline__ IRExpr *
1137get_gpr_hw2(UInt archreg)
1138{
1139 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1140}
1141
1142/* Return the guest state offset of byte #5 of a gpr register. */
1143static __inline__ UInt
1144gpr_b5_offset(UInt archreg)
1145{
1146 return gpr_offset(archreg) + 5;
1147}
1148
1149/* Write byte #5 of a gpr to the guest state. */
1150static __inline__ void
1151put_gpr_b5(UInt archreg, IRExpr *expr)
1152{
1153 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1154
1155 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1156}
1157
1158/* Read byte #5 of a gpr register. */
1159static __inline__ IRExpr *
1160get_gpr_b5(UInt archreg)
1161{
1162 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1163}
1164
1165/* Return the guest state offset of byte #2 of a gpr register. */
1166static __inline__ UInt
1167gpr_b2_offset(UInt archreg)
1168{
1169 return gpr_offset(archreg) + 2;
1170}
1171
1172/* Write byte #2 of a gpr to the guest state. */
1173static __inline__ void
1174put_gpr_b2(UInt archreg, IRExpr *expr)
1175{
1176 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1177
1178 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1179}
1180
1181/* Read byte #2 of a gpr register. */
1182static __inline__ IRExpr *
1183get_gpr_b2(UInt archreg)
1184{
1185 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1186}
1187
1188/* Return the guest state offset of the counter register. */
1189static UInt
1190counter_offset(void)
1191{
floriane88b3c92011-07-05 02:48:39 +00001192 return S390X_GUEST_OFFSET(guest_counter);
sewardj2019a972011-03-07 16:04:07 +00001193}
1194
1195/* Return the guest state offset of double word #0 of the counter register. */
1196static __inline__ UInt
1197counter_dw0_offset(void)
1198{
1199 return counter_offset() + 0;
1200}
1201
1202/* Write double word #0 of the counter to the guest state. */
1203static __inline__ void
1204put_counter_dw0(IRExpr *expr)
1205{
1206 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1207
1208 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1209}
1210
1211/* Read double word #0 of the counter register. */
1212static __inline__ IRExpr *
1213get_counter_dw0(void)
1214{
1215 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1216}
1217
1218/* Return the guest state offset of word #0 of the counter register. */
1219static __inline__ UInt
1220counter_w0_offset(void)
1221{
1222 return counter_offset() + 0;
1223}
1224
1225/* Return the guest state offset of word #1 of the counter register. */
1226static __inline__ UInt
1227counter_w1_offset(void)
1228{
1229 return counter_offset() + 4;
1230}
1231
1232/* Write word #0 of the counter to the guest state. */
1233static __inline__ void
1234put_counter_w0(IRExpr *expr)
1235{
1236 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1237
1238 stmt(IRStmt_Put(counter_w0_offset(), expr));
1239}
1240
1241/* Read word #0 of the counter register. */
1242static __inline__ IRExpr *
1243get_counter_w0(void)
1244{
1245 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1246}
1247
1248/* Write word #1 of the counter to the guest state. */
1249static __inline__ void
1250put_counter_w1(IRExpr *expr)
1251{
1252 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1253
1254 stmt(IRStmt_Put(counter_w1_offset(), expr));
1255}
1256
1257/* Read word #1 of the counter register. */
1258static __inline__ IRExpr *
1259get_counter_w1(void)
1260{
1261 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1262}
1263
1264/* Return the guest state offset of the fpc register. */
1265static UInt
1266fpc_offset(void)
1267{
floriane88b3c92011-07-05 02:48:39 +00001268 return S390X_GUEST_OFFSET(guest_fpc);
sewardj2019a972011-03-07 16:04:07 +00001269}
1270
1271/* Return the guest state offset of word #0 of the fpc register. */
1272static __inline__ UInt
1273fpc_w0_offset(void)
1274{
1275 return fpc_offset() + 0;
1276}
1277
1278/* Write word #0 of the fpc to the guest state. */
1279static __inline__ void
1280put_fpc_w0(IRExpr *expr)
1281{
1282 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1283
1284 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1285}
1286
1287/* Read word #0 of the fpc register. */
1288static __inline__ IRExpr *
1289get_fpc_w0(void)
1290{
1291 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1292}
1293
1294
1295/*------------------------------------------------------------*/
1296/*--- Build IR for formats ---*/
1297/*------------------------------------------------------------*/
1298static void
1299s390_format_I(HChar *(*irgen)(UChar i),
1300 UChar i)
1301{
1302 HChar *mnm = irgen(i);
1303
sewardj7ee97522011-05-09 21:45:04 +00001304 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001305 s390_disasm(ENC2(MNM, UINT), mnm, i);
1306}
1307
1308static void
1309s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1310 UChar r1, UShort i2)
1311{
1312 irgen(r1, i2);
1313}
1314
1315static void
1316s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1317 UChar r1, UShort i2)
1318{
1319 HChar *mnm = irgen(r1, i2);
1320
sewardj7ee97522011-05-09 21:45:04 +00001321 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001322 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1323}
1324
1325static void
1326s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1327 UChar r1, UShort i2)
1328{
1329 HChar *mnm = irgen(r1, i2);
1330
sewardj7ee97522011-05-09 21:45:04 +00001331 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001332 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1333}
1334
1335static void
1336s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1337 UChar r1, UShort i2)
1338{
1339 HChar *mnm = irgen(r1, i2);
1340
sewardj7ee97522011-05-09 21:45:04 +00001341 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001342 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1343}
1344
1345static void
1346s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1347 UChar r1, UChar r3, UShort i2)
1348{
1349 HChar *mnm = irgen(r1, r3, i2);
1350
sewardj7ee97522011-05-09 21:45:04 +00001351 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001352 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1353}
1354
1355static void
1356s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1357 UChar r1, UChar r3, UShort i2)
1358{
1359 HChar *mnm = irgen(r1, r3, i2);
1360
sewardj7ee97522011-05-09 21:45:04 +00001361 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001362 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1363}
1364
1365static void
1366s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1367 UChar i5),
1368 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1369{
1370 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1371
sewardj7ee97522011-05-09 21:45:04 +00001372 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001373 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1374 i5);
1375}
1376
1377static void
1378s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1379 UChar r1, UChar r2, UShort i4, UChar m3)
1380{
1381 HChar *mnm = irgen(r1, r2, i4, m3);
1382
sewardj7ee97522011-05-09 21:45:04 +00001383 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001384 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1385 r2, m3, (Int)(Short)i4);
1386}
1387
1388static void
1389s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1390 UChar r1, UChar m3, UShort i4, UChar i2)
1391{
1392 HChar *mnm = irgen(r1, m3, i4, i2);
1393
sewardj7ee97522011-05-09 21:45:04 +00001394 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001395 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1396 r1, i2, m3, (Int)(Short)i4);
1397}
1398
1399static void
1400s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1401 UChar r1, UChar m3, UShort i4, UChar i2)
1402{
1403 HChar *mnm = irgen(r1, m3, i4, i2);
1404
sewardj7ee97522011-05-09 21:45:04 +00001405 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001406 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1407 (Int)(Char)i2, m3, (Int)(Short)i4);
1408}
1409
1410static void
1411s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1412 UChar r1, UInt i2)
1413{
1414 irgen(r1, i2);
1415}
1416
1417static void
1418s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1419 UChar r1, UInt i2)
1420{
1421 HChar *mnm = irgen(r1, i2);
1422
sewardj7ee97522011-05-09 21:45:04 +00001423 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001424 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1425}
1426
1427static void
1428s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1429 UChar r1, UInt i2)
1430{
1431 HChar *mnm = irgen(r1, i2);
1432
sewardj7ee97522011-05-09 21:45:04 +00001433 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001434 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1435}
1436
1437static void
1438s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1439 UChar r1, UInt i2)
1440{
1441 HChar *mnm = irgen(r1, i2);
1442
sewardj7ee97522011-05-09 21:45:04 +00001443 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001444 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1445}
1446
1447static void
1448s390_format_RIL_UP(HChar *(*irgen)(void),
1449 UChar r1, UInt i2)
1450{
1451 HChar *mnm = irgen();
1452
sewardj7ee97522011-05-09 21:45:04 +00001453 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001454 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1455}
1456
1457static void
1458s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1459 IRTemp op4addr),
1460 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1461{
1462 HChar *mnm;
1463 IRTemp op4addr = newTemp(Ity_I64);
1464
1465 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1466 mkU64(0)));
1467
1468 mnm = irgen(r1, m3, i2, op4addr);
1469
sewardj7ee97522011-05-09 21:45:04 +00001470 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001471 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1472 (Int)(Char)i2, m3, d4, 0, b4);
1473}
1474
1475static void
1476s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1477 IRTemp op4addr),
1478 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1479{
1480 HChar *mnm;
1481 IRTemp op4addr = newTemp(Ity_I64);
1482
1483 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1484 mkU64(0)));
1485
1486 mnm = irgen(r1, m3, i2, op4addr);
1487
sewardj7ee97522011-05-09 21:45:04 +00001488 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001489 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1490 i2, m3, d4, 0, b4);
1491}
1492
1493static void
1494s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1495 UChar r1, UChar r2)
1496{
1497 irgen(r1, r2);
1498}
1499
1500static void
1501s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1502 UChar r1, UChar r2)
1503{
1504 HChar *mnm = irgen(r1, r2);
1505
sewardj7ee97522011-05-09 21:45:04 +00001506 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001507 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1508}
1509
1510static void
1511s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1512 UChar r1, UChar r2)
1513{
1514 HChar *mnm = irgen(r1, r2);
1515
sewardj7ee97522011-05-09 21:45:04 +00001516 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001517 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1518}
1519
1520static void
1521s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1522 UChar r1, UChar r2)
1523{
1524 irgen(r1, r2);
1525}
1526
1527static void
1528s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1529 UChar r1, UChar r2)
1530{
1531 HChar *mnm = irgen(r1, r2);
1532
sewardj7ee97522011-05-09 21:45:04 +00001533 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001534 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1535}
1536
1537static void
1538s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1539 UChar r1, UChar r2)
1540{
1541 HChar *mnm = irgen(r1, r2);
1542
sewardj7ee97522011-05-09 21:45:04 +00001543 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001544 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1545}
1546
1547static void
1548s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1549 UChar r1, UChar r2)
1550{
1551 HChar *mnm = irgen(r1, r2);
1552
sewardj7ee97522011-05-09 21:45:04 +00001553 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001554 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1555}
1556
1557static void
1558s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1559 UChar r1, UChar r2)
1560{
1561 HChar *mnm = irgen(r1, r2);
1562
sewardj7ee97522011-05-09 21:45:04 +00001563 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001564 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1565}
1566
1567static void
1568s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1569 UChar r1)
1570{
1571 HChar *mnm = irgen(r1);
1572
sewardj7ee97522011-05-09 21:45:04 +00001573 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001574 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1575}
1576
1577static void
1578s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1579 UChar r1)
1580{
1581 HChar *mnm = irgen(r1);
1582
sewardj7ee97522011-05-09 21:45:04 +00001583 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001584 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1585}
1586
1587static void
1588s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1589 UChar r1, UChar r3, UChar r2)
1590{
1591 HChar *mnm = irgen(r1, r3, r2);
1592
sewardj7ee97522011-05-09 21:45:04 +00001593 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001594 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1595}
1596
1597static void
sewardjd7bde722011-04-05 13:19:33 +00001598s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1599 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1600{
1601 irgen(m3, r1, r2);
1602
sewardj7ee97522011-05-09 21:45:04 +00001603 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001604 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1605}
1606
1607static void
sewardj2019a972011-03-07 16:04:07 +00001608s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1609 UChar r3, UChar r1, UChar r2)
1610{
1611 HChar *mnm = irgen(r3, r1, r2);
1612
sewardj7ee97522011-05-09 21:45:04 +00001613 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001614 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1615}
1616
1617static void
1618s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1619 UChar r3, UChar r1, UChar r2)
1620{
1621 HChar *mnm = irgen(r3, r1, r2);
1622
sewardj7ee97522011-05-09 21:45:04 +00001623 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001624 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1625}
1626
1627static void
1628s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1629 UChar r3, UChar r1, UChar r2)
1630{
1631 HChar *mnm = irgen(r3, r1, r2);
1632
sewardj7ee97522011-05-09 21:45:04 +00001633 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001634 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1635}
1636
1637static void
1638s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1639 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1640{
1641 HChar *mnm;
1642 IRTemp op4addr = newTemp(Ity_I64);
1643
1644 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1645 mkU64(0)));
1646
1647 mnm = irgen(r1, r2, m3, op4addr);
1648
sewardj7ee97522011-05-09 21:45:04 +00001649 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001650 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1651 r2, m3, d4, 0, b4);
1652}
1653
1654static void
1655s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1656 UChar r1, UChar b2, UShort d2)
1657{
1658 HChar *mnm;
1659 IRTemp op2addr = newTemp(Ity_I64);
1660
1661 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1662 mkU64(0)));
1663
1664 mnm = irgen(r1, op2addr);
1665
sewardj7ee97522011-05-09 21:45:04 +00001666 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001667 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1668}
1669
1670static void
1671s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1672 UChar r1, UChar r3, UChar b2, UShort d2)
1673{
1674 HChar *mnm;
1675 IRTemp op2addr = newTemp(Ity_I64);
1676
1677 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1678 mkU64(0)));
1679
1680 mnm = irgen(r1, r3, op2addr);
1681
sewardj7ee97522011-05-09 21:45:04 +00001682 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001683 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1684}
1685
1686static void
1687s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1688 UChar r1, UChar r3, UChar b2, UShort d2)
1689{
1690 HChar *mnm;
1691 IRTemp op2addr = newTemp(Ity_I64);
1692
1693 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1694 mkU64(0)));
1695
1696 mnm = irgen(r1, r3, op2addr);
1697
sewardj7ee97522011-05-09 21:45:04 +00001698 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001699 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1700}
1701
1702static void
1703s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1704 UChar r1, UChar r3, UChar b2, UShort d2)
1705{
1706 HChar *mnm;
1707 IRTemp op2addr = newTemp(Ity_I64);
1708
1709 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1710 mkU64(0)));
1711
1712 mnm = irgen(r1, r3, op2addr);
1713
sewardj7ee97522011-05-09 21:45:04 +00001714 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001715 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1716}
1717
1718static void
1719s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1720 UChar r1, UChar r3, UShort i2)
1721{
1722 HChar *mnm = irgen(r1, r3, i2);
1723
sewardj7ee97522011-05-09 21:45:04 +00001724 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001725 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1726}
1727
1728static void
1729s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1730 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1731{
1732 HChar *mnm;
1733 IRTemp op2addr = newTemp(Ity_I64);
1734 IRTemp d2 = newTemp(Ity_I64);
1735
1736 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1737 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1738 mkU64(0)));
1739
1740 mnm = irgen(r1, r3, op2addr);
1741
sewardj7ee97522011-05-09 21:45:04 +00001742 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001743 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1744}
1745
1746static void
1747s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1748 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1749{
1750 HChar *mnm;
1751 IRTemp op2addr = newTemp(Ity_I64);
1752 IRTemp d2 = newTemp(Ity_I64);
1753
1754 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1755 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1756 mkU64(0)));
1757
1758 mnm = irgen(r1, r3, op2addr);
1759
sewardj7ee97522011-05-09 21:45:04 +00001760 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001761 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1762}
1763
1764static void
1765s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1766 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1767{
1768 HChar *mnm;
1769 IRTemp op2addr = newTemp(Ity_I64);
1770 IRTemp d2 = newTemp(Ity_I64);
1771
1772 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1773 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1774 mkU64(0)));
1775
1776 mnm = irgen(r1, r3, op2addr);
1777
sewardj7ee97522011-05-09 21:45:04 +00001778 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001779 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1780}
1781
1782static void
sewardjd7bde722011-04-05 13:19:33 +00001783s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1784 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1785 Int xmnm_kind)
1786{
1787 IRTemp op2addr = newTemp(Ity_I64);
1788 IRTemp d2 = newTemp(Ity_I64);
1789
1790 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1791 guest_IA_next_instr);
1792 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1793 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1794 mkU64(0)));
1795
1796 irgen(r1, op2addr);
1797
sewardj7ee97522011-05-09 21:45:04 +00001798 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001799 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1800}
1801
1802static void
sewardj2019a972011-03-07 16:04:07 +00001803s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1804 IRTemp op2addr),
1805 UChar r1, UChar x2, UChar b2, UShort d2)
1806{
1807 IRTemp op2addr = newTemp(Ity_I64);
1808
1809 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1810 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1811 mkU64(0)));
1812
1813 irgen(r1, x2, b2, d2, op2addr);
1814}
1815
1816static void
1817s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1818 UChar r1, UChar x2, UChar b2, UShort d2)
1819{
1820 HChar *mnm;
1821 IRTemp op2addr = newTemp(Ity_I64);
1822
1823 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1824 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1825 mkU64(0)));
1826
1827 mnm = irgen(r1, op2addr);
1828
sewardj7ee97522011-05-09 21:45:04 +00001829 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001830 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1831}
1832
1833static void
1834s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1835 UChar r1, UChar x2, UChar b2, UShort d2)
1836{
1837 HChar *mnm;
1838 IRTemp op2addr = newTemp(Ity_I64);
1839
1840 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1841 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1842 mkU64(0)));
1843
1844 mnm = irgen(r1, op2addr);
1845
sewardj7ee97522011-05-09 21:45:04 +00001846 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001847 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1848}
1849
1850static void
1851s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1852 UChar r1, UChar x2, UChar b2, UShort d2)
1853{
1854 HChar *mnm;
1855 IRTemp op2addr = newTemp(Ity_I64);
1856
1857 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1858 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1859 mkU64(0)));
1860
1861 mnm = irgen(r1, op2addr);
1862
sewardj7ee97522011-05-09 21:45:04 +00001863 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001864 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1865}
1866
1867static void
1868s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1869 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1870{
1871 HChar *mnm;
1872 IRTemp op2addr = newTemp(Ity_I64);
1873
1874 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1875 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1876 mkU64(0)));
1877
1878 mnm = irgen(r3, op2addr, r1);
1879
sewardj7ee97522011-05-09 21:45:04 +00001880 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001881 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1882}
1883
1884static void
1885s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1886 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1887{
1888 HChar *mnm;
1889 IRTemp op2addr = newTemp(Ity_I64);
1890 IRTemp d2 = newTemp(Ity_I64);
1891
1892 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1893 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1894 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1895 mkU64(0)));
1896
1897 mnm = irgen(r1, op2addr);
1898
sewardj7ee97522011-05-09 21:45:04 +00001899 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001900 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1901}
1902
1903static void
1904s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1905 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1906{
1907 HChar *mnm;
1908 IRTemp op2addr = newTemp(Ity_I64);
1909 IRTemp d2 = newTemp(Ity_I64);
1910
1911 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1912 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1913 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1914 mkU64(0)));
1915
1916 mnm = irgen(r1, op2addr);
1917
sewardj7ee97522011-05-09 21:45:04 +00001918 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001919 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1920}
1921
1922static void
1923s390_format_RXY_URRD(HChar *(*irgen)(void),
1924 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1925{
1926 HChar *mnm;
1927 IRTemp op2addr = newTemp(Ity_I64);
1928 IRTemp d2 = newTemp(Ity_I64);
1929
1930 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1931 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1932 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1933 mkU64(0)));
1934
1935 mnm = irgen();
1936
sewardj7ee97522011-05-09 21:45:04 +00001937 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001938 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1939}
1940
1941static void
1942s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1943 UChar b2, UShort d2)
1944{
1945 HChar *mnm;
1946 IRTemp op2addr = newTemp(Ity_I64);
1947
1948 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1949 mkU64(0)));
1950
1951 mnm = irgen(op2addr);
1952
sewardj7ee97522011-05-09 21:45:04 +00001953 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001954 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1955}
1956
1957static void
1958s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1959 UChar i2, UChar b1, UShort d1)
1960{
1961 HChar *mnm;
1962 IRTemp op1addr = newTemp(Ity_I64);
1963
1964 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1965 mkU64(0)));
1966
1967 mnm = irgen(i2, op1addr);
1968
sewardj7ee97522011-05-09 21:45:04 +00001969 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001970 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
1971}
1972
1973static void
1974s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1975 UChar i2, UChar b1, UShort dl1, UChar dh1)
1976{
1977 HChar *mnm;
1978 IRTemp op1addr = newTemp(Ity_I64);
1979 IRTemp d1 = newTemp(Ity_I64);
1980
1981 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1982 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1983 mkU64(0)));
1984
1985 mnm = irgen(i2, op1addr);
1986
sewardj7ee97522011-05-09 21:45:04 +00001987 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001988 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
1989}
1990
1991static void
1992s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1993 UChar i2, UChar b1, UShort dl1, UChar dh1)
1994{
1995 HChar *mnm;
1996 IRTemp op1addr = newTemp(Ity_I64);
1997 IRTemp d1 = newTemp(Ity_I64);
1998
1999 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
2000 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
2001 mkU64(0)));
2002
2003 mnm = irgen(i2, op1addr);
2004
sewardj7ee97522011-05-09 21:45:04 +00002005 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002006 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
2007}
2008
2009static void
2010s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
2011 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
2012{
2013 HChar *mnm;
2014 IRTemp op1addr = newTemp(Ity_I64);
2015 IRTemp op2addr = newTemp(Ity_I64);
2016
2017 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2018 mkU64(0)));
2019 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
2020 mkU64(0)));
2021
2022 mnm = irgen(l, op1addr, op2addr);
2023
sewardj7ee97522011-05-09 21:45:04 +00002024 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002025 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
2026}
2027
2028static void
2029s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2030 UChar b1, UShort d1, UShort i2)
2031{
2032 HChar *mnm;
2033 IRTemp op1addr = newTemp(Ity_I64);
2034
2035 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2036 mkU64(0)));
2037
2038 mnm = irgen(i2, op1addr);
2039
sewardj7ee97522011-05-09 21:45:04 +00002040 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002041 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2042}
2043
2044static void
2045s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2046 UChar b1, UShort d1, UShort i2)
2047{
2048 HChar *mnm;
2049 IRTemp op1addr = newTemp(Ity_I64);
2050
2051 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2052 mkU64(0)));
2053
2054 mnm = irgen(i2, op1addr);
2055
sewardj7ee97522011-05-09 21:45:04 +00002056 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002057 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2058}
2059
2060
2061
2062/*------------------------------------------------------------*/
2063/*--- Build IR for opcodes ---*/
2064/*------------------------------------------------------------*/
2065
2066static HChar *
florian30e89012011-08-08 18:22:58 +00002067s390_irgen_00(UChar r1 __attribute__((unused)),
2068 UChar r2 __attribute__((unused)))
2069{
2070 IRDirty *d;
2071
2072 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_00", &s390x_dirtyhelper_00,
2073 mkIRExprVec_0());
2074 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
2075
2076 d->fxState[0].fx = Ifx_Modify; /* read then write */
2077 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_IA);
2078 d->fxState[0].size = sizeof(ULong);
2079 d->nFxState = 1;
2080
2081 stmt(IRStmt_Dirty(d));
2082
2083 return "00";
2084}
2085
2086static HChar *
sewardj2019a972011-03-07 16:04:07 +00002087s390_irgen_AR(UChar r1, UChar r2)
2088{
2089 IRTemp op1 = newTemp(Ity_I32);
2090 IRTemp op2 = newTemp(Ity_I32);
2091 IRTemp result = newTemp(Ity_I32);
2092
2093 assign(op1, get_gpr_w1(r1));
2094 assign(op2, get_gpr_w1(r2));
2095 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2096 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2097 put_gpr_w1(r1, mkexpr(result));
2098
2099 return "ar";
2100}
2101
2102static HChar *
2103s390_irgen_AGR(UChar r1, UChar r2)
2104{
2105 IRTemp op1 = newTemp(Ity_I64);
2106 IRTemp op2 = newTemp(Ity_I64);
2107 IRTemp result = newTemp(Ity_I64);
2108
2109 assign(op1, get_gpr_dw0(r1));
2110 assign(op2, get_gpr_dw0(r2));
2111 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2112 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2113 put_gpr_dw0(r1, mkexpr(result));
2114
2115 return "agr";
2116}
2117
2118static HChar *
2119s390_irgen_AGFR(UChar r1, UChar r2)
2120{
2121 IRTemp op1 = newTemp(Ity_I64);
2122 IRTemp op2 = newTemp(Ity_I64);
2123 IRTemp result = newTemp(Ity_I64);
2124
2125 assign(op1, get_gpr_dw0(r1));
2126 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2127 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2128 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2129 put_gpr_dw0(r1, mkexpr(result));
2130
2131 return "agfr";
2132}
2133
2134static HChar *
2135s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2136{
2137 IRTemp op2 = newTemp(Ity_I32);
2138 IRTemp op3 = newTemp(Ity_I32);
2139 IRTemp result = newTemp(Ity_I32);
2140
2141 assign(op2, get_gpr_w1(r2));
2142 assign(op3, get_gpr_w1(r3));
2143 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2144 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2145 put_gpr_w1(r1, mkexpr(result));
2146
2147 return "ark";
2148}
2149
2150static HChar *
2151s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2152{
2153 IRTemp op2 = newTemp(Ity_I64);
2154 IRTemp op3 = newTemp(Ity_I64);
2155 IRTemp result = newTemp(Ity_I64);
2156
2157 assign(op2, get_gpr_dw0(r2));
2158 assign(op3, get_gpr_dw0(r3));
2159 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2160 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2161 put_gpr_dw0(r1, mkexpr(result));
2162
2163 return "agrk";
2164}
2165
2166static HChar *
2167s390_irgen_A(UChar r1, IRTemp op2addr)
2168{
2169 IRTemp op1 = newTemp(Ity_I32);
2170 IRTemp op2 = newTemp(Ity_I32);
2171 IRTemp result = newTemp(Ity_I32);
2172
2173 assign(op1, get_gpr_w1(r1));
2174 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2175 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2176 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2177 put_gpr_w1(r1, mkexpr(result));
2178
2179 return "a";
2180}
2181
2182static HChar *
2183s390_irgen_AY(UChar r1, IRTemp op2addr)
2184{
2185 IRTemp op1 = newTemp(Ity_I32);
2186 IRTemp op2 = newTemp(Ity_I32);
2187 IRTemp result = newTemp(Ity_I32);
2188
2189 assign(op1, get_gpr_w1(r1));
2190 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2191 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2192 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2193 put_gpr_w1(r1, mkexpr(result));
2194
2195 return "ay";
2196}
2197
2198static HChar *
2199s390_irgen_AG(UChar r1, IRTemp op2addr)
2200{
2201 IRTemp op1 = newTemp(Ity_I64);
2202 IRTemp op2 = newTemp(Ity_I64);
2203 IRTemp result = newTemp(Ity_I64);
2204
2205 assign(op1, get_gpr_dw0(r1));
2206 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2207 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2208 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2209 put_gpr_dw0(r1, mkexpr(result));
2210
2211 return "ag";
2212}
2213
2214static HChar *
2215s390_irgen_AGF(UChar r1, IRTemp op2addr)
2216{
2217 IRTemp op1 = newTemp(Ity_I64);
2218 IRTemp op2 = newTemp(Ity_I64);
2219 IRTemp result = newTemp(Ity_I64);
2220
2221 assign(op1, get_gpr_dw0(r1));
2222 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2223 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2224 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2225 put_gpr_dw0(r1, mkexpr(result));
2226
2227 return "agf";
2228}
2229
2230static HChar *
2231s390_irgen_AFI(UChar r1, UInt i2)
2232{
2233 IRTemp op1 = newTemp(Ity_I32);
2234 Int op2;
2235 IRTemp result = newTemp(Ity_I32);
2236
2237 assign(op1, get_gpr_w1(r1));
2238 op2 = (Int)i2;
2239 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2240 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2241 mkU32((UInt)op2)));
2242 put_gpr_w1(r1, mkexpr(result));
2243
2244 return "afi";
2245}
2246
2247static HChar *
2248s390_irgen_AGFI(UChar r1, UInt i2)
2249{
2250 IRTemp op1 = newTemp(Ity_I64);
2251 Long op2;
2252 IRTemp result = newTemp(Ity_I64);
2253
2254 assign(op1, get_gpr_dw0(r1));
2255 op2 = (Long)(Int)i2;
2256 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2257 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2258 mkU64((ULong)op2)));
2259 put_gpr_dw0(r1, mkexpr(result));
2260
2261 return "agfi";
2262}
2263
2264static HChar *
2265s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2266{
2267 Int op2;
2268 IRTemp op3 = newTemp(Ity_I32);
2269 IRTemp result = newTemp(Ity_I32);
2270
2271 op2 = (Int)(Short)i2;
2272 assign(op3, get_gpr_w1(r3));
2273 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2274 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2275 op2)), op3);
2276 put_gpr_w1(r1, mkexpr(result));
2277
2278 return "ahik";
2279}
2280
2281static HChar *
2282s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2283{
2284 Long op2;
2285 IRTemp op3 = newTemp(Ity_I64);
2286 IRTemp result = newTemp(Ity_I64);
2287
2288 op2 = (Long)(Short)i2;
2289 assign(op3, get_gpr_dw0(r3));
2290 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2291 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2292 op2)), op3);
2293 put_gpr_dw0(r1, mkexpr(result));
2294
2295 return "aghik";
2296}
2297
2298static HChar *
2299s390_irgen_ASI(UChar i2, IRTemp op1addr)
2300{
2301 IRTemp op1 = newTemp(Ity_I32);
2302 Int op2;
2303 IRTemp result = newTemp(Ity_I32);
2304
2305 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2306 op2 = (Int)(Char)i2;
2307 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2308 store(mkexpr(op1addr), mkexpr(result));
2309 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2310 mkU32((UInt)op2)));
2311
2312 return "asi";
2313}
2314
2315static HChar *
2316s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2317{
2318 IRTemp op1 = newTemp(Ity_I64);
2319 Long op2;
2320 IRTemp result = newTemp(Ity_I64);
2321
2322 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2323 op2 = (Long)(Char)i2;
2324 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2325 store(mkexpr(op1addr), mkexpr(result));
2326 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2327 mkU64((ULong)op2)));
2328
2329 return "agsi";
2330}
2331
2332static HChar *
2333s390_irgen_AH(UChar r1, IRTemp op2addr)
2334{
2335 IRTemp op1 = newTemp(Ity_I32);
2336 IRTemp op2 = newTemp(Ity_I32);
2337 IRTemp result = newTemp(Ity_I32);
2338
2339 assign(op1, get_gpr_w1(r1));
2340 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2341 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2342 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2343 put_gpr_w1(r1, mkexpr(result));
2344
2345 return "ah";
2346}
2347
2348static HChar *
2349s390_irgen_AHY(UChar r1, IRTemp op2addr)
2350{
2351 IRTemp op1 = newTemp(Ity_I32);
2352 IRTemp op2 = newTemp(Ity_I32);
2353 IRTemp result = newTemp(Ity_I32);
2354
2355 assign(op1, get_gpr_w1(r1));
2356 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2357 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2358 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2359 put_gpr_w1(r1, mkexpr(result));
2360
2361 return "ahy";
2362}
2363
2364static HChar *
2365s390_irgen_AHI(UChar r1, UShort i2)
2366{
2367 IRTemp op1 = newTemp(Ity_I32);
2368 Int op2;
2369 IRTemp result = newTemp(Ity_I32);
2370
2371 assign(op1, get_gpr_w1(r1));
2372 op2 = (Int)(Short)i2;
2373 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2374 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2375 mkU32((UInt)op2)));
2376 put_gpr_w1(r1, mkexpr(result));
2377
2378 return "ahi";
2379}
2380
2381static HChar *
2382s390_irgen_AGHI(UChar r1, UShort i2)
2383{
2384 IRTemp op1 = newTemp(Ity_I64);
2385 Long op2;
2386 IRTemp result = newTemp(Ity_I64);
2387
2388 assign(op1, get_gpr_dw0(r1));
2389 op2 = (Long)(Short)i2;
2390 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2391 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2392 mkU64((ULong)op2)));
2393 put_gpr_dw0(r1, mkexpr(result));
2394
2395 return "aghi";
2396}
2397
2398static HChar *
2399s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2400{
2401 IRTemp op2 = newTemp(Ity_I32);
2402 IRTemp op3 = newTemp(Ity_I32);
2403 IRTemp result = newTemp(Ity_I32);
2404
2405 assign(op2, get_gpr_w0(r2));
2406 assign(op3, get_gpr_w0(r3));
2407 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2408 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2409 put_gpr_w0(r1, mkexpr(result));
2410
2411 return "ahhhr";
2412}
2413
2414static HChar *
2415s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2416{
2417 IRTemp op2 = newTemp(Ity_I32);
2418 IRTemp op3 = newTemp(Ity_I32);
2419 IRTemp result = newTemp(Ity_I32);
2420
2421 assign(op2, get_gpr_w0(r2));
2422 assign(op3, get_gpr_w1(r3));
2423 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2424 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2425 put_gpr_w0(r1, mkexpr(result));
2426
2427 return "ahhlr";
2428}
2429
2430static HChar *
2431s390_irgen_AIH(UChar r1, UInt i2)
2432{
2433 IRTemp op1 = newTemp(Ity_I32);
2434 Int op2;
2435 IRTemp result = newTemp(Ity_I32);
2436
2437 assign(op1, get_gpr_w0(r1));
2438 op2 = (Int)i2;
2439 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2440 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2441 mkU32((UInt)op2)));
2442 put_gpr_w0(r1, mkexpr(result));
2443
2444 return "aih";
2445}
2446
2447static HChar *
2448s390_irgen_ALR(UChar r1, UChar r2)
2449{
2450 IRTemp op1 = newTemp(Ity_I32);
2451 IRTemp op2 = newTemp(Ity_I32);
2452 IRTemp result = newTemp(Ity_I32);
2453
2454 assign(op1, get_gpr_w1(r1));
2455 assign(op2, get_gpr_w1(r2));
2456 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2457 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2458 put_gpr_w1(r1, mkexpr(result));
2459
2460 return "alr";
2461}
2462
2463static HChar *
2464s390_irgen_ALGR(UChar r1, UChar r2)
2465{
2466 IRTemp op1 = newTemp(Ity_I64);
2467 IRTemp op2 = newTemp(Ity_I64);
2468 IRTemp result = newTemp(Ity_I64);
2469
2470 assign(op1, get_gpr_dw0(r1));
2471 assign(op2, get_gpr_dw0(r2));
2472 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2473 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2474 put_gpr_dw0(r1, mkexpr(result));
2475
2476 return "algr";
2477}
2478
2479static HChar *
2480s390_irgen_ALGFR(UChar r1, UChar r2)
2481{
2482 IRTemp op1 = newTemp(Ity_I64);
2483 IRTemp op2 = newTemp(Ity_I64);
2484 IRTemp result = newTemp(Ity_I64);
2485
2486 assign(op1, get_gpr_dw0(r1));
2487 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2488 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2489 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2490 put_gpr_dw0(r1, mkexpr(result));
2491
2492 return "algfr";
2493}
2494
2495static HChar *
2496s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2497{
2498 IRTemp op2 = newTemp(Ity_I32);
2499 IRTemp op3 = newTemp(Ity_I32);
2500 IRTemp result = newTemp(Ity_I32);
2501
2502 assign(op2, get_gpr_w1(r2));
2503 assign(op3, get_gpr_w1(r3));
2504 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2505 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2506 put_gpr_w1(r1, mkexpr(result));
2507
2508 return "alrk";
2509}
2510
2511static HChar *
2512s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2513{
2514 IRTemp op2 = newTemp(Ity_I64);
2515 IRTemp op3 = newTemp(Ity_I64);
2516 IRTemp result = newTemp(Ity_I64);
2517
2518 assign(op2, get_gpr_dw0(r2));
2519 assign(op3, get_gpr_dw0(r3));
2520 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2521 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2522 put_gpr_dw0(r1, mkexpr(result));
2523
2524 return "algrk";
2525}
2526
2527static HChar *
2528s390_irgen_AL(UChar r1, IRTemp op2addr)
2529{
2530 IRTemp op1 = newTemp(Ity_I32);
2531 IRTemp op2 = newTemp(Ity_I32);
2532 IRTemp result = newTemp(Ity_I32);
2533
2534 assign(op1, get_gpr_w1(r1));
2535 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2536 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2537 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2538 put_gpr_w1(r1, mkexpr(result));
2539
2540 return "al";
2541}
2542
2543static HChar *
2544s390_irgen_ALY(UChar r1, IRTemp op2addr)
2545{
2546 IRTemp op1 = newTemp(Ity_I32);
2547 IRTemp op2 = newTemp(Ity_I32);
2548 IRTemp result = newTemp(Ity_I32);
2549
2550 assign(op1, get_gpr_w1(r1));
2551 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2552 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2553 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2554 put_gpr_w1(r1, mkexpr(result));
2555
2556 return "aly";
2557}
2558
2559static HChar *
2560s390_irgen_ALG(UChar r1, IRTemp op2addr)
2561{
2562 IRTemp op1 = newTemp(Ity_I64);
2563 IRTemp op2 = newTemp(Ity_I64);
2564 IRTemp result = newTemp(Ity_I64);
2565
2566 assign(op1, get_gpr_dw0(r1));
2567 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2568 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2569 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2570 put_gpr_dw0(r1, mkexpr(result));
2571
2572 return "alg";
2573}
2574
2575static HChar *
2576s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2577{
2578 IRTemp op1 = newTemp(Ity_I64);
2579 IRTemp op2 = newTemp(Ity_I64);
2580 IRTemp result = newTemp(Ity_I64);
2581
2582 assign(op1, get_gpr_dw0(r1));
2583 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2584 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2585 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2586 put_gpr_dw0(r1, mkexpr(result));
2587
2588 return "algf";
2589}
2590
2591static HChar *
2592s390_irgen_ALFI(UChar r1, UInt i2)
2593{
2594 IRTemp op1 = newTemp(Ity_I32);
2595 UInt op2;
2596 IRTemp result = newTemp(Ity_I32);
2597
2598 assign(op1, get_gpr_w1(r1));
2599 op2 = i2;
2600 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2601 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2602 mkU32(op2)));
2603 put_gpr_w1(r1, mkexpr(result));
2604
2605 return "alfi";
2606}
2607
2608static HChar *
2609s390_irgen_ALGFI(UChar r1, UInt i2)
2610{
2611 IRTemp op1 = newTemp(Ity_I64);
2612 ULong op2;
2613 IRTemp result = newTemp(Ity_I64);
2614
2615 assign(op1, get_gpr_dw0(r1));
2616 op2 = (ULong)i2;
2617 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2618 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2619 mkU64(op2)));
2620 put_gpr_dw0(r1, mkexpr(result));
2621
2622 return "algfi";
2623}
2624
2625static HChar *
2626s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2627{
2628 IRTemp op2 = newTemp(Ity_I32);
2629 IRTemp op3 = newTemp(Ity_I32);
2630 IRTemp result = newTemp(Ity_I32);
2631
2632 assign(op2, get_gpr_w0(r2));
2633 assign(op3, get_gpr_w0(r3));
2634 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2635 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2636 put_gpr_w0(r1, mkexpr(result));
2637
2638 return "alhhhr";
2639}
2640
2641static HChar *
2642s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2643{
2644 IRTemp op2 = newTemp(Ity_I32);
2645 IRTemp op3 = newTemp(Ity_I32);
2646 IRTemp result = newTemp(Ity_I32);
2647
2648 assign(op2, get_gpr_w0(r2));
2649 assign(op3, get_gpr_w1(r3));
2650 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2651 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2652 put_gpr_w0(r1, mkexpr(result));
2653
2654 return "alhhlr";
2655}
2656
2657static HChar *
2658s390_irgen_ALCR(UChar r1, UChar r2)
2659{
2660 IRTemp op1 = newTemp(Ity_I32);
2661 IRTemp op2 = newTemp(Ity_I32);
2662 IRTemp result = newTemp(Ity_I32);
2663 IRTemp carry_in = newTemp(Ity_I32);
2664
2665 assign(op1, get_gpr_w1(r1));
2666 assign(op2, get_gpr_w1(r2));
2667 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2668 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2669 mkexpr(carry_in)));
2670 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2671 put_gpr_w1(r1, mkexpr(result));
2672
2673 return "alcr";
2674}
2675
2676static HChar *
2677s390_irgen_ALCGR(UChar r1, UChar r2)
2678{
2679 IRTemp op1 = newTemp(Ity_I64);
2680 IRTemp op2 = newTemp(Ity_I64);
2681 IRTemp result = newTemp(Ity_I64);
2682 IRTemp carry_in = newTemp(Ity_I64);
2683
2684 assign(op1, get_gpr_dw0(r1));
2685 assign(op2, get_gpr_dw0(r2));
2686 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2687 mkU8(1))));
2688 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2689 mkexpr(carry_in)));
2690 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2691 put_gpr_dw0(r1, mkexpr(result));
2692
2693 return "alcgr";
2694}
2695
2696static HChar *
2697s390_irgen_ALC(UChar r1, IRTemp op2addr)
2698{
2699 IRTemp op1 = newTemp(Ity_I32);
2700 IRTemp op2 = newTemp(Ity_I32);
2701 IRTemp result = newTemp(Ity_I32);
2702 IRTemp carry_in = newTemp(Ity_I32);
2703
2704 assign(op1, get_gpr_w1(r1));
2705 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2706 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2707 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2708 mkexpr(carry_in)));
2709 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2710 put_gpr_w1(r1, mkexpr(result));
2711
2712 return "alc";
2713}
2714
2715static HChar *
2716s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2717{
2718 IRTemp op1 = newTemp(Ity_I64);
2719 IRTemp op2 = newTemp(Ity_I64);
2720 IRTemp result = newTemp(Ity_I64);
2721 IRTemp carry_in = newTemp(Ity_I64);
2722
2723 assign(op1, get_gpr_dw0(r1));
2724 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2725 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2726 mkU8(1))));
2727 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2728 mkexpr(carry_in)));
2729 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2730 put_gpr_dw0(r1, mkexpr(result));
2731
2732 return "alcg";
2733}
2734
2735static HChar *
2736s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2737{
2738 IRTemp op1 = newTemp(Ity_I32);
2739 UInt op2;
2740 IRTemp result = newTemp(Ity_I32);
2741
2742 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2743 op2 = (UInt)(Int)(Char)i2;
2744 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2745 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2746 mkU32(op2)));
2747 store(mkexpr(op1addr), mkexpr(result));
2748
2749 return "alsi";
2750}
2751
2752static HChar *
2753s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2754{
2755 IRTemp op1 = newTemp(Ity_I64);
2756 ULong op2;
2757 IRTemp result = newTemp(Ity_I64);
2758
2759 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2760 op2 = (ULong)(Long)(Char)i2;
2761 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2762 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2763 mkU64(op2)));
2764 store(mkexpr(op1addr), mkexpr(result));
2765
2766 return "algsi";
2767}
2768
2769static HChar *
2770s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2771{
2772 UInt op2;
2773 IRTemp op3 = newTemp(Ity_I32);
2774 IRTemp result = newTemp(Ity_I32);
2775
2776 op2 = (UInt)(Int)(Short)i2;
2777 assign(op3, get_gpr_w1(r3));
2778 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2779 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2780 op3);
2781 put_gpr_w1(r1, mkexpr(result));
2782
2783 return "alhsik";
2784}
2785
2786static HChar *
2787s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2788{
2789 ULong op2;
2790 IRTemp op3 = newTemp(Ity_I64);
2791 IRTemp result = newTemp(Ity_I64);
2792
2793 op2 = (ULong)(Long)(Short)i2;
2794 assign(op3, get_gpr_dw0(r3));
2795 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2796 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2797 op3);
2798 put_gpr_dw0(r1, mkexpr(result));
2799
2800 return "alghsik";
2801}
2802
2803static HChar *
2804s390_irgen_ALSIH(UChar r1, UInt i2)
2805{
2806 IRTemp op1 = newTemp(Ity_I32);
2807 UInt op2;
2808 IRTemp result = newTemp(Ity_I32);
2809
2810 assign(op1, get_gpr_w0(r1));
2811 op2 = i2;
2812 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2813 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2814 mkU32(op2)));
2815 put_gpr_w0(r1, mkexpr(result));
2816
2817 return "alsih";
2818}
2819
2820static HChar *
2821s390_irgen_ALSIHN(UChar r1, UInt i2)
2822{
2823 IRTemp op1 = newTemp(Ity_I32);
2824 UInt op2;
2825 IRTemp result = newTemp(Ity_I32);
2826
2827 assign(op1, get_gpr_w0(r1));
2828 op2 = i2;
2829 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2830 put_gpr_w0(r1, mkexpr(result));
2831
2832 return "alsihn";
2833}
2834
2835static HChar *
2836s390_irgen_NR(UChar r1, UChar r2)
2837{
2838 IRTemp op1 = newTemp(Ity_I32);
2839 IRTemp op2 = newTemp(Ity_I32);
2840 IRTemp result = newTemp(Ity_I32);
2841
2842 assign(op1, get_gpr_w1(r1));
2843 assign(op2, get_gpr_w1(r2));
2844 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2845 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2846 put_gpr_w1(r1, mkexpr(result));
2847
2848 return "nr";
2849}
2850
2851static HChar *
2852s390_irgen_NGR(UChar r1, UChar r2)
2853{
2854 IRTemp op1 = newTemp(Ity_I64);
2855 IRTemp op2 = newTemp(Ity_I64);
2856 IRTemp result = newTemp(Ity_I64);
2857
2858 assign(op1, get_gpr_dw0(r1));
2859 assign(op2, get_gpr_dw0(r2));
2860 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2861 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2862 put_gpr_dw0(r1, mkexpr(result));
2863
2864 return "ngr";
2865}
2866
2867static HChar *
2868s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2869{
2870 IRTemp op2 = newTemp(Ity_I32);
2871 IRTemp op3 = newTemp(Ity_I32);
2872 IRTemp result = newTemp(Ity_I32);
2873
2874 assign(op2, get_gpr_w1(r2));
2875 assign(op3, get_gpr_w1(r3));
2876 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2877 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2878 put_gpr_w1(r1, mkexpr(result));
2879
2880 return "nrk";
2881}
2882
2883static HChar *
2884s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2885{
2886 IRTemp op2 = newTemp(Ity_I64);
2887 IRTemp op3 = newTemp(Ity_I64);
2888 IRTemp result = newTemp(Ity_I64);
2889
2890 assign(op2, get_gpr_dw0(r2));
2891 assign(op3, get_gpr_dw0(r3));
2892 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2893 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2894 put_gpr_dw0(r1, mkexpr(result));
2895
2896 return "ngrk";
2897}
2898
2899static HChar *
2900s390_irgen_N(UChar r1, IRTemp op2addr)
2901{
2902 IRTemp op1 = newTemp(Ity_I32);
2903 IRTemp op2 = newTemp(Ity_I32);
2904 IRTemp result = newTemp(Ity_I32);
2905
2906 assign(op1, get_gpr_w1(r1));
2907 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2908 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2909 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2910 put_gpr_w1(r1, mkexpr(result));
2911
2912 return "n";
2913}
2914
2915static HChar *
2916s390_irgen_NY(UChar r1, IRTemp op2addr)
2917{
2918 IRTemp op1 = newTemp(Ity_I32);
2919 IRTemp op2 = newTemp(Ity_I32);
2920 IRTemp result = newTemp(Ity_I32);
2921
2922 assign(op1, get_gpr_w1(r1));
2923 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2924 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2925 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2926 put_gpr_w1(r1, mkexpr(result));
2927
2928 return "ny";
2929}
2930
2931static HChar *
2932s390_irgen_NG(UChar r1, IRTemp op2addr)
2933{
2934 IRTemp op1 = newTemp(Ity_I64);
2935 IRTemp op2 = newTemp(Ity_I64);
2936 IRTemp result = newTemp(Ity_I64);
2937
2938 assign(op1, get_gpr_dw0(r1));
2939 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2940 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2941 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2942 put_gpr_dw0(r1, mkexpr(result));
2943
2944 return "ng";
2945}
2946
2947static HChar *
2948s390_irgen_NI(UChar i2, IRTemp op1addr)
2949{
2950 IRTemp op1 = newTemp(Ity_I8);
2951 UChar op2;
2952 IRTemp result = newTemp(Ity_I8);
2953
2954 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2955 op2 = i2;
2956 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2957 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2958 store(mkexpr(op1addr), mkexpr(result));
2959
2960 return "ni";
2961}
2962
2963static HChar *
2964s390_irgen_NIY(UChar i2, IRTemp op1addr)
2965{
2966 IRTemp op1 = newTemp(Ity_I8);
2967 UChar op2;
2968 IRTemp result = newTemp(Ity_I8);
2969
2970 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2971 op2 = i2;
2972 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2973 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2974 store(mkexpr(op1addr), mkexpr(result));
2975
2976 return "niy";
2977}
2978
2979static HChar *
2980s390_irgen_NIHF(UChar r1, UInt i2)
2981{
2982 IRTemp op1 = newTemp(Ity_I32);
2983 UInt op2;
2984 IRTemp result = newTemp(Ity_I32);
2985
2986 assign(op1, get_gpr_w0(r1));
2987 op2 = i2;
2988 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2989 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2990 put_gpr_w0(r1, mkexpr(result));
2991
2992 return "nihf";
2993}
2994
2995static HChar *
2996s390_irgen_NIHH(UChar r1, UShort i2)
2997{
2998 IRTemp op1 = newTemp(Ity_I16);
2999 UShort op2;
3000 IRTemp result = newTemp(Ity_I16);
3001
3002 assign(op1, get_gpr_hw0(r1));
3003 op2 = i2;
3004 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3005 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3006 put_gpr_hw0(r1, mkexpr(result));
3007
3008 return "nihh";
3009}
3010
3011static HChar *
3012s390_irgen_NIHL(UChar r1, UShort i2)
3013{
3014 IRTemp op1 = newTemp(Ity_I16);
3015 UShort op2;
3016 IRTemp result = newTemp(Ity_I16);
3017
3018 assign(op1, get_gpr_hw1(r1));
3019 op2 = i2;
3020 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3021 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3022 put_gpr_hw1(r1, mkexpr(result));
3023
3024 return "nihl";
3025}
3026
3027static HChar *
3028s390_irgen_NILF(UChar r1, UInt i2)
3029{
3030 IRTemp op1 = newTemp(Ity_I32);
3031 UInt op2;
3032 IRTemp result = newTemp(Ity_I32);
3033
3034 assign(op1, get_gpr_w1(r1));
3035 op2 = i2;
3036 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
3037 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3038 put_gpr_w1(r1, mkexpr(result));
3039
3040 return "nilf";
3041}
3042
3043static HChar *
3044s390_irgen_NILH(UChar r1, UShort i2)
3045{
3046 IRTemp op1 = newTemp(Ity_I16);
3047 UShort op2;
3048 IRTemp result = newTemp(Ity_I16);
3049
3050 assign(op1, get_gpr_hw2(r1));
3051 op2 = i2;
3052 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3053 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3054 put_gpr_hw2(r1, mkexpr(result));
3055
3056 return "nilh";
3057}
3058
3059static HChar *
3060s390_irgen_NILL(UChar r1, UShort i2)
3061{
3062 IRTemp op1 = newTemp(Ity_I16);
3063 UShort op2;
3064 IRTemp result = newTemp(Ity_I16);
3065
3066 assign(op1, get_gpr_hw3(r1));
3067 op2 = i2;
3068 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3069 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3070 put_gpr_hw3(r1, mkexpr(result));
3071
3072 return "nill";
3073}
3074
3075static HChar *
3076s390_irgen_BASR(UChar r1, UChar r2)
3077{
3078 IRTemp target = newTemp(Ity_I64);
3079
3080 if (r2 == 0) {
3081 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3082 } else {
3083 if (r1 != r2) {
3084 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3085 call_function(get_gpr_dw0(r2));
3086 } else {
3087 assign(target, get_gpr_dw0(r2));
3088 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3089 call_function(mkexpr(target));
3090 }
3091 }
3092
3093 return "basr";
3094}
3095
3096static HChar *
3097s390_irgen_BAS(UChar r1, IRTemp op2addr)
3098{
3099 IRTemp target = newTemp(Ity_I64);
3100
3101 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3102 assign(target, mkexpr(op2addr));
3103 call_function(mkexpr(target));
3104
3105 return "bas";
3106}
3107
3108static HChar *
3109s390_irgen_BCR(UChar r1, UChar r2)
3110{
3111 IRTemp cond = newTemp(Ity_I32);
3112
sewardja52e37e2011-04-28 18:48:06 +00003113 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3114 stmt(IRStmt_MBE(Imbe_Fence));
3115 }
3116
sewardj2019a972011-03-07 16:04:07 +00003117 if ((r2 == 0) || (r1 == 0)) {
3118 } else {
3119 if (r1 == 15) {
3120 return_from_function(get_gpr_dw0(r2));
3121 } else {
3122 assign(cond, s390_call_calculate_cond(r1));
3123 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3124 mkU32(0)), get_gpr_dw0(r2));
3125 }
3126 }
sewardj7ee97522011-05-09 21:45:04 +00003127 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003128 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3129
3130 return "bcr";
3131}
3132
3133static HChar *
3134s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3135{
3136 IRTemp cond = newTemp(Ity_I32);
3137
3138 if (r1 == 0) {
3139 } else {
3140 if (r1 == 15) {
3141 always_goto(mkexpr(op2addr));
3142 } else {
3143 assign(cond, s390_call_calculate_cond(r1));
3144 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3145 mkU32(0)), mkexpr(op2addr));
3146 }
3147 }
sewardj7ee97522011-05-09 21:45:04 +00003148 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003149 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3150
3151 return "bc";
3152}
3153
3154static HChar *
3155s390_irgen_BCTR(UChar r1, UChar r2)
3156{
3157 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3158 if (r2 != 0) {
3159 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3160 ), get_gpr_dw0(r2));
3161 }
3162
3163 return "bctr";
3164}
3165
3166static HChar *
3167s390_irgen_BCTGR(UChar r1, UChar r2)
3168{
3169 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3170 if (r2 != 0) {
3171 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3172 mkU64(0)), get_gpr_dw0(r2));
3173 }
3174
3175 return "bctgr";
3176}
3177
3178static HChar *
3179s390_irgen_BCT(UChar r1, IRTemp op2addr)
3180{
3181 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3182 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3183 mkexpr(op2addr));
3184
3185 return "bct";
3186}
3187
3188static HChar *
3189s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3190{
3191 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3192 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3193 mkexpr(op2addr));
3194
3195 return "bctg";
3196}
3197
3198static HChar *
3199s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3200{
3201 IRTemp value = newTemp(Ity_I32);
3202
3203 assign(value, get_gpr_w1(r3 | 1));
3204 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3205 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3206 mkexpr(value)), mkexpr(op2addr));
3207
3208 return "bxh";
3209}
3210
3211static HChar *
3212s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3213{
3214 IRTemp value = newTemp(Ity_I64);
3215
3216 assign(value, get_gpr_dw0(r3 | 1));
3217 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3218 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3219 mkexpr(value)), mkexpr(op2addr));
3220
3221 return "bxhg";
3222}
3223
3224static HChar *
3225s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3226{
3227 IRTemp value = newTemp(Ity_I32);
3228
3229 assign(value, get_gpr_w1(r3 | 1));
3230 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3231 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3232 get_gpr_w1(r1)), mkexpr(op2addr));
3233
3234 return "bxle";
3235}
3236
3237static HChar *
3238s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3239{
3240 IRTemp value = newTemp(Ity_I64);
3241
3242 assign(value, get_gpr_dw0(r3 | 1));
3243 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3244 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3245 get_gpr_dw0(r1)), mkexpr(op2addr));
3246
3247 return "bxleg";
3248}
3249
3250static HChar *
3251s390_irgen_BRAS(UChar r1, UShort i2)
3252{
3253 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
floriana64c2432011-07-16 02:11:50 +00003254 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003255
3256 return "bras";
3257}
3258
3259static HChar *
3260s390_irgen_BRASL(UChar r1, UInt i2)
3261{
3262 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
floriana64c2432011-07-16 02:11:50 +00003263 call_function_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003264
3265 return "brasl";
3266}
3267
3268static HChar *
3269s390_irgen_BRC(UChar r1, UShort i2)
3270{
3271 IRTemp cond = newTemp(Ity_I32);
3272
3273 if (r1 == 0) {
3274 } else {
3275 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003276 always_goto_and_chase(
3277 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003278 } else {
3279 assign(cond, s390_call_calculate_cond(r1));
3280 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3281 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3282
3283 }
3284 }
sewardj7ee97522011-05-09 21:45:04 +00003285 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003286 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3287
3288 return "brc";
3289}
3290
3291static HChar *
3292s390_irgen_BRCL(UChar r1, UInt i2)
3293{
3294 IRTemp cond = newTemp(Ity_I32);
3295
3296 if (r1 == 0) {
3297 } else {
3298 if (r1 == 15) {
floriana64c2432011-07-16 02:11:50 +00003299 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
sewardj2019a972011-03-07 16:04:07 +00003300 } else {
3301 assign(cond, s390_call_calculate_cond(r1));
3302 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3303 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3304 }
3305 }
sewardj7ee97522011-05-09 21:45:04 +00003306 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003307 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3308
3309 return "brcl";
3310}
3311
3312static HChar *
3313s390_irgen_BRCT(UChar r1, UShort i2)
3314{
3315 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3316 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3317 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3318
3319 return "brct";
3320}
3321
3322static HChar *
3323s390_irgen_BRCTG(UChar r1, UShort i2)
3324{
3325 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3326 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3327 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3328
3329 return "brctg";
3330}
3331
3332static HChar *
3333s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3334{
3335 IRTemp value = newTemp(Ity_I32);
3336
3337 assign(value, get_gpr_w1(r3 | 1));
3338 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3339 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3340 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3341
3342 return "brxh";
3343}
3344
3345static HChar *
3346s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3347{
3348 IRTemp value = newTemp(Ity_I64);
3349
3350 assign(value, get_gpr_dw0(r3 | 1));
3351 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3352 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3353 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3354
3355 return "brxhg";
3356}
3357
3358static HChar *
3359s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3360{
3361 IRTemp value = newTemp(Ity_I32);
3362
3363 assign(value, get_gpr_w1(r3 | 1));
3364 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3365 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3366 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3367
3368 return "brxle";
3369}
3370
3371static HChar *
3372s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3373{
3374 IRTemp value = newTemp(Ity_I64);
3375
3376 assign(value, get_gpr_dw0(r3 | 1));
3377 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3378 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3379 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3380
3381 return "brxlg";
3382}
3383
3384static HChar *
3385s390_irgen_CR(UChar r1, UChar r2)
3386{
3387 IRTemp op1 = newTemp(Ity_I32);
3388 IRTemp op2 = newTemp(Ity_I32);
3389
3390 assign(op1, get_gpr_w1(r1));
3391 assign(op2, get_gpr_w1(r2));
3392 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3393
3394 return "cr";
3395}
3396
3397static HChar *
3398s390_irgen_CGR(UChar r1, UChar r2)
3399{
3400 IRTemp op1 = newTemp(Ity_I64);
3401 IRTemp op2 = newTemp(Ity_I64);
3402
3403 assign(op1, get_gpr_dw0(r1));
3404 assign(op2, get_gpr_dw0(r2));
3405 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3406
3407 return "cgr";
3408}
3409
3410static HChar *
3411s390_irgen_CGFR(UChar r1, UChar r2)
3412{
3413 IRTemp op1 = newTemp(Ity_I64);
3414 IRTemp op2 = newTemp(Ity_I64);
3415
3416 assign(op1, get_gpr_dw0(r1));
3417 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3418 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3419
3420 return "cgfr";
3421}
3422
3423static HChar *
3424s390_irgen_C(UChar r1, IRTemp op2addr)
3425{
3426 IRTemp op1 = newTemp(Ity_I32);
3427 IRTemp op2 = newTemp(Ity_I32);
3428
3429 assign(op1, get_gpr_w1(r1));
3430 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3431 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3432
3433 return "c";
3434}
3435
3436static HChar *
3437s390_irgen_CY(UChar r1, IRTemp op2addr)
3438{
3439 IRTemp op1 = newTemp(Ity_I32);
3440 IRTemp op2 = newTemp(Ity_I32);
3441
3442 assign(op1, get_gpr_w1(r1));
3443 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3444 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3445
3446 return "cy";
3447}
3448
3449static HChar *
3450s390_irgen_CG(UChar r1, IRTemp op2addr)
3451{
3452 IRTemp op1 = newTemp(Ity_I64);
3453 IRTemp op2 = newTemp(Ity_I64);
3454
3455 assign(op1, get_gpr_dw0(r1));
3456 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3457 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3458
3459 return "cg";
3460}
3461
3462static HChar *
3463s390_irgen_CGF(UChar r1, IRTemp op2addr)
3464{
3465 IRTemp op1 = newTemp(Ity_I64);
3466 IRTemp op2 = newTemp(Ity_I64);
3467
3468 assign(op1, get_gpr_dw0(r1));
3469 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3470 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3471
3472 return "cgf";
3473}
3474
3475static HChar *
3476s390_irgen_CFI(UChar r1, UInt i2)
3477{
3478 IRTemp op1 = newTemp(Ity_I32);
3479 Int op2;
3480
3481 assign(op1, get_gpr_w1(r1));
3482 op2 = (Int)i2;
3483 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3484 mkU32((UInt)op2)));
3485
3486 return "cfi";
3487}
3488
3489static HChar *
3490s390_irgen_CGFI(UChar r1, UInt i2)
3491{
3492 IRTemp op1 = newTemp(Ity_I64);
3493 Long op2;
3494
3495 assign(op1, get_gpr_dw0(r1));
3496 op2 = (Long)(Int)i2;
3497 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3498 mkU64((ULong)op2)));
3499
3500 return "cgfi";
3501}
3502
3503static HChar *
3504s390_irgen_CRL(UChar r1, UInt i2)
3505{
3506 IRTemp op1 = newTemp(Ity_I32);
3507 IRTemp op2 = newTemp(Ity_I32);
3508
3509 assign(op1, get_gpr_w1(r1));
3510 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3511 i2 << 1))));
3512 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3513
3514 return "crl";
3515}
3516
3517static HChar *
3518s390_irgen_CGRL(UChar r1, UInt i2)
3519{
3520 IRTemp op1 = newTemp(Ity_I64);
3521 IRTemp op2 = newTemp(Ity_I64);
3522
3523 assign(op1, get_gpr_dw0(r1));
3524 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3525 i2 << 1))));
3526 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3527
3528 return "cgrl";
3529}
3530
3531static HChar *
3532s390_irgen_CGFRL(UChar r1, UInt i2)
3533{
3534 IRTemp op1 = newTemp(Ity_I64);
3535 IRTemp op2 = newTemp(Ity_I64);
3536
3537 assign(op1, get_gpr_dw0(r1));
3538 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3539 ((ULong)(Long)(Int)i2 << 1)))));
3540 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3541
3542 return "cgfrl";
3543}
3544
3545static HChar *
3546s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3547{
3548 IRTemp op1 = newTemp(Ity_I32);
3549 IRTemp op2 = newTemp(Ity_I32);
3550 IRTemp icc = newTemp(Ity_I32);
3551 IRTemp cond = newTemp(Ity_I32);
3552
3553 if (m3 == 0) {
3554 } else {
3555 if (m3 == 14) {
3556 always_goto(mkexpr(op4addr));
3557 } else {
3558 assign(op1, get_gpr_w1(r1));
3559 assign(op2, get_gpr_w1(r2));
3560 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3561 op2));
3562 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3563 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3564 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3565 mkU32(0)), mkexpr(op4addr));
3566 }
3567 }
3568
3569 return "crb";
3570}
3571
3572static HChar *
3573s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3574{
3575 IRTemp op1 = newTemp(Ity_I64);
3576 IRTemp op2 = newTemp(Ity_I64);
3577 IRTemp icc = newTemp(Ity_I32);
3578 IRTemp cond = newTemp(Ity_I32);
3579
3580 if (m3 == 0) {
3581 } else {
3582 if (m3 == 14) {
3583 always_goto(mkexpr(op4addr));
3584 } else {
3585 assign(op1, get_gpr_dw0(r1));
3586 assign(op2, get_gpr_dw0(r2));
3587 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3588 op2));
3589 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3590 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3591 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3592 mkU32(0)), mkexpr(op4addr));
3593 }
3594 }
3595
3596 return "cgrb";
3597}
3598
3599static HChar *
3600s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3601{
3602 IRTemp op1 = newTemp(Ity_I32);
3603 IRTemp op2 = newTemp(Ity_I32);
3604 IRTemp icc = newTemp(Ity_I32);
3605 IRTemp cond = newTemp(Ity_I32);
3606
3607 if (m3 == 0) {
3608 } else {
3609 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003610 always_goto_and_chase(
3611 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003612 } else {
3613 assign(op1, get_gpr_w1(r1));
3614 assign(op2, get_gpr_w1(r2));
3615 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3616 op2));
3617 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3618 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3619 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3620 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3621
3622 }
3623 }
3624
3625 return "crj";
3626}
3627
3628static HChar *
3629s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3630{
3631 IRTemp op1 = newTemp(Ity_I64);
3632 IRTemp op2 = newTemp(Ity_I64);
3633 IRTemp icc = newTemp(Ity_I32);
3634 IRTemp cond = newTemp(Ity_I32);
3635
3636 if (m3 == 0) {
3637 } else {
3638 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003639 always_goto_and_chase(
3640 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003641 } else {
3642 assign(op1, get_gpr_dw0(r1));
3643 assign(op2, get_gpr_dw0(r2));
3644 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3645 op2));
3646 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3647 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3648 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3649 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3650
3651 }
3652 }
3653
3654 return "cgrj";
3655}
3656
3657static HChar *
3658s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3659{
3660 IRTemp op1 = newTemp(Ity_I32);
3661 Int op2;
3662 IRTemp icc = newTemp(Ity_I32);
3663 IRTemp cond = newTemp(Ity_I32);
3664
3665 if (m3 == 0) {
3666 } else {
3667 if (m3 == 14) {
3668 always_goto(mkexpr(op4addr));
3669 } else {
3670 assign(op1, get_gpr_w1(r1));
3671 op2 = (Int)(Char)i2;
3672 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3673 mktemp(Ity_I32, mkU32((UInt)op2))));
3674 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3675 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3676 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3677 mkU32(0)), mkexpr(op4addr));
3678 }
3679 }
3680
3681 return "cib";
3682}
3683
3684static HChar *
3685s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3686{
3687 IRTemp op1 = newTemp(Ity_I64);
3688 Long op2;
3689 IRTemp icc = newTemp(Ity_I32);
3690 IRTemp cond = newTemp(Ity_I32);
3691
3692 if (m3 == 0) {
3693 } else {
3694 if (m3 == 14) {
3695 always_goto(mkexpr(op4addr));
3696 } else {
3697 assign(op1, get_gpr_dw0(r1));
3698 op2 = (Long)(Char)i2;
3699 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3700 mktemp(Ity_I64, mkU64((ULong)op2))));
3701 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3702 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3703 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3704 mkU32(0)), mkexpr(op4addr));
3705 }
3706 }
3707
3708 return "cgib";
3709}
3710
3711static HChar *
3712s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3713{
3714 IRTemp op1 = newTemp(Ity_I32);
3715 Int op2;
3716 IRTemp icc = newTemp(Ity_I32);
3717 IRTemp cond = newTemp(Ity_I32);
3718
3719 if (m3 == 0) {
3720 } else {
3721 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003722 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003723 } else {
3724 assign(op1, get_gpr_w1(r1));
3725 op2 = (Int)(Char)i2;
3726 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3727 mktemp(Ity_I32, mkU32((UInt)op2))));
3728 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3729 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3730 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3731 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3732
3733 }
3734 }
3735
3736 return "cij";
3737}
3738
3739static HChar *
3740s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3741{
3742 IRTemp op1 = newTemp(Ity_I64);
3743 Long op2;
3744 IRTemp icc = newTemp(Ity_I32);
3745 IRTemp cond = newTemp(Ity_I32);
3746
3747 if (m3 == 0) {
3748 } else {
3749 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00003750 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00003751 } else {
3752 assign(op1, get_gpr_dw0(r1));
3753 op2 = (Long)(Char)i2;
3754 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3755 mktemp(Ity_I64, mkU64((ULong)op2))));
3756 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3757 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3758 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3759 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3760
3761 }
3762 }
3763
3764 return "cgij";
3765}
3766
3767static HChar *
3768s390_irgen_CH(UChar r1, IRTemp op2addr)
3769{
3770 IRTemp op1 = newTemp(Ity_I32);
3771 IRTemp op2 = newTemp(Ity_I32);
3772
3773 assign(op1, get_gpr_w1(r1));
3774 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3775 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3776
3777 return "ch";
3778}
3779
3780static HChar *
3781s390_irgen_CHY(UChar r1, IRTemp op2addr)
3782{
3783 IRTemp op1 = newTemp(Ity_I32);
3784 IRTemp op2 = newTemp(Ity_I32);
3785
3786 assign(op1, get_gpr_w1(r1));
3787 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3788 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3789
3790 return "chy";
3791}
3792
3793static HChar *
3794s390_irgen_CGH(UChar r1, IRTemp op2addr)
3795{
3796 IRTemp op1 = newTemp(Ity_I64);
3797 IRTemp op2 = newTemp(Ity_I64);
3798
3799 assign(op1, get_gpr_dw0(r1));
3800 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3801 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3802
3803 return "cgh";
3804}
3805
3806static HChar *
3807s390_irgen_CHI(UChar r1, UShort i2)
3808{
3809 IRTemp op1 = newTemp(Ity_I32);
3810 Int op2;
3811
3812 assign(op1, get_gpr_w1(r1));
3813 op2 = (Int)(Short)i2;
3814 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3815 mkU32((UInt)op2)));
3816
3817 return "chi";
3818}
3819
3820static HChar *
3821s390_irgen_CGHI(UChar r1, UShort i2)
3822{
3823 IRTemp op1 = newTemp(Ity_I64);
3824 Long op2;
3825
3826 assign(op1, get_gpr_dw0(r1));
3827 op2 = (Long)(Short)i2;
3828 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3829 mkU64((ULong)op2)));
3830
3831 return "cghi";
3832}
3833
3834static HChar *
3835s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3836{
3837 IRTemp op1 = newTemp(Ity_I16);
3838 Short op2;
3839
3840 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3841 op2 = (Short)i2;
3842 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3843 mkU16((UShort)op2)));
3844
3845 return "chhsi";
3846}
3847
3848static HChar *
3849s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3850{
3851 IRTemp op1 = newTemp(Ity_I32);
3852 Int op2;
3853
3854 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3855 op2 = (Int)(Short)i2;
3856 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3857 mkU32((UInt)op2)));
3858
3859 return "chsi";
3860}
3861
3862static HChar *
3863s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3864{
3865 IRTemp op1 = newTemp(Ity_I64);
3866 Long op2;
3867
3868 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3869 op2 = (Long)(Short)i2;
3870 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3871 mkU64((ULong)op2)));
3872
3873 return "cghsi";
3874}
3875
3876static HChar *
3877s390_irgen_CHRL(UChar r1, UInt i2)
3878{
3879 IRTemp op1 = newTemp(Ity_I32);
3880 IRTemp op2 = newTemp(Ity_I32);
3881
3882 assign(op1, get_gpr_w1(r1));
3883 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3884 ((ULong)(Long)(Int)i2 << 1)))));
3885 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3886
3887 return "chrl";
3888}
3889
3890static HChar *
3891s390_irgen_CGHRL(UChar r1, UInt i2)
3892{
3893 IRTemp op1 = newTemp(Ity_I64);
3894 IRTemp op2 = newTemp(Ity_I64);
3895
3896 assign(op1, get_gpr_dw0(r1));
3897 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3898 ((ULong)(Long)(Int)i2 << 1)))));
3899 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3900
3901 return "cghrl";
3902}
3903
3904static HChar *
3905s390_irgen_CHHR(UChar r1, UChar r2)
3906{
3907 IRTemp op1 = newTemp(Ity_I32);
3908 IRTemp op2 = newTemp(Ity_I32);
3909
3910 assign(op1, get_gpr_w0(r1));
3911 assign(op2, get_gpr_w0(r2));
3912 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3913
3914 return "chhr";
3915}
3916
3917static HChar *
3918s390_irgen_CHLR(UChar r1, UChar r2)
3919{
3920 IRTemp op1 = newTemp(Ity_I32);
3921 IRTemp op2 = newTemp(Ity_I32);
3922
3923 assign(op1, get_gpr_w0(r1));
3924 assign(op2, get_gpr_w1(r2));
3925 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3926
3927 return "chlr";
3928}
3929
3930static HChar *
3931s390_irgen_CHF(UChar r1, IRTemp op2addr)
3932{
3933 IRTemp op1 = newTemp(Ity_I32);
3934 IRTemp op2 = newTemp(Ity_I32);
3935
3936 assign(op1, get_gpr_w0(r1));
3937 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3938 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3939
3940 return "chf";
3941}
3942
3943static HChar *
3944s390_irgen_CIH(UChar r1, UInt i2)
3945{
3946 IRTemp op1 = newTemp(Ity_I32);
3947 Int op2;
3948
3949 assign(op1, get_gpr_w0(r1));
3950 op2 = (Int)i2;
3951 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3952 mkU32((UInt)op2)));
3953
3954 return "cih";
3955}
3956
3957static HChar *
3958s390_irgen_CLR(UChar r1, UChar r2)
3959{
3960 IRTemp op1 = newTemp(Ity_I32);
3961 IRTemp op2 = newTemp(Ity_I32);
3962
3963 assign(op1, get_gpr_w1(r1));
3964 assign(op2, get_gpr_w1(r2));
3965 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3966
3967 return "clr";
3968}
3969
3970static HChar *
3971s390_irgen_CLGR(UChar r1, UChar r2)
3972{
3973 IRTemp op1 = newTemp(Ity_I64);
3974 IRTemp op2 = newTemp(Ity_I64);
3975
3976 assign(op1, get_gpr_dw0(r1));
3977 assign(op2, get_gpr_dw0(r2));
3978 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3979
3980 return "clgr";
3981}
3982
3983static HChar *
3984s390_irgen_CLGFR(UChar r1, UChar r2)
3985{
3986 IRTemp op1 = newTemp(Ity_I64);
3987 IRTemp op2 = newTemp(Ity_I64);
3988
3989 assign(op1, get_gpr_dw0(r1));
3990 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
3991 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3992
3993 return "clgfr";
3994}
3995
3996static HChar *
3997s390_irgen_CL(UChar r1, IRTemp op2addr)
3998{
3999 IRTemp op1 = newTemp(Ity_I32);
4000 IRTemp op2 = newTemp(Ity_I32);
4001
4002 assign(op1, get_gpr_w1(r1));
4003 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4004 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4005
4006 return "cl";
4007}
4008
4009static HChar *
4010s390_irgen_CLY(UChar r1, IRTemp op2addr)
4011{
4012 IRTemp op1 = newTemp(Ity_I32);
4013 IRTemp op2 = newTemp(Ity_I32);
4014
4015 assign(op1, get_gpr_w1(r1));
4016 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4017 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4018
4019 return "cly";
4020}
4021
4022static HChar *
4023s390_irgen_CLG(UChar r1, IRTemp op2addr)
4024{
4025 IRTemp op1 = newTemp(Ity_I64);
4026 IRTemp op2 = newTemp(Ity_I64);
4027
4028 assign(op1, get_gpr_dw0(r1));
4029 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4030 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4031
4032 return "clg";
4033}
4034
4035static HChar *
4036s390_irgen_CLGF(UChar r1, IRTemp op2addr)
4037{
4038 IRTemp op1 = newTemp(Ity_I64);
4039 IRTemp op2 = newTemp(Ity_I64);
4040
4041 assign(op1, get_gpr_dw0(r1));
4042 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
4043 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4044
4045 return "clgf";
4046}
4047
4048static HChar *
4049s390_irgen_CLFI(UChar r1, UInt i2)
4050{
4051 IRTemp op1 = newTemp(Ity_I32);
4052 UInt op2;
4053
4054 assign(op1, get_gpr_w1(r1));
4055 op2 = i2;
4056 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4057 mkU32(op2)));
4058
4059 return "clfi";
4060}
4061
4062static HChar *
4063s390_irgen_CLGFI(UChar r1, UInt i2)
4064{
4065 IRTemp op1 = newTemp(Ity_I64);
4066 ULong op2;
4067
4068 assign(op1, get_gpr_dw0(r1));
4069 op2 = (ULong)i2;
4070 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4071 mkU64(op2)));
4072
4073 return "clgfi";
4074}
4075
4076static HChar *
4077s390_irgen_CLI(UChar i2, IRTemp op1addr)
4078{
4079 IRTemp op1 = newTemp(Ity_I8);
4080 UChar op2;
4081
4082 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4083 op2 = i2;
4084 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4085 mkU8(op2)));
4086
4087 return "cli";
4088}
4089
4090static HChar *
4091s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4092{
4093 IRTemp op1 = newTemp(Ity_I8);
4094 UChar op2;
4095
4096 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4097 op2 = i2;
4098 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4099 mkU8(op2)));
4100
4101 return "cliy";
4102}
4103
4104static HChar *
4105s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4106{
4107 IRTemp op1 = newTemp(Ity_I32);
4108 UInt op2;
4109
4110 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4111 op2 = (UInt)i2;
4112 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4113 mkU32(op2)));
4114
4115 return "clfhsi";
4116}
4117
4118static HChar *
4119s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4120{
4121 IRTemp op1 = newTemp(Ity_I64);
4122 ULong op2;
4123
4124 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4125 op2 = (ULong)i2;
4126 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4127 mkU64(op2)));
4128
4129 return "clghsi";
4130}
4131
4132static HChar *
4133s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4134{
4135 IRTemp op1 = newTemp(Ity_I16);
4136 UShort op2;
4137
4138 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4139 op2 = i2;
4140 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4141 mkU16(op2)));
4142
4143 return "clhhsi";
4144}
4145
4146static HChar *
4147s390_irgen_CLRL(UChar r1, UInt i2)
4148{
4149 IRTemp op1 = newTemp(Ity_I32);
4150 IRTemp op2 = newTemp(Ity_I32);
4151
4152 assign(op1, get_gpr_w1(r1));
4153 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4154 i2 << 1))));
4155 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4156
4157 return "clrl";
4158}
4159
4160static HChar *
4161s390_irgen_CLGRL(UChar r1, UInt i2)
4162{
4163 IRTemp op1 = newTemp(Ity_I64);
4164 IRTemp op2 = newTemp(Ity_I64);
4165
4166 assign(op1, get_gpr_dw0(r1));
4167 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4168 i2 << 1))));
4169 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4170
4171 return "clgrl";
4172}
4173
4174static HChar *
4175s390_irgen_CLGFRL(UChar r1, UInt i2)
4176{
4177 IRTemp op1 = newTemp(Ity_I64);
4178 IRTemp op2 = newTemp(Ity_I64);
4179
4180 assign(op1, get_gpr_dw0(r1));
4181 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4182 ((ULong)(Long)(Int)i2 << 1)))));
4183 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4184
4185 return "clgfrl";
4186}
4187
4188static HChar *
4189s390_irgen_CLHRL(UChar r1, UInt i2)
4190{
4191 IRTemp op1 = newTemp(Ity_I32);
4192 IRTemp op2 = newTemp(Ity_I32);
4193
4194 assign(op1, get_gpr_w1(r1));
4195 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4196 ((ULong)(Long)(Int)i2 << 1)))));
4197 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4198
4199 return "clhrl";
4200}
4201
4202static HChar *
4203s390_irgen_CLGHRL(UChar r1, UInt i2)
4204{
4205 IRTemp op1 = newTemp(Ity_I64);
4206 IRTemp op2 = newTemp(Ity_I64);
4207
4208 assign(op1, get_gpr_dw0(r1));
4209 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4210 ((ULong)(Long)(Int)i2 << 1)))));
4211 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4212
4213 return "clghrl";
4214}
4215
4216static HChar *
4217s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4218{
4219 IRTemp op1 = newTemp(Ity_I32);
4220 IRTemp op2 = newTemp(Ity_I32);
4221 IRTemp icc = newTemp(Ity_I32);
4222 IRTemp cond = newTemp(Ity_I32);
4223
4224 if (m3 == 0) {
4225 } else {
4226 if (m3 == 14) {
4227 always_goto(mkexpr(op4addr));
4228 } else {
4229 assign(op1, get_gpr_w1(r1));
4230 assign(op2, get_gpr_w1(r2));
4231 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4232 op2));
4233 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4234 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4235 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4236 mkU32(0)), mkexpr(op4addr));
4237 }
4238 }
4239
4240 return "clrb";
4241}
4242
4243static HChar *
4244s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4245{
4246 IRTemp op1 = newTemp(Ity_I64);
4247 IRTemp op2 = newTemp(Ity_I64);
4248 IRTemp icc = newTemp(Ity_I32);
4249 IRTemp cond = newTemp(Ity_I32);
4250
4251 if (m3 == 0) {
4252 } else {
4253 if (m3 == 14) {
4254 always_goto(mkexpr(op4addr));
4255 } else {
4256 assign(op1, get_gpr_dw0(r1));
4257 assign(op2, get_gpr_dw0(r2));
4258 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4259 op2));
4260 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4261 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4262 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4263 mkU32(0)), mkexpr(op4addr));
4264 }
4265 }
4266
4267 return "clgrb";
4268}
4269
4270static HChar *
4271s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4272{
4273 IRTemp op1 = newTemp(Ity_I32);
4274 IRTemp op2 = newTemp(Ity_I32);
4275 IRTemp icc = newTemp(Ity_I32);
4276 IRTemp cond = newTemp(Ity_I32);
4277
4278 if (m3 == 0) {
4279 } else {
4280 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004281 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004282 } else {
4283 assign(op1, get_gpr_w1(r1));
4284 assign(op2, get_gpr_w1(r2));
4285 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4286 op2));
4287 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4288 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4289 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4290 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4291
4292 }
4293 }
4294
4295 return "clrj";
4296}
4297
4298static HChar *
4299s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4300{
4301 IRTemp op1 = newTemp(Ity_I64);
4302 IRTemp op2 = newTemp(Ity_I64);
4303 IRTemp icc = newTemp(Ity_I32);
4304 IRTemp cond = newTemp(Ity_I32);
4305
4306 if (m3 == 0) {
4307 } else {
4308 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004309 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004310 } else {
4311 assign(op1, get_gpr_dw0(r1));
4312 assign(op2, get_gpr_dw0(r2));
4313 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4314 op2));
4315 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4316 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4317 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4318 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4319
4320 }
4321 }
4322
4323 return "clgrj";
4324}
4325
4326static HChar *
4327s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4328{
4329 IRTemp op1 = newTemp(Ity_I32);
4330 UInt op2;
4331 IRTemp icc = newTemp(Ity_I32);
4332 IRTemp cond = newTemp(Ity_I32);
4333
4334 if (m3 == 0) {
4335 } else {
4336 if (m3 == 14) {
4337 always_goto(mkexpr(op4addr));
4338 } else {
4339 assign(op1, get_gpr_w1(r1));
4340 op2 = (UInt)i2;
4341 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4342 mktemp(Ity_I32, mkU32(op2))));
4343 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4344 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4345 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4346 mkU32(0)), mkexpr(op4addr));
4347 }
4348 }
4349
4350 return "clib";
4351}
4352
4353static HChar *
4354s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4355{
4356 IRTemp op1 = newTemp(Ity_I64);
4357 ULong op2;
4358 IRTemp icc = newTemp(Ity_I32);
4359 IRTemp cond = newTemp(Ity_I32);
4360
4361 if (m3 == 0) {
4362 } else {
4363 if (m3 == 14) {
4364 always_goto(mkexpr(op4addr));
4365 } else {
4366 assign(op1, get_gpr_dw0(r1));
4367 op2 = (ULong)i2;
4368 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4369 mktemp(Ity_I64, mkU64(op2))));
4370 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4371 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4372 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4373 mkU32(0)), mkexpr(op4addr));
4374 }
4375 }
4376
4377 return "clgib";
4378}
4379
4380static HChar *
4381s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4382{
4383 IRTemp op1 = newTemp(Ity_I32);
4384 UInt op2;
4385 IRTemp icc = newTemp(Ity_I32);
4386 IRTemp cond = newTemp(Ity_I32);
4387
4388 if (m3 == 0) {
4389 } else {
4390 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004391 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004392 } else {
4393 assign(op1, get_gpr_w1(r1));
4394 op2 = (UInt)i2;
4395 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4396 mktemp(Ity_I32, mkU32(op2))));
4397 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4398 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4399 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4400 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4401
4402 }
4403 }
4404
4405 return "clij";
4406}
4407
4408static HChar *
4409s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4410{
4411 IRTemp op1 = newTemp(Ity_I64);
4412 ULong op2;
4413 IRTemp icc = newTemp(Ity_I32);
4414 IRTemp cond = newTemp(Ity_I32);
4415
4416 if (m3 == 0) {
4417 } else {
4418 if (m3 == 14) {
floriana64c2432011-07-16 02:11:50 +00004419 always_goto_and_chase(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
sewardj2019a972011-03-07 16:04:07 +00004420 } else {
4421 assign(op1, get_gpr_dw0(r1));
4422 op2 = (ULong)i2;
4423 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4424 mktemp(Ity_I64, mkU64(op2))));
4425 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4426 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4427 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4428 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4429
4430 }
4431 }
4432
4433 return "clgij";
4434}
4435
4436static HChar *
4437s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4438{
4439 IRTemp op1 = newTemp(Ity_I32);
4440 IRTemp op2 = newTemp(Ity_I32);
4441 IRTemp b0 = newTemp(Ity_I32);
4442 IRTemp b1 = newTemp(Ity_I32);
4443 IRTemp b2 = newTemp(Ity_I32);
4444 IRTemp b3 = newTemp(Ity_I32);
4445 IRTemp c0 = newTemp(Ity_I32);
4446 IRTemp c1 = newTemp(Ity_I32);
4447 IRTemp c2 = newTemp(Ity_I32);
4448 IRTemp c3 = newTemp(Ity_I32);
4449 UChar n;
4450
4451 n = 0;
4452 if ((r3 & 8) != 0) {
4453 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4454 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4455 n = n + 1;
4456 } else {
4457 assign(b0, mkU32(0));
4458 assign(c0, mkU32(0));
4459 }
4460 if ((r3 & 4) != 0) {
4461 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4462 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4463 mkU64(n)))));
4464 n = n + 1;
4465 } else {
4466 assign(b1, mkU32(0));
4467 assign(c1, mkU32(0));
4468 }
4469 if ((r3 & 2) != 0) {
4470 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4471 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4472 mkU64(n)))));
4473 n = n + 1;
4474 } else {
4475 assign(b2, mkU32(0));
4476 assign(c2, mkU32(0));
4477 }
4478 if ((r3 & 1) != 0) {
4479 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4480 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4481 mkU64(n)))));
4482 n = n + 1;
4483 } else {
4484 assign(b3, mkU32(0));
4485 assign(c3, mkU32(0));
4486 }
4487 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4488 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4489 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4490 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4491 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4492 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4493 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4494
4495 return "clm";
4496}
4497
4498static HChar *
4499s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4500{
4501 IRTemp op1 = newTemp(Ity_I32);
4502 IRTemp op2 = newTemp(Ity_I32);
4503 IRTemp b0 = newTemp(Ity_I32);
4504 IRTemp b1 = newTemp(Ity_I32);
4505 IRTemp b2 = newTemp(Ity_I32);
4506 IRTemp b3 = newTemp(Ity_I32);
4507 IRTemp c0 = newTemp(Ity_I32);
4508 IRTemp c1 = newTemp(Ity_I32);
4509 IRTemp c2 = newTemp(Ity_I32);
4510 IRTemp c3 = newTemp(Ity_I32);
4511 UChar n;
4512
4513 n = 0;
4514 if ((r3 & 8) != 0) {
4515 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4516 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4517 n = n + 1;
4518 } else {
4519 assign(b0, mkU32(0));
4520 assign(c0, mkU32(0));
4521 }
4522 if ((r3 & 4) != 0) {
4523 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4524 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4525 mkU64(n)))));
4526 n = n + 1;
4527 } else {
4528 assign(b1, mkU32(0));
4529 assign(c1, mkU32(0));
4530 }
4531 if ((r3 & 2) != 0) {
4532 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4533 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4534 mkU64(n)))));
4535 n = n + 1;
4536 } else {
4537 assign(b2, mkU32(0));
4538 assign(c2, mkU32(0));
4539 }
4540 if ((r3 & 1) != 0) {
4541 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4542 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4543 mkU64(n)))));
4544 n = n + 1;
4545 } else {
4546 assign(b3, mkU32(0));
4547 assign(c3, mkU32(0));
4548 }
4549 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4550 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4551 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4552 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4553 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4554 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4555 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4556
4557 return "clmy";
4558}
4559
4560static HChar *
4561s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4562{
4563 IRTemp op1 = newTemp(Ity_I32);
4564 IRTemp op2 = newTemp(Ity_I32);
4565 IRTemp b0 = newTemp(Ity_I32);
4566 IRTemp b1 = newTemp(Ity_I32);
4567 IRTemp b2 = newTemp(Ity_I32);
4568 IRTemp b3 = newTemp(Ity_I32);
4569 IRTemp c0 = newTemp(Ity_I32);
4570 IRTemp c1 = newTemp(Ity_I32);
4571 IRTemp c2 = newTemp(Ity_I32);
4572 IRTemp c3 = newTemp(Ity_I32);
4573 UChar n;
4574
4575 n = 0;
4576 if ((r3 & 8) != 0) {
4577 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4578 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4579 n = n + 1;
4580 } else {
4581 assign(b0, mkU32(0));
4582 assign(c0, mkU32(0));
4583 }
4584 if ((r3 & 4) != 0) {
4585 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4586 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4587 mkU64(n)))));
4588 n = n + 1;
4589 } else {
4590 assign(b1, mkU32(0));
4591 assign(c1, mkU32(0));
4592 }
4593 if ((r3 & 2) != 0) {
4594 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4595 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4596 mkU64(n)))));
4597 n = n + 1;
4598 } else {
4599 assign(b2, mkU32(0));
4600 assign(c2, mkU32(0));
4601 }
4602 if ((r3 & 1) != 0) {
4603 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4604 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4605 mkU64(n)))));
4606 n = n + 1;
4607 } else {
4608 assign(b3, mkU32(0));
4609 assign(c3, mkU32(0));
4610 }
4611 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4612 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4613 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4614 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4615 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4616 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4617 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4618
4619 return "clmh";
4620}
4621
4622static HChar *
4623s390_irgen_CLHHR(UChar r1, UChar r2)
4624{
4625 IRTemp op1 = newTemp(Ity_I32);
4626 IRTemp op2 = newTemp(Ity_I32);
4627
4628 assign(op1, get_gpr_w0(r1));
4629 assign(op2, get_gpr_w0(r2));
4630 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4631
4632 return "clhhr";
4633}
4634
4635static HChar *
4636s390_irgen_CLHLR(UChar r1, UChar r2)
4637{
4638 IRTemp op1 = newTemp(Ity_I32);
4639 IRTemp op2 = newTemp(Ity_I32);
4640
4641 assign(op1, get_gpr_w0(r1));
4642 assign(op2, get_gpr_w1(r2));
4643 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4644
4645 return "clhlr";
4646}
4647
4648static HChar *
4649s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4650{
4651 IRTemp op1 = newTemp(Ity_I32);
4652 IRTemp op2 = newTemp(Ity_I32);
4653
4654 assign(op1, get_gpr_w0(r1));
4655 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4656 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4657
4658 return "clhf";
4659}
4660
4661static HChar *
4662s390_irgen_CLIH(UChar r1, UInt i2)
4663{
4664 IRTemp op1 = newTemp(Ity_I32);
4665 UInt op2;
4666
4667 assign(op1, get_gpr_w0(r1));
4668 op2 = i2;
4669 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4670 mkU32(op2)));
4671
4672 return "clih";
4673}
4674
4675static HChar *
4676s390_irgen_CPYA(UChar r1, UChar r2)
4677{
4678 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004679 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004680 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4681
4682 return "cpya";
4683}
4684
4685static HChar *
4686s390_irgen_XR(UChar r1, UChar r2)
4687{
4688 IRTemp op1 = newTemp(Ity_I32);
4689 IRTemp op2 = newTemp(Ity_I32);
4690 IRTemp result = newTemp(Ity_I32);
4691
4692 if (r1 == r2) {
4693 assign(result, mkU32(0));
4694 } else {
4695 assign(op1, get_gpr_w1(r1));
4696 assign(op2, get_gpr_w1(r2));
4697 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4698 }
4699 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4700 put_gpr_w1(r1, mkexpr(result));
4701
4702 return "xr";
4703}
4704
4705static HChar *
4706s390_irgen_XGR(UChar r1, UChar r2)
4707{
4708 IRTemp op1 = newTemp(Ity_I64);
4709 IRTemp op2 = newTemp(Ity_I64);
4710 IRTemp result = newTemp(Ity_I64);
4711
4712 if (r1 == r2) {
4713 assign(result, mkU64(0));
4714 } else {
4715 assign(op1, get_gpr_dw0(r1));
4716 assign(op2, get_gpr_dw0(r2));
4717 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4718 }
4719 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4720 put_gpr_dw0(r1, mkexpr(result));
4721
4722 return "xgr";
4723}
4724
4725static HChar *
4726s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4727{
4728 IRTemp op2 = newTemp(Ity_I32);
4729 IRTemp op3 = newTemp(Ity_I32);
4730 IRTemp result = newTemp(Ity_I32);
4731
4732 assign(op2, get_gpr_w1(r2));
4733 assign(op3, get_gpr_w1(r3));
4734 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4735 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4736 put_gpr_w1(r1, mkexpr(result));
4737
4738 return "xrk";
4739}
4740
4741static HChar *
4742s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4743{
4744 IRTemp op2 = newTemp(Ity_I64);
4745 IRTemp op3 = newTemp(Ity_I64);
4746 IRTemp result = newTemp(Ity_I64);
4747
4748 assign(op2, get_gpr_dw0(r2));
4749 assign(op3, get_gpr_dw0(r3));
4750 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4751 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4752 put_gpr_dw0(r1, mkexpr(result));
4753
4754 return "xgrk";
4755}
4756
4757static HChar *
4758s390_irgen_X(UChar r1, IRTemp op2addr)
4759{
4760 IRTemp op1 = newTemp(Ity_I32);
4761 IRTemp op2 = newTemp(Ity_I32);
4762 IRTemp result = newTemp(Ity_I32);
4763
4764 assign(op1, get_gpr_w1(r1));
4765 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4766 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4767 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4768 put_gpr_w1(r1, mkexpr(result));
4769
4770 return "x";
4771}
4772
4773static HChar *
4774s390_irgen_XY(UChar r1, IRTemp op2addr)
4775{
4776 IRTemp op1 = newTemp(Ity_I32);
4777 IRTemp op2 = newTemp(Ity_I32);
4778 IRTemp result = newTemp(Ity_I32);
4779
4780 assign(op1, get_gpr_w1(r1));
4781 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4782 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4783 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4784 put_gpr_w1(r1, mkexpr(result));
4785
4786 return "xy";
4787}
4788
4789static HChar *
4790s390_irgen_XG(UChar r1, IRTemp op2addr)
4791{
4792 IRTemp op1 = newTemp(Ity_I64);
4793 IRTemp op2 = newTemp(Ity_I64);
4794 IRTemp result = newTemp(Ity_I64);
4795
4796 assign(op1, get_gpr_dw0(r1));
4797 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4798 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4799 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4800 put_gpr_dw0(r1, mkexpr(result));
4801
4802 return "xg";
4803}
4804
4805static HChar *
4806s390_irgen_XI(UChar i2, IRTemp op1addr)
4807{
4808 IRTemp op1 = newTemp(Ity_I8);
4809 UChar op2;
4810 IRTemp result = newTemp(Ity_I8);
4811
4812 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4813 op2 = i2;
4814 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4815 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4816 store(mkexpr(op1addr), mkexpr(result));
4817
4818 return "xi";
4819}
4820
4821static HChar *
4822s390_irgen_XIY(UChar i2, IRTemp op1addr)
4823{
4824 IRTemp op1 = newTemp(Ity_I8);
4825 UChar op2;
4826 IRTemp result = newTemp(Ity_I8);
4827
4828 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4829 op2 = i2;
4830 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4831 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4832 store(mkexpr(op1addr), mkexpr(result));
4833
4834 return "xiy";
4835}
4836
4837static HChar *
4838s390_irgen_XIHF(UChar r1, UInt i2)
4839{
4840 IRTemp op1 = newTemp(Ity_I32);
4841 UInt op2;
4842 IRTemp result = newTemp(Ity_I32);
4843
4844 assign(op1, get_gpr_w0(r1));
4845 op2 = i2;
4846 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4847 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4848 put_gpr_w0(r1, mkexpr(result));
4849
4850 return "xihf";
4851}
4852
4853static HChar *
4854s390_irgen_XILF(UChar r1, UInt i2)
4855{
4856 IRTemp op1 = newTemp(Ity_I32);
4857 UInt op2;
4858 IRTemp result = newTemp(Ity_I32);
4859
4860 assign(op1, get_gpr_w1(r1));
4861 op2 = i2;
4862 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4863 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4864 put_gpr_w1(r1, mkexpr(result));
4865
4866 return "xilf";
4867}
4868
4869static HChar *
4870s390_irgen_EAR(UChar r1, UChar r2)
4871{
4872 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004873 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004874 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4875
4876 return "ear";
4877}
4878
4879static HChar *
4880s390_irgen_IC(UChar r1, IRTemp op2addr)
4881{
4882 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4883
4884 return "ic";
4885}
4886
4887static HChar *
4888s390_irgen_ICY(UChar r1, IRTemp op2addr)
4889{
4890 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4891
4892 return "icy";
4893}
4894
4895static HChar *
4896s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4897{
4898 UChar n;
4899 IRTemp result = newTemp(Ity_I32);
4900 UInt mask;
4901
4902 n = 0;
4903 mask = (UInt)r3;
4904 if ((mask & 8) != 0) {
4905 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4906 n = n + 1;
4907 }
4908 if ((mask & 4) != 0) {
4909 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4910
4911 n = n + 1;
4912 }
4913 if ((mask & 2) != 0) {
4914 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4915
4916 n = n + 1;
4917 }
4918 if ((mask & 1) != 0) {
4919 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4920
4921 n = n + 1;
4922 }
4923 assign(result, get_gpr_w1(r1));
4924 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4925 mkU32(mask)));
4926
4927 return "icm";
4928}
4929
4930static HChar *
4931s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4932{
4933 UChar n;
4934 IRTemp result = newTemp(Ity_I32);
4935 UInt mask;
4936
4937 n = 0;
4938 mask = (UInt)r3;
4939 if ((mask & 8) != 0) {
4940 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4941 n = n + 1;
4942 }
4943 if ((mask & 4) != 0) {
4944 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4945
4946 n = n + 1;
4947 }
4948 if ((mask & 2) != 0) {
4949 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4950
4951 n = n + 1;
4952 }
4953 if ((mask & 1) != 0) {
4954 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4955
4956 n = n + 1;
4957 }
4958 assign(result, get_gpr_w1(r1));
4959 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4960 mkU32(mask)));
4961
4962 return "icmy";
4963}
4964
4965static HChar *
4966s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
4967{
4968 UChar n;
4969 IRTemp result = newTemp(Ity_I32);
4970 UInt mask;
4971
4972 n = 0;
4973 mask = (UInt)r3;
4974 if ((mask & 8) != 0) {
4975 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
4976 n = n + 1;
4977 }
4978 if ((mask & 4) != 0) {
4979 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4980
4981 n = n + 1;
4982 }
4983 if ((mask & 2) != 0) {
4984 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4985
4986 n = n + 1;
4987 }
4988 if ((mask & 1) != 0) {
4989 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4990
4991 n = n + 1;
4992 }
4993 assign(result, get_gpr_w0(r1));
4994 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4995 mkU32(mask)));
4996
4997 return "icmh";
4998}
4999
5000static HChar *
5001s390_irgen_IIHF(UChar r1, UInt i2)
5002{
5003 put_gpr_w0(r1, mkU32(i2));
5004
5005 return "iihf";
5006}
5007
5008static HChar *
5009s390_irgen_IIHH(UChar r1, UShort i2)
5010{
5011 put_gpr_hw0(r1, mkU16(i2));
5012
5013 return "iihh";
5014}
5015
5016static HChar *
5017s390_irgen_IIHL(UChar r1, UShort i2)
5018{
5019 put_gpr_hw1(r1, mkU16(i2));
5020
5021 return "iihl";
5022}
5023
5024static HChar *
5025s390_irgen_IILF(UChar r1, UInt i2)
5026{
5027 put_gpr_w1(r1, mkU32(i2));
5028
5029 return "iilf";
5030}
5031
5032static HChar *
5033s390_irgen_IILH(UChar r1, UShort i2)
5034{
5035 put_gpr_hw2(r1, mkU16(i2));
5036
5037 return "iilh";
5038}
5039
5040static HChar *
5041s390_irgen_IILL(UChar r1, UShort i2)
5042{
5043 put_gpr_hw3(r1, mkU16(i2));
5044
5045 return "iill";
5046}
5047
5048static HChar *
5049s390_irgen_LR(UChar r1, UChar r2)
5050{
5051 put_gpr_w1(r1, get_gpr_w1(r2));
5052
5053 return "lr";
5054}
5055
5056static HChar *
5057s390_irgen_LGR(UChar r1, UChar r2)
5058{
5059 put_gpr_dw0(r1, get_gpr_dw0(r2));
5060
5061 return "lgr";
5062}
5063
5064static HChar *
5065s390_irgen_LGFR(UChar r1, UChar r2)
5066{
5067 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5068
5069 return "lgfr";
5070}
5071
5072static HChar *
5073s390_irgen_L(UChar r1, IRTemp op2addr)
5074{
5075 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5076
5077 return "l";
5078}
5079
5080static HChar *
5081s390_irgen_LY(UChar r1, IRTemp op2addr)
5082{
5083 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5084
5085 return "ly";
5086}
5087
5088static HChar *
5089s390_irgen_LG(UChar r1, IRTemp op2addr)
5090{
5091 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5092
5093 return "lg";
5094}
5095
5096static HChar *
5097s390_irgen_LGF(UChar r1, IRTemp op2addr)
5098{
5099 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5100
5101 return "lgf";
5102}
5103
5104static HChar *
5105s390_irgen_LGFI(UChar r1, UInt i2)
5106{
5107 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5108
5109 return "lgfi";
5110}
5111
5112static HChar *
5113s390_irgen_LRL(UChar r1, UInt i2)
5114{
5115 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5116 i2 << 1))));
5117
5118 return "lrl";
5119}
5120
5121static HChar *
5122s390_irgen_LGRL(UChar r1, UInt i2)
5123{
5124 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5125 i2 << 1))));
5126
5127 return "lgrl";
5128}
5129
5130static HChar *
5131s390_irgen_LGFRL(UChar r1, UInt i2)
5132{
5133 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5134 ((ULong)(Long)(Int)i2 << 1)))));
5135
5136 return "lgfrl";
5137}
5138
5139static HChar *
5140s390_irgen_LA(UChar r1, IRTemp op2addr)
5141{
5142 put_gpr_dw0(r1, mkexpr(op2addr));
5143
5144 return "la";
5145}
5146
5147static HChar *
5148s390_irgen_LAY(UChar r1, IRTemp op2addr)
5149{
5150 put_gpr_dw0(r1, mkexpr(op2addr));
5151
5152 return "lay";
5153}
5154
5155static HChar *
5156s390_irgen_LAE(UChar r1, IRTemp op2addr)
5157{
5158 put_gpr_dw0(r1, mkexpr(op2addr));
5159
5160 return "lae";
5161}
5162
5163static HChar *
5164s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5165{
5166 put_gpr_dw0(r1, mkexpr(op2addr));
5167
5168 return "laey";
5169}
5170
5171static HChar *
5172s390_irgen_LARL(UChar r1, UInt i2)
5173{
5174 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5175
5176 return "larl";
5177}
5178
5179static HChar *
5180s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5181{
5182 IRTemp op2 = newTemp(Ity_I32);
5183 IRTemp op3 = newTemp(Ity_I32);
5184 IRTemp result = newTemp(Ity_I32);
5185
5186 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5187 assign(op3, get_gpr_w1(r3));
5188 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5189 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5190 store(mkexpr(op2addr), mkexpr(result));
5191 put_gpr_w1(r1, mkexpr(op2));
5192
5193 return "laa";
5194}
5195
5196static HChar *
5197s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5198{
5199 IRTemp op2 = newTemp(Ity_I64);
5200 IRTemp op3 = newTemp(Ity_I64);
5201 IRTemp result = newTemp(Ity_I64);
5202
5203 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5204 assign(op3, get_gpr_dw0(r3));
5205 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5206 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5207 store(mkexpr(op2addr), mkexpr(result));
5208 put_gpr_dw0(r1, mkexpr(op2));
5209
5210 return "laag";
5211}
5212
5213static HChar *
5214s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5215{
5216 IRTemp op2 = newTemp(Ity_I32);
5217 IRTemp op3 = newTemp(Ity_I32);
5218 IRTemp result = newTemp(Ity_I32);
5219
5220 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5221 assign(op3, get_gpr_w1(r3));
5222 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5223 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5224 store(mkexpr(op2addr), mkexpr(result));
5225 put_gpr_w1(r1, mkexpr(op2));
5226
5227 return "laal";
5228}
5229
5230static HChar *
5231s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5232{
5233 IRTemp op2 = newTemp(Ity_I64);
5234 IRTemp op3 = newTemp(Ity_I64);
5235 IRTemp result = newTemp(Ity_I64);
5236
5237 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5238 assign(op3, get_gpr_dw0(r3));
5239 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5240 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5241 store(mkexpr(op2addr), mkexpr(result));
5242 put_gpr_dw0(r1, mkexpr(op2));
5243
5244 return "laalg";
5245}
5246
5247static HChar *
5248s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5249{
5250 IRTemp op2 = newTemp(Ity_I32);
5251 IRTemp op3 = newTemp(Ity_I32);
5252 IRTemp result = newTemp(Ity_I32);
5253
5254 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5255 assign(op3, get_gpr_w1(r3));
5256 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5257 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5258 store(mkexpr(op2addr), mkexpr(result));
5259 put_gpr_w1(r1, mkexpr(op2));
5260
5261 return "lan";
5262}
5263
5264static HChar *
5265s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5266{
5267 IRTemp op2 = newTemp(Ity_I64);
5268 IRTemp op3 = newTemp(Ity_I64);
5269 IRTemp result = newTemp(Ity_I64);
5270
5271 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5272 assign(op3, get_gpr_dw0(r3));
5273 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5274 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5275 store(mkexpr(op2addr), mkexpr(result));
5276 put_gpr_dw0(r1, mkexpr(op2));
5277
5278 return "lang";
5279}
5280
5281static HChar *
5282s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5283{
5284 IRTemp op2 = newTemp(Ity_I32);
5285 IRTemp op3 = newTemp(Ity_I32);
5286 IRTemp result = newTemp(Ity_I32);
5287
5288 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5289 assign(op3, get_gpr_w1(r3));
5290 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5291 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5292 store(mkexpr(op2addr), mkexpr(result));
5293 put_gpr_w1(r1, mkexpr(op2));
5294
5295 return "lax";
5296}
5297
5298static HChar *
5299s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5300{
5301 IRTemp op2 = newTemp(Ity_I64);
5302 IRTemp op3 = newTemp(Ity_I64);
5303 IRTemp result = newTemp(Ity_I64);
5304
5305 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5306 assign(op3, get_gpr_dw0(r3));
5307 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5308 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5309 store(mkexpr(op2addr), mkexpr(result));
5310 put_gpr_dw0(r1, mkexpr(op2));
5311
5312 return "laxg";
5313}
5314
5315static HChar *
5316s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5317{
5318 IRTemp op2 = newTemp(Ity_I32);
5319 IRTemp op3 = newTemp(Ity_I32);
5320 IRTemp result = newTemp(Ity_I32);
5321
5322 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5323 assign(op3, get_gpr_w1(r3));
5324 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5325 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5326 store(mkexpr(op2addr), mkexpr(result));
5327 put_gpr_w1(r1, mkexpr(op2));
5328
5329 return "lao";
5330}
5331
5332static HChar *
5333s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5334{
5335 IRTemp op2 = newTemp(Ity_I64);
5336 IRTemp op3 = newTemp(Ity_I64);
5337 IRTemp result = newTemp(Ity_I64);
5338
5339 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5340 assign(op3, get_gpr_dw0(r3));
5341 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5342 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5343 store(mkexpr(op2addr), mkexpr(result));
5344 put_gpr_dw0(r1, mkexpr(op2));
5345
5346 return "laog";
5347}
5348
5349static HChar *
5350s390_irgen_LTR(UChar r1, UChar r2)
5351{
5352 IRTemp op2 = newTemp(Ity_I32);
5353
5354 assign(op2, get_gpr_w1(r2));
5355 put_gpr_w1(r1, mkexpr(op2));
5356 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5357
5358 return "ltr";
5359}
5360
5361static HChar *
5362s390_irgen_LTGR(UChar r1, UChar r2)
5363{
5364 IRTemp op2 = newTemp(Ity_I64);
5365
5366 assign(op2, get_gpr_dw0(r2));
5367 put_gpr_dw0(r1, mkexpr(op2));
5368 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5369
5370 return "ltgr";
5371}
5372
5373static HChar *
5374s390_irgen_LTGFR(UChar r1, UChar r2)
5375{
5376 IRTemp op2 = newTemp(Ity_I64);
5377
5378 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5379 put_gpr_dw0(r1, mkexpr(op2));
5380 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5381
5382 return "ltgfr";
5383}
5384
5385static HChar *
5386s390_irgen_LT(UChar r1, IRTemp op2addr)
5387{
5388 IRTemp op2 = newTemp(Ity_I32);
5389
5390 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5391 put_gpr_w1(r1, mkexpr(op2));
5392 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5393
5394 return "lt";
5395}
5396
5397static HChar *
5398s390_irgen_LTG(UChar r1, IRTemp op2addr)
5399{
5400 IRTemp op2 = newTemp(Ity_I64);
5401
5402 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5403 put_gpr_dw0(r1, mkexpr(op2));
5404 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5405
5406 return "ltg";
5407}
5408
5409static HChar *
5410s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5411{
5412 IRTemp op2 = newTemp(Ity_I64);
5413
5414 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5415 put_gpr_dw0(r1, mkexpr(op2));
5416 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5417
5418 return "ltgf";
5419}
5420
5421static HChar *
5422s390_irgen_LBR(UChar r1, UChar r2)
5423{
5424 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5425
5426 return "lbr";
5427}
5428
5429static HChar *
5430s390_irgen_LGBR(UChar r1, UChar r2)
5431{
5432 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5433
5434 return "lgbr";
5435}
5436
5437static HChar *
5438s390_irgen_LB(UChar r1, IRTemp op2addr)
5439{
5440 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5441
5442 return "lb";
5443}
5444
5445static HChar *
5446s390_irgen_LGB(UChar r1, IRTemp op2addr)
5447{
5448 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5449
5450 return "lgb";
5451}
5452
5453static HChar *
5454s390_irgen_LBH(UChar r1, IRTemp op2addr)
5455{
5456 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5457
5458 return "lbh";
5459}
5460
5461static HChar *
5462s390_irgen_LCR(UChar r1, UChar r2)
5463{
5464 Int op1;
5465 IRTemp op2 = newTemp(Ity_I32);
5466 IRTemp result = newTemp(Ity_I32);
5467
5468 op1 = 0;
5469 assign(op2, get_gpr_w1(r2));
5470 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5471 put_gpr_w1(r1, mkexpr(result));
5472 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5473 op1)), op2);
5474
5475 return "lcr";
5476}
5477
5478static HChar *
5479s390_irgen_LCGR(UChar r1, UChar r2)
5480{
5481 Long op1;
5482 IRTemp op2 = newTemp(Ity_I64);
5483 IRTemp result = newTemp(Ity_I64);
5484
5485 op1 = 0ULL;
5486 assign(op2, get_gpr_dw0(r2));
5487 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5488 put_gpr_dw0(r1, mkexpr(result));
5489 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5490 op1)), op2);
5491
5492 return "lcgr";
5493}
5494
5495static HChar *
5496s390_irgen_LCGFR(UChar r1, UChar r2)
5497{
5498 Long op1;
5499 IRTemp op2 = newTemp(Ity_I64);
5500 IRTemp result = newTemp(Ity_I64);
5501
5502 op1 = 0ULL;
5503 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5504 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5505 put_gpr_dw0(r1, mkexpr(result));
5506 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5507 op1)), op2);
5508
5509 return "lcgfr";
5510}
5511
5512static HChar *
5513s390_irgen_LHR(UChar r1, UChar r2)
5514{
5515 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5516
5517 return "lhr";
5518}
5519
5520static HChar *
5521s390_irgen_LGHR(UChar r1, UChar r2)
5522{
5523 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5524
5525 return "lghr";
5526}
5527
5528static HChar *
5529s390_irgen_LH(UChar r1, IRTemp op2addr)
5530{
5531 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5532
5533 return "lh";
5534}
5535
5536static HChar *
5537s390_irgen_LHY(UChar r1, IRTemp op2addr)
5538{
5539 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5540
5541 return "lhy";
5542}
5543
5544static HChar *
5545s390_irgen_LGH(UChar r1, IRTemp op2addr)
5546{
5547 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5548
5549 return "lgh";
5550}
5551
5552static HChar *
5553s390_irgen_LHI(UChar r1, UShort i2)
5554{
5555 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5556
5557 return "lhi";
5558}
5559
5560static HChar *
5561s390_irgen_LGHI(UChar r1, UShort i2)
5562{
5563 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5564
5565 return "lghi";
5566}
5567
5568static HChar *
5569s390_irgen_LHRL(UChar r1, UInt i2)
5570{
5571 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5572 ((ULong)(Long)(Int)i2 << 1)))));
5573
5574 return "lhrl";
5575}
5576
5577static HChar *
5578s390_irgen_LGHRL(UChar r1, UInt i2)
5579{
5580 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5581 ((ULong)(Long)(Int)i2 << 1)))));
5582
5583 return "lghrl";
5584}
5585
5586static HChar *
5587s390_irgen_LHH(UChar r1, IRTemp op2addr)
5588{
5589 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5590
5591 return "lhh";
5592}
5593
5594static HChar *
5595s390_irgen_LFH(UChar r1, IRTemp op2addr)
5596{
5597 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5598
5599 return "lfh";
5600}
5601
5602static HChar *
5603s390_irgen_LLGFR(UChar r1, UChar r2)
5604{
5605 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5606
5607 return "llgfr";
5608}
5609
5610static HChar *
5611s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5612{
5613 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5614
5615 return "llgf";
5616}
5617
5618static HChar *
5619s390_irgen_LLGFRL(UChar r1, UInt i2)
5620{
5621 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5622 ((ULong)(Long)(Int)i2 << 1)))));
5623
5624 return "llgfrl";
5625}
5626
5627static HChar *
5628s390_irgen_LLCR(UChar r1, UChar r2)
5629{
5630 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5631
5632 return "llcr";
5633}
5634
5635static HChar *
5636s390_irgen_LLGCR(UChar r1, UChar r2)
5637{
5638 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5639
5640 return "llgcr";
5641}
5642
5643static HChar *
5644s390_irgen_LLC(UChar r1, IRTemp op2addr)
5645{
5646 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5647
5648 return "llc";
5649}
5650
5651static HChar *
5652s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5653{
5654 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5655
5656 return "llgc";
5657}
5658
5659static HChar *
5660s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5661{
5662 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5663
5664 return "llch";
5665}
5666
5667static HChar *
5668s390_irgen_LLHR(UChar r1, UChar r2)
5669{
5670 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5671
5672 return "llhr";
5673}
5674
5675static HChar *
5676s390_irgen_LLGHR(UChar r1, UChar r2)
5677{
5678 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5679
5680 return "llghr";
5681}
5682
5683static HChar *
5684s390_irgen_LLH(UChar r1, IRTemp op2addr)
5685{
5686 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5687
5688 return "llh";
5689}
5690
5691static HChar *
5692s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5693{
5694 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5695
5696 return "llgh";
5697}
5698
5699static HChar *
5700s390_irgen_LLHRL(UChar r1, UInt i2)
5701{
5702 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5703 ((ULong)(Long)(Int)i2 << 1)))));
5704
5705 return "llhrl";
5706}
5707
5708static HChar *
5709s390_irgen_LLGHRL(UChar r1, UInt i2)
5710{
5711 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5712 ((ULong)(Long)(Int)i2 << 1)))));
5713
5714 return "llghrl";
5715}
5716
5717static HChar *
5718s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5719{
5720 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5721
5722 return "llhh";
5723}
5724
5725static HChar *
5726s390_irgen_LLIHF(UChar r1, UInt i2)
5727{
5728 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5729
5730 return "llihf";
5731}
5732
5733static HChar *
5734s390_irgen_LLIHH(UChar r1, UShort i2)
5735{
5736 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5737
5738 return "llihh";
5739}
5740
5741static HChar *
5742s390_irgen_LLIHL(UChar r1, UShort i2)
5743{
5744 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5745
5746 return "llihl";
5747}
5748
5749static HChar *
5750s390_irgen_LLILF(UChar r1, UInt i2)
5751{
5752 put_gpr_dw0(r1, mkU64(i2));
5753
5754 return "llilf";
5755}
5756
5757static HChar *
5758s390_irgen_LLILH(UChar r1, UShort i2)
5759{
5760 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5761
5762 return "llilh";
5763}
5764
5765static HChar *
5766s390_irgen_LLILL(UChar r1, UShort i2)
5767{
5768 put_gpr_dw0(r1, mkU64(i2));
5769
5770 return "llill";
5771}
5772
5773static HChar *
5774s390_irgen_LLGTR(UChar r1, UChar r2)
5775{
5776 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5777 mkU32(2147483647))));
5778
5779 return "llgtr";
5780}
5781
5782static HChar *
5783s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5784{
5785 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5786 mkexpr(op2addr)), mkU32(2147483647))));
5787
5788 return "llgt";
5789}
5790
5791static HChar *
5792s390_irgen_LNR(UChar r1, UChar r2)
5793{
5794 IRTemp op2 = newTemp(Ity_I32);
5795 IRTemp result = newTemp(Ity_I32);
5796
5797 assign(op2, get_gpr_w1(r2));
5798 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5799 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5800 put_gpr_w1(r1, mkexpr(result));
5801 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5802
5803 return "lnr";
5804}
5805
5806static HChar *
5807s390_irgen_LNGR(UChar r1, UChar r2)
5808{
5809 IRTemp op2 = newTemp(Ity_I64);
5810 IRTemp result = newTemp(Ity_I64);
5811
5812 assign(op2, get_gpr_dw0(r2));
5813 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5814 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5815 put_gpr_dw0(r1, mkexpr(result));
5816 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5817
5818 return "lngr";
5819}
5820
5821static HChar *
5822s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5823{
5824 IRTemp op2 = newTemp(Ity_I64);
5825 IRTemp result = newTemp(Ity_I64);
5826
5827 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5828 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5829 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5830 put_gpr_dw0(r1, mkexpr(result));
5831 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5832
5833 return "lngfr";
5834}
5835
5836static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005837s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5838{
5839 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5840 guest_IA_next_instr);
5841 put_gpr_w1(r1, get_gpr_w1(r2));
5842
5843 return "locr";
5844}
5845
5846static HChar *
5847s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5848{
5849 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5850 guest_IA_next_instr);
5851 put_gpr_dw0(r1, get_gpr_dw0(r2));
5852
5853 return "locgr";
5854}
5855
5856static HChar *
5857s390_irgen_LOC(UChar r1, IRTemp op2addr)
5858{
5859 /* condition is checked in format handler */
5860 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5861
5862 return "loc";
5863}
5864
5865static HChar *
5866s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5867{
5868 /* condition is checked in format handler */
5869 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5870
5871 return "locg";
5872}
5873
5874static HChar *
sewardj2019a972011-03-07 16:04:07 +00005875s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5876{
5877 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5878 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5879 ));
5880
5881 return "lpq";
5882}
5883
5884static HChar *
5885s390_irgen_LPR(UChar r1, UChar r2)
5886{
5887 IRTemp op2 = newTemp(Ity_I32);
5888 IRTemp result = newTemp(Ity_I32);
5889
5890 assign(op2, get_gpr_w1(r2));
5891 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5892 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5893 put_gpr_w1(r1, mkexpr(result));
5894 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5895
5896 return "lpr";
5897}
5898
5899static HChar *
5900s390_irgen_LPGR(UChar r1, UChar r2)
5901{
5902 IRTemp op2 = newTemp(Ity_I64);
5903 IRTemp result = newTemp(Ity_I64);
5904
5905 assign(op2, get_gpr_dw0(r2));
5906 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5907 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5908 put_gpr_dw0(r1, mkexpr(result));
5909 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5910
5911 return "lpgr";
5912}
5913
5914static HChar *
5915s390_irgen_LPGFR(UChar r1, UChar r2)
5916{
5917 IRTemp op2 = newTemp(Ity_I64);
5918 IRTemp result = newTemp(Ity_I64);
5919
5920 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5921 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5922 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5923 put_gpr_dw0(r1, mkexpr(result));
5924 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5925
5926 return "lpgfr";
5927}
5928
5929static HChar *
5930s390_irgen_LRVR(UChar r1, UChar r2)
5931{
5932 IRTemp b0 = newTemp(Ity_I8);
5933 IRTemp b1 = newTemp(Ity_I8);
5934 IRTemp b2 = newTemp(Ity_I8);
5935 IRTemp b3 = newTemp(Ity_I8);
5936
5937 assign(b3, get_gpr_b7(r2));
5938 assign(b2, get_gpr_b6(r2));
5939 assign(b1, get_gpr_b5(r2));
5940 assign(b0, get_gpr_b4(r2));
5941 put_gpr_b4(r1, mkexpr(b3));
5942 put_gpr_b5(r1, mkexpr(b2));
5943 put_gpr_b6(r1, mkexpr(b1));
5944 put_gpr_b7(r1, mkexpr(b0));
5945
5946 return "lrvr";
5947}
5948
5949static HChar *
5950s390_irgen_LRVGR(UChar r1, UChar r2)
5951{
5952 IRTemp b0 = newTemp(Ity_I8);
5953 IRTemp b1 = newTemp(Ity_I8);
5954 IRTemp b2 = newTemp(Ity_I8);
5955 IRTemp b3 = newTemp(Ity_I8);
5956 IRTemp b4 = newTemp(Ity_I8);
5957 IRTemp b5 = newTemp(Ity_I8);
5958 IRTemp b6 = newTemp(Ity_I8);
5959 IRTemp b7 = newTemp(Ity_I8);
5960
5961 assign(b7, get_gpr_b7(r2));
5962 assign(b6, get_gpr_b6(r2));
5963 assign(b5, get_gpr_b5(r2));
5964 assign(b4, get_gpr_b4(r2));
5965 assign(b3, get_gpr_b3(r2));
5966 assign(b2, get_gpr_b2(r2));
5967 assign(b1, get_gpr_b1(r2));
5968 assign(b0, get_gpr_b0(r2));
5969 put_gpr_b0(r1, mkexpr(b7));
5970 put_gpr_b1(r1, mkexpr(b6));
5971 put_gpr_b2(r1, mkexpr(b5));
5972 put_gpr_b3(r1, mkexpr(b4));
5973 put_gpr_b4(r1, mkexpr(b3));
5974 put_gpr_b5(r1, mkexpr(b2));
5975 put_gpr_b6(r1, mkexpr(b1));
5976 put_gpr_b7(r1, mkexpr(b0));
5977
5978 return "lrvgr";
5979}
5980
5981static HChar *
5982s390_irgen_LRVH(UChar r1, IRTemp op2addr)
5983{
5984 IRTemp op2 = newTemp(Ity_I16);
5985
5986 assign(op2, load(Ity_I16, mkexpr(op2addr)));
5987 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
5988 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
5989
5990 return "lrvh";
5991}
5992
5993static HChar *
5994s390_irgen_LRV(UChar r1, IRTemp op2addr)
5995{
5996 IRTemp op2 = newTemp(Ity_I32);
5997
5998 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5999 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
6000 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6001 mkU8(8)), mkU32(255))));
6002 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6003 mkU8(16)), mkU32(255))));
6004 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
6005 mkU8(24)), mkU32(255))));
6006
6007 return "lrv";
6008}
6009
6010static HChar *
6011s390_irgen_LRVG(UChar r1, IRTemp op2addr)
6012{
6013 IRTemp op2 = newTemp(Ity_I64);
6014
6015 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6016 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
6017 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6018 mkU8(8)), mkU64(255))));
6019 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6020 mkU8(16)), mkU64(255))));
6021 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6022 mkU8(24)), mkU64(255))));
6023 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6024 mkU8(32)), mkU64(255))));
6025 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6026 mkU8(40)), mkU64(255))));
6027 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6028 mkU8(48)), mkU64(255))));
6029 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
6030 mkU8(56)), mkU64(255))));
6031
6032 return "lrvg";
6033}
6034
6035static HChar *
6036s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
6037{
6038 store(mkexpr(op1addr), mkU16(i2));
6039
6040 return "mvhhi";
6041}
6042
6043static HChar *
6044s390_irgen_MVHI(UShort i2, IRTemp op1addr)
6045{
6046 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
6047
6048 return "mvhi";
6049}
6050
6051static HChar *
6052s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6053{
6054 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6055
6056 return "mvghi";
6057}
6058
6059static HChar *
6060s390_irgen_MVI(UChar i2, IRTemp op1addr)
6061{
6062 store(mkexpr(op1addr), mkU8(i2));
6063
6064 return "mvi";
6065}
6066
6067static HChar *
6068s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6069{
6070 store(mkexpr(op1addr), mkU8(i2));
6071
6072 return "mviy";
6073}
6074
6075static HChar *
6076s390_irgen_MR(UChar r1, UChar r2)
6077{
6078 IRTemp op1 = newTemp(Ity_I32);
6079 IRTemp op2 = newTemp(Ity_I32);
6080 IRTemp result = newTemp(Ity_I64);
6081
6082 assign(op1, get_gpr_w1(r1 + 1));
6083 assign(op2, get_gpr_w1(r2));
6084 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6085 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6086 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6087
6088 return "mr";
6089}
6090
6091static HChar *
6092s390_irgen_M(UChar r1, IRTemp op2addr)
6093{
6094 IRTemp op1 = newTemp(Ity_I32);
6095 IRTemp op2 = newTemp(Ity_I32);
6096 IRTemp result = newTemp(Ity_I64);
6097
6098 assign(op1, get_gpr_w1(r1 + 1));
6099 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6100 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6101 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6102 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6103
6104 return "m";
6105}
6106
6107static HChar *
6108s390_irgen_MFY(UChar r1, IRTemp op2addr)
6109{
6110 IRTemp op1 = newTemp(Ity_I32);
6111 IRTemp op2 = newTemp(Ity_I32);
6112 IRTemp result = newTemp(Ity_I64);
6113
6114 assign(op1, get_gpr_w1(r1 + 1));
6115 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6116 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6117 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6118 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6119
6120 return "mfy";
6121}
6122
6123static HChar *
6124s390_irgen_MH(UChar r1, IRTemp op2addr)
6125{
6126 IRTemp op1 = newTemp(Ity_I32);
6127 IRTemp op2 = newTemp(Ity_I16);
6128 IRTemp result = newTemp(Ity_I64);
6129
6130 assign(op1, get_gpr_w1(r1));
6131 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6132 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6133 ));
6134 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6135
6136 return "mh";
6137}
6138
6139static HChar *
6140s390_irgen_MHY(UChar r1, IRTemp op2addr)
6141{
6142 IRTemp op1 = newTemp(Ity_I32);
6143 IRTemp op2 = newTemp(Ity_I16);
6144 IRTemp result = newTemp(Ity_I64);
6145
6146 assign(op1, get_gpr_w1(r1));
6147 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6148 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6149 ));
6150 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6151
6152 return "mhy";
6153}
6154
6155static HChar *
6156s390_irgen_MHI(UChar r1, UShort i2)
6157{
6158 IRTemp op1 = newTemp(Ity_I32);
6159 Short op2;
6160 IRTemp result = newTemp(Ity_I64);
6161
6162 assign(op1, get_gpr_w1(r1));
6163 op2 = (Short)i2;
6164 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6165 mkU16((UShort)op2))));
6166 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6167
6168 return "mhi";
6169}
6170
6171static HChar *
6172s390_irgen_MGHI(UChar r1, UShort i2)
6173{
6174 IRTemp op1 = newTemp(Ity_I64);
6175 Short op2;
6176 IRTemp result = newTemp(Ity_I128);
6177
6178 assign(op1, get_gpr_dw0(r1));
6179 op2 = (Short)i2;
6180 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6181 mkU16((UShort)op2))));
6182 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6183
6184 return "mghi";
6185}
6186
6187static HChar *
6188s390_irgen_MLR(UChar r1, UChar r2)
6189{
6190 IRTemp op1 = newTemp(Ity_I32);
6191 IRTemp op2 = newTemp(Ity_I32);
6192 IRTemp result = newTemp(Ity_I64);
6193
6194 assign(op1, get_gpr_w1(r1 + 1));
6195 assign(op2, get_gpr_w1(r2));
6196 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6197 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6198 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6199
6200 return "mlr";
6201}
6202
6203static HChar *
6204s390_irgen_MLGR(UChar r1, UChar r2)
6205{
6206 IRTemp op1 = newTemp(Ity_I64);
6207 IRTemp op2 = newTemp(Ity_I64);
6208 IRTemp result = newTemp(Ity_I128);
6209
6210 assign(op1, get_gpr_dw0(r1 + 1));
6211 assign(op2, get_gpr_dw0(r2));
6212 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6213 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6214 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6215
6216 return "mlgr";
6217}
6218
6219static HChar *
6220s390_irgen_ML(UChar r1, IRTemp op2addr)
6221{
6222 IRTemp op1 = newTemp(Ity_I32);
6223 IRTemp op2 = newTemp(Ity_I32);
6224 IRTemp result = newTemp(Ity_I64);
6225
6226 assign(op1, get_gpr_w1(r1 + 1));
6227 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6228 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6229 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6230 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6231
6232 return "ml";
6233}
6234
6235static HChar *
6236s390_irgen_MLG(UChar r1, IRTemp op2addr)
6237{
6238 IRTemp op1 = newTemp(Ity_I64);
6239 IRTemp op2 = newTemp(Ity_I64);
6240 IRTemp result = newTemp(Ity_I128);
6241
6242 assign(op1, get_gpr_dw0(r1 + 1));
6243 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6244 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6245 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6246 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6247
6248 return "mlg";
6249}
6250
6251static HChar *
6252s390_irgen_MSR(UChar r1, UChar r2)
6253{
6254 IRTemp op1 = newTemp(Ity_I32);
6255 IRTemp op2 = newTemp(Ity_I32);
6256 IRTemp result = newTemp(Ity_I64);
6257
6258 assign(op1, get_gpr_w1(r1));
6259 assign(op2, get_gpr_w1(r2));
6260 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6261 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6262
6263 return "msr";
6264}
6265
6266static HChar *
6267s390_irgen_MSGR(UChar r1, UChar r2)
6268{
6269 IRTemp op1 = newTemp(Ity_I64);
6270 IRTemp op2 = newTemp(Ity_I64);
6271 IRTemp result = newTemp(Ity_I128);
6272
6273 assign(op1, get_gpr_dw0(r1));
6274 assign(op2, get_gpr_dw0(r2));
6275 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6276 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6277
6278 return "msgr";
6279}
6280
6281static HChar *
6282s390_irgen_MSGFR(UChar r1, UChar r2)
6283{
6284 IRTemp op1 = newTemp(Ity_I64);
6285 IRTemp op2 = newTemp(Ity_I32);
6286 IRTemp result = newTemp(Ity_I128);
6287
6288 assign(op1, get_gpr_dw0(r1));
6289 assign(op2, get_gpr_w1(r2));
6290 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6291 ));
6292 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6293
6294 return "msgfr";
6295}
6296
6297static HChar *
6298s390_irgen_MS(UChar r1, IRTemp op2addr)
6299{
6300 IRTemp op1 = newTemp(Ity_I32);
6301 IRTemp op2 = newTemp(Ity_I32);
6302 IRTemp result = newTemp(Ity_I64);
6303
6304 assign(op1, get_gpr_w1(r1));
6305 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6306 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6307 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6308
6309 return "ms";
6310}
6311
6312static HChar *
6313s390_irgen_MSY(UChar r1, IRTemp op2addr)
6314{
6315 IRTemp op1 = newTemp(Ity_I32);
6316 IRTemp op2 = newTemp(Ity_I32);
6317 IRTemp result = newTemp(Ity_I64);
6318
6319 assign(op1, get_gpr_w1(r1));
6320 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6321 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6322 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6323
6324 return "msy";
6325}
6326
6327static HChar *
6328s390_irgen_MSG(UChar r1, IRTemp op2addr)
6329{
6330 IRTemp op1 = newTemp(Ity_I64);
6331 IRTemp op2 = newTemp(Ity_I64);
6332 IRTemp result = newTemp(Ity_I128);
6333
6334 assign(op1, get_gpr_dw0(r1));
6335 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6336 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6337 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6338
6339 return "msg";
6340}
6341
6342static HChar *
6343s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6344{
6345 IRTemp op1 = newTemp(Ity_I64);
6346 IRTemp op2 = newTemp(Ity_I32);
6347 IRTemp result = newTemp(Ity_I128);
6348
6349 assign(op1, get_gpr_dw0(r1));
6350 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6351 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6352 ));
6353 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6354
6355 return "msgf";
6356}
6357
6358static HChar *
6359s390_irgen_MSFI(UChar r1, UInt i2)
6360{
6361 IRTemp op1 = newTemp(Ity_I32);
6362 Int op2;
6363 IRTemp result = newTemp(Ity_I64);
6364
6365 assign(op1, get_gpr_w1(r1));
6366 op2 = (Int)i2;
6367 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6368 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6369
6370 return "msfi";
6371}
6372
6373static HChar *
6374s390_irgen_MSGFI(UChar r1, UInt i2)
6375{
6376 IRTemp op1 = newTemp(Ity_I64);
6377 Int op2;
6378 IRTemp result = newTemp(Ity_I128);
6379
6380 assign(op1, get_gpr_dw0(r1));
6381 op2 = (Int)i2;
6382 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6383 op2))));
6384 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6385
6386 return "msgfi";
6387}
6388
6389static HChar *
6390s390_irgen_OR(UChar r1, UChar r2)
6391{
6392 IRTemp op1 = newTemp(Ity_I32);
6393 IRTemp op2 = newTemp(Ity_I32);
6394 IRTemp result = newTemp(Ity_I32);
6395
6396 assign(op1, get_gpr_w1(r1));
6397 assign(op2, get_gpr_w1(r2));
6398 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6399 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6400 put_gpr_w1(r1, mkexpr(result));
6401
6402 return "or";
6403}
6404
6405static HChar *
6406s390_irgen_OGR(UChar r1, UChar r2)
6407{
6408 IRTemp op1 = newTemp(Ity_I64);
6409 IRTemp op2 = newTemp(Ity_I64);
6410 IRTemp result = newTemp(Ity_I64);
6411
6412 assign(op1, get_gpr_dw0(r1));
6413 assign(op2, get_gpr_dw0(r2));
6414 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6415 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6416 put_gpr_dw0(r1, mkexpr(result));
6417
6418 return "ogr";
6419}
6420
6421static HChar *
6422s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6423{
6424 IRTemp op2 = newTemp(Ity_I32);
6425 IRTemp op3 = newTemp(Ity_I32);
6426 IRTemp result = newTemp(Ity_I32);
6427
6428 assign(op2, get_gpr_w1(r2));
6429 assign(op3, get_gpr_w1(r3));
6430 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6431 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6432 put_gpr_w1(r1, mkexpr(result));
6433
6434 return "ork";
6435}
6436
6437static HChar *
6438s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6439{
6440 IRTemp op2 = newTemp(Ity_I64);
6441 IRTemp op3 = newTemp(Ity_I64);
6442 IRTemp result = newTemp(Ity_I64);
6443
6444 assign(op2, get_gpr_dw0(r2));
6445 assign(op3, get_gpr_dw0(r3));
6446 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6447 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6448 put_gpr_dw0(r1, mkexpr(result));
6449
6450 return "ogrk";
6451}
6452
6453static HChar *
6454s390_irgen_O(UChar r1, IRTemp op2addr)
6455{
6456 IRTemp op1 = newTemp(Ity_I32);
6457 IRTemp op2 = newTemp(Ity_I32);
6458 IRTemp result = newTemp(Ity_I32);
6459
6460 assign(op1, get_gpr_w1(r1));
6461 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6462 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6463 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6464 put_gpr_w1(r1, mkexpr(result));
6465
6466 return "o";
6467}
6468
6469static HChar *
6470s390_irgen_OY(UChar r1, IRTemp op2addr)
6471{
6472 IRTemp op1 = newTemp(Ity_I32);
6473 IRTemp op2 = newTemp(Ity_I32);
6474 IRTemp result = newTemp(Ity_I32);
6475
6476 assign(op1, get_gpr_w1(r1));
6477 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6478 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6479 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6480 put_gpr_w1(r1, mkexpr(result));
6481
6482 return "oy";
6483}
6484
6485static HChar *
6486s390_irgen_OG(UChar r1, IRTemp op2addr)
6487{
6488 IRTemp op1 = newTemp(Ity_I64);
6489 IRTemp op2 = newTemp(Ity_I64);
6490 IRTemp result = newTemp(Ity_I64);
6491
6492 assign(op1, get_gpr_dw0(r1));
6493 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6494 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6495 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6496 put_gpr_dw0(r1, mkexpr(result));
6497
6498 return "og";
6499}
6500
6501static HChar *
6502s390_irgen_OI(UChar i2, IRTemp op1addr)
6503{
6504 IRTemp op1 = newTemp(Ity_I8);
6505 UChar op2;
6506 IRTemp result = newTemp(Ity_I8);
6507
6508 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6509 op2 = i2;
6510 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6511 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6512 store(mkexpr(op1addr), mkexpr(result));
6513
6514 return "oi";
6515}
6516
6517static HChar *
6518s390_irgen_OIY(UChar i2, IRTemp op1addr)
6519{
6520 IRTemp op1 = newTemp(Ity_I8);
6521 UChar op2;
6522 IRTemp result = newTemp(Ity_I8);
6523
6524 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6525 op2 = i2;
6526 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6527 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6528 store(mkexpr(op1addr), mkexpr(result));
6529
6530 return "oiy";
6531}
6532
6533static HChar *
6534s390_irgen_OIHF(UChar r1, UInt i2)
6535{
6536 IRTemp op1 = newTemp(Ity_I32);
6537 UInt op2;
6538 IRTemp result = newTemp(Ity_I32);
6539
6540 assign(op1, get_gpr_w0(r1));
6541 op2 = i2;
6542 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6543 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6544 put_gpr_w0(r1, mkexpr(result));
6545
6546 return "oihf";
6547}
6548
6549static HChar *
6550s390_irgen_OIHH(UChar r1, UShort i2)
6551{
6552 IRTemp op1 = newTemp(Ity_I16);
6553 UShort op2;
6554 IRTemp result = newTemp(Ity_I16);
6555
6556 assign(op1, get_gpr_hw0(r1));
6557 op2 = i2;
6558 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6559 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6560 put_gpr_hw0(r1, mkexpr(result));
6561
6562 return "oihh";
6563}
6564
6565static HChar *
6566s390_irgen_OIHL(UChar r1, UShort i2)
6567{
6568 IRTemp op1 = newTemp(Ity_I16);
6569 UShort op2;
6570 IRTemp result = newTemp(Ity_I16);
6571
6572 assign(op1, get_gpr_hw1(r1));
6573 op2 = i2;
6574 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6575 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6576 put_gpr_hw1(r1, mkexpr(result));
6577
6578 return "oihl";
6579}
6580
6581static HChar *
6582s390_irgen_OILF(UChar r1, UInt i2)
6583{
6584 IRTemp op1 = newTemp(Ity_I32);
6585 UInt op2;
6586 IRTemp result = newTemp(Ity_I32);
6587
6588 assign(op1, get_gpr_w1(r1));
6589 op2 = i2;
6590 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6591 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6592 put_gpr_w1(r1, mkexpr(result));
6593
6594 return "oilf";
6595}
6596
6597static HChar *
6598s390_irgen_OILH(UChar r1, UShort i2)
6599{
6600 IRTemp op1 = newTemp(Ity_I16);
6601 UShort op2;
6602 IRTemp result = newTemp(Ity_I16);
6603
6604 assign(op1, get_gpr_hw2(r1));
6605 op2 = i2;
6606 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6607 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6608 put_gpr_hw2(r1, mkexpr(result));
6609
6610 return "oilh";
6611}
6612
6613static HChar *
6614s390_irgen_OILL(UChar r1, UShort i2)
6615{
6616 IRTemp op1 = newTemp(Ity_I16);
6617 UShort op2;
6618 IRTemp result = newTemp(Ity_I16);
6619
6620 assign(op1, get_gpr_hw3(r1));
6621 op2 = i2;
6622 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6623 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6624 put_gpr_hw3(r1, mkexpr(result));
6625
6626 return "oill";
6627}
6628
6629static HChar *
6630s390_irgen_PFD(void)
6631{
6632
6633 return "pfd";
6634}
6635
6636static HChar *
6637s390_irgen_PFDRL(void)
6638{
6639
6640 return "pfdrl";
6641}
6642
6643static HChar *
6644s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6645{
6646 IRTemp amount = newTemp(Ity_I64);
6647 IRTemp op = newTemp(Ity_I32);
6648
6649 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6650 assign(op, get_gpr_w1(r3));
6651 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6652 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6653 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6654
6655 return "rll";
6656}
6657
6658static HChar *
6659s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6660{
6661 IRTemp amount = newTemp(Ity_I64);
6662 IRTemp op = newTemp(Ity_I64);
6663
6664 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6665 assign(op, get_gpr_dw0(r3));
6666 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6667 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6668 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6669
6670 return "rllg";
6671}
6672
6673static HChar *
6674s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6675{
6676 UChar from;
6677 UChar to;
6678 UChar rot;
6679 UChar t_bit;
6680 ULong mask;
6681 ULong maskc;
6682 IRTemp result = newTemp(Ity_I64);
6683 IRTemp op2 = newTemp(Ity_I64);
6684
6685 from = i3 & 63;
6686 to = i4 & 63;
6687 rot = i5 & 63;
6688 t_bit = i3 & 128;
6689 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6690 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6691 mkU8(64 - rot))));
6692 if (from <= to) {
6693 mask = ~0ULL;
6694 mask = (mask >> from) & (mask << (63 - to));
6695 maskc = ~mask;
6696 } else {
6697 maskc = ~0ULL;
6698 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6699 mask = ~maskc;
6700 }
6701 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6702 ), mkU64(mask)));
6703 if (t_bit == 0) {
6704 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6705 mkU64(maskc)), mkexpr(result)));
6706 }
6707 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6708
6709 return "rnsbg";
6710}
6711
6712static HChar *
6713s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6714{
6715 UChar from;
6716 UChar to;
6717 UChar rot;
6718 UChar t_bit;
6719 ULong mask;
6720 ULong maskc;
6721 IRTemp result = newTemp(Ity_I64);
6722 IRTemp op2 = newTemp(Ity_I64);
6723
6724 from = i3 & 63;
6725 to = i4 & 63;
6726 rot = i5 & 63;
6727 t_bit = i3 & 128;
6728 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6729 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6730 mkU8(64 - rot))));
6731 if (from <= to) {
6732 mask = ~0ULL;
6733 mask = (mask >> from) & (mask << (63 - to));
6734 maskc = ~mask;
6735 } else {
6736 maskc = ~0ULL;
6737 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6738 mask = ~maskc;
6739 }
6740 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6741 ), mkU64(mask)));
6742 if (t_bit == 0) {
6743 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6744 mkU64(maskc)), mkexpr(result)));
6745 }
6746 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6747
6748 return "rxsbg";
6749}
6750
6751static HChar *
6752s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6753{
6754 UChar from;
6755 UChar to;
6756 UChar rot;
6757 UChar t_bit;
6758 ULong mask;
6759 ULong maskc;
6760 IRTemp result = newTemp(Ity_I64);
6761 IRTemp op2 = newTemp(Ity_I64);
6762
6763 from = i3 & 63;
6764 to = i4 & 63;
6765 rot = i5 & 63;
6766 t_bit = i3 & 128;
6767 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6768 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6769 mkU8(64 - rot))));
6770 if (from <= to) {
6771 mask = ~0ULL;
6772 mask = (mask >> from) & (mask << (63 - to));
6773 maskc = ~mask;
6774 } else {
6775 maskc = ~0ULL;
6776 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6777 mask = ~maskc;
6778 }
6779 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6780 ), mkU64(mask)));
6781 if (t_bit == 0) {
6782 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6783 mkU64(maskc)), mkexpr(result)));
6784 }
6785 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6786
6787 return "rosbg";
6788}
6789
6790static HChar *
6791s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6792{
6793 UChar from;
6794 UChar to;
6795 UChar rot;
6796 UChar z_bit;
6797 ULong mask;
6798 ULong maskc;
6799 IRTemp op2 = newTemp(Ity_I64);
6800 IRTemp result = newTemp(Ity_I64);
6801
6802 from = i3 & 63;
6803 to = i4 & 63;
6804 rot = i5 & 63;
6805 z_bit = i4 & 128;
6806 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6807 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6808 mkU8(64 - rot))));
6809 if (from <= to) {
6810 mask = ~0ULL;
6811 mask = (mask >> from) & (mask << (63 - to));
6812 maskc = ~mask;
6813 } else {
6814 maskc = ~0ULL;
6815 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6816 mask = ~maskc;
6817 }
6818 if (z_bit == 0) {
6819 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6820 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6821 } else {
6822 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6823 }
6824 assign(result, get_gpr_dw0(r1));
6825 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6826
6827 return "risbg";
6828}
6829
6830static HChar *
6831s390_irgen_SAR(UChar r1, UChar r2)
6832{
6833 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006834 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006835 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6836
6837 return "sar";
6838}
6839
6840static HChar *
6841s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6842{
6843 IRTemp p1 = newTemp(Ity_I64);
6844 IRTemp p2 = newTemp(Ity_I64);
6845 IRTemp op = newTemp(Ity_I64);
6846 IRTemp result = newTemp(Ity_I64);
6847 Long sign_mask;
6848 IRTemp shift_amount = newTemp(Ity_I64);
6849
6850 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6851 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6852 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6853 ));
6854 sign_mask = 1ULL << 63;
6855 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6856 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6857 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6858 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6859 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6860 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6861 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6862
6863 return "slda";
6864}
6865
6866static HChar *
6867s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6868{
6869 IRTemp p1 = newTemp(Ity_I64);
6870 IRTemp p2 = newTemp(Ity_I64);
6871 IRTemp result = newTemp(Ity_I64);
6872
6873 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6874 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6875 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6876 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6877 mkexpr(op2addr), mkU64(63)))));
6878 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6879 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6880
6881 return "sldl";
6882}
6883
6884static HChar *
6885s390_irgen_SLA(UChar r1, IRTemp op2addr)
6886{
6887 IRTemp uop = newTemp(Ity_I32);
6888 IRTemp result = newTemp(Ity_I32);
6889 UInt sign_mask;
6890 IRTemp shift_amount = newTemp(Ity_I64);
6891 IRTemp op = newTemp(Ity_I32);
6892
6893 assign(op, get_gpr_w1(r1));
6894 assign(uop, get_gpr_w1(r1));
6895 sign_mask = 2147483648U;
6896 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6897 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6898 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6899 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6900 put_gpr_w1(r1, mkexpr(result));
6901 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6902
6903 return "sla";
6904}
6905
6906static HChar *
6907s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6908{
6909 IRTemp uop = newTemp(Ity_I32);
6910 IRTemp result = newTemp(Ity_I32);
6911 UInt sign_mask;
6912 IRTemp shift_amount = newTemp(Ity_I64);
6913 IRTemp op = newTemp(Ity_I32);
6914
6915 assign(op, get_gpr_w1(r3));
6916 assign(uop, get_gpr_w1(r3));
6917 sign_mask = 2147483648U;
6918 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6919 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6920 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6921 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6922 put_gpr_w1(r1, mkexpr(result));
6923 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6924
6925 return "slak";
6926}
6927
6928static HChar *
6929s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6930{
6931 IRTemp uop = newTemp(Ity_I64);
6932 IRTemp result = newTemp(Ity_I64);
6933 ULong sign_mask;
6934 IRTemp shift_amount = newTemp(Ity_I64);
6935 IRTemp op = newTemp(Ity_I64);
6936
6937 assign(op, get_gpr_dw0(r3));
6938 assign(uop, get_gpr_dw0(r3));
6939 sign_mask = 9223372036854775808ULL;
6940 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6941 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6942 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6943 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6944 put_gpr_dw0(r1, mkexpr(result));
6945 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6946
6947 return "slag";
6948}
6949
6950static HChar *
6951s390_irgen_SLL(UChar r1, IRTemp op2addr)
6952{
6953 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6954 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6955
6956 return "sll";
6957}
6958
6959static HChar *
6960s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6961{
6962 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6963 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6964
6965 return "sllk";
6966}
6967
6968static HChar *
6969s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
6970{
6971 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
6972 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6973
6974 return "sllg";
6975}
6976
6977static HChar *
6978s390_irgen_SRDA(UChar r1, IRTemp op2addr)
6979{
6980 IRTemp p1 = newTemp(Ity_I64);
6981 IRTemp p2 = newTemp(Ity_I64);
6982 IRTemp result = newTemp(Ity_I64);
6983
6984 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6985 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6986 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6987 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6988 mkexpr(op2addr), mkU64(63)))));
6989 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6990 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6991 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6992
6993 return "srda";
6994}
6995
6996static HChar *
6997s390_irgen_SRDL(UChar r1, IRTemp op2addr)
6998{
6999 IRTemp p1 = newTemp(Ity_I64);
7000 IRTemp p2 = newTemp(Ity_I64);
7001 IRTemp result = newTemp(Ity_I64);
7002
7003 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
7004 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
7005 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
7006 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
7007 mkexpr(op2addr), mkU64(63)))));
7008 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
7009 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
7010
7011 return "srdl";
7012}
7013
7014static HChar *
7015s390_irgen_SRA(UChar r1, IRTemp op2addr)
7016{
7017 IRTemp result = newTemp(Ity_I32);
7018 IRTemp op = newTemp(Ity_I32);
7019
7020 assign(op, get_gpr_w1(r1));
7021 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7022 mkexpr(op2addr), mkU64(63)))));
7023 put_gpr_w1(r1, mkexpr(result));
7024 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7025
7026 return "sra";
7027}
7028
7029static HChar *
7030s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
7031{
7032 IRTemp result = newTemp(Ity_I32);
7033 IRTemp op = newTemp(Ity_I32);
7034
7035 assign(op, get_gpr_w1(r3));
7036 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7037 mkexpr(op2addr), mkU64(63)))));
7038 put_gpr_w1(r1, mkexpr(result));
7039 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7040
7041 return "srak";
7042}
7043
7044static HChar *
7045s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
7046{
7047 IRTemp result = newTemp(Ity_I64);
7048 IRTemp op = newTemp(Ity_I64);
7049
7050 assign(op, get_gpr_dw0(r3));
7051 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7052 mkexpr(op2addr), mkU64(63)))));
7053 put_gpr_dw0(r1, mkexpr(result));
7054 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7055
7056 return "srag";
7057}
7058
7059static HChar *
7060s390_irgen_SRL(UChar r1, IRTemp op2addr)
7061{
7062 IRTemp op = newTemp(Ity_I32);
7063
7064 assign(op, get_gpr_w1(r1));
7065 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7066 mkexpr(op2addr), mkU64(63)))));
7067
7068 return "srl";
7069}
7070
7071static HChar *
7072s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7073{
7074 IRTemp op = newTemp(Ity_I32);
7075
7076 assign(op, get_gpr_w1(r3));
7077 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7078 mkexpr(op2addr), mkU64(63)))));
7079
7080 return "srlk";
7081}
7082
7083static HChar *
7084s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7085{
7086 IRTemp op = newTemp(Ity_I64);
7087
7088 assign(op, get_gpr_dw0(r3));
7089 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7090 mkexpr(op2addr), mkU64(63)))));
7091
7092 return "srlg";
7093}
7094
7095static HChar *
7096s390_irgen_ST(UChar r1, IRTemp op2addr)
7097{
7098 store(mkexpr(op2addr), get_gpr_w1(r1));
7099
7100 return "st";
7101}
7102
7103static HChar *
7104s390_irgen_STY(UChar r1, IRTemp op2addr)
7105{
7106 store(mkexpr(op2addr), get_gpr_w1(r1));
7107
7108 return "sty";
7109}
7110
7111static HChar *
7112s390_irgen_STG(UChar r1, IRTemp op2addr)
7113{
7114 store(mkexpr(op2addr), get_gpr_dw0(r1));
7115
7116 return "stg";
7117}
7118
7119static HChar *
7120s390_irgen_STRL(UChar r1, UInt i2)
7121{
7122 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7123 get_gpr_w1(r1));
7124
7125 return "strl";
7126}
7127
7128static HChar *
7129s390_irgen_STGRL(UChar r1, UInt i2)
7130{
7131 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7132 get_gpr_dw0(r1));
7133
7134 return "stgrl";
7135}
7136
7137static HChar *
7138s390_irgen_STC(UChar r1, IRTemp op2addr)
7139{
7140 store(mkexpr(op2addr), get_gpr_b7(r1));
7141
7142 return "stc";
7143}
7144
7145static HChar *
7146s390_irgen_STCY(UChar r1, IRTemp op2addr)
7147{
7148 store(mkexpr(op2addr), get_gpr_b7(r1));
7149
7150 return "stcy";
7151}
7152
7153static HChar *
7154s390_irgen_STCH(UChar r1, IRTemp op2addr)
7155{
7156 store(mkexpr(op2addr), get_gpr_b3(r1));
7157
7158 return "stch";
7159}
7160
7161static HChar *
7162s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7163{
7164 UChar mask;
7165 UChar n;
7166
7167 mask = (UChar)r3;
7168 n = 0;
7169 if ((mask & 8) != 0) {
7170 store(mkexpr(op2addr), get_gpr_b4(r1));
7171 n = n + 1;
7172 }
7173 if ((mask & 4) != 0) {
7174 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7175 n = n + 1;
7176 }
7177 if ((mask & 2) != 0) {
7178 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7179 n = n + 1;
7180 }
7181 if ((mask & 1) != 0) {
7182 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7183 }
7184
7185 return "stcm";
7186}
7187
7188static HChar *
7189s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7190{
7191 UChar mask;
7192 UChar n;
7193
7194 mask = (UChar)r3;
7195 n = 0;
7196 if ((mask & 8) != 0) {
7197 store(mkexpr(op2addr), get_gpr_b4(r1));
7198 n = n + 1;
7199 }
7200 if ((mask & 4) != 0) {
7201 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7202 n = n + 1;
7203 }
7204 if ((mask & 2) != 0) {
7205 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7206 n = n + 1;
7207 }
7208 if ((mask & 1) != 0) {
7209 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7210 }
7211
7212 return "stcmy";
7213}
7214
7215static HChar *
7216s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7217{
7218 UChar mask;
7219 UChar n;
7220
7221 mask = (UChar)r3;
7222 n = 0;
7223 if ((mask & 8) != 0) {
7224 store(mkexpr(op2addr), get_gpr_b0(r1));
7225 n = n + 1;
7226 }
7227 if ((mask & 4) != 0) {
7228 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7229 n = n + 1;
7230 }
7231 if ((mask & 2) != 0) {
7232 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7233 n = n + 1;
7234 }
7235 if ((mask & 1) != 0) {
7236 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7237 }
7238
7239 return "stcmh";
7240}
7241
7242static HChar *
7243s390_irgen_STH(UChar r1, IRTemp op2addr)
7244{
7245 store(mkexpr(op2addr), get_gpr_hw3(r1));
7246
7247 return "sth";
7248}
7249
7250static HChar *
7251s390_irgen_STHY(UChar r1, IRTemp op2addr)
7252{
7253 store(mkexpr(op2addr), get_gpr_hw3(r1));
7254
7255 return "sthy";
7256}
7257
7258static HChar *
7259s390_irgen_STHRL(UChar r1, UInt i2)
7260{
7261 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7262 get_gpr_hw3(r1));
7263
7264 return "sthrl";
7265}
7266
7267static HChar *
7268s390_irgen_STHH(UChar r1, IRTemp op2addr)
7269{
7270 store(mkexpr(op2addr), get_gpr_hw1(r1));
7271
7272 return "sthh";
7273}
7274
7275static HChar *
7276s390_irgen_STFH(UChar r1, IRTemp op2addr)
7277{
7278 store(mkexpr(op2addr), get_gpr_w0(r1));
7279
7280 return "stfh";
7281}
7282
7283static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007284s390_irgen_STOC(UChar r1, IRTemp op2addr)
7285{
7286 /* condition is checked in format handler */
7287 store(mkexpr(op2addr), get_gpr_w1(r1));
7288
7289 return "stoc";
7290}
7291
7292static HChar *
7293s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7294{
7295 /* condition is checked in format handler */
7296 store(mkexpr(op2addr), get_gpr_dw0(r1));
7297
7298 return "stocg";
7299}
7300
7301static HChar *
sewardj2019a972011-03-07 16:04:07 +00007302s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7303{
7304 store(mkexpr(op2addr), get_gpr_dw0(r1));
7305 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7306
7307 return "stpq";
7308}
7309
7310static HChar *
7311s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7312{
7313 store(mkexpr(op2addr), get_gpr_b7(r1));
7314 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7315
7316 return "strvh";
7317}
7318
7319static HChar *
7320s390_irgen_STRV(UChar r1, IRTemp op2addr)
7321{
7322 store(mkexpr(op2addr), get_gpr_b7(r1));
7323 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7324 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7325 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7326
7327 return "strv";
7328}
7329
7330static HChar *
7331s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7332{
7333 store(mkexpr(op2addr), get_gpr_b7(r1));
7334 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7335 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7336 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7337 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7338 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7339 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7340 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7341
7342 return "strvg";
7343}
7344
7345static HChar *
7346s390_irgen_SR(UChar r1, UChar r2)
7347{
7348 IRTemp op1 = newTemp(Ity_I32);
7349 IRTemp op2 = newTemp(Ity_I32);
7350 IRTemp result = newTemp(Ity_I32);
7351
7352 assign(op1, get_gpr_w1(r1));
7353 assign(op2, get_gpr_w1(r2));
7354 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7355 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7356 put_gpr_w1(r1, mkexpr(result));
7357
7358 return "sr";
7359}
7360
7361static HChar *
7362s390_irgen_SGR(UChar r1, UChar r2)
7363{
7364 IRTemp op1 = newTemp(Ity_I64);
7365 IRTemp op2 = newTemp(Ity_I64);
7366 IRTemp result = newTemp(Ity_I64);
7367
7368 assign(op1, get_gpr_dw0(r1));
7369 assign(op2, get_gpr_dw0(r2));
7370 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7371 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7372 put_gpr_dw0(r1, mkexpr(result));
7373
7374 return "sgr";
7375}
7376
7377static HChar *
7378s390_irgen_SGFR(UChar r1, UChar r2)
7379{
7380 IRTemp op1 = newTemp(Ity_I64);
7381 IRTemp op2 = newTemp(Ity_I64);
7382 IRTemp result = newTemp(Ity_I64);
7383
7384 assign(op1, get_gpr_dw0(r1));
7385 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7386 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7387 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7388 put_gpr_dw0(r1, mkexpr(result));
7389
7390 return "sgfr";
7391}
7392
7393static HChar *
7394s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7395{
7396 IRTemp op2 = newTemp(Ity_I32);
7397 IRTemp op3 = newTemp(Ity_I32);
7398 IRTemp result = newTemp(Ity_I32);
7399
7400 assign(op2, get_gpr_w1(r2));
7401 assign(op3, get_gpr_w1(r3));
7402 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7403 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7404 put_gpr_w1(r1, mkexpr(result));
7405
7406 return "srk";
7407}
7408
7409static HChar *
7410s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7411{
7412 IRTemp op2 = newTemp(Ity_I64);
7413 IRTemp op3 = newTemp(Ity_I64);
7414 IRTemp result = newTemp(Ity_I64);
7415
7416 assign(op2, get_gpr_dw0(r2));
7417 assign(op3, get_gpr_dw0(r3));
7418 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7419 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7420 put_gpr_dw0(r1, mkexpr(result));
7421
7422 return "sgrk";
7423}
7424
7425static HChar *
7426s390_irgen_S(UChar r1, IRTemp op2addr)
7427{
7428 IRTemp op1 = newTemp(Ity_I32);
7429 IRTemp op2 = newTemp(Ity_I32);
7430 IRTemp result = newTemp(Ity_I32);
7431
7432 assign(op1, get_gpr_w1(r1));
7433 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7434 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7435 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7436 put_gpr_w1(r1, mkexpr(result));
7437
7438 return "s";
7439}
7440
7441static HChar *
7442s390_irgen_SY(UChar r1, IRTemp op2addr)
7443{
7444 IRTemp op1 = newTemp(Ity_I32);
7445 IRTemp op2 = newTemp(Ity_I32);
7446 IRTemp result = newTemp(Ity_I32);
7447
7448 assign(op1, get_gpr_w1(r1));
7449 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7450 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7451 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7452 put_gpr_w1(r1, mkexpr(result));
7453
7454 return "sy";
7455}
7456
7457static HChar *
7458s390_irgen_SG(UChar r1, IRTemp op2addr)
7459{
7460 IRTemp op1 = newTemp(Ity_I64);
7461 IRTemp op2 = newTemp(Ity_I64);
7462 IRTemp result = newTemp(Ity_I64);
7463
7464 assign(op1, get_gpr_dw0(r1));
7465 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7466 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7467 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7468 put_gpr_dw0(r1, mkexpr(result));
7469
7470 return "sg";
7471}
7472
7473static HChar *
7474s390_irgen_SGF(UChar r1, IRTemp op2addr)
7475{
7476 IRTemp op1 = newTemp(Ity_I64);
7477 IRTemp op2 = newTemp(Ity_I64);
7478 IRTemp result = newTemp(Ity_I64);
7479
7480 assign(op1, get_gpr_dw0(r1));
7481 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7482 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7483 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7484 put_gpr_dw0(r1, mkexpr(result));
7485
7486 return "sgf";
7487}
7488
7489static HChar *
7490s390_irgen_SH(UChar r1, IRTemp op2addr)
7491{
7492 IRTemp op1 = newTemp(Ity_I32);
7493 IRTemp op2 = newTemp(Ity_I32);
7494 IRTemp result = newTemp(Ity_I32);
7495
7496 assign(op1, get_gpr_w1(r1));
7497 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7498 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7499 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7500 put_gpr_w1(r1, mkexpr(result));
7501
7502 return "sh";
7503}
7504
7505static HChar *
7506s390_irgen_SHY(UChar r1, IRTemp op2addr)
7507{
7508 IRTemp op1 = newTemp(Ity_I32);
7509 IRTemp op2 = newTemp(Ity_I32);
7510 IRTemp result = newTemp(Ity_I32);
7511
7512 assign(op1, get_gpr_w1(r1));
7513 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7514 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7515 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7516 put_gpr_w1(r1, mkexpr(result));
7517
7518 return "shy";
7519}
7520
7521static HChar *
7522s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7523{
7524 IRTemp op2 = newTemp(Ity_I32);
7525 IRTemp op3 = newTemp(Ity_I32);
7526 IRTemp result = newTemp(Ity_I32);
7527
7528 assign(op2, get_gpr_w0(r1));
7529 assign(op3, get_gpr_w0(r2));
7530 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7531 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7532 put_gpr_w0(r1, mkexpr(result));
7533
7534 return "shhhr";
7535}
7536
7537static HChar *
7538s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7539{
7540 IRTemp op2 = newTemp(Ity_I32);
7541 IRTemp op3 = newTemp(Ity_I32);
7542 IRTemp result = newTemp(Ity_I32);
7543
7544 assign(op2, get_gpr_w0(r1));
7545 assign(op3, get_gpr_w1(r2));
7546 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7547 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7548 put_gpr_w0(r1, mkexpr(result));
7549
7550 return "shhlr";
7551}
7552
7553static HChar *
7554s390_irgen_SLR(UChar r1, UChar r2)
7555{
7556 IRTemp op1 = newTemp(Ity_I32);
7557 IRTemp op2 = newTemp(Ity_I32);
7558 IRTemp result = newTemp(Ity_I32);
7559
7560 assign(op1, get_gpr_w1(r1));
7561 assign(op2, get_gpr_w1(r2));
7562 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7563 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7564 put_gpr_w1(r1, mkexpr(result));
7565
7566 return "slr";
7567}
7568
7569static HChar *
7570s390_irgen_SLGR(UChar r1, UChar r2)
7571{
7572 IRTemp op1 = newTemp(Ity_I64);
7573 IRTemp op2 = newTemp(Ity_I64);
7574 IRTemp result = newTemp(Ity_I64);
7575
7576 assign(op1, get_gpr_dw0(r1));
7577 assign(op2, get_gpr_dw0(r2));
7578 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7579 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7580 put_gpr_dw0(r1, mkexpr(result));
7581
7582 return "slgr";
7583}
7584
7585static HChar *
7586s390_irgen_SLGFR(UChar r1, UChar r2)
7587{
7588 IRTemp op1 = newTemp(Ity_I64);
7589 IRTemp op2 = newTemp(Ity_I64);
7590 IRTemp result = newTemp(Ity_I64);
7591
7592 assign(op1, get_gpr_dw0(r1));
7593 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7594 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7595 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7596 put_gpr_dw0(r1, mkexpr(result));
7597
7598 return "slgfr";
7599}
7600
7601static HChar *
7602s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7603{
7604 IRTemp op2 = newTemp(Ity_I32);
7605 IRTemp op3 = newTemp(Ity_I32);
7606 IRTemp result = newTemp(Ity_I32);
7607
7608 assign(op2, get_gpr_w1(r2));
7609 assign(op3, get_gpr_w1(r3));
7610 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7611 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7612 put_gpr_w1(r1, mkexpr(result));
7613
7614 return "slrk";
7615}
7616
7617static HChar *
7618s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7619{
7620 IRTemp op2 = newTemp(Ity_I64);
7621 IRTemp op3 = newTemp(Ity_I64);
7622 IRTemp result = newTemp(Ity_I64);
7623
7624 assign(op2, get_gpr_dw0(r2));
7625 assign(op3, get_gpr_dw0(r3));
7626 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7627 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7628 put_gpr_dw0(r1, mkexpr(result));
7629
7630 return "slgrk";
7631}
7632
7633static HChar *
7634s390_irgen_SL(UChar r1, IRTemp op2addr)
7635{
7636 IRTemp op1 = newTemp(Ity_I32);
7637 IRTemp op2 = newTemp(Ity_I32);
7638 IRTemp result = newTemp(Ity_I32);
7639
7640 assign(op1, get_gpr_w1(r1));
7641 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7642 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7643 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7644 put_gpr_w1(r1, mkexpr(result));
7645
7646 return "sl";
7647}
7648
7649static HChar *
7650s390_irgen_SLY(UChar r1, IRTemp op2addr)
7651{
7652 IRTemp op1 = newTemp(Ity_I32);
7653 IRTemp op2 = newTemp(Ity_I32);
7654 IRTemp result = newTemp(Ity_I32);
7655
7656 assign(op1, get_gpr_w1(r1));
7657 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7658 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7659 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7660 put_gpr_w1(r1, mkexpr(result));
7661
7662 return "sly";
7663}
7664
7665static HChar *
7666s390_irgen_SLG(UChar r1, IRTemp op2addr)
7667{
7668 IRTemp op1 = newTemp(Ity_I64);
7669 IRTemp op2 = newTemp(Ity_I64);
7670 IRTemp result = newTemp(Ity_I64);
7671
7672 assign(op1, get_gpr_dw0(r1));
7673 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7674 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7675 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7676 put_gpr_dw0(r1, mkexpr(result));
7677
7678 return "slg";
7679}
7680
7681static HChar *
7682s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7683{
7684 IRTemp op1 = newTemp(Ity_I64);
7685 IRTemp op2 = newTemp(Ity_I64);
7686 IRTemp result = newTemp(Ity_I64);
7687
7688 assign(op1, get_gpr_dw0(r1));
7689 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7690 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7691 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7692 put_gpr_dw0(r1, mkexpr(result));
7693
7694 return "slgf";
7695}
7696
7697static HChar *
7698s390_irgen_SLFI(UChar r1, UInt i2)
7699{
7700 IRTemp op1 = newTemp(Ity_I32);
7701 UInt op2;
7702 IRTemp result = newTemp(Ity_I32);
7703
7704 assign(op1, get_gpr_w1(r1));
7705 op2 = i2;
7706 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7707 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7708 mkU32(op2)));
7709 put_gpr_w1(r1, mkexpr(result));
7710
7711 return "slfi";
7712}
7713
7714static HChar *
7715s390_irgen_SLGFI(UChar r1, UInt i2)
7716{
7717 IRTemp op1 = newTemp(Ity_I64);
7718 ULong op2;
7719 IRTemp result = newTemp(Ity_I64);
7720
7721 assign(op1, get_gpr_dw0(r1));
7722 op2 = (ULong)i2;
7723 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7724 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7725 mkU64(op2)));
7726 put_gpr_dw0(r1, mkexpr(result));
7727
7728 return "slgfi";
7729}
7730
7731static HChar *
7732s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7733{
7734 IRTemp op2 = newTemp(Ity_I32);
7735 IRTemp op3 = newTemp(Ity_I32);
7736 IRTemp result = newTemp(Ity_I32);
7737
7738 assign(op2, get_gpr_w0(r1));
7739 assign(op3, get_gpr_w0(r2));
7740 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7741 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7742 put_gpr_w0(r1, mkexpr(result));
7743
7744 return "slhhhr";
7745}
7746
7747static HChar *
7748s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7749{
7750 IRTemp op2 = newTemp(Ity_I32);
7751 IRTemp op3 = newTemp(Ity_I32);
7752 IRTemp result = newTemp(Ity_I32);
7753
7754 assign(op2, get_gpr_w0(r1));
7755 assign(op3, get_gpr_w1(r2));
7756 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7757 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7758 put_gpr_w0(r1, mkexpr(result));
7759
7760 return "slhhlr";
7761}
7762
7763static HChar *
7764s390_irgen_SLBR(UChar r1, UChar r2)
7765{
7766 IRTemp op1 = newTemp(Ity_I32);
7767 IRTemp op2 = newTemp(Ity_I32);
7768 IRTemp result = newTemp(Ity_I32);
7769 IRTemp borrow_in = newTemp(Ity_I32);
7770
7771 assign(op1, get_gpr_w1(r1));
7772 assign(op2, get_gpr_w1(r2));
7773 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7774 s390_call_calculate_cc(), mkU8(1))));
7775 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7776 mkexpr(borrow_in)));
7777 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7778 put_gpr_w1(r1, mkexpr(result));
7779
7780 return "slbr";
7781}
7782
7783static HChar *
7784s390_irgen_SLBGR(UChar r1, UChar r2)
7785{
7786 IRTemp op1 = newTemp(Ity_I64);
7787 IRTemp op2 = newTemp(Ity_I64);
7788 IRTemp result = newTemp(Ity_I64);
7789 IRTemp borrow_in = newTemp(Ity_I64);
7790
7791 assign(op1, get_gpr_dw0(r1));
7792 assign(op2, get_gpr_dw0(r2));
7793 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7794 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7795 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7796 mkexpr(borrow_in)));
7797 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7798 put_gpr_dw0(r1, mkexpr(result));
7799
7800 return "slbgr";
7801}
7802
7803static HChar *
7804s390_irgen_SLB(UChar r1, IRTemp op2addr)
7805{
7806 IRTemp op1 = newTemp(Ity_I32);
7807 IRTemp op2 = newTemp(Ity_I32);
7808 IRTemp result = newTemp(Ity_I32);
7809 IRTemp borrow_in = newTemp(Ity_I32);
7810
7811 assign(op1, get_gpr_w1(r1));
7812 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7813 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7814 s390_call_calculate_cc(), mkU8(1))));
7815 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7816 mkexpr(borrow_in)));
7817 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7818 put_gpr_w1(r1, mkexpr(result));
7819
7820 return "slb";
7821}
7822
7823static HChar *
7824s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7825{
7826 IRTemp op1 = newTemp(Ity_I64);
7827 IRTemp op2 = newTemp(Ity_I64);
7828 IRTemp result = newTemp(Ity_I64);
7829 IRTemp borrow_in = newTemp(Ity_I64);
7830
7831 assign(op1, get_gpr_dw0(r1));
7832 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7833 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7834 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7835 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7836 mkexpr(borrow_in)));
7837 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7838 put_gpr_dw0(r1, mkexpr(result));
7839
7840 return "slbg";
7841}
7842
7843static HChar *
7844s390_irgen_SVC(UChar i)
7845{
7846 IRTemp sysno = newTemp(Ity_I64);
7847
7848 if (i != 0) {
7849 assign(sysno, mkU64(i));
7850 } else {
7851 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7852 }
7853 system_call(mkexpr(sysno));
7854
7855 return "svc";
7856}
7857
7858static HChar *
7859s390_irgen_TS(IRTemp op2addr)
7860{
7861 IRTemp value = newTemp(Ity_I8);
7862
7863 assign(value, load(Ity_I8, mkexpr(op2addr)));
7864 s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
7865 store(mkexpr(op2addr), mkU8(255));
7866
7867 return "ts";
7868}
7869
7870static HChar *
7871s390_irgen_TM(UChar i2, IRTemp op1addr)
7872{
7873 UChar mask;
7874 IRTemp value = newTemp(Ity_I8);
7875
7876 mask = i2;
7877 assign(value, load(Ity_I8, mkexpr(op1addr)));
7878 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7879 mkU8(mask)));
7880
7881 return "tm";
7882}
7883
7884static HChar *
7885s390_irgen_TMY(UChar i2, IRTemp op1addr)
7886{
7887 UChar mask;
7888 IRTemp value = newTemp(Ity_I8);
7889
7890 mask = i2;
7891 assign(value, load(Ity_I8, mkexpr(op1addr)));
7892 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7893 mkU8(mask)));
7894
7895 return "tmy";
7896}
7897
7898static HChar *
7899s390_irgen_TMHH(UChar r1, UShort i2)
7900{
7901 UShort mask;
7902 IRTemp value = newTemp(Ity_I16);
7903
7904 mask = i2;
7905 assign(value, get_gpr_hw0(r1));
7906 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7907 mkU16(mask)));
7908
7909 return "tmhh";
7910}
7911
7912static HChar *
7913s390_irgen_TMHL(UChar r1, UShort i2)
7914{
7915 UShort mask;
7916 IRTemp value = newTemp(Ity_I16);
7917
7918 mask = i2;
7919 assign(value, get_gpr_hw1(r1));
7920 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7921 mkU16(mask)));
7922
7923 return "tmhl";
7924}
7925
7926static HChar *
7927s390_irgen_TMLH(UChar r1, UShort i2)
7928{
7929 UShort mask;
7930 IRTemp value = newTemp(Ity_I16);
7931
7932 mask = i2;
7933 assign(value, get_gpr_hw2(r1));
7934 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7935 mkU16(mask)));
7936
7937 return "tmlh";
7938}
7939
7940static HChar *
7941s390_irgen_TMLL(UChar r1, UShort i2)
7942{
7943 UShort mask;
7944 IRTemp value = newTemp(Ity_I16);
7945
7946 mask = i2;
7947 assign(value, get_gpr_hw3(r1));
7948 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7949 mkU16(mask)));
7950
7951 return "tmll";
7952}
7953
7954static HChar *
7955s390_irgen_EFPC(UChar r1)
7956{
7957 put_gpr_w1(r1, get_fpc_w0());
7958
7959 return "efpc";
7960}
7961
7962static HChar *
7963s390_irgen_LER(UChar r1, UChar r2)
7964{
7965 put_fpr_w0(r1, get_fpr_w0(r2));
7966
7967 return "ler";
7968}
7969
7970static HChar *
7971s390_irgen_LDR(UChar r1, UChar r2)
7972{
7973 put_fpr_dw0(r1, get_fpr_dw0(r2));
7974
7975 return "ldr";
7976}
7977
7978static HChar *
7979s390_irgen_LXR(UChar r1, UChar r2)
7980{
7981 put_fpr_dw0(r1, get_fpr_dw0(r2));
7982 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
7983
7984 return "lxr";
7985}
7986
7987static HChar *
7988s390_irgen_LE(UChar r1, IRTemp op2addr)
7989{
7990 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7991
7992 return "le";
7993}
7994
7995static HChar *
7996s390_irgen_LD(UChar r1, IRTemp op2addr)
7997{
7998 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7999
8000 return "ld";
8001}
8002
8003static HChar *
8004s390_irgen_LEY(UChar r1, IRTemp op2addr)
8005{
8006 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
8007
8008 return "ley";
8009}
8010
8011static HChar *
8012s390_irgen_LDY(UChar r1, IRTemp op2addr)
8013{
8014 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
8015
8016 return "ldy";
8017}
8018
8019static HChar *
8020s390_irgen_LFPC(IRTemp op2addr)
8021{
8022 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
8023
8024 return "lfpc";
8025}
8026
8027static HChar *
8028s390_irgen_LZER(UChar r1)
8029{
8030 put_fpr_w0(r1, mkF32i(0x0));
8031
8032 return "lzer";
8033}
8034
8035static HChar *
8036s390_irgen_LZDR(UChar r1)
8037{
8038 put_fpr_dw0(r1, mkF64i(0x0));
8039
8040 return "lzdr";
8041}
8042
8043static HChar *
8044s390_irgen_LZXR(UChar r1)
8045{
8046 put_fpr_dw0(r1, mkF64i(0x0));
8047 put_fpr_dw0(r1 + 2, mkF64i(0x0));
8048
8049 return "lzxr";
8050}
8051
8052static HChar *
8053s390_irgen_SRNM(IRTemp op2addr)
8054{
8055 UInt mask;
8056
8057 mask = 3;
8058 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8059 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8060 );
8061
8062 return "srnm";
8063}
8064
8065static HChar *
8066s390_irgen_SFPC(UChar r1)
8067{
8068 put_fpc_w0(get_gpr_w1(r1));
8069
8070 return "sfpc";
8071}
8072
8073static HChar *
8074s390_irgen_STE(UChar r1, IRTemp op2addr)
8075{
8076 store(mkexpr(op2addr), get_fpr_w0(r1));
8077
8078 return "ste";
8079}
8080
8081static HChar *
8082s390_irgen_STD(UChar r1, IRTemp op2addr)
8083{
8084 store(mkexpr(op2addr), get_fpr_dw0(r1));
8085
8086 return "std";
8087}
8088
8089static HChar *
8090s390_irgen_STEY(UChar r1, IRTemp op2addr)
8091{
8092 store(mkexpr(op2addr), get_fpr_w0(r1));
8093
8094 return "stey";
8095}
8096
8097static HChar *
8098s390_irgen_STDY(UChar r1, IRTemp op2addr)
8099{
8100 store(mkexpr(op2addr), get_fpr_dw0(r1));
8101
8102 return "stdy";
8103}
8104
8105static HChar *
8106s390_irgen_STFPC(IRTemp op2addr)
8107{
8108 store(mkexpr(op2addr), get_fpc_w0());
8109
8110 return "stfpc";
8111}
8112
8113static HChar *
8114s390_irgen_AEBR(UChar r1, UChar r2)
8115{
8116 IRTemp op1 = newTemp(Ity_F32);
8117 IRTemp op2 = newTemp(Ity_F32);
8118 IRTemp result = newTemp(Ity_F32);
8119
8120 assign(op1, get_fpr_w0(r1));
8121 assign(op2, get_fpr_w0(r2));
8122 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8123 mkexpr(op2)));
8124 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8125 put_fpr_w0(r1, mkexpr(result));
8126
8127 return "aebr";
8128}
8129
8130static HChar *
8131s390_irgen_ADBR(UChar r1, UChar r2)
8132{
8133 IRTemp op1 = newTemp(Ity_F64);
8134 IRTemp op2 = newTemp(Ity_F64);
8135 IRTemp result = newTemp(Ity_F64);
8136
8137 assign(op1, get_fpr_dw0(r1));
8138 assign(op2, get_fpr_dw0(r2));
8139 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8140 mkexpr(op2)));
8141 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8142 put_fpr_dw0(r1, mkexpr(result));
8143
8144 return "adbr";
8145}
8146
8147static HChar *
8148s390_irgen_AEB(UChar r1, IRTemp op2addr)
8149{
8150 IRTemp op1 = newTemp(Ity_F32);
8151 IRTemp op2 = newTemp(Ity_F32);
8152 IRTemp result = newTemp(Ity_F32);
8153
8154 assign(op1, get_fpr_w0(r1));
8155 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8156 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8157 mkexpr(op2)));
8158 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8159 put_fpr_w0(r1, mkexpr(result));
8160
8161 return "aeb";
8162}
8163
8164static HChar *
8165s390_irgen_ADB(UChar r1, IRTemp op2addr)
8166{
8167 IRTemp op1 = newTemp(Ity_F64);
8168 IRTemp op2 = newTemp(Ity_F64);
8169 IRTemp result = newTemp(Ity_F64);
8170
8171 assign(op1, get_fpr_dw0(r1));
8172 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8173 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8174 mkexpr(op2)));
8175 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8176 put_fpr_dw0(r1, mkexpr(result));
8177
8178 return "adb";
8179}
8180
8181static HChar *
8182s390_irgen_CEFBR(UChar r1, UChar r2)
8183{
8184 IRTemp op2 = newTemp(Ity_I32);
8185
8186 assign(op2, get_gpr_w1(r2));
8187 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8188
8189 return "cefbr";
8190}
8191
8192static HChar *
8193s390_irgen_CDFBR(UChar r1, UChar r2)
8194{
8195 IRTemp op2 = newTemp(Ity_I32);
8196
8197 assign(op2, get_gpr_w1(r2));
8198 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8199
8200 return "cdfbr";
8201}
8202
8203static HChar *
8204s390_irgen_CEGBR(UChar r1, UChar r2)
8205{
8206 IRTemp op2 = newTemp(Ity_I64);
8207
8208 assign(op2, get_gpr_dw0(r2));
8209 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8210
8211 return "cegbr";
8212}
8213
8214static HChar *
8215s390_irgen_CDGBR(UChar r1, UChar r2)
8216{
8217 IRTemp op2 = newTemp(Ity_I64);
8218
8219 assign(op2, get_gpr_dw0(r2));
8220 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8221
8222 return "cdgbr";
8223}
8224
8225static HChar *
8226s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8227{
8228 IRTemp op = newTemp(Ity_F32);
8229 IRTemp result = newTemp(Ity_I32);
8230
8231 assign(op, get_fpr_w0(r2));
8232 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8233 mkexpr(op)));
8234 put_gpr_w1(r1, mkexpr(result));
8235 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8236
8237 return "cfebr";
8238}
8239
8240static HChar *
8241s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8242{
8243 IRTemp op = newTemp(Ity_F64);
8244 IRTemp result = newTemp(Ity_I32);
8245
8246 assign(op, get_fpr_dw0(r2));
8247 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8248 mkexpr(op)));
8249 put_gpr_w1(r1, mkexpr(result));
8250 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8251
8252 return "cfdbr";
8253}
8254
8255static HChar *
8256s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8257{
8258 IRTemp op = newTemp(Ity_F32);
8259 IRTemp result = newTemp(Ity_I64);
8260
8261 assign(op, get_fpr_w0(r2));
8262 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8263 mkexpr(op)));
8264 put_gpr_dw0(r1, mkexpr(result));
8265 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8266
8267 return "cgebr";
8268}
8269
8270static HChar *
8271s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8272{
8273 IRTemp op = newTemp(Ity_F64);
8274 IRTemp result = newTemp(Ity_I64);
8275
8276 assign(op, get_fpr_dw0(r2));
8277 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8278 mkexpr(op)));
8279 put_gpr_dw0(r1, mkexpr(result));
8280 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8281
8282 return "cgdbr";
8283}
8284
8285static HChar *
8286s390_irgen_DEBR(UChar r1, UChar r2)
8287{
8288 IRTemp op1 = newTemp(Ity_F32);
8289 IRTemp op2 = newTemp(Ity_F32);
8290 IRTemp result = newTemp(Ity_F32);
8291
8292 assign(op1, get_fpr_w0(r1));
8293 assign(op2, get_fpr_w0(r2));
8294 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8295 mkexpr(op2)));
8296 put_fpr_w0(r1, mkexpr(result));
8297
8298 return "debr";
8299}
8300
8301static HChar *
8302s390_irgen_DDBR(UChar r1, UChar r2)
8303{
8304 IRTemp op1 = newTemp(Ity_F64);
8305 IRTemp op2 = newTemp(Ity_F64);
8306 IRTemp result = newTemp(Ity_F64);
8307
8308 assign(op1, get_fpr_dw0(r1));
8309 assign(op2, get_fpr_dw0(r2));
8310 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8311 mkexpr(op2)));
8312 put_fpr_dw0(r1, mkexpr(result));
8313
8314 return "ddbr";
8315}
8316
8317static HChar *
8318s390_irgen_DEB(UChar r1, IRTemp op2addr)
8319{
8320 IRTemp op1 = newTemp(Ity_F32);
8321 IRTemp op2 = newTemp(Ity_F32);
8322 IRTemp result = newTemp(Ity_F32);
8323
8324 assign(op1, get_fpr_w0(r1));
8325 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8326 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8327 mkexpr(op2)));
8328 put_fpr_w0(r1, mkexpr(result));
8329
8330 return "deb";
8331}
8332
8333static HChar *
8334s390_irgen_DDB(UChar r1, IRTemp op2addr)
8335{
8336 IRTemp op1 = newTemp(Ity_F64);
8337 IRTemp op2 = newTemp(Ity_F64);
8338 IRTemp result = newTemp(Ity_F64);
8339
8340 assign(op1, get_fpr_dw0(r1));
8341 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8342 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8343 mkexpr(op2)));
8344 put_fpr_dw0(r1, mkexpr(result));
8345
8346 return "ddb";
8347}
8348
8349static HChar *
8350s390_irgen_LTEBR(UChar r1, UChar r2)
8351{
8352 IRTemp result = newTemp(Ity_F32);
8353
8354 assign(result, get_fpr_w0(r2));
8355 put_fpr_w0(r1, mkexpr(result));
8356 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8357
8358 return "ltebr";
8359}
8360
8361static HChar *
8362s390_irgen_LTDBR(UChar r1, UChar r2)
8363{
8364 IRTemp result = newTemp(Ity_F64);
8365
8366 assign(result, get_fpr_dw0(r2));
8367 put_fpr_dw0(r1, mkexpr(result));
8368 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8369
8370 return "ltdbr";
8371}
8372
8373static HChar *
8374s390_irgen_LCEBR(UChar r1, UChar r2)
8375{
8376 IRTemp result = newTemp(Ity_F32);
8377
8378 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8379 put_fpr_w0(r1, mkexpr(result));
8380 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8381
8382 return "lcebr";
8383}
8384
8385static HChar *
8386s390_irgen_LCDBR(UChar r1, UChar r2)
8387{
8388 IRTemp result = newTemp(Ity_F64);
8389
8390 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8391 put_fpr_dw0(r1, mkexpr(result));
8392 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8393
8394 return "lcdbr";
8395}
8396
8397static HChar *
8398s390_irgen_LDEBR(UChar r1, UChar r2)
8399{
8400 IRTemp op = newTemp(Ity_F32);
8401
8402 assign(op, get_fpr_w0(r2));
8403 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8404
8405 return "ldebr";
8406}
8407
8408static HChar *
8409s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8410{
8411 IRTemp op = newTemp(Ity_F32);
8412
8413 assign(op, load(Ity_F32, mkexpr(op2addr)));
8414 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8415
8416 return "ldeb";
8417}
8418
8419static HChar *
8420s390_irgen_LEDBR(UChar r1, UChar r2)
8421{
8422 IRTemp op = newTemp(Ity_F64);
8423
8424 assign(op, get_fpr_dw0(r2));
8425 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8426
8427 return "ledbr";
8428}
8429
8430static HChar *
8431s390_irgen_MEEBR(UChar r1, UChar r2)
8432{
8433 IRTemp op1 = newTemp(Ity_F32);
8434 IRTemp op2 = newTemp(Ity_F32);
8435 IRTemp result = newTemp(Ity_F32);
8436
8437 assign(op1, get_fpr_w0(r1));
8438 assign(op2, get_fpr_w0(r2));
8439 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8440 mkexpr(op2)));
8441 put_fpr_w0(r1, mkexpr(result));
8442
8443 return "meebr";
8444}
8445
8446static HChar *
8447s390_irgen_MDBR(UChar r1, UChar r2)
8448{
8449 IRTemp op1 = newTemp(Ity_F64);
8450 IRTemp op2 = newTemp(Ity_F64);
8451 IRTemp result = newTemp(Ity_F64);
8452
8453 assign(op1, get_fpr_dw0(r1));
8454 assign(op2, get_fpr_dw0(r2));
8455 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8456 mkexpr(op2)));
8457 put_fpr_dw0(r1, mkexpr(result));
8458
8459 return "mdbr";
8460}
8461
8462static HChar *
8463s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8464{
8465 IRTemp op1 = newTemp(Ity_F32);
8466 IRTemp op2 = newTemp(Ity_F32);
8467 IRTemp result = newTemp(Ity_F32);
8468
8469 assign(op1, get_fpr_w0(r1));
8470 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8471 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8472 mkexpr(op2)));
8473 put_fpr_w0(r1, mkexpr(result));
8474
8475 return "meeb";
8476}
8477
8478static HChar *
8479s390_irgen_MDB(UChar r1, IRTemp op2addr)
8480{
8481 IRTemp op1 = newTemp(Ity_F64);
8482 IRTemp op2 = newTemp(Ity_F64);
8483 IRTemp result = newTemp(Ity_F64);
8484
8485 assign(op1, get_fpr_dw0(r1));
8486 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8487 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8488 mkexpr(op2)));
8489 put_fpr_dw0(r1, mkexpr(result));
8490
8491 return "mdb";
8492}
8493
8494static HChar *
8495s390_irgen_SEBR(UChar r1, UChar r2)
8496{
8497 IRTemp op1 = newTemp(Ity_F32);
8498 IRTemp op2 = newTemp(Ity_F32);
8499 IRTemp result = newTemp(Ity_F32);
8500
8501 assign(op1, get_fpr_w0(r1));
8502 assign(op2, get_fpr_w0(r2));
8503 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8504 mkexpr(op2)));
8505 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8506 put_fpr_w0(r1, mkexpr(result));
8507
8508 return "sebr";
8509}
8510
8511static HChar *
8512s390_irgen_SDBR(UChar r1, UChar r2)
8513{
8514 IRTemp op1 = newTemp(Ity_F64);
8515 IRTemp op2 = newTemp(Ity_F64);
8516 IRTemp result = newTemp(Ity_F64);
8517
8518 assign(op1, get_fpr_dw0(r1));
8519 assign(op2, get_fpr_dw0(r2));
8520 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8521 mkexpr(op2)));
8522 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8523 put_fpr_dw0(r1, mkexpr(result));
8524
8525 return "sdbr";
8526}
8527
8528static HChar *
8529s390_irgen_SEB(UChar r1, IRTemp op2addr)
8530{
8531 IRTemp op1 = newTemp(Ity_F32);
8532 IRTemp op2 = newTemp(Ity_F32);
8533 IRTemp result = newTemp(Ity_F32);
8534
8535 assign(op1, get_fpr_w0(r1));
8536 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8537 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8538 mkexpr(op2)));
8539 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8540 put_fpr_w0(r1, mkexpr(result));
8541
8542 return "seb";
8543}
8544
8545static HChar *
8546s390_irgen_SDB(UChar r1, IRTemp op2addr)
8547{
8548 IRTemp op1 = newTemp(Ity_F64);
8549 IRTemp op2 = newTemp(Ity_F64);
8550 IRTemp result = newTemp(Ity_F64);
8551
8552 assign(op1, get_fpr_dw0(r1));
8553 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8554 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8555 mkexpr(op2)));
8556 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8557 put_fpr_dw0(r1, mkexpr(result));
8558
8559 return "sdb";
8560}
8561
8562
8563static HChar *
8564s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8565{
8566 IRTemp current1 = newTemp(Ity_I8);
8567 IRTemp current2 = newTemp(Ity_I8);
8568 IRTemp counter = newTemp(Ity_I64);
8569
8570 assign(counter, get_counter_dw0());
8571 put_counter_dw0(mkU64(0));
8572
8573 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8574 mkexpr(counter))));
8575 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8576 mkexpr(counter))));
8577 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8578 False);
8579
8580 /* Both fields differ ? */
8581 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8582 guest_IA_next_instr);
8583
8584 /* Check for end of field */
8585 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8586 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8587 guest_IA_curr_instr);
8588 put_counter_dw0(mkU64(0));
8589
8590 return "clc";
8591}
8592
8593static HChar *
florianb0c9a132011-09-08 15:37:39 +00008594s390_irgen_CLCL(UChar r1, UChar r2)
8595{
8596 IRTemp addr1 = newTemp(Ity_I64);
8597 IRTemp addr2 = newTemp(Ity_I64);
8598 IRTemp addr1_load = newTemp(Ity_I64);
8599 IRTemp addr2_load = newTemp(Ity_I64);
8600 IRTemp len1 = newTemp(Ity_I32);
8601 IRTemp len2 = newTemp(Ity_I32);
8602 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
8603 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
8604 IRTemp single1 = newTemp(Ity_I8);
8605 IRTemp single2 = newTemp(Ity_I8);
8606 IRTemp pad = newTemp(Ity_I8);
8607
8608 assign(addr1, get_gpr_dw0(r1));
8609 assign(r1p1, get_gpr_w1(r1 + 1));
8610 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
8611 assign(addr2, get_gpr_dw0(r2));
8612 assign(r2p1, get_gpr_w1(r2 + 1));
8613 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
8614 assign(pad, get_gpr_b4(r2 + 1));
8615
8616 /* len1 == 0 and len2 == 0? Exit */
8617 s390_cc_set(0);
8618 if_condition_goto(binop(Iop_CmpEQ32, binop(Iop_Or32, mkexpr(len1),
8619 mkexpr(len2)), mkU32(0)),
8620 guest_IA_next_instr);
8621
8622 /* Because mkite evaluates both the then-clause and the else-clause
8623 we cannot load directly from addr1 here. If len1 is 0, then adddr1
8624 may be NULL and loading from there would segfault. So we provide a
8625 valid dummy address in that case. Loading from there does no harm and
8626 the value will be discarded at runtime. */
8627 assign(addr1_load,
8628 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8629 mkU64(guest_IA_curr_instr), mkexpr(addr1)));
8630 assign(single1,
8631 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8632 mkexpr(pad), load(Ity_I8, mkexpr(addr1_load))));
8633
8634 assign(addr2_load,
8635 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8636 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
8637 assign(single2,
8638 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8639 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
8640
8641 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single2, False);
8642 /* Fields differ ? */
8643 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single2)),
8644 guest_IA_next_instr);
8645
8646 /* Update len1 and addr1, unless len1 == 0. */
8647 put_gpr_dw0(r1,
8648 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8649 mkexpr(addr1),
8650 binop(Iop_Add64, mkexpr(addr1), mkU64(1))));
8651
8652 /* When updating len1 we must not modify bits (r1+1)[0:39] */
8653 put_gpr_w1(r1 + 1,
8654 mkite(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
8655 binop(Iop_And32, mkexpr(r1p1), mkU32(0xFF000000u)),
8656 binop(Iop_Sub32, mkexpr(r1p1), mkU32(1))));
8657
8658 /* Update len2 and addr2, unless len2 == 0. */
8659 put_gpr_dw0(r2,
8660 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8661 mkexpr(addr2),
8662 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
8663
8664 /* When updating len2 we must not modify bits (r2+1)[0:39] */
8665 put_gpr_w1(r2 + 1,
8666 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
8667 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
8668 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
8669
8670 always_goto_and_chase(guest_IA_curr_instr);
8671
8672 return "clcl";
8673}
8674
8675static HChar *
sewardj2019a972011-03-07 16:04:07 +00008676s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8677{
8678 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8679
8680 addr1 = newTemp(Ity_I64);
8681 addr3 = newTemp(Ity_I64);
8682 addr1_load = newTemp(Ity_I64);
8683 addr3_load = newTemp(Ity_I64);
8684 len1 = newTemp(Ity_I64);
8685 len3 = newTemp(Ity_I64);
8686 single1 = newTemp(Ity_I8);
8687 single3 = newTemp(Ity_I8);
8688
8689 assign(addr1, get_gpr_dw0(r1));
8690 assign(len1, get_gpr_dw0(r1 + 1));
8691 assign(addr3, get_gpr_dw0(r3));
8692 assign(len3, get_gpr_dw0(r3 + 1));
8693
8694 /* len1 == 0 and len3 == 0? Exit */
8695 s390_cc_set(0);
8696 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8697 mkexpr(len3)), mkU64(0)),
8698 guest_IA_next_instr);
8699
8700 /* A mux requires both ways to be possible. This is a way to prevent clcle
8701 from reading from addr1 if it should read from the pad. Since the pad
8702 has no address, just read from the instruction, we discard that anyway */
8703 assign(addr1_load,
8704 IRExpr_Mux0X(unop(Iop_1Uto8,
8705 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8706 mkexpr(addr1),
8707 mkU64(guest_IA_curr_instr)));
8708
8709 /* same for addr3 */
8710 assign(addr3_load,
8711 IRExpr_Mux0X(unop(Iop_1Uto8,
8712 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8713 mkexpr(addr3),
8714 mkU64(guest_IA_curr_instr)));
8715
8716 assign(single1,
8717 IRExpr_Mux0X(unop(Iop_1Uto8,
8718 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8719 load(Ity_I8, mkexpr(addr1_load)),
8720 unop(Iop_64to8, mkexpr(pad2))));
8721
8722 assign(single3,
8723 IRExpr_Mux0X(unop(Iop_1Uto8,
8724 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8725 load(Ity_I8, mkexpr(addr3_load)),
8726 unop(Iop_64to8, mkexpr(pad2))));
8727
8728 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8729 /* Both fields differ ? */
8730 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8731 guest_IA_next_instr);
8732
8733 /* If a length in 0 we must not change this length and the address */
8734 put_gpr_dw0(r1,
8735 IRExpr_Mux0X(unop(Iop_1Uto8,
8736 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8737 binop(Iop_Add64, mkexpr(addr1), mkU64(1)),
8738 mkexpr(addr1)));
8739
8740 put_gpr_dw0(r1 + 1,
8741 IRExpr_Mux0X(unop(Iop_1Uto8,
8742 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8743 binop(Iop_Sub64, mkexpr(len1), mkU64(1)),
8744 mkU64(0)));
8745
8746 put_gpr_dw0(r3,
8747 IRExpr_Mux0X(unop(Iop_1Uto8,
8748 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8749 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
8750 mkexpr(addr3)));
8751
8752 put_gpr_dw0(r3 + 1,
8753 IRExpr_Mux0X(unop(Iop_1Uto8,
8754 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8755 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
8756 mkU64(0)));
8757
8758 /* The architecture requires that we exit with CC3 after a machine specific
8759 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8760 s390_cc_set(3);
8761 if_condition_goto(binop(Iop_CmpEQ64,
8762 binop(Iop_And64,
8763 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8764 mkU64(0xfff)),
8765 mkU64(0)),
8766 guest_IA_next_instr);
8767
floriana64c2432011-07-16 02:11:50 +00008768 always_goto_and_chase(guest_IA_curr_instr);
sewardj2019a972011-03-07 16:04:07 +00008769
8770 return "clcle";
8771}
floriana64c2432011-07-16 02:11:50 +00008772
sewardj2019a972011-03-07 16:04:07 +00008773static void
8774s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8775{
8776 IRTemp old1 = newTemp(Ity_I8);
8777 IRTemp old2 = newTemp(Ity_I8);
8778 IRTemp new1 = newTemp(Ity_I8);
8779 IRTemp counter = newTemp(Ity_I32);
8780 IRTemp addr1 = newTemp(Ity_I64);
8781
8782 assign(counter, get_counter_w0());
8783
8784 assign(addr1, binop(Iop_Add64, mkexpr(start1),
8785 unop(Iop_32Uto64, mkexpr(counter))));
8786
8787 assign(old1, load(Ity_I8, mkexpr(addr1)));
8788 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8789 unop(Iop_32Uto64,mkexpr(counter)))));
8790 assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
8791
8792 store(mkexpr(addr1),
8793 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
8794 mkexpr(start2))),
8795 mkexpr(new1), mkU8(0)));
8796 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
8797 get_counter_w1()));
8798
8799 /* Check for end of field */
8800 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
8801 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
8802 guest_IA_curr_instr);
8803 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
8804 False);
8805 put_counter_dw0(mkU64(0));
8806}
8807
8808
8809static void
8810s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8811{
8812 IRTemp current1 = newTemp(Ity_I8);
8813 IRTemp current2 = newTemp(Ity_I8);
8814 IRTemp counter = newTemp(Ity_I64);
8815
8816 assign(counter, get_counter_dw0());
8817 put_counter_dw0(mkU64(0));
8818
8819 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8820 mkexpr(counter))));
8821 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8822 mkexpr(counter))));
8823 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8824 False);
8825
8826 /* Both fields differ ? */
8827 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8828 guest_IA_next_instr);
8829
8830 /* Check for end of field */
8831 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8832 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8833 guest_IA_curr_instr);
8834 put_counter_dw0(mkU64(0));
8835}
8836
8837static void
8838s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8839{
8840 IRTemp counter = newTemp(Ity_I64);
8841
8842 assign(counter, get_counter_dw0());
8843
8844 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8845 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8846
8847 /* Check for end of field */
8848 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8849 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8850 guest_IA_curr_instr);
8851 put_counter_dw0(mkU64(0));
8852}
8853
8854
8855
8856static void
8857s390_irgen_EX_SS(UChar r, IRTemp addr2,
8858void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8859{
8860 struct SS {
8861 unsigned int op : 8;
8862 unsigned int l : 8;
8863 unsigned int b1 : 4;
8864 unsigned int d1 : 12;
8865 unsigned int b2 : 4;
8866 unsigned int d2 : 12;
8867 };
8868 union {
8869 struct SS dec;
8870 unsigned long bytes;
8871 } ss;
8872 IRTemp cond;
8873 IRDirty *d;
8874 IRTemp torun;
8875
8876 IRTemp start1 = newTemp(Ity_I64);
8877 IRTemp start2 = newTemp(Ity_I64);
8878 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8879 cond = newTemp(Ity_I1);
8880 torun = newTemp(Ity_I64);
8881
8882 assign(torun, load(Ity_I64, mkexpr(addr2)));
8883 /* Start with a check that the saved code is still correct */
8884 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8885 /* If not, save the new value */
8886 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8887 mkIRExprVec_1(mkexpr(torun)));
8888 d->guard = mkexpr(cond);
8889 stmt(IRStmt_Dirty(d));
8890
8891 /* and restart */
8892 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8893 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8894 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8895 IRConst_U64(guest_IA_curr_instr)));
8896
8897 ss.bytes = last_execute_target;
8898 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8899 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8900 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8901 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8902 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8903 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8904 irgen(len, start1, start2);
8905 last_execute_target = 0;
8906}
8907
8908static HChar *
8909s390_irgen_EX(UChar r1, IRTemp addr2)
8910{
8911 switch(last_execute_target & 0xff00000000000000ULL) {
8912 case 0:
8913 {
8914 /* no code information yet */
8915 IRDirty *d;
8916
8917 /* so safe the code... */
8918 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8919 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8920 stmt(IRStmt_Dirty(d));
8921 /* and restart */
8922 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8923 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8924 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8925 IRConst_U64(guest_IA_curr_instr)));
8926 /* we know that this will be invalidated */
8927 irsb->next = mkU64(guest_IA_next_instr);
8928 dis_res->whatNext = Dis_StopHere;
8929 break;
8930 }
8931
8932 case 0xd200000000000000ULL:
8933 /* special case MVC */
8934 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8935 return "mvc via ex";
8936
8937 case 0xd500000000000000ULL:
8938 /* special case CLC */
8939 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8940 return "clc via ex";
8941
8942 case 0xd700000000000000ULL:
8943 /* special case XC */
8944 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8945 return "xc via ex";
8946
8947
8948 default:
8949 {
8950 /* everything else will get a self checking prefix that also checks the
8951 register content */
8952 IRDirty *d;
8953 UChar *bytes;
8954 IRTemp cond;
8955 IRTemp orperand;
8956 IRTemp torun;
8957
8958 cond = newTemp(Ity_I1);
8959 orperand = newTemp(Ity_I64);
8960 torun = newTemp(Ity_I64);
8961
8962 if (r1 == 0)
8963 assign(orperand, mkU64(0));
8964 else
8965 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8966 /* This code is going to be translated */
8967 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8968 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8969
8970 /* Start with a check that saved code is still correct */
8971 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8972 mkU64(last_execute_target)));
8973 /* If not, save the new value */
8974 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8975 mkIRExprVec_1(mkexpr(torun)));
8976 d->guard = mkexpr(cond);
8977 stmt(IRStmt_Dirty(d));
8978
8979 /* and restart */
8980 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8981 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8982 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8983 IRConst_U64(guest_IA_curr_instr)));
8984
8985 /* Now comes the actual translation */
8986 bytes = (UChar *) &last_execute_target;
8987 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
8988 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00008989 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00008990 vex_printf(" which was executed by\n");
8991 /* dont make useless translations in the next execute */
8992 last_execute_target = 0;
8993 }
8994 }
8995 return "ex";
8996}
8997
8998static HChar *
8999s390_irgen_EXRL(UChar r1, UInt offset)
9000{
9001 IRTemp addr = newTemp(Ity_I64);
9002 /* we might save one round trip because we know the target */
9003 if (!last_execute_target)
9004 last_execute_target = *(ULong *)(HWord)
9005 (guest_IA_curr_instr + offset * 2UL);
9006 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
9007 s390_irgen_EX(r1, addr);
9008 return "exrl";
9009}
9010
9011static HChar *
9012s390_irgen_IPM(UChar r1)
9013{
9014 // As long as we dont support SPM, lets just assume 0 as program mask
9015 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
9016 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
9017
9018 return "ipm";
9019}
9020
9021
9022static HChar *
9023s390_irgen_SRST(UChar r1, UChar r2)
9024{
9025 IRTemp address = newTemp(Ity_I64);
9026 IRTemp next = newTemp(Ity_I64);
9027 IRTemp delim = newTemp(Ity_I8);
9028 IRTemp counter = newTemp(Ity_I64);
9029 IRTemp byte = newTemp(Ity_I8);
9030
9031 assign(address, get_gpr_dw0(r2));
9032 assign(next, get_gpr_dw0(r1));
9033
9034 assign(counter, get_counter_dw0());
9035 put_counter_dw0(mkU64(0));
9036
9037 // start = next? CC=2 and out r1 and r2 unchanged
9038 s390_cc_set(2);
9039 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
9040 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
9041 guest_IA_next_instr);
9042
9043 assign(byte, load(Ity_I8, mkexpr(address)));
9044 assign(delim, get_gpr_b7(0));
9045
9046 // byte = delim? CC=1, R1=address
9047 s390_cc_set(1);
9048 put_gpr_dw0(r1, mkexpr(address));
9049 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
9050 guest_IA_next_instr);
9051
9052 // else: all equal, no end yet, loop
9053 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9054 put_gpr_dw0(r1, mkexpr(next));
9055 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
9056 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9057 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
9058 // >= 256 bytes done CC=3
9059 s390_cc_set(3);
9060 put_counter_dw0(mkU64(0));
9061
9062 return "srst";
9063}
9064
9065static HChar *
9066s390_irgen_CLST(UChar r1, UChar r2)
9067{
9068 IRTemp address1 = newTemp(Ity_I64);
9069 IRTemp address2 = newTemp(Ity_I64);
9070 IRTemp end = newTemp(Ity_I8);
9071 IRTemp counter = newTemp(Ity_I64);
9072 IRTemp byte1 = newTemp(Ity_I8);
9073 IRTemp byte2 = newTemp(Ity_I8);
9074
9075 assign(address1, get_gpr_dw0(r1));
9076 assign(address2, get_gpr_dw0(r2));
9077 assign(end, get_gpr_b7(0));
9078 assign(counter, get_counter_dw0());
9079 put_counter_dw0(mkU64(0));
9080 assign(byte1, load(Ity_I8, mkexpr(address1)));
9081 assign(byte2, load(Ity_I8, mkexpr(address2)));
9082
9083 // end in both? all equal, reset r1 and r2 to start values
9084 s390_cc_set(0);
9085 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
9086 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
9087 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
9088 binop(Iop_Or8,
9089 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
9090 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
9091 guest_IA_next_instr);
9092
9093 put_gpr_dw0(r1, mkexpr(address1));
9094 put_gpr_dw0(r2, mkexpr(address2));
9095
9096 // End found in string1
9097 s390_cc_set(1);
9098 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
9099 guest_IA_next_instr);
9100
9101 // End found in string2
9102 s390_cc_set(2);
9103 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
9104 guest_IA_next_instr);
9105
9106 // string1 < string2
9107 s390_cc_set(1);
9108 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
9109 unop(Iop_8Uto32, mkexpr(byte2))),
9110 guest_IA_next_instr);
9111
9112 // string2 < string1
9113 s390_cc_set(2);
9114 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
9115 unop(Iop_8Uto32, mkexpr(byte1))),
9116 guest_IA_next_instr);
9117
9118 // else: all equal, no end yet, loop
9119 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9120 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
9121 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
9122 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
9123 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
9124 // >= 256 bytes done CC=3
9125 s390_cc_set(3);
9126 put_counter_dw0(mkU64(0));
9127
9128 return "clst";
9129}
9130
9131static void
9132s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9133{
9134 UChar reg;
9135 IRTemp addr = newTemp(Ity_I64);
9136
9137 assign(addr, mkexpr(op2addr));
9138 reg = r1;
9139 do {
9140 IRTemp old = addr;
9141
9142 reg %= 16;
9143 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9144 addr = newTemp(Ity_I64);
9145 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9146 reg++;
9147 } while (reg != (r3 + 1));
9148}
9149
9150static HChar *
9151s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9152{
9153 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9154
9155 return "lm";
9156}
9157
9158static HChar *
9159s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9160{
9161 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9162
9163 return "lmy";
9164}
9165
9166static HChar *
9167s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9168{
9169 UChar reg;
9170 IRTemp addr = newTemp(Ity_I64);
9171
9172 assign(addr, mkexpr(op2addr));
9173 reg = r1;
9174 do {
9175 IRTemp old = addr;
9176
9177 reg %= 16;
9178 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9179 addr = newTemp(Ity_I64);
9180 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9181 reg++;
9182 } while (reg != (r3 + 1));
9183
9184 return "lmh";
9185}
9186
9187static HChar *
9188s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9189{
9190 UChar reg;
9191 IRTemp addr = newTemp(Ity_I64);
9192
9193 assign(addr, mkexpr(op2addr));
9194 reg = r1;
9195 do {
9196 IRTemp old = addr;
9197
9198 reg %= 16;
9199 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9200 addr = newTemp(Ity_I64);
9201 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9202 reg++;
9203 } while (reg != (r3 + 1));
9204
9205 return "lmg";
9206}
9207
9208static void
9209s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9210{
9211 UChar reg;
9212 IRTemp addr = newTemp(Ity_I64);
9213
9214 assign(addr, mkexpr(op2addr));
9215 reg = r1;
9216 do {
9217 IRTemp old = addr;
9218
9219 reg %= 16;
9220 store(mkexpr(addr), get_gpr_w1(reg));
9221 addr = newTemp(Ity_I64);
9222 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9223 reg++;
9224 } while( reg != (r3 + 1));
9225}
9226
9227static HChar *
9228s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9229{
9230 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9231
9232 return "stm";
9233}
9234
9235static HChar *
9236s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9237{
9238 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9239
9240 return "stmy";
9241}
9242
9243static HChar *
9244s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9245{
9246 UChar reg;
9247 IRTemp addr = newTemp(Ity_I64);
9248
9249 assign(addr, mkexpr(op2addr));
9250 reg = r1;
9251 do {
9252 IRTemp old = addr;
9253
9254 reg %= 16;
9255 store(mkexpr(addr), get_gpr_w0(reg));
9256 addr = newTemp(Ity_I64);
9257 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9258 reg++;
9259 } while( reg != (r3 + 1));
9260
9261 return "stmh";
9262}
9263
9264static HChar *
9265s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9266{
9267 UChar reg;
9268 IRTemp addr = newTemp(Ity_I64);
9269
9270 assign(addr, mkexpr(op2addr));
9271 reg = r1;
9272 do {
9273 IRTemp old = addr;
9274
9275 reg %= 16;
9276 store(mkexpr(addr), get_gpr_dw0(reg));
9277 addr = newTemp(Ity_I64);
9278 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9279 reg++;
9280 } while( reg != (r3 + 1));
9281
9282 return "stmg";
9283}
9284
9285static void
9286s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
9287{
9288 IRTemp old1 = newTemp(Ity_I8);
9289 IRTemp old2 = newTemp(Ity_I8);
9290 IRTemp new1 = newTemp(Ity_I8);
9291 IRTemp counter = newTemp(Ity_I32);
9292 IRTemp addr1 = newTemp(Ity_I64);
9293
9294 assign(counter, get_counter_w0());
9295
9296 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9297 unop(Iop_32Uto64, mkexpr(counter))));
9298
9299 assign(old1, load(Ity_I8, mkexpr(addr1)));
9300 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9301 unop(Iop_32Uto64,mkexpr(counter)))));
9302 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9303
9304 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009305 if (op == Iop_Xor8) {
9306 store(mkexpr(addr1),
9307 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
9308 mkexpr(start2))),
9309 mkexpr(new1), mkU8(0)));
9310 } else
9311 store(mkexpr(addr1), mkexpr(new1));
9312 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9313 get_counter_w1()));
9314
9315 /* Check for end of field */
9316 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9317 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9318 guest_IA_curr_instr);
9319 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9320 False);
9321 put_counter_dw0(mkU64(0));
9322}
9323
9324static HChar *
9325s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9326{
9327 s390_irgen_XONC(Iop_Xor8, length, start1, start2);
9328
9329 return "xc";
9330}
9331
sewardjb63967e2011-03-24 08:50:04 +00009332static void
9333s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9334{
9335 IRTemp counter = newTemp(Ity_I32);
9336 IRTemp start = newTemp(Ity_I64);
9337 IRTemp addr = newTemp(Ity_I64);
9338
9339 assign(start,
9340 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9341
9342 if (length < 8) {
9343 UInt i;
9344
9345 for (i = 0; i <= length; ++i) {
9346 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9347 }
9348 } else {
9349 assign(counter, get_counter_w0());
9350
9351 assign(addr, binop(Iop_Add64, mkexpr(start),
9352 unop(Iop_32Uto64, mkexpr(counter))));
9353
9354 store(mkexpr(addr), mkU8(0));
9355
9356 /* Check for end of field */
9357 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9358 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9359 guest_IA_curr_instr);
9360
9361 /* Reset counter */
9362 put_counter_dw0(mkU64(0));
9363 }
9364
9365 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
9366
sewardj7ee97522011-05-09 21:45:04 +00009367 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009368 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9369}
9370
sewardj2019a972011-03-07 16:04:07 +00009371static HChar *
9372s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9373{
9374 s390_irgen_XONC(Iop_And8, length, start1, start2);
9375
9376 return "nc";
9377}
9378
9379static HChar *
9380s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9381{
9382 s390_irgen_XONC(Iop_Or8, length, start1, start2);
9383
9384 return "oc";
9385}
9386
9387
9388static HChar *
9389s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9390{
9391 IRTemp counter = newTemp(Ity_I64);
9392
9393 assign(counter, get_counter_dw0());
9394
9395 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9396 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9397
9398 /* Check for end of field */
9399 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9400 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9401 guest_IA_curr_instr);
9402 put_counter_dw0(mkU64(0));
9403
9404 return "mvc";
9405}
9406
9407static HChar *
florianb0c9a132011-09-08 15:37:39 +00009408s390_irgen_MVCL(UChar r1, UChar r2)
9409{
9410 IRTemp addr1 = newTemp(Ity_I64);
9411 IRTemp addr2 = newTemp(Ity_I64);
9412 IRTemp addr2_load = newTemp(Ity_I64);
9413 IRTemp r1p1 = newTemp(Ity_I32); /* contents of r1 + 1 */
9414 IRTemp r2p1 = newTemp(Ity_I32); /* contents of r2 + 1 */
9415 IRTemp len1 = newTemp(Ity_I32);
9416 IRTemp len2 = newTemp(Ity_I32);
9417 IRTemp pad = newTemp(Ity_I8);
9418 IRTemp single = newTemp(Ity_I8);
9419
9420 assign(addr1, get_gpr_dw0(r1));
9421 assign(r1p1, get_gpr_w1(r1 + 1));
9422 assign(len1, binop(Iop_And32, mkexpr(r1p1), mkU32(0x00ffffff)));
9423 assign(addr2, get_gpr_dw0(r2));
9424 assign(r2p1, get_gpr_w1(r2 + 1));
9425 assign(len2, binop(Iop_And32, mkexpr(r2p1), mkU32(0x00ffffff)));
9426 assign(pad, get_gpr_b4(r2 + 1));
9427
9428 /* len1 == 0 ? */
9429 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9430 if_condition_goto(binop(Iop_CmpEQ32, mkexpr(len1), mkU32(0)),
9431 guest_IA_next_instr);
9432
9433 /* Check for destructive overlap:
9434 addr1 > addr2 && addr2 + len1 > addr1 && (addr2 + len2) > addr1 */
9435 s390_cc_set(3);
9436 IRTemp cond1 = newTemp(Ity_I32);
9437 assign(cond1, unop(Iop_1Uto32,
9438 binop(Iop_CmpLT64U, mkexpr(addr2), mkexpr(addr1))));
9439 IRTemp cond2 = newTemp(Ity_I32);
9440 assign(cond2, unop(Iop_1Uto32,
9441 binop(Iop_CmpLT64U, mkexpr(addr1),
9442 binop(Iop_Add64, mkexpr(addr2),
9443 unop(Iop_32Uto64, mkexpr(len1))))));
9444 IRTemp cond3 = newTemp(Ity_I32);
9445 assign(cond3, unop(Iop_1Uto32,
9446 binop(Iop_CmpLT64U,
9447 mkexpr(addr1),
9448 binop(Iop_Add64, mkexpr(addr2),
9449 unop(Iop_32Uto64, mkexpr(len2))))));
9450
9451 if_condition_goto(binop(Iop_CmpEQ32,
9452 binop(Iop_And32,
9453 binop(Iop_And32, mkexpr(cond1), mkexpr(cond2)),
9454 mkexpr(cond3)),
9455 mkU32(1)),
9456 guest_IA_next_instr);
9457
9458 /* See s390_irgen_CLCL for explanation why we cannot load directly
9459 and need two steps. */
9460 assign(addr2_load,
9461 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9462 mkU64(guest_IA_curr_instr), mkexpr(addr2)));
9463 assign(single,
9464 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9465 mkexpr(pad), load(Ity_I8, mkexpr(addr2_load))));
9466
9467 store(mkexpr(addr1), mkexpr(single));
9468
9469 /* Update addr1 and len1 */
9470 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9471 put_gpr_w1(r1 + 1, binop(Iop_Sub32, mkexpr(r1p1), mkU32(1)));
9472
9473 /* Update addr2 and len2 */
9474 put_gpr_dw0(r2,
9475 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9476 mkexpr(addr2),
9477 binop(Iop_Add64, mkexpr(addr2), mkU64(1))));
9478
9479 /* When updating len2 we must not modify bits (r2+1)[0:39] */
9480 put_gpr_w1(r2 + 1,
9481 mkite(binop(Iop_CmpEQ32, mkexpr(len2), mkU32(0)),
9482 binop(Iop_And32, mkexpr(r2p1), mkU32(0xFF000000u)),
9483 binop(Iop_Sub32, mkexpr(r2p1), mkU32(1))));
9484
9485 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len2, False);
9486 if_condition_goto(binop(Iop_CmpNE32, mkexpr(len1), mkU32(1)),
9487 guest_IA_curr_instr);
9488
9489 return "mvcl";
9490}
9491
9492
9493static HChar *
sewardj2019a972011-03-07 16:04:07 +00009494s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9495{
9496 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9497
9498 addr1 = newTemp(Ity_I64);
9499 addr3 = newTemp(Ity_I64);
9500 addr3_load = newTemp(Ity_I64);
9501 len1 = newTemp(Ity_I64);
9502 len3 = newTemp(Ity_I64);
9503 single = newTemp(Ity_I8);
9504
9505 assign(addr1, get_gpr_dw0(r1));
9506 assign(len1, get_gpr_dw0(r1 + 1));
9507 assign(addr3, get_gpr_dw0(r3));
9508 assign(len3, get_gpr_dw0(r3 + 1));
9509
9510 // len1 == 0 ?
9511 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9512 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9513 guest_IA_next_instr);
9514
9515 /* This is a hack to prevent mvcle from reading from addr3 if it
9516 should read from the pad. Since the pad has no address, just
9517 read from the instruction, we discard that anyway */
9518 assign(addr3_load,
9519 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9520 mkU64(0))),
9521 mkexpr(addr3),
9522 mkU64(guest_IA_curr_instr)));
9523
9524 assign(single,
9525 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9526 mkU64(0))),
9527 load(Ity_I8, mkexpr(addr3_load)),
9528 unop(Iop_64to8, mkexpr(pad2))));
9529 store(mkexpr(addr1), mkexpr(single));
9530
9531 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9532
9533 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9534
9535 put_gpr_dw0(r3,
9536 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9537 mkU64(0))),
9538 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
9539 mkexpr(addr3)));
9540
9541 put_gpr_dw0(r3 + 1,
9542 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9543 mkU64(0))),
9544 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
9545 mkU64(0)));
9546
9547 /* We should set CC=3 (faked by overflow add) and leave after
9548 a maximum of ~4096 bytes have been processed. This is simpler:
9549 we leave whenever (len1 % 4096) == 0 */
9550 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
9551
9552 mktemp(Ity_I64, mkU64(-1ULL)), False);
9553 if_condition_goto(binop(Iop_CmpEQ64,
9554 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9555 mkU64(0)),
9556 guest_IA_next_instr);
9557
9558 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9559 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9560 guest_IA_curr_instr);
9561
9562 return "mvcle";
9563}
9564
9565static HChar *
9566s390_irgen_MVST(UChar r1, UChar r2)
9567{
9568 IRTemp addr1 = newTemp(Ity_I64);
9569 IRTemp addr2 = newTemp(Ity_I64);
9570 IRTemp end = newTemp(Ity_I8);
9571 IRTemp byte = newTemp(Ity_I8);
9572 IRTemp counter = newTemp(Ity_I64);
9573
9574 assign(addr1, get_gpr_dw0(r1));
9575 assign(addr2, get_gpr_dw0(r2));
9576 assign(counter, get_counter_dw0());
9577 assign(end, get_gpr_b7(0));
9578 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9579 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9580
9581 // We use unlimited as cpu-determined number
9582 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9583 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9584 guest_IA_curr_instr);
9585
9586 // and always set cc=1 at the end + update r1
9587 s390_cc_set(1);
9588 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9589 put_counter_dw0(mkU64(0));
9590
9591 return "mvst";
9592}
9593
9594static void
9595s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9596{
9597 IRTemp op1 = newTemp(Ity_I64);
9598 IRTemp result = newTemp(Ity_I64);
9599
9600 assign(op1, binop(Iop_32HLto64,
9601 get_gpr_w1(r1), // high 32 bits
9602 get_gpr_w1(r1 + 1))); // low 32 bits
9603 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9604 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9605 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9606}
9607
9608static void
9609s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9610{
9611 IRTemp op1 = newTemp(Ity_I128);
9612 IRTemp result = newTemp(Ity_I128);
9613
9614 assign(op1, binop(Iop_64HLto128,
9615 get_gpr_dw0(r1), // high 64 bits
9616 get_gpr_dw0(r1 + 1))); // low 64 bits
9617 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9618 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9619 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9620}
9621
9622static void
9623s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9624{
9625 IRTemp op1 = newTemp(Ity_I64);
9626 IRTemp result = newTemp(Ity_I128);
9627
9628 assign(op1, get_gpr_dw0(r1 + 1));
9629 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9630 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9631 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9632}
9633
9634static HChar *
9635s390_irgen_DR(UChar r1, UChar r2)
9636{
9637 IRTemp op2 = newTemp(Ity_I32);
9638
9639 assign(op2, get_gpr_w1(r2));
9640
9641 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9642
9643 return "dr";
9644}
9645
9646static HChar *
9647s390_irgen_D(UChar r1, IRTemp op2addr)
9648{
9649 IRTemp op2 = newTemp(Ity_I32);
9650
9651 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9652
9653 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9654
9655 return "d";
9656}
9657
9658static HChar *
9659s390_irgen_DLR(UChar r1, UChar r2)
9660{
9661 IRTemp op2 = newTemp(Ity_I32);
9662
9663 assign(op2, get_gpr_w1(r2));
9664
9665 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9666
9667 return "dr";
9668}
9669
9670static HChar *
9671s390_irgen_DL(UChar r1, IRTemp op2addr)
9672{
9673 IRTemp op2 = newTemp(Ity_I32);
9674
9675 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9676
9677 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9678
9679 return "dl";
9680}
9681
9682static HChar *
9683s390_irgen_DLG(UChar r1, IRTemp op2addr)
9684{
9685 IRTemp op2 = newTemp(Ity_I64);
9686
9687 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9688
9689 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9690
9691 return "dlg";
9692}
9693
9694static HChar *
9695s390_irgen_DLGR(UChar r1, UChar r2)
9696{
9697 IRTemp op2 = newTemp(Ity_I64);
9698
9699 assign(op2, get_gpr_dw0(r2));
9700
9701 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9702
9703 return "dlgr";
9704}
9705
9706static HChar *
9707s390_irgen_DSGR(UChar r1, UChar r2)
9708{
9709 IRTemp op2 = newTemp(Ity_I64);
9710
9711 assign(op2, get_gpr_dw0(r2));
9712
9713 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9714
9715 return "dsgr";
9716}
9717
9718static HChar *
9719s390_irgen_DSG(UChar r1, IRTemp op2addr)
9720{
9721 IRTemp op2 = newTemp(Ity_I64);
9722
9723 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9724
9725 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9726
9727 return "dsg";
9728}
9729
9730static HChar *
9731s390_irgen_DSGFR(UChar r1, UChar r2)
9732{
9733 IRTemp op2 = newTemp(Ity_I64);
9734
9735 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9736
9737 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9738
9739 return "dsgfr";
9740}
9741
9742static HChar *
9743s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9744{
9745 IRTemp op2 = newTemp(Ity_I64);
9746
9747 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9748
9749 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9750
9751 return "dsgf";
9752}
9753
9754static void
9755s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9756{
9757 UChar reg;
9758 IRTemp addr = newTemp(Ity_I64);
9759
9760 assign(addr, mkexpr(op2addr));
9761 reg = r1;
9762 do {
9763 IRTemp old = addr;
9764
9765 reg %= 16;
9766 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9767 addr = newTemp(Ity_I64);
9768 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9769 reg++;
9770 } while (reg != (r3 + 1));
9771}
9772
9773static HChar *
9774s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9775{
9776 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9777
9778 return "lam";
9779}
9780
9781static HChar *
9782s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9783{
9784 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9785
9786 return "lamy";
9787}
9788
9789static void
9790s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9791{
9792 UChar reg;
9793 IRTemp addr = newTemp(Ity_I64);
9794
9795 assign(addr, mkexpr(op2addr));
9796 reg = r1;
9797 do {
9798 IRTemp old = addr;
9799
9800 reg %= 16;
9801 store(mkexpr(addr), get_ar_w0(reg));
9802 addr = newTemp(Ity_I64);
9803 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9804 reg++;
9805 } while (reg != (r3 + 1));
9806}
9807
9808static HChar *
9809s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9810{
9811 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9812
9813 return "stam";
9814}
9815
9816static HChar *
9817s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9818{
9819 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9820
9821 return "stamy";
9822}
9823
9824
9825/* Implementation for 32-bit compare-and-swap */
9826static void
9827s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9828{
9829 IRCAS *cas;
9830 IRTemp op1 = newTemp(Ity_I32);
9831 IRTemp old_mem = newTemp(Ity_I32);
9832 IRTemp op3 = newTemp(Ity_I32);
9833 IRTemp result = newTemp(Ity_I32);
9834 IRTemp nequal = newTemp(Ity_I1);
9835
9836 assign(op1, get_gpr_w1(r1));
9837 assign(op3, get_gpr_w1(r3));
9838
9839 /* The first and second operands are compared. If they are equal,
9840 the third operand is stored at the second- operand location. */
9841 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9842 Iend_BE, mkexpr(op2addr),
9843 NULL, mkexpr(op1), /* expected value */
9844 NULL, mkexpr(op3) /* new value */);
9845 stmt(IRStmt_CAS(cas));
9846
9847 /* Set CC. Operands compared equal -> 0, else 1. */
9848 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9849 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9850
9851 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9852 Otherwise, store the old_value from memory in r1 and yield. */
9853 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9854 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9855 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9856 IRConst_U64(guest_IA_next_instr)));
9857}
9858
9859static HChar *
9860s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9861{
9862 s390_irgen_cas_32(r1, r3, op2addr);
9863
9864 return "cs";
9865}
9866
9867static HChar *
9868s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9869{
9870 s390_irgen_cas_32(r1, r3, op2addr);
9871
9872 return "csy";
9873}
9874
9875static HChar *
9876s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9877{
9878 IRCAS *cas;
9879 IRTemp op1 = newTemp(Ity_I64);
9880 IRTemp old_mem = newTemp(Ity_I64);
9881 IRTemp op3 = newTemp(Ity_I64);
9882 IRTemp result = newTemp(Ity_I64);
9883 IRTemp nequal = newTemp(Ity_I1);
9884
9885 assign(op1, get_gpr_dw0(r1));
9886 assign(op3, get_gpr_dw0(r3));
9887
9888 /* The first and second operands are compared. If they are equal,
9889 the third operand is stored at the second- operand location. */
9890 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9891 Iend_BE, mkexpr(op2addr),
9892 NULL, mkexpr(op1), /* expected value */
9893 NULL, mkexpr(op3) /* new value */);
9894 stmt(IRStmt_CAS(cas));
9895
9896 /* Set CC. Operands compared equal -> 0, else 1. */
9897 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9898 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9899
9900 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9901 Otherwise, store the old_value from memory in r1 and yield. */
9902 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9903 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9904 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9905 IRConst_U64(guest_IA_next_instr)));
9906
9907 return "csg";
9908}
9909
9910
9911/* Binary floating point */
9912
9913static HChar *
9914s390_irgen_AXBR(UChar r1, UChar r2)
9915{
9916 IRTemp op1 = newTemp(Ity_F128);
9917 IRTemp op2 = newTemp(Ity_F128);
9918 IRTemp result = newTemp(Ity_F128);
9919
9920 assign(op1, get_fpr_pair(r1));
9921 assign(op2, get_fpr_pair(r2));
9922 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9923 mkexpr(op2)));
9924 put_fpr_pair(r1, mkexpr(result));
9925
9926 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9927
9928 return "axbr";
9929}
9930
9931/* The result of a Iop_CmdFxx operation is a condition code. It is
9932 encoded using the values defined in type IRCmpFxxResult.
9933 Before we can store the condition code into the guest state (or do
9934 anything else with it for that matter) we need to convert it to
9935 the encoding that s390 uses. This is what this function does.
9936
9937 s390 VEX b6 b2 b0 cc.1 cc.0
9938 0 0x40 EQ 1 0 0 0 0
9939 1 0x01 LT 0 0 1 0 1
9940 2 0x00 GT 0 0 0 1 0
9941 3 0x45 Unordered 1 1 1 1 1
9942
9943 The following bits from the VEX encoding are interesting:
9944 b0, b2, b6 with b0 being the LSB. We observe:
9945
9946 cc.0 = b0;
9947 cc.1 = b2 | (~b0 & ~b6)
9948
9949 with cc being the s390 condition code.
9950*/
9951static IRExpr *
9952convert_vex_fpcc_to_s390(IRTemp vex_cc)
9953{
9954 IRTemp cc0 = newTemp(Ity_I32);
9955 IRTemp cc1 = newTemp(Ity_I32);
9956 IRTemp b0 = newTemp(Ity_I32);
9957 IRTemp b2 = newTemp(Ity_I32);
9958 IRTemp b6 = newTemp(Ity_I32);
9959
9960 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9961 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9962 mkU32(1)));
9963 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9964 mkU32(1)));
9965
9966 assign(cc0, mkexpr(b0));
9967 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9968 binop(Iop_And32,
9969 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9970 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9971 )));
9972
9973 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9974}
9975
9976static HChar *
9977s390_irgen_CEBR(UChar r1, UChar r2)
9978{
9979 IRTemp op1 = newTemp(Ity_F32);
9980 IRTemp op2 = newTemp(Ity_F32);
9981 IRTemp cc_vex = newTemp(Ity_I32);
9982 IRTemp cc_s390 = newTemp(Ity_I32);
9983
9984 assign(op1, get_fpr_w0(r1));
9985 assign(op2, get_fpr_w0(r2));
9986 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9987
9988 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9989 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9990
9991 return "cebr";
9992}
9993
9994static HChar *
9995s390_irgen_CDBR(UChar r1, UChar r2)
9996{
9997 IRTemp op1 = newTemp(Ity_F64);
9998 IRTemp op2 = newTemp(Ity_F64);
9999 IRTemp cc_vex = newTemp(Ity_I32);
10000 IRTemp cc_s390 = newTemp(Ity_I32);
10001
10002 assign(op1, get_fpr_dw0(r1));
10003 assign(op2, get_fpr_dw0(r2));
10004 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10005
10006 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10007 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10008
10009 return "cdbr";
10010}
10011
10012static HChar *
10013s390_irgen_CXBR(UChar r1, UChar r2)
10014{
10015 IRTemp op1 = newTemp(Ity_F128);
10016 IRTemp op2 = newTemp(Ity_F128);
10017 IRTemp cc_vex = newTemp(Ity_I32);
10018 IRTemp cc_s390 = newTemp(Ity_I32);
10019
10020 assign(op1, get_fpr_pair(r1));
10021 assign(op2, get_fpr_pair(r2));
10022 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
10023
10024 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10025 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10026
10027 return "cxbr";
10028}
10029
10030static HChar *
10031s390_irgen_CEB(UChar r1, IRTemp op2addr)
10032{
10033 IRTemp op1 = newTemp(Ity_F32);
10034 IRTemp op2 = newTemp(Ity_F32);
10035 IRTemp cc_vex = newTemp(Ity_I32);
10036 IRTemp cc_s390 = newTemp(Ity_I32);
10037
10038 assign(op1, get_fpr_w0(r1));
10039 assign(op2, load(Ity_F32, mkexpr(op2addr)));
10040 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
10041
10042 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10043 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10044
10045 return "ceb";
10046}
10047
10048static HChar *
10049s390_irgen_CDB(UChar r1, IRTemp op2addr)
10050{
10051 IRTemp op1 = newTemp(Ity_F64);
10052 IRTemp op2 = newTemp(Ity_F64);
10053 IRTemp cc_vex = newTemp(Ity_I32);
10054 IRTemp cc_s390 = newTemp(Ity_I32);
10055
10056 assign(op1, get_fpr_dw0(r1));
10057 assign(op2, load(Ity_F64, mkexpr(op2addr)));
10058 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
10059
10060 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
10061 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
10062
10063 return "cdb";
10064}
10065
10066static HChar *
10067s390_irgen_CXFBR(UChar r1, UChar r2)
10068{
10069 IRTemp op2 = newTemp(Ity_I32);
10070
10071 assign(op2, get_gpr_w1(r2));
10072 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
10073
10074 return "cxfbr";
10075}
10076
10077static HChar *
10078s390_irgen_CXGBR(UChar r1, UChar r2)
10079{
10080 IRTemp op2 = newTemp(Ity_I64);
10081
10082 assign(op2, get_gpr_dw0(r2));
10083 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
10084
10085 return "cxgbr";
10086}
10087
10088static HChar *
10089s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
10090{
10091 IRTemp op = newTemp(Ity_F128);
10092 IRTemp result = newTemp(Ity_I32);
10093
10094 assign(op, get_fpr_pair(r2));
10095 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
10096 mkexpr(op)));
10097 put_gpr_w1(r1, mkexpr(result));
10098 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
10099
10100 return "cfxbr";
10101}
10102
10103static HChar *
10104s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
10105{
10106 IRTemp op = newTemp(Ity_F128);
10107 IRTemp result = newTemp(Ity_I64);
10108
10109 assign(op, get_fpr_pair(r2));
10110 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
10111 mkexpr(op)));
10112 put_gpr_dw0(r1, mkexpr(result));
10113 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
10114
10115 return "cgxbr";
10116}
10117
10118static HChar *
10119s390_irgen_DXBR(UChar r1, UChar r2)
10120{
10121 IRTemp op1 = newTemp(Ity_F128);
10122 IRTemp op2 = newTemp(Ity_F128);
10123 IRTemp result = newTemp(Ity_F128);
10124
10125 assign(op1, get_fpr_pair(r1));
10126 assign(op2, get_fpr_pair(r2));
10127 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10128 mkexpr(op2)));
10129 put_fpr_pair(r1, mkexpr(result));
10130
10131 return "dxbr";
10132}
10133
10134static HChar *
10135s390_irgen_LTXBR(UChar r1, UChar r2)
10136{
10137 IRTemp result = newTemp(Ity_F128);
10138
10139 assign(result, get_fpr_pair(r2));
10140 put_fpr_pair(r1, mkexpr(result));
10141 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10142
10143 return "ltxbr";
10144}
10145
10146static HChar *
10147s390_irgen_LCXBR(UChar r1, UChar r2)
10148{
10149 IRTemp result = newTemp(Ity_F128);
10150
10151 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
10152 put_fpr_pair(r1, mkexpr(result));
10153 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10154
10155 return "lcxbr";
10156}
10157
10158static HChar *
10159s390_irgen_LXDBR(UChar r1, UChar r2)
10160{
10161 IRTemp op = newTemp(Ity_F64);
10162
10163 assign(op, get_fpr_dw0(r2));
10164 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10165
10166 return "lxdbr";
10167}
10168
10169static HChar *
10170s390_irgen_LXEBR(UChar r1, UChar r2)
10171{
10172 IRTemp op = newTemp(Ity_F32);
10173
10174 assign(op, get_fpr_w0(r2));
10175 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10176
10177 return "lxebr";
10178}
10179
10180static HChar *
10181s390_irgen_LXDB(UChar r1, IRTemp op2addr)
10182{
10183 IRTemp op = newTemp(Ity_F64);
10184
10185 assign(op, load(Ity_F64, mkexpr(op2addr)));
10186 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
10187
10188 return "lxdb";
10189}
10190
10191static HChar *
10192s390_irgen_LXEB(UChar r1, IRTemp op2addr)
10193{
10194 IRTemp op = newTemp(Ity_F32);
10195
10196 assign(op, load(Ity_F32, mkexpr(op2addr)));
10197 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
10198
10199 return "lxeb";
10200}
10201
10202static HChar *
10203s390_irgen_LNEBR(UChar r1, UChar r2)
10204{
10205 IRTemp result = newTemp(Ity_F32);
10206
10207 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
10208 put_fpr_w0(r1, mkexpr(result));
10209 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10210
10211 return "lnebr";
10212}
10213
10214static HChar *
10215s390_irgen_LNDBR(UChar r1, UChar r2)
10216{
10217 IRTemp result = newTemp(Ity_F64);
10218
10219 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10220 put_fpr_dw0(r1, mkexpr(result));
10221 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10222
10223 return "lndbr";
10224}
10225
10226static HChar *
10227s390_irgen_LNXBR(UChar r1, UChar r2)
10228{
10229 IRTemp result = newTemp(Ity_F128);
10230
10231 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10232 put_fpr_pair(r1, mkexpr(result));
10233 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10234
10235 return "lnxbr";
10236}
10237
10238static HChar *
10239s390_irgen_LPEBR(UChar r1, UChar r2)
10240{
10241 IRTemp result = newTemp(Ity_F32);
10242
10243 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10244 put_fpr_w0(r1, mkexpr(result));
10245 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10246
10247 return "lpebr";
10248}
10249
10250static HChar *
10251s390_irgen_LPDBR(UChar r1, UChar r2)
10252{
10253 IRTemp result = newTemp(Ity_F64);
10254
10255 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10256 put_fpr_dw0(r1, mkexpr(result));
10257 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10258
10259 return "lpdbr";
10260}
10261
10262static HChar *
10263s390_irgen_LPXBR(UChar r1, UChar r2)
10264{
10265 IRTemp result = newTemp(Ity_F128);
10266
10267 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10268 put_fpr_pair(r1, mkexpr(result));
10269 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10270
10271 return "lpxbr";
10272}
10273
10274static HChar *
10275s390_irgen_LDXBR(UChar r1, UChar r2)
10276{
10277 IRTemp result = newTemp(Ity_F64);
10278
10279 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10280 put_fpr_dw0(r1, mkexpr(result));
10281
10282 return "ldxbr";
10283}
10284
10285static HChar *
10286s390_irgen_LEXBR(UChar r1, UChar r2)
10287{
10288 IRTemp result = newTemp(Ity_F32);
10289
10290 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10291 put_fpr_w0(r1, mkexpr(result));
10292
10293 return "lexbr";
10294}
10295
10296static HChar *
10297s390_irgen_MXBR(UChar r1, UChar r2)
10298{
10299 IRTemp op1 = newTemp(Ity_F128);
10300 IRTemp op2 = newTemp(Ity_F128);
10301 IRTemp result = newTemp(Ity_F128);
10302
10303 assign(op1, get_fpr_pair(r1));
10304 assign(op2, get_fpr_pair(r2));
10305 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10306 mkexpr(op2)));
10307 put_fpr_pair(r1, mkexpr(result));
10308
10309 return "mxbr";
10310}
10311
10312static HChar *
10313s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10314{
10315 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10316 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10317
10318 return "maebr";
10319}
10320
10321static HChar *
10322s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10323{
10324 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10325 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10326
10327 return "madbr";
10328}
10329
10330static HChar *
10331s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10332{
10333 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10334
10335 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10336 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10337
10338 return "maeb";
10339}
10340
10341static HChar *
10342s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10343{
10344 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10345
10346 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10347 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10348
10349 return "madb";
10350}
10351
10352static HChar *
10353s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10354{
10355 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10356 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10357
10358 return "msebr";
10359}
10360
10361static HChar *
10362s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10363{
10364 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10365 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10366
10367 return "msdbr";
10368}
10369
10370static HChar *
10371s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10372{
10373 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10374
10375 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10376 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10377
10378 return "mseb";
10379}
10380
10381static HChar *
10382s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10383{
10384 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10385
10386 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10387 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10388
10389 return "msdb";
10390}
10391
10392static HChar *
10393s390_irgen_SQEBR(UChar r1, UChar r2)
10394{
10395 IRTemp result = newTemp(Ity_F32);
10396
10397 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10398 put_fpr_w0(r1, mkexpr(result));
10399
10400 return "sqebr";
10401}
10402
10403static HChar *
10404s390_irgen_SQDBR(UChar r1, UChar r2)
10405{
10406 IRTemp result = newTemp(Ity_F64);
10407
10408 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10409 put_fpr_dw0(r1, mkexpr(result));
10410
10411 return "sqdbr";
10412}
10413
10414static HChar *
10415s390_irgen_SQXBR(UChar r1, UChar r2)
10416{
10417 IRTemp result = newTemp(Ity_F128);
10418
10419 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10420 put_fpr_pair(r1, mkexpr(result));
10421
10422 return "sqxbr";
10423}
10424
10425static HChar *
10426s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10427{
10428 IRTemp op = newTemp(Ity_F32);
10429
10430 assign(op, load(Ity_F32, mkexpr(op2addr)));
10431 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10432
10433 return "sqeb";
10434}
10435
10436static HChar *
10437s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10438{
10439 IRTemp op = newTemp(Ity_F64);
10440
10441 assign(op, load(Ity_F64, mkexpr(op2addr)));
10442 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10443
10444 return "sqdb";
10445}
10446
10447static HChar *
10448s390_irgen_SXBR(UChar r1, UChar r2)
10449{
10450 IRTemp op1 = newTemp(Ity_F128);
10451 IRTemp op2 = newTemp(Ity_F128);
10452 IRTemp result = newTemp(Ity_F128);
10453
10454 assign(op1, get_fpr_pair(r1));
10455 assign(op2, get_fpr_pair(r2));
10456 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10457 mkexpr(op2)));
10458 put_fpr_pair(r1, mkexpr(result));
10459 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10460
10461 return "sxbr";
10462}
10463
10464static HChar *
10465s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10466{
10467 IRTemp value = newTemp(Ity_F32);
10468
10469 assign(value, get_fpr_w0(r1));
10470
10471 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10472
10473 return "tceb";
10474}
10475
10476static HChar *
10477s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10478{
10479 IRTemp value = newTemp(Ity_F64);
10480
10481 assign(value, get_fpr_dw0(r1));
10482
10483 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10484
10485 return "tcdb";
10486}
10487
10488static HChar *
10489s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10490{
10491 IRTemp value = newTemp(Ity_F128);
10492
10493 assign(value, get_fpr_pair(r1));
10494
10495 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10496
10497 return "tcxb";
10498}
10499
10500static HChar *
10501s390_irgen_LCDFR(UChar r1, UChar r2)
10502{
10503 IRTemp result = newTemp(Ity_F64);
10504
10505 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10506 put_fpr_dw0(r1, mkexpr(result));
10507
10508 return "lcdfr";
10509}
10510
10511static HChar *
10512s390_irgen_LNDFR(UChar r1, UChar r2)
10513{
10514 IRTemp result = newTemp(Ity_F64);
10515
10516 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10517 put_fpr_dw0(r1, mkexpr(result));
10518
10519 return "lndfr";
10520}
10521
10522static HChar *
10523s390_irgen_LPDFR(UChar r1, UChar r2)
10524{
10525 IRTemp result = newTemp(Ity_F64);
10526
10527 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10528 put_fpr_dw0(r1, mkexpr(result));
10529
10530 return "lpdfr";
10531}
10532
10533static HChar *
10534s390_irgen_LDGR(UChar r1, UChar r2)
10535{
10536 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10537
10538 return "ldgr";
10539}
10540
10541static HChar *
10542s390_irgen_LGDR(UChar r1, UChar r2)
10543{
10544 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10545
10546 return "lgdr";
10547}
10548
10549
10550static HChar *
10551s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10552{
10553 IRTemp sign = newTemp(Ity_I64);
10554 IRTemp value = newTemp(Ity_I64);
10555
10556 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10557 mkU64(1ULL << 63)));
10558 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10559 mkU64((1ULL << 63) - 1)));
10560 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10561 mkexpr(sign))));
10562
10563 return "cpsdr";
10564}
10565
10566
10567static UInt
10568s390_do_cvb(ULong decimal)
10569{
10570#if defined(VGA_s390x)
10571 UInt binary;
10572
10573 __asm__ volatile (
10574 "cvb %[result],%[input]\n\t"
10575 : [result] "=d"(binary)
10576 : [input] "m"(decimal)
10577 );
10578
10579 return binary;
10580#else
10581 return 0;
10582#endif
10583}
10584
10585static IRExpr *
10586s390_call_cvb(IRExpr *in)
10587{
10588 IRExpr **args, *call;
10589
10590 args = mkIRExprVec_1(in);
10591 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10592 "s390_do_cvb", &s390_do_cvb, args);
10593
10594 /* Nothing is excluded from definedness checking. */
10595 call->Iex.CCall.cee->mcx_mask = 0;
10596
10597 return call;
10598}
10599
10600static HChar *
10601s390_irgen_CVB(UChar r1, IRTemp op2addr)
10602{
10603 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10604
10605 return "cvb";
10606}
10607
10608static HChar *
10609s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10610{
10611 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10612
10613 return "cvby";
10614}
10615
10616
10617static ULong
10618s390_do_cvd(ULong binary_in)
10619{
10620#if defined(VGA_s390x)
10621 UInt binary = binary_in & 0xffffffffULL;
10622 ULong decimal;
10623
10624 __asm__ volatile (
10625 "cvd %[input],%[result]\n\t"
10626 : [result] "=m"(decimal)
10627 : [input] "d"(binary)
10628 );
10629
10630 return decimal;
10631#else
10632 return 0;
10633#endif
10634}
10635
10636static IRExpr *
10637s390_call_cvd(IRExpr *in)
10638{
10639 IRExpr **args, *call;
10640
10641 args = mkIRExprVec_1(in);
10642 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10643 "s390_do_cvd", &s390_do_cvd, args);
10644
10645 /* Nothing is excluded from definedness checking. */
10646 call->Iex.CCall.cee->mcx_mask = 0;
10647
10648 return call;
10649}
10650
10651static HChar *
10652s390_irgen_CVD(UChar r1, IRTemp op2addr)
10653{
10654 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10655
10656 return "cvd";
10657}
10658
10659static HChar *
10660s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10661{
10662 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10663
10664 return "cvdy";
10665}
10666
10667static HChar *
10668s390_irgen_FLOGR(UChar r1, UChar r2)
10669{
10670 IRTemp input = newTemp(Ity_I64);
10671 IRTemp not_zero = newTemp(Ity_I64);
10672 IRTemp tmpnum = newTemp(Ity_I64);
10673 IRTemp num = newTemp(Ity_I64);
10674 IRTemp shift_amount = newTemp(Ity_I8);
10675
10676 /* We use the "count leading zeroes" operator because the number of
10677 leading zeroes is identical with the bit position of the first '1' bit.
10678 However, that operator does not work when the input value is zero.
10679 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10680 the modified value. If input == 0, then the result is 64. Otherwise,
10681 the result of Clz64 is what we want. */
10682
10683 assign(input, get_gpr_dw0(r2));
10684 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10685 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10686
10687 /* num = (input == 0) ? 64 : tmpnum */
10688 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10689 /* == 0 */ mkU64(64),
10690 /* != 0 */ mkexpr(tmpnum)));
10691
10692 put_gpr_dw0(r1, mkexpr(num));
10693
10694 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10695 is to first shift the input value by NUM + 1 bits to the left which
10696 causes the leftmost '1' bit to disappear. Then we shift logically to
10697 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10698 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10699 the width of the value-to-be-shifted, we need to special case
10700 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10701 For both such INPUT values the result will be 0. */
10702
10703 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10704 mkU64(1))));
10705
10706 put_gpr_dw0(r1 + 1,
10707 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10708 /* == 0 || == 1*/ mkU64(0),
10709 /* otherwise */
10710 binop(Iop_Shr64,
10711 binop(Iop_Shl64, mkexpr(input),
10712 mkexpr(shift_amount)),
10713 mkexpr(shift_amount))));
10714
10715 /* Compare the original value as an unsigned integer with 0. */
10716 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10717 mktemp(Ity_I64, mkU64(0)), False);
10718
10719 return "flogr";
10720}
10721
sewardj1e5fea62011-05-17 16:18:36 +000010722static HChar *
10723s390_irgen_STCK(IRTemp op2addr)
10724{
10725 IRDirty *d;
10726 IRTemp cc = newTemp(Ity_I64);
10727
10728 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10729 &s390x_dirtyhelper_STCK,
10730 mkIRExprVec_1(mkexpr(op2addr)));
10731 d->mFx = Ifx_Write;
10732 d->mAddr = mkexpr(op2addr);
10733 d->mSize = 8;
10734 stmt(IRStmt_Dirty(d));
10735 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10736 mkexpr(cc), mkU64(0), mkU64(0));
10737 return "stck";
10738}
10739
10740static HChar *
10741s390_irgen_STCKF(IRTemp op2addr)
10742{
10743 IRDirty *d;
10744 IRTemp cc = newTemp(Ity_I64);
10745
10746 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10747 &s390x_dirtyhelper_STCKF,
10748 mkIRExprVec_1(mkexpr(op2addr)));
10749 d->mFx = Ifx_Write;
10750 d->mAddr = mkexpr(op2addr);
10751 d->mSize = 8;
10752 stmt(IRStmt_Dirty(d));
10753 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10754 mkexpr(cc), mkU64(0), mkU64(0));
10755 return "stckf";
10756}
10757
10758static HChar *
10759s390_irgen_STCKE(IRTemp op2addr)
10760{
10761 IRDirty *d;
10762 IRTemp cc = newTemp(Ity_I64);
10763
10764 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10765 &s390x_dirtyhelper_STCKE,
10766 mkIRExprVec_1(mkexpr(op2addr)));
10767 d->mFx = Ifx_Write;
10768 d->mAddr = mkexpr(op2addr);
10769 d->mSize = 16;
10770 stmt(IRStmt_Dirty(d));
10771 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10772 mkexpr(cc), mkU64(0), mkU64(0));
10773 return "stcke";
10774}
10775
florian933065d2011-07-11 01:48:02 +000010776static HChar *
10777s390_irgen_STFLE(IRTemp op2addr)
10778{
10779 IRDirty *d;
10780 IRTemp cc = newTemp(Ity_I64);
10781
10782 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STFLE",
10783 &s390x_dirtyhelper_STFLE,
10784 mkIRExprVec_1(mkexpr(op2addr)));
10785
10786 d->needsBBP = 1; /* Need to pass pointer to guest state to helper */
10787
10788 d->fxState[0].fx = Ifx_Modify; /* read then write */
10789 d->fxState[0].offset = S390X_GUEST_OFFSET(guest_r0);
10790 d->fxState[0].size = sizeof(ULong);
10791 d->nFxState = 1;
10792
10793 d->mAddr = mkexpr(op2addr);
10794 /* Pretend all double words are written */
10795 d->mSize = S390_NUM_FACILITY_DW * sizeof(ULong);
10796 d->mFx = Ifx_Write;
10797
10798 stmt(IRStmt_Dirty(d));
10799
10800 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET), mkexpr(cc), mkU64(0), mkU64(0));
10801
10802 return "stfle";
10803}
10804
floriana4384a32011-08-11 16:58:45 +000010805static HChar *
10806s390_irgen_CKSM(UChar r1,UChar r2)
10807{
10808 IRTemp addr = newTemp(Ity_I64);
10809 IRTemp op = newTemp(Ity_I32);
10810 IRTemp len = newTemp(Ity_I64);
10811 IRTemp oldval = newTemp(Ity_I32);
10812 IRTemp mask = newTemp(Ity_I32);
10813 IRTemp newop = newTemp(Ity_I32);
10814 IRTemp result = newTemp(Ity_I32);
10815 IRTemp result1 = newTemp(Ity_I32);
10816 IRTemp inc = newTemp(Ity_I64);
10817
10818 assign(oldval, get_gpr_w1(r1));
10819 assign(addr, get_gpr_dw0(r2));
10820 assign(len, get_gpr_dw0(r2+1));
10821
10822 /* Condition code is always zero. */
10823 s390_cc_set(0);
10824
10825 /* If length is zero, there is no need to calculate the checksum */
10826 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(len), mkU64(0)),
10827 guest_IA_next_instr);
10828
10829 /* Assiging the increment variable to adjust address and length
10830 later on. */
10831 assign(inc, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10832 mkexpr(len), mkU64(4)));
10833
10834 /* If length < 4 the final 4-byte 2nd operand value is computed by
10835 appending the remaining bytes to the right with 0. This is done
10836 by AND'ing the 4 bytes loaded from memory with an appropriate
10837 mask. If length >= 4, that mask is simply 0xffffffff. */
10838
10839 assign(mask, mkite(binop(Iop_CmpLT64U, mkexpr(len), mkU64(4)),
10840 /* Mask computation when len < 4:
10841 0xffffffff << (32 - (len % 4)*8) */
10842 binop(Iop_Shl32, mkU32(0xffffffff),
10843 unop(Iop_32to8,
10844 binop(Iop_Sub32, mkU32(32),
10845 binop(Iop_Shl32,
10846 unop(Iop_64to32,
10847 binop(Iop_And64,
10848 mkexpr(len), mkU64(3))),
10849 mkU8(3))))),
10850 mkU32(0xffffffff)));
10851
10852 assign(op, load(Ity_I32, mkexpr(addr)));
10853 assign(newop, binop(Iop_And32, mkexpr(op), mkexpr(mask)));
10854 assign(result, binop(Iop_Add32, mkexpr(newop), mkexpr(oldval)));
10855
10856 /* Checking for carry */
10857 assign(result1, mkite(binop(Iop_CmpLT32U, mkexpr(result), mkexpr(newop)),
10858 binop(Iop_Add32, mkexpr(result), mkU32(1)),
10859 mkexpr(result)));
10860
10861 put_gpr_w1(r1, mkexpr(result1));
10862 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(addr), mkexpr(inc)));
10863 put_gpr_dw0(r2+1, binop(Iop_Sub64, mkexpr(len), mkexpr(inc)));
10864
10865 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len), mkU64(0)),
10866 guest_IA_curr_instr);
10867
10868 return "cksm";
10869}
10870
10871
sewardj2019a972011-03-07 16:04:07 +000010872/*------------------------------------------------------------*/
10873/*--- Build IR for special instructions ---*/
10874/*------------------------------------------------------------*/
10875
florianb4df7682011-07-05 02:09:01 +000010876static void
sewardj2019a972011-03-07 16:04:07 +000010877s390_irgen_client_request(void)
10878{
10879 if (0)
10880 vex_printf("%%R3 = client_request ( %%R2 )\n");
10881
10882 irsb->next = mkU64((ULong)(guest_IA_curr_instr
10883 + S390_SPECIAL_OP_PREAMBLE_SIZE
10884 + S390_SPECIAL_OP_SIZE));
10885 irsb->jumpkind = Ijk_ClientReq;
10886
10887 dis_res->whatNext = Dis_StopHere;
10888}
10889
florianb4df7682011-07-05 02:09:01 +000010890static void
sewardj2019a972011-03-07 16:04:07 +000010891s390_irgen_guest_NRADDR(void)
10892{
10893 if (0)
10894 vex_printf("%%R3 = guest_NRADDR\n");
10895
floriane88b3c92011-07-05 02:48:39 +000010896 put_gpr_dw0(3, IRExpr_Get(S390X_GUEST_OFFSET(guest_NRADDR), Ity_I64));
sewardj2019a972011-03-07 16:04:07 +000010897}
10898
florianb4df7682011-07-05 02:09:01 +000010899static void
sewardj2019a972011-03-07 16:04:07 +000010900s390_irgen_call_noredir(void)
10901{
10902 /* Continue after special op */
10903 put_gpr_dw0(14, mkU64(guest_IA_curr_instr
10904 + S390_SPECIAL_OP_PREAMBLE_SIZE
10905 + S390_SPECIAL_OP_SIZE));
10906
10907 /* The address is in REG1, all parameters are in the right (guest) places */
10908 irsb->next = get_gpr_dw0(1);
10909 irsb->jumpkind = Ijk_NoRedir;
10910
10911 dis_res->whatNext = Dis_StopHere;
10912}
10913
10914/* Force proper alignment for the structures below. */
10915#pragma pack(1)
10916
10917
10918static s390_decode_t
10919s390_decode_2byte_and_irgen(UChar *bytes)
10920{
10921 typedef union {
10922 struct {
10923 unsigned int op : 16;
10924 } E;
10925 struct {
10926 unsigned int op : 8;
10927 unsigned int i : 8;
10928 } I;
10929 struct {
10930 unsigned int op : 8;
10931 unsigned int r1 : 4;
10932 unsigned int r2 : 4;
10933 } RR;
10934 } formats;
10935 union {
10936 formats fmt;
10937 UShort value;
10938 } ovl;
10939
10940 vassert(sizeof(formats) == 2);
10941
10942 ((char *)(&ovl.value))[0] = bytes[0];
10943 ((char *)(&ovl.value))[1] = bytes[1];
10944
10945 switch (ovl.value & 0xffff) {
florian30e89012011-08-08 18:22:58 +000010946 case 0x0000: /* invalid opcode */
10947 s390_format_RR_RR(s390_irgen_00, 0, 0); goto ok;
sewardj2019a972011-03-07 16:04:07 +000010948 case 0x0101: /* PR */ goto unimplemented;
10949 case 0x0102: /* UPT */ goto unimplemented;
10950 case 0x0104: /* PTFF */ goto unimplemented;
10951 case 0x0107: /* SCKPF */ goto unimplemented;
10952 case 0x010a: /* PFPO */ goto unimplemented;
10953 case 0x010b: /* TAM */ goto unimplemented;
10954 case 0x010c: /* SAM24 */ goto unimplemented;
10955 case 0x010d: /* SAM31 */ goto unimplemented;
10956 case 0x010e: /* SAM64 */ goto unimplemented;
10957 case 0x01ff: /* TRAP2 */ goto unimplemented;
10958 }
10959
10960 switch ((ovl.value & 0xff00) >> 8) {
10961 case 0x04: /* SPM */ goto unimplemented;
10962 case 0x05: /* BALR */ goto unimplemented;
10963 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10964 goto ok;
10965 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10966 goto ok;
10967 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
10968 case 0x0b: /* BSM */ goto unimplemented;
10969 case 0x0c: /* BASSM */ goto unimplemented;
10970 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10971 goto ok;
florianb0c9a132011-09-08 15:37:39 +000010972 case 0x0e: s390_format_RR(s390_irgen_MVCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10973 goto ok;
10974 case 0x0f: s390_format_RR(s390_irgen_CLCL, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10975 goto ok;
sewardj2019a972011-03-07 16:04:07 +000010976 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10977 goto ok;
10978 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10979 goto ok;
10980 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10981 goto ok;
10982 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10983 goto ok;
10984 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10985 goto ok;
10986 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10987 goto ok;
10988 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10989 goto ok;
10990 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10991 goto ok;
10992 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10993 goto ok;
10994 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10995 goto ok;
10996 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10997 goto ok;
10998 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10999 goto ok;
11000 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11001 goto ok;
11002 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11003 goto ok;
11004 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11005 goto ok;
11006 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11007 goto ok;
11008 case 0x20: /* LPDR */ goto unimplemented;
11009 case 0x21: /* LNDR */ goto unimplemented;
11010 case 0x22: /* LTDR */ goto unimplemented;
11011 case 0x23: /* LCDR */ goto unimplemented;
11012 case 0x24: /* HDR */ goto unimplemented;
11013 case 0x25: /* LDXR */ goto unimplemented;
11014 case 0x26: /* MXR */ goto unimplemented;
11015 case 0x27: /* MXDR */ goto unimplemented;
11016 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11017 goto ok;
11018 case 0x29: /* CDR */ goto unimplemented;
11019 case 0x2a: /* ADR */ goto unimplemented;
11020 case 0x2b: /* SDR */ goto unimplemented;
11021 case 0x2c: /* MDR */ goto unimplemented;
11022 case 0x2d: /* DDR */ goto unimplemented;
11023 case 0x2e: /* AWR */ goto unimplemented;
11024 case 0x2f: /* SWR */ goto unimplemented;
11025 case 0x30: /* LPER */ goto unimplemented;
11026 case 0x31: /* LNER */ goto unimplemented;
11027 case 0x32: /* LTER */ goto unimplemented;
11028 case 0x33: /* LCER */ goto unimplemented;
11029 case 0x34: /* HER */ goto unimplemented;
11030 case 0x35: /* LEDR */ goto unimplemented;
11031 case 0x36: /* AXR */ goto unimplemented;
11032 case 0x37: /* SXR */ goto unimplemented;
11033 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
11034 goto ok;
11035 case 0x39: /* CER */ goto unimplemented;
11036 case 0x3a: /* AER */ goto unimplemented;
11037 case 0x3b: /* SER */ goto unimplemented;
11038 case 0x3c: /* MDER */ goto unimplemented;
11039 case 0x3d: /* DER */ goto unimplemented;
11040 case 0x3e: /* AUR */ goto unimplemented;
11041 case 0x3f: /* SUR */ goto unimplemented;
11042 }
11043
11044 return S390_DECODE_UNKNOWN_INSN;
11045
11046ok:
11047 return S390_DECODE_OK;
11048
11049unimplemented:
11050 return S390_DECODE_UNIMPLEMENTED_INSN;
11051}
11052
11053static s390_decode_t
11054s390_decode_4byte_and_irgen(UChar *bytes)
11055{
11056 typedef union {
11057 struct {
11058 unsigned int op1 : 8;
11059 unsigned int r1 : 4;
11060 unsigned int op2 : 4;
11061 unsigned int i2 : 16;
11062 } RI;
11063 struct {
11064 unsigned int op : 16;
11065 unsigned int : 8;
11066 unsigned int r1 : 4;
11067 unsigned int r2 : 4;
11068 } RRE;
11069 struct {
11070 unsigned int op : 16;
11071 unsigned int r1 : 4;
11072 unsigned int : 4;
11073 unsigned int r3 : 4;
11074 unsigned int r2 : 4;
11075 } RRF;
11076 struct {
11077 unsigned int op : 16;
11078 unsigned int r3 : 4;
11079 unsigned int m4 : 4;
11080 unsigned int r1 : 4;
11081 unsigned int r2 : 4;
11082 } RRF2;
11083 struct {
11084 unsigned int op : 16;
11085 unsigned int r3 : 4;
11086 unsigned int : 4;
11087 unsigned int r1 : 4;
11088 unsigned int r2 : 4;
11089 } RRF3;
11090 struct {
11091 unsigned int op : 16;
11092 unsigned int r3 : 4;
11093 unsigned int : 4;
11094 unsigned int r1 : 4;
11095 unsigned int r2 : 4;
11096 } RRR;
11097 struct {
11098 unsigned int op : 16;
11099 unsigned int r3 : 4;
11100 unsigned int : 4;
11101 unsigned int r1 : 4;
11102 unsigned int r2 : 4;
11103 } RRF4;
11104 struct {
11105 unsigned int op : 8;
11106 unsigned int r1 : 4;
11107 unsigned int r3 : 4;
11108 unsigned int b2 : 4;
11109 unsigned int d2 : 12;
11110 } RS;
11111 struct {
11112 unsigned int op : 8;
11113 unsigned int r1 : 4;
11114 unsigned int r3 : 4;
11115 unsigned int i2 : 16;
11116 } RSI;
11117 struct {
11118 unsigned int op : 8;
11119 unsigned int r1 : 4;
11120 unsigned int x2 : 4;
11121 unsigned int b2 : 4;
11122 unsigned int d2 : 12;
11123 } RX;
11124 struct {
11125 unsigned int op : 16;
11126 unsigned int b2 : 4;
11127 unsigned int d2 : 12;
11128 } S;
11129 struct {
11130 unsigned int op : 8;
11131 unsigned int i2 : 8;
11132 unsigned int b1 : 4;
11133 unsigned int d1 : 12;
11134 } SI;
11135 } formats;
11136 union {
11137 formats fmt;
11138 UInt value;
11139 } ovl;
11140
11141 vassert(sizeof(formats) == 4);
11142
11143 ((char *)(&ovl.value))[0] = bytes[0];
11144 ((char *)(&ovl.value))[1] = bytes[1];
11145 ((char *)(&ovl.value))[2] = bytes[2];
11146 ((char *)(&ovl.value))[3] = bytes[3];
11147
11148 switch ((ovl.value & 0xff0f0000) >> 16) {
11149 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
11150 ovl.fmt.RI.i2); goto ok;
11151 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
11152 ovl.fmt.RI.i2); goto ok;
11153 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
11154 ovl.fmt.RI.i2); goto ok;
11155 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
11156 ovl.fmt.RI.i2); goto ok;
11157 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
11158 ovl.fmt.RI.i2); goto ok;
11159 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
11160 ovl.fmt.RI.i2); goto ok;
11161 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
11162 ovl.fmt.RI.i2); goto ok;
11163 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
11164 ovl.fmt.RI.i2); goto ok;
11165 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
11166 ovl.fmt.RI.i2); goto ok;
11167 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
11168 ovl.fmt.RI.i2); goto ok;
11169 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
11170 ovl.fmt.RI.i2); goto ok;
11171 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
11172 ovl.fmt.RI.i2); goto ok;
11173 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
11174 ovl.fmt.RI.i2); goto ok;
11175 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
11176 ovl.fmt.RI.i2); goto ok;
11177 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
11178 ovl.fmt.RI.i2); goto ok;
11179 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
11180 ovl.fmt.RI.i2); goto ok;
11181 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
11182 ovl.fmt.RI.i2); goto ok;
11183 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
11184 ovl.fmt.RI.i2); goto ok;
11185 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
11186 ovl.fmt.RI.i2); goto ok;
11187 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
11188 ovl.fmt.RI.i2); goto ok;
11189 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11190 goto ok;
11191 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
11192 ovl.fmt.RI.i2); goto ok;
11193 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
11194 ovl.fmt.RI.i2); goto ok;
11195 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
11196 ovl.fmt.RI.i2); goto ok;
11197 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11198 goto ok;
11199 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
11200 ovl.fmt.RI.i2); goto ok;
11201 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11202 goto ok;
11203 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
11204 ovl.fmt.RI.i2); goto ok;
11205 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11206 goto ok;
11207 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
11208 ovl.fmt.RI.i2); goto ok;
11209 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
11210 goto ok;
11211 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
11212 ovl.fmt.RI.i2); goto ok;
11213 }
11214
11215 switch ((ovl.value & 0xffff0000) >> 16) {
11216 case 0x8000: /* SSM */ goto unimplemented;
11217 case 0x8200: /* LPSW */ goto unimplemented;
11218 case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
11219 goto ok;
11220 case 0xb202: /* STIDP */ goto unimplemented;
11221 case 0xb204: /* SCK */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011222 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011223 case 0xb206: /* SCKC */ goto unimplemented;
11224 case 0xb207: /* STCKC */ goto unimplemented;
11225 case 0xb208: /* SPT */ goto unimplemented;
11226 case 0xb209: /* STPT */ goto unimplemented;
11227 case 0xb20a: /* SPKA */ goto unimplemented;
11228 case 0xb20b: /* IPK */ goto unimplemented;
11229 case 0xb20d: /* PTLB */ goto unimplemented;
11230 case 0xb210: /* SPX */ goto unimplemented;
11231 case 0xb211: /* STPX */ goto unimplemented;
11232 case 0xb212: /* STAP */ goto unimplemented;
11233 case 0xb214: /* SIE */ goto unimplemented;
11234 case 0xb218: /* PC */ goto unimplemented;
11235 case 0xb219: /* SAC */ goto unimplemented;
11236 case 0xb21a: /* CFC */ goto unimplemented;
11237 case 0xb221: /* IPTE */ goto unimplemented;
11238 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
11239 case 0xb223: /* IVSK */ goto unimplemented;
11240 case 0xb224: /* IAC */ goto unimplemented;
11241 case 0xb225: /* SSAR */ goto unimplemented;
11242 case 0xb226: /* EPAR */ goto unimplemented;
11243 case 0xb227: /* ESAR */ goto unimplemented;
11244 case 0xb228: /* PT */ goto unimplemented;
11245 case 0xb229: /* ISKE */ goto unimplemented;
11246 case 0xb22a: /* RRBE */ goto unimplemented;
11247 case 0xb22b: /* SSKE */ goto unimplemented;
11248 case 0xb22c: /* TB */ goto unimplemented;
11249 case 0xb22d: /* DXR */ goto unimplemented;
11250 case 0xb22e: /* PGIN */ goto unimplemented;
11251 case 0xb22f: /* PGOUT */ goto unimplemented;
11252 case 0xb230: /* CSCH */ goto unimplemented;
11253 case 0xb231: /* HSCH */ goto unimplemented;
11254 case 0xb232: /* MSCH */ goto unimplemented;
11255 case 0xb233: /* SSCH */ goto unimplemented;
11256 case 0xb234: /* STSCH */ goto unimplemented;
11257 case 0xb235: /* TSCH */ goto unimplemented;
11258 case 0xb236: /* TPI */ goto unimplemented;
11259 case 0xb237: /* SAL */ goto unimplemented;
11260 case 0xb238: /* RSCH */ goto unimplemented;
11261 case 0xb239: /* STCRW */ goto unimplemented;
11262 case 0xb23a: /* STCPS */ goto unimplemented;
11263 case 0xb23b: /* RCHP */ goto unimplemented;
11264 case 0xb23c: /* SCHM */ goto unimplemented;
11265 case 0xb240: /* BAKR */ goto unimplemented;
floriana4384a32011-08-11 16:58:45 +000011266 case 0xb241: s390_format_RRE(s390_irgen_CKSM, ovl.fmt.RRE.r1,
11267 ovl.fmt.RRE.r2); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011268 case 0xb244: /* SQDR */ goto unimplemented;
11269 case 0xb245: /* SQER */ goto unimplemented;
11270 case 0xb246: /* STURA */ goto unimplemented;
11271 case 0xb247: /* MSTA */ goto unimplemented;
11272 case 0xb248: /* PALB */ goto unimplemented;
11273 case 0xb249: /* EREG */ goto unimplemented;
11274 case 0xb24a: /* ESTA */ goto unimplemented;
11275 case 0xb24b: /* LURA */ goto unimplemented;
11276 case 0xb24c: /* TAR */ goto unimplemented;
11277 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
11278 ovl.fmt.RRE.r2); goto ok;
11279 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11280 goto ok;
11281 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
11282 goto ok;
11283 case 0xb250: /* CSP */ goto unimplemented;
11284 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
11285 ovl.fmt.RRE.r2); goto ok;
11286 case 0xb254: /* MVPG */ goto unimplemented;
11287 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
11288 ovl.fmt.RRE.r2); goto ok;
11289 case 0xb257: /* CUSE */ goto unimplemented;
11290 case 0xb258: /* BSG */ goto unimplemented;
11291 case 0xb25a: /* BSA */ goto unimplemented;
11292 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
11293 ovl.fmt.RRE.r2); goto ok;
11294 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
11295 ovl.fmt.RRE.r2); goto ok;
11296 case 0xb263: /* CMPSC */ goto unimplemented;
11297 case 0xb274: /* SIGA */ goto unimplemented;
11298 case 0xb276: /* XSCH */ goto unimplemented;
11299 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011300 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011301 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000011302 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000011303 case 0xb27d: /* STSI */ goto unimplemented;
11304 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
11305 goto ok;
11306 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11307 goto ok;
11308 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
11309 goto ok;
11310 case 0xb2a5: /* TRE */ goto unimplemented;
11311 case 0xb2a6: /* CU21 */ goto unimplemented;
11312 case 0xb2a7: /* CU12 */ goto unimplemented;
florian933065d2011-07-11 01:48:02 +000011313 case 0xb2b0: s390_format_S_RD(s390_irgen_STFLE, ovl.fmt.S.b2, ovl.fmt.S.d2);
11314 goto ok;
sewardj2019a972011-03-07 16:04:07 +000011315 case 0xb2b1: /* STFL */ goto unimplemented;
11316 case 0xb2b2: /* LPSWE */ goto unimplemented;
11317 case 0xb2b8: /* SRNMB */ goto unimplemented;
11318 case 0xb2b9: /* SRNMT */ goto unimplemented;
11319 case 0xb2bd: /* LFAS */ goto unimplemented;
11320 case 0xb2ff: /* TRAP4 */ goto unimplemented;
11321 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
11322 ovl.fmt.RRE.r2); goto ok;
11323 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11324 ovl.fmt.RRE.r2); goto ok;
11325 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11326 ovl.fmt.RRE.r2); goto ok;
11327 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11328 ovl.fmt.RRE.r2); goto ok;
11329 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11330 ovl.fmt.RRE.r2); goto ok;
11331 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11332 ovl.fmt.RRE.r2); goto ok;
11333 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11334 ovl.fmt.RRE.r2); goto ok;
11335 case 0xb307: /* MXDBR */ goto unimplemented;
11336 case 0xb308: /* KEBR */ goto unimplemented;
11337 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11338 ovl.fmt.RRE.r2); goto ok;
11339 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11340 ovl.fmt.RRE.r2); goto ok;
11341 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11342 ovl.fmt.RRE.r2); goto ok;
11343 case 0xb30c: /* MDEBR */ goto unimplemented;
11344 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11345 ovl.fmt.RRE.r2); goto ok;
11346 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11347 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11348 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11349 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11350 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11351 ovl.fmt.RRE.r2); goto ok;
11352 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11353 ovl.fmt.RRE.r2); goto ok;
11354 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11355 ovl.fmt.RRE.r2); goto ok;
11356 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11357 ovl.fmt.RRE.r2); goto ok;
11358 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11359 ovl.fmt.RRE.r2); goto ok;
11360 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11361 ovl.fmt.RRE.r2); goto ok;
11362 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11363 ovl.fmt.RRE.r2); goto ok;
11364 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11365 ovl.fmt.RRE.r2); goto ok;
11366 case 0xb318: /* KDBR */ goto unimplemented;
11367 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11368 ovl.fmt.RRE.r2); goto ok;
11369 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11370 ovl.fmt.RRE.r2); goto ok;
11371 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11372 ovl.fmt.RRE.r2); goto ok;
11373 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11374 ovl.fmt.RRE.r2); goto ok;
11375 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11376 ovl.fmt.RRE.r2); goto ok;
11377 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11378 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11379 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11380 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11381 case 0xb324: /* LDER */ goto unimplemented;
11382 case 0xb325: /* LXDR */ goto unimplemented;
11383 case 0xb326: /* LXER */ goto unimplemented;
11384 case 0xb32e: /* MAER */ goto unimplemented;
11385 case 0xb32f: /* MSER */ goto unimplemented;
11386 case 0xb336: /* SQXR */ goto unimplemented;
11387 case 0xb337: /* MEER */ goto unimplemented;
11388 case 0xb338: /* MAYLR */ goto unimplemented;
11389 case 0xb339: /* MYLR */ goto unimplemented;
11390 case 0xb33a: /* MAYR */ goto unimplemented;
11391 case 0xb33b: /* MYR */ goto unimplemented;
11392 case 0xb33c: /* MAYHR */ goto unimplemented;
11393 case 0xb33d: /* MYHR */ goto unimplemented;
11394 case 0xb33e: /* MADR */ goto unimplemented;
11395 case 0xb33f: /* MSDR */ goto unimplemented;
11396 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11397 ovl.fmt.RRE.r2); goto ok;
11398 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11399 ovl.fmt.RRE.r2); goto ok;
11400 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11401 ovl.fmt.RRE.r2); goto ok;
11402 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11403 ovl.fmt.RRE.r2); goto ok;
11404 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11405 ovl.fmt.RRE.r2); goto ok;
11406 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11407 ovl.fmt.RRE.r2); goto ok;
11408 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11409 ovl.fmt.RRE.r2); goto ok;
11410 case 0xb347: /* FIXBR */ goto unimplemented;
11411 case 0xb348: /* KXBR */ goto unimplemented;
11412 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11413 ovl.fmt.RRE.r2); goto ok;
11414 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11415 ovl.fmt.RRE.r2); goto ok;
11416 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11417 ovl.fmt.RRE.r2); goto ok;
11418 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11419 ovl.fmt.RRE.r2); goto ok;
11420 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11421 ovl.fmt.RRE.r2); goto ok;
11422 case 0xb350: /* TBEDR */ goto unimplemented;
11423 case 0xb351: /* TBDR */ goto unimplemented;
11424 case 0xb353: /* DIEBR */ goto unimplemented;
11425 case 0xb357: /* FIEBR */ goto unimplemented;
11426 case 0xb358: /* THDER */ goto unimplemented;
11427 case 0xb359: /* THDR */ goto unimplemented;
11428 case 0xb35b: /* DIDBR */ goto unimplemented;
11429 case 0xb35f: /* FIDBR */ goto unimplemented;
11430 case 0xb360: /* LPXR */ goto unimplemented;
11431 case 0xb361: /* LNXR */ goto unimplemented;
11432 case 0xb362: /* LTXR */ goto unimplemented;
11433 case 0xb363: /* LCXR */ goto unimplemented;
11434 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11435 ovl.fmt.RRE.r2); goto ok;
11436 case 0xb366: /* LEXR */ goto unimplemented;
11437 case 0xb367: /* FIXR */ goto unimplemented;
11438 case 0xb369: /* CXR */ goto unimplemented;
11439 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11440 ovl.fmt.RRE.r2); goto ok;
11441 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11442 ovl.fmt.RRE.r2); goto ok;
11443 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11444 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11445 goto ok;
11446 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11447 ovl.fmt.RRE.r2); goto ok;
11448 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11449 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11450 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11451 case 0xb377: /* FIER */ goto unimplemented;
11452 case 0xb37f: /* FIDR */ goto unimplemented;
11453 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11454 case 0xb385: /* SFASR */ goto unimplemented;
11455 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11456 case 0xb390: /* CELFBR */ goto unimplemented;
11457 case 0xb391: /* CDLFBR */ goto unimplemented;
11458 case 0xb392: /* CXLFBR */ goto unimplemented;
11459 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11460 ovl.fmt.RRE.r2); goto ok;
11461 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11462 ovl.fmt.RRE.r2); goto ok;
11463 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11464 ovl.fmt.RRE.r2); goto ok;
11465 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11466 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11467 goto ok;
11468 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11469 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11470 goto ok;
11471 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11472 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11473 goto ok;
11474 case 0xb3a0: /* CELGBR */ goto unimplemented;
11475 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11476 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11477 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11478 ovl.fmt.RRE.r2); goto ok;
11479 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11480 ovl.fmt.RRE.r2); goto ok;
11481 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11482 ovl.fmt.RRE.r2); goto ok;
11483 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11484 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11485 goto ok;
11486 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11487 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11488 goto ok;
11489 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11490 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11491 goto ok;
11492 case 0xb3b4: /* CEFR */ goto unimplemented;
11493 case 0xb3b5: /* CDFR */ goto unimplemented;
11494 case 0xb3b6: /* CXFR */ goto unimplemented;
11495 case 0xb3b8: /* CFER */ goto unimplemented;
11496 case 0xb3b9: /* CFDR */ goto unimplemented;
11497 case 0xb3ba: /* CFXR */ goto unimplemented;
11498 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11499 ovl.fmt.RRE.r2); goto ok;
11500 case 0xb3c4: /* CEGR */ goto unimplemented;
11501 case 0xb3c5: /* CDGR */ goto unimplemented;
11502 case 0xb3c6: /* CXGR */ goto unimplemented;
11503 case 0xb3c8: /* CGER */ goto unimplemented;
11504 case 0xb3c9: /* CGDR */ goto unimplemented;
11505 case 0xb3ca: /* CGXR */ goto unimplemented;
11506 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11507 ovl.fmt.RRE.r2); goto ok;
11508 case 0xb3d0: /* MDTR */ goto unimplemented;
11509 case 0xb3d1: /* DDTR */ goto unimplemented;
11510 case 0xb3d2: /* ADTR */ goto unimplemented;
11511 case 0xb3d3: /* SDTR */ goto unimplemented;
11512 case 0xb3d4: /* LDETR */ goto unimplemented;
11513 case 0xb3d5: /* LEDTR */ goto unimplemented;
11514 case 0xb3d6: /* LTDTR */ goto unimplemented;
11515 case 0xb3d7: /* FIDTR */ goto unimplemented;
11516 case 0xb3d8: /* MXTR */ goto unimplemented;
11517 case 0xb3d9: /* DXTR */ goto unimplemented;
11518 case 0xb3da: /* AXTR */ goto unimplemented;
11519 case 0xb3db: /* SXTR */ goto unimplemented;
11520 case 0xb3dc: /* LXDTR */ goto unimplemented;
11521 case 0xb3dd: /* LDXTR */ goto unimplemented;
11522 case 0xb3de: /* LTXTR */ goto unimplemented;
11523 case 0xb3df: /* FIXTR */ goto unimplemented;
11524 case 0xb3e0: /* KDTR */ goto unimplemented;
11525 case 0xb3e1: /* CGDTR */ goto unimplemented;
11526 case 0xb3e2: /* CUDTR */ goto unimplemented;
11527 case 0xb3e3: /* CSDTR */ goto unimplemented;
11528 case 0xb3e4: /* CDTR */ goto unimplemented;
11529 case 0xb3e5: /* EEDTR */ goto unimplemented;
11530 case 0xb3e7: /* ESDTR */ goto unimplemented;
11531 case 0xb3e8: /* KXTR */ goto unimplemented;
11532 case 0xb3e9: /* CGXTR */ goto unimplemented;
11533 case 0xb3ea: /* CUXTR */ goto unimplemented;
11534 case 0xb3eb: /* CSXTR */ goto unimplemented;
11535 case 0xb3ec: /* CXTR */ goto unimplemented;
11536 case 0xb3ed: /* EEXTR */ goto unimplemented;
11537 case 0xb3ef: /* ESXTR */ goto unimplemented;
11538 case 0xb3f1: /* CDGTR */ goto unimplemented;
11539 case 0xb3f2: /* CDUTR */ goto unimplemented;
11540 case 0xb3f3: /* CDSTR */ goto unimplemented;
11541 case 0xb3f4: /* CEDTR */ goto unimplemented;
11542 case 0xb3f5: /* QADTR */ goto unimplemented;
11543 case 0xb3f6: /* IEDTR */ goto unimplemented;
11544 case 0xb3f7: /* RRDTR */ goto unimplemented;
11545 case 0xb3f9: /* CXGTR */ goto unimplemented;
11546 case 0xb3fa: /* CXUTR */ goto unimplemented;
11547 case 0xb3fb: /* CXSTR */ goto unimplemented;
11548 case 0xb3fc: /* CEXTR */ goto unimplemented;
11549 case 0xb3fd: /* QAXTR */ goto unimplemented;
11550 case 0xb3fe: /* IEXTR */ goto unimplemented;
11551 case 0xb3ff: /* RRXTR */ goto unimplemented;
11552 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11553 ovl.fmt.RRE.r2); goto ok;
11554 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11555 ovl.fmt.RRE.r2); goto ok;
11556 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11557 ovl.fmt.RRE.r2); goto ok;
11558 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11559 ovl.fmt.RRE.r2); goto ok;
11560 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11561 ovl.fmt.RRE.r2); goto ok;
11562 case 0xb905: /* LURAG */ goto unimplemented;
11563 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11564 ovl.fmt.RRE.r2); goto ok;
11565 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11566 ovl.fmt.RRE.r2); goto ok;
11567 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11568 ovl.fmt.RRE.r2); goto ok;
11569 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11570 ovl.fmt.RRE.r2); goto ok;
11571 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11572 ovl.fmt.RRE.r2); goto ok;
11573 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11574 ovl.fmt.RRE.r2); goto ok;
11575 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11576 ovl.fmt.RRE.r2); goto ok;
11577 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11578 ovl.fmt.RRE.r2); goto ok;
11579 case 0xb90e: /* EREGG */ goto unimplemented;
11580 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11581 ovl.fmt.RRE.r2); goto ok;
11582 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11583 ovl.fmt.RRE.r2); goto ok;
11584 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11585 ovl.fmt.RRE.r2); goto ok;
11586 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11587 ovl.fmt.RRE.r2); goto ok;
11588 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11589 ovl.fmt.RRE.r2); goto ok;
11590 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11591 ovl.fmt.RRE.r2); goto ok;
11592 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11593 ovl.fmt.RRE.r2); goto ok;
11594 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11595 ovl.fmt.RRE.r2); goto ok;
11596 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11597 ovl.fmt.RRE.r2); goto ok;
11598 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11599 ovl.fmt.RRE.r2); goto ok;
11600 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11601 ovl.fmt.RRE.r2); goto ok;
11602 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11603 ovl.fmt.RRE.r2); goto ok;
11604 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11605 ovl.fmt.RRE.r2); goto ok;
11606 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11607 ovl.fmt.RRE.r2); goto ok;
11608 case 0xb91e: /* KMAC */ goto unimplemented;
11609 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11610 ovl.fmt.RRE.r2); goto ok;
11611 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11612 ovl.fmt.RRE.r2); goto ok;
11613 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11614 ovl.fmt.RRE.r2); goto ok;
11615 case 0xb925: /* STURG */ goto unimplemented;
11616 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11617 ovl.fmt.RRE.r2); goto ok;
11618 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11619 ovl.fmt.RRE.r2); goto ok;
11620 case 0xb928: /* PCKMO */ goto unimplemented;
11621 case 0xb92b: /* KMO */ goto unimplemented;
11622 case 0xb92c: /* PCC */ goto unimplemented;
11623 case 0xb92d: /* KMCTR */ goto unimplemented;
11624 case 0xb92e: /* KM */ goto unimplemented;
11625 case 0xb92f: /* KMC */ goto unimplemented;
11626 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11627 ovl.fmt.RRE.r2); goto ok;
11628 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11629 ovl.fmt.RRE.r2); goto ok;
11630 case 0xb93e: /* KIMD */ goto unimplemented;
11631 case 0xb93f: /* KLMD */ goto unimplemented;
11632 case 0xb941: /* CFDTR */ goto unimplemented;
11633 case 0xb942: /* CLGDTR */ goto unimplemented;
11634 case 0xb943: /* CLFDTR */ goto unimplemented;
11635 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11636 ovl.fmt.RRE.r2); goto ok;
11637 case 0xb949: /* CFXTR */ goto unimplemented;
11638 case 0xb94a: /* CLGXTR */ goto unimplemented;
11639 case 0xb94b: /* CLFXTR */ goto unimplemented;
11640 case 0xb951: /* CDFTR */ goto unimplemented;
11641 case 0xb952: /* CDLGTR */ goto unimplemented;
11642 case 0xb953: /* CDLFTR */ goto unimplemented;
11643 case 0xb959: /* CXFTR */ goto unimplemented;
11644 case 0xb95a: /* CXLGTR */ goto unimplemented;
11645 case 0xb95b: /* CXLFTR */ goto unimplemented;
11646 case 0xb960: /* CGRT */ goto unimplemented;
11647 case 0xb961: /* CLGRT */ goto unimplemented;
11648 case 0xb972: /* CRT */ goto unimplemented;
11649 case 0xb973: /* CLRT */ goto unimplemented;
11650 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11651 ovl.fmt.RRE.r2); goto ok;
11652 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11653 ovl.fmt.RRE.r2); goto ok;
11654 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11655 ovl.fmt.RRE.r2); goto ok;
11656 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11657 ovl.fmt.RRE.r2); goto ok;
11658 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11659 ovl.fmt.RRE.r2); goto ok;
11660 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11661 ovl.fmt.RRE.r2); goto ok;
11662 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11663 ovl.fmt.RRE.r2); goto ok;
11664 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11665 ovl.fmt.RRE.r2); goto ok;
11666 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11667 ovl.fmt.RRE.r2); goto ok;
11668 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11669 ovl.fmt.RRE.r2); goto ok;
11670 case 0xb98a: /* CSPG */ goto unimplemented;
11671 case 0xb98d: /* EPSW */ goto unimplemented;
11672 case 0xb98e: /* IDTE */ goto unimplemented;
11673 case 0xb990: /* TRTT */ goto unimplemented;
11674 case 0xb991: /* TRTO */ goto unimplemented;
11675 case 0xb992: /* TROT */ goto unimplemented;
11676 case 0xb993: /* TROO */ goto unimplemented;
11677 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11678 ovl.fmt.RRE.r2); goto ok;
11679 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11680 ovl.fmt.RRE.r2); goto ok;
11681 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11682 ovl.fmt.RRE.r2); goto ok;
11683 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11684 ovl.fmt.RRE.r2); goto ok;
11685 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11686 ovl.fmt.RRE.r2); goto ok;
11687 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11688 ovl.fmt.RRE.r2); goto ok;
11689 case 0xb99a: /* EPAIR */ goto unimplemented;
11690 case 0xb99b: /* ESAIR */ goto unimplemented;
11691 case 0xb99d: /* ESEA */ goto unimplemented;
11692 case 0xb99e: /* PTI */ goto unimplemented;
11693 case 0xb99f: /* SSAIR */ goto unimplemented;
11694 case 0xb9a2: /* PTF */ goto unimplemented;
11695 case 0xb9aa: /* LPTEA */ goto unimplemented;
11696 case 0xb9ae: /* RRBM */ goto unimplemented;
11697 case 0xb9af: /* PFMF */ goto unimplemented;
11698 case 0xb9b0: /* CU14 */ goto unimplemented;
11699 case 0xb9b1: /* CU24 */ goto unimplemented;
11700 case 0xb9b2: /* CU41 */ goto unimplemented;
11701 case 0xb9b3: /* CU42 */ goto unimplemented;
11702 case 0xb9bd: /* TRTRE */ goto unimplemented;
11703 case 0xb9be: /* SRSTU */ goto unimplemented;
11704 case 0xb9bf: /* TRTE */ goto unimplemented;
11705 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11706 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11707 goto ok;
11708 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
11709 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11710 goto ok;
11711 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
11712 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11713 goto ok;
11714 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
11715 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11716 goto ok;
11717 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
11718 ovl.fmt.RRE.r2); goto ok;
11719 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
11720 ovl.fmt.RRE.r2); goto ok;
11721 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
11722 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11723 goto ok;
11724 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
11725 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11726 goto ok;
11727 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
11728 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11729 goto ok;
11730 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
11731 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11732 goto ok;
11733 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
11734 ovl.fmt.RRE.r2); goto ok;
11735 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
11736 ovl.fmt.RRE.r2); goto ok;
11737 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000011738 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
11739 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11740 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011741 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
11742 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11743 goto ok;
11744 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
11745 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11746 goto ok;
11747 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
11748 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11749 goto ok;
11750 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
11751 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11752 goto ok;
11753 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
11754 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11755 goto ok;
11756 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
11757 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11758 goto ok;
11759 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
11760 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11761 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000011762 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
11763 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11764 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011765 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
11766 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11767 goto ok;
11768 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
11769 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11770 goto ok;
11771 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
11772 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11773 goto ok;
11774 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
11775 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11776 goto ok;
11777 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
11778 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11779 goto ok;
11780 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
11781 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11782 goto ok;
11783 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
11784 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11785 goto ok;
11786 }
11787
11788 switch ((ovl.value & 0xff000000) >> 24) {
11789 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11790 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11791 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11792 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11793 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11794 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11795 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11796 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11797 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11798 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11799 case 0x45: /* BAL */ goto unimplemented;
11800 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11801 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11802 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11803 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11804 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11805 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11806 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11807 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11808 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11809 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11810 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11811 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11812 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11813 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11814 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11815 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11816 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11817 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11818 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11819 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11820 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11821 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11822 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11823 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11824 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11825 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11826 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11827 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11828 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11829 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11830 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11831 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11832 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11833 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11834 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11835 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11836 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11837 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11838 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11839 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11840 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11841 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11842 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11843 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11844 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11845 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11846 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11847 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11848 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11849 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11850 case 0x67: /* MXD */ goto unimplemented;
11851 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11852 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11853 case 0x69: /* CD */ goto unimplemented;
11854 case 0x6a: /* AD */ goto unimplemented;
11855 case 0x6b: /* SD */ goto unimplemented;
11856 case 0x6c: /* MD */ goto unimplemented;
11857 case 0x6d: /* DD */ goto unimplemented;
11858 case 0x6e: /* AW */ goto unimplemented;
11859 case 0x6f: /* SW */ goto unimplemented;
11860 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11861 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11862 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11863 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11864 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11865 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11866 case 0x79: /* CE */ goto unimplemented;
11867 case 0x7a: /* AE */ goto unimplemented;
11868 case 0x7b: /* SE */ goto unimplemented;
11869 case 0x7c: /* MDE */ goto unimplemented;
11870 case 0x7d: /* DE */ goto unimplemented;
11871 case 0x7e: /* AU */ goto unimplemented;
11872 case 0x7f: /* SU */ goto unimplemented;
11873 case 0x83: /* DIAG */ goto unimplemented;
11874 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
11875 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11876 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
11877 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11878 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11879 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11880 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11881 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11882 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11883 ovl.fmt.RS.d2); goto ok;
11884 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11885 ovl.fmt.RS.d2); goto ok;
11886 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11887 ovl.fmt.RS.d2); goto ok;
11888 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11889 ovl.fmt.RS.d2); goto ok;
11890 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11891 ovl.fmt.RS.d2); goto ok;
11892 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11893 ovl.fmt.RS.d2); goto ok;
11894 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11895 ovl.fmt.RS.d2); goto ok;
11896 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11897 ovl.fmt.RS.d2); goto ok;
11898 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11899 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11900 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11901 ovl.fmt.SI.d1); goto ok;
11902 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11903 ovl.fmt.SI.d1); goto ok;
11904 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11905 ovl.fmt.SI.d1); goto ok;
11906 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11907 ovl.fmt.SI.d1); goto ok;
11908 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11909 ovl.fmt.SI.d1); goto ok;
11910 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11911 ovl.fmt.SI.d1); goto ok;
11912 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11913 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11914 case 0x99: /* TRACE */ goto unimplemented;
11915 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11916 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11917 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11918 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11919 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
11920 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11921 goto ok;
11922 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
11923 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11924 goto ok;
11925 case 0xac: /* STNSM */ goto unimplemented;
11926 case 0xad: /* STOSM */ goto unimplemented;
11927 case 0xae: /* SIGP */ goto unimplemented;
11928 case 0xaf: /* MC */ goto unimplemented;
11929 case 0xb1: /* LRA */ goto unimplemented;
11930 case 0xb6: /* STCTL */ goto unimplemented;
11931 case 0xb7: /* LCTL */ goto unimplemented;
11932 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11933 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11934 case 0xbb: /* CDS */ goto unimplemented;
11935 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11936 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11937 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11938 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11939 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11940 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11941 }
11942
11943 return S390_DECODE_UNKNOWN_INSN;
11944
11945ok:
11946 return S390_DECODE_OK;
11947
11948unimplemented:
11949 return S390_DECODE_UNIMPLEMENTED_INSN;
11950}
11951
11952static s390_decode_t
11953s390_decode_6byte_and_irgen(UChar *bytes)
11954{
11955 typedef union {
11956 struct {
11957 unsigned int op1 : 8;
11958 unsigned int r1 : 4;
11959 unsigned int r3 : 4;
11960 unsigned int i2 : 16;
11961 unsigned int : 8;
11962 unsigned int op2 : 8;
11963 } RIE;
11964 struct {
11965 unsigned int op1 : 8;
11966 unsigned int r1 : 4;
11967 unsigned int r2 : 4;
11968 unsigned int i3 : 8;
11969 unsigned int i4 : 8;
11970 unsigned int i5 : 8;
11971 unsigned int op2 : 8;
11972 } RIE_RRUUU;
11973 struct {
11974 unsigned int op1 : 8;
11975 unsigned int r1 : 4;
11976 unsigned int : 4;
11977 unsigned int i2 : 16;
11978 unsigned int m3 : 4;
11979 unsigned int : 4;
11980 unsigned int op2 : 8;
11981 } RIEv1;
11982 struct {
11983 unsigned int op1 : 8;
11984 unsigned int r1 : 4;
11985 unsigned int r2 : 4;
11986 unsigned int i4 : 16;
11987 unsigned int m3 : 4;
11988 unsigned int : 4;
11989 unsigned int op2 : 8;
11990 } RIE_RRPU;
11991 struct {
11992 unsigned int op1 : 8;
11993 unsigned int r1 : 4;
11994 unsigned int m3 : 4;
11995 unsigned int i4 : 16;
11996 unsigned int i2 : 8;
11997 unsigned int op2 : 8;
11998 } RIEv3;
11999 struct {
12000 unsigned int op1 : 8;
12001 unsigned int r1 : 4;
12002 unsigned int op2 : 4;
12003 unsigned int i2 : 32;
12004 } RIL;
12005 struct {
12006 unsigned int op1 : 8;
12007 unsigned int r1 : 4;
12008 unsigned int m3 : 4;
12009 unsigned int b4 : 4;
12010 unsigned int d4 : 12;
12011 unsigned int i2 : 8;
12012 unsigned int op2 : 8;
12013 } RIS;
12014 struct {
12015 unsigned int op1 : 8;
12016 unsigned int r1 : 4;
12017 unsigned int r2 : 4;
12018 unsigned int b4 : 4;
12019 unsigned int d4 : 12;
12020 unsigned int m3 : 4;
12021 unsigned int : 4;
12022 unsigned int op2 : 8;
12023 } RRS;
12024 struct {
12025 unsigned int op1 : 8;
12026 unsigned int l1 : 4;
12027 unsigned int : 4;
12028 unsigned int b1 : 4;
12029 unsigned int d1 : 12;
12030 unsigned int : 8;
12031 unsigned int op2 : 8;
12032 } RSL;
12033 struct {
12034 unsigned int op1 : 8;
12035 unsigned int r1 : 4;
12036 unsigned int r3 : 4;
12037 unsigned int b2 : 4;
12038 unsigned int dl2 : 12;
12039 unsigned int dh2 : 8;
12040 unsigned int op2 : 8;
12041 } RSY;
12042 struct {
12043 unsigned int op1 : 8;
12044 unsigned int r1 : 4;
12045 unsigned int x2 : 4;
12046 unsigned int b2 : 4;
12047 unsigned int d2 : 12;
12048 unsigned int : 8;
12049 unsigned int op2 : 8;
12050 } RXE;
12051 struct {
12052 unsigned int op1 : 8;
12053 unsigned int r3 : 4;
12054 unsigned int x2 : 4;
12055 unsigned int b2 : 4;
12056 unsigned int d2 : 12;
12057 unsigned int r1 : 4;
12058 unsigned int : 4;
12059 unsigned int op2 : 8;
12060 } RXF;
12061 struct {
12062 unsigned int op1 : 8;
12063 unsigned int r1 : 4;
12064 unsigned int x2 : 4;
12065 unsigned int b2 : 4;
12066 unsigned int dl2 : 12;
12067 unsigned int dh2 : 8;
12068 unsigned int op2 : 8;
12069 } RXY;
12070 struct {
12071 unsigned int op1 : 8;
12072 unsigned int i2 : 8;
12073 unsigned int b1 : 4;
12074 unsigned int dl1 : 12;
12075 unsigned int dh1 : 8;
12076 unsigned int op2 : 8;
12077 } SIY;
12078 struct {
12079 unsigned int op : 8;
12080 unsigned int l : 8;
12081 unsigned int b1 : 4;
12082 unsigned int d1 : 12;
12083 unsigned int b2 : 4;
12084 unsigned int d2 : 12;
12085 } SS;
12086 struct {
12087 unsigned int op : 8;
12088 unsigned int l1 : 4;
12089 unsigned int l2 : 4;
12090 unsigned int b1 : 4;
12091 unsigned int d1 : 12;
12092 unsigned int b2 : 4;
12093 unsigned int d2 : 12;
12094 } SS_LLRDRD;
12095 struct {
12096 unsigned int op : 8;
12097 unsigned int r1 : 4;
12098 unsigned int r3 : 4;
12099 unsigned int b2 : 4;
12100 unsigned int d2 : 12;
12101 unsigned int b4 : 4;
12102 unsigned int d4 : 12;
12103 } SS_RRRDRD2;
12104 struct {
12105 unsigned int op : 16;
12106 unsigned int b1 : 4;
12107 unsigned int d1 : 12;
12108 unsigned int b2 : 4;
12109 unsigned int d2 : 12;
12110 } SSE;
12111 struct {
12112 unsigned int op1 : 8;
12113 unsigned int r3 : 4;
12114 unsigned int op2 : 4;
12115 unsigned int b1 : 4;
12116 unsigned int d1 : 12;
12117 unsigned int b2 : 4;
12118 unsigned int d2 : 12;
12119 } SSF;
12120 struct {
12121 unsigned int op : 16;
12122 unsigned int b1 : 4;
12123 unsigned int d1 : 12;
12124 unsigned int i2 : 16;
12125 } SIL;
12126 } formats;
12127 union {
12128 formats fmt;
12129 ULong value;
12130 } ovl;
12131
12132 vassert(sizeof(formats) == 6);
12133
12134 ((char *)(&ovl.value))[0] = bytes[0];
12135 ((char *)(&ovl.value))[1] = bytes[1];
12136 ((char *)(&ovl.value))[2] = bytes[2];
12137 ((char *)(&ovl.value))[3] = bytes[3];
12138 ((char *)(&ovl.value))[4] = bytes[4];
12139 ((char *)(&ovl.value))[5] = bytes[5];
12140 ((char *)(&ovl.value))[6] = 0x0;
12141 ((char *)(&ovl.value))[7] = 0x0;
12142
12143 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
12144 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
12145 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12146 ovl.fmt.RXY.dl2,
12147 ovl.fmt.RXY.dh2); goto ok;
12148 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
12149 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
12150 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12151 ovl.fmt.RXY.dl2,
12152 ovl.fmt.RXY.dh2); goto ok;
12153 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
12154 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12155 ovl.fmt.RXY.dl2,
12156 ovl.fmt.RXY.dh2); goto ok;
12157 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
12158 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12159 ovl.fmt.RXY.dl2,
12160 ovl.fmt.RXY.dh2); goto ok;
12161 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
12162 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12163 ovl.fmt.RXY.dl2,
12164 ovl.fmt.RXY.dh2); goto ok;
12165 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
12166 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12167 ovl.fmt.RXY.dl2,
12168 ovl.fmt.RXY.dh2); goto ok;
12169 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
12170 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12171 ovl.fmt.RXY.dl2,
12172 ovl.fmt.RXY.dh2); goto ok;
12173 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
12174 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12175 ovl.fmt.RXY.dl2,
12176 ovl.fmt.RXY.dh2); goto ok;
12177 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
12178 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12179 ovl.fmt.RXY.dl2,
12180 ovl.fmt.RXY.dh2); goto ok;
12181 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
12182 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
12183 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12184 ovl.fmt.RXY.dl2,
12185 ovl.fmt.RXY.dh2); goto ok;
12186 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
12187 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12188 ovl.fmt.RXY.dl2,
12189 ovl.fmt.RXY.dh2); goto ok;
12190 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
12191 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
12192 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12193 ovl.fmt.RXY.dl2,
12194 ovl.fmt.RXY.dh2); goto ok;
12195 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
12196 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12197 ovl.fmt.RXY.dl2,
12198 ovl.fmt.RXY.dh2); goto ok;
12199 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
12200 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12201 ovl.fmt.RXY.dl2,
12202 ovl.fmt.RXY.dh2); goto ok;
12203 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
12204 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12205 ovl.fmt.RXY.dl2,
12206 ovl.fmt.RXY.dh2); goto ok;
12207 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
12208 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12209 ovl.fmt.RXY.dl2,
12210 ovl.fmt.RXY.dh2); goto ok;
12211 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
12212 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12213 ovl.fmt.RXY.dl2,
12214 ovl.fmt.RXY.dh2); goto ok;
12215 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
12216 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12217 ovl.fmt.RXY.dl2,
12218 ovl.fmt.RXY.dh2); goto ok;
12219 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
12220 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12221 ovl.fmt.RXY.dl2,
12222 ovl.fmt.RXY.dh2); goto ok;
12223 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
12224 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12225 ovl.fmt.RXY.dl2,
12226 ovl.fmt.RXY.dh2); goto ok;
12227 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
12228 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12229 ovl.fmt.RXY.dl2,
12230 ovl.fmt.RXY.dh2); goto ok;
12231 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
12232 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12233 ovl.fmt.RXY.dl2,
12234 ovl.fmt.RXY.dh2); goto ok;
12235 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
12236 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12237 ovl.fmt.RXY.dl2,
12238 ovl.fmt.RXY.dh2); goto ok;
12239 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
12240 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12241 ovl.fmt.RXY.dl2,
12242 ovl.fmt.RXY.dh2); goto ok;
12243 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
12244 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12245 ovl.fmt.RXY.dl2,
12246 ovl.fmt.RXY.dh2); goto ok;
12247 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
12248 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12249 ovl.fmt.RXY.dl2,
12250 ovl.fmt.RXY.dh2); goto ok;
12251 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
12252 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12253 ovl.fmt.RXY.dl2,
12254 ovl.fmt.RXY.dh2); goto ok;
12255 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
12256 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
12257 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12258 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12259 ovl.fmt.RXY.dh2); goto ok;
12260 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
12261 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12262 ovl.fmt.RXY.dl2,
12263 ovl.fmt.RXY.dh2); goto ok;
12264 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
12265 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12266 ovl.fmt.RXY.dl2,
12267 ovl.fmt.RXY.dh2); goto ok;
12268 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
12269 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12270 ovl.fmt.RXY.dl2,
12271 ovl.fmt.RXY.dh2); goto ok;
12272 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
12273 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12274 ovl.fmt.RXY.dl2,
12275 ovl.fmt.RXY.dh2); goto ok;
12276 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
12277 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12278 ovl.fmt.RXY.dl2,
12279 ovl.fmt.RXY.dh2); goto ok;
12280 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
12281 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12282 ovl.fmt.RXY.dl2,
12283 ovl.fmt.RXY.dh2); goto ok;
12284 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
12285 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
12286 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
12287 ovl.fmt.RXY.dh2); goto ok;
12288 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
12289 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12290 ovl.fmt.RXY.dl2,
12291 ovl.fmt.RXY.dh2); goto ok;
12292 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
12293 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12294 ovl.fmt.RXY.dl2,
12295 ovl.fmt.RXY.dh2); goto ok;
12296 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
12297 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12298 ovl.fmt.RXY.dl2,
12299 ovl.fmt.RXY.dh2); goto ok;
12300 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
12301 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12302 ovl.fmt.RXY.dl2,
12303 ovl.fmt.RXY.dh2); goto ok;
12304 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
12305 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12306 ovl.fmt.RXY.dl2,
12307 ovl.fmt.RXY.dh2); goto ok;
12308 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
12309 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12310 ovl.fmt.RXY.dl2,
12311 ovl.fmt.RXY.dh2); goto ok;
12312 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
12313 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12314 ovl.fmt.RXY.dl2,
12315 ovl.fmt.RXY.dh2); goto ok;
12316 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
12317 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12318 ovl.fmt.RXY.dl2,
12319 ovl.fmt.RXY.dh2); goto ok;
12320 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
12321 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12322 ovl.fmt.RXY.dl2,
12323 ovl.fmt.RXY.dh2); goto ok;
12324 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12325 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12326 ovl.fmt.RXY.dl2,
12327 ovl.fmt.RXY.dh2); goto ok;
12328 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12329 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12330 ovl.fmt.RXY.dl2,
12331 ovl.fmt.RXY.dh2); goto ok;
12332 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12333 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12334 ovl.fmt.RXY.dl2,
12335 ovl.fmt.RXY.dh2); goto ok;
12336 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12337 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12338 ovl.fmt.RXY.dl2,
12339 ovl.fmt.RXY.dh2); goto ok;
12340 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12341 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12342 ovl.fmt.RXY.dl2,
12343 ovl.fmt.RXY.dh2); goto ok;
12344 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12345 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12346 ovl.fmt.RXY.dl2,
12347 ovl.fmt.RXY.dh2); goto ok;
12348 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12349 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12350 ovl.fmt.RXY.dl2,
12351 ovl.fmt.RXY.dh2); goto ok;
12352 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12353 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12354 ovl.fmt.RXY.dl2,
12355 ovl.fmt.RXY.dh2); goto ok;
12356 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12357 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12358 ovl.fmt.RXY.dl2,
12359 ovl.fmt.RXY.dh2); goto ok;
12360 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12361 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12362 ovl.fmt.RXY.dl2,
12363 ovl.fmt.RXY.dh2); goto ok;
12364 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12365 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12366 ovl.fmt.RXY.dl2,
12367 ovl.fmt.RXY.dh2); goto ok;
12368 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12369 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12370 ovl.fmt.RXY.dl2,
12371 ovl.fmt.RXY.dh2); goto ok;
12372 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12373 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12374 ovl.fmt.RXY.dl2,
12375 ovl.fmt.RXY.dh2); goto ok;
12376 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12377 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12378 ovl.fmt.RXY.dl2,
12379 ovl.fmt.RXY.dh2); goto ok;
12380 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12381 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12382 ovl.fmt.RXY.dl2,
12383 ovl.fmt.RXY.dh2); goto ok;
12384 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12385 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12386 ovl.fmt.RXY.dl2,
12387 ovl.fmt.RXY.dh2); goto ok;
12388 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12389 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12390 ovl.fmt.RXY.dl2,
12391 ovl.fmt.RXY.dh2); goto ok;
12392 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12393 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12394 ovl.fmt.RXY.dl2,
12395 ovl.fmt.RXY.dh2); goto ok;
12396 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12397 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12398 ovl.fmt.RXY.dl2,
12399 ovl.fmt.RXY.dh2); goto ok;
12400 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12401 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12402 ovl.fmt.RXY.dl2,
12403 ovl.fmt.RXY.dh2); goto ok;
12404 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12405 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12406 ovl.fmt.RXY.dl2,
12407 ovl.fmt.RXY.dh2); goto ok;
12408 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12409 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12410 ovl.fmt.RXY.dl2,
12411 ovl.fmt.RXY.dh2); goto ok;
12412 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12413 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12414 ovl.fmt.RXY.dl2,
12415 ovl.fmt.RXY.dh2); goto ok;
12416 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12417 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12418 ovl.fmt.RXY.dl2,
12419 ovl.fmt.RXY.dh2); goto ok;
12420 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12421 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12422 ovl.fmt.RXY.dl2,
12423 ovl.fmt.RXY.dh2); goto ok;
12424 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12425 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12426 ovl.fmt.RXY.dl2,
12427 ovl.fmt.RXY.dh2); goto ok;
12428 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12429 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12430 ovl.fmt.RXY.dl2,
12431 ovl.fmt.RXY.dh2); goto ok;
12432 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12433 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12434 ovl.fmt.RXY.dl2,
12435 ovl.fmt.RXY.dh2); goto ok;
12436 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12437 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12438 ovl.fmt.RXY.dl2,
12439 ovl.fmt.RXY.dh2); goto ok;
12440 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12441 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12442 ovl.fmt.RXY.dl2,
12443 ovl.fmt.RXY.dh2); goto ok;
12444 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12445 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12446 ovl.fmt.RXY.dl2,
12447 ovl.fmt.RXY.dh2); goto ok;
12448 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12449 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12450 ovl.fmt.RXY.dl2,
12451 ovl.fmt.RXY.dh2); goto ok;
12452 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12453 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12454 ovl.fmt.RXY.dl2,
12455 ovl.fmt.RXY.dh2); goto ok;
12456 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12457 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12458 ovl.fmt.RXY.dl2,
12459 ovl.fmt.RXY.dh2); goto ok;
12460 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12461 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12462 ovl.fmt.RXY.dl2,
12463 ovl.fmt.RXY.dh2); goto ok;
12464 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12465 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12466 ovl.fmt.RXY.dl2,
12467 ovl.fmt.RXY.dh2); goto ok;
12468 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12469 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12470 ovl.fmt.RXY.dl2,
12471 ovl.fmt.RXY.dh2); goto ok;
12472 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12473 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12474 ovl.fmt.RXY.dl2,
12475 ovl.fmt.RXY.dh2); goto ok;
12476 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12477 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12478 ovl.fmt.RXY.dl2,
12479 ovl.fmt.RXY.dh2); goto ok;
12480 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12481 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12482 ovl.fmt.RXY.dl2,
12483 ovl.fmt.RXY.dh2); goto ok;
12484 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12485 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12486 ovl.fmt.RXY.dl2,
12487 ovl.fmt.RXY.dh2); goto ok;
12488 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12489 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12490 ovl.fmt.RXY.dl2,
12491 ovl.fmt.RXY.dh2); goto ok;
12492 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12493 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12494 ovl.fmt.RXY.dl2,
12495 ovl.fmt.RXY.dh2); goto ok;
12496 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12497 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12498 ovl.fmt.RXY.dl2,
12499 ovl.fmt.RXY.dh2); goto ok;
12500 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12501 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12502 ovl.fmt.RSY.dl2,
12503 ovl.fmt.RSY.dh2); goto ok;
12504 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12505 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12506 ovl.fmt.RSY.dl2,
12507 ovl.fmt.RSY.dh2); goto ok;
12508 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12509 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12510 ovl.fmt.RSY.dl2,
12511 ovl.fmt.RSY.dh2); goto ok;
12512 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12513 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12514 ovl.fmt.RSY.dl2,
12515 ovl.fmt.RSY.dh2); goto ok;
12516 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12517 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12518 ovl.fmt.RSY.dl2,
12519 ovl.fmt.RSY.dh2); goto ok;
12520 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12521 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12522 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12523 ovl.fmt.RSY.dl2,
12524 ovl.fmt.RSY.dh2); goto ok;
12525 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12526 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12527 ovl.fmt.RSY.dl2,
12528 ovl.fmt.RSY.dh2); goto ok;
12529 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12530 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12531 ovl.fmt.RSY.dl2,
12532 ovl.fmt.RSY.dh2); goto ok;
12533 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12534 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12535 ovl.fmt.RSY.dl2,
12536 ovl.fmt.RSY.dh2); goto ok;
12537 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12538 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12539 ovl.fmt.RSY.dl2,
12540 ovl.fmt.RSY.dh2); goto ok;
12541 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12542 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12543 ovl.fmt.RSY.dl2,
12544 ovl.fmt.RSY.dh2); goto ok;
12545 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12546 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12547 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12548 ovl.fmt.RSY.dl2,
12549 ovl.fmt.RSY.dh2); goto ok;
12550 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12551 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12552 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12553 ovl.fmt.RSY.dh2); goto ok;
12554 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12555 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12556 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12557 ovl.fmt.RSY.dh2); goto ok;
12558 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12559 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12560 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12561 ovl.fmt.RSY.dl2,
12562 ovl.fmt.RSY.dh2); goto ok;
12563 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12564 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12565 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12566 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12567 ovl.fmt.RSY.dl2,
12568 ovl.fmt.RSY.dh2); goto ok;
12569 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12570 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12571 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12572 ovl.fmt.RSY.dh2); goto ok;
12573 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12574 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12575 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12576 ovl.fmt.SIY.dh1); goto ok;
12577 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12578 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12579 ovl.fmt.SIY.dh1); goto ok;
12580 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12581 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12582 ovl.fmt.SIY.dh1); goto ok;
12583 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12584 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12585 ovl.fmt.SIY.dh1); goto ok;
12586 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12587 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12588 ovl.fmt.SIY.dh1); goto ok;
12589 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12590 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12591 ovl.fmt.SIY.dh1); goto ok;
12592 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12593 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12594 ovl.fmt.SIY.dh1); goto ok;
12595 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12596 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12597 ovl.fmt.SIY.dh1); goto ok;
12598 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12599 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12600 ovl.fmt.SIY.dh1); goto ok;
12601 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12602 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12603 ovl.fmt.SIY.dh1); goto ok;
12604 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12605 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12606 ovl.fmt.RSY.dl2,
12607 ovl.fmt.RSY.dh2); goto ok;
12608 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12609 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12610 ovl.fmt.RSY.dl2,
12611 ovl.fmt.RSY.dh2); goto ok;
12612 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12613 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12614 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12615 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12616 ovl.fmt.RSY.dl2,
12617 ovl.fmt.RSY.dh2); goto ok;
12618 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12619 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12620 ovl.fmt.RSY.dl2,
12621 ovl.fmt.RSY.dh2); goto ok;
12622 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12623 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12624 ovl.fmt.RSY.dl2,
12625 ovl.fmt.RSY.dh2); goto ok;
12626 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12627 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12628 ovl.fmt.RSY.dl2,
12629 ovl.fmt.RSY.dh2); goto ok;
12630 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12631 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12632 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12633 ovl.fmt.RSY.dh2); goto ok;
12634 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12635 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12636 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12637 ovl.fmt.RSY.dl2,
12638 ovl.fmt.RSY.dh2); goto ok;
12639 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12640 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12641 ovl.fmt.RSY.dl2,
12642 ovl.fmt.RSY.dh2); goto ok;
12643 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12644 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12645 ovl.fmt.RSY.dl2,
12646 ovl.fmt.RSY.dh2); goto ok;
12647 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12648 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12649 ovl.fmt.RSY.dl2,
12650 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012651 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12652 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12653 ovl.fmt.RSY.dl2,
12654 ovl.fmt.RSY.dh2,
12655 S390_XMNM_LOCG); goto ok;
12656 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12657 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12658 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12659 ovl.fmt.RSY.dh2,
12660 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012661 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12662 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12663 ovl.fmt.RSY.dl2,
12664 ovl.fmt.RSY.dh2); goto ok;
12665 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12666 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12667 ovl.fmt.RSY.dl2,
12668 ovl.fmt.RSY.dh2); goto ok;
12669 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12670 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12671 ovl.fmt.RSY.dl2,
12672 ovl.fmt.RSY.dh2); goto ok;
12673 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12674 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12675 ovl.fmt.RSY.dl2,
12676 ovl.fmt.RSY.dh2); goto ok;
12677 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12678 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12679 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12680 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012681 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12682 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12683 ovl.fmt.RSY.dl2,
12684 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12685 goto ok;
12686 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12687 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12688 ovl.fmt.RSY.dl2,
12689 ovl.fmt.RSY.dh2,
12690 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012691 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12692 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12693 ovl.fmt.RSY.dl2,
12694 ovl.fmt.RSY.dh2); goto ok;
12695 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12696 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12697 ovl.fmt.RSY.dl2,
12698 ovl.fmt.RSY.dh2); goto ok;
12699 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12700 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12701 ovl.fmt.RSY.dl2,
12702 ovl.fmt.RSY.dh2); goto ok;
12703 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12704 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12705 ovl.fmt.RSY.dl2,
12706 ovl.fmt.RSY.dh2); goto ok;
12707 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
12708 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12709 ovl.fmt.RSY.dl2,
12710 ovl.fmt.RSY.dh2); goto ok;
12711 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
12712 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12713 goto ok;
12714 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
12715 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12716 goto ok;
12717 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
12718 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
12719 ovl.fmt.RIE_RRUUU.r1,
12720 ovl.fmt.RIE_RRUUU.r2,
12721 ovl.fmt.RIE_RRUUU.i3,
12722 ovl.fmt.RIE_RRUUU.i4,
12723 ovl.fmt.RIE_RRUUU.i5);
12724 goto ok;
12725 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
12726 ovl.fmt.RIE_RRUUU.r1,
12727 ovl.fmt.RIE_RRUUU.r2,
12728 ovl.fmt.RIE_RRUUU.i3,
12729 ovl.fmt.RIE_RRUUU.i4,
12730 ovl.fmt.RIE_RRUUU.i5);
12731 goto ok;
12732 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
12733 ovl.fmt.RIE_RRUUU.r1,
12734 ovl.fmt.RIE_RRUUU.r2,
12735 ovl.fmt.RIE_RRUUU.i3,
12736 ovl.fmt.RIE_RRUUU.i4,
12737 ovl.fmt.RIE_RRUUU.i5);
12738 goto ok;
12739 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
12740 ovl.fmt.RIE_RRUUU.r1,
12741 ovl.fmt.RIE_RRUUU.r2,
12742 ovl.fmt.RIE_RRUUU.i3,
12743 ovl.fmt.RIE_RRUUU.i4,
12744 ovl.fmt.RIE_RRUUU.i5);
12745 goto ok;
12746 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
12747 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
12748 ovl.fmt.RIE_RRPU.r1,
12749 ovl.fmt.RIE_RRPU.r2,
12750 ovl.fmt.RIE_RRPU.i4,
12751 ovl.fmt.RIE_RRPU.m3); goto ok;
12752 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
12753 ovl.fmt.RIE_RRPU.r1,
12754 ovl.fmt.RIE_RRPU.r2,
12755 ovl.fmt.RIE_RRPU.i4,
12756 ovl.fmt.RIE_RRPU.m3); goto ok;
12757 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
12758 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
12759 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
12760 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
12761 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
12762 ovl.fmt.RIE_RRPU.r1,
12763 ovl.fmt.RIE_RRPU.r2,
12764 ovl.fmt.RIE_RRPU.i4,
12765 ovl.fmt.RIE_RRPU.m3); goto ok;
12766 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
12767 ovl.fmt.RIE_RRPU.r1,
12768 ovl.fmt.RIE_RRPU.r2,
12769 ovl.fmt.RIE_RRPU.i4,
12770 ovl.fmt.RIE_RRPU.m3); goto ok;
12771 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
12772 ovl.fmt.RIEv3.r1,
12773 ovl.fmt.RIEv3.m3,
12774 ovl.fmt.RIEv3.i4,
12775 ovl.fmt.RIEv3.i2); goto ok;
12776 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
12777 ovl.fmt.RIEv3.r1,
12778 ovl.fmt.RIEv3.m3,
12779 ovl.fmt.RIEv3.i4,
12780 ovl.fmt.RIEv3.i2); goto ok;
12781 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
12782 ovl.fmt.RIEv3.r1,
12783 ovl.fmt.RIEv3.m3,
12784 ovl.fmt.RIEv3.i4,
12785 ovl.fmt.RIEv3.i2); goto ok;
12786 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
12787 ovl.fmt.RIEv3.r1,
12788 ovl.fmt.RIEv3.m3,
12789 ovl.fmt.RIEv3.i4,
12790 ovl.fmt.RIEv3.i2); goto ok;
12791 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
12792 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12793 goto ok;
12794 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
12795 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12796 ovl.fmt.RIE.i2); goto ok;
12797 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
12798 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12799 ovl.fmt.RIE.i2); goto ok;
12800 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
12801 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12802 ovl.fmt.RIE.i2); goto ok;
12803 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
12804 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12805 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12806 goto ok;
12807 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
12808 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12809 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12810 goto ok;
12811 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
12812 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12813 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12814 goto ok;
12815 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
12816 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12817 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12818 goto ok;
12819 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
12820 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12821 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12822 ovl.fmt.RIS.i2); goto ok;
12823 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
12824 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12825 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12826 ovl.fmt.RIS.i2); goto ok;
12827 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
12828 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
12829 ovl.fmt.RIS.d4,
12830 ovl.fmt.RIS.i2); goto ok;
12831 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
12832 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12833 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12834 ovl.fmt.RIS.i2); goto ok;
12835 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
12836 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12837 ovl.fmt.RXE.d2); goto ok;
12838 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
12839 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12840 ovl.fmt.RXE.d2); goto ok;
12841 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
12842 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12843 ovl.fmt.RXE.d2); goto ok;
12844 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
12845 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
12846 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
12847 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12848 ovl.fmt.RXE.d2); goto ok;
12849 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
12850 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12851 ovl.fmt.RXE.d2); goto ok;
12852 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
12853 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12854 ovl.fmt.RXE.d2); goto ok;
12855 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
12856 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
12857 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12858 ovl.fmt.RXE.d2); goto ok;
12859 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
12860 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12861 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12862 ovl.fmt.RXF.r1); goto ok;
12863 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
12864 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12865 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12866 ovl.fmt.RXF.r1); goto ok;
12867 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
12868 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12869 ovl.fmt.RXE.d2); goto ok;
12870 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
12871 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12872 ovl.fmt.RXE.d2); goto ok;
12873 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
12874 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12875 ovl.fmt.RXE.d2); goto ok;
12876 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
12877 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12878 ovl.fmt.RXE.d2); goto ok;
12879 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
12880 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12881 ovl.fmt.RXE.d2); goto ok;
12882 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
12883 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12884 ovl.fmt.RXE.d2); goto ok;
12885 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
12886 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
12887 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12888 ovl.fmt.RXE.d2); goto ok;
12889 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
12890 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12891 ovl.fmt.RXE.d2); goto ok;
12892 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
12893 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12894 ovl.fmt.RXE.d2); goto ok;
12895 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
12896 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12897 ovl.fmt.RXE.d2); goto ok;
12898 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
12899 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12900 ovl.fmt.RXE.d2); goto ok;
12901 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
12902 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12903 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12904 ovl.fmt.RXF.r1); goto ok;
12905 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
12906 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12907 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12908 ovl.fmt.RXF.r1); goto ok;
12909 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
12910 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
12911 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
12912 case 0xed000000002eULL: /* MAE */ goto unimplemented;
12913 case 0xed000000002fULL: /* MSE */ goto unimplemented;
12914 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
12915 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
12916 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
12917 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
12918 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
12919 case 0xed000000003aULL: /* MAY */ goto unimplemented;
12920 case 0xed000000003bULL: /* MY */ goto unimplemented;
12921 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
12922 case 0xed000000003dULL: /* MYH */ goto unimplemented;
12923 case 0xed000000003eULL: /* MAD */ goto unimplemented;
12924 case 0xed000000003fULL: /* MSD */ goto unimplemented;
12925 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
12926 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
12927 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
12928 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
12929 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
12930 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
12931 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
12932 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
12933 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
12934 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
12935 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
12936 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12937 ovl.fmt.RXY.dl2,
12938 ovl.fmt.RXY.dh2); goto ok;
12939 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
12940 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12941 ovl.fmt.RXY.dl2,
12942 ovl.fmt.RXY.dh2); goto ok;
12943 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
12944 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12945 ovl.fmt.RXY.dl2,
12946 ovl.fmt.RXY.dh2); goto ok;
12947 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
12948 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12949 ovl.fmt.RXY.dl2,
12950 ovl.fmt.RXY.dh2); goto ok;
12951 }
12952
12953 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
12954 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
12955 ovl.fmt.RIL.i2); goto ok;
12956 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
12957 ovl.fmt.RIL.i2); goto ok;
12958 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
12959 ovl.fmt.RIL.i2); goto ok;
12960 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
12961 ovl.fmt.RIL.i2); goto ok;
12962 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
12963 ovl.fmt.RIL.i2); goto ok;
12964 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
12965 ovl.fmt.RIL.i2); goto ok;
12966 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
12967 ovl.fmt.RIL.i2); goto ok;
12968 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
12969 ovl.fmt.RIL.i2); goto ok;
12970 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
12971 ovl.fmt.RIL.i2); goto ok;
12972 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
12973 ovl.fmt.RIL.i2); goto ok;
12974 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
12975 ovl.fmt.RIL.i2); goto ok;
12976 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
12977 ovl.fmt.RIL.i2); goto ok;
12978 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
12979 ovl.fmt.RIL.i2); goto ok;
12980 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
12981 ovl.fmt.RIL.i2); goto ok;
12982 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
12983 ovl.fmt.RIL.i2); goto ok;
12984 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
12985 ovl.fmt.RIL.i2); goto ok;
12986 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
12987 ovl.fmt.RIL.i2); goto ok;
12988 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
12989 ovl.fmt.RIL.i2); goto ok;
12990 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
12991 ovl.fmt.RIL.i2); goto ok;
12992 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
12993 ovl.fmt.RIL.i2); goto ok;
12994 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
12995 ovl.fmt.RIL.i2); goto ok;
12996 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
12997 ovl.fmt.RIL.i2); goto ok;
12998 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
12999 ovl.fmt.RIL.i2); goto ok;
13000 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
13001 ovl.fmt.RIL.i2); goto ok;
13002 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
13003 ovl.fmt.RIL.i2); goto ok;
13004 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
13005 ovl.fmt.RIL.i2); goto ok;
13006 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
13007 ovl.fmt.RIL.i2); goto ok;
13008 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
13009 ovl.fmt.RIL.i2); goto ok;
13010 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
13011 ovl.fmt.RIL.i2); goto ok;
13012 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
13013 ovl.fmt.RIL.i2); goto ok;
13014 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
13015 ovl.fmt.RIL.i2); goto ok;
13016 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
13017 ovl.fmt.RIL.i2); goto ok;
13018 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
13019 ovl.fmt.RIL.i2); goto ok;
13020 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
13021 ovl.fmt.RIL.i2); goto ok;
13022 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
13023 ovl.fmt.RIL.i2); goto ok;
13024 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
13025 ovl.fmt.RIL.i2); goto ok;
13026 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
13027 ovl.fmt.RIL.i2); goto ok;
13028 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
13029 ovl.fmt.RIL.i2); goto ok;
13030 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
13031 ovl.fmt.RIL.i2); goto ok;
13032 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
13033 ovl.fmt.RIL.i2); goto ok;
13034 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
13035 ovl.fmt.RIL.i2); goto ok;
13036 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
13037 ovl.fmt.RIL.i2); goto ok;
13038 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
13039 ovl.fmt.RIL.i2); goto ok;
13040 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
13041 ovl.fmt.RIL.i2); goto ok;
13042 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
13043 ovl.fmt.RIL.i2); goto ok;
13044 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
13045 ovl.fmt.RIL.i2); goto ok;
13046 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
13047 ovl.fmt.RIL.i2); goto ok;
13048 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
13049 ovl.fmt.RIL.i2); goto ok;
13050 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
13051 ovl.fmt.RIL.i2); goto ok;
13052 case 0xc800ULL: /* MVCOS */ goto unimplemented;
13053 case 0xc801ULL: /* ECTG */ goto unimplemented;
13054 case 0xc802ULL: /* CSST */ goto unimplemented;
13055 case 0xc804ULL: /* LPD */ goto unimplemented;
13056 case 0xc805ULL: /* LPDG */ goto unimplemented;
13057 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
13058 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
13059 ovl.fmt.RIL.i2); goto ok;
13060 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
13061 ovl.fmt.RIL.i2); goto ok;
13062 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
13063 ovl.fmt.RIL.i2); goto ok;
13064 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
13065 ovl.fmt.RIL.i2); goto ok;
13066 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
13067 ovl.fmt.RIL.i2); goto ok;
13068 }
13069
13070 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
13071 case 0xd0ULL: /* TRTR */ goto unimplemented;
13072 case 0xd1ULL: /* MVN */ goto unimplemented;
13073 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
13074 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13075 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13076 case 0xd3ULL: /* MVZ */ goto unimplemented;
13077 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
13078 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13079 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13080 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
13081 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13082 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
13083 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
13084 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13085 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000013086 case 0xd7ULL:
13087 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
13088 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
13089 else
13090 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
13091 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
13092 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
13093 goto ok;
sewardj2019a972011-03-07 16:04:07 +000013094 case 0xd9ULL: /* MVCK */ goto unimplemented;
13095 case 0xdaULL: /* MVCP */ goto unimplemented;
13096 case 0xdbULL: /* MVCS */ goto unimplemented;
13097 case 0xdcULL: /* TR */ goto unimplemented;
13098 case 0xddULL: /* TRT */ goto unimplemented;
13099 case 0xdeULL: /* ED */ goto unimplemented;
13100 case 0xdfULL: /* EDMK */ goto unimplemented;
13101 case 0xe1ULL: /* PKU */ goto unimplemented;
13102 case 0xe2ULL: /* UNPKU */ goto unimplemented;
13103 case 0xe8ULL: /* MVCIN */ goto unimplemented;
13104 case 0xe9ULL: /* PKA */ goto unimplemented;
13105 case 0xeaULL: /* UNPKA */ goto unimplemented;
13106 case 0xeeULL: /* PLO */ goto unimplemented;
13107 case 0xefULL: /* LMD */ goto unimplemented;
13108 case 0xf0ULL: /* SRP */ goto unimplemented;
13109 case 0xf1ULL: /* MVO */ goto unimplemented;
13110 case 0xf2ULL: /* PACK */ goto unimplemented;
13111 case 0xf3ULL: /* UNPK */ goto unimplemented;
13112 case 0xf8ULL: /* ZAP */ goto unimplemented;
13113 case 0xf9ULL: /* CP */ goto unimplemented;
13114 case 0xfaULL: /* AP */ goto unimplemented;
13115 case 0xfbULL: /* SP */ goto unimplemented;
13116 case 0xfcULL: /* MP */ goto unimplemented;
13117 case 0xfdULL: /* DP */ goto unimplemented;
13118 }
13119
13120 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
13121 case 0xe500ULL: /* LASP */ goto unimplemented;
13122 case 0xe501ULL: /* TPROT */ goto unimplemented;
13123 case 0xe502ULL: /* STRAG */ goto unimplemented;
13124 case 0xe50eULL: /* MVCSK */ goto unimplemented;
13125 case 0xe50fULL: /* MVCDK */ goto unimplemented;
13126 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
13127 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13128 goto ok;
13129 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
13130 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13131 goto ok;
13132 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
13133 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13134 goto ok;
13135 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
13136 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13137 goto ok;
13138 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
13139 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13140 goto ok;
13141 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
13142 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13143 goto ok;
13144 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
13145 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13146 goto ok;
13147 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
13148 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13149 goto ok;
13150 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
13151 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
13152 goto ok;
13153 }
13154
13155 return S390_DECODE_UNKNOWN_INSN;
13156
13157ok:
13158 return S390_DECODE_OK;
13159
13160unimplemented:
13161 return S390_DECODE_UNIMPLEMENTED_INSN;
13162}
13163
13164/* Handle "special" instructions. */
13165static s390_decode_t
13166s390_decode_special_and_irgen(UChar *bytes)
13167{
13168 s390_decode_t status = S390_DECODE_OK;
13169
13170 /* Got a "Special" instruction preamble. Which one is it? */
13171 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
13172 s390_irgen_client_request();
13173 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
13174 s390_irgen_guest_NRADDR();
13175 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
13176 s390_irgen_call_noredir();
13177 } else {
13178 /* We don't know what it is. */
13179 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
13180 }
13181
13182 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13183
13184 return status;
13185}
13186
13187
13188/* Function returns # bytes that were decoded or 0 in case of failure */
florianb4df7682011-07-05 02:09:01 +000013189static UInt
sewardj2019a972011-03-07 16:04:07 +000013190s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
13191{
13192 s390_decode_t status;
13193
13194 dis_res = dres;
13195
13196 /* Spot the 8-byte preamble: 18ff lr r15,r15
13197 1811 lr r1,r1
13198 1822 lr r2,r2
13199 1833 lr r3,r3 */
13200 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
13201 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
13202 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
13203
13204 /* Handle special instruction that follows that preamble. */
13205 if (0) vex_printf("special function handling...\n");
florian2c8ed942011-08-01 22:07:51 +000013206
13207 insn_length = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
13208 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13209
13210 status =
13211 s390_decode_special_and_irgen(bytes + S390_SPECIAL_OP_PREAMBLE_SIZE);
sewardj2019a972011-03-07 16:04:07 +000013212 } else {
13213 /* Handle normal instructions. */
13214 switch (insn_length) {
13215 case 2:
13216 status = s390_decode_2byte_and_irgen(bytes);
13217 break;
13218
13219 case 4:
13220 status = s390_decode_4byte_and_irgen(bytes);
13221 break;
13222
13223 case 6:
13224 status = s390_decode_6byte_and_irgen(bytes);
13225 break;
13226
13227 default:
13228 status = S390_DECODE_ERROR;
13229 break;
13230 }
13231 }
florian5fcbba22011-07-27 20:40:22 +000013232 /* If next instruction is execute, stop here */
13233 if (irsb->next == NULL && bytes[insn_length] == 0x44) {
sewardj2019a972011-03-07 16:04:07 +000013234 irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
13235 dis_res->whatNext = Dis_StopHere;
florianb0c1ed82011-07-30 20:09:28 +000013236 dis_res->continueAt = 0;
sewardj2019a972011-03-07 16:04:07 +000013237 }
13238
13239 if (status == S390_DECODE_OK) return insn_length; /* OK */
13240
13241 /* Decoding failed somehow */
13242 vex_printf("vex s390->IR: ");
13243 switch (status) {
13244 case S390_DECODE_UNKNOWN_INSN:
13245 vex_printf("unknown insn: ");
13246 break;
13247
13248 case S390_DECODE_UNIMPLEMENTED_INSN:
13249 vex_printf("unimplemented insn: ");
13250 break;
13251
13252 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
13253 vex_printf("unimplemented special insn: ");
13254 break;
13255
13256 default:
13257 case S390_DECODE_ERROR:
13258 vex_printf("decoding error: ");
13259 break;
13260 }
13261
13262 vex_printf("%02x%02x", bytes[0], bytes[1]);
13263 if (insn_length > 2) {
13264 vex_printf(" %02x%02x", bytes[2], bytes[3]);
13265 }
13266 if (insn_length > 4) {
13267 vex_printf(" %02x%02x", bytes[4], bytes[5]);
13268 }
13269 vex_printf("\n");
13270
13271 return 0; /* Failed */
13272}
13273
13274
13275/* Generate an IRExpr for an address. */
13276static __inline__ IRExpr *
13277mkaddr_expr(Addr64 addr)
13278{
13279 return IRExpr_Const(IRConst_U64(addr));
13280}
13281
13282
13283/* Disassemble a single instruction INSN into IR. */
13284static DisResult
florian420c5012011-07-22 02:12:28 +000013285disInstr_S390_WRK(UChar *insn)
sewardj2019a972011-03-07 16:04:07 +000013286{
13287 UChar byte;
13288 UInt insn_length;
13289 DisResult dres;
13290
13291 /* ---------------------------------------------------- */
13292 /* --- Compute instruction length -- */
13293 /* ---------------------------------------------------- */
13294
13295 /* Get the first byte of the insn. */
13296 byte = insn[0];
13297
13298 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
13299 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
13300 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
13301
13302 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
13303
13304 /* ---------------------------------------------------- */
13305 /* --- Initialise the DisResult data -- */
13306 /* ---------------------------------------------------- */
13307 dres.whatNext = Dis_Continue;
13308 dres.len = insn_length;
13309 dres.continueAt = 0;
13310
floriana99f20e2011-07-17 14:16:41 +000013311 /* fixs390: consider chasing of conditional jumps */
13312
sewardj2019a972011-03-07 16:04:07 +000013313 /* Normal and special instruction handling starts here. */
13314 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
13315 /* All decode failures end up here. The decoder has already issued an
13316 error message.
13317 Tell the dispatcher that this insn cannot be decoded, and so has
13318 not been executed, and (is currently) the next to be executed.
13319 IA should be up-to-date since it made so at the start of each
13320 insn, but nevertheless be paranoid and update it again right
13321 now. */
floriane88b3c92011-07-05 02:48:39 +000013322 addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
sewardj2019a972011-03-07 16:04:07 +000013323 mkaddr_expr(guest_IA_curr_instr)));
13324
sewardj15469da2011-04-13 15:10:16 +000013325 irsb->next = mkaddr_expr(guest_IA_next_instr);
sewardj2019a972011-03-07 16:04:07 +000013326 irsb->jumpkind = Ijk_NoDecode;
13327 dres.whatNext = Dis_StopHere;
13328 dres.len = 0;
sewardj2019a972011-03-07 16:04:07 +000013329 }
13330
13331 return dres;
13332}
13333
13334
13335/*------------------------------------------------------------*/
13336/*--- Top-level fn ---*/
13337/*------------------------------------------------------------*/
13338
13339/* Disassemble a single instruction into IR. The instruction
13340 is located in host memory at &guest_code[delta]. */
13341
13342DisResult
13343disInstr_S390(IRSB *irsb_IN,
13344 Bool put_IP,
13345 Bool (*resteerOkFn)(void *, Addr64),
13346 Bool resteerCisOk,
13347 void *callback_opaque,
13348 UChar *guest_code,
13349 Long delta,
13350 Addr64 guest_IP,
13351 VexArch guest_arch,
13352 VexArchInfo *archinfo,
13353 VexAbiInfo *abiinfo,
13354 Bool host_bigendian)
13355{
13356 vassert(guest_arch == VexArchS390X);
13357
13358 /* The instruction decoder requires a big-endian machine. */
13359 vassert(host_bigendian == True);
13360
13361 /* Set globals (see top of this file) */
13362 guest_IA_curr_instr = guest_IP;
sewardj2019a972011-03-07 16:04:07 +000013363 irsb = irsb_IN;
florian420c5012011-07-22 02:12:28 +000013364 resteer_fn = resteerOkFn;
13365 resteer_data = callback_opaque;
sewardj2019a972011-03-07 16:04:07 +000013366
13367 /* We may be asked to update the guest IA before going further. */
13368 if (put_IP)
floriane88b3c92011-07-05 02:48:39 +000013369 addStmtToIRSB(irsb, IRStmt_Put(S390X_GUEST_OFFSET(guest_IA),
sewardj2019a972011-03-07 16:04:07 +000013370 mkaddr_expr(guest_IA_curr_instr)));
13371
florian420c5012011-07-22 02:12:28 +000013372 return disInstr_S390_WRK(guest_code + delta);
sewardj2019a972011-03-07 16:04:07 +000013373}
13374
13375/*---------------------------------------------------------------*/
13376/*--- end guest_s390_toIR.c ---*/
13377/*---------------------------------------------------------------*/