blob: ac2c4376daf43085d5b1bed4123ff86e2811ff8c [file] [log] [blame]
Chia-I Wu82f50aa2014-08-05 10:43:03 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
Chia-I Wu44e42362014-09-02 08:32:09 +080023 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
Chia-I Wu82f50aa2014-08-05 10:43:03 +080026 */
27
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -060028#include "dev.h"
Chia-I Wu9e61c0d2014-09-15 15:12:06 +080029#include "gpu.h"
30#include "mem.h"
Chia-I Wu82f50aa2014-08-05 10:43:03 +080031#include "obj.h"
32
Chia-I Wu4c120782015-01-18 11:32:18 +080033static const uint32_t intel_base_magic = 0x494e544c;
Chia-I Wu778a80c2015-01-03 22:45:10 +080034
Chia-I Wu82f50aa2014-08-05 10:43:03 +080035/**
36 * Return true if an (not so) arbitrary pointer casted to intel_base points to
Chia-I Wu778a80c2015-01-03 22:45:10 +080037 * a valid intel_base. This assumes at least the first
38 * sizeof(void*)+sizeof(uint32_t) bytes of the address are accessible, and
39 * they does not happen to be our magic values.
Chia-I Wu82f50aa2014-08-05 10:43:03 +080040 */
Chia-I Wu778a80c2015-01-03 22:45:10 +080041bool intel_base_is_valid(const struct intel_base *base,
42 XGL_DBG_OBJECT_TYPE type)
Chia-I Wu82f50aa2014-08-05 10:43:03 +080043{
Chia-I Wu778a80c2015-01-03 22:45:10 +080044 return (base->magic == intel_base_magic + type);
Chia-I Wu82f50aa2014-08-05 10:43:03 +080045}
46
Chia-I Wu26f0bd02014-08-07 10:38:40 +080047XGL_RESULT intel_base_get_info(struct intel_base *base, int type,
48 XGL_SIZE *size, XGL_VOID *data)
49{
50 XGL_RESULT ret = XGL_SUCCESS;
51 XGL_SIZE s;
52
53 switch (type) {
54 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
55 s = sizeof(XGL_MEMORY_REQUIREMENTS);
Chia-I Wu26f0bd02014-08-07 10:38:40 +080056 *size = s;
Jon Ashburn408daec2014-12-05 09:23:52 -070057 if (data == NULL)
58 return ret;
59 memset(data, 0, s);
60
Chia-I Wu26f0bd02014-08-07 10:38:40 +080061 break;
62 default:
63 ret = XGL_ERROR_INVALID_VALUE;
64 break;
65 }
66
67 return ret;
68}
69
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080070static bool base_dbg_copy_create_info(struct intel_base_dbg *dbg,
71 const void *create_info)
72{
73 const union {
74 const void *ptr;
75 const struct {
76 XGL_STRUCTURE_TYPE struct_type;
77 XGL_VOID *next;
78 } *header;
79 } info = { .ptr = create_info };
80 XGL_SIZE shallow_copy = 0;
81
82 if (!create_info)
83 return true;
84
Chia-I Wub1076d72014-08-18 16:10:20 +080085 switch (dbg->type) {
86 case XGL_DBG_OBJECT_DEVICE:
87 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080088 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080089 case XGL_DBG_OBJECT_GPU_MEMORY:
90 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_MEMORY_ALLOC_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080091 shallow_copy = sizeof(XGL_MEMORY_ALLOC_INFO);
92 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080093 case XGL_DBG_OBJECT_EVENT:
94 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_EVENT_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080095 shallow_copy = sizeof(XGL_EVENT_CREATE_INFO);
96 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080097 case XGL_DBG_OBJECT_FENCE:
98 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_FENCE_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080099 shallow_copy = sizeof(XGL_FENCE_CREATE_INFO);
100 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800101 case XGL_DBG_OBJECT_QUERY_POOL:
102 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO);
Courtney Goeltzenleuchter850d12c2014-08-07 18:13:10 -0600103 shallow_copy = sizeof(XGL_QUERY_POOL_CREATE_INFO);
104 break;
Chia-I Wu714df452015-01-01 07:55:04 +0800105 case XGL_DBG_OBJECT_BUFFER:
106 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_BUFFER_CREATE_INFO);
107 shallow_copy = sizeof(XGL_BUFFER_CREATE_INFO);
108 break;
109 case XGL_DBG_OBJECT_BUFFER_VIEW:
110 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO);
111 shallow_copy = sizeof(XGL_BUFFER_VIEW_CREATE_INFO);
112 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800113 case XGL_DBG_OBJECT_IMAGE:
114 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
Chia-I Wufeb441f2014-08-08 21:27:38 +0800115 shallow_copy = sizeof(XGL_IMAGE_CREATE_INFO);
116 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800117 case XGL_DBG_OBJECT_IMAGE_VIEW:
118 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800119 shallow_copy = sizeof(XGL_IMAGE_VIEW_CREATE_INFO);
120 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800121 case XGL_DBG_OBJECT_COLOR_TARGET_VIEW:
122 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_COLOR_ATTACHMENT_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800123 shallow_copy = sizeof(XGL_COLOR_ATTACHMENT_VIEW_CREATE_INFO);
124 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800125 case XGL_DBG_OBJECT_DEPTH_STENCIL_VIEW:
126 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEPTH_STENCIL_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800127 shallow_copy = sizeof(XGL_DEPTH_STENCIL_VIEW_CREATE_INFO);
128 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800129 case XGL_DBG_OBJECT_SAMPLER:
130 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
Chia-I Wu28b89962014-08-18 14:40:49 +0800131 shallow_copy = sizeof(XGL_SAMPLER_CREATE_INFO);
132 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800133 case XGL_DBG_OBJECT_DESCRIPTOR_SET:
134 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DESCRIPTOR_SET_CREATE_INFO);
Chia-I Wub8d04c82014-08-18 15:51:10 +0800135 shallow_copy = sizeof(XGL_DESCRIPTOR_SET_CREATE_INFO);
136 break;
Chia-I Wua5714e82014-08-11 15:33:42 +0800137 case XGL_DBG_OBJECT_VIEWPORT_STATE:
Tony Barbourfa6cac72015-01-16 14:27:35 -0700138 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO);
139 shallow_copy = sizeof(XGL_DYNAMIC_VP_STATE_CREATE_INFO);
Chia-I Wua5714e82014-08-11 15:33:42 +0800140 break;
141 case XGL_DBG_OBJECT_RASTER_STATE:
Tony Barbourfa6cac72015-01-16 14:27:35 -0700142 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DYNAMIC_RS_STATE_CREATE_INFO);
143 shallow_copy = sizeof(XGL_DYNAMIC_RS_STATE_CREATE_INFO);
Chia-I Wua5714e82014-08-11 15:33:42 +0800144 break;
145 case XGL_DBG_OBJECT_COLOR_BLEND_STATE:
Tony Barbourfa6cac72015-01-16 14:27:35 -0700146 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DYNAMIC_CB_STATE_CREATE_INFO);
147 shallow_copy = sizeof(XGL_DYNAMIC_CB_STATE_CREATE_INFO);
Chia-I Wua5714e82014-08-11 15:33:42 +0800148 break;
149 case XGL_DBG_OBJECT_DEPTH_STENCIL_STATE:
Tony Barbourfa6cac72015-01-16 14:27:35 -0700150 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DYNAMIC_DS_STATE_CREATE_INFO);
151 shallow_copy = sizeof(XGL_DYNAMIC_DS_STATE_CREATE_INFO);
Chia-I Wua5714e82014-08-11 15:33:42 +0800152 break;
Chia-I Wu730e5362014-08-19 12:15:09 +0800153 case XGL_DBG_OBJECT_CMD_BUFFER:
154 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_CMD_BUFFER_CREATE_INFO);
155 shallow_copy = sizeof(XGL_CMD_BUFFER_CREATE_INFO);
156 break;
Courtney Goeltzenleuchter05a60542014-08-15 14:54:34 -0600157 case XGL_DBG_OBJECT_GRAPHICS_PIPELINE:
158 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
159 break;
Courtney Goeltzenleuchter52ec3362014-08-19 11:52:02 -0600160 case XGL_DBG_OBJECT_SHADER:
Courtney Goeltzenleuchteref5b1162014-10-10 16:29:46 -0600161 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_SHADER_CREATE_INFO);
Courtney Goeltzenleuchter52ec3362014-08-19 11:52:02 -0600162 shallow_copy = sizeof(XGL_SHADER_CREATE_INFO);
163 break;
Jon Ashburnc6f4a412014-12-24 12:38:36 -0700164 case XGL_DBG_OBJECT_FRAMEBUFFER:
165 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO);
166 shallow_copy = sizeof(XGL_FRAMEBUFFER_CREATE_INFO);
167 break;
168 case XGL_DBG_OBJECT_RENDER_PASS:
169 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO);
170 shallow_copy = sizeof(XGL_RENDER_PASS_CREATE_INFO);
171 break;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800172 default:
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600173 // log debug message regarding invalid struct_type?
174 intel_dev_log(dbg->dev, XGL_DBG_MSG_ERROR,
175 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
176 "Invalid Create Info type: 0x%x", info.header->struct_type);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800177 return false;
178 break;
179 }
180
181 if (shallow_copy) {
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800182 dbg->create_info = icd_alloc(shallow_copy, 0, XGL_SYSTEM_ALLOC_DEBUG);
183 if (!dbg->create_info)
184 return false;
185
186 memcpy(dbg->create_info, create_info, shallow_copy);
Chia-I Wue2934f92014-08-16 13:17:22 +0800187 dbg->create_info_size = shallow_copy;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800188 } else if (info.header->struct_type ==
189 XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO) {
190 const XGL_DEVICE_CREATE_INFO *src = info.ptr;
191 XGL_DEVICE_CREATE_INFO *dst;
192 uint8_t *d;
193 XGL_SIZE size;
194 XGL_UINT i;
195
196 size = sizeof(*src);
Chia-I Wue2934f92014-08-16 13:17:22 +0800197 dbg->create_info_size = size;
198
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800199 size += sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
200 size += sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
201 for (i = 0; i < src->extensionCount; i++) {
Chia-I Wu7461fcf2014-12-27 15:16:07 +0800202 size += 1 + strlen(src->ppEnabledExtensionNames[i]);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800203 }
204
Chia-I Wu98dcfab2014-08-07 12:07:52 +0800205 dst = icd_alloc(size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800206 if (!dst)
207 return false;
208
209 memcpy(dst, src, sizeof(*src));
210
211 d = (uint8_t *) dst;
212 d += sizeof(*src);
213
214 size = sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
215 memcpy(d, src->pRequestedQueues, size);
216 dst->pRequestedQueues = (const XGL_DEVICE_QUEUE_CREATE_INFO *) d;
217 d += size;
218
219 size = sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
220 dst->ppEnabledExtensionNames = (const XGL_CHAR * const *) d;
221
222 for (i = 0; i < src->extensionCount; i++) {
Chia-I Wu7461fcf2014-12-27 15:16:07 +0800223 const XGL_SIZE len = strlen(src->ppEnabledExtensionNames[i]);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800224
225 memcpy(d + size, src->ppEnabledExtensionNames[i], len + 1);
226 ((const XGL_CHAR **) d)[i] = (const XGL_CHAR *) (d + size);
227
228 size += len + 1;
229 }
Courtney Goeltzenleuchter191b06c2014-10-17 16:21:35 -0600230 dbg->create_info = dst;
Courtney Goeltzenleuchter05a60542014-08-15 14:54:34 -0600231 } else if (info.header->struct_type == XGL_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO) {
232 // TODO: What do we want to copy here?
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800233 }
234
235 return true;
236}
237
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800238/**
Chia-I Wubbf2c932014-08-07 12:20:08 +0800239 * Create an intel_base_dbg. When dbg_size is non-zero, a buffer of that
Chia-I Wu660caf82014-08-07 10:54:26 +0800240 * size is allocated and zeroed.
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800241 */
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600242struct intel_base_dbg *intel_base_dbg_create(struct intel_dev *dev,
243 XGL_DBG_OBJECT_TYPE type,
Chia-I Wu660caf82014-08-07 10:54:26 +0800244 const void *create_info,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800245 XGL_SIZE dbg_size)
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800246{
Chia-I Wu660caf82014-08-07 10:54:26 +0800247 struct intel_base_dbg *dbg;
248
Chia-I Wubbf2c932014-08-07 12:20:08 +0800249 if (!dbg_size)
250 dbg_size = sizeof(*dbg);
Chia-I Wu660caf82014-08-07 10:54:26 +0800251
Chia-I Wubbf2c932014-08-07 12:20:08 +0800252 assert(dbg_size >= sizeof(*dbg));
Chia-I Wu660caf82014-08-07 10:54:26 +0800253
Chia-I Wubbf2c932014-08-07 12:20:08 +0800254 dbg = icd_alloc(dbg_size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu660caf82014-08-07 10:54:26 +0800255 if (!dbg)
256 return NULL;
257
Chia-I Wubbf2c932014-08-07 12:20:08 +0800258 memset(dbg, 0, dbg_size);
Chia-I Wu660caf82014-08-07 10:54:26 +0800259
Chia-I Wu900364b2015-01-03 13:55:22 +0800260 dbg->alloc_id = icd_allocator_get_id();
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800261 dbg->type = type;
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600262 dbg->dev = dev;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800263
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800264 if (!base_dbg_copy_create_info(dbg, create_info)) {
265 icd_free(dbg);
266 return NULL;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800267 }
268
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800269 return dbg;
270}
271
272void intel_base_dbg_destroy(struct intel_base_dbg *dbg)
273{
Chia-I Wu660caf82014-08-07 10:54:26 +0800274 if (dbg->tag)
275 icd_free(dbg->tag);
276
277 if (dbg->create_info)
278 icd_free(dbg->create_info);
279
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800280 icd_free(dbg);
281}
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800282
Chia-I Wubbf2c932014-08-07 12:20:08 +0800283/**
284 * Create an intel_base. obj_size and dbg_size specify the real sizes of the
285 * object and the debug metadata. Memories are zeroed.
286 */
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600287struct intel_base *intel_base_create(struct intel_dev *dev,
288 XGL_SIZE obj_size, bool debug,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800289 XGL_DBG_OBJECT_TYPE type,
290 const void *create_info,
291 XGL_SIZE dbg_size)
292{
293 struct intel_base *base;
294
295 if (!obj_size)
296 obj_size = sizeof(*base);
297
298 assert(obj_size >= sizeof(*base));
299
300 base = icd_alloc(obj_size, 0, XGL_SYSTEM_ALLOC_API_OBJECT);
301 if (!base)
302 return NULL;
303
Chia-I Wu778a80c2015-01-03 22:45:10 +0800304 memset(base, 0, obj_size);
305 base->magic = intel_base_magic + type;
306
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600307 if (dev == NULL) {
308 /*
309 * dev is NULL when we are creating the base device object
310 * Set dev now so that debug setup happens correctly
311 */
312 dev = (struct intel_dev *) base;
313 }
314
Chia-I Wubbf2c932014-08-07 12:20:08 +0800315 if (debug) {
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600316 base->dbg = intel_base_dbg_create(dev, type, create_info, dbg_size);
Chia-I Wubbf2c932014-08-07 12:20:08 +0800317 if (!base->dbg) {
318 icd_free(base);
319 return NULL;
320 }
321 }
Chia-I Wu6a42c2a2014-08-19 14:36:47 +0800322
Chia-I Wubbf2c932014-08-07 12:20:08 +0800323 base->get_info = intel_base_get_info;
324
325 return base;
326}
327
328void intel_base_destroy(struct intel_base *base)
329{
330 if (base->dbg)
331 intel_base_dbg_destroy(base->dbg);
332 icd_free(base);
333}
334
Chia-I Wu96177272015-01-03 15:27:41 +0800335ICD_EXPORT XGL_RESULT XGLAPI xglDestroyObject(
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800336 XGL_OBJECT object)
337{
338 struct intel_obj *obj = intel_obj(object);
339
340 obj->destroy(obj);
341
342 return XGL_SUCCESS;
343}
344
Chia-I Wu96177272015-01-03 15:27:41 +0800345ICD_EXPORT XGL_RESULT XGLAPI xglGetObjectInfo(
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800346 XGL_BASE_OBJECT object,
347 XGL_OBJECT_INFO_TYPE infoType,
348 XGL_SIZE* pDataSize,
349 XGL_VOID* pData)
350{
351 struct intel_base *base = intel_base(object);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800352
Chia-I Wu26f0bd02014-08-07 10:38:40 +0800353 return base->get_info(base, infoType, pDataSize, pData);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800354}
355
Chia-I Wu96177272015-01-03 15:27:41 +0800356ICD_EXPORT XGL_RESULT XGLAPI xglBindObjectMemory(
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800357 XGL_OBJECT object,
Chia-I Wu9e61c0d2014-09-15 15:12:06 +0800358 XGL_GPU_MEMORY mem_,
Chia-I Wu714df452015-01-01 07:55:04 +0800359 XGL_GPU_SIZE memOffset)
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800360{
361 struct intel_obj *obj = intel_obj(object);
Chia-I Wu9e61c0d2014-09-15 15:12:06 +0800362 struct intel_mem *mem = intel_mem(mem_);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800363
Chia-I Wu714df452015-01-01 07:55:04 +0800364 intel_obj_bind_mem(obj, mem, memOffset);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800365
366 return XGL_SUCCESS;
367}
Chia-I Wu7ec9f342014-08-19 10:47:53 +0800368
Chia-I Wu714df452015-01-01 07:55:04 +0800369ICD_EXPORT XGL_RESULT XGLAPI xglBindObjectMemoryRange(
370 XGL_OBJECT object,
371 XGL_GPU_SIZE rangeOffset,
372 XGL_GPU_SIZE rangeSize,
373 XGL_GPU_MEMORY mem,
374 XGL_GPU_SIZE memOffset)
375{
376 return XGL_ERROR_UNKNOWN;
377}
378
379ICD_EXPORT XGL_RESULT XGLAPI xglBindImageMemoryRange(
380 XGL_IMAGE image,
381 const XGL_IMAGE_MEMORY_BIND_INFO* bindInfo,
382 XGL_GPU_MEMORY mem,
383 XGL_GPU_SIZE memOffset)
384{
385 return XGL_ERROR_UNKNOWN;
386}
387
Chia-I Wu96177272015-01-03 15:27:41 +0800388ICD_EXPORT XGL_RESULT XGLAPI xglDbgSetObjectTag(
Chia-I Wu7ec9f342014-08-19 10:47:53 +0800389 XGL_BASE_OBJECT object,
390 XGL_SIZE tagSize,
391 const XGL_VOID* pTag)
392{
393 struct intel_base *base = intel_base(object);
394 struct intel_base_dbg *dbg = base->dbg;
395 void *tag;
396
397 if (!dbg)
398 return XGL_SUCCESS;
399
400 tag = icd_alloc(tagSize, 0, XGL_SYSTEM_ALLOC_DEBUG);
401 if (!tag)
402 return XGL_ERROR_OUT_OF_MEMORY;
403
404 memcpy(tag, pTag, tagSize);
405
406 if (dbg->tag)
407 icd_free(dbg->tag);
408
409 dbg->tag = tag;
410 dbg->tag_size = tagSize;
411
412 return XGL_SUCCESS;
413}