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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 1038df1f062f935cc44c463c7dbb63934b80cca8 / . / asoc / kona.c
blob: 7560fa99f1fb69811c9aa7ba5b5bff131b974d02 [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2/*
Xiao Lid8bb93c2020-01-07 12:59:05 +0800[diff] [blame]3 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]16#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]23#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]24#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]25#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]32#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]33#include "codecs/wsa881x.h"
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]34#include "codecs/wsa883x/wsa883x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]35#include "codecs/wcd938x/wcd938x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]36#include "codecs/bolero/bolero-cdc.h"
37#include <dt-bindings/sound/audio-codec-port-types.h>
38#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]39#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]40
41#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]42#define __CHIPSET__ "KONA "
43#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
44
45#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]46#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]47#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]48#define SAMPLING_RATE_22P05KHZ 22050
49#define SAMPLING_RATE_32KHZ 32000
50#define SAMPLING_RATE_44P1KHZ 44100
51#define SAMPLING_RATE_48KHZ 48000
52#define SAMPLING_RATE_88P2KHZ 88200
53#define SAMPLING_RATE_96KHZ 96000
54#define SAMPLING_RATE_176P4KHZ 176400
55#define SAMPLING_RATE_192KHZ 192000
56#define SAMPLING_RATE_352P8KHZ 352800
57#define SAMPLING_RATE_384KHZ 384000
58
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]59#define IS_FRACTIONAL(x) \
60((x == SAMPLING_RATE_11P025KHZ) || (x == SAMPLING_RATE_22P05KHZ) || \
61(x == SAMPLING_RATE_44P1KHZ) || (x == SAMPLING_RATE_88P2KHZ) || \
62(x == SAMPLING_RATE_176P4KHZ) || (x == SAMPLING_RATE_352P8KHZ))
63
64#define IS_MSM_INTERFACE_MI2S(x) \
65((x == PRIM_MI2S) || (x == SEC_MI2S) || (x == TERT_MI2S))
66
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]67#define WCD9XXX_MBHC_DEF_RLOADS 5
68#define WCD9XXX_MBHC_DEF_BUTTONS 8
69#define CODEC_EXT_CLK_RATE 9600000
70#define ADSP_STATE_READY_TIMEOUT_MS 3000
71#define DEV_NAME_STR_LEN 32
72#define WCD_MBHC_HS_V_MAX 1600
73
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]74#define TDM_CHANNEL_MAX 8
75#define DEV_NAME_STR_LEN 32
76
77#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
78
79#define ADSP_STATE_READY_TIMEOUT_MS 3000
80
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]81#define WSA8810_NAME_1 "wsa881x.20170211"
82#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]83#define WCN_CDC_SLIM_RX_CH_MAX 2
84#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]85#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]86
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]87enum {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]88 RX_PATH = 0,
89 TX_PATH,
90 MAX_PATH,
91};
92
93enum {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]94 TDM_0 = 0,
95 TDM_1,
96 TDM_2,
97 TDM_3,
98 TDM_4,
99 TDM_5,
100 TDM_6,
101 TDM_7,
102 TDM_PORT_MAX,
103};
104
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]105#define TDM_MAX_SLOTS 8
106#define TDM_SLOT_WIDTH_BITS 32
107
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]108enum {
109 TDM_PRI = 0,
110 TDM_SEC,
111 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]112 TDM_QUAT,
113 TDM_QUIN,
114 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]115 TDM_INTERFACE_MAX,
116};
117
118enum {
119 PRIM_AUX_PCM = 0,
120 SEC_AUX_PCM,
121 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]122 QUAT_AUX_PCM,
123 QUIN_AUX_PCM,
124 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]125 AUX_PCM_MAX,
126};
127
128enum {
129 PRIM_MI2S = 0,
130 SEC_MI2S,
131 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]132 QUAT_MI2S,
133 QUIN_MI2S,
134 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]135 MI2S_MAX,
136};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]137
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]138enum {
139 WSA_CDC_DMA_RX_0 = 0,
140 WSA_CDC_DMA_RX_1,
141 RX_CDC_DMA_RX_0,
142 RX_CDC_DMA_RX_1,
143 RX_CDC_DMA_RX_2,
144 RX_CDC_DMA_RX_3,
145 RX_CDC_DMA_RX_5,
146 CDC_DMA_RX_MAX,
147};
148
149enum {
150 WSA_CDC_DMA_TX_0 = 0,
151 WSA_CDC_DMA_TX_1,
152 WSA_CDC_DMA_TX_2,
153 TX_CDC_DMA_TX_0,
154 TX_CDC_DMA_TX_3,
155 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]156 VA_CDC_DMA_TX_0,
157 VA_CDC_DMA_TX_1,
158 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]159 CDC_DMA_TX_MAX,
160};
161
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]162enum {
163 SLIM_RX_7 = 0,
164 SLIM_RX_MAX,
165};
166enum {
167 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]168 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]169 SLIM_TX_MAX,
170};
171
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]172enum {
173 AFE_LOOPBACK_TX_IDX = 0,
174 AFE_LOOPBACK_TX_IDX_MAX,
175};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]176struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]177 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]178 int usbc_en2_gpio; /* used by gpio driver API */
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]179 int lito_v2_enabled;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]180 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
181 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
182 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]183 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
184 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]185 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
186 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
187 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
188 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
189 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]190 struct device_node *fsa_handle;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]191 struct clk *lpass_audio_hw_vote;
192 int core_audio_vote_count;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]193};
194
195struct tdm_port {
196 u32 mode;
197 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]198};
199
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]200struct tdm_dev_config {
201 unsigned int tdm_slot_offset[TDM_MAX_SLOTS];
202};
203
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]204enum {
205 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]206 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]207 EXT_DISP_RX_IDX_MAX,
208};
209
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]210struct msm_wsa881x_dev_info {
211 struct device_node *of_node;
212 u32 index;
213};
214
215struct aux_codec_dev_info {
216 struct device_node *of_node;
217 u32 index;
218};
219
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]220struct dev_config {
221 u32 sample_rate;
222 u32 bit_format;
223 u32 channels;
224};
225
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]226/* Default configuration of slimbus channels */
227static struct dev_config slim_rx_cfg[] = {
228 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
229};
230
231static struct dev_config slim_tx_cfg[] = {
232 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]233 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]234};
235
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]236/* Default configuration of external display BE */
237static struct dev_config ext_disp_rx_cfg[] = {
238 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]239 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]240};
241
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]242static struct dev_config usb_rx_cfg = {
243 .sample_rate = SAMPLING_RATE_48KHZ,
244 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
245 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]246};
247
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]248static struct dev_config usb_tx_cfg = {
249 .sample_rate = SAMPLING_RATE_48KHZ,
250 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
251 .channels = 1,
252};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]253
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]254static struct dev_config proxy_rx_cfg = {
255 .sample_rate = SAMPLING_RATE_48KHZ,
256 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
257 .channels = 2,
258};
259
260static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
261 {
262 AFE_API_VERSION_I2S_CONFIG,
263 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
264 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
265 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
266 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
267 0,
268 },
269 {
270 AFE_API_VERSION_I2S_CONFIG,
271 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
272 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
273 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
274 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
275 0,
276 },
277 {
278 AFE_API_VERSION_I2S_CONFIG,
279 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
280 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
281 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
282 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
283 0,
284 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]285 {
286 AFE_API_VERSION_I2S_CONFIG,
287 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
288 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
289 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
290 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
291 0,
292 },
293 {
294 AFE_API_VERSION_I2S_CONFIG,
295 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
296 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
297 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
298 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
299 0,
300 },
301 {
302 AFE_API_VERSION_I2S_CONFIG,
303 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
304 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
305 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
306 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
307 0,
308 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]309};
310
311struct mi2s_conf {
312 struct mutex lock;
313 u32 ref_cnt;
314 u32 msm_is_mi2s_master;
315};
316
317static u32 mi2s_ebit_clk[MI2S_MAX] = {
318 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
319 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
320 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
321};
322
323static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
324
325/* Default configuration of TDM channels */
326static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
327 { /* PRI TDM */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
336 },
337 { /* SEC TDM */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
346 },
347 { /* TERT TDM */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
356 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]357 { /* QUAT TDM */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
359 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
360 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
361 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
362 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
363 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
365 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
366 },
367 { /* QUIN TDM */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
372 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
373 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
375 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
376 },
377 { /* SEN TDM */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
382 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
383 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
386 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]387};
388
389static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
390 { /* PRI TDM */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
392 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
393 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
398 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
399 },
400 { /* SEC TDM */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
402 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
403 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
409 },
410 { /* TERT TDM */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
412 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
413 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
419 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]420 { /* QUAT TDM */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
422 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
423 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
424 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
425 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
426 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
427 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
428 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
429 },
430 { /* QUIN TDM */
431 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
432 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
433 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
434 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
435 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
436 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
437 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
438 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
439 },
440 { /* SEN TDM */
441 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
442 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
443 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
444 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
445 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
446 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
447 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
448 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
449 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]450};
451
452/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]453static struct dev_config aux_pcm_rx_cfg[] = {
454 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]455 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
456 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]457 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
458 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
459 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]460};
461
462static struct dev_config aux_pcm_tx_cfg[] = {
463 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]464 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
465 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]466 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
467 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
468 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]469};
470
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]471/* Default configuration of MI2S channels */
472static struct dev_config mi2s_rx_cfg[] = {
473 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
474 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
475 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]476 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
477 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
478 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]479};
480
481static struct dev_config mi2s_tx_cfg[] = {
482 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
483 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
484 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]485 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
486 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
487 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]488};
489
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]490static struct tdm_dev_config pri_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
491 { /* PRI TDM */
492 { {0, 4, 0xFFFF} }, /* RX_0 */
493 { {8, 12, 0xFFFF} }, /* RX_1 */
494 { {16, 20, 0xFFFF} }, /* RX_2 */
495 { {24, 28, 0xFFFF} }, /* RX_3 */
496 { {0xFFFF} }, /* RX_4 */
497 { {0xFFFF} }, /* RX_5 */
498 { {0xFFFF} }, /* RX_6 */
499 { {0xFFFF} }, /* RX_7 */
500 },
501 {
502 { {0, 4, 8, 12, 0xFFFF} }, /* TX_0 */
503 { {8, 12, 0xFFFF} }, /* TX_1 */
504 { {16, 20, 0xFFFF} }, /* TX_2 */
505 { {24, 28, 0xFFFF} }, /* TX_3 */
506 { {0xFFFF} }, /* TX_4 */
507 { {0xFFFF} }, /* TX_5 */
508 { {0xFFFF} }, /* TX_6 */
509 { {0xFFFF} }, /* TX_7 */
510 },
511};
512
513static struct tdm_dev_config sec_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
514 { /* SEC TDM */
515 { {0, 4, 0xFFFF} }, /* RX_0 */
516 { {8, 12, 0xFFFF} }, /* RX_1 */
517 { {16, 20, 0xFFFF} }, /* RX_2 */
518 { {24, 28, 0xFFFF} }, /* RX_3 */
519 { {0xFFFF} }, /* RX_4 */
520 { {0xFFFF} }, /* RX_5 */
521 { {0xFFFF} }, /* RX_6 */
522 { {0xFFFF} }, /* RX_7 */
523 },
524 {
525 { {0, 4, 0xFFFF} }, /* TX_0 */
526 { {8, 12, 0xFFFF} }, /* TX_1 */
527 { {16, 20, 0xFFFF} }, /* TX_2 */
528 { {24, 28, 0xFFFF} }, /* TX_3 */
529 { {0xFFFF} }, /* TX_4 */
530 { {0xFFFF} }, /* TX_5 */
531 { {0xFFFF} }, /* TX_6 */
532 { {0xFFFF} }, /* TX_7 */
533 },
534};
535
536static struct tdm_dev_config tert_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
537 { /* TERT TDM */
538 { {0, 4, 0xFFFF} }, /* RX_0 */
539 { {8, 12, 0xFFFF} }, /* RX_1 */
540 { {16, 20, 0xFFFF} }, /* RX_2 */
541 { {24, 28, 0xFFFF} }, /* RX_3 */
542 { {0xFFFF} }, /* RX_4 */
543 { {0xFFFF} }, /* RX_5 */
544 { {0xFFFF} }, /* RX_6 */
545 { {0xFFFF} }, /* RX_7 */
546 },
547 {
548 { {0, 4, 0xFFFF} }, /* TX_0 */
549 { {8, 12, 0xFFFF} }, /* TX_1 */
550 { {16, 20, 0xFFFF} }, /* TX_2 */
551 { {24, 28, 0xFFFF} }, /* TX_3 */
552 { {0xFFFF} }, /* TX_4 */
553 { {0xFFFF} }, /* TX_5 */
554 { {0xFFFF} }, /* TX_6 */
555 { {0xFFFF} }, /* TX_7 */
556 },
557};
558
559static struct tdm_dev_config quat_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
560 { /* QUAT TDM */
561 { {0, 4, 0xFFFF} }, /* RX_0 */
562 { {8, 12, 0xFFFF} }, /* RX_1 */
563 { {16, 20, 0xFFFF} }, /* RX_2 */
564 { {24, 28, 0xFFFF} }, /* RX_3 */
565 { {0xFFFF} }, /* RX_4 */
566 { {0xFFFF} }, /* RX_5 */
567 { {0xFFFF} }, /* RX_6 */
568 { {0xFFFF} }, /* RX_7 */
569 },
570 {
571 { {0, 4, 0xFFFF} }, /* TX_0 */
572 { {8, 12, 0xFFFF} }, /* TX_1 */
573 { {16, 20, 0xFFFF} }, /* TX_2 */
574 { {24, 28, 0xFFFF} }, /* TX_3 */
575 { {0xFFFF} }, /* TX_4 */
576 { {0xFFFF} }, /* TX_5 */
577 { {0xFFFF} }, /* TX_6 */
578 { {0xFFFF} }, /* TX_7 */
579 },
580};
581
582static struct tdm_dev_config quin_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
583 { /* QUIN TDM */
584 { {0, 4, 0xFFFF} }, /* RX_0 */
585 { {8, 12, 0xFFFF} }, /* RX_1 */
586 { {16, 20, 0xFFFF} }, /* RX_2 */
587 { {24, 28, 0xFFFF} }, /* RX_3 */
588 { {0xFFFF} }, /* RX_4 */
589 { {0xFFFF} }, /* RX_5 */
590 { {0xFFFF} }, /* RX_6 */
591 { {0xFFFF} }, /* RX_7 */
592 },
593 {
594 { {0, 4, 0xFFFF} }, /* TX_0 */
595 { {8, 12, 0xFFFF} }, /* TX_1 */
596 { {16, 20, 0xFFFF} }, /* TX_2 */
597 { {24, 28, 0xFFFF} }, /* TX_3 */
598 { {0xFFFF} }, /* TX_4 */
599 { {0xFFFF} }, /* TX_5 */
600 { {0xFFFF} }, /* TX_6 */
601 { {0xFFFF} }, /* TX_7 */
602 },
603};
604
605static struct tdm_dev_config sen_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
606 { /* SEN TDM */
607 { {0, 4, 0xFFFF} }, /* RX_0 */
608 { {8, 12, 0xFFFF} }, /* RX_1 */
609 { {16, 20, 0xFFFF} }, /* RX_2 */
610 { {24, 28, 0xFFFF} }, /* RX_3 */
611 { {0xFFFF} }, /* RX_4 */
612 { {0xFFFF} }, /* RX_5 */
613 { {0xFFFF} }, /* RX_6 */
614 { {0xFFFF} }, /* RX_7 */
615 },
616 {
617 { {0, 4, 0xFFFF} }, /* TX_0 */
618 { {8, 12, 0xFFFF} }, /* TX_1 */
619 { {16, 20, 0xFFFF} }, /* TX_2 */
620 { {24, 28, 0xFFFF} }, /* TX_3 */
621 { {0xFFFF} }, /* TX_4 */
622 { {0xFFFF} }, /* TX_5 */
623 { {0xFFFF} }, /* TX_6 */
624 { {0xFFFF} }, /* TX_7 */
625 },
626};
627
628static void *tdm_cfg[TDM_INTERFACE_MAX] = {
629 pri_tdm_dev_config,
630 sec_tdm_dev_config,
631 tert_tdm_dev_config,
632 quat_tdm_dev_config,
633 quin_tdm_dev_config,
634 sen_tdm_dev_config,
635};
636
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]637/* Default configuration of Codec DMA Interface RX */
638static struct dev_config cdc_dma_rx_cfg[] = {
639 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
640 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
641 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
642 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
643 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
644 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
645 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
646};
647
648/* Default configuration of Codec DMA Interface TX */
649static struct dev_config cdc_dma_tx_cfg[] = {
650 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
651 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
652 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
653 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
654 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
655 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]656 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
657 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
658 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]659};
660
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]661static struct dev_config afe_loopback_tx_cfg[] = {
662 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
663};
664
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]665static int msm_vi_feed_tx_ch = 2;
666static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]667static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
668 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]669static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]670static char const *ch_text[] = {"Two", "Three", "Four", "Five",
671 "Six", "Seven", "Eight"};
672static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
673 "KHZ_16", "KHZ_22P05",
674 "KHZ_32", "KHZ_44P1", "KHZ_48",
675 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
676 "KHZ_192", "KHZ_352P8", "KHZ_384"};
677static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
678 "Five", "Six", "Seven",
679 "Eight"};
680static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
681 "KHZ_48", "KHZ_176P4",
682 "KHZ_352P8"};
683static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
684static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
685 "Five", "Six", "Seven", "Eight"};
686static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
687static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
688 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]689 "KHZ_48", "KHZ_88P2", "KHZ_96",
690 "KHZ_176P4", "KHZ_192","KHZ_352P8",
691 "KHZ_384"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]692static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
693 "Five", "Six", "Seven",
694 "Eight"};
695
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]696static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
697static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
698 "Five", "Six", "Seven",
699 "Eight"};
700static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
701 "KHZ_16", "KHZ_22P05",
702 "KHZ_32", "KHZ_44P1", "KHZ_48",
703 "KHZ_88P2", "KHZ_96",
704 "KHZ_176P4", "KHZ_192",
705 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]706static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
707 "KHZ_16", "KHZ_22P05",
708 "KHZ_32", "KHZ_44P1", "KHZ_48",
709 "KHZ_88P2", "KHZ_96",
710 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]711static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
712 "S24_3LE"};
713static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
714 "KHZ_192", "KHZ_32", "KHZ_44P1",
715 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]716static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
717 "KHZ_44P1", "KHZ_48",
718 "KHZ_88P2", "KHZ_96"};
719static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
720 "KHZ_44P1", "KHZ_48",
721 "KHZ_88P2", "KHZ_96"};
722static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
723 "KHZ_44P1", "KHZ_48",
724 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]725static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]726
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]727static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
728static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
729static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
730static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
731static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
732static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]733static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]734static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
735static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
736static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
737static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
738static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
739static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
740static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]741static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]742static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
743static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]744static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
745static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
746static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]747static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]748static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
749static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]750static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
751static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
752static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]753static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
754static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]755static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
756static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
757static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]758static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
759static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
760static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]761static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
762static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
763static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]764static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
765static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
766static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]767static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
768static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
769static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
770static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
771static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]772static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
773static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
774static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]775static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
776static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
777static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]778static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
779static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
780static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]781static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
782static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
783static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
784static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
785static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
786static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
787static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
788static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
789static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
790static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
791static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
792static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
793static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]794static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
795static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
796static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]797static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
798static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]799static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
800static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
801static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
802static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
803static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]804static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
805static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
806static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]807static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
808 cdc_dma_sample_rate_text);
809static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
810 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]811static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
812 cdc_dma_sample_rate_text);
813static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
814 cdc_dma_sample_rate_text);
815static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
816 cdc_dma_sample_rate_text);
817static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
818 cdc_dma_sample_rate_text);
819static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
820 cdc_dma_sample_rate_text);
821static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
822 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]823static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
824 cdc_dma_sample_rate_text);
825static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
826 cdc_dma_sample_rate_text);
827static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
828 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]829
830/* WCD9380 */
831static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
832static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
833static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
834static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
835static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
836static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
837 cdc80_dma_sample_rate_text);
838static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
839 cdc80_dma_sample_rate_text);
840static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
841 cdc80_dma_sample_rate_text);
842static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
843 cdc80_dma_sample_rate_text);
844static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
845 cdc80_dma_sample_rate_text);
846/* WCD9385 */
847static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
848static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
849static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
850static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
851static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
852static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
853 cdc_dma_sample_rate_text);
854static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
855 cdc_dma_sample_rate_text);
856static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
857 cdc_dma_sample_rate_text);
858static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
859 cdc_dma_sample_rate_text);
860static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
861 cdc_dma_sample_rate_text);
862
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]863static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
864static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
865static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
866 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]867static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
868static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
869static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]870static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]871
872static bool is_initial_boot;
873static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]874static struct snd_soc_aux_dev *msm_aux_dev;
875static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]876static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]877static int dmic_0_1_gpio_cnt;
878static int dmic_2_3_gpio_cnt;
879static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]880
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]881static void *def_wcd_mbhc_cal(void);
882
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]883/*
884 * Need to report LINEIN
885 * if R/L channel impedance is larger than 5K ohm
886 */
887static struct wcd_mbhc_config wcd_mbhc_cfg = {
888 .read_fw_bin = false,
889 .calibration = NULL,
890 .detect_extn_cable = true,
891 .mono_stero_detection = false,
892 .swap_gnd_mic = NULL,
893 .hs_ext_micbias = true,
894 .key_code[0] = KEY_MEDIA,
895 .key_code[1] = KEY_VOICECOMMAND,
896 .key_code[2] = KEY_VOLUMEUP,
897 .key_code[3] = KEY_VOLUMEDOWN,
898 .key_code[4] = 0,
899 .key_code[5] = 0,
900 .key_code[6] = 0,
901 .key_code[7] = 0,
902 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]903 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]904 .mbhc_micbias = MIC_BIAS_2,
905 .anc_micbias = MIC_BIAS_2,
906 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]907 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]908};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]909
910static inline int param_is_mask(int p)
911{
912 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
913 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
914}
915
916static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
917 int n)
918{
919 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
920}
921
922static void param_set_mask(struct snd_pcm_hw_params *p, int n,
923 unsigned int bit)
924{
925 if (bit >= SNDRV_MASK_MAX)
926 return;
927 if (param_is_mask(n)) {
928 struct snd_mask *m = param_to_mask(p, n);
929
930 m->bits[0] = 0;
931 m->bits[1] = 0;
932 m->bits[bit >> 5] |= (1 << (bit & 31));
933 }
934}
935
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]936static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
937 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]938{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]939 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]940
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]941 switch (usb_rx_cfg.sample_rate) {
942 case SAMPLING_RATE_384KHZ:
943 sample_rate_val = 12;
944 break;
945 case SAMPLING_RATE_352P8KHZ:
946 sample_rate_val = 11;
947 break;
948 case SAMPLING_RATE_192KHZ:
949 sample_rate_val = 10;
950 break;
951 case SAMPLING_RATE_176P4KHZ:
952 sample_rate_val = 9;
953 break;
954 case SAMPLING_RATE_96KHZ:
955 sample_rate_val = 8;
956 break;
957 case SAMPLING_RATE_88P2KHZ:
958 sample_rate_val = 7;
959 break;
960 case SAMPLING_RATE_48KHZ:
961 sample_rate_val = 6;
962 break;
963 case SAMPLING_RATE_44P1KHZ:
964 sample_rate_val = 5;
965 break;
966 case SAMPLING_RATE_32KHZ:
967 sample_rate_val = 4;
968 break;
969 case SAMPLING_RATE_22P05KHZ:
970 sample_rate_val = 3;
971 break;
972 case SAMPLING_RATE_16KHZ:
973 sample_rate_val = 2;
974 break;
975 case SAMPLING_RATE_11P025KHZ:
976 sample_rate_val = 1;
977 break;
978 case SAMPLING_RATE_8KHZ:
979 default:
980 sample_rate_val = 0;
981 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]982 }
983
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]984 ucontrol->value.integer.value[0] = sample_rate_val;
985 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
986 usb_rx_cfg.sample_rate);
987 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]988}
989
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]990static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
991 struct snd_ctl_elem_value *ucontrol)
992{
993 switch (ucontrol->value.integer.value[0]) {
994 case 12:
995 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
996 break;
997 case 11:
998 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
999 break;
1000 case 10:
1001 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1002 break;
1003 case 9:
1004 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1005 break;
1006 case 8:
1007 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1008 break;
1009 case 7:
1010 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1011 break;
1012 case 6:
1013 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1014 break;
1015 case 5:
1016 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1017 break;
1018 case 4:
1019 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1020 break;
1021 case 3:
1022 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1023 break;
1024 case 2:
1025 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1026 break;
1027 case 1:
1028 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1029 break;
1030 case 0:
1031 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1032 break;
1033 default:
1034 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1035 break;
1036 }
1037
1038 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1039 __func__, ucontrol->value.integer.value[0],
1040 usb_rx_cfg.sample_rate);
1041 return 0;
1042}
1043
1044static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1045 struct snd_ctl_elem_value *ucontrol)
1046{
1047 int sample_rate_val = 0;
1048
1049 switch (usb_tx_cfg.sample_rate) {
1050 case SAMPLING_RATE_384KHZ:
1051 sample_rate_val = 12;
1052 break;
1053 case SAMPLING_RATE_352P8KHZ:
1054 sample_rate_val = 11;
1055 break;
1056 case SAMPLING_RATE_192KHZ:
1057 sample_rate_val = 10;
1058 break;
1059 case SAMPLING_RATE_176P4KHZ:
1060 sample_rate_val = 9;
1061 break;
1062 case SAMPLING_RATE_96KHZ:
1063 sample_rate_val = 8;
1064 break;
1065 case SAMPLING_RATE_88P2KHZ:
1066 sample_rate_val = 7;
1067 break;
1068 case SAMPLING_RATE_48KHZ:
1069 sample_rate_val = 6;
1070 break;
1071 case SAMPLING_RATE_44P1KHZ:
1072 sample_rate_val = 5;
1073 break;
1074 case SAMPLING_RATE_32KHZ:
1075 sample_rate_val = 4;
1076 break;
1077 case SAMPLING_RATE_22P05KHZ:
1078 sample_rate_val = 3;
1079 break;
1080 case SAMPLING_RATE_16KHZ:
1081 sample_rate_val = 2;
1082 break;
1083 case SAMPLING_RATE_11P025KHZ:
1084 sample_rate_val = 1;
1085 break;
1086 case SAMPLING_RATE_8KHZ:
1087 sample_rate_val = 0;
1088 break;
1089 default:
1090 sample_rate_val = 6;
1091 break;
1092 }
1093
1094 ucontrol->value.integer.value[0] = sample_rate_val;
1095 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1096 usb_tx_cfg.sample_rate);
1097 return 0;
1098}
1099
1100static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1101 struct snd_ctl_elem_value *ucontrol)
1102{
1103 switch (ucontrol->value.integer.value[0]) {
1104 case 12:
1105 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1106 break;
1107 case 11:
1108 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1109 break;
1110 case 10:
1111 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1112 break;
1113 case 9:
1114 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1115 break;
1116 case 8:
1117 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1118 break;
1119 case 7:
1120 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1121 break;
1122 case 6:
1123 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1124 break;
1125 case 5:
1126 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1127 break;
1128 case 4:
1129 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1130 break;
1131 case 3:
1132 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1133 break;
1134 case 2:
1135 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1136 break;
1137 case 1:
1138 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1139 break;
1140 case 0:
1141 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1142 break;
1143 default:
1144 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1145 break;
1146 }
1147
1148 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1149 __func__, ucontrol->value.integer.value[0],
1150 usb_tx_cfg.sample_rate);
1151 return 0;
1152}
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]1153static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
1154 struct snd_ctl_elem_value *ucontrol)
1155{
1156 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1157 afe_loopback_tx_cfg[0].channels);
1158 ucontrol->value.enumerated.item[0] =
1159 afe_loopback_tx_cfg[0].channels - 1;
1160
1161 return 0;
1162}
1163
1164static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
1165 struct snd_ctl_elem_value *ucontrol)
1166{
1167 afe_loopback_tx_cfg[0].channels =
1168 ucontrol->value.enumerated.item[0] + 1;
1169 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1170 afe_loopback_tx_cfg[0].channels);
1171
1172 return 1;
1173}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1174
1175static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1176 struct snd_ctl_elem_value *ucontrol)
1177{
1178 switch (usb_rx_cfg.bit_format) {
1179 case SNDRV_PCM_FORMAT_S32_LE:
1180 ucontrol->value.integer.value[0] = 3;
1181 break;
1182 case SNDRV_PCM_FORMAT_S24_3LE:
1183 ucontrol->value.integer.value[0] = 2;
1184 break;
1185 case SNDRV_PCM_FORMAT_S24_LE:
1186 ucontrol->value.integer.value[0] = 1;
1187 break;
1188 case SNDRV_PCM_FORMAT_S16_LE:
1189 default:
1190 ucontrol->value.integer.value[0] = 0;
1191 break;
1192 }
1193
1194 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1195 __func__, usb_rx_cfg.bit_format,
1196 ucontrol->value.integer.value[0]);
1197 return 0;
1198}
1199
1200static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1201 struct snd_ctl_elem_value *ucontrol)
1202{
1203 int rc = 0;
1204
1205 switch (ucontrol->value.integer.value[0]) {
1206 case 3:
1207 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1208 break;
1209 case 2:
1210 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1211 break;
1212 case 1:
1213 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1214 break;
1215 case 0:
1216 default:
1217 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1218 break;
1219 }
1220 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1221 __func__, usb_rx_cfg.bit_format,
1222 ucontrol->value.integer.value[0]);
1223
1224 return rc;
1225}
1226
1227static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1228 struct snd_ctl_elem_value *ucontrol)
1229{
1230 switch (usb_tx_cfg.bit_format) {
1231 case SNDRV_PCM_FORMAT_S32_LE:
1232 ucontrol->value.integer.value[0] = 3;
1233 break;
1234 case SNDRV_PCM_FORMAT_S24_3LE:
1235 ucontrol->value.integer.value[0] = 2;
1236 break;
1237 case SNDRV_PCM_FORMAT_S24_LE:
1238 ucontrol->value.integer.value[0] = 1;
1239 break;
1240 case SNDRV_PCM_FORMAT_S16_LE:
1241 default:
1242 ucontrol->value.integer.value[0] = 0;
1243 break;
1244 }
1245
1246 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1247 __func__, usb_tx_cfg.bit_format,
1248 ucontrol->value.integer.value[0]);
1249 return 0;
1250}
1251
1252static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1253 struct snd_ctl_elem_value *ucontrol)
1254{
1255 int rc = 0;
1256
1257 switch (ucontrol->value.integer.value[0]) {
1258 case 3:
1259 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1260 break;
1261 case 2:
1262 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1263 break;
1264 case 1:
1265 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1266 break;
1267 case 0:
1268 default:
1269 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1270 break;
1271 }
1272 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1273 __func__, usb_tx_cfg.bit_format,
1274 ucontrol->value.integer.value[0]);
1275
1276 return rc;
1277}
1278
1279static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1280 struct snd_ctl_elem_value *ucontrol)
1281{
1282 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1283 usb_rx_cfg.channels);
1284 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1285 return 0;
1286}
1287
1288static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1289 struct snd_ctl_elem_value *ucontrol)
1290{
1291 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1292
1293 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1294 return 1;
1295}
1296
1297static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1298 struct snd_ctl_elem_value *ucontrol)
1299{
1300 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1301 usb_tx_cfg.channels);
1302 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1303 return 0;
1304}
1305
1306static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1307 struct snd_ctl_elem_value *ucontrol)
1308{
1309 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1310
1311 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1312 return 1;
1313}
1314
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]1315static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1316 struct snd_ctl_elem_value *ucontrol)
1317{
1318 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1319 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1320 ucontrol->value.integer.value[0]);
1321 return 0;
1322}
1323
1324static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1325 struct snd_ctl_elem_value *ucontrol)
1326{
1327 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1328 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1329 return 1;
1330}
1331
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1332static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1333{
1334 int idx = 0;
1335
1336 if (strnstr(kcontrol->id.name, "Display Port RX",
1337 sizeof("Display Port RX"))) {
1338 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]1339 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1340 sizeof("Display Port1 RX"))) {
1341 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1342 } else {
1343 pr_err("%s: unsupported BE: %s\n",
1344 __func__, kcontrol->id.name);
1345 idx = -EINVAL;
1346 }
1347
1348 return idx;
1349}
1350
1351static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1352 struct snd_ctl_elem_value *ucontrol)
1353{
1354 int idx = ext_disp_get_port_idx(kcontrol);
1355
1356 if (idx < 0)
1357 return idx;
1358
1359 switch (ext_disp_rx_cfg[idx].bit_format) {
1360 case SNDRV_PCM_FORMAT_S24_3LE:
1361 ucontrol->value.integer.value[0] = 2;
1362 break;
1363 case SNDRV_PCM_FORMAT_S24_LE:
1364 ucontrol->value.integer.value[0] = 1;
1365 break;
1366 case SNDRV_PCM_FORMAT_S16_LE:
1367 default:
1368 ucontrol->value.integer.value[0] = 0;
1369 break;
1370 }
1371
1372 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1373 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1374 ucontrol->value.integer.value[0]);
1375 return 0;
1376}
1377
1378static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1379 struct snd_ctl_elem_value *ucontrol)
1380{
1381 int idx = ext_disp_get_port_idx(kcontrol);
1382
1383 if (idx < 0)
1384 return idx;
1385
1386 switch (ucontrol->value.integer.value[0]) {
1387 case 2:
1388 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1389 break;
1390 case 1:
1391 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1392 break;
1393 case 0:
1394 default:
1395 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1396 break;
1397 }
1398 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1399 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1400 ucontrol->value.integer.value[0]);
1401
1402 return 0;
1403}
1404
1405static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1406 struct snd_ctl_elem_value *ucontrol)
1407{
1408 int idx = ext_disp_get_port_idx(kcontrol);
1409
1410 if (idx < 0)
1411 return idx;
1412
1413 ucontrol->value.integer.value[0] =
1414 ext_disp_rx_cfg[idx].channels - 2;
1415
1416 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1417 idx, ext_disp_rx_cfg[idx].channels);
1418
1419 return 0;
1420}
1421
1422static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1423 struct snd_ctl_elem_value *ucontrol)
1424{
1425 int idx = ext_disp_get_port_idx(kcontrol);
1426
1427 if (idx < 0)
1428 return idx;
1429
1430 ext_disp_rx_cfg[idx].channels =
1431 ucontrol->value.integer.value[0] + 2;
1432
1433 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1434 idx, ext_disp_rx_cfg[idx].channels);
1435 return 1;
1436}
1437
1438static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1439 struct snd_ctl_elem_value *ucontrol)
1440{
1441 int sample_rate_val;
1442 int idx = ext_disp_get_port_idx(kcontrol);
1443
1444 if (idx < 0)
1445 return idx;
1446
1447 switch (ext_disp_rx_cfg[idx].sample_rate) {
1448 case SAMPLING_RATE_176P4KHZ:
1449 sample_rate_val = 6;
1450 break;
1451
1452 case SAMPLING_RATE_88P2KHZ:
1453 sample_rate_val = 5;
1454 break;
1455
1456 case SAMPLING_RATE_44P1KHZ:
1457 sample_rate_val = 4;
1458 break;
1459
1460 case SAMPLING_RATE_32KHZ:
1461 sample_rate_val = 3;
1462 break;
1463
1464 case SAMPLING_RATE_192KHZ:
1465 sample_rate_val = 2;
1466 break;
1467
1468 case SAMPLING_RATE_96KHZ:
1469 sample_rate_val = 1;
1470 break;
1471
1472 case SAMPLING_RATE_48KHZ:
1473 default:
1474 sample_rate_val = 0;
1475 break;
1476 }
1477
1478 ucontrol->value.integer.value[0] = sample_rate_val;
1479 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1480 idx, ext_disp_rx_cfg[idx].sample_rate);
1481
1482 return 0;
1483}
1484
1485static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1486 struct snd_ctl_elem_value *ucontrol)
1487{
1488 int idx = ext_disp_get_port_idx(kcontrol);
1489
1490 if (idx < 0)
1491 return idx;
1492
1493 switch (ucontrol->value.integer.value[0]) {
1494 case 6:
1495 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1496 break;
1497 case 5:
1498 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1499 break;
1500 case 4:
1501 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1502 break;
1503 case 3:
1504 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1505 break;
1506 case 2:
1507 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1508 break;
1509 case 1:
1510 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1511 break;
1512 case 0:
1513 default:
1514 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1515 break;
1516 }
1517
1518 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1519 __func__, ucontrol->value.integer.value[0], idx,
1520 ext_disp_rx_cfg[idx].sample_rate);
1521 return 0;
1522}
1523
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1524static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1525 struct snd_ctl_elem_value *ucontrol)
1526{
1527 pr_debug("%s: proxy_rx channels = %d\n",
1528 __func__, proxy_rx_cfg.channels);
1529 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1530
1531 return 0;
1532}
1533
1534static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1535 struct snd_ctl_elem_value *ucontrol)
1536{
1537 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1538 pr_debug("%s: proxy_rx channels = %d\n",
1539 __func__, proxy_rx_cfg.channels);
1540
1541 return 1;
1542}
1543
1544static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1545 struct tdm_port *port)
1546{
1547 if (port) {
1548 if (strnstr(kcontrol->id.name, "PRI",
1549 sizeof(kcontrol->id.name))) {
1550 port->mode = TDM_PRI;
1551 } else if (strnstr(kcontrol->id.name, "SEC",
1552 sizeof(kcontrol->id.name))) {
1553 port->mode = TDM_SEC;
1554 } else if (strnstr(kcontrol->id.name, "TERT",
1555 sizeof(kcontrol->id.name))) {
1556 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]1557 } else if (strnstr(kcontrol->id.name, "QUAT",
1558 sizeof(kcontrol->id.name))) {
1559 port->mode = TDM_QUAT;
1560 } else if (strnstr(kcontrol->id.name, "QUIN",
1561 sizeof(kcontrol->id.name))) {
1562 port->mode = TDM_QUIN;
1563 } else if (strnstr(kcontrol->id.name, "SEN",
1564 sizeof(kcontrol->id.name))) {
1565 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1566 } else {
1567 pr_err("%s: unsupported mode in: %s\n",
1568 __func__, kcontrol->id.name);
1569 return -EINVAL;
1570 }
1571
1572 if (strnstr(kcontrol->id.name, "RX_0",
1573 sizeof(kcontrol->id.name)) ||
1574 strnstr(kcontrol->id.name, "TX_0",
1575 sizeof(kcontrol->id.name))) {
1576 port->channel = TDM_0;
1577 } else if (strnstr(kcontrol->id.name, "RX_1",
1578 sizeof(kcontrol->id.name)) ||
1579 strnstr(kcontrol->id.name, "TX_1",
1580 sizeof(kcontrol->id.name))) {
1581 port->channel = TDM_1;
1582 } else if (strnstr(kcontrol->id.name, "RX_2",
1583 sizeof(kcontrol->id.name)) ||
1584 strnstr(kcontrol->id.name, "TX_2",
1585 sizeof(kcontrol->id.name))) {
1586 port->channel = TDM_2;
1587 } else if (strnstr(kcontrol->id.name, "RX_3",
1588 sizeof(kcontrol->id.name)) ||
1589 strnstr(kcontrol->id.name, "TX_3",
1590 sizeof(kcontrol->id.name))) {
1591 port->channel = TDM_3;
1592 } else if (strnstr(kcontrol->id.name, "RX_4",
1593 sizeof(kcontrol->id.name)) ||
1594 strnstr(kcontrol->id.name, "TX_4",
1595 sizeof(kcontrol->id.name))) {
1596 port->channel = TDM_4;
1597 } else if (strnstr(kcontrol->id.name, "RX_5",
1598 sizeof(kcontrol->id.name)) ||
1599 strnstr(kcontrol->id.name, "TX_5",
1600 sizeof(kcontrol->id.name))) {
1601 port->channel = TDM_5;
1602 } else if (strnstr(kcontrol->id.name, "RX_6",
1603 sizeof(kcontrol->id.name)) ||
1604 strnstr(kcontrol->id.name, "TX_6",
1605 sizeof(kcontrol->id.name))) {
1606 port->channel = TDM_6;
1607 } else if (strnstr(kcontrol->id.name, "RX_7",
1608 sizeof(kcontrol->id.name)) ||
1609 strnstr(kcontrol->id.name, "TX_7",
1610 sizeof(kcontrol->id.name))) {
1611 port->channel = TDM_7;
1612 } else {
1613 pr_err("%s: unsupported channel in: %s\n",
1614 __func__, kcontrol->id.name);
1615 return -EINVAL;
1616 }
1617 } else {
1618 return -EINVAL;
1619 }
1620 return 0;
1621}
1622
1623static int tdm_get_sample_rate(int value)
1624{
1625 int sample_rate = 0;
1626
1627 switch (value) {
1628 case 0:
1629 sample_rate = SAMPLING_RATE_8KHZ;
1630 break;
1631 case 1:
1632 sample_rate = SAMPLING_RATE_16KHZ;
1633 break;
1634 case 2:
1635 sample_rate = SAMPLING_RATE_32KHZ;
1636 break;
1637 case 3:
1638 sample_rate = SAMPLING_RATE_48KHZ;
1639 break;
1640 case 4:
1641 sample_rate = SAMPLING_RATE_176P4KHZ;
1642 break;
1643 case 5:
1644 sample_rate = SAMPLING_RATE_352P8KHZ;
1645 break;
1646 default:
1647 sample_rate = SAMPLING_RATE_48KHZ;
1648 break;
1649 }
1650 return sample_rate;
1651}
1652
1653static int tdm_get_sample_rate_val(int sample_rate)
1654{
1655 int sample_rate_val = 0;
1656
1657 switch (sample_rate) {
1658 case SAMPLING_RATE_8KHZ:
1659 sample_rate_val = 0;
1660 break;
1661 case SAMPLING_RATE_16KHZ:
1662 sample_rate_val = 1;
1663 break;
1664 case SAMPLING_RATE_32KHZ:
1665 sample_rate_val = 2;
1666 break;
1667 case SAMPLING_RATE_48KHZ:
1668 sample_rate_val = 3;
1669 break;
1670 case SAMPLING_RATE_176P4KHZ:
1671 sample_rate_val = 4;
1672 break;
1673 case SAMPLING_RATE_352P8KHZ:
1674 sample_rate_val = 5;
1675 break;
1676 default:
1677 sample_rate_val = 3;
1678 break;
1679 }
1680 return sample_rate_val;
1681}
1682
1683static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1684 struct snd_ctl_elem_value *ucontrol)
1685{
1686 struct tdm_port port;
1687 int ret = tdm_get_port_idx(kcontrol, &port);
1688
1689 if (ret) {
1690 pr_err("%s: unsupported control: %s\n",
1691 __func__, kcontrol->id.name);
1692 } else {
1693 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1694 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1695
1696 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1697 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1698 ucontrol->value.enumerated.item[0]);
1699 }
1700 return ret;
1701}
1702
1703static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1704 struct snd_ctl_elem_value *ucontrol)
1705{
1706 struct tdm_port port;
1707 int ret = tdm_get_port_idx(kcontrol, &port);
1708
1709 if (ret) {
1710 pr_err("%s: unsupported control: %s\n",
1711 __func__, kcontrol->id.name);
1712 } else {
1713 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1714 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1715
1716 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1717 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1718 ucontrol->value.enumerated.item[0]);
1719 }
1720 return ret;
1721}
1722
1723static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1724 struct snd_ctl_elem_value *ucontrol)
1725{
1726 struct tdm_port port;
1727 int ret = tdm_get_port_idx(kcontrol, &port);
1728
1729 if (ret) {
1730 pr_err("%s: unsupported control: %s\n",
1731 __func__, kcontrol->id.name);
1732 } else {
1733 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1734 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1735
1736 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1737 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1738 ucontrol->value.enumerated.item[0]);
1739 }
1740 return ret;
1741}
1742
1743static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1744 struct snd_ctl_elem_value *ucontrol)
1745{
1746 struct tdm_port port;
1747 int ret = tdm_get_port_idx(kcontrol, &port);
1748
1749 if (ret) {
1750 pr_err("%s: unsupported control: %s\n",
1751 __func__, kcontrol->id.name);
1752 } else {
1753 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1754 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1755
1756 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1757 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1758 ucontrol->value.enumerated.item[0]);
1759 }
1760 return ret;
1761}
1762
1763static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1764{
1765 int format = 0;
1766
1767 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1768 case 0:
1769 format = SNDRV_PCM_FORMAT_S16_LE;
1770 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1771 case 1:
1772 format = SNDRV_PCM_FORMAT_S24_LE;
1773 break;
1774 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1775 format = SNDRV_PCM_FORMAT_S32_LE;
1776 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1777 default:
1778 format = SNDRV_PCM_FORMAT_S16_LE;
1779 break;
1780 }
1781 return format;
1782}
1783
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1784static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1785{
1786 int value = 0;
1787
1788 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1789 case SNDRV_PCM_FORMAT_S16_LE:
1790 value = 0;
1791 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1792 case SNDRV_PCM_FORMAT_S24_LE:
1793 value = 1;
1794 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1795 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1796 value = 2;
1797 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1798 default:
1799 value = 0;
1800 break;
1801 }
1802 return value;
1803}
1804
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1805static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1806 struct snd_ctl_elem_value *ucontrol)
1807{
1808 struct tdm_port port;
1809 int ret = tdm_get_port_idx(kcontrol, &port);
1810
1811 if (ret) {
1812 pr_err("%s: unsupported control: %s\n",
1813 __func__, kcontrol->id.name);
1814 } else {
1815 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1816 tdm_rx_cfg[port.mode][port.channel].bit_format);
1817
1818 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1819 tdm_rx_cfg[port.mode][port.channel].bit_format,
1820 ucontrol->value.enumerated.item[0]);
1821 }
1822 return ret;
1823}
1824
1825static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1826 struct snd_ctl_elem_value *ucontrol)
1827{
1828 struct tdm_port port;
1829 int ret = tdm_get_port_idx(kcontrol, &port);
1830
1831 if (ret) {
1832 pr_err("%s: unsupported control: %s\n",
1833 __func__, kcontrol->id.name);
1834 } else {
1835 tdm_rx_cfg[port.mode][port.channel].bit_format =
1836 tdm_get_format(ucontrol->value.enumerated.item[0]);
1837
1838 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1839 tdm_rx_cfg[port.mode][port.channel].bit_format,
1840 ucontrol->value.enumerated.item[0]);
1841 }
1842 return ret;
1843}
1844
1845static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1846 struct snd_ctl_elem_value *ucontrol)
1847{
1848 struct tdm_port port;
1849 int ret = tdm_get_port_idx(kcontrol, &port);
1850
1851 if (ret) {
1852 pr_err("%s: unsupported control: %s\n",
1853 __func__, kcontrol->id.name);
1854 } else {
1855 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1856 tdm_tx_cfg[port.mode][port.channel].bit_format);
1857
1858 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1859 tdm_tx_cfg[port.mode][port.channel].bit_format,
1860 ucontrol->value.enumerated.item[0]);
1861 }
1862 return ret;
1863}
1864
1865static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1866 struct snd_ctl_elem_value *ucontrol)
1867{
1868 struct tdm_port port;
1869 int ret = tdm_get_port_idx(kcontrol, &port);
1870
1871 if (ret) {
1872 pr_err("%s: unsupported control: %s\n",
1873 __func__, kcontrol->id.name);
1874 } else {
1875 tdm_tx_cfg[port.mode][port.channel].bit_format =
1876 tdm_get_format(ucontrol->value.enumerated.item[0]);
1877
1878 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1879 tdm_tx_cfg[port.mode][port.channel].bit_format,
1880 ucontrol->value.enumerated.item[0]);
1881 }
1882 return ret;
1883}
1884
1885static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1886 struct snd_ctl_elem_value *ucontrol)
1887{
1888 struct tdm_port port;
1889 int ret = tdm_get_port_idx(kcontrol, &port);
1890
1891 if (ret) {
1892 pr_err("%s: unsupported control: %s\n",
1893 __func__, kcontrol->id.name);
1894 } else {
1895
1896 ucontrol->value.enumerated.item[0] =
1897 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1898
1899 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1900 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1901 ucontrol->value.enumerated.item[0]);
1902 }
1903 return ret;
1904}
1905
1906static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1907 struct snd_ctl_elem_value *ucontrol)
1908{
1909 struct tdm_port port;
1910 int ret = tdm_get_port_idx(kcontrol, &port);
1911
1912 if (ret) {
1913 pr_err("%s: unsupported control: %s\n",
1914 __func__, kcontrol->id.name);
1915 } else {
1916 tdm_rx_cfg[port.mode][port.channel].channels =
1917 ucontrol->value.enumerated.item[0] + 1;
1918
1919 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1920 tdm_rx_cfg[port.mode][port.channel].channels,
1921 ucontrol->value.enumerated.item[0] + 1);
1922 }
1923 return ret;
1924}
1925
1926static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1927 struct snd_ctl_elem_value *ucontrol)
1928{
1929 struct tdm_port port;
1930 int ret = tdm_get_port_idx(kcontrol, &port);
1931
1932 if (ret) {
1933 pr_err("%s: unsupported control: %s\n",
1934 __func__, kcontrol->id.name);
1935 } else {
1936 ucontrol->value.enumerated.item[0] =
1937 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1938
1939 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1940 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1941 ucontrol->value.enumerated.item[0]);
1942 }
1943 return ret;
1944}
1945
1946static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1947 struct snd_ctl_elem_value *ucontrol)
1948{
1949 struct tdm_port port;
1950 int ret = tdm_get_port_idx(kcontrol, &port);
1951
1952 if (ret) {
1953 pr_err("%s: unsupported control: %s\n",
1954 __func__, kcontrol->id.name);
1955 } else {
1956 tdm_tx_cfg[port.mode][port.channel].channels =
1957 ucontrol->value.enumerated.item[0] + 1;
1958
1959 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1960 tdm_tx_cfg[port.mode][port.channel].channels,
1961 ucontrol->value.enumerated.item[0] + 1);
1962 }
1963 return ret;
1964}
1965
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]1966static int tdm_slot_map_put(struct snd_kcontrol *kcontrol,
1967 struct snd_ctl_elem_value *ucontrol)
1968{
1969 int slot_index = 0;
1970 int interface = ucontrol->value.integer.value[0];
1971 int channel = ucontrol->value.integer.value[1];
1972 unsigned int offset_val = 0;
1973 unsigned int *slot_offset = NULL;
1974 struct tdm_dev_config *config = NULL;
1975
1976 if (interface < 0 || interface >= (TDM_INTERFACE_MAX * MAX_PATH)) {
1977 pr_err("%s: incorrect interface = %d\n", __func__, interface);
1978 return -EINVAL;
1979 }
1980 if (channel < 0 || channel >= TDM_PORT_MAX) {
1981 pr_err("%s: incorrect channel = %d\n", __func__, channel);
1982 return -EINVAL;
1983 }
1984
1985 pr_debug("%s: interface = %d, channel = %d\n", __func__,
1986 interface, channel);
1987
1988 config = ((struct tdm_dev_config *) tdm_cfg[interface / MAX_PATH]) +
1989 ((interface % MAX_PATH) * TDM_PORT_MAX) + channel;
1990 slot_offset = config->tdm_slot_offset;
1991
1992 for (slot_index = 0; slot_index < TDM_MAX_SLOTS; slot_index++) {
1993 offset_val = ucontrol->value.integer.value[MAX_PATH +
1994 slot_index];
1995 /* Offset value can only be 0, 4, 8, ..28 */
1996 if (offset_val % 4 == 0 && offset_val <= 28)
1997 slot_offset[slot_index] = offset_val;
1998 pr_debug("%s: slot offset[%d] = %d\n", __func__,
1999 slot_index, slot_offset[slot_index]);
2000 }
2001
2002 return 0;
2003}
2004
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2005static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2006{
2007 int idx = 0;
2008
2009 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2010 sizeof("PRIM_AUX_PCM"))) {
2011 idx = PRIM_AUX_PCM;
2012 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2013 sizeof("SEC_AUX_PCM"))) {
2014 idx = SEC_AUX_PCM;
2015 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2016 sizeof("TERT_AUX_PCM"))) {
2017 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2018 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2019 sizeof("QUAT_AUX_PCM"))) {
2020 idx = QUAT_AUX_PCM;
2021 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2022 sizeof("QUIN_AUX_PCM"))) {
2023 idx = QUIN_AUX_PCM;
2024 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
2025 sizeof("SEN_AUX_PCM"))) {
2026 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2027 } else {
2028 pr_err("%s: unsupported port: %s\n",
2029 __func__, kcontrol->id.name);
2030 idx = -EINVAL;
2031 }
2032
2033 return idx;
2034}
2035
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2036static int aux_pcm_get_sample_rate(int value)
2037{
2038 int sample_rate = 0;
2039
2040 switch (value) {
2041 case 1:
2042 sample_rate = SAMPLING_RATE_16KHZ;
2043 break;
2044 case 0:
2045 default:
2046 sample_rate = SAMPLING_RATE_8KHZ;
2047 break;
2048 }
2049 return sample_rate;
2050}
2051
2052static int aux_pcm_get_sample_rate_val(int sample_rate)
2053{
2054 int sample_rate_val = 0;
2055
2056 switch (sample_rate) {
2057 case SAMPLING_RATE_16KHZ:
2058 sample_rate_val = 1;
2059 break;
2060 case SAMPLING_RATE_8KHZ:
2061 default:
2062 sample_rate_val = 0;
2063 break;
2064 }
2065 return sample_rate_val;
2066}
2067
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2068static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2069{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2070 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2071
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2072 switch (value) {
2073 case 0:
2074 format = SNDRV_PCM_FORMAT_S16_LE;
2075 break;
2076 case 1:
2077 format = SNDRV_PCM_FORMAT_S24_LE;
2078 break;
2079 case 2:
2080 format = SNDRV_PCM_FORMAT_S24_3LE;
2081 break;
2082 case 3:
2083 format = SNDRV_PCM_FORMAT_S32_LE;
2084 break;
2085 default:
2086 format = SNDRV_PCM_FORMAT_S16_LE;
2087 break;
2088 }
2089 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2090}
2091
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2092static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2093{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2094 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2095
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2096 switch (format) {
2097 case SNDRV_PCM_FORMAT_S16_LE:
2098 value = 0;
2099 break;
2100 case SNDRV_PCM_FORMAT_S24_LE:
2101 value = 1;
2102 break;
2103 case SNDRV_PCM_FORMAT_S24_3LE:
2104 value = 2;
2105 break;
2106 case SNDRV_PCM_FORMAT_S32_LE:
2107 value = 3;
2108 break;
2109 default:
2110 value = 0;
2111 break;
2112 }
2113 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2114}
2115
2116static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2117 struct snd_ctl_elem_value *ucontrol)
2118{
2119 int idx = aux_pcm_get_port_idx(kcontrol);
2120
2121 if (idx < 0)
2122 return idx;
2123
2124 ucontrol->value.enumerated.item[0] =
2125 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2126
2127 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2128 idx, aux_pcm_rx_cfg[idx].sample_rate,
2129 ucontrol->value.enumerated.item[0]);
2130
2131 return 0;
2132}
2133
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2134static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2135 struct snd_ctl_elem_value *ucontrol)
2136{
2137 int idx = aux_pcm_get_port_idx(kcontrol);
2138
2139 if (idx < 0)
2140 return idx;
2141
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2142 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2143 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2144
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2145 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2146 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2147 ucontrol->value.enumerated.item[0]);
2148
2149 return 0;
2150}
2151
2152static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2153 struct snd_ctl_elem_value *ucontrol)
2154{
2155 int idx = aux_pcm_get_port_idx(kcontrol);
2156
2157 if (idx < 0)
2158 return idx;
2159
2160 ucontrol->value.enumerated.item[0] =
2161 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2162
2163 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2164 idx, aux_pcm_tx_cfg[idx].sample_rate,
2165 ucontrol->value.enumerated.item[0]);
2166
2167 return 0;
2168}
2169
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2170static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2171 struct snd_ctl_elem_value *ucontrol)
2172{
2173 int idx = aux_pcm_get_port_idx(kcontrol);
2174
2175 if (idx < 0)
2176 return idx;
2177
2178 aux_pcm_tx_cfg[idx].sample_rate =
2179 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2180
2181 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2182 idx, aux_pcm_tx_cfg[idx].sample_rate,
2183 ucontrol->value.enumerated.item[0]);
2184
2185 return 0;
2186}
2187
2188static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
2189 struct snd_ctl_elem_value *ucontrol)
2190{
2191 int idx = aux_pcm_get_port_idx(kcontrol);
2192
2193 if (idx < 0)
2194 return idx;
2195
2196 ucontrol->value.enumerated.item[0] =
2197 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
2198
2199 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2200 idx, aux_pcm_rx_cfg[idx].bit_format,
2201 ucontrol->value.enumerated.item[0]);
2202
2203 return 0;
2204}
2205
2206static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
2207 struct snd_ctl_elem_value *ucontrol)
2208{
2209 int idx = aux_pcm_get_port_idx(kcontrol);
2210
2211 if (idx < 0)
2212 return idx;
2213
2214 aux_pcm_rx_cfg[idx].bit_format =
2215 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2216
2217 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2218 idx, aux_pcm_rx_cfg[idx].bit_format,
2219 ucontrol->value.enumerated.item[0]);
2220
2221 return 0;
2222}
2223
2224static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2225 struct snd_ctl_elem_value *ucontrol)
2226{
2227 int idx = aux_pcm_get_port_idx(kcontrol);
2228
2229 if (idx < 0)
2230 return idx;
2231
2232 ucontrol->value.enumerated.item[0] =
2233 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2234
2235 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2236 idx, aux_pcm_tx_cfg[idx].bit_format,
2237 ucontrol->value.enumerated.item[0]);
2238
2239 return 0;
2240}
2241
2242static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2243 struct snd_ctl_elem_value *ucontrol)
2244{
2245 int idx = aux_pcm_get_port_idx(kcontrol);
2246
2247 if (idx < 0)
2248 return idx;
2249
2250 aux_pcm_tx_cfg[idx].bit_format =
2251 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2252
2253 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2254 idx, aux_pcm_tx_cfg[idx].bit_format,
2255 ucontrol->value.enumerated.item[0]);
2256
2257 return 0;
2258}
2259
2260static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2261{
2262 int idx = 0;
2263
2264 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2265 sizeof("PRIM_MI2S_RX"))) {
2266 idx = PRIM_MI2S;
2267 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2268 sizeof("SEC_MI2S_RX"))) {
2269 idx = SEC_MI2S;
2270 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2271 sizeof("TERT_MI2S_RX"))) {
2272 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2273 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2274 sizeof("QUAT_MI2S_RX"))) {
2275 idx = QUAT_MI2S;
2276 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2277 sizeof("QUIN_MI2S_RX"))) {
2278 idx = QUIN_MI2S;
2279 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2280 sizeof("SEN_MI2S_RX"))) {
2281 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2282 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2283 sizeof("PRIM_MI2S_TX"))) {
2284 idx = PRIM_MI2S;
2285 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2286 sizeof("SEC_MI2S_TX"))) {
2287 idx = SEC_MI2S;
2288 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2289 sizeof("TERT_MI2S_TX"))) {
2290 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2291 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2292 sizeof("QUAT_MI2S_TX"))) {
2293 idx = QUAT_MI2S;
2294 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2295 sizeof("QUIN_MI2S_TX"))) {
2296 idx = QUIN_MI2S;
2297 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2298 sizeof("SEN_MI2S_TX"))) {
2299 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2300 } else {
2301 pr_err("%s: unsupported channel: %s\n",
2302 __func__, kcontrol->id.name);
2303 idx = -EINVAL;
2304 }
2305
2306 return idx;
2307}
2308
2309static int mi2s_get_sample_rate(int value)
2310{
2311 int sample_rate = 0;
2312
2313 switch (value) {
2314 case 0:
2315 sample_rate = SAMPLING_RATE_8KHZ;
2316 break;
2317 case 1:
2318 sample_rate = SAMPLING_RATE_11P025KHZ;
2319 break;
2320 case 2:
2321 sample_rate = SAMPLING_RATE_16KHZ;
2322 break;
2323 case 3:
2324 sample_rate = SAMPLING_RATE_22P05KHZ;
2325 break;
2326 case 4:
2327 sample_rate = SAMPLING_RATE_32KHZ;
2328 break;
2329 case 5:
2330 sample_rate = SAMPLING_RATE_44P1KHZ;
2331 break;
2332 case 6:
2333 sample_rate = SAMPLING_RATE_48KHZ;
2334 break;
2335 case 7:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2336 sample_rate = SAMPLING_RATE_88P2KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2337 break;
2338 case 8:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2339 sample_rate = SAMPLING_RATE_96KHZ;
2340 break;
2341 case 9:
2342 sample_rate = SAMPLING_RATE_176P4KHZ;
2343 break;
2344 case 10:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2345 sample_rate = SAMPLING_RATE_192KHZ;
2346 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2347 case 11:
2348 sample_rate = SAMPLING_RATE_352P8KHZ;
2349 break;
2350 case 12:
2351 sample_rate = SAMPLING_RATE_384KHZ;
2352 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2353 default:
2354 sample_rate = SAMPLING_RATE_48KHZ;
2355 break;
2356 }
2357 return sample_rate;
2358}
2359
2360static int mi2s_get_sample_rate_val(int sample_rate)
2361{
2362 int sample_rate_val = 0;
2363
2364 switch (sample_rate) {
2365 case SAMPLING_RATE_8KHZ:
2366 sample_rate_val = 0;
2367 break;
2368 case SAMPLING_RATE_11P025KHZ:
2369 sample_rate_val = 1;
2370 break;
2371 case SAMPLING_RATE_16KHZ:
2372 sample_rate_val = 2;
2373 break;
2374 case SAMPLING_RATE_22P05KHZ:
2375 sample_rate_val = 3;
2376 break;
2377 case SAMPLING_RATE_32KHZ:
2378 sample_rate_val = 4;
2379 break;
2380 case SAMPLING_RATE_44P1KHZ:
2381 sample_rate_val = 5;
2382 break;
2383 case SAMPLING_RATE_48KHZ:
2384 sample_rate_val = 6;
2385 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2386 case SAMPLING_RATE_88P2KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2387 sample_rate_val = 7;
2388 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2389 case SAMPLING_RATE_96KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2390 sample_rate_val = 8;
2391 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2392 case SAMPLING_RATE_176P4KHZ:
2393 sample_rate_val = 9;
2394 break;
2395 case SAMPLING_RATE_192KHZ:
2396 sample_rate_val = 10;
2397 break;
2398 case SAMPLING_RATE_352P8KHZ:
2399 sample_rate_val = 11;
2400 break;
2401 case SAMPLING_RATE_384KHZ:
2402 sample_rate_val = 12;
2403 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2404 default:
2405 sample_rate_val = 6;
2406 break;
2407 }
2408 return sample_rate_val;
2409}
2410
2411static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2412 struct snd_ctl_elem_value *ucontrol)
2413{
2414 int idx = mi2s_get_port_idx(kcontrol);
2415
2416 if (idx < 0)
2417 return idx;
2418
2419 ucontrol->value.enumerated.item[0] =
2420 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2421
2422 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2423 idx, mi2s_rx_cfg[idx].sample_rate,
2424 ucontrol->value.enumerated.item[0]);
2425
2426 return 0;
2427}
2428
2429static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2430 struct snd_ctl_elem_value *ucontrol)
2431{
2432 int idx = mi2s_get_port_idx(kcontrol);
2433
2434 if (idx < 0)
2435 return idx;
2436
2437 mi2s_rx_cfg[idx].sample_rate =
2438 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2439
2440 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2441 idx, mi2s_rx_cfg[idx].sample_rate,
2442 ucontrol->value.enumerated.item[0]);
2443
2444 return 0;
2445}
2446
2447static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2448 struct snd_ctl_elem_value *ucontrol)
2449{
2450 int idx = mi2s_get_port_idx(kcontrol);
2451
2452 if (idx < 0)
2453 return idx;
2454
2455 ucontrol->value.enumerated.item[0] =
2456 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2457
2458 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2459 idx, mi2s_tx_cfg[idx].sample_rate,
2460 ucontrol->value.enumerated.item[0]);
2461
2462 return 0;
2463}
2464
2465static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2466 struct snd_ctl_elem_value *ucontrol)
2467{
2468 int idx = mi2s_get_port_idx(kcontrol);
2469
2470 if (idx < 0)
2471 return idx;
2472
2473 mi2s_tx_cfg[idx].sample_rate =
2474 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2475
2476 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2477 idx, mi2s_tx_cfg[idx].sample_rate,
2478 ucontrol->value.enumerated.item[0]);
2479
2480 return 0;
2481}
2482
2483static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2484 struct snd_ctl_elem_value *ucontrol)
2485{
2486 int idx = mi2s_get_port_idx(kcontrol);
2487
2488 if (idx < 0)
2489 return idx;
2490
2491 ucontrol->value.enumerated.item[0] =
2492 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2493
2494 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2495 idx, mi2s_rx_cfg[idx].bit_format,
2496 ucontrol->value.enumerated.item[0]);
2497
2498 return 0;
2499}
2500
2501static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2502 struct snd_ctl_elem_value *ucontrol)
2503{
2504 int idx = mi2s_get_port_idx(kcontrol);
2505
2506 if (idx < 0)
2507 return idx;
2508
2509 mi2s_rx_cfg[idx].bit_format =
2510 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2511
2512 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2513 idx, mi2s_rx_cfg[idx].bit_format,
2514 ucontrol->value.enumerated.item[0]);
2515
2516 return 0;
2517}
2518
2519static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2520 struct snd_ctl_elem_value *ucontrol)
2521{
2522 int idx = mi2s_get_port_idx(kcontrol);
2523
2524 if (idx < 0)
2525 return idx;
2526
2527 ucontrol->value.enumerated.item[0] =
2528 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2529
2530 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2531 idx, mi2s_tx_cfg[idx].bit_format,
2532 ucontrol->value.enumerated.item[0]);
2533
2534 return 0;
2535}
2536
2537static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2538 struct snd_ctl_elem_value *ucontrol)
2539{
2540 int idx = mi2s_get_port_idx(kcontrol);
2541
2542 if (idx < 0)
2543 return idx;
2544
2545 mi2s_tx_cfg[idx].bit_format =
2546 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2547
2548 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2549 idx, mi2s_tx_cfg[idx].bit_format,
2550 ucontrol->value.enumerated.item[0]);
2551
2552 return 0;
2553}
2554static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2555 struct snd_ctl_elem_value *ucontrol)
2556{
2557 int idx = mi2s_get_port_idx(kcontrol);
2558
2559 if (idx < 0)
2560 return idx;
2561
2562 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2563 idx, mi2s_rx_cfg[idx].channels);
2564 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2565
2566 return 0;
2567}
2568
2569static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2570 struct snd_ctl_elem_value *ucontrol)
2571{
2572 int idx = mi2s_get_port_idx(kcontrol);
2573
2574 if (idx < 0)
2575 return idx;
2576
2577 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2578 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2579 idx, mi2s_rx_cfg[idx].channels);
2580
2581 return 1;
2582}
2583
2584static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2585 struct snd_ctl_elem_value *ucontrol)
2586{
2587 int idx = mi2s_get_port_idx(kcontrol);
2588
2589 if (idx < 0)
2590 return idx;
2591
2592 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2593 idx, mi2s_tx_cfg[idx].channels);
2594 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2595
2596 return 0;
2597}
2598
2599static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2600 struct snd_ctl_elem_value *ucontrol)
2601{
2602 int idx = mi2s_get_port_idx(kcontrol);
2603
2604 if (idx < 0)
2605 return idx;
2606
2607 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2608 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2609 idx, mi2s_tx_cfg[idx].channels);
2610
2611 return 1;
2612}
2613
2614static int msm_get_port_id(int be_id)
2615{
2616 int afe_port_id = 0;
2617
2618 switch (be_id) {
2619 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2620 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2621 break;
2622 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2623 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2624 break;
2625 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2626 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2627 break;
2628 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2629 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2630 break;
2631 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2632 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2633 break;
2634 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2635 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2636 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2637 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2638 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2639 break;
2640 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2641 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2642 break;
2643 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2644 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2645 break;
2646 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2647 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2648 break;
2649 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2650 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2651 break;
2652 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2653 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2654 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]2655 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2656 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2657 break;
2658 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2659 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2660 break;
2661 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2662 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2663 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2664 default:
2665 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2666 afe_port_id = -EINVAL;
2667 }
2668
2669 return afe_port_id;
2670}
2671
2672static u32 get_mi2s_bits_per_sample(u32 bit_format)
2673{
2674 u32 bit_per_sample = 0;
2675
2676 switch (bit_format) {
2677 case SNDRV_PCM_FORMAT_S32_LE:
2678 case SNDRV_PCM_FORMAT_S24_3LE:
2679 case SNDRV_PCM_FORMAT_S24_LE:
2680 bit_per_sample = 32;
2681 break;
2682 case SNDRV_PCM_FORMAT_S16_LE:
2683 default:
2684 bit_per_sample = 16;
2685 break;
2686 }
2687
2688 return bit_per_sample;
2689}
2690
2691static void update_mi2s_clk_val(int dai_id, int stream)
2692{
2693 u32 bit_per_sample = 0;
2694
2695 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2696 bit_per_sample =
2697 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2698 mi2s_clk[dai_id].clk_freq_in_hz =
2699 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2700 } else {
2701 bit_per_sample =
2702 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2703 mi2s_clk[dai_id].clk_freq_in_hz =
2704 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2705 }
2706}
2707
2708static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2709{
2710 int ret = 0;
2711 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2712 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2713 int port_id = 0;
2714 int index = cpu_dai->id;
2715
2716 port_id = msm_get_port_id(rtd->dai_link->id);
2717 if (port_id < 0) {
2718 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2719 ret = port_id;
2720 goto err;
2721 }
2722
2723 if (enable) {
2724 update_mi2s_clk_val(index, substream->stream);
2725 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2726 mi2s_clk[index].clk_freq_in_hz);
2727 }
2728
2729 mi2s_clk[index].enable = enable;
2730 ret = afe_set_lpass_clock_v2(port_id,
2731 &mi2s_clk[index]);
2732 if (ret < 0) {
2733 dev_err(rtd->card->dev,
2734 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2735 __func__, port_id, ret);
2736 goto err;
2737 }
2738
2739err:
2740 return ret;
2741}
2742
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2743static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2744{
2745 int idx = 0;
2746
2747 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2748 sizeof("WSA_CDC_DMA_RX_0")))
2749 idx = WSA_CDC_DMA_RX_0;
2750 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2751 sizeof("WSA_CDC_DMA_RX_0")))
2752 idx = WSA_CDC_DMA_RX_1;
2753 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2754 sizeof("RX_CDC_DMA_RX_0")))
2755 idx = RX_CDC_DMA_RX_0;
2756 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2757 sizeof("RX_CDC_DMA_RX_1")))
2758 idx = RX_CDC_DMA_RX_1;
2759 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2760 sizeof("RX_CDC_DMA_RX_2")))
2761 idx = RX_CDC_DMA_RX_2;
2762 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2763 sizeof("RX_CDC_DMA_RX_3")))
2764 idx = RX_CDC_DMA_RX_3;
2765 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2766 sizeof("RX_CDC_DMA_RX_5")))
2767 idx = RX_CDC_DMA_RX_5;
2768 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2769 sizeof("WSA_CDC_DMA_TX_0")))
2770 idx = WSA_CDC_DMA_TX_0;
2771 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2772 sizeof("WSA_CDC_DMA_TX_1")))
2773 idx = WSA_CDC_DMA_TX_1;
2774 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2775 sizeof("WSA_CDC_DMA_TX_2")))
2776 idx = WSA_CDC_DMA_TX_2;
2777 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2778 sizeof("TX_CDC_DMA_TX_0")))
2779 idx = TX_CDC_DMA_TX_0;
2780 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2781 sizeof("TX_CDC_DMA_TX_3")))
2782 idx = TX_CDC_DMA_TX_3;
2783 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2784 sizeof("TX_CDC_DMA_TX_4")))
2785 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2786 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2787 sizeof("VA_CDC_DMA_TX_0")))
2788 idx = VA_CDC_DMA_TX_0;
2789 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2790 sizeof("VA_CDC_DMA_TX_1")))
2791 idx = VA_CDC_DMA_TX_1;
2792 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2793 sizeof("VA_CDC_DMA_TX_2")))
2794 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2795 else {
2796 pr_err("%s: unsupported channel: %s\n",
2797 __func__, kcontrol->id.name);
2798 return -EINVAL;
2799 }
2800
2801 return idx;
2802}
2803
2804static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2805 struct snd_ctl_elem_value *ucontrol)
2806{
2807 int ch_num = cdc_dma_get_port_idx(kcontrol);
2808
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2809 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2810 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2811 return ch_num;
2812 }
2813
2814 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2815 cdc_dma_rx_cfg[ch_num].channels - 1);
2816 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2817 return 0;
2818}
2819
2820static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2821 struct snd_ctl_elem_value *ucontrol)
2822{
2823 int ch_num = cdc_dma_get_port_idx(kcontrol);
2824
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2825 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2826 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2827 return ch_num;
2828 }
2829
2830 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2831
2832 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2833 cdc_dma_rx_cfg[ch_num].channels);
2834 return 1;
2835}
2836
2837static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2838 struct snd_ctl_elem_value *ucontrol)
2839{
2840 int ch_num = cdc_dma_get_port_idx(kcontrol);
2841
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2842 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2843 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2844 return ch_num;
2845 }
2846
2847 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2848 case SNDRV_PCM_FORMAT_S32_LE:
2849 ucontrol->value.integer.value[0] = 3;
2850 break;
2851 case SNDRV_PCM_FORMAT_S24_3LE:
2852 ucontrol->value.integer.value[0] = 2;
2853 break;
2854 case SNDRV_PCM_FORMAT_S24_LE:
2855 ucontrol->value.integer.value[0] = 1;
2856 break;
2857 case SNDRV_PCM_FORMAT_S16_LE:
2858 default:
2859 ucontrol->value.integer.value[0] = 0;
2860 break;
2861 }
2862
2863 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2864 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2865 ucontrol->value.integer.value[0]);
2866 return 0;
2867}
2868
2869static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2870 struct snd_ctl_elem_value *ucontrol)
2871{
2872 int rc = 0;
2873 int ch_num = cdc_dma_get_port_idx(kcontrol);
2874
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2875 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2876 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2877 return ch_num;
2878 }
2879
2880 switch (ucontrol->value.integer.value[0]) {
2881 case 3:
2882 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2883 break;
2884 case 2:
2885 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2886 break;
2887 case 1:
2888 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2889 break;
2890 case 0:
2891 default:
2892 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2893 break;
2894 }
2895 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2896 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2897 ucontrol->value.integer.value[0]);
2898
2899 return rc;
2900}
2901
2902
2903static int cdc_dma_get_sample_rate_val(int sample_rate)
2904{
2905 int sample_rate_val = 0;
2906
2907 switch (sample_rate) {
2908 case SAMPLING_RATE_8KHZ:
2909 sample_rate_val = 0;
2910 break;
2911 case SAMPLING_RATE_11P025KHZ:
2912 sample_rate_val = 1;
2913 break;
2914 case SAMPLING_RATE_16KHZ:
2915 sample_rate_val = 2;
2916 break;
2917 case SAMPLING_RATE_22P05KHZ:
2918 sample_rate_val = 3;
2919 break;
2920 case SAMPLING_RATE_32KHZ:
2921 sample_rate_val = 4;
2922 break;
2923 case SAMPLING_RATE_44P1KHZ:
2924 sample_rate_val = 5;
2925 break;
2926 case SAMPLING_RATE_48KHZ:
2927 sample_rate_val = 6;
2928 break;
2929 case SAMPLING_RATE_88P2KHZ:
2930 sample_rate_val = 7;
2931 break;
2932 case SAMPLING_RATE_96KHZ:
2933 sample_rate_val = 8;
2934 break;
2935 case SAMPLING_RATE_176P4KHZ:
2936 sample_rate_val = 9;
2937 break;
2938 case SAMPLING_RATE_192KHZ:
2939 sample_rate_val = 10;
2940 break;
2941 case SAMPLING_RATE_352P8KHZ:
2942 sample_rate_val = 11;
2943 break;
2944 case SAMPLING_RATE_384KHZ:
2945 sample_rate_val = 12;
2946 break;
2947 default:
2948 sample_rate_val = 6;
2949 break;
2950 }
2951 return sample_rate_val;
2952}
2953
2954static int cdc_dma_get_sample_rate(int value)
2955{
2956 int sample_rate = 0;
2957
2958 switch (value) {
2959 case 0:
2960 sample_rate = SAMPLING_RATE_8KHZ;
2961 break;
2962 case 1:
2963 sample_rate = SAMPLING_RATE_11P025KHZ;
2964 break;
2965 case 2:
2966 sample_rate = SAMPLING_RATE_16KHZ;
2967 break;
2968 case 3:
2969 sample_rate = SAMPLING_RATE_22P05KHZ;
2970 break;
2971 case 4:
2972 sample_rate = SAMPLING_RATE_32KHZ;
2973 break;
2974 case 5:
2975 sample_rate = SAMPLING_RATE_44P1KHZ;
2976 break;
2977 case 6:
2978 sample_rate = SAMPLING_RATE_48KHZ;
2979 break;
2980 case 7:
2981 sample_rate = SAMPLING_RATE_88P2KHZ;
2982 break;
2983 case 8:
2984 sample_rate = SAMPLING_RATE_96KHZ;
2985 break;
2986 case 9:
2987 sample_rate = SAMPLING_RATE_176P4KHZ;
2988 break;
2989 case 10:
2990 sample_rate = SAMPLING_RATE_192KHZ;
2991 break;
2992 case 11:
2993 sample_rate = SAMPLING_RATE_352P8KHZ;
2994 break;
2995 case 12:
2996 sample_rate = SAMPLING_RATE_384KHZ;
2997 break;
2998 default:
2999 sample_rate = SAMPLING_RATE_48KHZ;
3000 break;
3001 }
3002 return sample_rate;
3003}
3004
3005static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3006 struct snd_ctl_elem_value *ucontrol)
3007{
3008 int ch_num = cdc_dma_get_port_idx(kcontrol);
3009
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]3010 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3011 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3012 return ch_num;
3013 }
3014
3015 ucontrol->value.enumerated.item[0] =
3016 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
3017
3018 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
3019 cdc_dma_rx_cfg[ch_num].sample_rate);
3020 return 0;
3021}
3022
3023static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3024 struct snd_ctl_elem_value *ucontrol)
3025{
3026 int ch_num = cdc_dma_get_port_idx(kcontrol);
3027
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]3028 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3029 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3030 return ch_num;
3031 }
3032
3033 cdc_dma_rx_cfg[ch_num].sample_rate =
3034 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
3035
3036
3037 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
3038 __func__, ucontrol->value.enumerated.item[0],
3039 cdc_dma_rx_cfg[ch_num].sample_rate);
3040 return 0;
3041}
3042
3043static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
3044 struct snd_ctl_elem_value *ucontrol)
3045{
3046 int ch_num = cdc_dma_get_port_idx(kcontrol);
3047
3048 if (ch_num < 0) {
3049 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3050 return ch_num;
3051 }
3052
3053 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3054 cdc_dma_tx_cfg[ch_num].channels);
3055 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
3056 return 0;
3057}
3058
3059static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
3060 struct snd_ctl_elem_value *ucontrol)
3061{
3062 int ch_num = cdc_dma_get_port_idx(kcontrol);
3063
3064 if (ch_num < 0) {
3065 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3066 return ch_num;
3067 }
3068
3069 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
3070
3071 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3072 cdc_dma_tx_cfg[ch_num].channels);
3073 return 1;
3074}
3075
3076static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3077 struct snd_ctl_elem_value *ucontrol)
3078{
3079 int sample_rate_val;
3080 int ch_num = cdc_dma_get_port_idx(kcontrol);
3081
3082 if (ch_num < 0) {
3083 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3084 return ch_num;
3085 }
3086
3087 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
3088 case SAMPLING_RATE_384KHZ:
3089 sample_rate_val = 12;
3090 break;
3091 case SAMPLING_RATE_352P8KHZ:
3092 sample_rate_val = 11;
3093 break;
3094 case SAMPLING_RATE_192KHZ:
3095 sample_rate_val = 10;
3096 break;
3097 case SAMPLING_RATE_176P4KHZ:
3098 sample_rate_val = 9;
3099 break;
3100 case SAMPLING_RATE_96KHZ:
3101 sample_rate_val = 8;
3102 break;
3103 case SAMPLING_RATE_88P2KHZ:
3104 sample_rate_val = 7;
3105 break;
3106 case SAMPLING_RATE_48KHZ:
3107 sample_rate_val = 6;
3108 break;
3109 case SAMPLING_RATE_44P1KHZ:
3110 sample_rate_val = 5;
3111 break;
3112 case SAMPLING_RATE_32KHZ:
3113 sample_rate_val = 4;
3114 break;
3115 case SAMPLING_RATE_22P05KHZ:
3116 sample_rate_val = 3;
3117 break;
3118 case SAMPLING_RATE_16KHZ:
3119 sample_rate_val = 2;
3120 break;
3121 case SAMPLING_RATE_11P025KHZ:
3122 sample_rate_val = 1;
3123 break;
3124 case SAMPLING_RATE_8KHZ:
3125 sample_rate_val = 0;
3126 break;
3127 default:
3128 sample_rate_val = 6;
3129 break;
3130 }
3131
3132 ucontrol->value.integer.value[0] = sample_rate_val;
3133 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
3134 cdc_dma_tx_cfg[ch_num].sample_rate);
3135 return 0;
3136}
3137
3138static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3139 struct snd_ctl_elem_value *ucontrol)
3140{
3141 int ch_num = cdc_dma_get_port_idx(kcontrol);
3142
3143 if (ch_num < 0) {
3144 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3145 return ch_num;
3146 }
3147
3148 switch (ucontrol->value.integer.value[0]) {
3149 case 12:
3150 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
3151 break;
3152 case 11:
3153 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
3154 break;
3155 case 10:
3156 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
3157 break;
3158 case 9:
3159 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
3160 break;
3161 case 8:
3162 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
3163 break;
3164 case 7:
3165 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
3166 break;
3167 case 6:
3168 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3169 break;
3170 case 5:
3171 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
3172 break;
3173 case 4:
3174 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
3175 break;
3176 case 3:
3177 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
3178 break;
3179 case 2:
3180 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
3181 break;
3182 case 1:
3183 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
3184 break;
3185 case 0:
3186 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
3187 break;
3188 default:
3189 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3190 break;
3191 }
3192
3193 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
3194 __func__, ucontrol->value.integer.value[0],
3195 cdc_dma_tx_cfg[ch_num].sample_rate);
3196 return 0;
3197}
3198
3199static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
3200 struct snd_ctl_elem_value *ucontrol)
3201{
3202 int ch_num = cdc_dma_get_port_idx(kcontrol);
3203
3204 if (ch_num < 0) {
3205 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3206 return ch_num;
3207 }
3208
3209 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
3210 case SNDRV_PCM_FORMAT_S32_LE:
3211 ucontrol->value.integer.value[0] = 3;
3212 break;
3213 case SNDRV_PCM_FORMAT_S24_3LE:
3214 ucontrol->value.integer.value[0] = 2;
3215 break;
3216 case SNDRV_PCM_FORMAT_S24_LE:
3217 ucontrol->value.integer.value[0] = 1;
3218 break;
3219 case SNDRV_PCM_FORMAT_S16_LE:
3220 default:
3221 ucontrol->value.integer.value[0] = 0;
3222 break;
3223 }
3224
3225 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3226 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3227 ucontrol->value.integer.value[0]);
3228 return 0;
3229}
3230
3231static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
3232 struct snd_ctl_elem_value *ucontrol)
3233{
3234 int rc = 0;
3235 int ch_num = cdc_dma_get_port_idx(kcontrol);
3236
3237 if (ch_num < 0) {
3238 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3239 return ch_num;
3240 }
3241
3242 switch (ucontrol->value.integer.value[0]) {
3243 case 3:
3244 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3245 break;
3246 case 2:
3247 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3248 break;
3249 case 1:
3250 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3251 break;
3252 case 0:
3253 default:
3254 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3255 break;
3256 }
3257 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3258 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3259 ucontrol->value.integer.value[0]);
3260
3261 return rc;
3262}
3263
3264static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3265{
3266 int idx = 0;
3267
3268 switch (be_id) {
3269 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3270 idx = WSA_CDC_DMA_RX_0;
3271 break;
3272 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3273 idx = WSA_CDC_DMA_TX_0;
3274 break;
3275 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3276 idx = WSA_CDC_DMA_RX_1;
3277 break;
3278 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3279 idx = WSA_CDC_DMA_TX_1;
3280 break;
3281 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3282 idx = WSA_CDC_DMA_TX_2;
3283 break;
3284 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3285 idx = RX_CDC_DMA_RX_0;
3286 break;
3287 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3288 idx = RX_CDC_DMA_RX_1;
3289 break;
3290 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3291 idx = RX_CDC_DMA_RX_2;
3292 break;
3293 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3294 idx = RX_CDC_DMA_RX_3;
3295 break;
3296 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3297 idx = RX_CDC_DMA_RX_5;
3298 break;
3299 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3300 idx = TX_CDC_DMA_TX_0;
3301 break;
3302 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3303 idx = TX_CDC_DMA_TX_3;
3304 break;
3305 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3306 idx = TX_CDC_DMA_TX_4;
3307 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3308 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3309 idx = VA_CDC_DMA_TX_0;
3310 break;
3311 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3312 idx = VA_CDC_DMA_TX_1;
3313 break;
3314 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3315 idx = VA_CDC_DMA_TX_2;
3316 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3317 default:
3318 idx = RX_CDC_DMA_RX_0;
3319 break;
3320 }
3321
3322 return idx;
3323}
3324
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3325static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3326 struct snd_ctl_elem_value *ucontrol)
3327{
3328 /*
3329 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3330 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3331 * value.
3332 */
3333 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3334 case SAMPLING_RATE_96KHZ:
3335 ucontrol->value.integer.value[0] = 5;
3336 break;
3337 case SAMPLING_RATE_88P2KHZ:
3338 ucontrol->value.integer.value[0] = 4;
3339 break;
3340 case SAMPLING_RATE_48KHZ:
3341 ucontrol->value.integer.value[0] = 3;
3342 break;
3343 case SAMPLING_RATE_44P1KHZ:
3344 ucontrol->value.integer.value[0] = 2;
3345 break;
3346 case SAMPLING_RATE_16KHZ:
3347 ucontrol->value.integer.value[0] = 1;
3348 break;
3349 case SAMPLING_RATE_8KHZ:
3350 default:
3351 ucontrol->value.integer.value[0] = 0;
3352 break;
3353 }
3354 pr_debug("%s: sample rate = %d\n", __func__,
3355 slim_rx_cfg[SLIM_RX_7].sample_rate);
3356
3357 return 0;
3358}
3359
3360static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3361 struct snd_ctl_elem_value *ucontrol)
3362{
3363 switch (ucontrol->value.integer.value[0]) {
3364 case 1:
3365 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3366 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3367 break;
3368 case 2:
3369 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3370 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3371 break;
3372 case 3:
3373 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3374 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3375 break;
3376 case 4:
3377 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3378 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3379 break;
3380 case 5:
3381 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3382 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3383 break;
3384 case 0:
3385 default:
3386 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3387 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3388 break;
3389 }
3390 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3391 __func__,
3392 slim_rx_cfg[SLIM_RX_7].sample_rate,
3393 slim_tx_cfg[SLIM_TX_7].sample_rate,
3394 ucontrol->value.enumerated.item[0]);
3395
3396 return 0;
3397}
3398
3399static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3400 struct snd_ctl_elem_value *ucontrol)
3401{
3402 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3403 case SAMPLING_RATE_96KHZ:
3404 ucontrol->value.integer.value[0] = 5;
3405 break;
3406 case SAMPLING_RATE_88P2KHZ:
3407 ucontrol->value.integer.value[0] = 4;
3408 break;
3409 case SAMPLING_RATE_48KHZ:
3410 ucontrol->value.integer.value[0] = 3;
3411 break;
3412 case SAMPLING_RATE_44P1KHZ:
3413 ucontrol->value.integer.value[0] = 2;
3414 break;
3415 case SAMPLING_RATE_16KHZ:
3416 ucontrol->value.integer.value[0] = 1;
3417 break;
3418 case SAMPLING_RATE_8KHZ:
3419 default:
3420 ucontrol->value.integer.value[0] = 0;
3421 break;
3422 }
3423 pr_debug("%s: sample rate rx = %d\n", __func__,
3424 slim_rx_cfg[SLIM_RX_7].sample_rate);
3425
3426 return 0;
3427}
3428
3429static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3430 struct snd_ctl_elem_value *ucontrol)
3431{
3432 switch (ucontrol->value.integer.value[0]) {
3433 case 1:
3434 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3435 break;
3436 case 2:
3437 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3438 break;
3439 case 3:
3440 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3441 break;
3442 case 4:
3443 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3444 break;
3445 case 5:
3446 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3447 break;
3448 case 0:
3449 default:
3450 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3451 break;
3452 }
3453 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3454 __func__,
3455 slim_rx_cfg[SLIM_RX_7].sample_rate,
3456 ucontrol->value.enumerated.item[0]);
3457
3458 return 0;
3459}
3460
3461static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3462 struct snd_ctl_elem_value *ucontrol)
3463{
3464 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3465 case SAMPLING_RATE_96KHZ:
3466 ucontrol->value.integer.value[0] = 5;
3467 break;
3468 case SAMPLING_RATE_88P2KHZ:
3469 ucontrol->value.integer.value[0] = 4;
3470 break;
3471 case SAMPLING_RATE_48KHZ:
3472 ucontrol->value.integer.value[0] = 3;
3473 break;
3474 case SAMPLING_RATE_44P1KHZ:
3475 ucontrol->value.integer.value[0] = 2;
3476 break;
3477 case SAMPLING_RATE_16KHZ:
3478 ucontrol->value.integer.value[0] = 1;
3479 break;
3480 case SAMPLING_RATE_8KHZ:
3481 default:
3482 ucontrol->value.integer.value[0] = 0;
3483 break;
3484 }
3485 pr_debug("%s: sample rate tx = %d\n", __func__,
3486 slim_tx_cfg[SLIM_TX_7].sample_rate);
3487
3488 return 0;
3489}
3490
3491static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3492 struct snd_ctl_elem_value *ucontrol)
3493{
3494 switch (ucontrol->value.integer.value[0]) {
3495 case 1:
3496 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3497 break;
3498 case 2:
3499 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3500 break;
3501 case 3:
3502 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3503 break;
3504 case 4:
3505 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3506 break;
3507 case 5:
3508 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3509 break;
3510 case 0:
3511 default:
3512 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3513 break;
3514 }
3515 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3516 __func__,
3517 slim_tx_cfg[SLIM_TX_7].sample_rate,
3518 ucontrol->value.enumerated.item[0]);
3519
3520 return 0;
3521}
3522
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3523static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3524 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3525 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3526 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3527 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3528 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3529 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3530 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3531 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3532 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3533 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3534 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3535 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3536 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3537 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3538 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3539 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3540 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3541 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3542 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3543 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3544 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3545 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3546 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3547 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3548 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3549 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3550 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3551 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3552 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3553 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3554 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3555 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3556 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3557 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3558 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3559 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3560 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3561 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3562 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3563 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3564 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3565 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3566 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3567 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3568 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3569 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3570 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3571 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3572 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3573 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3574 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3575 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3576 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3577 wsa_cdc_dma_rx_0_sample_rate,
3578 cdc_dma_rx_sample_rate_get,
3579 cdc_dma_rx_sample_rate_put),
3580 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3581 wsa_cdc_dma_rx_1_sample_rate,
3582 cdc_dma_rx_sample_rate_get,
3583 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3584 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3585 wsa_cdc_dma_tx_0_sample_rate,
3586 cdc_dma_tx_sample_rate_get,
3587 cdc_dma_tx_sample_rate_put),
3588 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3589 wsa_cdc_dma_tx_1_sample_rate,
3590 cdc_dma_tx_sample_rate_get,
3591 cdc_dma_tx_sample_rate_put),
3592 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3593 wsa_cdc_dma_tx_2_sample_rate,
3594 cdc_dma_tx_sample_rate_get,
3595 cdc_dma_tx_sample_rate_put),
3596 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3597 tx_cdc_dma_tx_0_sample_rate,
3598 cdc_dma_tx_sample_rate_get,
3599 cdc_dma_tx_sample_rate_put),
3600 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3601 tx_cdc_dma_tx_3_sample_rate,
3602 cdc_dma_tx_sample_rate_get,
3603 cdc_dma_tx_sample_rate_put),
3604 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3605 tx_cdc_dma_tx_4_sample_rate,
3606 cdc_dma_tx_sample_rate_get,
3607 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3608 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3609 va_cdc_dma_tx_0_sample_rate,
3610 cdc_dma_tx_sample_rate_get,
3611 cdc_dma_tx_sample_rate_put),
3612 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3613 va_cdc_dma_tx_1_sample_rate,
3614 cdc_dma_tx_sample_rate_get,
3615 cdc_dma_tx_sample_rate_put),
3616 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3617 va_cdc_dma_tx_2_sample_rate,
3618 cdc_dma_tx_sample_rate_get,
3619 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3620};
3621
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]3622static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3623 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3624 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3625 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3626 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3627 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3628 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3629 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3630 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3631 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3632 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3633 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3634 rx_cdc80_dma_rx_0_sample_rate,
3635 cdc_dma_rx_sample_rate_get,
3636 cdc_dma_rx_sample_rate_put),
3637 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3638 rx_cdc80_dma_rx_1_sample_rate,
3639 cdc_dma_rx_sample_rate_get,
3640 cdc_dma_rx_sample_rate_put),
3641 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3642 rx_cdc80_dma_rx_2_sample_rate,
3643 cdc_dma_rx_sample_rate_get,
3644 cdc_dma_rx_sample_rate_put),
3645 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3646 rx_cdc80_dma_rx_3_sample_rate,
3647 cdc_dma_rx_sample_rate_get,
3648 cdc_dma_rx_sample_rate_put),
3649 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3650 rx_cdc80_dma_rx_5_sample_rate,
3651 cdc_dma_rx_sample_rate_get,
3652 cdc_dma_rx_sample_rate_put),
3653};
3654
3655static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3656 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3657 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3658 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3659 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3660 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3661 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3662 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3663 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3664 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3665 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3666 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3667 rx_cdc85_dma_rx_0_sample_rate,
3668 cdc_dma_rx_sample_rate_get,
3669 cdc_dma_rx_sample_rate_put),
3670 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3671 rx_cdc85_dma_rx_1_sample_rate,
3672 cdc_dma_rx_sample_rate_get,
3673 cdc_dma_rx_sample_rate_put),
3674 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3675 rx_cdc85_dma_rx_2_sample_rate,
3676 cdc_dma_rx_sample_rate_get,
3677 cdc_dma_rx_sample_rate_put),
3678 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3679 rx_cdc85_dma_rx_3_sample_rate,
3680 cdc_dma_rx_sample_rate_get,
3681 cdc_dma_rx_sample_rate_put),
3682 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3683 rx_cdc85_dma_rx_5_sample_rate,
3684 cdc_dma_rx_sample_rate_get,
3685 cdc_dma_rx_sample_rate_put),
3686};
3687
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3688static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3689 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3690 usb_audio_rx_sample_rate_get,
3691 usb_audio_rx_sample_rate_put),
3692 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3693 usb_audio_tx_sample_rate_get,
3694 usb_audio_tx_sample_rate_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]3695 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3696 usb_audio_rx_format_get, usb_audio_rx_format_put),
3697 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3698 usb_audio_tx_format_get, usb_audio_tx_format_put),
3699 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3700 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3701 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3702 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3703 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3704 proxy_rx_ch_get, proxy_rx_ch_put),
3705 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3706 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3707 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3708 ext_disp_rx_format_get, ext_disp_rx_format_put),
3709 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3710 ext_disp_rx_sample_rate_get,
3711 ext_disp_rx_sample_rate_put),
3712 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3713 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3714 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3715 ext_disp_rx_format_get, ext_disp_rx_format_put),
3716 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3717 ext_disp_rx_sample_rate_get,
3718 ext_disp_rx_sample_rate_put),
3719 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3720 msm_bt_sample_rate_get,
3721 msm_bt_sample_rate_put),
3722 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3723 msm_bt_sample_rate_rx_get,
3724 msm_bt_sample_rate_rx_put),
3725 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3726 msm_bt_sample_rate_tx_get,
3727 msm_bt_sample_rate_tx_put),
3728 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3729 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3730 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3731 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3732};
3733
3734static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3735 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3736 tdm_rx_sample_rate_get,
3737 tdm_rx_sample_rate_put),
3738 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3739 tdm_rx_sample_rate_get,
3740 tdm_rx_sample_rate_put),
3741 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3742 tdm_rx_sample_rate_get,
3743 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3744 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3745 tdm_rx_sample_rate_get,
3746 tdm_rx_sample_rate_put),
3747 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3748 tdm_rx_sample_rate_get,
3749 tdm_rx_sample_rate_put),
3750 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3751 tdm_rx_sample_rate_get,
3752 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3753 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3754 tdm_tx_sample_rate_get,
3755 tdm_tx_sample_rate_put),
3756 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3757 tdm_tx_sample_rate_get,
3758 tdm_tx_sample_rate_put),
3759 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3760 tdm_tx_sample_rate_get,
3761 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3762 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3763 tdm_tx_sample_rate_get,
3764 tdm_tx_sample_rate_put),
3765 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3766 tdm_tx_sample_rate_get,
3767 tdm_tx_sample_rate_put),
3768 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3769 tdm_tx_sample_rate_get,
3770 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3771 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3772 tdm_rx_format_get,
3773 tdm_rx_format_put),
3774 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3775 tdm_rx_format_get,
3776 tdm_rx_format_put),
3777 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3778 tdm_rx_format_get,
3779 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3780 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3781 tdm_rx_format_get,
3782 tdm_rx_format_put),
3783 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3784 tdm_rx_format_get,
3785 tdm_rx_format_put),
3786 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3787 tdm_rx_format_get,
3788 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3789 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3790 tdm_tx_format_get,
3791 tdm_tx_format_put),
3792 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3793 tdm_tx_format_get,
3794 tdm_tx_format_put),
3795 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3796 tdm_tx_format_get,
3797 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3798 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3799 tdm_tx_format_get,
3800 tdm_tx_format_put),
3801 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3802 tdm_tx_format_get,
3803 tdm_tx_format_put),
3804 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3805 tdm_tx_format_get,
3806 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3807 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3808 tdm_rx_ch_get,
3809 tdm_rx_ch_put),
3810 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3811 tdm_rx_ch_get,
3812 tdm_rx_ch_put),
3813 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3814 tdm_rx_ch_get,
3815 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3816 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3817 tdm_rx_ch_get,
3818 tdm_rx_ch_put),
3819 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3820 tdm_rx_ch_get,
3821 tdm_rx_ch_put),
3822 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3823 tdm_rx_ch_get,
3824 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3825 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3826 tdm_tx_ch_get,
3827 tdm_tx_ch_put),
3828 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3829 tdm_tx_ch_get,
3830 tdm_tx_ch_put),
3831 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3832 tdm_tx_ch_get,
3833 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3834 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3835 tdm_tx_ch_get,
3836 tdm_tx_ch_put),
3837 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3838 tdm_tx_ch_get,
3839 tdm_tx_ch_put),
3840 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3841 tdm_tx_ch_get,
3842 tdm_tx_ch_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]3843 SOC_SINGLE_MULTI_EXT("TDM Slot Map", SND_SOC_NOPM, 0, 255, 0,
3844 TDM_MAX_SLOTS + MAX_PATH, NULL, tdm_slot_map_put),
3845};
3846
3847static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
3848 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3849 aux_pcm_rx_sample_rate_get,
3850 aux_pcm_rx_sample_rate_put),
3851 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3852 aux_pcm_rx_sample_rate_get,
3853 aux_pcm_rx_sample_rate_put),
3854 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3855 aux_pcm_rx_sample_rate_get,
3856 aux_pcm_rx_sample_rate_put),
3857 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3858 aux_pcm_rx_sample_rate_get,
3859 aux_pcm_rx_sample_rate_put),
3860 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3861 aux_pcm_rx_sample_rate_get,
3862 aux_pcm_rx_sample_rate_put),
3863 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3864 aux_pcm_rx_sample_rate_get,
3865 aux_pcm_rx_sample_rate_put),
3866 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3867 aux_pcm_tx_sample_rate_get,
3868 aux_pcm_tx_sample_rate_put),
3869 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3870 aux_pcm_tx_sample_rate_get,
3871 aux_pcm_tx_sample_rate_put),
3872 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3873 aux_pcm_tx_sample_rate_get,
3874 aux_pcm_tx_sample_rate_put),
3875 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3876 aux_pcm_tx_sample_rate_get,
3877 aux_pcm_tx_sample_rate_put),
3878 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3879 aux_pcm_tx_sample_rate_get,
3880 aux_pcm_tx_sample_rate_put),
3881 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3882 aux_pcm_tx_sample_rate_get,
3883 aux_pcm_tx_sample_rate_put),
3884 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3885 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3886 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3887 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3888 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3889 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3890 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3891 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3892 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3893 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3894 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3895 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3896 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3897 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3898 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3899 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3900 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3901 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3902 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3903 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3904 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3905 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3906 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3907 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3908};
3909
3910static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
3911 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3912 mi2s_rx_sample_rate_get,
3913 mi2s_rx_sample_rate_put),
3914 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3915 mi2s_rx_sample_rate_get,
3916 mi2s_rx_sample_rate_put),
3917 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3918 mi2s_rx_sample_rate_get,
3919 mi2s_rx_sample_rate_put),
3920 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3921 mi2s_rx_sample_rate_get,
3922 mi2s_rx_sample_rate_put),
3923 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3924 mi2s_rx_sample_rate_get,
3925 mi2s_rx_sample_rate_put),
3926 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3927 mi2s_rx_sample_rate_get,
3928 mi2s_rx_sample_rate_put),
3929 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3930 mi2s_tx_sample_rate_get,
3931 mi2s_tx_sample_rate_put),
3932 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3933 mi2s_tx_sample_rate_get,
3934 mi2s_tx_sample_rate_put),
3935 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3936 mi2s_tx_sample_rate_get,
3937 mi2s_tx_sample_rate_put),
3938 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3939 mi2s_tx_sample_rate_get,
3940 mi2s_tx_sample_rate_put),
3941 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3942 mi2s_tx_sample_rate_get,
3943 mi2s_tx_sample_rate_put),
3944 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
3945 mi2s_tx_sample_rate_get,
3946 mi2s_tx_sample_rate_put),
3947 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3948 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3949 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3950 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3951 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3952 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3953 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3954 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3955 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3956 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3957 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
3958 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3959 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3960 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3961 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3962 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3963 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3964 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3965 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3966 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3967 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3968 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3969 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
3970 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3971 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3972 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3973 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3974 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3975 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3976 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3977 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3978 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3979 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3980 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3981 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
3982 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3983 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3984 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3985 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3986 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3987 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3988 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3989 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3990 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3991 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3992 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3993 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
3994 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3995};
3996
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]3997static const struct snd_kcontrol_new msm_snd_controls[] = {
3998 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3999 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4000 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
4001 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4002 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
4003 aux_pcm_rx_sample_rate_get,
4004 aux_pcm_rx_sample_rate_put),
4005 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
4006 aux_pcm_tx_sample_rate_get,
4007 aux_pcm_tx_sample_rate_put),
4008};
4009
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4010static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4011{
4012 int idx;
4013
4014 switch (be_id) {
4015 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4016 idx = EXT_DISP_RX_IDX_DP;
4017 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4018 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
4019 idx = EXT_DISP_RX_IDX_DP1;
4020 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4021 default:
4022 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4023 idx = -EINVAL;
4024 break;
4025 }
4026
4027 return idx;
4028}
4029
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4030static int kona_send_island_va_config(int32_t be_id)
4031{
4032 int rc = 0;
4033 int port_id = 0xFFFF;
4034
4035 port_id = msm_get_port_id(be_id);
4036 if (port_id < 0) {
4037 pr_err("%s: Invalid island interface, be_id: %d\n",
4038 __func__, be_id);
4039 rc = -EINVAL;
4040 } else {
4041 /*
4042 * send island mode config
4043 * This should be the first configuration
4044 */
4045 rc = afe_send_port_island_mode(port_id);
4046 if (rc)
4047 pr_err("%s: afe send island mode failed %d\n",
4048 __func__, rc);
4049 }
4050
4051 return rc;
4052}
4053
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4054static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4055 struct snd_pcm_hw_params *params)
4056{
4057 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4058 struct snd_interval *rate = hw_param_interval(params,
4059 SNDRV_PCM_HW_PARAM_RATE);
4060 struct snd_interval *channels = hw_param_interval(params,
4061 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4062 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4063
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4064 pr_debug("%s: dai_id= %d, format = %d, rate = %d\n",
4065 __func__, dai_link->id, params_format(params),
4066 params_rate(params));
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4067
4068 switch (dai_link->id) {
4069 case MSM_BACKEND_DAI_USB_RX:
4070 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4071 usb_rx_cfg.bit_format);
4072 rate->min = rate->max = usb_rx_cfg.sample_rate;
4073 channels->min = channels->max = usb_rx_cfg.channels;
4074 break;
4075
4076 case MSM_BACKEND_DAI_USB_TX:
4077 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4078 usb_tx_cfg.bit_format);
4079 rate->min = rate->max = usb_tx_cfg.sample_rate;
4080 channels->min = channels->max = usb_tx_cfg.channels;
4081 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4082
4083 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4084 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4085 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4086 if (idx < 0) {
4087 pr_err("%s: Incorrect ext disp idx %d\n",
4088 __func__, idx);
4089 rc = idx;
4090 goto done;
4091 }
4092
4093 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4094 ext_disp_rx_cfg[idx].bit_format);
4095 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4096 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4097 break;
4098
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4099 case MSM_BACKEND_DAI_AFE_PCM_RX:
4100 channels->min = channels->max = proxy_rx_cfg.channels;
4101 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4102 break;
4103
4104 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4105 channels->min = channels->max =
4106 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4107 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4108 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4109 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4110 break;
4111
4112 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4113 channels->min = channels->max =
4114 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4115 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4116 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4117 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4118 break;
4119
4120 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4121 channels->min = channels->max =
4122 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4123 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4124 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4125 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4126 break;
4127
4128 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4129 channels->min = channels->max =
4130 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4131 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4132 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4133 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4134 break;
4135
4136 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4137 channels->min = channels->max =
4138 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4139 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4140 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4141 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4142 break;
4143
4144 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4145 channels->min = channels->max =
4146 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4147 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4148 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4149 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4150 break;
4151
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4152 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4153 channels->min = channels->max =
4154 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4155 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4156 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4157 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4158 break;
4159
4160 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4161 channels->min = channels->max =
4162 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4163 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4164 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4165 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4166 break;
4167
4168 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4169 channels->min = channels->max =
4170 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4171 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4172 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4173 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4174 break;
4175
4176 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4177 channels->min = channels->max =
4178 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4179 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4180 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4181 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4182 break;
4183
4184 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
4185 channels->min = channels->max =
4186 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4187 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4188 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
4189 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
4190 break;
4191
4192 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
4193 channels->min = channels->max =
4194 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4195 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4196 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
4197 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
4198 break;
4199
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4200 case MSM_BACKEND_DAI_AUXPCM_RX:
4201 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4202 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4203 rate->min = rate->max =
4204 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4205 channels->min = channels->max =
4206 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4207 break;
4208
4209 case MSM_BACKEND_DAI_AUXPCM_TX:
4210 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4211 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4212 rate->min = rate->max =
4213 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4214 channels->min = channels->max =
4215 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4216 break;
4217
4218 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4219 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4220 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4221 rate->min = rate->max =
4222 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4223 channels->min = channels->max =
4224 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4225 break;
4226
4227 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4228 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4229 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4230 rate->min = rate->max =
4231 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4232 channels->min = channels->max =
4233 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4234 break;
4235
4236 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4237 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4238 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4239 rate->min = rate->max =
4240 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4241 channels->min = channels->max =
4242 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4243 break;
4244
4245 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4246 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4247 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4248 rate->min = rate->max =
4249 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4250 channels->min = channels->max =
4251 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4252 break;
4253
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4254 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4255 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4256 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4257 rate->min = rate->max =
4258 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4259 channels->min = channels->max =
4260 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4261 break;
4262
4263 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4264 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4265 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4266 rate->min = rate->max =
4267 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4268 channels->min = channels->max =
4269 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4270 break;
4271
4272 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4273 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4274 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4275 rate->min = rate->max =
4276 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4277 channels->min = channels->max =
4278 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4279 break;
4280
4281 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4282 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4283 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4284 rate->min = rate->max =
4285 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4286 channels->min = channels->max =
4287 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4288 break;
4289
4290 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4291 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4292 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4293 rate->min = rate->max =
4294 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4295 channels->min = channels->max =
4296 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4297 break;
4298
4299 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4300 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4301 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4302 rate->min = rate->max =
4303 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4304 channels->min = channels->max =
4305 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4306 break;
4307
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4308 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4309 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4310 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4311 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4312 channels->min = channels->max =
4313 mi2s_rx_cfg[PRIM_MI2S].channels;
4314 break;
4315
4316 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4317 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4318 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4319 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4320 channels->min = channels->max =
4321 mi2s_tx_cfg[PRIM_MI2S].channels;
4322 break;
4323
4324 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4325 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4326 mi2s_rx_cfg[SEC_MI2S].bit_format);
4327 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4328 channels->min = channels->max =
4329 mi2s_rx_cfg[SEC_MI2S].channels;
4330 break;
4331
4332 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4333 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4334 mi2s_tx_cfg[SEC_MI2S].bit_format);
4335 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4336 channels->min = channels->max =
4337 mi2s_tx_cfg[SEC_MI2S].channels;
4338 break;
4339
4340 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4341 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4342 mi2s_rx_cfg[TERT_MI2S].bit_format);
4343 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4344 channels->min = channels->max =
4345 mi2s_rx_cfg[TERT_MI2S].channels;
4346 break;
4347
4348 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4349 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4350 mi2s_tx_cfg[TERT_MI2S].bit_format);
4351 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4352 channels->min = channels->max =
4353 mi2s_tx_cfg[TERT_MI2S].channels;
4354 break;
4355
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4356 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4357 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4358 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4359 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4360 channels->min = channels->max =
4361 mi2s_rx_cfg[QUAT_MI2S].channels;
4362 break;
4363
4364 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4365 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4366 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4367 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4368 channels->min = channels->max =
4369 mi2s_tx_cfg[QUAT_MI2S].channels;
4370 break;
4371
4372 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4373 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4374 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4375 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4376 channels->min = channels->max =
4377 mi2s_rx_cfg[QUIN_MI2S].channels;
4378 break;
4379
4380 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4381 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4382 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4383 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4384 channels->min = channels->max =
4385 mi2s_tx_cfg[QUIN_MI2S].channels;
4386 break;
4387
4388 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4389 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4390 mi2s_rx_cfg[SEN_MI2S].bit_format);
4391 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4392 channels->min = channels->max =
4393 mi2s_rx_cfg[SEN_MI2S].channels;
4394 break;
4395
4396 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4397 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4398 mi2s_tx_cfg[SEN_MI2S].bit_format);
4399 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4400 channels->min = channels->max =
4401 mi2s_tx_cfg[SEN_MI2S].channels;
4402 break;
4403
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4404 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4405 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4406 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4407 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4408 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4409 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4410 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4411 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4412 cdc_dma_rx_cfg[idx].bit_format);
4413 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4414 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4415 break;
4416
4417 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4418 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4419 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4420 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4421 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4422 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4423 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4424 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4425 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4426 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4427 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4428 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4429 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4430 break;
4431
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4432 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4433 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4434 SNDRV_PCM_FORMAT_S32_LE);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4435 rate->min = rate->max = SAMPLING_RATE_8KHZ;
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4436 channels->min = channels->max = msm_vi_feed_tx_ch;
4437 break;
4438
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4439 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4440 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4441 slim_rx_cfg[SLIM_RX_7].bit_format);
4442 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4443 channels->min = channels->max =
4444 slim_rx_cfg[SLIM_RX_7].channels;
4445 break;
4446
4447 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlad7df1232019-11-29 19:39:17 +0530[diff] [blame]4448 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4449 slim_tx_cfg[SLIM_TX_7].bit_format);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4450 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4451 channels->min = channels->max =
4452 slim_tx_cfg[SLIM_TX_7].channels;
4453 break;
4454
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4455 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4456 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4457 channels->min = channels->max =
4458 slim_tx_cfg[SLIM_TX_8].channels;
4459 break;
4460
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4461 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4462 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4463 afe_loopback_tx_cfg[idx].bit_format);
4464 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4465 channels->min = channels->max =
4466 afe_loopback_tx_cfg[idx].channels;
4467 break;
4468
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4469 default:
4470 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4471 break;
4472 }
4473
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4474done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4475 return rc;
4476}
4477
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]4478static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4479{
4480 struct snd_soc_card *card = component->card;
4481 struct msm_asoc_mach_data *pdata =
4482 snd_soc_card_get_drvdata(card);
4483
4484 if (!pdata->fsa_handle)
4485 return false;
4486
4487 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4488}
4489
4490static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4491{
4492 int value = 0;
4493 bool ret = false;
4494 struct snd_soc_card *card;
4495 struct msm_asoc_mach_data *pdata;
4496
4497 if (!component) {
4498 pr_err("%s component is NULL\n", __func__);
4499 return false;
4500 }
4501 card = component->card;
4502 pdata = snd_soc_card_get_drvdata(card);
4503
4504 if (!pdata)
4505 return false;
4506
4507 if (wcd_mbhc_cfg.enable_usbc_analog)
4508 return msm_usbc_swap_gnd_mic(component, active);
4509
4510 /* if usbc is not defined, swap using us_euro_gpio_p */
4511 if (pdata->us_euro_gpio_p) {
4512 value = msm_cdc_pinctrl_get_state(
4513 pdata->us_euro_gpio_p);
4514 if (value)
4515 msm_cdc_pinctrl_select_sleep_state(
4516 pdata->us_euro_gpio_p);
4517 else
4518 msm_cdc_pinctrl_select_active_state(
4519 pdata->us_euro_gpio_p);
4520 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4521 __func__, value, !value);
4522 ret = true;
4523 }
4524
4525 return ret;
4526}
4527
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4528static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4529 struct snd_pcm_hw_params *params)
4530{
4531 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4532 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4533 int ret = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4534 int slot_width = TDM_SLOT_WIDTH_BITS;
4535 int channels, slots = TDM_MAX_SLOTS;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4536 unsigned int slot_mask, rate, clk_freq;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4537 unsigned int *slot_offset;
4538 struct tdm_dev_config *config;
4539 unsigned int path_dir = 0, interface = 0, channel_interface = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4540
4541 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4542
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4543 if (cpu_dai->id < AFE_PORT_ID_TDM_PORT_RANGE_START) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4544 pr_err("%s: dai id 0x%x not supported\n",
4545 __func__, cpu_dai->id);
4546 return -EINVAL;
4547 }
4548
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4549 /* RX or TX */
4550 path_dir = cpu_dai->id % MAX_PATH;
4551
4552 /* PRI, SEC, TERT, QUAT, QUIN, ... */
4553 interface = (cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START)
4554 / (MAX_PATH * TDM_PORT_MAX);
4555
4556 /* 0, 1, 2, .. 7 */
4557 channel_interface =
4558 ((cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START) / MAX_PATH)
4559 % TDM_PORT_MAX;
4560
4561 pr_debug("%s: path dir: %u, interface %u, channel interface %u\n",
4562 __func__, path_dir, interface, channel_interface);
4563
4564 config = ((struct tdm_dev_config *) tdm_cfg[interface]) +
4565 (path_dir * TDM_PORT_MAX) + channel_interface;
4566 slot_offset = config->tdm_slot_offset;
4567
4568 if (path_dir)
4569 channels = tdm_tx_cfg[interface][channel_interface].channels;
4570 else
4571 channels = tdm_rx_cfg[interface][channel_interface].channels;
4572
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4573 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4574 /*2 slot config - bits 0 and 1 set for the first two slots */
4575 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4576
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4577 pr_debug("%s: tdm rx slot_width %d slots %d slot_mask %x\n",
4578 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4579
4580 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4581 slots, slot_width);
4582 if (ret < 0) {
4583 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4584 __func__, ret);
4585 goto end;
4586 }
4587
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4588 pr_debug("%s: tdm rx channels: %d\n", __func__, channels);
4589
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4590 ret = snd_soc_dai_set_channel_map(cpu_dai,
4591 0, NULL, channels, slot_offset);
4592 if (ret < 0) {
4593 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4594 __func__, ret);
4595 goto end;
4596 }
4597 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4598 /*2 slot config - bits 0 and 1 set for the first two slots */
4599 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4600
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4601 pr_debug("%s: tdm tx slot_width %d slots %d slot_mask %x\n",
4602 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4603
4604 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4605 slots, slot_width);
4606 if (ret < 0) {
4607 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4608 __func__, ret);
4609 goto end;
4610 }
4611
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4612 pr_debug("%s: tdm tx channels: %d\n", __func__, channels);
4613
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4614 ret = snd_soc_dai_set_channel_map(cpu_dai,
4615 channels, slot_offset, 0, NULL);
4616 if (ret < 0) {
4617 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4618 __func__, ret);
4619 goto end;
4620 }
4621 } else {
4622 ret = -EINVAL;
4623 pr_err("%s: invalid use case, err:%d\n",
4624 __func__, ret);
4625 goto end;
4626 }
4627
4628 rate = params_rate(params);
4629 clk_freq = rate * slot_width * slots;
4630 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4631 if (ret < 0)
4632 pr_err("%s: failed to set tdm clk, err:%d\n",
4633 __func__, ret);
4634
4635end:
4636 return ret;
4637}
4638
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4639static int msm_get_tdm_mode(u32 port_id)
4640{
4641 int tdm_mode;
4642
4643 switch (port_id) {
4644 case AFE_PORT_ID_PRIMARY_TDM_RX:
4645 case AFE_PORT_ID_PRIMARY_TDM_TX:
4646 tdm_mode = TDM_PRI;
4647 break;
4648 case AFE_PORT_ID_SECONDARY_TDM_RX:
4649 case AFE_PORT_ID_SECONDARY_TDM_TX:
4650 tdm_mode = TDM_SEC;
4651 break;
4652 case AFE_PORT_ID_TERTIARY_TDM_RX:
4653 case AFE_PORT_ID_TERTIARY_TDM_TX:
4654 tdm_mode = TDM_TERT;
4655 break;
4656 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4657 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4658 tdm_mode = TDM_QUAT;
4659 break;
4660 case AFE_PORT_ID_QUINARY_TDM_RX:
4661 case AFE_PORT_ID_QUINARY_TDM_TX:
4662 tdm_mode = TDM_QUIN;
4663 break;
4664 case AFE_PORT_ID_SENARY_TDM_RX:
4665 case AFE_PORT_ID_SENARY_TDM_TX:
4666 tdm_mode = TDM_SEN;
4667 break;
4668 default:
4669 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4670 tdm_mode = -EINVAL;
4671 }
4672 return tdm_mode;
4673}
4674
4675static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4676{
4677 int ret = 0;
4678 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4679 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4680 struct snd_soc_card *card = rtd->card;
4681 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4682 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4683
4684 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4685 ret = -EINVAL;
4686 pr_err("%s: Invalid TDM interface %d\n",
4687 __func__, ret);
4688 return ret;
4689 }
4690
4691 if (pdata->mi2s_gpio_p[tdm_mode]) {
4692 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4693 == 0) {
4694 ret = msm_cdc_pinctrl_select_active_state(
4695 pdata->mi2s_gpio_p[tdm_mode]);
4696 if (ret) {
4697 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4698 __func__, ret);
4699 goto done;
4700 }
4701 }
4702 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4703 }
4704
4705done:
4706 return ret;
4707}
4708
4709static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4710{
4711 int ret = 0;
4712 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4713 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4714 struct snd_soc_card *card = rtd->card;
4715 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4716 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4717
4718 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4719 ret = -EINVAL;
4720 pr_err("%s: Invalid TDM interface %d\n",
4721 __func__, ret);
4722 return;
4723 }
4724
4725 if (pdata->mi2s_gpio_p[tdm_mode]) {
4726 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4727 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4728 == 0) {
4729 ret = msm_cdc_pinctrl_select_sleep_state(
4730 pdata->mi2s_gpio_p[tdm_mode]);
4731 if (ret)
4732 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4733 __func__, ret);
4734 }
4735 }
4736}
4737
4738static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4739{
4740 int ret = 0;
4741 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4742 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4743 struct snd_soc_card *card = rtd->card;
4744 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4745 u32 aux_mode = cpu_dai->id - 1;
4746
4747 if (aux_mode >= AUX_PCM_MAX) {
4748 ret = -EINVAL;
4749 pr_err("%s: Invalid AUX interface %d\n",
4750 __func__, ret);
4751 return ret;
4752 }
4753
4754 if (pdata->mi2s_gpio_p[aux_mode]) {
4755 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4756 == 0) {
4757 ret = msm_cdc_pinctrl_select_active_state(
4758 pdata->mi2s_gpio_p[aux_mode]);
4759 if (ret) {
4760 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4761 __func__, ret);
4762 goto done;
4763 }
4764 }
4765 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4766 }
4767
4768done:
4769 return ret;
4770}
4771
4772static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4773{
4774 int ret = 0;
4775 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4776 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4777 struct snd_soc_card *card = rtd->card;
4778 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4779 u32 aux_mode = cpu_dai->id - 1;
4780
4781 if (aux_mode >= AUX_PCM_MAX) {
4782 pr_err("%s: Invalid AUX interface %d\n",
4783 __func__, ret);
4784 return;
4785 }
4786
4787 if (pdata->mi2s_gpio_p[aux_mode]) {
4788 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4789 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4790 == 0) {
4791 ret = msm_cdc_pinctrl_select_sleep_state(
4792 pdata->mi2s_gpio_p[aux_mode]);
4793 if (ret)
4794 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4795 __func__, ret);
4796 }
4797 }
4798}
4799
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4800static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4801{
4802 int ret = 0;
4803 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4804 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4805
4806 switch (dai_link->id) {
4807 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4808 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4809 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4810 ret = kona_send_island_va_config(dai_link->id);
4811 if (ret)
4812 pr_err("%s: send island va cfg failed, err: %d\n",
4813 __func__, ret);
4814 break;
4815 }
4816
4817 return ret;
4818}
4819
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4820static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4821 struct snd_pcm_hw_params *params)
4822{
4823 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4824 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4825 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4826 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4827
4828 int ret = 0;
4829 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4830 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4831 u32 user_set_tx_ch = 0;
4832 u32 user_set_rx_ch = 0;
4833 u32 ch_id;
4834
4835 ret = snd_soc_dai_get_channel_map(codec_dai,
4836 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4837 &rx_ch_cdc_dma);
4838 if (ret < 0) {
4839 pr_err("%s: failed to get codec chan map, err:%d\n",
4840 __func__, ret);
4841 goto err;
4842 }
4843
4844 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4845 switch (dai_link->id) {
4846 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4847 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4848 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4849 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4850 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4851 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4852 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4853 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4854 {
4855 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4856 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4857 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4858 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4859 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4860 user_set_rx_ch, &rx_ch_cdc_dma);
4861 if (ret < 0) {
4862 pr_err("%s: failed to set cpu chan map, err:%d\n",
4863 __func__, ret);
4864 goto err;
4865 }
4866
4867 }
4868 break;
4869 }
4870 } else {
4871 switch (dai_link->id) {
4872 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4873 {
4874 user_set_tx_ch = msm_vi_feed_tx_ch;
4875 }
4876 break;
4877 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4878 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4879 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4880 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4881 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4882 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4883 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4884 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4885 {
4886 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4887 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4888 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4889 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4890 }
4891 break;
4892 }
4893
4894 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4895 &tx_ch_cdc_dma, 0, 0);
4896 if (ret < 0) {
4897 pr_err("%s: failed to set cpu chan map, err:%d\n",
4898 __func__, ret);
4899 goto err;
4900 }
4901 }
4902
4903err:
4904 return ret;
4905}
4906
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4907static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4908{
4909 cpumask_t mask;
4910
4911 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4912 pm_qos_remove_request(&substream->latency_pm_qos_req);
4913
4914 cpumask_clear(&mask);
4915 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4916 cpumask_set_cpu(2, &mask); /* affine to core 2 */
4917 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
4918
4919 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
4920
4921 pm_qos_add_request(&substream->latency_pm_qos_req,
4922 PM_QOS_CPU_DMA_LATENCY,
4923 MSM_LL_QOS_VALUE);
4924 return 0;
4925}
4926
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4927void mi2s_disable_audio_vote(struct snd_pcm_substream *substream)
4928{
4929 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4930 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4931 int index = cpu_dai->id;
4932 struct snd_soc_card *card = rtd->card;
4933 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4934 int sample_rate = 0;
4935
4936 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4937 sample_rate = mi2s_rx_cfg[index].sample_rate;
4938 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4939 sample_rate = mi2s_tx_cfg[index].sample_rate;
4940 } else {
4941 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
4942 return;
4943 }
4944
4945 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
4946 if (pdata->lpass_audio_hw_vote != NULL) {
4947 if (--pdata->core_audio_vote_count == 0) {
4948 clk_disable_unprepare(
4949 pdata->lpass_audio_hw_vote);
4950 } else if (pdata->core_audio_vote_count < 0) {
4951 pr_err("%s: audio vote mismatch\n", __func__);
4952 pdata->core_audio_vote_count = 0;
4953 }
4954 } else {
4955 pr_err("%s: Invalid lpass audio hw node\n", __func__);
4956 }
4957 }
4958}
4959
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4960static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
4961{
4962 int ret = 0;
4963 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4964 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4965 int index = cpu_dai->id;
4966 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4967 struct snd_soc_card *card = rtd->card;
4968 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4969 int sample_rate = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4970
4971 dev_dbg(rtd->card->dev,
4972 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
4973 __func__, substream->name, substream->stream,
4974 cpu_dai->name, cpu_dai->id);
4975
4976 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4977 ret = -EINVAL;
4978 dev_err(rtd->card->dev,
4979 "%s: CPU DAI id (%d) out of range\n",
4980 __func__, cpu_dai->id);
4981 goto err;
4982 }
4983 /*
4984 * Mutex protection in case the same MI2S
4985 * interface using for both TX and RX so
4986 * that the same clock won't be enable twice.
4987 */
4988 mutex_lock(&mi2s_intf_conf[index].lock);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4989 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4990 sample_rate = mi2s_rx_cfg[index].sample_rate;
4991 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4992 sample_rate = mi2s_tx_cfg[index].sample_rate;
4993 } else {
4994 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
4995 ret = -EINVAL;
4996 goto vote_err;
4997 }
4998
4999 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5000 if (pdata->lpass_audio_hw_vote == NULL) {
5001 dev_err(rtd->card->dev, "%s: Invalid lpass audio hw node\n",
5002 __func__);
5003 ret = -EINVAL;
5004 goto vote_err;
5005 }
5006 if (pdata->core_audio_vote_count == 0) {
5007 ret = clk_prepare_enable(pdata->lpass_audio_hw_vote);
5008 if (ret < 0) {
5009 dev_err(rtd->card->dev, "%s: audio vote error\n",
5010 __func__);
5011 goto vote_err;
5012 }
5013 }
5014 pdata->core_audio_vote_count++;
5015 }
5016
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5017 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5018 /* Check if msm needs to provide the clock to the interface */
5019 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5020 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5021 fmt = SND_SOC_DAIFMT_CBM_CFM;
5022 }
5023 ret = msm_mi2s_set_sclk(substream, true);
5024 if (ret < 0) {
5025 dev_err(rtd->card->dev,
5026 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5027 __func__, ret);
5028 goto clean_up;
5029 }
5030
5031 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5032 if (ret < 0) {
5033 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5034 __func__, index, ret);
5035 goto clk_off;
5036 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5037 if (pdata->mi2s_gpio_p[index]) {
5038 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5039 == 0) {
5040 ret = msm_cdc_pinctrl_select_active_state(
5041 pdata->mi2s_gpio_p[index]);
5042 if (ret) {
5043 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
5044 __func__, ret);
5045 goto clk_off;
5046 }
5047 }
5048 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
5049 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5050 }
5051clk_off:
5052 if (ret < 0)
5053 msm_mi2s_set_sclk(substream, false);
5054clean_up:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5055 if (ret < 0) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5056 mi2s_intf_conf[index].ref_cnt--;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5057 mi2s_disable_audio_vote(substream);
5058 }
5059vote_err:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5060 mutex_unlock(&mi2s_intf_conf[index].lock);
5061err:
5062 return ret;
5063}
5064
5065static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5066{
5067 int ret = 0;
5068 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5069 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5070 struct snd_soc_card *card = rtd->card;
5071 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5072
5073 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5074 substream->name, substream->stream);
5075 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5076 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5077 return;
5078 }
5079
5080 mutex_lock(&mi2s_intf_conf[index].lock);
5081 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5082 if (pdata->mi2s_gpio_p[index]) {
5083 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
5084 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5085 == 0) {
5086 ret = msm_cdc_pinctrl_select_sleep_state(
5087 pdata->mi2s_gpio_p[index]);
5088 if (ret)
5089 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
5090 __func__, ret);
5091 }
5092 }
5093
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5094 ret = msm_mi2s_set_sclk(substream, false);
5095 if (ret < 0)
5096 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5097 __func__, index, ret);
5098 }
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5099 mi2s_disable_audio_vote(substream);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5100 mutex_unlock(&mi2s_intf_conf[index].lock);
5101}
5102
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5103static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
5104 struct snd_pcm_hw_params *params)
5105{
5106 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5107 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5108 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5109 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5110 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
5111 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5112 int ret = 0;
5113
5114 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5115 codec_dai->name, codec_dai->id);
5116 ret = snd_soc_dai_get_channel_map(codec_dai,
5117 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5118 if (ret) {
5119 dev_err(rtd->dev,
5120 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5121 __func__, ret);
5122 goto err;
5123 }
5124
5125 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5126 __func__, tx_ch_cnt, dai_link->id);
5127
5128 ret = snd_soc_dai_set_channel_map(cpu_dai,
5129 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5130 if (ret)
5131 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5132 __func__, ret);
5133
5134err:
5135 return ret;
5136}
5137
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5138static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5139 struct snd_pcm_hw_params *params)
5140{
5141 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5142 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5143 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5144 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5145 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5146 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5147 int ret = 0;
5148
5149 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5150 codec_dai->name, codec_dai->id);
5151 ret = snd_soc_dai_get_channel_map(codec_dai,
5152 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5153 if (ret) {
5154 dev_err(rtd->dev,
5155 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5156 __func__, ret);
5157 goto err;
5158 }
5159
5160 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5161 __func__, tx_ch_cnt, dai_link->id);
5162
5163 ret = snd_soc_dai_set_channel_map(cpu_dai,
5164 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5165 if (ret)
5166 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5167 __func__, ret);
5168
5169err:
5170 return ret;
5171}
5172
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5173static struct snd_soc_ops kona_aux_be_ops = {
5174 .startup = kona_aux_snd_startup,
5175 .shutdown = kona_aux_snd_shutdown
5176};
5177
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5178static struct snd_soc_ops kona_tdm_be_ops = {
5179 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5180 .startup = kona_tdm_snd_startup,
5181 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5182};
5183
5184static struct snd_soc_ops msm_mi2s_be_ops = {
5185 .startup = msm_mi2s_snd_startup,
5186 .shutdown = msm_mi2s_snd_shutdown,
5187};
5188
5189static struct snd_soc_ops msm_fe_qos_ops = {
5190 .prepare = msm_fe_qos_prepare,
5191};
5192
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5193static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]5194 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5195 .hw_params = msm_snd_cdc_dma_hw_params,
5196};
5197
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5198static struct snd_soc_ops msm_wcn_ops = {
5199 .hw_params = msm_wcn_hw_params,
5200};
5201
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5202static struct snd_soc_ops msm_wcn_ops_lito = {
5203 .hw_params = msm_wcn_hw_params_lito,
5204};
5205
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5206static int msm_dmic_event(struct snd_soc_dapm_widget *w,
5207 struct snd_kcontrol *kcontrol, int event)
5208{
5209 struct msm_asoc_mach_data *pdata = NULL;
5210 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5211 int ret = 0;
5212 u32 dmic_idx;
5213 int *dmic_gpio_cnt;
5214 struct device_node *dmic_gpio;
5215 char *wname;
5216
5217 wname = strpbrk(w->name, "012345");
5218 if (!wname) {
5219 dev_err(component->dev, "%s: widget not found\n", __func__);
5220 return -EINVAL;
5221 }
5222
5223 ret = kstrtouint(wname, 10, &dmic_idx);
5224 if (ret < 0) {
5225 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
5226 __func__);
5227 return -EINVAL;
5228 }
5229
5230 pdata = snd_soc_card_get_drvdata(component->card);
5231
5232 switch (dmic_idx) {
5233 case 0:
5234 case 1:
5235 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
5236 dmic_gpio = pdata->dmic01_gpio_p;
5237 break;
5238 case 2:
5239 case 3:
5240 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
5241 dmic_gpio = pdata->dmic23_gpio_p;
5242 break;
5243 case 4:
5244 case 5:
5245 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
5246 dmic_gpio = pdata->dmic45_gpio_p;
5247 break;
5248 default:
5249 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
5250 __func__);
5251 return -EINVAL;
5252 }
5253
5254 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
5255 __func__, event, dmic_idx, *dmic_gpio_cnt);
5256
5257 switch (event) {
5258 case SND_SOC_DAPM_PRE_PMU:
5259 (*dmic_gpio_cnt)++;
5260 if (*dmic_gpio_cnt == 1) {
5261 ret = msm_cdc_pinctrl_select_active_state(
5262 dmic_gpio);
5263 if (ret < 0) {
5264 pr_err("%s: gpio set cannot be activated %sd",
5265 __func__, "dmic_gpio");
5266 return ret;
5267 }
5268 }
5269
5270 break;
5271 case SND_SOC_DAPM_POST_PMD:
5272 (*dmic_gpio_cnt)--;
5273 if (*dmic_gpio_cnt == 0) {
5274 ret = msm_cdc_pinctrl_select_sleep_state(
5275 dmic_gpio);
5276 if (ret < 0) {
5277 pr_err("%s: gpio set cannot be de-activated %sd",
5278 __func__, "dmic_gpio");
5279 return ret;
5280 }
5281 }
5282 break;
5283 default:
5284 pr_err("%s: invalid DAPM event %d\n", __func__, event);
5285 return -EINVAL;
5286 }
5287 return 0;
5288}
5289
5290static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
5291 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
5292 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
5293 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
5294 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5295 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5296 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
5297 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
5298 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
5299 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
5300 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
5301 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5302 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
5303 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5304};
5305
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5306static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5307{
5308 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5309 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5310 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5311
5312 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5313 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5314}
5315
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5316static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5317{
5318 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5319 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5320 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5321
5322 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5323 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5324}
5325
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]5326#ifndef CONFIG_TDM_DISABLE
5327static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5328{
5329 snd_soc_add_component_controls(component, msm_tdm_snd_controls,
5330 ARRAY_SIZE(msm_tdm_snd_controls));
5331}
5332#else
5333static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5334{
5335 return;
5336}
5337#endif
5338
5339#ifndef CONFIG_MI2S_DISABLE
5340static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5341{
5342 snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
5343 ARRAY_SIZE(msm_mi2s_snd_controls));
5344}
5345#else
5346static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5347{
5348 return;
5349}
5350#endif
5351
5352#ifndef CONFIG_AUXPCM_DISABLE
5353static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5354{
5355 snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
5356 ARRAY_SIZE(msm_auxpcm_snd_controls));
5357}
5358#else
5359static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5360{
5361 return;
5362}
5363#endif
5364
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5365static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5366{
5367 int ret = -EINVAL;
5368 struct snd_soc_component *component;
5369 struct snd_soc_dapm_context *dapm;
5370 struct snd_card *card;
5371 struct snd_info_entry *entry;
5372 struct snd_soc_component *aux_comp;
5373 struct msm_asoc_mach_data *pdata =
5374 snd_soc_card_get_drvdata(rtd->card);
5375
5376 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5377 if (!component) {
5378 pr_err("%s: could not find component for bolero_codec\n",
5379 __func__);
5380 return ret;
5381 }
5382
5383 dapm = snd_soc_component_get_dapm(component);
5384
5385 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5386 ARRAY_SIZE(msm_int_snd_controls));
5387 if (ret < 0) {
5388 pr_err("%s: add_component_controls failed: %d\n",
5389 __func__, ret);
5390 return ret;
5391 }
5392 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5393 ARRAY_SIZE(msm_common_snd_controls));
5394 if (ret < 0) {
5395 pr_err("%s: add common snd controls failed: %d\n",
5396 __func__, ret);
5397 return ret;
5398 }
5399
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]5400 msm_add_tdm_snd_controls(component);
5401 msm_add_mi2s_snd_controls(component);
5402 msm_add_auxpcm_snd_controls(component);
5403
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5404 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5405 ARRAY_SIZE(msm_int_dapm_widgets));
5406
5407 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5408 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5409 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5410 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +0530[diff] [blame]5411 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5412 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5413 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5414 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5415
5416 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5417 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5418 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5419 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5420 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5421
5422 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5423 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5424 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5425 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5426
5427 snd_soc_dapm_sync(dapm);
5428
5429 /*
5430 * Send speaker configuration only for WSA8810.
5431 * Default configuration is for WSA8815.
5432 */
5433 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5434 __func__, rtd->card->num_aux_devs);
5435 if (rtd->card->num_aux_devs &&
5436 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5437 list_for_each_entry(aux_comp,
5438 &rtd->card->aux_comp_list,
5439 card_aux_list) {
5440 if (aux_comp->name != NULL && (
5441 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5442 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5443 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5444 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5445 wsa_macro_set_spkr_gain_offset(component,
5446 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5447 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5448 }
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]5449 if (pdata->lito_v2_enabled) {
5450 /*
5451 * Enable tx data line3 for saipan version v2 amd
5452 * write corresponding lpi register.
5453 */
5454 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map_v2),
5455 sm_port_map_v2);
5456 } else {
5457 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5458 sm_port_map);
5459 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5460 }
5461 card = rtd->card->snd_card;
5462 if (!pdata->codec_root) {
5463 entry = snd_info_create_subdir(card->module, "codecs",
5464 card->proc_root);
5465 if (!entry) {
5466 pr_debug("%s: Cannot create codecs module entry\n",
5467 __func__);
5468 ret = 0;
5469 goto err;
5470 }
5471 pdata->codec_root = entry;
5472 }
5473 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -0800[diff] [blame]5474 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5475 codec_reg_done = true;
5476 return 0;
5477err:
5478 return ret;
5479}
5480
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]5481static void *def_wcd_mbhc_cal(void)
5482{
5483 void *wcd_mbhc_cal;
5484 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5485 u16 *btn_high;
5486
5487 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5488 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5489 if (!wcd_mbhc_cal)
5490 return NULL;
5491
5492 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5493 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5494 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5495 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5496 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5497
5498 btn_high[0] = 75;
5499 btn_high[1] = 150;
5500 btn_high[2] = 237;
5501 btn_high[3] = 500;
5502 btn_high[4] = 500;
5503 btn_high[5] = 500;
5504 btn_high[6] = 500;
5505 btn_high[7] = 500;
5506
5507 return wcd_mbhc_cal;
5508}
5509
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5510/* Digital audio interface glue - connects codec <---> CPU */
5511static struct snd_soc_dai_link msm_common_dai_links[] = {
5512 /* FrontEnd DAI Links */
5513 {/* hw:x,0 */
5514 .name = MSM_DAILINK_NAME(Media1),
5515 .stream_name = "MultiMedia1",
5516 .cpu_dai_name = "MultiMedia1",
5517 .platform_name = "msm-pcm-dsp.0",
5518 .dynamic = 1,
5519 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5520 .dpcm_playback = 1,
5521 .dpcm_capture = 1,
5522 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5523 SND_SOC_DPCM_TRIGGER_POST},
5524 .codec_dai_name = "snd-soc-dummy-dai",
5525 .codec_name = "snd-soc-dummy",
5526 .ignore_suspend = 1,
5527 /* this dainlink has playback support */
5528 .ignore_pmdown_time = 1,
5529 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5530 },
5531 {/* hw:x,1 */
5532 .name = MSM_DAILINK_NAME(Media2),
5533 .stream_name = "MultiMedia2",
5534 .cpu_dai_name = "MultiMedia2",
5535 .platform_name = "msm-pcm-dsp.0",
5536 .dynamic = 1,
5537 .dpcm_playback = 1,
5538 .dpcm_capture = 1,
5539 .codec_dai_name = "snd-soc-dummy-dai",
5540 .codec_name = "snd-soc-dummy",
5541 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5542 SND_SOC_DPCM_TRIGGER_POST},
5543 .ignore_suspend = 1,
5544 /* this dainlink has playback support */
5545 .ignore_pmdown_time = 1,
5546 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5547 },
5548 {/* hw:x,2 */
5549 .name = "VoiceMMode1",
5550 .stream_name = "VoiceMMode1",
5551 .cpu_dai_name = "VoiceMMode1",
5552 .platform_name = "msm-pcm-voice",
5553 .dynamic = 1,
5554 .dpcm_playback = 1,
5555 .dpcm_capture = 1,
5556 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5557 SND_SOC_DPCM_TRIGGER_POST},
5558 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5559 .ignore_suspend = 1,
5560 .ignore_pmdown_time = 1,
5561 .codec_dai_name = "snd-soc-dummy-dai",
5562 .codec_name = "snd-soc-dummy",
5563 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5564 },
5565 {/* hw:x,3 */
5566 .name = "MSM VoIP",
5567 .stream_name = "VoIP",
5568 .cpu_dai_name = "VoIP",
5569 .platform_name = "msm-voip-dsp",
5570 .dynamic = 1,
5571 .dpcm_playback = 1,
5572 .dpcm_capture = 1,
5573 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5574 SND_SOC_DPCM_TRIGGER_POST},
5575 .codec_dai_name = "snd-soc-dummy-dai",
5576 .codec_name = "snd-soc-dummy",
5577 .ignore_suspend = 1,
5578 /* this dainlink has playback support */
5579 .ignore_pmdown_time = 1,
5580 .id = MSM_FRONTEND_DAI_VOIP,
5581 },
5582 {/* hw:x,4 */
5583 .name = MSM_DAILINK_NAME(ULL),
5584 .stream_name = "MultiMedia3",
5585 .cpu_dai_name = "MultiMedia3",
5586 .platform_name = "msm-pcm-dsp.2",
5587 .dynamic = 1,
5588 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5589 .dpcm_playback = 1,
5590 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5591 SND_SOC_DPCM_TRIGGER_POST},
5592 .codec_dai_name = "snd-soc-dummy-dai",
5593 .codec_name = "snd-soc-dummy",
5594 .ignore_suspend = 1,
5595 /* this dainlink has playback support */
5596 .ignore_pmdown_time = 1,
5597 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5598 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5599 {/* hw:x,5 */
5600 .name = "MSM AFE-PCM RX",
5601 .stream_name = "AFE-PROXY RX",
5602 .cpu_dai_name = "msm-dai-q6-dev.241",
5603 .codec_name = "msm-stub-codec.1",
5604 .codec_dai_name = "msm-stub-rx",
5605 .platform_name = "msm-pcm-afe",
5606 .dpcm_playback = 1,
5607 .ignore_suspend = 1,
5608 /* this dainlink has playback support */
5609 .ignore_pmdown_time = 1,
5610 },
5611 {/* hw:x,6 */
5612 .name = "MSM AFE-PCM TX",
5613 .stream_name = "AFE-PROXY TX",
5614 .cpu_dai_name = "msm-dai-q6-dev.240",
5615 .codec_name = "msm-stub-codec.1",
5616 .codec_dai_name = "msm-stub-tx",
5617 .platform_name = "msm-pcm-afe",
5618 .dpcm_capture = 1,
5619 .ignore_suspend = 1,
5620 },
5621 {/* hw:x,7 */
5622 .name = MSM_DAILINK_NAME(Compress1),
5623 .stream_name = "Compress1",
5624 .cpu_dai_name = "MultiMedia4",
5625 .platform_name = "msm-compress-dsp",
5626 .dynamic = 1,
5627 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5628 .dpcm_playback = 1,
5629 .dpcm_capture = 1,
5630 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5631 SND_SOC_DPCM_TRIGGER_POST},
5632 .codec_dai_name = "snd-soc-dummy-dai",
5633 .codec_name = "snd-soc-dummy",
5634 .ignore_suspend = 1,
5635 .ignore_pmdown_time = 1,
5636 /* this dainlink has playback support */
5637 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5638 },
Meng Wang197cb302019-03-01 13:54:38 +0800[diff] [blame]5639 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5640 {/* hw:x,8 */
5641 .name = "AUXPCM Hostless",
5642 .stream_name = "AUXPCM Hostless",
5643 .cpu_dai_name = "AUXPCM_HOSTLESS",
5644 .platform_name = "msm-pcm-hostless",
5645 .dynamic = 1,
5646 .dpcm_playback = 1,
5647 .dpcm_capture = 1,
5648 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5649 SND_SOC_DPCM_TRIGGER_POST},
5650 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5651 .ignore_suspend = 1,
5652 /* this dainlink has playback support */
5653 .ignore_pmdown_time = 1,
5654 .codec_dai_name = "snd-soc-dummy-dai",
5655 .codec_name = "snd-soc-dummy",
5656 },
5657 {/* hw:x,9 */
5658 .name = MSM_DAILINK_NAME(LowLatency),
5659 .stream_name = "MultiMedia5",
5660 .cpu_dai_name = "MultiMedia5",
5661 .platform_name = "msm-pcm-dsp.1",
5662 .dynamic = 1,
5663 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5664 .dpcm_playback = 1,
5665 .dpcm_capture = 1,
5666 .codec_dai_name = "snd-soc-dummy-dai",
5667 .codec_name = "snd-soc-dummy",
5668 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5669 SND_SOC_DPCM_TRIGGER_POST},
5670 .ignore_suspend = 1,
5671 /* this dainlink has playback support */
5672 .ignore_pmdown_time = 1,
5673 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5674 .ops = &msm_fe_qos_ops,
5675 },
5676 {/* hw:x,10 */
5677 .name = "Listen 1 Audio Service",
5678 .stream_name = "Listen 1 Audio Service",
5679 .cpu_dai_name = "LSM1",
5680 .platform_name = "msm-lsm-client",
5681 .dynamic = 1,
5682 .dpcm_capture = 1,
5683 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5684 SND_SOC_DPCM_TRIGGER_POST },
5685 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5686 .ignore_suspend = 1,
5687 .codec_dai_name = "snd-soc-dummy-dai",
5688 .codec_name = "snd-soc-dummy",
5689 .id = MSM_FRONTEND_DAI_LSM1,
5690 },
5691 /* Multiple Tunnel instances */
5692 {/* hw:x,11 */
5693 .name = MSM_DAILINK_NAME(Compress2),
5694 .stream_name = "Compress2",
5695 .cpu_dai_name = "MultiMedia7",
5696 .platform_name = "msm-compress-dsp",
5697 .dynamic = 1,
5698 .dpcm_playback = 1,
5699 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5700 SND_SOC_DPCM_TRIGGER_POST},
5701 .codec_dai_name = "snd-soc-dummy-dai",
5702 .codec_name = "snd-soc-dummy",
5703 .ignore_suspend = 1,
5704 .ignore_pmdown_time = 1,
5705 /* this dainlink has playback support */
5706 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5707 },
5708 {/* hw:x,12 */
5709 .name = MSM_DAILINK_NAME(MultiMedia10),
5710 .stream_name = "MultiMedia10",
5711 .cpu_dai_name = "MultiMedia10",
5712 .platform_name = "msm-pcm-dsp.1",
5713 .dynamic = 1,
5714 .dpcm_playback = 1,
5715 .dpcm_capture = 1,
5716 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5717 SND_SOC_DPCM_TRIGGER_POST},
5718 .codec_dai_name = "snd-soc-dummy-dai",
5719 .codec_name = "snd-soc-dummy",
5720 .ignore_suspend = 1,
5721 .ignore_pmdown_time = 1,
5722 /* this dainlink has playback support */
5723 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5724 },
5725 {/* hw:x,13 */
5726 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5727 .stream_name = "MM_NOIRQ",
5728 .cpu_dai_name = "MultiMedia8",
5729 .platform_name = "msm-pcm-dsp-noirq",
5730 .dynamic = 1,
5731 .dpcm_playback = 1,
5732 .dpcm_capture = 1,
5733 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5734 SND_SOC_DPCM_TRIGGER_POST},
5735 .codec_dai_name = "snd-soc-dummy-dai",
5736 .codec_name = "snd-soc-dummy",
5737 .ignore_suspend = 1,
5738 .ignore_pmdown_time = 1,
5739 /* this dainlink has playback support */
5740 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5741 .ops = &msm_fe_qos_ops,
5742 },
5743 /* HDMI Hostless */
5744 {/* hw:x,14 */
5745 .name = "HDMI_RX_HOSTLESS",
5746 .stream_name = "HDMI_RX_HOSTLESS",
5747 .cpu_dai_name = "HDMI_HOSTLESS",
5748 .platform_name = "msm-pcm-hostless",
5749 .dynamic = 1,
5750 .dpcm_playback = 1,
5751 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5752 SND_SOC_DPCM_TRIGGER_POST},
5753 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5754 .ignore_suspend = 1,
5755 .ignore_pmdown_time = 1,
5756 .codec_dai_name = "snd-soc-dummy-dai",
5757 .codec_name = "snd-soc-dummy",
5758 },
5759 {/* hw:x,15 */
5760 .name = "VoiceMMode2",
5761 .stream_name = "VoiceMMode2",
5762 .cpu_dai_name = "VoiceMMode2",
5763 .platform_name = "msm-pcm-voice",
5764 .dynamic = 1,
5765 .dpcm_playback = 1,
5766 .dpcm_capture = 1,
5767 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5768 SND_SOC_DPCM_TRIGGER_POST},
5769 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5770 .ignore_suspend = 1,
5771 .ignore_pmdown_time = 1,
5772 .codec_dai_name = "snd-soc-dummy-dai",
5773 .codec_name = "snd-soc-dummy",
5774 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5775 },
5776 /* LSM FE */
5777 {/* hw:x,16 */
5778 .name = "Listen 2 Audio Service",
5779 .stream_name = "Listen 2 Audio Service",
5780 .cpu_dai_name = "LSM2",
5781 .platform_name = "msm-lsm-client",
5782 .dynamic = 1,
5783 .dpcm_capture = 1,
5784 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5785 SND_SOC_DPCM_TRIGGER_POST },
5786 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5787 .ignore_suspend = 1,
5788 .codec_dai_name = "snd-soc-dummy-dai",
5789 .codec_name = "snd-soc-dummy",
5790 .id = MSM_FRONTEND_DAI_LSM2,
5791 },
5792 {/* hw:x,17 */
5793 .name = "Listen 3 Audio Service",
5794 .stream_name = "Listen 3 Audio Service",
5795 .cpu_dai_name = "LSM3",
5796 .platform_name = "msm-lsm-client",
5797 .dynamic = 1,
5798 .dpcm_capture = 1,
5799 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5800 SND_SOC_DPCM_TRIGGER_POST },
5801 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5802 .ignore_suspend = 1,
5803 .codec_dai_name = "snd-soc-dummy-dai",
5804 .codec_name = "snd-soc-dummy",
5805 .id = MSM_FRONTEND_DAI_LSM3,
5806 },
5807 {/* hw:x,18 */
5808 .name = "Listen 4 Audio Service",
5809 .stream_name = "Listen 4 Audio Service",
5810 .cpu_dai_name = "LSM4",
5811 .platform_name = "msm-lsm-client",
5812 .dynamic = 1,
5813 .dpcm_capture = 1,
5814 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5815 SND_SOC_DPCM_TRIGGER_POST },
5816 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5817 .ignore_suspend = 1,
5818 .codec_dai_name = "snd-soc-dummy-dai",
5819 .codec_name = "snd-soc-dummy",
5820 .id = MSM_FRONTEND_DAI_LSM4,
5821 },
5822 {/* hw:x,19 */
5823 .name = "Listen 5 Audio Service",
5824 .stream_name = "Listen 5 Audio Service",
5825 .cpu_dai_name = "LSM5",
5826 .platform_name = "msm-lsm-client",
5827 .dynamic = 1,
5828 .dpcm_capture = 1,
5829 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5830 SND_SOC_DPCM_TRIGGER_POST },
5831 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5832 .ignore_suspend = 1,
5833 .codec_dai_name = "snd-soc-dummy-dai",
5834 .codec_name = "snd-soc-dummy",
5835 .id = MSM_FRONTEND_DAI_LSM5,
5836 },
5837 {/* hw:x,20 */
5838 .name = "Listen 6 Audio Service",
5839 .stream_name = "Listen 6 Audio Service",
5840 .cpu_dai_name = "LSM6",
5841 .platform_name = "msm-lsm-client",
5842 .dynamic = 1,
5843 .dpcm_capture = 1,
5844 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5845 SND_SOC_DPCM_TRIGGER_POST },
5846 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5847 .ignore_suspend = 1,
5848 .codec_dai_name = "snd-soc-dummy-dai",
5849 .codec_name = "snd-soc-dummy",
5850 .id = MSM_FRONTEND_DAI_LSM6,
5851 },
5852 {/* hw:x,21 */
5853 .name = "Listen 7 Audio Service",
5854 .stream_name = "Listen 7 Audio Service",
5855 .cpu_dai_name = "LSM7",
5856 .platform_name = "msm-lsm-client",
5857 .dynamic = 1,
5858 .dpcm_capture = 1,
5859 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5860 SND_SOC_DPCM_TRIGGER_POST },
5861 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5862 .ignore_suspend = 1,
5863 .codec_dai_name = "snd-soc-dummy-dai",
5864 .codec_name = "snd-soc-dummy",
5865 .id = MSM_FRONTEND_DAI_LSM7,
5866 },
5867 {/* hw:x,22 */
5868 .name = "Listen 8 Audio Service",
5869 .stream_name = "Listen 8 Audio Service",
5870 .cpu_dai_name = "LSM8",
5871 .platform_name = "msm-lsm-client",
5872 .dynamic = 1,
5873 .dpcm_capture = 1,
5874 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5875 SND_SOC_DPCM_TRIGGER_POST },
5876 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5877 .ignore_suspend = 1,
5878 .codec_dai_name = "snd-soc-dummy-dai",
5879 .codec_name = "snd-soc-dummy",
5880 .id = MSM_FRONTEND_DAI_LSM8,
5881 },
5882 {/* hw:x,23 */
5883 .name = MSM_DAILINK_NAME(Media9),
5884 .stream_name = "MultiMedia9",
5885 .cpu_dai_name = "MultiMedia9",
5886 .platform_name = "msm-pcm-dsp.0",
5887 .dynamic = 1,
5888 .dpcm_playback = 1,
5889 .dpcm_capture = 1,
5890 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5891 SND_SOC_DPCM_TRIGGER_POST},
5892 .codec_dai_name = "snd-soc-dummy-dai",
5893 .codec_name = "snd-soc-dummy",
5894 .ignore_suspend = 1,
5895 /* this dainlink has playback support */
5896 .ignore_pmdown_time = 1,
5897 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
5898 },
5899 {/* hw:x,24 */
5900 .name = MSM_DAILINK_NAME(Compress4),
5901 .stream_name = "Compress4",
5902 .cpu_dai_name = "MultiMedia11",
5903 .platform_name = "msm-compress-dsp",
5904 .dynamic = 1,
5905 .dpcm_playback = 1,
5906 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5907 SND_SOC_DPCM_TRIGGER_POST},
5908 .codec_dai_name = "snd-soc-dummy-dai",
5909 .codec_name = "snd-soc-dummy",
5910 .ignore_suspend = 1,
5911 .ignore_pmdown_time = 1,
5912 /* this dainlink has playback support */
5913 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
5914 },
5915 {/* hw:x,25 */
5916 .name = MSM_DAILINK_NAME(Compress5),
5917 .stream_name = "Compress5",
5918 .cpu_dai_name = "MultiMedia12",
5919 .platform_name = "msm-compress-dsp",
5920 .dynamic = 1,
5921 .dpcm_playback = 1,
5922 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5923 SND_SOC_DPCM_TRIGGER_POST},
5924 .codec_dai_name = "snd-soc-dummy-dai",
5925 .codec_name = "snd-soc-dummy",
5926 .ignore_suspend = 1,
5927 .ignore_pmdown_time = 1,
5928 /* this dainlink has playback support */
5929 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
5930 },
5931 {/* hw:x,26 */
5932 .name = MSM_DAILINK_NAME(Compress6),
5933 .stream_name = "Compress6",
5934 .cpu_dai_name = "MultiMedia13",
5935 .platform_name = "msm-compress-dsp",
5936 .dynamic = 1,
5937 .dpcm_playback = 1,
5938 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5939 SND_SOC_DPCM_TRIGGER_POST},
5940 .codec_dai_name = "snd-soc-dummy-dai",
5941 .codec_name = "snd-soc-dummy",
5942 .ignore_suspend = 1,
5943 .ignore_pmdown_time = 1,
5944 /* this dainlink has playback support */
5945 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
5946 },
5947 {/* hw:x,27 */
5948 .name = MSM_DAILINK_NAME(Compress7),
5949 .stream_name = "Compress7",
5950 .cpu_dai_name = "MultiMedia14",
5951 .platform_name = "msm-compress-dsp",
5952 .dynamic = 1,
5953 .dpcm_playback = 1,
5954 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5955 SND_SOC_DPCM_TRIGGER_POST},
5956 .codec_dai_name = "snd-soc-dummy-dai",
5957 .codec_name = "snd-soc-dummy",
5958 .ignore_suspend = 1,
5959 .ignore_pmdown_time = 1,
5960 /* this dainlink has playback support */
5961 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
5962 },
5963 {/* hw:x,28 */
5964 .name = MSM_DAILINK_NAME(Compress8),
5965 .stream_name = "Compress8",
5966 .cpu_dai_name = "MultiMedia15",
5967 .platform_name = "msm-compress-dsp",
5968 .dynamic = 1,
5969 .dpcm_playback = 1,
5970 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5971 SND_SOC_DPCM_TRIGGER_POST},
5972 .codec_dai_name = "snd-soc-dummy-dai",
5973 .codec_name = "snd-soc-dummy",
5974 .ignore_suspend = 1,
5975 .ignore_pmdown_time = 1,
5976 /* this dainlink has playback support */
5977 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
5978 },
5979 {/* hw:x,29 */
5980 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
5981 .stream_name = "MM_NOIRQ_2",
5982 .cpu_dai_name = "MultiMedia16",
5983 .platform_name = "msm-pcm-dsp-noirq",
5984 .dynamic = 1,
5985 .dpcm_playback = 1,
5986 .dpcm_capture = 1,
5987 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5988 SND_SOC_DPCM_TRIGGER_POST},
5989 .codec_dai_name = "snd-soc-dummy-dai",
5990 .codec_name = "snd-soc-dummy",
5991 .ignore_suspend = 1,
5992 .ignore_pmdown_time = 1,
5993 /* this dainlink has playback support */
5994 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -0700[diff] [blame]5995 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5996 },
5997 {/* hw:x,30 */
5998 .name = "CDC_DMA Hostless",
5999 .stream_name = "CDC_DMA Hostless",
6000 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6001 .platform_name = "msm-pcm-hostless",
6002 .dynamic = 1,
6003 .dpcm_playback = 1,
6004 .dpcm_capture = 1,
6005 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6006 SND_SOC_DPCM_TRIGGER_POST},
6007 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6008 .ignore_suspend = 1,
6009 /* this dailink has playback support */
6010 .ignore_pmdown_time = 1,
6011 .codec_dai_name = "snd-soc-dummy-dai",
6012 .codec_name = "snd-soc-dummy",
6013 },
6014 {/* hw:x,31 */
6015 .name = "TX3_CDC_DMA Hostless",
6016 .stream_name = "TX3_CDC_DMA Hostless",
6017 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6018 .platform_name = "msm-pcm-hostless",
6019 .dynamic = 1,
6020 .dpcm_capture = 1,
6021 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6022 SND_SOC_DPCM_TRIGGER_POST},
6023 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6024 .ignore_suspend = 1,
6025 .codec_dai_name = "snd-soc-dummy-dai",
6026 .codec_name = "snd-soc-dummy",
6027 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6028 {/* hw:x,32 */
6029 .name = "Tertiary MI2S TX_Hostless",
6030 .stream_name = "Tertiary MI2S_TX Hostless Capture",
6031 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
6032 .platform_name = "msm-pcm-hostless",
6033 .dynamic = 1,
6034 .dpcm_capture = 1,
6035 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6036 SND_SOC_DPCM_TRIGGER_POST},
6037 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6038 .ignore_suspend = 1,
6039 .ignore_pmdown_time = 1,
6040 .codec_dai_name = "snd-soc-dummy-dai",
6041 .codec_name = "snd-soc-dummy",
6042 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6043};
6044
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6045static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6046 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6047 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6048 .stream_name = "WSA CDC DMA0 Capture",
6049 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6050 .platform_name = "msm-pcm-hostless",
6051 .codec_name = "bolero_codec",
6052 .codec_dai_name = "wsa_macro_vifeedback",
6053 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6054 .be_hw_params_fixup = msm_be_hw_params_fixup,
6055 .ignore_suspend = 1,
6056 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6057 .ops = &msm_cdc_dma_be_ops,
6058 },
6059};
6060
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6061static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6062 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6063 .name = MSM_DAILINK_NAME(ASM Loopback),
6064 .stream_name = "MultiMedia6",
6065 .cpu_dai_name = "MultiMedia6",
6066 .platform_name = "msm-pcm-loopback",
6067 .dynamic = 1,
6068 .dpcm_playback = 1,
6069 .dpcm_capture = 1,
6070 .codec_dai_name = "snd-soc-dummy-dai",
6071 .codec_name = "snd-soc-dummy",
6072 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6073 SND_SOC_DPCM_TRIGGER_POST},
6074 .ignore_suspend = 1,
6075 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6076 .ignore_pmdown_time = 1,
6077 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6078 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6079 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6080 .name = "USB Audio Hostless",
6081 .stream_name = "USB Audio Hostless",
6082 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6083 .platform_name = "msm-pcm-hostless",
6084 .dynamic = 1,
6085 .dpcm_playback = 1,
6086 .dpcm_capture = 1,
6087 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6088 SND_SOC_DPCM_TRIGGER_POST},
6089 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6090 .ignore_suspend = 1,
6091 .ignore_pmdown_time = 1,
6092 .codec_dai_name = "snd-soc-dummy-dai",
6093 .codec_name = "snd-soc-dummy",
6094 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6095 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6096 .name = "SLIMBUS_7 Hostless",
6097 .stream_name = "SLIMBUS_7 Hostless",
6098 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
6099 .platform_name = "msm-pcm-hostless",
6100 .dynamic = 1,
6101 .dpcm_capture = 1,
6102 .dpcm_playback = 1,
6103 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6104 SND_SOC_DPCM_TRIGGER_POST},
6105 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6106 .ignore_suspend = 1,
6107 .ignore_pmdown_time = 1,
6108 .codec_dai_name = "snd-soc-dummy-dai",
6109 .codec_name = "snd-soc-dummy",
6110 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6111 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6112 .name = "Compress Capture",
6113 .stream_name = "Compress9",
6114 .cpu_dai_name = "MultiMedia17",
6115 .platform_name = "msm-compress-dsp",
6116 .dynamic = 1,
6117 .dpcm_capture = 1,
6118 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6119 SND_SOC_DPCM_TRIGGER_POST},
6120 .codec_dai_name = "snd-soc-dummy-dai",
6121 .codec_name = "snd-soc-dummy",
6122 .ignore_suspend = 1,
6123 .ignore_pmdown_time = 1,
6124 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6125 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6126 {/* hw:x,38 */
6127 .name = "SLIMBUS_8 Hostless",
6128 .stream_name = "SLIMBUS_8 Hostless",
6129 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6130 .platform_name = "msm-pcm-hostless",
6131 .dynamic = 1,
6132 .dpcm_capture = 1,
6133 .dpcm_playback = 1,
6134 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6135 SND_SOC_DPCM_TRIGGER_POST},
6136 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6137 .ignore_suspend = 1,
6138 .ignore_pmdown_time = 1,
6139 .codec_dai_name = "snd-soc-dummy-dai",
6140 .codec_name = "snd-soc-dummy",
6141 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -0700[diff] [blame]6142 {/* hw:x,39 */
6143 .name = LPASS_BE_TX_CDC_DMA_TX_5,
6144 .stream_name = "TX CDC DMA5 Capture",
6145 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
6146 .platform_name = "msm-pcm-hostless",
6147 .codec_name = "bolero_codec",
6148 .codec_dai_name = "tx_macro_tx3",
6149 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
6150 .be_hw_params_fixup = msm_be_hw_params_fixup,
6151 .ignore_suspend = 1,
6152 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6153 .ops = &msm_cdc_dma_be_ops,
6154 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6155};
6156
6157static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6158 /* Backend AFE DAI Links */
6159 {
6160 .name = LPASS_BE_AFE_PCM_RX,
6161 .stream_name = "AFE Playback",
6162 .cpu_dai_name = "msm-dai-q6-dev.224",
6163 .platform_name = "msm-pcm-routing",
6164 .codec_name = "msm-stub-codec.1",
6165 .codec_dai_name = "msm-stub-rx",
6166 .no_pcm = 1,
6167 .dpcm_playback = 1,
6168 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6169 .be_hw_params_fixup = msm_be_hw_params_fixup,
6170 /* this dainlink has playback support */
6171 .ignore_pmdown_time = 1,
6172 .ignore_suspend = 1,
6173 },
6174 {
6175 .name = LPASS_BE_AFE_PCM_TX,
6176 .stream_name = "AFE Capture",
6177 .cpu_dai_name = "msm-dai-q6-dev.225",
6178 .platform_name = "msm-pcm-routing",
6179 .codec_name = "msm-stub-codec.1",
6180 .codec_dai_name = "msm-stub-tx",
6181 .no_pcm = 1,
6182 .dpcm_capture = 1,
6183 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6184 .be_hw_params_fixup = msm_be_hw_params_fixup,
6185 .ignore_suspend = 1,
6186 },
6187 /* Incall Record Uplink BACK END DAI Link */
6188 {
6189 .name = LPASS_BE_INCALL_RECORD_TX,
6190 .stream_name = "Voice Uplink Capture",
6191 .cpu_dai_name = "msm-dai-q6-dev.32772",
6192 .platform_name = "msm-pcm-routing",
6193 .codec_name = "msm-stub-codec.1",
6194 .codec_dai_name = "msm-stub-tx",
6195 .no_pcm = 1,
6196 .dpcm_capture = 1,
6197 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6198 .be_hw_params_fixup = msm_be_hw_params_fixup,
6199 .ignore_suspend = 1,
6200 },
6201 /* Incall Record Downlink BACK END DAI Link */
6202 {
6203 .name = LPASS_BE_INCALL_RECORD_RX,
6204 .stream_name = "Voice Downlink Capture",
6205 .cpu_dai_name = "msm-dai-q6-dev.32771",
6206 .platform_name = "msm-pcm-routing",
6207 .codec_name = "msm-stub-codec.1",
6208 .codec_dai_name = "msm-stub-tx",
6209 .no_pcm = 1,
6210 .dpcm_capture = 1,
6211 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6212 .be_hw_params_fixup = msm_be_hw_params_fixup,
6213 .ignore_suspend = 1,
6214 },
6215 /* Incall Music BACK END DAI Link */
6216 {
6217 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6218 .stream_name = "Voice Farend Playback",
6219 .cpu_dai_name = "msm-dai-q6-dev.32773",
6220 .platform_name = "msm-pcm-routing",
6221 .codec_name = "msm-stub-codec.1",
6222 .codec_dai_name = "msm-stub-rx",
6223 .no_pcm = 1,
6224 .dpcm_playback = 1,
6225 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6226 .be_hw_params_fixup = msm_be_hw_params_fixup,
6227 .ignore_suspend = 1,
6228 .ignore_pmdown_time = 1,
6229 },
6230 /* Incall Music 2 BACK END DAI Link */
6231 {
6232 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6233 .stream_name = "Voice2 Farend Playback",
6234 .cpu_dai_name = "msm-dai-q6-dev.32770",
6235 .platform_name = "msm-pcm-routing",
6236 .codec_name = "msm-stub-codec.1",
6237 .codec_dai_name = "msm-stub-rx",
6238 .no_pcm = 1,
6239 .dpcm_playback = 1,
6240 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6241 .be_hw_params_fixup = msm_be_hw_params_fixup,
6242 .ignore_suspend = 1,
6243 .ignore_pmdown_time = 1,
6244 },
Jaideep Sharma2ef4fb22020-03-11 22:29:11 +0530[diff] [blame]6245 /* Proxy Tx BACK END DAI Link */
6246 {
6247 .name = LPASS_BE_PROXY_TX,
6248 .stream_name = "Proxy Capture",
6249 .cpu_dai_name = "msm-dai-q6-dev.8195",
6250 .platform_name = "msm-pcm-routing",
6251 .codec_name = "msm-stub-codec.1",
6252 .codec_dai_name = "msm-stub-tx",
6253 .no_pcm = 1,
6254 .dpcm_capture = 1,
6255 .id = MSM_BACKEND_DAI_PROXY_TX,
6256 .ignore_suspend = 1,
6257 },
6258 /* Proxy Rx BACK END DAI Link */
6259 {
6260 .name = LPASS_BE_PROXY_RX,
6261 .stream_name = "Proxy Playback",
6262 .cpu_dai_name = "msm-dai-q6-dev.8194",
6263 .platform_name = "msm-pcm-routing",
6264 .codec_name = "msm-stub-codec.1",
6265 .codec_dai_name = "msm-stub-rx",
6266 .no_pcm = 1,
6267 .dpcm_playback = 1,
6268 .id = MSM_BACKEND_DAI_PROXY_RX,
6269 .ignore_pmdown_time = 1,
6270 .ignore_suspend = 1,
6271 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6272 {
6273 .name = LPASS_BE_USB_AUDIO_RX,
6274 .stream_name = "USB Audio Playback",
6275 .cpu_dai_name = "msm-dai-q6-dev.28672",
6276 .platform_name = "msm-pcm-routing",
6277 .codec_name = "msm-stub-codec.1",
6278 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6279 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6280 .no_pcm = 1,
6281 .dpcm_playback = 1,
6282 .id = MSM_BACKEND_DAI_USB_RX,
6283 .be_hw_params_fixup = msm_be_hw_params_fixup,
6284 .ignore_pmdown_time = 1,
6285 .ignore_suspend = 1,
6286 },
6287 {
6288 .name = LPASS_BE_USB_AUDIO_TX,
6289 .stream_name = "USB Audio Capture",
6290 .cpu_dai_name = "msm-dai-q6-dev.28673",
6291 .platform_name = "msm-pcm-routing",
6292 .codec_name = "msm-stub-codec.1",
6293 .codec_dai_name = "msm-stub-tx",
6294 .no_pcm = 1,
6295 .dpcm_capture = 1,
6296 .id = MSM_BACKEND_DAI_USB_TX,
6297 .be_hw_params_fixup = msm_be_hw_params_fixup,
6298 .ignore_suspend = 1,
6299 },
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]6300};
6301
6302
6303static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6304 {
6305 .name = LPASS_BE_PRI_TDM_RX_0,
6306 .stream_name = "Primary TDM0 Playback",
6307 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6308 .platform_name = "msm-pcm-routing",
6309 .codec_name = "msm-stub-codec.1",
6310 .codec_dai_name = "msm-stub-rx",
6311 .no_pcm = 1,
6312 .dpcm_playback = 1,
6313 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6314 .be_hw_params_fixup = msm_be_hw_params_fixup,
6315 .ops = &kona_tdm_be_ops,
6316 .ignore_suspend = 1,
6317 .ignore_pmdown_time = 1,
6318 },
6319 {
6320 .name = LPASS_BE_PRI_TDM_TX_0,
6321 .stream_name = "Primary TDM0 Capture",
6322 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6323 .platform_name = "msm-pcm-routing",
6324 .codec_name = "msm-stub-codec.1",
6325 .codec_dai_name = "msm-stub-tx",
6326 .no_pcm = 1,
6327 .dpcm_capture = 1,
6328 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6329 .be_hw_params_fixup = msm_be_hw_params_fixup,
6330 .ops = &kona_tdm_be_ops,
6331 .ignore_suspend = 1,
6332 },
6333 {
6334 .name = LPASS_BE_SEC_TDM_RX_0,
6335 .stream_name = "Secondary TDM0 Playback",
6336 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6337 .platform_name = "msm-pcm-routing",
6338 .codec_name = "msm-stub-codec.1",
6339 .codec_dai_name = "msm-stub-rx",
6340 .no_pcm = 1,
6341 .dpcm_playback = 1,
6342 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6343 .be_hw_params_fixup = msm_be_hw_params_fixup,
6344 .ops = &kona_tdm_be_ops,
6345 .ignore_suspend = 1,
6346 .ignore_pmdown_time = 1,
6347 },
6348 {
6349 .name = LPASS_BE_SEC_TDM_TX_0,
6350 .stream_name = "Secondary TDM0 Capture",
6351 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6352 .platform_name = "msm-pcm-routing",
6353 .codec_name = "msm-stub-codec.1",
6354 .codec_dai_name = "msm-stub-tx",
6355 .no_pcm = 1,
6356 .dpcm_capture = 1,
6357 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6358 .be_hw_params_fixup = msm_be_hw_params_fixup,
6359 .ops = &kona_tdm_be_ops,
6360 .ignore_suspend = 1,
6361 },
6362 {
6363 .name = LPASS_BE_TERT_TDM_RX_0,
6364 .stream_name = "Tertiary TDM0 Playback",
6365 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6366 .platform_name = "msm-pcm-routing",
6367 .codec_name = "msm-stub-codec.1",
6368 .codec_dai_name = "msm-stub-rx",
6369 .no_pcm = 1,
6370 .dpcm_playback = 1,
6371 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6372 .be_hw_params_fixup = msm_be_hw_params_fixup,
6373 .ops = &kona_tdm_be_ops,
6374 .ignore_suspend = 1,
6375 .ignore_pmdown_time = 1,
6376 },
6377 {
6378 .name = LPASS_BE_TERT_TDM_TX_0,
6379 .stream_name = "Tertiary TDM0 Capture",
6380 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6381 .platform_name = "msm-pcm-routing",
6382 .codec_name = "msm-stub-codec.1",
6383 .codec_dai_name = "msm-stub-tx",
6384 .no_pcm = 1,
6385 .dpcm_capture = 1,
6386 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6387 .be_hw_params_fixup = msm_be_hw_params_fixup,
6388 .ops = &kona_tdm_be_ops,
6389 .ignore_suspend = 1,
6390 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6391 {
6392 .name = LPASS_BE_QUAT_TDM_RX_0,
6393 .stream_name = "Quaternary TDM0 Playback",
6394 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6395 .platform_name = "msm-pcm-routing",
6396 .codec_name = "msm-stub-codec.1",
6397 .codec_dai_name = "msm-stub-rx",
6398 .no_pcm = 1,
6399 .dpcm_playback = 1,
6400 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6401 .be_hw_params_fixup = msm_be_hw_params_fixup,
6402 .ops = &kona_tdm_be_ops,
6403 .ignore_suspend = 1,
6404 .ignore_pmdown_time = 1,
6405 },
6406 {
6407 .name = LPASS_BE_QUAT_TDM_TX_0,
6408 .stream_name = "Quaternary TDM0 Capture",
6409 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6410 .platform_name = "msm-pcm-routing",
6411 .codec_name = "msm-stub-codec.1",
6412 .codec_dai_name = "msm-stub-tx",
6413 .no_pcm = 1,
6414 .dpcm_capture = 1,
6415 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6416 .be_hw_params_fixup = msm_be_hw_params_fixup,
6417 .ops = &kona_tdm_be_ops,
6418 .ignore_suspend = 1,
6419 },
6420 {
6421 .name = LPASS_BE_QUIN_TDM_RX_0,
6422 .stream_name = "Quinary TDM0 Playback",
6423 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6424 .platform_name = "msm-pcm-routing",
6425 .codec_name = "msm-stub-codec.1",
6426 .codec_dai_name = "msm-stub-rx",
6427 .no_pcm = 1,
6428 .dpcm_playback = 1,
6429 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6430 .be_hw_params_fixup = msm_be_hw_params_fixup,
6431 .ops = &kona_tdm_be_ops,
6432 .ignore_suspend = 1,
6433 .ignore_pmdown_time = 1,
6434 },
6435 {
6436 .name = LPASS_BE_QUIN_TDM_TX_0,
6437 .stream_name = "Quinary TDM0 Capture",
6438 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6439 .platform_name = "msm-pcm-routing",
6440 .codec_name = "msm-stub-codec.1",
6441 .codec_dai_name = "msm-stub-tx",
6442 .no_pcm = 1,
6443 .dpcm_capture = 1,
6444 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6445 .be_hw_params_fixup = msm_be_hw_params_fixup,
6446 .ops = &kona_tdm_be_ops,
6447 .ignore_suspend = 1,
6448 },
6449 {
6450 .name = LPASS_BE_SEN_TDM_RX_0,
6451 .stream_name = "Senary TDM0 Playback",
6452 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6453 .platform_name = "msm-pcm-routing",
6454 .codec_name = "msm-stub-codec.1",
6455 .codec_dai_name = "msm-stub-rx",
6456 .no_pcm = 1,
6457 .dpcm_playback = 1,
6458 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6459 .be_hw_params_fixup = msm_be_hw_params_fixup,
6460 .ops = &kona_tdm_be_ops,
6461 .ignore_suspend = 1,
6462 .ignore_pmdown_time = 1,
6463 },
6464 {
6465 .name = LPASS_BE_SEN_TDM_TX_0,
6466 .stream_name = "Senary TDM0 Capture",
6467 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6468 .platform_name = "msm-pcm-routing",
6469 .codec_name = "msm-stub-codec.1",
6470 .codec_dai_name = "msm-stub-tx",
6471 .no_pcm = 1,
6472 .dpcm_capture = 1,
6473 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6474 .be_hw_params_fixup = msm_be_hw_params_fixup,
6475 .ops = &kona_tdm_be_ops,
6476 .ignore_suspend = 1,
6477 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6478};
6479
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6480static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6481 {
6482 .name = LPASS_BE_SLIMBUS_7_RX,
6483 .stream_name = "Slimbus7 Playback",
6484 .cpu_dai_name = "msm-dai-q6-dev.16398",
6485 .platform_name = "msm-pcm-routing",
6486 .codec_name = "btfmslim_slave",
6487 /* BT codec driver determines capabilities based on
6488 * dai name, bt codecdai name should always contains
6489 * supported usecase information
6490 */
6491 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6492 .no_pcm = 1,
6493 .dpcm_playback = 1,
6494 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6495 .be_hw_params_fixup = msm_be_hw_params_fixup,
6496 .init = &msm_wcn_init,
6497 .ops = &msm_wcn_ops,
6498 /* dai link has playback support */
6499 .ignore_pmdown_time = 1,
6500 .ignore_suspend = 1,
6501 },
6502 {
6503 .name = LPASS_BE_SLIMBUS_7_TX,
6504 .stream_name = "Slimbus7 Capture",
6505 .cpu_dai_name = "msm-dai-q6-dev.16399",
6506 .platform_name = "msm-pcm-routing",
6507 .codec_name = "btfmslim_slave",
6508 .codec_dai_name = "btfm_bt_sco_slim_tx",
6509 .no_pcm = 1,
6510 .dpcm_capture = 1,
6511 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6512 .be_hw_params_fixup = msm_be_hw_params_fixup,
6513 .ops = &msm_wcn_ops,
6514 .ignore_suspend = 1,
6515 },
6516};
6517
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6518static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6519 {
6520 .name = LPASS_BE_SLIMBUS_7_RX,
6521 .stream_name = "Slimbus7 Playback",
6522 .cpu_dai_name = "msm-dai-q6-dev.16398",
6523 .platform_name = "msm-pcm-routing",
6524 .codec_name = "btfmslim_slave",
6525 /* BT codec driver determines capabilities based on
6526 * dai name, bt codecdai name should always contains
6527 * supported usecase information
6528 */
6529 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6530 .no_pcm = 1,
6531 .dpcm_playback = 1,
6532 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6533 .be_hw_params_fixup = msm_be_hw_params_fixup,
6534 .init = &msm_wcn_init_lito,
6535 .ops = &msm_wcn_ops_lito,
6536 /* dai link has playback support */
6537 .ignore_pmdown_time = 1,
6538 .ignore_suspend = 1,
6539 },
6540 {
6541 .name = LPASS_BE_SLIMBUS_7_TX,
6542 .stream_name = "Slimbus7 Capture",
6543 .cpu_dai_name = "msm-dai-q6-dev.16399",
6544 .platform_name = "msm-pcm-routing",
6545 .codec_name = "btfmslim_slave",
6546 .codec_dai_name = "btfm_bt_sco_slim_tx",
6547 .no_pcm = 1,
6548 .dpcm_capture = 1,
6549 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6550 .be_hw_params_fixup = msm_be_hw_params_fixup,
6551 .ops = &msm_wcn_ops_lito,
6552 .ignore_suspend = 1,
6553 },
6554 {
6555 .name = LPASS_BE_SLIMBUS_8_TX,
6556 .stream_name = "Slimbus8 Capture",
6557 .cpu_dai_name = "msm-dai-q6-dev.16401",
6558 .platform_name = "msm-pcm-routing",
6559 .codec_name = "btfmslim_slave",
6560 .codec_dai_name = "btfm_fm_slim_tx",
6561 .no_pcm = 1,
6562 .dpcm_capture = 1,
6563 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6564 .be_hw_params_fixup = msm_be_hw_params_fixup,
6565 .ops = &msm_wcn_ops_lito,
6566 .ignore_suspend = 1,
6567 },
6568};
6569
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6570static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6571 /* DISP PORT BACK END DAI Link */
6572 {
6573 .name = LPASS_BE_DISPLAY_PORT,
6574 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6575 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6576 .platform_name = "msm-pcm-routing",
6577 .codec_name = "msm-ext-disp-audio-codec-rx",
6578 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6579 .no_pcm = 1,
6580 .dpcm_playback = 1,
6581 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6582 .be_hw_params_fixup = msm_be_hw_params_fixup,
6583 .ignore_pmdown_time = 1,
6584 .ignore_suspend = 1,
6585 },
6586 /* DISP PORT 1 BACK END DAI Link */
6587 {
6588 .name = LPASS_BE_DISPLAY_PORT1,
6589 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6590 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6591 .platform_name = "msm-pcm-routing",
6592 .codec_name = "msm-ext-disp-audio-codec-rx",
6593 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6594 .no_pcm = 1,
6595 .dpcm_playback = 1,
6596 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6597 .be_hw_params_fixup = msm_be_hw_params_fixup,
6598 .ignore_pmdown_time = 1,
6599 .ignore_suspend = 1,
6600 },
6601};
6602
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6603static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6604 {
6605 .name = LPASS_BE_PRI_MI2S_RX,
6606 .stream_name = "Primary MI2S Playback",
6607 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6608 .platform_name = "msm-pcm-routing",
6609 .codec_name = "msm-stub-codec.1",
6610 .codec_dai_name = "msm-stub-rx",
6611 .no_pcm = 1,
6612 .dpcm_playback = 1,
6613 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6614 .be_hw_params_fixup = msm_be_hw_params_fixup,
6615 .ops = &msm_mi2s_be_ops,
6616 .ignore_suspend = 1,
6617 .ignore_pmdown_time = 1,
6618 },
6619 {
6620 .name = LPASS_BE_PRI_MI2S_TX,
6621 .stream_name = "Primary MI2S Capture",
6622 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6623 .platform_name = "msm-pcm-routing",
6624 .codec_name = "msm-stub-codec.1",
6625 .codec_dai_name = "msm-stub-tx",
6626 .no_pcm = 1,
6627 .dpcm_capture = 1,
6628 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6629 .be_hw_params_fixup = msm_be_hw_params_fixup,
6630 .ops = &msm_mi2s_be_ops,
6631 .ignore_suspend = 1,
6632 },
6633 {
6634 .name = LPASS_BE_SEC_MI2S_RX,
6635 .stream_name = "Secondary MI2S Playback",
6636 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6637 .platform_name = "msm-pcm-routing",
6638 .codec_name = "msm-stub-codec.1",
6639 .codec_dai_name = "msm-stub-rx",
6640 .no_pcm = 1,
6641 .dpcm_playback = 1,
6642 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6643 .be_hw_params_fixup = msm_be_hw_params_fixup,
6644 .ops = &msm_mi2s_be_ops,
6645 .ignore_suspend = 1,
6646 .ignore_pmdown_time = 1,
6647 },
6648 {
6649 .name = LPASS_BE_SEC_MI2S_TX,
6650 .stream_name = "Secondary MI2S Capture",
6651 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6652 .platform_name = "msm-pcm-routing",
6653 .codec_name = "msm-stub-codec.1",
6654 .codec_dai_name = "msm-stub-tx",
6655 .no_pcm = 1,
6656 .dpcm_capture = 1,
6657 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6658 .be_hw_params_fixup = msm_be_hw_params_fixup,
6659 .ops = &msm_mi2s_be_ops,
6660 .ignore_suspend = 1,
6661 },
6662 {
6663 .name = LPASS_BE_TERT_MI2S_RX,
6664 .stream_name = "Tertiary MI2S Playback",
6665 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6666 .platform_name = "msm-pcm-routing",
6667 .codec_name = "msm-stub-codec.1",
6668 .codec_dai_name = "msm-stub-rx",
6669 .no_pcm = 1,
6670 .dpcm_playback = 1,
6671 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6672 .be_hw_params_fixup = msm_be_hw_params_fixup,
6673 .ops = &msm_mi2s_be_ops,
6674 .ignore_suspend = 1,
6675 .ignore_pmdown_time = 1,
6676 },
6677 {
6678 .name = LPASS_BE_TERT_MI2S_TX,
6679 .stream_name = "Tertiary MI2S Capture",
6680 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6681 .platform_name = "msm-pcm-routing",
6682 .codec_name = "msm-stub-codec.1",
6683 .codec_dai_name = "msm-stub-tx",
6684 .no_pcm = 1,
6685 .dpcm_capture = 1,
6686 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6687 .be_hw_params_fixup = msm_be_hw_params_fixup,
6688 .ops = &msm_mi2s_be_ops,
6689 .ignore_suspend = 1,
6690 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6691 {
6692 .name = LPASS_BE_QUAT_MI2S_RX,
6693 .stream_name = "Quaternary MI2S Playback",
6694 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6695 .platform_name = "msm-pcm-routing",
6696 .codec_name = "msm-stub-codec.1",
6697 .codec_dai_name = "msm-stub-rx",
6698 .no_pcm = 1,
6699 .dpcm_playback = 1,
6700 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6701 .be_hw_params_fixup = msm_be_hw_params_fixup,
6702 .ops = &msm_mi2s_be_ops,
6703 .ignore_suspend = 1,
6704 .ignore_pmdown_time = 1,
6705 },
6706 {
6707 .name = LPASS_BE_QUAT_MI2S_TX,
6708 .stream_name = "Quaternary MI2S Capture",
6709 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6710 .platform_name = "msm-pcm-routing",
6711 .codec_name = "msm-stub-codec.1",
6712 .codec_dai_name = "msm-stub-tx",
6713 .no_pcm = 1,
6714 .dpcm_capture = 1,
6715 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6716 .be_hw_params_fixup = msm_be_hw_params_fixup,
6717 .ops = &msm_mi2s_be_ops,
6718 .ignore_suspend = 1,
6719 },
6720 {
6721 .name = LPASS_BE_QUIN_MI2S_RX,
6722 .stream_name = "Quinary MI2S Playback",
6723 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6724 .platform_name = "msm-pcm-routing",
6725 .codec_name = "msm-stub-codec.1",
6726 .codec_dai_name = "msm-stub-rx",
6727 .no_pcm = 1,
6728 .dpcm_playback = 1,
6729 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6730 .be_hw_params_fixup = msm_be_hw_params_fixup,
6731 .ops = &msm_mi2s_be_ops,
6732 .ignore_suspend = 1,
6733 .ignore_pmdown_time = 1,
6734 },
6735 {
6736 .name = LPASS_BE_QUIN_MI2S_TX,
6737 .stream_name = "Quinary MI2S Capture",
6738 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6739 .platform_name = "msm-pcm-routing",
6740 .codec_name = "msm-stub-codec.1",
6741 .codec_dai_name = "msm-stub-tx",
6742 .no_pcm = 1,
6743 .dpcm_capture = 1,
6744 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6745 .be_hw_params_fixup = msm_be_hw_params_fixup,
6746 .ops = &msm_mi2s_be_ops,
6747 .ignore_suspend = 1,
6748 },
6749 {
6750 .name = LPASS_BE_SENARY_MI2S_RX,
6751 .stream_name = "Senary MI2S Playback",
6752 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6753 .platform_name = "msm-pcm-routing",
6754 .codec_name = "msm-stub-codec.1",
6755 .codec_dai_name = "msm-stub-rx",
6756 .no_pcm = 1,
6757 .dpcm_playback = 1,
6758 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6759 .be_hw_params_fixup = msm_be_hw_params_fixup,
6760 .ops = &msm_mi2s_be_ops,
6761 .ignore_suspend = 1,
6762 .ignore_pmdown_time = 1,
6763 },
6764 {
6765 .name = LPASS_BE_SENARY_MI2S_TX,
6766 .stream_name = "Senary MI2S Capture",
6767 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6768 .platform_name = "msm-pcm-routing",
6769 .codec_name = "msm-stub-codec.1",
6770 .codec_dai_name = "msm-stub-tx",
6771 .no_pcm = 1,
6772 .dpcm_capture = 1,
6773 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6774 .be_hw_params_fixup = msm_be_hw_params_fixup,
6775 .ops = &msm_mi2s_be_ops,
6776 .ignore_suspend = 1,
6777 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6778};
6779
6780static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6781 /* Primary AUX PCM Backend DAI Links */
6782 {
6783 .name = LPASS_BE_AUXPCM_RX,
6784 .stream_name = "AUX PCM Playback",
6785 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6786 .platform_name = "msm-pcm-routing",
6787 .codec_name = "msm-stub-codec.1",
6788 .codec_dai_name = "msm-stub-rx",
6789 .no_pcm = 1,
6790 .dpcm_playback = 1,
6791 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6792 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6793 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6794 .ignore_pmdown_time = 1,
6795 .ignore_suspend = 1,
6796 },
6797 {
6798 .name = LPASS_BE_AUXPCM_TX,
6799 .stream_name = "AUX PCM Capture",
6800 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6801 .platform_name = "msm-pcm-routing",
6802 .codec_name = "msm-stub-codec.1",
6803 .codec_dai_name = "msm-stub-tx",
6804 .no_pcm = 1,
6805 .dpcm_capture = 1,
6806 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6807 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6808 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6809 .ignore_suspend = 1,
6810 },
6811 /* Secondary AUX PCM Backend DAI Links */
6812 {
6813 .name = LPASS_BE_SEC_AUXPCM_RX,
6814 .stream_name = "Sec AUX PCM Playback",
6815 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6816 .platform_name = "msm-pcm-routing",
6817 .codec_name = "msm-stub-codec.1",
6818 .codec_dai_name = "msm-stub-rx",
6819 .no_pcm = 1,
6820 .dpcm_playback = 1,
6821 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6822 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6823 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6824 .ignore_pmdown_time = 1,
6825 .ignore_suspend = 1,
6826 },
6827 {
6828 .name = LPASS_BE_SEC_AUXPCM_TX,
6829 .stream_name = "Sec AUX PCM Capture",
6830 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6831 .platform_name = "msm-pcm-routing",
6832 .codec_name = "msm-stub-codec.1",
6833 .codec_dai_name = "msm-stub-tx",
6834 .no_pcm = 1,
6835 .dpcm_capture = 1,
6836 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6837 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6838 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6839 .ignore_suspend = 1,
6840 },
6841 /* Tertiary AUX PCM Backend DAI Links */
6842 {
6843 .name = LPASS_BE_TERT_AUXPCM_RX,
6844 .stream_name = "Tert AUX PCM Playback",
6845 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6846 .platform_name = "msm-pcm-routing",
6847 .codec_name = "msm-stub-codec.1",
6848 .codec_dai_name = "msm-stub-rx",
6849 .no_pcm = 1,
6850 .dpcm_playback = 1,
6851 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6852 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6853 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6854 .ignore_suspend = 1,
6855 },
6856 {
6857 .name = LPASS_BE_TERT_AUXPCM_TX,
6858 .stream_name = "Tert AUX PCM Capture",
6859 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6860 .platform_name = "msm-pcm-routing",
6861 .codec_name = "msm-stub-codec.1",
6862 .codec_dai_name = "msm-stub-tx",
6863 .no_pcm = 1,
6864 .dpcm_capture = 1,
6865 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6866 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6867 .ops = &kona_aux_be_ops,
6868 .ignore_suspend = 1,
6869 },
6870 /* Quaternary AUX PCM Backend DAI Links */
6871 {
6872 .name = LPASS_BE_QUAT_AUXPCM_RX,
6873 .stream_name = "Quat AUX PCM Playback",
6874 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6875 .platform_name = "msm-pcm-routing",
6876 .codec_name = "msm-stub-codec.1",
6877 .codec_dai_name = "msm-stub-rx",
6878 .no_pcm = 1,
6879 .dpcm_playback = 1,
6880 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6881 .be_hw_params_fixup = msm_be_hw_params_fixup,
6882 .ops = &kona_aux_be_ops,
6883 .ignore_suspend = 1,
6884 },
6885 {
6886 .name = LPASS_BE_QUAT_AUXPCM_TX,
6887 .stream_name = "Quat AUX PCM Capture",
6888 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6889 .platform_name = "msm-pcm-routing",
6890 .codec_name = "msm-stub-codec.1",
6891 .codec_dai_name = "msm-stub-tx",
6892 .no_pcm = 1,
6893 .dpcm_capture = 1,
6894 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
6895 .be_hw_params_fixup = msm_be_hw_params_fixup,
6896 .ops = &kona_aux_be_ops,
6897 .ignore_suspend = 1,
6898 },
6899 /* Quinary AUX PCM Backend DAI Links */
6900 {
6901 .name = LPASS_BE_QUIN_AUXPCM_RX,
6902 .stream_name = "Quin AUX PCM Playback",
6903 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6904 .platform_name = "msm-pcm-routing",
6905 .codec_name = "msm-stub-codec.1",
6906 .codec_dai_name = "msm-stub-rx",
6907 .no_pcm = 1,
6908 .dpcm_playback = 1,
6909 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
6910 .be_hw_params_fixup = msm_be_hw_params_fixup,
6911 .ops = &kona_aux_be_ops,
6912 .ignore_suspend = 1,
6913 },
6914 {
6915 .name = LPASS_BE_QUIN_AUXPCM_TX,
6916 .stream_name = "Quin AUX PCM Capture",
6917 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6918 .platform_name = "msm-pcm-routing",
6919 .codec_name = "msm-stub-codec.1",
6920 .codec_dai_name = "msm-stub-tx",
6921 .no_pcm = 1,
6922 .dpcm_capture = 1,
6923 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
6924 .be_hw_params_fixup = msm_be_hw_params_fixup,
6925 .ops = &kona_aux_be_ops,
6926 .ignore_suspend = 1,
6927 },
6928 /* Senary AUX PCM Backend DAI Links */
6929 {
6930 .name = LPASS_BE_SEN_AUXPCM_RX,
6931 .stream_name = "Sen AUX PCM Playback",
6932 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6933 .platform_name = "msm-pcm-routing",
6934 .codec_name = "msm-stub-codec.1",
6935 .codec_dai_name = "msm-stub-rx",
6936 .no_pcm = 1,
6937 .dpcm_playback = 1,
6938 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
6939 .be_hw_params_fixup = msm_be_hw_params_fixup,
6940 .ops = &kona_aux_be_ops,
6941 .ignore_suspend = 1,
6942 },
6943 {
6944 .name = LPASS_BE_SEN_AUXPCM_TX,
6945 .stream_name = "Sen AUX PCM Capture",
6946 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6947 .platform_name = "msm-pcm-routing",
6948 .codec_name = "msm-stub-codec.1",
6949 .codec_dai_name = "msm-stub-tx",
6950 .no_pcm = 1,
6951 .dpcm_capture = 1,
6952 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
6953 .be_hw_params_fixup = msm_be_hw_params_fixup,
6954 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6955 .ignore_suspend = 1,
6956 },
6957};
6958
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6959static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
6960 /* WSA CDC DMA Backend DAI Links */
6961 {
6962 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
6963 .stream_name = "WSA CDC DMA0 Playback",
6964 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
6965 .platform_name = "msm-pcm-routing",
6966 .codec_name = "bolero_codec",
6967 .codec_dai_name = "wsa_macro_rx1",
6968 .no_pcm = 1,
6969 .dpcm_playback = 1,
6970 .init = &msm_int_audrx_init,
6971 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
6972 .be_hw_params_fixup = msm_be_hw_params_fixup,
6973 .ignore_pmdown_time = 1,
6974 .ignore_suspend = 1,
6975 .ops = &msm_cdc_dma_be_ops,
6976 },
6977 {
6978 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
6979 .stream_name = "WSA CDC DMA1 Playback",
6980 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
6981 .platform_name = "msm-pcm-routing",
6982 .codec_name = "bolero_codec",
6983 .codec_dai_name = "wsa_macro_rx_mix",
6984 .no_pcm = 1,
6985 .dpcm_playback = 1,
6986 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
6987 .be_hw_params_fixup = msm_be_hw_params_fixup,
6988 .ignore_pmdown_time = 1,
6989 .ignore_suspend = 1,
6990 .ops = &msm_cdc_dma_be_ops,
6991 },
6992 {
6993 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
6994 .stream_name = "WSA CDC DMA1 Capture",
6995 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
6996 .platform_name = "msm-pcm-routing",
6997 .codec_name = "bolero_codec",
6998 .codec_dai_name = "wsa_macro_echo",
6999 .no_pcm = 1,
7000 .dpcm_capture = 1,
7001 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7002 .be_hw_params_fixup = msm_be_hw_params_fixup,
7003 .ignore_suspend = 1,
7004 .ops = &msm_cdc_dma_be_ops,
7005 },
7006};
7007
7008static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7009 /* RX CDC DMA Backend DAI Links */
7010 {
7011 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7012 .stream_name = "RX CDC DMA0 Playback",
7013 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
7014 .platform_name = "msm-pcm-routing",
7015 .codec_name = "bolero_codec",
7016 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7017 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7018 .no_pcm = 1,
7019 .dpcm_playback = 1,
7020 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7021 .be_hw_params_fixup = msm_be_hw_params_fixup,
7022 .ignore_pmdown_time = 1,
7023 .ignore_suspend = 1,
7024 .ops = &msm_cdc_dma_be_ops,
7025 },
7026 {
7027 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7028 .stream_name = "RX CDC DMA1 Playback",
7029 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
7030 .platform_name = "msm-pcm-routing",
7031 .codec_name = "bolero_codec",
7032 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7033 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7034 .no_pcm = 1,
7035 .dpcm_playback = 1,
7036 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7037 .be_hw_params_fixup = msm_be_hw_params_fixup,
7038 .ignore_pmdown_time = 1,
7039 .ignore_suspend = 1,
7040 .ops = &msm_cdc_dma_be_ops,
7041 },
7042 {
7043 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7044 .stream_name = "RX CDC DMA2 Playback",
7045 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
7046 .platform_name = "msm-pcm-routing",
7047 .codec_name = "bolero_codec",
7048 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7049 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7050 .no_pcm = 1,
7051 .dpcm_playback = 1,
7052 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7053 .be_hw_params_fixup = msm_be_hw_params_fixup,
7054 .ignore_pmdown_time = 1,
7055 .ignore_suspend = 1,
7056 .ops = &msm_cdc_dma_be_ops,
7057 },
7058 {
7059 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7060 .stream_name = "RX CDC DMA3 Playback",
7061 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
7062 .platform_name = "msm-pcm-routing",
7063 .codec_name = "bolero_codec",
7064 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7065 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7066 .no_pcm = 1,
7067 .dpcm_playback = 1,
7068 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7069 .be_hw_params_fixup = msm_be_hw_params_fixup,
7070 .ignore_pmdown_time = 1,
7071 .ignore_suspend = 1,
7072 .ops = &msm_cdc_dma_be_ops,
7073 },
7074 /* TX CDC DMA Backend DAI Links */
7075 {
7076 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7077 .stream_name = "TX CDC DMA3 Capture",
7078 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
7079 .platform_name = "msm-pcm-routing",
7080 .codec_name = "bolero_codec",
7081 .codec_dai_name = "tx_macro_tx1",
7082 .no_pcm = 1,
7083 .dpcm_capture = 1,
7084 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7085 .be_hw_params_fixup = msm_be_hw_params_fixup,
7086 .ignore_suspend = 1,
7087 .ops = &msm_cdc_dma_be_ops,
7088 },
7089 {
7090 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7091 .stream_name = "TX CDC DMA4 Capture",
7092 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
7093 .platform_name = "msm-pcm-routing",
7094 .codec_name = "bolero_codec",
7095 .codec_dai_name = "tx_macro_tx2",
7096 .no_pcm = 1,
7097 .dpcm_capture = 1,
7098 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7099 .be_hw_params_fixup = msm_be_hw_params_fixup,
7100 .ignore_suspend = 1,
7101 .ops = &msm_cdc_dma_be_ops,
7102 },
7103};
7104
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7105static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
7106 {
7107 .name = LPASS_BE_VA_CDC_DMA_TX_0,
7108 .stream_name = "VA CDC DMA0 Capture",
7109 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
7110 .platform_name = "msm-pcm-routing",
7111 .codec_name = "bolero_codec",
7112 .codec_dai_name = "va_macro_tx1",
7113 .no_pcm = 1,
7114 .dpcm_capture = 1,
7115 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
7116 .be_hw_params_fixup = msm_be_hw_params_fixup,
7117 .ignore_suspend = 1,
7118 .ops = &msm_cdc_dma_be_ops,
7119 },
7120 {
7121 .name = LPASS_BE_VA_CDC_DMA_TX_1,
7122 .stream_name = "VA CDC DMA1 Capture",
7123 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
7124 .platform_name = "msm-pcm-routing",
7125 .codec_name = "bolero_codec",
7126 .codec_dai_name = "va_macro_tx2",
7127 .no_pcm = 1,
7128 .dpcm_capture = 1,
7129 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
7130 .be_hw_params_fixup = msm_be_hw_params_fixup,
7131 .ignore_suspend = 1,
7132 .ops = &msm_cdc_dma_be_ops,
7133 },
7134 {
7135 .name = LPASS_BE_VA_CDC_DMA_TX_2,
7136 .stream_name = "VA CDC DMA2 Capture",
7137 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
7138 .platform_name = "msm-pcm-routing",
7139 .codec_name = "bolero_codec",
7140 .codec_dai_name = "va_macro_tx3",
7141 .no_pcm = 1,
7142 .dpcm_capture = 1,
7143 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
7144 .be_hw_params_fixup = msm_be_hw_params_fixup,
7145 .ignore_suspend = 1,
7146 .ops = &msm_cdc_dma_be_ops,
7147 },
7148};
7149
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7150static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
7151 {
7152 .name = LPASS_BE_AFE_LOOPBACK_TX,
7153 .stream_name = "AFE Loopback Capture",
7154 .cpu_dai_name = "msm-dai-q6-dev.24577",
7155 .platform_name = "msm-pcm-routing",
7156 .codec_name = "msm-stub-codec.1",
7157 .codec_dai_name = "msm-stub-tx",
7158 .no_pcm = 1,
7159 .dpcm_capture = 1,
7160 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
7161 .be_hw_params_fixup = msm_be_hw_params_fixup,
7162 .ignore_pmdown_time = 1,
7163 .ignore_suspend = 1,
7164 },
7165};
7166
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7167static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7168 ARRAY_SIZE(msm_common_dai_links) +
7169 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7170 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7171 ARRAY_SIZE(msm_common_be_dai_links) +
7172 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7173 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7174 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7175 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7176 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
7177 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7178 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7179 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]7180 ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
7181 ARRAY_SIZE(msm_tdm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7182
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7183static int msm_populate_dai_link_component_of_node(
7184 struct snd_soc_card *card)
7185{
7186 int i, index, ret = 0;
7187 struct device *cdev = card->dev;
7188 struct snd_soc_dai_link *dai_link = card->dai_link;
7189 struct device_node *np;
7190
7191 if (!cdev) {
7192 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
7193 return -ENODEV;
7194 }
7195
7196 for (i = 0; i < card->num_links; i++) {
7197 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7198 continue;
7199
7200 /* populate platform_of_node for snd card dai links */
7201 if (dai_link[i].platform_name &&
7202 !dai_link[i].platform_of_node) {
7203 index = of_property_match_string(cdev->of_node,
7204 "asoc-platform-names",
7205 dai_link[i].platform_name);
7206 if (index < 0) {
7207 dev_err(cdev, "%s: No match found for platform name: %s\n",
7208 __func__, dai_link[i].platform_name);
7209 ret = index;
7210 goto err;
7211 }
7212 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7213 index);
7214 if (!np) {
7215 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
7216 __func__, dai_link[i].platform_name,
7217 index);
7218 ret = -ENODEV;
7219 goto err;
7220 }
7221 dai_link[i].platform_of_node = np;
7222 dai_link[i].platform_name = NULL;
7223 }
7224
7225 /* populate cpu_of_node for snd card dai links */
7226 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7227 index = of_property_match_string(cdev->of_node,
7228 "asoc-cpu-names",
7229 dai_link[i].cpu_dai_name);
7230 if (index >= 0) {
7231 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7232 index);
7233 if (!np) {
7234 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
7235 __func__,
7236 dai_link[i].cpu_dai_name);
7237 ret = -ENODEV;
7238 goto err;
7239 }
7240 dai_link[i].cpu_of_node = np;
7241 dai_link[i].cpu_dai_name = NULL;
7242 }
7243 }
7244
7245 /* populate codec_of_node for snd card dai links */
7246 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7247 index = of_property_match_string(cdev->of_node,
7248 "asoc-codec-names",
7249 dai_link[i].codec_name);
7250 if (index < 0)
7251 continue;
7252 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7253 index);
7254 if (!np) {
7255 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
7256 __func__, dai_link[i].codec_name);
7257 ret = -ENODEV;
7258 goto err;
7259 }
7260 dai_link[i].codec_of_node = np;
7261 dai_link[i].codec_name = NULL;
7262 }
7263 }
7264
7265err:
7266 return ret;
7267}
7268
7269static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7270{
7271 int ret = -EINVAL;
7272 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
7273
7274 if (!component) {
7275 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
7276 return ret;
7277 }
7278
7279 ret = snd_soc_add_component_controls(component, msm_snd_controls,
7280 ARRAY_SIZE(msm_snd_controls));
7281 if (ret < 0) {
7282 dev_err(component->dev,
7283 "%s: add_codec_controls failed, err = %d\n",
7284 __func__, ret);
7285 return ret;
7286 }
7287
7288 return ret;
7289}
7290
7291static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7292 struct snd_pcm_hw_params *params)
7293{
7294 return 0;
7295}
7296
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7297static struct snd_soc_ops msm_stub_be_ops = {
7298 .hw_params = msm_snd_stub_hw_params,
7299};
7300
7301struct snd_soc_card snd_soc_card_stub_msm = {
7302 .name = "kona-stub-snd-card",
7303};
7304
7305static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7306 /* FrontEnd DAI Links */
7307 {
7308 .name = "MSMSTUB Media1",
7309 .stream_name = "MultiMedia1",
7310 .cpu_dai_name = "MultiMedia1",
7311 .platform_name = "msm-pcm-dsp.0",
7312 .dynamic = 1,
7313 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7314 .dpcm_playback = 1,
7315 .dpcm_capture = 1,
7316 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7317 SND_SOC_DPCM_TRIGGER_POST},
7318 .codec_dai_name = "snd-soc-dummy-dai",
7319 .codec_name = "snd-soc-dummy",
7320 .ignore_suspend = 1,
7321 /* this dainlink has playback support */
7322 .ignore_pmdown_time = 1,
7323 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7324 },
7325};
7326
7327static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7328 /* Backend DAI Links */
7329 {
7330 .name = LPASS_BE_AUXPCM_RX,
7331 .stream_name = "AUX PCM Playback",
7332 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7333 .platform_name = "msm-pcm-routing",
7334 .codec_name = "msm-stub-codec.1",
7335 .codec_dai_name = "msm-stub-rx",
7336 .no_pcm = 1,
7337 .dpcm_playback = 1,
7338 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7339 .init = &msm_audrx_stub_init,
7340 .be_hw_params_fixup = msm_be_hw_params_fixup,
7341 .ignore_pmdown_time = 1,
7342 .ignore_suspend = 1,
7343 .ops = &msm_stub_be_ops,
7344 },
7345 {
7346 .name = LPASS_BE_AUXPCM_TX,
7347 .stream_name = "AUX PCM Capture",
7348 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7349 .platform_name = "msm-pcm-routing",
7350 .codec_name = "msm-stub-codec.1",
7351 .codec_dai_name = "msm-stub-tx",
7352 .no_pcm = 1,
7353 .dpcm_capture = 1,
7354 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7355 .be_hw_params_fixup = msm_be_hw_params_fixup,
7356 .ignore_suspend = 1,
7357 .ops = &msm_stub_be_ops,
7358 },
7359};
7360
7361static struct snd_soc_dai_link msm_stub_dai_links[
7362 ARRAY_SIZE(msm_stub_fe_dai_links) +
7363 ARRAY_SIZE(msm_stub_be_dai_links)];
7364
7365static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7366 { .compatible = "qcom,kona-asoc-snd",
7367 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7368 { .compatible = "qcom,kona-asoc-snd-stub",
7369 .data = "stub_codec"},
7370 {},
7371};
7372
7373static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7374{
7375 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7376 struct snd_soc_dai_link *dailink = NULL;
7377 int len_1 = 0;
7378 int len_2 = 0;
7379 int total_links = 0;
7380 int rc = 0;
7381 u32 mi2s_audio_intf = 0;
7382 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7383 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7384 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7385 const struct of_device_id *match;
7386
7387 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
7388 if (!match) {
7389 dev_err(dev, "%s: No DT match found for sound card\n",
7390 __func__);
7391 return NULL;
7392 }
7393
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7394 if (!strcmp(match->data, "codec")) {
7395 card = &snd_soc_card_kona_msm;
7396
7397 memcpy(msm_kona_dai_links + total_links,
7398 msm_common_dai_links,
7399 sizeof(msm_common_dai_links));
7400 total_links += ARRAY_SIZE(msm_common_dai_links);
7401
7402 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7403 msm_bolero_fe_dai_links,
7404 sizeof(msm_bolero_fe_dai_links));
7405 total_links +=
7406 ARRAY_SIZE(msm_bolero_fe_dai_links);
7407
7408 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7409 msm_common_misc_fe_dai_links,
7410 sizeof(msm_common_misc_fe_dai_links));
7411 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7412
7413 memcpy(msm_kona_dai_links + total_links,
7414 msm_common_be_dai_links,
7415 sizeof(msm_common_be_dai_links));
7416 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7417
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7418 memcpy(msm_kona_dai_links + total_links,
7419 msm_wsa_cdc_dma_be_dai_links,
7420 sizeof(msm_wsa_cdc_dma_be_dai_links));
7421 total_links +=
7422 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7423
7424 memcpy(msm_kona_dai_links + total_links,
7425 msm_rx_tx_cdc_dma_be_dai_links,
7426 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7427 total_links +=
7428 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7429
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7430 memcpy(msm_kona_dai_links + total_links,
7431 msm_va_cdc_dma_be_dai_links,
7432 sizeof(msm_va_cdc_dma_be_dai_links));
7433 total_links +=
7434 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7435
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7436 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7437 &mi2s_audio_intf);
7438 if (rc) {
7439 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7440 __func__);
7441 } else {
7442 if (mi2s_audio_intf) {
7443 memcpy(msm_kona_dai_links + total_links,
7444 msm_mi2s_be_dai_links,
7445 sizeof(msm_mi2s_be_dai_links));
7446 total_links +=
7447 ARRAY_SIZE(msm_mi2s_be_dai_links);
7448 }
7449 }
7450
7451 rc = of_property_read_u32(dev->of_node,
7452 "qcom,auxpcm-audio-intf",
7453 &auxpcm_audio_intf);
7454 if (rc) {
7455 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7456 __func__);
7457 } else {
7458 if (auxpcm_audio_intf) {
7459 memcpy(msm_kona_dai_links + total_links,
7460 msm_auxpcm_be_dai_links,
7461 sizeof(msm_auxpcm_be_dai_links));
7462 total_links +=
7463 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7464 }
7465 }
7466
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7467 rc = of_property_read_u32(dev->of_node,
7468 "qcom,ext-disp-audio-rx", &val);
7469 if (!rc && val) {
7470 dev_dbg(dev, "%s(): ext disp audio support present\n",
7471 __func__);
7472 memcpy(msm_kona_dai_links + total_links,
7473 ext_disp_be_dai_link,
7474 sizeof(ext_disp_be_dai_link));
7475 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7476 }
7477
7478 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7479 if (!rc && val) {
7480 dev_dbg(dev, "%s(): WCN BT support present\n",
7481 __func__);
7482 memcpy(msm_kona_dai_links + total_links,
7483 msm_wcn_be_dai_links,
7484 sizeof(msm_wcn_be_dai_links));
7485 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7486 }
7487
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7488 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7489 &val);
7490 if (!rc && val) {
7491 memcpy(msm_kona_dai_links + total_links,
7492 msm_afe_rxtx_lb_be_dai_link,
7493 sizeof(msm_afe_rxtx_lb_be_dai_link));
7494 total_links +=
7495 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7496 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7497
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]7498 rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
7499 &val);
7500 if (!rc && val) {
7501 memcpy(msm_kona_dai_links + total_links,
7502 msm_tdm_be_dai_links,
7503 sizeof(msm_tdm_be_dai_links));
7504 total_links +=
7505 ARRAY_SIZE(msm_tdm_be_dai_links);
7506 }
7507
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7508 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7509 &wcn_btfm_intf);
7510 if (rc) {
7511 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7512 __func__);
7513 } else {
7514 if (wcn_btfm_intf) {
7515 memcpy(msm_kona_dai_links + total_links,
7516 msm_wcn_btfm_be_dai_links,
7517 sizeof(msm_wcn_btfm_be_dai_links));
7518 total_links +=
7519 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7520 }
7521 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7522 dailink = msm_kona_dai_links;
7523 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7524 card = &snd_soc_card_stub_msm;
7525 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7526 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7527
7528 memcpy(msm_stub_dai_links,
7529 msm_stub_fe_dai_links,
7530 sizeof(msm_stub_fe_dai_links));
7531 memcpy(msm_stub_dai_links + len_1,
7532 msm_stub_be_dai_links,
7533 sizeof(msm_stub_be_dai_links));
7534
7535 dailink = msm_stub_dai_links;
7536 total_links = len_2;
7537 }
7538
7539 if (card) {
7540 card->dai_link = dailink;
7541 card->num_links = total_links;
7542 }
7543
7544 return card;
7545}
7546
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7547static int msm_wsa881x_init(struct snd_soc_component *component)
7548{
7549 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7550 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7551 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7552 SPKR_L_BOOST, SPKR_L_VI};
7553 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7554 SPKR_R_BOOST, SPKR_R_VI};
7555 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7556 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7557 struct msm_asoc_mach_data *pdata;
7558 struct snd_soc_dapm_context *dapm;
7559 struct snd_card *card;
7560 struct snd_info_entry *entry;
7561 int ret = 0;
7562
7563 if (!component) {
7564 pr_err("%s component is NULL\n", __func__);
7565 return -EINVAL;
7566 }
7567
7568 card = component->card->snd_card;
7569 dapm = snd_soc_component_get_dapm(component);
7570
7571 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7572 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7573 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]7574 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7575 wsa883x_set_channel_map(component, &spkleft_ports[0],
7576 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7577 &ch_rate[0], &spkleft_port_types[0]);
7578 else
7579 wsa881x_set_channel_map(component, &spkleft_ports[0],
7580 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7581 &ch_rate[0], &spkleft_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7582 if (dapm->component) {
7583 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7584 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7585 }
7586 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7587 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7588 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]7589 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7590 wsa883x_set_channel_map(component, &spkright_ports[0],
7591 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7592 &ch_rate[0], &spkright_port_types[0]);
7593 else
7594 wsa881x_set_channel_map(component, &spkright_ports[0],
7595 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7596 &ch_rate[0], &spkright_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7597 if (dapm->component) {
7598 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7599 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7600 }
7601 } else {
7602 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7603 component->name);
7604 ret = -EINVAL;
7605 goto err;
7606 }
7607 pdata = snd_soc_card_get_drvdata(component->card);
7608 if (!pdata->codec_root) {
7609 entry = snd_info_create_subdir(card->module, "codecs",
7610 card->proc_root);
7611 if (!entry) {
7612 pr_err("%s: Cannot create codecs module entry\n",
7613 __func__);
7614 ret = 0;
7615 goto err;
7616 }
7617 pdata->codec_root = entry;
7618 }
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]7619 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7620 wsa883x_codec_info_create_codec_entry(pdata->codec_root,
7621 component);
7622 else
7623 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7624 component);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7625err:
7626 return ret;
7627}
7628
7629static int msm_aux_codec_init(struct snd_soc_component *component)
7630{
7631 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7632 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7633 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7634 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7635 struct snd_info_entry *entry;
7636 struct snd_card *card = component->card->snd_card;
7637 struct msm_asoc_mach_data *pdata;
7638
7639 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7640 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7641 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7642 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7643 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7644 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7645 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7646 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7647 snd_soc_dapm_sync(dapm);
7648
7649 pdata = snd_soc_card_get_drvdata(component->card);
7650 if (!pdata->codec_root) {
7651 entry = snd_info_create_subdir(card->module, "codecs",
7652 card->proc_root);
7653 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7654 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7655 __func__);
7656 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7657 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7658 }
7659 pdata->codec_root = entry;
7660 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7661 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7662
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7663 codec_variant = wcd938x_get_codec_variant(component);
7664 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
7665 if (codec_variant == WCD9380)
7666 ret = snd_soc_add_component_controls(component,
7667 msm_int_wcd9380_snd_controls,
7668 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
7669 else if (codec_variant == WCD9385)
7670 ret = snd_soc_add_component_controls(component,
7671 msm_int_wcd9385_snd_controls,
7672 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
7673
7674 if (ret < 0) {
7675 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
7676 __func__, ret);
7677 return ret;
7678 }
7679
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7680mbhc_cfg_cal:
7681 mbhc_calibration = def_wcd_mbhc_cal();
7682 if (!mbhc_calibration)
7683 return -ENOMEM;
7684 wcd_mbhc_cfg.calibration = mbhc_calibration;
7685 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7686 if (ret) {
7687 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7688 __func__, ret);
7689 goto err_hs_detect;
7690 }
7691 return 0;
7692
7693err_hs_detect:
7694 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7695 return ret;
7696}
7697
7698static int msm_init_aux_dev(struct platform_device *pdev,
7699 struct snd_soc_card *card)
7700{
7701 struct device_node *wsa_of_node;
7702 struct device_node *aux_codec_of_node;
7703 u32 wsa_max_devs;
7704 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7705 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7706 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7707 int i;
Xiao Lid8bb93c2020-01-07 12:59:05 +0800[diff] [blame]7708 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
7709 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7710 const char *auxdev_name_prefix[1];
7711 char *dev_name_str = NULL;
7712 int found = 0;
7713 int codecs_found = 0;
7714 int ret = 0;
7715
7716 /* Get maximum WSA device count for this platform */
7717 ret = of_property_read_u32(pdev->dev.of_node,
7718 "qcom,wsa-max-devs", &wsa_max_devs);
7719 if (ret) {
7720 dev_info(&pdev->dev,
7721 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7722 __func__, pdev->dev.of_node->full_name, ret);
7723 wsa_max_devs = 0;
7724 goto codec_aux_dev;
7725 }
7726 if (wsa_max_devs == 0) {
7727 dev_warn(&pdev->dev,
7728 "%s: Max WSA devices is 0 for this target?\n",
7729 __func__);
7730 goto codec_aux_dev;
7731 }
7732
7733 /* Get count of WSA device phandles for this platform */
7734 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7735 "qcom,wsa-devs", NULL);
7736 if (wsa_dev_cnt == -ENOENT) {
7737 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7738 __func__);
7739 goto err;
7740 } else if (wsa_dev_cnt <= 0) {
7741 dev_err(&pdev->dev,
7742 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7743 __func__, wsa_dev_cnt);
7744 ret = -EINVAL;
7745 goto err;
7746 }
7747
7748 /*
7749 * Expect total phandles count to be NOT less than maximum possible
7750 * WSA count. However, if it is less, then assign same value to
7751 * max count as well.
7752 */
7753 if (wsa_dev_cnt < wsa_max_devs) {
7754 dev_dbg(&pdev->dev,
7755 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7756 __func__, wsa_max_devs, wsa_dev_cnt);
7757 wsa_max_devs = wsa_dev_cnt;
7758 }
7759
7760 /* Make sure prefix string passed for each WSA device */
7761 ret = of_property_count_strings(pdev->dev.of_node,
7762 "qcom,wsa-aux-dev-prefix");
7763 if (ret != wsa_dev_cnt) {
7764 dev_err(&pdev->dev,
7765 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7766 __func__, wsa_dev_cnt, ret);
7767 ret = -EINVAL;
7768 goto err;
7769 }
7770
7771 /*
7772 * Alloc mem to store phandle and index info of WSA device, if already
7773 * registered with ALSA core
7774 */
7775 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7776 sizeof(struct msm_wsa881x_dev_info),
7777 GFP_KERNEL);
7778 if (!wsa881x_dev_info) {
7779 ret = -ENOMEM;
7780 goto err;
7781 }
7782
7783 /*
7784 * search and check whether all WSA devices are already
7785 * registered with ALSA core or not. If found a node, store
7786 * the node and the index in a local array of struct for later
7787 * use.
7788 */
7789 for (i = 0; i < wsa_dev_cnt; i++) {
7790 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7791 "qcom,wsa-devs", i);
7792 if (unlikely(!wsa_of_node)) {
7793 /* we should not be here */
7794 dev_err(&pdev->dev,
7795 "%s: wsa dev node is not present\n",
7796 __func__);
7797 ret = -EINVAL;
7798 goto err;
7799 }
7800 if (soc_find_component(wsa_of_node, NULL)) {
7801 /* WSA device registered with ALSA core */
7802 wsa881x_dev_info[found].of_node = wsa_of_node;
7803 wsa881x_dev_info[found].index = i;
7804 found++;
7805 if (found == wsa_max_devs)
7806 break;
7807 }
7808 }
7809
7810 if (found < wsa_max_devs) {
7811 dev_dbg(&pdev->dev,
7812 "%s: failed to find %d components. Found only %d\n",
7813 __func__, wsa_max_devs, found);
7814 return -EPROBE_DEFER;
7815 }
7816 dev_info(&pdev->dev,
7817 "%s: found %d wsa881x devices registered with ALSA core\n",
7818 __func__, found);
7819
7820codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7821 /* Get maximum aux codec device count for this platform */
7822 ret = of_property_read_u32(pdev->dev.of_node,
7823 "qcom,codec-max-aux-devs",
7824 &codec_max_aux_devs);
7825 if (ret) {
7826 dev_err(&pdev->dev,
7827 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7828 __func__, pdev->dev.of_node->full_name, ret);
7829 codec_max_aux_devs = 0;
7830 goto aux_dev_register;
7831 }
7832 if (codec_max_aux_devs == 0) {
7833 dev_dbg(&pdev->dev,
7834 "%s: Max aux codec devices is 0 for this target?\n",
7835 __func__);
7836 goto aux_dev_register;
7837 }
7838
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7839 /* Get count of aux codec device phandles for this platform */
7840 codec_aux_dev_cnt = of_count_phandle_with_args(
7841 pdev->dev.of_node,
7842 "qcom,codec-aux-devs", NULL);
7843 if (codec_aux_dev_cnt == -ENOENT) {
7844 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7845 __func__);
7846 goto err;
7847 } else if (codec_aux_dev_cnt <= 0) {
7848 dev_err(&pdev->dev,
7849 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7850 __func__, codec_aux_dev_cnt);
7851 ret = -EINVAL;
7852 goto err;
7853 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7854
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7855 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7856 * Expect total phandles count to be NOT less than maximum possible
7857 * AUX device count. However, if it is less, then assign same value to
7858 * max count as well.
7859 */
7860 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7861 dev_dbg(&pdev->dev,
7862 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7863 __func__, codec_max_aux_devs,
7864 codec_aux_dev_cnt);
7865 codec_max_aux_devs = codec_aux_dev_cnt;
7866 }
7867
7868 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7869 * Alloc mem to store phandle and index info of aux codec
7870 * if already registered with ALSA core
7871 */
7872 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7873 sizeof(struct aux_codec_dev_info),
7874 GFP_KERNEL);
7875 if (!aux_cdc_dev_info) {
7876 ret = -ENOMEM;
7877 goto err;
7878 }
7879
7880 /*
7881 * search and check whether all aux codecs are already
7882 * registered with ALSA core or not. If found a node, store
7883 * the node and the index in a local array of struct for later
7884 * use.
7885 */
7886 for (i = 0; i < codec_aux_dev_cnt; i++) {
7887 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
7888 "qcom,codec-aux-devs", i);
7889 if (unlikely(!aux_codec_of_node)) {
7890 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7891 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7892 "%s: aux codec dev node is not present\n",
7893 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7894 ret = -EINVAL;
7895 goto err;
7896 }
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7897 if (soc_find_component(aux_codec_of_node, NULL)) {
7898 /* AUX codec registered with ALSA core */
7899 aux_cdc_dev_info[codecs_found].of_node =
7900 aux_codec_of_node;
7901 aux_cdc_dev_info[codecs_found].index = i;
7902 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7903 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7904 }
7905
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7906 if (codecs_found < codec_aux_dev_cnt) {
7907 dev_dbg(&pdev->dev,
7908 "%s: failed to find %d components. Found only %d\n",
7909 __func__, codec_aux_dev_cnt, codecs_found);
7910 return -EPROBE_DEFER;
7911 }
7912 dev_info(&pdev->dev,
7913 "%s: found %d AUX codecs registered with ALSA core\n",
7914 __func__, codecs_found);
7915
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7916aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7917 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
7918 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
7919
7920 /* Alloc array of AUX devs struct */
7921 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
7922 sizeof(struct snd_soc_aux_dev),
7923 GFP_KERNEL);
7924 if (!msm_aux_dev) {
7925 ret = -ENOMEM;
7926 goto err;
7927 }
7928
7929 /* Alloc array of codec conf struct */
7930 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
7931 sizeof(struct snd_soc_codec_conf),
7932 GFP_KERNEL);
7933 if (!msm_codec_conf) {
7934 ret = -ENOMEM;
7935 goto err;
7936 }
7937
7938 for (i = 0; i < wsa_max_devs; i++) {
7939 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
7940 GFP_KERNEL);
7941 if (!dev_name_str) {
7942 ret = -ENOMEM;
7943 goto err;
7944 }
7945
7946 ret = of_property_read_string_index(pdev->dev.of_node,
7947 "qcom,wsa-aux-dev-prefix",
7948 wsa881x_dev_info[i].index,
7949 auxdev_name_prefix);
7950 if (ret) {
7951 dev_err(&pdev->dev,
7952 "%s: failed to read wsa aux dev prefix, ret = %d\n",
7953 __func__, ret);
7954 ret = -EINVAL;
7955 goto err;
7956 }
7957
7958 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
7959 msm_aux_dev[i].name = dev_name_str;
7960 msm_aux_dev[i].codec_name = NULL;
7961 msm_aux_dev[i].codec_of_node =
7962 wsa881x_dev_info[i].of_node;
7963 msm_aux_dev[i].init = msm_wsa881x_init;
7964 msm_codec_conf[i].dev_name = NULL;
7965 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
7966 msm_codec_conf[i].of_node =
7967 wsa881x_dev_info[i].of_node;
7968 }
7969
7970 for (i = 0; i < codec_aux_dev_cnt; i++) {
7971 msm_aux_dev[wsa_max_devs + i].name = NULL;
7972 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
7973 msm_aux_dev[wsa_max_devs + i].codec_of_node =
7974 aux_cdc_dev_info[i].of_node;
7975 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
7976 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
7977 msm_codec_conf[wsa_max_devs + i].name_prefix =
7978 NULL;
7979 msm_codec_conf[wsa_max_devs + i].of_node =
7980 aux_cdc_dev_info[i].of_node;
7981 }
7982
7983 card->codec_conf = msm_codec_conf;
7984 card->aux_dev = msm_aux_dev;
7985err:
7986 return ret;
7987}
7988
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7989static void msm_i2s_auxpcm_init(struct platform_device *pdev)
7990{
7991 int count = 0;
7992 u32 mi2s_master_slave[MI2S_MAX];
7993 int ret = 0;
7994
7995 for (count = 0; count < MI2S_MAX; count++) {
7996 mutex_init(&mi2s_intf_conf[count].lock);
7997 mi2s_intf_conf[count].ref_cnt = 0;
7998 }
7999
8000 ret = of_property_read_u32_array(pdev->dev.of_node,
8001 "qcom,msm-mi2s-master",
8002 mi2s_master_slave, MI2S_MAX);
8003 if (ret) {
8004 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8005 __func__);
8006 } else {
8007 for (count = 0; count < MI2S_MAX; count++) {
8008 mi2s_intf_conf[count].msm_is_mi2s_master =
8009 mi2s_master_slave[count];
8010 }
8011 }
8012}
8013
8014static void msm_i2s_auxpcm_deinit(void)
8015{
8016 int count = 0;
8017
8018 for (count = 0; count < MI2S_MAX; count++) {
8019 mutex_destroy(&mi2s_intf_conf[count].lock);
8020 mi2s_intf_conf[count].ref_cnt = 0;
8021 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8022 }
8023}
8024
8025static int kona_ssr_enable(struct device *dev, void *data)
8026{
8027 struct platform_device *pdev = to_platform_device(dev);
8028 struct snd_soc_card *card = platform_get_drvdata(pdev);
8029 int ret = 0;
8030
8031 if (!card) {
8032 dev_err(dev, "%s: card is NULL\n", __func__);
8033 ret = -EINVAL;
8034 goto err;
8035 }
8036
8037 if (!strcmp(card->name, "kona-stub-snd-card")) {
8038 /* TODO */
8039 dev_dbg(dev, "%s: TODO \n", __func__);
8040 }
8041
8042 snd_soc_card_change_online_state(card, 1);
8043 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8044
8045err:
8046 return ret;
8047}
8048
8049static void kona_ssr_disable(struct device *dev, void *data)
8050{
8051 struct platform_device *pdev = to_platform_device(dev);
8052 struct snd_soc_card *card = platform_get_drvdata(pdev);
8053
8054 if (!card) {
8055 dev_err(dev, "%s: card is NULL\n", __func__);
8056 return;
8057 }
8058
8059 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8060 snd_soc_card_change_online_state(card, 0);
8061
8062 if (!strcmp(card->name, "kona-stub-snd-card")) {
8063 /* TODO */
8064 dev_dbg(dev, "%s: TODO \n", __func__);
8065 }
8066}
8067
8068static const struct snd_event_ops kona_ssr_ops = {
8069 .enable = kona_ssr_enable,
8070 .disable = kona_ssr_disable,
8071};
8072
8073static int msm_audio_ssr_compare(struct device *dev, void *data)
8074{
8075 struct device_node *node = data;
8076
8077 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8078 __func__, dev->of_node, node);
8079 return (dev->of_node && dev->of_node == node);
8080}
8081
8082static int msm_audio_ssr_register(struct device *dev)
8083{
8084 struct device_node *np = dev->of_node;
8085 struct snd_event_clients *ssr_clients = NULL;
8086 struct device_node *node = NULL;
8087 int ret = 0;
8088 int i = 0;
8089
8090 for (i = 0; ; i++) {
8091 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8092 if (!node)
8093 break;
8094 snd_event_mstr_add_client(&ssr_clients,
8095 msm_audio_ssr_compare, node);
8096 }
8097
8098 ret = snd_event_master_register(dev, &kona_ssr_ops,
8099 ssr_clients, NULL);
8100 if (!ret)
8101 snd_event_notify(dev, SND_EVENT_UP);
8102
8103 return ret;
8104}
8105
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8106static int msm_asoc_machine_probe(struct platform_device *pdev)
8107{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8108 struct snd_soc_card *card = NULL;
8109 struct msm_asoc_mach_data *pdata = NULL;
8110 const char *mbhc_audio_jack_type = NULL;
8111 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8112 uint index = 0;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]8113 struct clk *lpass_audio_hw_vote = NULL;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8114
8115 if (!pdev->dev.of_node) {
8116 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
8117 return -EINVAL;
8118 }
8119
8120 pdata = devm_kzalloc(&pdev->dev,
8121 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8122 if (!pdata)
8123 return -ENOMEM;
8124
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]8125 of_property_read_u32(pdev->dev.of_node,
8126 "qcom,lito-is-v2-enabled",
8127 &pdata->lito_v2_enabled);
8128
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8129 card = populate_snd_card_dailinks(&pdev->dev);
8130 if (!card) {
8131 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8132 ret = -EINVAL;
8133 goto err;
8134 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8135
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8136 card->dev = &pdev->dev;
8137 platform_set_drvdata(pdev, card);
8138 snd_soc_card_set_drvdata(card, pdata);
8139
8140 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8141 if (ret) {
8142 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
8143 __func__, ret);
8144 goto err;
8145 }
8146
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8147 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8148 if (ret) {
8149 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
8150 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8151 goto err;
8152 }
8153
8154 ret = msm_populate_dai_link_component_of_node(card);
8155 if (ret) {
8156 ret = -EPROBE_DEFER;
8157 goto err;
8158 }
8159
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]8160 ret = msm_init_aux_dev(pdev, card);
8161 if (ret)
8162 goto err;
8163
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8164 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8165 if (ret == -EPROBE_DEFER) {
8166 if (codec_reg_done)
8167 ret = -EINVAL;
8168 goto err;
8169 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8170 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
8171 __func__, ret);
8172 goto err;
8173 }
8174 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
8175 __func__, card->name);
8176
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8177 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8178 "qcom,hph-en1-gpio", 0);
8179 if (!pdata->hph_en1_gpio_p) {
8180 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8181 __func__, "qcom,hph-en1-gpio",
8182 pdev->dev.of_node->full_name);
8183 }
8184
8185 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8186 "qcom,hph-en0-gpio", 0);
8187 if (!pdata->hph_en0_gpio_p) {
8188 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8189 __func__, "qcom,hph-en0-gpio",
8190 pdev->dev.of_node->full_name);
8191 }
8192
8193 ret = of_property_read_string(pdev->dev.of_node,
8194 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8195 if (ret) {
8196 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
8197 __func__, "qcom,mbhc-audio-jack-type",
8198 pdev->dev.of_node->full_name);
8199 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8200 } else {
8201 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8202 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8203 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8204 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8205 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8206 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8207 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8208 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8209 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8210 } else {
8211 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8212 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8213 }
8214 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]8215 /*
8216 * Parse US-Euro gpio info from DT. Report no error if us-euro
8217 * entry is not found in DT file as some targets do not support
8218 * US-Euro detection
8219 */
8220 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8221 "qcom,us-euro-gpios", 0);
8222 if (!pdata->us_euro_gpio_p) {
8223 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8224 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8225 } else {
8226 dev_dbg(&pdev->dev, "%s detected\n",
8227 "qcom,us-euro-gpios");
8228 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8229 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8230
Meng Wanga60b4082019-02-25 17:02:23 +0800[diff] [blame]8231 if (wcd_mbhc_cfg.enable_usbc_analog)
8232 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8233
8234 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8235 "fsa4480-i2c-handle", 0);
8236 if (!pdata->fsa_handle)
8237 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8238 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
8239
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8240 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]8241 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8242 "qcom,cdc-dmic01-gpios",
8243 0);
8244 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8245 "qcom,cdc-dmic23-gpios",
8246 0);
8247 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
8248 "qcom,cdc-dmic45-gpios",
8249 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +0530[diff] [blame]8250 if (pdata->dmic01_gpio_p)
8251 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
8252 if (pdata->dmic23_gpio_p)
8253 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +0530[diff] [blame]8254 if (pdata->dmic45_gpio_p)
8255 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8256
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8257 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8258 "qcom,pri-mi2s-gpios", 0);
8259 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8260 "qcom,sec-mi2s-gpios", 0);
8261 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8262 "qcom,tert-mi2s-gpios", 0);
8263 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8264 "qcom,quat-mi2s-gpios", 0);
8265 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8266 "qcom,quin-mi2s-gpios", 0);
8267 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8268 "qcom,sen-mi2s-gpios", 0);
Meng Wang4f5815c2020-02-13 14:10:20 +0800[diff] [blame]8269 for (index = PRIM_MI2S; index < MI2S_MAX; index++) {
8270 if (pdata->mi2s_gpio_p[index])
8271 msm_cdc_pinctrl_set_wakeup_capable(pdata->mi2s_gpio_p[index], false);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8272 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
Meng Wang4f5815c2020-02-13 14:10:20 +0800[diff] [blame]8273 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8274
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]8275 /* Register LPASS audio hw vote */
8276 lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
8277 if (IS_ERR(lpass_audio_hw_vote)) {
8278 ret = PTR_ERR(lpass_audio_hw_vote);
8279 dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
8280 __func__, "lpass_audio_hw_vote", ret);
8281 lpass_audio_hw_vote = NULL;
8282 ret = 0;
8283 }
8284 pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
8285 pdata->core_audio_vote_count = 0;
8286
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8287 ret = msm_audio_ssr_register(&pdev->dev);
8288 if (ret)
8289 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8290 __func__, ret);
8291
8292 is_initial_boot = true;
8293
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8294 return 0;
8295err:
8296 devm_kfree(&pdev->dev, pdata);
8297 return ret;
8298}
8299
8300static int msm_asoc_machine_remove(struct platform_device *pdev)
8301{
8302 struct snd_soc_card *card = platform_get_drvdata(pdev);
8303
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8304 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8305 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8306 msm_i2s_auxpcm_deinit();
8307
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8308 return 0;
8309}
8310
8311static struct platform_driver kona_asoc_machine_driver = {
8312 .driver = {
8313 .name = DRV_NAME,
8314 .owner = THIS_MODULE,
8315 .pm = &snd_soc_pm_ops,
8316 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800[diff] [blame]8317 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8318 },
8319 .probe = msm_asoc_machine_probe,
8320 .remove = msm_asoc_machine_remove,
8321};
8322module_platform_driver(kona_asoc_machine_driver);
8323
8324MODULE_DESCRIPTION("ALSA SoC msm");
8325MODULE_LICENSE("GPL v2");
8326MODULE_ALIAS("platform:" DRV_NAME);
8327MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);