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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 4fcf3b4129ea1e6da27f7f00bd3a1ece0fedb80b / . / asoc / kona.c
blob: 6fcf10508a6e25d44aae92527f01c0e4ea61b7af [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2/*
Xiao Lid8bb93c2020-01-07 12:59:05 +0800[diff] [blame]3 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]16#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]23#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]24#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]25#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]32#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]33#include "codecs/wsa881x.h"
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]34#include "codecs/wsa883x/wsa883x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]35#include "codecs/wcd938x/wcd938x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]36#include "codecs/bolero/bolero-cdc.h"
37#include <dt-bindings/sound/audio-codec-port-types.h>
38#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]39#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]40
41#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]42#define __CHIPSET__ "KONA "
43#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
44
45#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]46#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]47#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]48#define SAMPLING_RATE_22P05KHZ 22050
49#define SAMPLING_RATE_32KHZ 32000
50#define SAMPLING_RATE_44P1KHZ 44100
51#define SAMPLING_RATE_48KHZ 48000
52#define SAMPLING_RATE_88P2KHZ 88200
53#define SAMPLING_RATE_96KHZ 96000
54#define SAMPLING_RATE_176P4KHZ 176400
55#define SAMPLING_RATE_192KHZ 192000
56#define SAMPLING_RATE_352P8KHZ 352800
57#define SAMPLING_RATE_384KHZ 384000
58
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]59#define IS_FRACTIONAL(x) \
60((x == SAMPLING_RATE_11P025KHZ) || (x == SAMPLING_RATE_22P05KHZ) || \
61(x == SAMPLING_RATE_44P1KHZ) || (x == SAMPLING_RATE_88P2KHZ) || \
62(x == SAMPLING_RATE_176P4KHZ) || (x == SAMPLING_RATE_352P8KHZ))
63
64#define IS_MSM_INTERFACE_MI2S(x) \
65((x == PRIM_MI2S) || (x == SEC_MI2S) || (x == TERT_MI2S))
66
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]67#define WCD9XXX_MBHC_DEF_RLOADS 5
68#define WCD9XXX_MBHC_DEF_BUTTONS 8
69#define CODEC_EXT_CLK_RATE 9600000
70#define ADSP_STATE_READY_TIMEOUT_MS 3000
71#define DEV_NAME_STR_LEN 32
72#define WCD_MBHC_HS_V_MAX 1600
73
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]74#define TDM_CHANNEL_MAX 8
75#define DEV_NAME_STR_LEN 32
76
77#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
78
79#define ADSP_STATE_READY_TIMEOUT_MS 3000
80
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]81#define WSA8810_NAME_1 "wsa881x.20170211"
82#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]83#define WCN_CDC_SLIM_RX_CH_MAX 2
84#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]85#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]86
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]87enum {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]88 RX_PATH = 0,
89 TX_PATH,
90 MAX_PATH,
91};
92
93enum {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]94 TDM_0 = 0,
95 TDM_1,
96 TDM_2,
97 TDM_3,
98 TDM_4,
99 TDM_5,
100 TDM_6,
101 TDM_7,
102 TDM_PORT_MAX,
103};
104
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]105#define TDM_MAX_SLOTS 8
106#define TDM_SLOT_WIDTH_BITS 32
107
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]108enum {
109 TDM_PRI = 0,
110 TDM_SEC,
111 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]112 TDM_QUAT,
113 TDM_QUIN,
114 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]115 TDM_INTERFACE_MAX,
116};
117
118enum {
119 PRIM_AUX_PCM = 0,
120 SEC_AUX_PCM,
121 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]122 QUAT_AUX_PCM,
123 QUIN_AUX_PCM,
124 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]125 AUX_PCM_MAX,
126};
127
128enum {
129 PRIM_MI2S = 0,
130 SEC_MI2S,
131 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]132 QUAT_MI2S,
133 QUIN_MI2S,
134 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]135 MI2S_MAX,
136};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]137
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]138enum {
139 WSA_CDC_DMA_RX_0 = 0,
140 WSA_CDC_DMA_RX_1,
141 RX_CDC_DMA_RX_0,
142 RX_CDC_DMA_RX_1,
143 RX_CDC_DMA_RX_2,
144 RX_CDC_DMA_RX_3,
145 RX_CDC_DMA_RX_5,
146 CDC_DMA_RX_MAX,
147};
148
149enum {
150 WSA_CDC_DMA_TX_0 = 0,
151 WSA_CDC_DMA_TX_1,
152 WSA_CDC_DMA_TX_2,
153 TX_CDC_DMA_TX_0,
154 TX_CDC_DMA_TX_3,
155 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]156 VA_CDC_DMA_TX_0,
157 VA_CDC_DMA_TX_1,
158 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]159 CDC_DMA_TX_MAX,
160};
161
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]162enum {
163 SLIM_RX_7 = 0,
164 SLIM_RX_MAX,
165};
166enum {
167 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]168 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]169 SLIM_TX_MAX,
170};
171
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]172enum {
173 AFE_LOOPBACK_TX_IDX = 0,
174 AFE_LOOPBACK_TX_IDX_MAX,
175};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]176struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]177 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]178 int usbc_en2_gpio; /* used by gpio driver API */
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]179 int lito_v2_enabled;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]180 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
181 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
182 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]183 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
184 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]185 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
186 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
187 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
188 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
189 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]190 struct device_node *fsa_handle;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]191 struct clk *lpass_audio_hw_vote;
192 int core_audio_vote_count;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]193};
194
195struct tdm_port {
196 u32 mode;
197 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]198};
199
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]200struct tdm_dev_config {
201 unsigned int tdm_slot_offset[TDM_MAX_SLOTS];
202};
203
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]204enum {
205 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]206 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]207 EXT_DISP_RX_IDX_MAX,
208};
209
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]210struct msm_wsa881x_dev_info {
211 struct device_node *of_node;
212 u32 index;
213};
214
215struct aux_codec_dev_info {
216 struct device_node *of_node;
217 u32 index;
218};
219
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]220struct dev_config {
221 u32 sample_rate;
222 u32 bit_format;
223 u32 channels;
224};
225
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]226/* Default configuration of slimbus channels */
227static struct dev_config slim_rx_cfg[] = {
228 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
229};
230
231static struct dev_config slim_tx_cfg[] = {
232 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]233 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]234};
235
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]236/* Default configuration of external display BE */
237static struct dev_config ext_disp_rx_cfg[] = {
238 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]239 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]240};
241
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]242static struct dev_config usb_rx_cfg = {
243 .sample_rate = SAMPLING_RATE_48KHZ,
244 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
245 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]246};
247
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]248static struct dev_config usb_tx_cfg = {
249 .sample_rate = SAMPLING_RATE_48KHZ,
250 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
251 .channels = 1,
252};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]253
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]254static struct dev_config proxy_rx_cfg = {
255 .sample_rate = SAMPLING_RATE_48KHZ,
256 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
257 .channels = 2,
258};
259
260static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
261 {
262 AFE_API_VERSION_I2S_CONFIG,
263 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
264 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
265 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
266 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
267 0,
268 },
269 {
270 AFE_API_VERSION_I2S_CONFIG,
271 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
272 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
273 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
274 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
275 0,
276 },
277 {
278 AFE_API_VERSION_I2S_CONFIG,
279 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
280 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
281 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
282 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
283 0,
284 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]285 {
286 AFE_API_VERSION_I2S_CONFIG,
287 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
288 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
289 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
290 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
291 0,
292 },
293 {
294 AFE_API_VERSION_I2S_CONFIG,
295 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
296 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
297 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
298 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
299 0,
300 },
301 {
302 AFE_API_VERSION_I2S_CONFIG,
303 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
304 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
305 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
306 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
307 0,
308 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]309};
310
311struct mi2s_conf {
312 struct mutex lock;
313 u32 ref_cnt;
314 u32 msm_is_mi2s_master;
315};
316
317static u32 mi2s_ebit_clk[MI2S_MAX] = {
318 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
319 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
320 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
321};
322
323static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
324
325/* Default configuration of TDM channels */
326static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
327 { /* PRI TDM */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
336 },
337 { /* SEC TDM */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
346 },
347 { /* TERT TDM */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
356 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]357 { /* QUAT TDM */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
359 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
360 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
361 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
362 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
363 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
365 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
366 },
367 { /* QUIN TDM */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
372 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
373 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
375 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
376 },
377 { /* SEN TDM */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
382 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
383 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
386 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]387};
388
389static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
390 { /* PRI TDM */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
392 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
393 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
398 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
399 },
400 { /* SEC TDM */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
402 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
403 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
409 },
410 { /* TERT TDM */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
412 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
413 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
419 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]420 { /* QUAT TDM */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
422 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
423 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
424 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
425 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
426 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
427 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
428 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
429 },
430 { /* QUIN TDM */
431 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
432 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
433 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
434 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
435 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
436 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
437 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
438 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
439 },
440 { /* SEN TDM */
441 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
442 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
443 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
444 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
445 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
446 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
447 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
448 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
449 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]450};
451
452/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]453static struct dev_config aux_pcm_rx_cfg[] = {
454 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]455 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
456 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]457 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
458 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
459 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]460};
461
462static struct dev_config aux_pcm_tx_cfg[] = {
463 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]464 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
465 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]466 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
467 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
468 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]469};
470
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]471/* Default configuration of MI2S channels */
472static struct dev_config mi2s_rx_cfg[] = {
473 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
474 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
475 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]476 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
477 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
478 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]479};
480
481static struct dev_config mi2s_tx_cfg[] = {
482 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
483 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
484 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]485 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
486 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
487 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]488};
489
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]490static struct tdm_dev_config pri_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
491 { /* PRI TDM */
492 { {0, 4, 0xFFFF} }, /* RX_0 */
493 { {8, 12, 0xFFFF} }, /* RX_1 */
494 { {16, 20, 0xFFFF} }, /* RX_2 */
495 { {24, 28, 0xFFFF} }, /* RX_3 */
496 { {0xFFFF} }, /* RX_4 */
497 { {0xFFFF} }, /* RX_5 */
498 { {0xFFFF} }, /* RX_6 */
499 { {0xFFFF} }, /* RX_7 */
500 },
501 {
502 { {0, 4, 8, 12, 0xFFFF} }, /* TX_0 */
503 { {8, 12, 0xFFFF} }, /* TX_1 */
504 { {16, 20, 0xFFFF} }, /* TX_2 */
505 { {24, 28, 0xFFFF} }, /* TX_3 */
506 { {0xFFFF} }, /* TX_4 */
507 { {0xFFFF} }, /* TX_5 */
508 { {0xFFFF} }, /* TX_6 */
509 { {0xFFFF} }, /* TX_7 */
510 },
511};
512
513static struct tdm_dev_config sec_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
514 { /* SEC TDM */
515 { {0, 4, 0xFFFF} }, /* RX_0 */
516 { {8, 12, 0xFFFF} }, /* RX_1 */
517 { {16, 20, 0xFFFF} }, /* RX_2 */
518 { {24, 28, 0xFFFF} }, /* RX_3 */
519 { {0xFFFF} }, /* RX_4 */
520 { {0xFFFF} }, /* RX_5 */
521 { {0xFFFF} }, /* RX_6 */
522 { {0xFFFF} }, /* RX_7 */
523 },
524 {
525 { {0, 4, 0xFFFF} }, /* TX_0 */
526 { {8, 12, 0xFFFF} }, /* TX_1 */
527 { {16, 20, 0xFFFF} }, /* TX_2 */
528 { {24, 28, 0xFFFF} }, /* TX_3 */
529 { {0xFFFF} }, /* TX_4 */
530 { {0xFFFF} }, /* TX_5 */
531 { {0xFFFF} }, /* TX_6 */
532 { {0xFFFF} }, /* TX_7 */
533 },
534};
535
536static struct tdm_dev_config tert_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
537 { /* TERT TDM */
538 { {0, 4, 0xFFFF} }, /* RX_0 */
539 { {8, 12, 0xFFFF} }, /* RX_1 */
540 { {16, 20, 0xFFFF} }, /* RX_2 */
541 { {24, 28, 0xFFFF} }, /* RX_3 */
542 { {0xFFFF} }, /* RX_4 */
543 { {0xFFFF} }, /* RX_5 */
544 { {0xFFFF} }, /* RX_6 */
545 { {0xFFFF} }, /* RX_7 */
546 },
547 {
548 { {0, 4, 0xFFFF} }, /* TX_0 */
549 { {8, 12, 0xFFFF} }, /* TX_1 */
550 { {16, 20, 0xFFFF} }, /* TX_2 */
551 { {24, 28, 0xFFFF} }, /* TX_3 */
552 { {0xFFFF} }, /* TX_4 */
553 { {0xFFFF} }, /* TX_5 */
554 { {0xFFFF} }, /* TX_6 */
555 { {0xFFFF} }, /* TX_7 */
556 },
557};
558
559static struct tdm_dev_config quat_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
560 { /* QUAT TDM */
561 { {0, 4, 0xFFFF} }, /* RX_0 */
562 { {8, 12, 0xFFFF} }, /* RX_1 */
563 { {16, 20, 0xFFFF} }, /* RX_2 */
564 { {24, 28, 0xFFFF} }, /* RX_3 */
565 { {0xFFFF} }, /* RX_4 */
566 { {0xFFFF} }, /* RX_5 */
567 { {0xFFFF} }, /* RX_6 */
568 { {0xFFFF} }, /* RX_7 */
569 },
570 {
571 { {0, 4, 0xFFFF} }, /* TX_0 */
572 { {8, 12, 0xFFFF} }, /* TX_1 */
573 { {16, 20, 0xFFFF} }, /* TX_2 */
574 { {24, 28, 0xFFFF} }, /* TX_3 */
575 { {0xFFFF} }, /* TX_4 */
576 { {0xFFFF} }, /* TX_5 */
577 { {0xFFFF} }, /* TX_6 */
578 { {0xFFFF} }, /* TX_7 */
579 },
580};
581
582static struct tdm_dev_config quin_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
583 { /* QUIN TDM */
584 { {0, 4, 0xFFFF} }, /* RX_0 */
585 { {8, 12, 0xFFFF} }, /* RX_1 */
586 { {16, 20, 0xFFFF} }, /* RX_2 */
587 { {24, 28, 0xFFFF} }, /* RX_3 */
588 { {0xFFFF} }, /* RX_4 */
589 { {0xFFFF} }, /* RX_5 */
590 { {0xFFFF} }, /* RX_6 */
591 { {0xFFFF} }, /* RX_7 */
592 },
593 {
594 { {0, 4, 0xFFFF} }, /* TX_0 */
595 { {8, 12, 0xFFFF} }, /* TX_1 */
596 { {16, 20, 0xFFFF} }, /* TX_2 */
597 { {24, 28, 0xFFFF} }, /* TX_3 */
598 { {0xFFFF} }, /* TX_4 */
599 { {0xFFFF} }, /* TX_5 */
600 { {0xFFFF} }, /* TX_6 */
601 { {0xFFFF} }, /* TX_7 */
602 },
603};
604
605static struct tdm_dev_config sen_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
606 { /* SEN TDM */
607 { {0, 4, 0xFFFF} }, /* RX_0 */
608 { {8, 12, 0xFFFF} }, /* RX_1 */
609 { {16, 20, 0xFFFF} }, /* RX_2 */
610 { {24, 28, 0xFFFF} }, /* RX_3 */
611 { {0xFFFF} }, /* RX_4 */
612 { {0xFFFF} }, /* RX_5 */
613 { {0xFFFF} }, /* RX_6 */
614 { {0xFFFF} }, /* RX_7 */
615 },
616 {
617 { {0, 4, 0xFFFF} }, /* TX_0 */
618 { {8, 12, 0xFFFF} }, /* TX_1 */
619 { {16, 20, 0xFFFF} }, /* TX_2 */
620 { {24, 28, 0xFFFF} }, /* TX_3 */
621 { {0xFFFF} }, /* TX_4 */
622 { {0xFFFF} }, /* TX_5 */
623 { {0xFFFF} }, /* TX_6 */
624 { {0xFFFF} }, /* TX_7 */
625 },
626};
627
628static void *tdm_cfg[TDM_INTERFACE_MAX] = {
629 pri_tdm_dev_config,
630 sec_tdm_dev_config,
631 tert_tdm_dev_config,
632 quat_tdm_dev_config,
633 quin_tdm_dev_config,
634 sen_tdm_dev_config,
635};
636
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]637/* Default configuration of Codec DMA Interface RX */
638static struct dev_config cdc_dma_rx_cfg[] = {
639 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
640 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
641 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
642 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
643 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
644 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
645 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
646};
647
648/* Default configuration of Codec DMA Interface TX */
649static struct dev_config cdc_dma_tx_cfg[] = {
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +0530[diff] [blame]650 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]651 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
652 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
653 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
654 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
655 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]656 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
657 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
658 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]659};
660
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]661static struct dev_config afe_loopback_tx_cfg[] = {
662 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
663};
664
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]665static int msm_vi_feed_tx_ch = 2;
666static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]667static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
668 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]669static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]670static char const *ch_text[] = {"Two", "Three", "Four", "Five",
671 "Six", "Seven", "Eight"};
672static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
673 "KHZ_16", "KHZ_22P05",
674 "KHZ_32", "KHZ_44P1", "KHZ_48",
675 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
676 "KHZ_192", "KHZ_352P8", "KHZ_384"};
677static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
678 "Five", "Six", "Seven",
679 "Eight"};
680static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
681 "KHZ_48", "KHZ_176P4",
682 "KHZ_352P8"};
683static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
684static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
685 "Five", "Six", "Seven", "Eight"};
686static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
687static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
688 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]689 "KHZ_48", "KHZ_88P2", "KHZ_96",
690 "KHZ_176P4", "KHZ_192","KHZ_352P8",
691 "KHZ_384"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]692static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
693 "Five", "Six", "Seven",
694 "Eight"};
695
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]696static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
697static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
698 "Five", "Six", "Seven",
699 "Eight"};
700static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
701 "KHZ_16", "KHZ_22P05",
702 "KHZ_32", "KHZ_44P1", "KHZ_48",
703 "KHZ_88P2", "KHZ_96",
704 "KHZ_176P4", "KHZ_192",
705 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]706static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
707 "KHZ_16", "KHZ_22P05",
708 "KHZ_32", "KHZ_44P1", "KHZ_48",
709 "KHZ_88P2", "KHZ_96",
710 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]711static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
712 "S24_3LE"};
713static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
714 "KHZ_192", "KHZ_32", "KHZ_44P1",
715 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]716static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
717 "KHZ_44P1", "KHZ_48",
718 "KHZ_88P2", "KHZ_96"};
719static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
720 "KHZ_44P1", "KHZ_48",
721 "KHZ_88P2", "KHZ_96"};
722static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
723 "KHZ_44P1", "KHZ_48",
724 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]725static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]726
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]727static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
728static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
729static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
730static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
731static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
732static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]733static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]734static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
735static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
736static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
737static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
738static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
739static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
740static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]741static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]742static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
743static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]744static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
745static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
746static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]747static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]748static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
749static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]750static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
751static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
752static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]753static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
754static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]755static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
756static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
757static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]758static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
759static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
760static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]761static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
762static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
763static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]764static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
765static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
766static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]767static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
768static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
769static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
770static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
771static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]772static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
773static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
774static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]775static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
776static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
777static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]778static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
779static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
780static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]781static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
782static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
783static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
784static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
785static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
786static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
787static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
788static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
789static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
790static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
791static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
792static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
793static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]794static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
795static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
796static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]797static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
798static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]799static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
800static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
801static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
802static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
803static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]804static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
805static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
806static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]807static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
808 cdc_dma_sample_rate_text);
809static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
810 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]811static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
812 cdc_dma_sample_rate_text);
813static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
814 cdc_dma_sample_rate_text);
815static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
816 cdc_dma_sample_rate_text);
817static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
818 cdc_dma_sample_rate_text);
819static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
820 cdc_dma_sample_rate_text);
821static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
822 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]823static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
824 cdc_dma_sample_rate_text);
825static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
826 cdc_dma_sample_rate_text);
827static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
828 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]829
830/* WCD9380 */
831static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
832static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
833static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
834static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
835static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
836static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
837 cdc80_dma_sample_rate_text);
838static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
839 cdc80_dma_sample_rate_text);
840static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
841 cdc80_dma_sample_rate_text);
842static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
843 cdc80_dma_sample_rate_text);
844static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
845 cdc80_dma_sample_rate_text);
846/* WCD9385 */
847static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
848static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
849static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
850static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
851static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
852static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
853 cdc_dma_sample_rate_text);
854static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
855 cdc_dma_sample_rate_text);
856static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
857 cdc_dma_sample_rate_text);
858static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
859 cdc_dma_sample_rate_text);
860static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
861 cdc_dma_sample_rate_text);
862
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]863static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
864static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
865static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
866 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]867static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
868static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
869static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]870static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]871
872static bool is_initial_boot;
873static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]874static struct snd_soc_aux_dev *msm_aux_dev;
875static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]876static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]877static int dmic_0_1_gpio_cnt;
878static int dmic_2_3_gpio_cnt;
879static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]880
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]881static void *def_wcd_mbhc_cal(void);
882
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]883/*
884 * Need to report LINEIN
885 * if R/L channel impedance is larger than 5K ohm
886 */
887static struct wcd_mbhc_config wcd_mbhc_cfg = {
888 .read_fw_bin = false,
889 .calibration = NULL,
890 .detect_extn_cable = true,
891 .mono_stero_detection = false,
892 .swap_gnd_mic = NULL,
893 .hs_ext_micbias = true,
894 .key_code[0] = KEY_MEDIA,
895 .key_code[1] = KEY_VOICECOMMAND,
896 .key_code[2] = KEY_VOLUMEUP,
897 .key_code[3] = KEY_VOLUMEDOWN,
898 .key_code[4] = 0,
899 .key_code[5] = 0,
900 .key_code[6] = 0,
901 .key_code[7] = 0,
902 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]903 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]904 .mbhc_micbias = MIC_BIAS_2,
905 .anc_micbias = MIC_BIAS_2,
906 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]907 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]908};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]909
910static inline int param_is_mask(int p)
911{
912 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
913 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
914}
915
916static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
917 int n)
918{
919 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
920}
921
922static void param_set_mask(struct snd_pcm_hw_params *p, int n,
923 unsigned int bit)
924{
925 if (bit >= SNDRV_MASK_MAX)
926 return;
927 if (param_is_mask(n)) {
928 struct snd_mask *m = param_to_mask(p, n);
929
930 m->bits[0] = 0;
931 m->bits[1] = 0;
932 m->bits[bit >> 5] |= (1 << (bit & 31));
933 }
934}
935
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]936static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
937 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]938{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]939 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]940
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]941 switch (usb_rx_cfg.sample_rate) {
942 case SAMPLING_RATE_384KHZ:
943 sample_rate_val = 12;
944 break;
945 case SAMPLING_RATE_352P8KHZ:
946 sample_rate_val = 11;
947 break;
948 case SAMPLING_RATE_192KHZ:
949 sample_rate_val = 10;
950 break;
951 case SAMPLING_RATE_176P4KHZ:
952 sample_rate_val = 9;
953 break;
954 case SAMPLING_RATE_96KHZ:
955 sample_rate_val = 8;
956 break;
957 case SAMPLING_RATE_88P2KHZ:
958 sample_rate_val = 7;
959 break;
960 case SAMPLING_RATE_48KHZ:
961 sample_rate_val = 6;
962 break;
963 case SAMPLING_RATE_44P1KHZ:
964 sample_rate_val = 5;
965 break;
966 case SAMPLING_RATE_32KHZ:
967 sample_rate_val = 4;
968 break;
969 case SAMPLING_RATE_22P05KHZ:
970 sample_rate_val = 3;
971 break;
972 case SAMPLING_RATE_16KHZ:
973 sample_rate_val = 2;
974 break;
975 case SAMPLING_RATE_11P025KHZ:
976 sample_rate_val = 1;
977 break;
978 case SAMPLING_RATE_8KHZ:
979 default:
980 sample_rate_val = 0;
981 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]982 }
983
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]984 ucontrol->value.integer.value[0] = sample_rate_val;
985 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
986 usb_rx_cfg.sample_rate);
987 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]988}
989
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]990static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
991 struct snd_ctl_elem_value *ucontrol)
992{
993 switch (ucontrol->value.integer.value[0]) {
994 case 12:
995 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
996 break;
997 case 11:
998 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
999 break;
1000 case 10:
1001 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1002 break;
1003 case 9:
1004 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1005 break;
1006 case 8:
1007 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1008 break;
1009 case 7:
1010 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1011 break;
1012 case 6:
1013 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1014 break;
1015 case 5:
1016 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1017 break;
1018 case 4:
1019 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1020 break;
1021 case 3:
1022 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1023 break;
1024 case 2:
1025 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1026 break;
1027 case 1:
1028 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1029 break;
1030 case 0:
1031 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1032 break;
1033 default:
1034 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1035 break;
1036 }
1037
1038 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1039 __func__, ucontrol->value.integer.value[0],
1040 usb_rx_cfg.sample_rate);
1041 return 0;
1042}
1043
1044static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1045 struct snd_ctl_elem_value *ucontrol)
1046{
1047 int sample_rate_val = 0;
1048
1049 switch (usb_tx_cfg.sample_rate) {
1050 case SAMPLING_RATE_384KHZ:
1051 sample_rate_val = 12;
1052 break;
1053 case SAMPLING_RATE_352P8KHZ:
1054 sample_rate_val = 11;
1055 break;
1056 case SAMPLING_RATE_192KHZ:
1057 sample_rate_val = 10;
1058 break;
1059 case SAMPLING_RATE_176P4KHZ:
1060 sample_rate_val = 9;
1061 break;
1062 case SAMPLING_RATE_96KHZ:
1063 sample_rate_val = 8;
1064 break;
1065 case SAMPLING_RATE_88P2KHZ:
1066 sample_rate_val = 7;
1067 break;
1068 case SAMPLING_RATE_48KHZ:
1069 sample_rate_val = 6;
1070 break;
1071 case SAMPLING_RATE_44P1KHZ:
1072 sample_rate_val = 5;
1073 break;
1074 case SAMPLING_RATE_32KHZ:
1075 sample_rate_val = 4;
1076 break;
1077 case SAMPLING_RATE_22P05KHZ:
1078 sample_rate_val = 3;
1079 break;
1080 case SAMPLING_RATE_16KHZ:
1081 sample_rate_val = 2;
1082 break;
1083 case SAMPLING_RATE_11P025KHZ:
1084 sample_rate_val = 1;
1085 break;
1086 case SAMPLING_RATE_8KHZ:
1087 sample_rate_val = 0;
1088 break;
1089 default:
1090 sample_rate_val = 6;
1091 break;
1092 }
1093
1094 ucontrol->value.integer.value[0] = sample_rate_val;
1095 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1096 usb_tx_cfg.sample_rate);
1097 return 0;
1098}
1099
1100static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1101 struct snd_ctl_elem_value *ucontrol)
1102{
1103 switch (ucontrol->value.integer.value[0]) {
1104 case 12:
1105 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1106 break;
1107 case 11:
1108 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1109 break;
1110 case 10:
1111 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1112 break;
1113 case 9:
1114 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1115 break;
1116 case 8:
1117 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1118 break;
1119 case 7:
1120 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1121 break;
1122 case 6:
1123 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1124 break;
1125 case 5:
1126 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1127 break;
1128 case 4:
1129 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1130 break;
1131 case 3:
1132 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1133 break;
1134 case 2:
1135 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1136 break;
1137 case 1:
1138 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1139 break;
1140 case 0:
1141 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1142 break;
1143 default:
1144 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1145 break;
1146 }
1147
1148 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1149 __func__, ucontrol->value.integer.value[0],
1150 usb_tx_cfg.sample_rate);
1151 return 0;
1152}
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]1153static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
1154 struct snd_ctl_elem_value *ucontrol)
1155{
1156 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1157 afe_loopback_tx_cfg[0].channels);
1158 ucontrol->value.enumerated.item[0] =
1159 afe_loopback_tx_cfg[0].channels - 1;
1160
1161 return 0;
1162}
1163
1164static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
1165 struct snd_ctl_elem_value *ucontrol)
1166{
1167 afe_loopback_tx_cfg[0].channels =
1168 ucontrol->value.enumerated.item[0] + 1;
1169 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1170 afe_loopback_tx_cfg[0].channels);
1171
1172 return 1;
1173}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1174
1175static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1176 struct snd_ctl_elem_value *ucontrol)
1177{
1178 switch (usb_rx_cfg.bit_format) {
1179 case SNDRV_PCM_FORMAT_S32_LE:
1180 ucontrol->value.integer.value[0] = 3;
1181 break;
1182 case SNDRV_PCM_FORMAT_S24_3LE:
1183 ucontrol->value.integer.value[0] = 2;
1184 break;
1185 case SNDRV_PCM_FORMAT_S24_LE:
1186 ucontrol->value.integer.value[0] = 1;
1187 break;
1188 case SNDRV_PCM_FORMAT_S16_LE:
1189 default:
1190 ucontrol->value.integer.value[0] = 0;
1191 break;
1192 }
1193
1194 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1195 __func__, usb_rx_cfg.bit_format,
1196 ucontrol->value.integer.value[0]);
1197 return 0;
1198}
1199
1200static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1201 struct snd_ctl_elem_value *ucontrol)
1202{
1203 int rc = 0;
1204
1205 switch (ucontrol->value.integer.value[0]) {
1206 case 3:
1207 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1208 break;
1209 case 2:
1210 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1211 break;
1212 case 1:
1213 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1214 break;
1215 case 0:
1216 default:
1217 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1218 break;
1219 }
1220 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1221 __func__, usb_rx_cfg.bit_format,
1222 ucontrol->value.integer.value[0]);
1223
1224 return rc;
1225}
1226
1227static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1228 struct snd_ctl_elem_value *ucontrol)
1229{
1230 switch (usb_tx_cfg.bit_format) {
1231 case SNDRV_PCM_FORMAT_S32_LE:
1232 ucontrol->value.integer.value[0] = 3;
1233 break;
1234 case SNDRV_PCM_FORMAT_S24_3LE:
1235 ucontrol->value.integer.value[0] = 2;
1236 break;
1237 case SNDRV_PCM_FORMAT_S24_LE:
1238 ucontrol->value.integer.value[0] = 1;
1239 break;
1240 case SNDRV_PCM_FORMAT_S16_LE:
1241 default:
1242 ucontrol->value.integer.value[0] = 0;
1243 break;
1244 }
1245
1246 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1247 __func__, usb_tx_cfg.bit_format,
1248 ucontrol->value.integer.value[0]);
1249 return 0;
1250}
1251
1252static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1253 struct snd_ctl_elem_value *ucontrol)
1254{
1255 int rc = 0;
1256
1257 switch (ucontrol->value.integer.value[0]) {
1258 case 3:
1259 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1260 break;
1261 case 2:
1262 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1263 break;
1264 case 1:
1265 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1266 break;
1267 case 0:
1268 default:
1269 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1270 break;
1271 }
1272 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1273 __func__, usb_tx_cfg.bit_format,
1274 ucontrol->value.integer.value[0]);
1275
1276 return rc;
1277}
1278
1279static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1280 struct snd_ctl_elem_value *ucontrol)
1281{
1282 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1283 usb_rx_cfg.channels);
1284 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1285 return 0;
1286}
1287
1288static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1289 struct snd_ctl_elem_value *ucontrol)
1290{
1291 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1292
1293 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1294 return 1;
1295}
1296
1297static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1298 struct snd_ctl_elem_value *ucontrol)
1299{
1300 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1301 usb_tx_cfg.channels);
1302 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1303 return 0;
1304}
1305
1306static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1307 struct snd_ctl_elem_value *ucontrol)
1308{
1309 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1310
1311 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1312 return 1;
1313}
1314
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]1315static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1316 struct snd_ctl_elem_value *ucontrol)
1317{
1318 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1319 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1320 ucontrol->value.integer.value[0]);
1321 return 0;
1322}
1323
1324static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1325 struct snd_ctl_elem_value *ucontrol)
1326{
1327 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1328 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1329 return 1;
1330}
1331
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1332static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1333{
1334 int idx = 0;
1335
1336 if (strnstr(kcontrol->id.name, "Display Port RX",
1337 sizeof("Display Port RX"))) {
1338 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]1339 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1340 sizeof("Display Port1 RX"))) {
1341 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1342 } else {
1343 pr_err("%s: unsupported BE: %s\n",
1344 __func__, kcontrol->id.name);
1345 idx = -EINVAL;
1346 }
1347
1348 return idx;
1349}
1350
1351static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1352 struct snd_ctl_elem_value *ucontrol)
1353{
1354 int idx = ext_disp_get_port_idx(kcontrol);
1355
1356 if (idx < 0)
1357 return idx;
1358
1359 switch (ext_disp_rx_cfg[idx].bit_format) {
1360 case SNDRV_PCM_FORMAT_S24_3LE:
1361 ucontrol->value.integer.value[0] = 2;
1362 break;
1363 case SNDRV_PCM_FORMAT_S24_LE:
1364 ucontrol->value.integer.value[0] = 1;
1365 break;
1366 case SNDRV_PCM_FORMAT_S16_LE:
1367 default:
1368 ucontrol->value.integer.value[0] = 0;
1369 break;
1370 }
1371
1372 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1373 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1374 ucontrol->value.integer.value[0]);
1375 return 0;
1376}
1377
1378static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1379 struct snd_ctl_elem_value *ucontrol)
1380{
1381 int idx = ext_disp_get_port_idx(kcontrol);
1382
1383 if (idx < 0)
1384 return idx;
1385
1386 switch (ucontrol->value.integer.value[0]) {
1387 case 2:
1388 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1389 break;
1390 case 1:
1391 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1392 break;
1393 case 0:
1394 default:
1395 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1396 break;
1397 }
1398 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1399 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1400 ucontrol->value.integer.value[0]);
1401
1402 return 0;
1403}
1404
1405static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1406 struct snd_ctl_elem_value *ucontrol)
1407{
1408 int idx = ext_disp_get_port_idx(kcontrol);
1409
1410 if (idx < 0)
1411 return idx;
1412
1413 ucontrol->value.integer.value[0] =
1414 ext_disp_rx_cfg[idx].channels - 2;
1415
1416 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1417 idx, ext_disp_rx_cfg[idx].channels);
1418
1419 return 0;
1420}
1421
1422static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1423 struct snd_ctl_elem_value *ucontrol)
1424{
1425 int idx = ext_disp_get_port_idx(kcontrol);
1426
1427 if (idx < 0)
1428 return idx;
1429
1430 ext_disp_rx_cfg[idx].channels =
1431 ucontrol->value.integer.value[0] + 2;
1432
1433 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1434 idx, ext_disp_rx_cfg[idx].channels);
1435 return 1;
1436}
1437
1438static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1439 struct snd_ctl_elem_value *ucontrol)
1440{
1441 int sample_rate_val;
1442 int idx = ext_disp_get_port_idx(kcontrol);
1443
1444 if (idx < 0)
1445 return idx;
1446
1447 switch (ext_disp_rx_cfg[idx].sample_rate) {
1448 case SAMPLING_RATE_176P4KHZ:
1449 sample_rate_val = 6;
1450 break;
1451
1452 case SAMPLING_RATE_88P2KHZ:
1453 sample_rate_val = 5;
1454 break;
1455
1456 case SAMPLING_RATE_44P1KHZ:
1457 sample_rate_val = 4;
1458 break;
1459
1460 case SAMPLING_RATE_32KHZ:
1461 sample_rate_val = 3;
1462 break;
1463
1464 case SAMPLING_RATE_192KHZ:
1465 sample_rate_val = 2;
1466 break;
1467
1468 case SAMPLING_RATE_96KHZ:
1469 sample_rate_val = 1;
1470 break;
1471
1472 case SAMPLING_RATE_48KHZ:
1473 default:
1474 sample_rate_val = 0;
1475 break;
1476 }
1477
1478 ucontrol->value.integer.value[0] = sample_rate_val;
1479 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1480 idx, ext_disp_rx_cfg[idx].sample_rate);
1481
1482 return 0;
1483}
1484
1485static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1486 struct snd_ctl_elem_value *ucontrol)
1487{
1488 int idx = ext_disp_get_port_idx(kcontrol);
1489
1490 if (idx < 0)
1491 return idx;
1492
1493 switch (ucontrol->value.integer.value[0]) {
1494 case 6:
1495 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1496 break;
1497 case 5:
1498 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1499 break;
1500 case 4:
1501 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1502 break;
1503 case 3:
1504 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1505 break;
1506 case 2:
1507 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1508 break;
1509 case 1:
1510 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1511 break;
1512 case 0:
1513 default:
1514 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1515 break;
1516 }
1517
1518 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1519 __func__, ucontrol->value.integer.value[0], idx,
1520 ext_disp_rx_cfg[idx].sample_rate);
1521 return 0;
1522}
1523
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1524static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1525 struct snd_ctl_elem_value *ucontrol)
1526{
1527 pr_debug("%s: proxy_rx channels = %d\n",
1528 __func__, proxy_rx_cfg.channels);
1529 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1530
1531 return 0;
1532}
1533
1534static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1535 struct snd_ctl_elem_value *ucontrol)
1536{
1537 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1538 pr_debug("%s: proxy_rx channels = %d\n",
1539 __func__, proxy_rx_cfg.channels);
1540
1541 return 1;
1542}
1543
1544static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1545 struct tdm_port *port)
1546{
1547 if (port) {
1548 if (strnstr(kcontrol->id.name, "PRI",
1549 sizeof(kcontrol->id.name))) {
1550 port->mode = TDM_PRI;
1551 } else if (strnstr(kcontrol->id.name, "SEC",
1552 sizeof(kcontrol->id.name))) {
1553 port->mode = TDM_SEC;
1554 } else if (strnstr(kcontrol->id.name, "TERT",
1555 sizeof(kcontrol->id.name))) {
1556 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]1557 } else if (strnstr(kcontrol->id.name, "QUAT",
1558 sizeof(kcontrol->id.name))) {
1559 port->mode = TDM_QUAT;
1560 } else if (strnstr(kcontrol->id.name, "QUIN",
1561 sizeof(kcontrol->id.name))) {
1562 port->mode = TDM_QUIN;
1563 } else if (strnstr(kcontrol->id.name, "SEN",
1564 sizeof(kcontrol->id.name))) {
1565 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1566 } else {
1567 pr_err("%s: unsupported mode in: %s\n",
1568 __func__, kcontrol->id.name);
1569 return -EINVAL;
1570 }
1571
1572 if (strnstr(kcontrol->id.name, "RX_0",
1573 sizeof(kcontrol->id.name)) ||
1574 strnstr(kcontrol->id.name, "TX_0",
1575 sizeof(kcontrol->id.name))) {
1576 port->channel = TDM_0;
1577 } else if (strnstr(kcontrol->id.name, "RX_1",
1578 sizeof(kcontrol->id.name)) ||
1579 strnstr(kcontrol->id.name, "TX_1",
1580 sizeof(kcontrol->id.name))) {
1581 port->channel = TDM_1;
1582 } else if (strnstr(kcontrol->id.name, "RX_2",
1583 sizeof(kcontrol->id.name)) ||
1584 strnstr(kcontrol->id.name, "TX_2",
1585 sizeof(kcontrol->id.name))) {
1586 port->channel = TDM_2;
1587 } else if (strnstr(kcontrol->id.name, "RX_3",
1588 sizeof(kcontrol->id.name)) ||
1589 strnstr(kcontrol->id.name, "TX_3",
1590 sizeof(kcontrol->id.name))) {
1591 port->channel = TDM_3;
1592 } else if (strnstr(kcontrol->id.name, "RX_4",
1593 sizeof(kcontrol->id.name)) ||
1594 strnstr(kcontrol->id.name, "TX_4",
1595 sizeof(kcontrol->id.name))) {
1596 port->channel = TDM_4;
1597 } else if (strnstr(kcontrol->id.name, "RX_5",
1598 sizeof(kcontrol->id.name)) ||
1599 strnstr(kcontrol->id.name, "TX_5",
1600 sizeof(kcontrol->id.name))) {
1601 port->channel = TDM_5;
1602 } else if (strnstr(kcontrol->id.name, "RX_6",
1603 sizeof(kcontrol->id.name)) ||
1604 strnstr(kcontrol->id.name, "TX_6",
1605 sizeof(kcontrol->id.name))) {
1606 port->channel = TDM_6;
1607 } else if (strnstr(kcontrol->id.name, "RX_7",
1608 sizeof(kcontrol->id.name)) ||
1609 strnstr(kcontrol->id.name, "TX_7",
1610 sizeof(kcontrol->id.name))) {
1611 port->channel = TDM_7;
1612 } else {
1613 pr_err("%s: unsupported channel in: %s\n",
1614 __func__, kcontrol->id.name);
1615 return -EINVAL;
1616 }
1617 } else {
1618 return -EINVAL;
1619 }
1620 return 0;
1621}
1622
1623static int tdm_get_sample_rate(int value)
1624{
1625 int sample_rate = 0;
1626
1627 switch (value) {
1628 case 0:
1629 sample_rate = SAMPLING_RATE_8KHZ;
1630 break;
1631 case 1:
1632 sample_rate = SAMPLING_RATE_16KHZ;
1633 break;
1634 case 2:
1635 sample_rate = SAMPLING_RATE_32KHZ;
1636 break;
1637 case 3:
1638 sample_rate = SAMPLING_RATE_48KHZ;
1639 break;
1640 case 4:
1641 sample_rate = SAMPLING_RATE_176P4KHZ;
1642 break;
1643 case 5:
1644 sample_rate = SAMPLING_RATE_352P8KHZ;
1645 break;
1646 default:
1647 sample_rate = SAMPLING_RATE_48KHZ;
1648 break;
1649 }
1650 return sample_rate;
1651}
1652
1653static int tdm_get_sample_rate_val(int sample_rate)
1654{
1655 int sample_rate_val = 0;
1656
1657 switch (sample_rate) {
1658 case SAMPLING_RATE_8KHZ:
1659 sample_rate_val = 0;
1660 break;
1661 case SAMPLING_RATE_16KHZ:
1662 sample_rate_val = 1;
1663 break;
1664 case SAMPLING_RATE_32KHZ:
1665 sample_rate_val = 2;
1666 break;
1667 case SAMPLING_RATE_48KHZ:
1668 sample_rate_val = 3;
1669 break;
1670 case SAMPLING_RATE_176P4KHZ:
1671 sample_rate_val = 4;
1672 break;
1673 case SAMPLING_RATE_352P8KHZ:
1674 sample_rate_val = 5;
1675 break;
1676 default:
1677 sample_rate_val = 3;
1678 break;
1679 }
1680 return sample_rate_val;
1681}
1682
1683static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1684 struct snd_ctl_elem_value *ucontrol)
1685{
1686 struct tdm_port port;
1687 int ret = tdm_get_port_idx(kcontrol, &port);
1688
1689 if (ret) {
1690 pr_err("%s: unsupported control: %s\n",
1691 __func__, kcontrol->id.name);
1692 } else {
1693 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1694 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1695
1696 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1697 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1698 ucontrol->value.enumerated.item[0]);
1699 }
1700 return ret;
1701}
1702
1703static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1704 struct snd_ctl_elem_value *ucontrol)
1705{
1706 struct tdm_port port;
1707 int ret = tdm_get_port_idx(kcontrol, &port);
1708
1709 if (ret) {
1710 pr_err("%s: unsupported control: %s\n",
1711 __func__, kcontrol->id.name);
1712 } else {
1713 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1714 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1715
1716 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1717 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1718 ucontrol->value.enumerated.item[0]);
1719 }
1720 return ret;
1721}
1722
1723static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1724 struct snd_ctl_elem_value *ucontrol)
1725{
1726 struct tdm_port port;
1727 int ret = tdm_get_port_idx(kcontrol, &port);
1728
1729 if (ret) {
1730 pr_err("%s: unsupported control: %s\n",
1731 __func__, kcontrol->id.name);
1732 } else {
1733 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1734 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1735
1736 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1737 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1738 ucontrol->value.enumerated.item[0]);
1739 }
1740 return ret;
1741}
1742
1743static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1744 struct snd_ctl_elem_value *ucontrol)
1745{
1746 struct tdm_port port;
1747 int ret = tdm_get_port_idx(kcontrol, &port);
1748
1749 if (ret) {
1750 pr_err("%s: unsupported control: %s\n",
1751 __func__, kcontrol->id.name);
1752 } else {
1753 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1754 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1755
1756 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1757 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1758 ucontrol->value.enumerated.item[0]);
1759 }
1760 return ret;
1761}
1762
1763static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1764{
1765 int format = 0;
1766
1767 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1768 case 0:
1769 format = SNDRV_PCM_FORMAT_S16_LE;
1770 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1771 case 1:
1772 format = SNDRV_PCM_FORMAT_S24_LE;
1773 break;
1774 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1775 format = SNDRV_PCM_FORMAT_S32_LE;
1776 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1777 default:
1778 format = SNDRV_PCM_FORMAT_S16_LE;
1779 break;
1780 }
1781 return format;
1782}
1783
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1784static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1785{
1786 int value = 0;
1787
1788 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1789 case SNDRV_PCM_FORMAT_S16_LE:
1790 value = 0;
1791 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1792 case SNDRV_PCM_FORMAT_S24_LE:
1793 value = 1;
1794 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1795 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1796 value = 2;
1797 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1798 default:
1799 value = 0;
1800 break;
1801 }
1802 return value;
1803}
1804
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1805static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1806 struct snd_ctl_elem_value *ucontrol)
1807{
1808 struct tdm_port port;
1809 int ret = tdm_get_port_idx(kcontrol, &port);
1810
1811 if (ret) {
1812 pr_err("%s: unsupported control: %s\n",
1813 __func__, kcontrol->id.name);
1814 } else {
1815 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1816 tdm_rx_cfg[port.mode][port.channel].bit_format);
1817
1818 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1819 tdm_rx_cfg[port.mode][port.channel].bit_format,
1820 ucontrol->value.enumerated.item[0]);
1821 }
1822 return ret;
1823}
1824
1825static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1826 struct snd_ctl_elem_value *ucontrol)
1827{
1828 struct tdm_port port;
1829 int ret = tdm_get_port_idx(kcontrol, &port);
1830
1831 if (ret) {
1832 pr_err("%s: unsupported control: %s\n",
1833 __func__, kcontrol->id.name);
1834 } else {
1835 tdm_rx_cfg[port.mode][port.channel].bit_format =
1836 tdm_get_format(ucontrol->value.enumerated.item[0]);
1837
1838 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1839 tdm_rx_cfg[port.mode][port.channel].bit_format,
1840 ucontrol->value.enumerated.item[0]);
1841 }
1842 return ret;
1843}
1844
1845static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1846 struct snd_ctl_elem_value *ucontrol)
1847{
1848 struct tdm_port port;
1849 int ret = tdm_get_port_idx(kcontrol, &port);
1850
1851 if (ret) {
1852 pr_err("%s: unsupported control: %s\n",
1853 __func__, kcontrol->id.name);
1854 } else {
1855 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1856 tdm_tx_cfg[port.mode][port.channel].bit_format);
1857
1858 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1859 tdm_tx_cfg[port.mode][port.channel].bit_format,
1860 ucontrol->value.enumerated.item[0]);
1861 }
1862 return ret;
1863}
1864
1865static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1866 struct snd_ctl_elem_value *ucontrol)
1867{
1868 struct tdm_port port;
1869 int ret = tdm_get_port_idx(kcontrol, &port);
1870
1871 if (ret) {
1872 pr_err("%s: unsupported control: %s\n",
1873 __func__, kcontrol->id.name);
1874 } else {
1875 tdm_tx_cfg[port.mode][port.channel].bit_format =
1876 tdm_get_format(ucontrol->value.enumerated.item[0]);
1877
1878 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1879 tdm_tx_cfg[port.mode][port.channel].bit_format,
1880 ucontrol->value.enumerated.item[0]);
1881 }
1882 return ret;
1883}
1884
1885static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1886 struct snd_ctl_elem_value *ucontrol)
1887{
1888 struct tdm_port port;
1889 int ret = tdm_get_port_idx(kcontrol, &port);
1890
1891 if (ret) {
1892 pr_err("%s: unsupported control: %s\n",
1893 __func__, kcontrol->id.name);
1894 } else {
1895
1896 ucontrol->value.enumerated.item[0] =
1897 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1898
1899 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1900 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1901 ucontrol->value.enumerated.item[0]);
1902 }
1903 return ret;
1904}
1905
1906static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1907 struct snd_ctl_elem_value *ucontrol)
1908{
1909 struct tdm_port port;
1910 int ret = tdm_get_port_idx(kcontrol, &port);
1911
1912 if (ret) {
1913 pr_err("%s: unsupported control: %s\n",
1914 __func__, kcontrol->id.name);
1915 } else {
1916 tdm_rx_cfg[port.mode][port.channel].channels =
1917 ucontrol->value.enumerated.item[0] + 1;
1918
1919 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1920 tdm_rx_cfg[port.mode][port.channel].channels,
1921 ucontrol->value.enumerated.item[0] + 1);
1922 }
1923 return ret;
1924}
1925
1926static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1927 struct snd_ctl_elem_value *ucontrol)
1928{
1929 struct tdm_port port;
1930 int ret = tdm_get_port_idx(kcontrol, &port);
1931
1932 if (ret) {
1933 pr_err("%s: unsupported control: %s\n",
1934 __func__, kcontrol->id.name);
1935 } else {
1936 ucontrol->value.enumerated.item[0] =
1937 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1938
1939 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1940 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1941 ucontrol->value.enumerated.item[0]);
1942 }
1943 return ret;
1944}
1945
1946static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1947 struct snd_ctl_elem_value *ucontrol)
1948{
1949 struct tdm_port port;
1950 int ret = tdm_get_port_idx(kcontrol, &port);
1951
1952 if (ret) {
1953 pr_err("%s: unsupported control: %s\n",
1954 __func__, kcontrol->id.name);
1955 } else {
1956 tdm_tx_cfg[port.mode][port.channel].channels =
1957 ucontrol->value.enumerated.item[0] + 1;
1958
1959 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1960 tdm_tx_cfg[port.mode][port.channel].channels,
1961 ucontrol->value.enumerated.item[0] + 1);
1962 }
1963 return ret;
1964}
1965
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]1966static int tdm_slot_map_put(struct snd_kcontrol *kcontrol,
1967 struct snd_ctl_elem_value *ucontrol)
1968{
1969 int slot_index = 0;
1970 int interface = ucontrol->value.integer.value[0];
1971 int channel = ucontrol->value.integer.value[1];
1972 unsigned int offset_val = 0;
1973 unsigned int *slot_offset = NULL;
1974 struct tdm_dev_config *config = NULL;
1975
1976 if (interface < 0 || interface >= (TDM_INTERFACE_MAX * MAX_PATH)) {
1977 pr_err("%s: incorrect interface = %d\n", __func__, interface);
1978 return -EINVAL;
1979 }
1980 if (channel < 0 || channel >= TDM_PORT_MAX) {
1981 pr_err("%s: incorrect channel = %d\n", __func__, channel);
1982 return -EINVAL;
1983 }
1984
1985 pr_debug("%s: interface = %d, channel = %d\n", __func__,
1986 interface, channel);
1987
1988 config = ((struct tdm_dev_config *) tdm_cfg[interface / MAX_PATH]) +
1989 ((interface % MAX_PATH) * TDM_PORT_MAX) + channel;
1990 slot_offset = config->tdm_slot_offset;
1991
1992 for (slot_index = 0; slot_index < TDM_MAX_SLOTS; slot_index++) {
1993 offset_val = ucontrol->value.integer.value[MAX_PATH +
1994 slot_index];
1995 /* Offset value can only be 0, 4, 8, ..28 */
1996 if (offset_val % 4 == 0 && offset_val <= 28)
1997 slot_offset[slot_index] = offset_val;
1998 pr_debug("%s: slot offset[%d] = %d\n", __func__,
1999 slot_index, slot_offset[slot_index]);
2000 }
2001
2002 return 0;
2003}
2004
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2005static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2006{
2007 int idx = 0;
2008
2009 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2010 sizeof("PRIM_AUX_PCM"))) {
2011 idx = PRIM_AUX_PCM;
2012 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2013 sizeof("SEC_AUX_PCM"))) {
2014 idx = SEC_AUX_PCM;
2015 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2016 sizeof("TERT_AUX_PCM"))) {
2017 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2018 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2019 sizeof("QUAT_AUX_PCM"))) {
2020 idx = QUAT_AUX_PCM;
2021 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2022 sizeof("QUIN_AUX_PCM"))) {
2023 idx = QUIN_AUX_PCM;
2024 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
2025 sizeof("SEN_AUX_PCM"))) {
2026 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2027 } else {
2028 pr_err("%s: unsupported port: %s\n",
2029 __func__, kcontrol->id.name);
2030 idx = -EINVAL;
2031 }
2032
2033 return idx;
2034}
2035
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2036static int aux_pcm_get_sample_rate(int value)
2037{
2038 int sample_rate = 0;
2039
2040 switch (value) {
2041 case 1:
2042 sample_rate = SAMPLING_RATE_16KHZ;
2043 break;
2044 case 0:
2045 default:
2046 sample_rate = SAMPLING_RATE_8KHZ;
2047 break;
2048 }
2049 return sample_rate;
2050}
2051
2052static int aux_pcm_get_sample_rate_val(int sample_rate)
2053{
2054 int sample_rate_val = 0;
2055
2056 switch (sample_rate) {
2057 case SAMPLING_RATE_16KHZ:
2058 sample_rate_val = 1;
2059 break;
2060 case SAMPLING_RATE_8KHZ:
2061 default:
2062 sample_rate_val = 0;
2063 break;
2064 }
2065 return sample_rate_val;
2066}
2067
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2068static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2069{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2070 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2071
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2072 switch (value) {
2073 case 0:
2074 format = SNDRV_PCM_FORMAT_S16_LE;
2075 break;
2076 case 1:
2077 format = SNDRV_PCM_FORMAT_S24_LE;
2078 break;
2079 case 2:
2080 format = SNDRV_PCM_FORMAT_S24_3LE;
2081 break;
2082 case 3:
2083 format = SNDRV_PCM_FORMAT_S32_LE;
2084 break;
2085 default:
2086 format = SNDRV_PCM_FORMAT_S16_LE;
2087 break;
2088 }
2089 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2090}
2091
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2092static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2093{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2094 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2095
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2096 switch (format) {
2097 case SNDRV_PCM_FORMAT_S16_LE:
2098 value = 0;
2099 break;
2100 case SNDRV_PCM_FORMAT_S24_LE:
2101 value = 1;
2102 break;
2103 case SNDRV_PCM_FORMAT_S24_3LE:
2104 value = 2;
2105 break;
2106 case SNDRV_PCM_FORMAT_S32_LE:
2107 value = 3;
2108 break;
2109 default:
2110 value = 0;
2111 break;
2112 }
2113 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2114}
2115
2116static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2117 struct snd_ctl_elem_value *ucontrol)
2118{
2119 int idx = aux_pcm_get_port_idx(kcontrol);
2120
2121 if (idx < 0)
2122 return idx;
2123
2124 ucontrol->value.enumerated.item[0] =
2125 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2126
2127 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2128 idx, aux_pcm_rx_cfg[idx].sample_rate,
2129 ucontrol->value.enumerated.item[0]);
2130
2131 return 0;
2132}
2133
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2134static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2135 struct snd_ctl_elem_value *ucontrol)
2136{
2137 int idx = aux_pcm_get_port_idx(kcontrol);
2138
2139 if (idx < 0)
2140 return idx;
2141
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2142 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2143 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2144
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2145 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2146 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2147 ucontrol->value.enumerated.item[0]);
2148
2149 return 0;
2150}
2151
2152static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2153 struct snd_ctl_elem_value *ucontrol)
2154{
2155 int idx = aux_pcm_get_port_idx(kcontrol);
2156
2157 if (idx < 0)
2158 return idx;
2159
2160 ucontrol->value.enumerated.item[0] =
2161 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2162
2163 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2164 idx, aux_pcm_tx_cfg[idx].sample_rate,
2165 ucontrol->value.enumerated.item[0]);
2166
2167 return 0;
2168}
2169
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2170static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2171 struct snd_ctl_elem_value *ucontrol)
2172{
2173 int idx = aux_pcm_get_port_idx(kcontrol);
2174
2175 if (idx < 0)
2176 return idx;
2177
2178 aux_pcm_tx_cfg[idx].sample_rate =
2179 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2180
2181 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2182 idx, aux_pcm_tx_cfg[idx].sample_rate,
2183 ucontrol->value.enumerated.item[0]);
2184
2185 return 0;
2186}
2187
2188static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
2189 struct snd_ctl_elem_value *ucontrol)
2190{
2191 int idx = aux_pcm_get_port_idx(kcontrol);
2192
2193 if (idx < 0)
2194 return idx;
2195
2196 ucontrol->value.enumerated.item[0] =
2197 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
2198
2199 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2200 idx, aux_pcm_rx_cfg[idx].bit_format,
2201 ucontrol->value.enumerated.item[0]);
2202
2203 return 0;
2204}
2205
2206static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
2207 struct snd_ctl_elem_value *ucontrol)
2208{
2209 int idx = aux_pcm_get_port_idx(kcontrol);
2210
2211 if (idx < 0)
2212 return idx;
2213
2214 aux_pcm_rx_cfg[idx].bit_format =
2215 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2216
2217 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2218 idx, aux_pcm_rx_cfg[idx].bit_format,
2219 ucontrol->value.enumerated.item[0]);
2220
2221 return 0;
2222}
2223
2224static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2225 struct snd_ctl_elem_value *ucontrol)
2226{
2227 int idx = aux_pcm_get_port_idx(kcontrol);
2228
2229 if (idx < 0)
2230 return idx;
2231
2232 ucontrol->value.enumerated.item[0] =
2233 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2234
2235 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2236 idx, aux_pcm_tx_cfg[idx].bit_format,
2237 ucontrol->value.enumerated.item[0]);
2238
2239 return 0;
2240}
2241
2242static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2243 struct snd_ctl_elem_value *ucontrol)
2244{
2245 int idx = aux_pcm_get_port_idx(kcontrol);
2246
2247 if (idx < 0)
2248 return idx;
2249
2250 aux_pcm_tx_cfg[idx].bit_format =
2251 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2252
2253 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2254 idx, aux_pcm_tx_cfg[idx].bit_format,
2255 ucontrol->value.enumerated.item[0]);
2256
2257 return 0;
2258}
2259
2260static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2261{
2262 int idx = 0;
2263
2264 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2265 sizeof("PRIM_MI2S_RX"))) {
2266 idx = PRIM_MI2S;
2267 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2268 sizeof("SEC_MI2S_RX"))) {
2269 idx = SEC_MI2S;
2270 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2271 sizeof("TERT_MI2S_RX"))) {
2272 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2273 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2274 sizeof("QUAT_MI2S_RX"))) {
2275 idx = QUAT_MI2S;
2276 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2277 sizeof("QUIN_MI2S_RX"))) {
2278 idx = QUIN_MI2S;
2279 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2280 sizeof("SEN_MI2S_RX"))) {
2281 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2282 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2283 sizeof("PRIM_MI2S_TX"))) {
2284 idx = PRIM_MI2S;
2285 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2286 sizeof("SEC_MI2S_TX"))) {
2287 idx = SEC_MI2S;
2288 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2289 sizeof("TERT_MI2S_TX"))) {
2290 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2291 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2292 sizeof("QUAT_MI2S_TX"))) {
2293 idx = QUAT_MI2S;
2294 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2295 sizeof("QUIN_MI2S_TX"))) {
2296 idx = QUIN_MI2S;
2297 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2298 sizeof("SEN_MI2S_TX"))) {
2299 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2300 } else {
2301 pr_err("%s: unsupported channel: %s\n",
2302 __func__, kcontrol->id.name);
2303 idx = -EINVAL;
2304 }
2305
2306 return idx;
2307}
2308
2309static int mi2s_get_sample_rate(int value)
2310{
2311 int sample_rate = 0;
2312
2313 switch (value) {
2314 case 0:
2315 sample_rate = SAMPLING_RATE_8KHZ;
2316 break;
2317 case 1:
2318 sample_rate = SAMPLING_RATE_11P025KHZ;
2319 break;
2320 case 2:
2321 sample_rate = SAMPLING_RATE_16KHZ;
2322 break;
2323 case 3:
2324 sample_rate = SAMPLING_RATE_22P05KHZ;
2325 break;
2326 case 4:
2327 sample_rate = SAMPLING_RATE_32KHZ;
2328 break;
2329 case 5:
2330 sample_rate = SAMPLING_RATE_44P1KHZ;
2331 break;
2332 case 6:
2333 sample_rate = SAMPLING_RATE_48KHZ;
2334 break;
2335 case 7:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2336 sample_rate = SAMPLING_RATE_88P2KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2337 break;
2338 case 8:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2339 sample_rate = SAMPLING_RATE_96KHZ;
2340 break;
2341 case 9:
2342 sample_rate = SAMPLING_RATE_176P4KHZ;
2343 break;
2344 case 10:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2345 sample_rate = SAMPLING_RATE_192KHZ;
2346 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2347 case 11:
2348 sample_rate = SAMPLING_RATE_352P8KHZ;
2349 break;
2350 case 12:
2351 sample_rate = SAMPLING_RATE_384KHZ;
2352 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2353 default:
2354 sample_rate = SAMPLING_RATE_48KHZ;
2355 break;
2356 }
2357 return sample_rate;
2358}
2359
2360static int mi2s_get_sample_rate_val(int sample_rate)
2361{
2362 int sample_rate_val = 0;
2363
2364 switch (sample_rate) {
2365 case SAMPLING_RATE_8KHZ:
2366 sample_rate_val = 0;
2367 break;
2368 case SAMPLING_RATE_11P025KHZ:
2369 sample_rate_val = 1;
2370 break;
2371 case SAMPLING_RATE_16KHZ:
2372 sample_rate_val = 2;
2373 break;
2374 case SAMPLING_RATE_22P05KHZ:
2375 sample_rate_val = 3;
2376 break;
2377 case SAMPLING_RATE_32KHZ:
2378 sample_rate_val = 4;
2379 break;
2380 case SAMPLING_RATE_44P1KHZ:
2381 sample_rate_val = 5;
2382 break;
2383 case SAMPLING_RATE_48KHZ:
2384 sample_rate_val = 6;
2385 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2386 case SAMPLING_RATE_88P2KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2387 sample_rate_val = 7;
2388 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2389 case SAMPLING_RATE_96KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2390 sample_rate_val = 8;
2391 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2392 case SAMPLING_RATE_176P4KHZ:
2393 sample_rate_val = 9;
2394 break;
2395 case SAMPLING_RATE_192KHZ:
2396 sample_rate_val = 10;
2397 break;
2398 case SAMPLING_RATE_352P8KHZ:
2399 sample_rate_val = 11;
2400 break;
2401 case SAMPLING_RATE_384KHZ:
2402 sample_rate_val = 12;
2403 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2404 default:
2405 sample_rate_val = 6;
2406 break;
2407 }
2408 return sample_rate_val;
2409}
2410
2411static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2412 struct snd_ctl_elem_value *ucontrol)
2413{
2414 int idx = mi2s_get_port_idx(kcontrol);
2415
2416 if (idx < 0)
2417 return idx;
2418
2419 ucontrol->value.enumerated.item[0] =
2420 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2421
2422 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2423 idx, mi2s_rx_cfg[idx].sample_rate,
2424 ucontrol->value.enumerated.item[0]);
2425
2426 return 0;
2427}
2428
2429static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2430 struct snd_ctl_elem_value *ucontrol)
2431{
2432 int idx = mi2s_get_port_idx(kcontrol);
2433
2434 if (idx < 0)
2435 return idx;
2436
2437 mi2s_rx_cfg[idx].sample_rate =
2438 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2439
2440 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2441 idx, mi2s_rx_cfg[idx].sample_rate,
2442 ucontrol->value.enumerated.item[0]);
2443
2444 return 0;
2445}
2446
2447static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2448 struct snd_ctl_elem_value *ucontrol)
2449{
2450 int idx = mi2s_get_port_idx(kcontrol);
2451
2452 if (idx < 0)
2453 return idx;
2454
2455 ucontrol->value.enumerated.item[0] =
2456 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2457
2458 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2459 idx, mi2s_tx_cfg[idx].sample_rate,
2460 ucontrol->value.enumerated.item[0]);
2461
2462 return 0;
2463}
2464
2465static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2466 struct snd_ctl_elem_value *ucontrol)
2467{
2468 int idx = mi2s_get_port_idx(kcontrol);
2469
2470 if (idx < 0)
2471 return idx;
2472
2473 mi2s_tx_cfg[idx].sample_rate =
2474 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2475
2476 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2477 idx, mi2s_tx_cfg[idx].sample_rate,
2478 ucontrol->value.enumerated.item[0]);
2479
2480 return 0;
2481}
2482
2483static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2484 struct snd_ctl_elem_value *ucontrol)
2485{
2486 int idx = mi2s_get_port_idx(kcontrol);
2487
2488 if (idx < 0)
2489 return idx;
2490
2491 ucontrol->value.enumerated.item[0] =
2492 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2493
2494 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2495 idx, mi2s_rx_cfg[idx].bit_format,
2496 ucontrol->value.enumerated.item[0]);
2497
2498 return 0;
2499}
2500
2501static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2502 struct snd_ctl_elem_value *ucontrol)
2503{
2504 int idx = mi2s_get_port_idx(kcontrol);
2505
2506 if (idx < 0)
2507 return idx;
2508
2509 mi2s_rx_cfg[idx].bit_format =
2510 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2511
2512 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2513 idx, mi2s_rx_cfg[idx].bit_format,
2514 ucontrol->value.enumerated.item[0]);
2515
2516 return 0;
2517}
2518
2519static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2520 struct snd_ctl_elem_value *ucontrol)
2521{
2522 int idx = mi2s_get_port_idx(kcontrol);
2523
2524 if (idx < 0)
2525 return idx;
2526
2527 ucontrol->value.enumerated.item[0] =
2528 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2529
2530 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2531 idx, mi2s_tx_cfg[idx].bit_format,
2532 ucontrol->value.enumerated.item[0]);
2533
2534 return 0;
2535}
2536
2537static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2538 struct snd_ctl_elem_value *ucontrol)
2539{
2540 int idx = mi2s_get_port_idx(kcontrol);
2541
2542 if (idx < 0)
2543 return idx;
2544
2545 mi2s_tx_cfg[idx].bit_format =
2546 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2547
2548 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2549 idx, mi2s_tx_cfg[idx].bit_format,
2550 ucontrol->value.enumerated.item[0]);
2551
2552 return 0;
2553}
2554static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2555 struct snd_ctl_elem_value *ucontrol)
2556{
2557 int idx = mi2s_get_port_idx(kcontrol);
2558
2559 if (idx < 0)
2560 return idx;
2561
2562 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2563 idx, mi2s_rx_cfg[idx].channels);
2564 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2565
2566 return 0;
2567}
2568
2569static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2570 struct snd_ctl_elem_value *ucontrol)
2571{
2572 int idx = mi2s_get_port_idx(kcontrol);
2573
2574 if (idx < 0)
2575 return idx;
2576
2577 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2578 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2579 idx, mi2s_rx_cfg[idx].channels);
2580
2581 return 1;
2582}
2583
2584static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2585 struct snd_ctl_elem_value *ucontrol)
2586{
2587 int idx = mi2s_get_port_idx(kcontrol);
2588
2589 if (idx < 0)
2590 return idx;
2591
2592 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2593 idx, mi2s_tx_cfg[idx].channels);
2594 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2595
2596 return 0;
2597}
2598
2599static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2600 struct snd_ctl_elem_value *ucontrol)
2601{
2602 int idx = mi2s_get_port_idx(kcontrol);
2603
2604 if (idx < 0)
2605 return idx;
2606
2607 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2608 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2609 idx, mi2s_tx_cfg[idx].channels);
2610
2611 return 1;
2612}
2613
2614static int msm_get_port_id(int be_id)
2615{
2616 int afe_port_id = 0;
2617
2618 switch (be_id) {
2619 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2620 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2621 break;
2622 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2623 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2624 break;
2625 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2626 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2627 break;
2628 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2629 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2630 break;
2631 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2632 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2633 break;
2634 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2635 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2636 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2637 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2638 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2639 break;
2640 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2641 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2642 break;
2643 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2644 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2645 break;
2646 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2647 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2648 break;
2649 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2650 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2651 break;
2652 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2653 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2654 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]2655 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2656 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2657 break;
2658 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2659 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2660 break;
2661 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2662 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2663 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2664 default:
2665 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2666 afe_port_id = -EINVAL;
2667 }
2668
2669 return afe_port_id;
2670}
2671
2672static u32 get_mi2s_bits_per_sample(u32 bit_format)
2673{
2674 u32 bit_per_sample = 0;
2675
2676 switch (bit_format) {
2677 case SNDRV_PCM_FORMAT_S32_LE:
2678 case SNDRV_PCM_FORMAT_S24_3LE:
2679 case SNDRV_PCM_FORMAT_S24_LE:
2680 bit_per_sample = 32;
2681 break;
2682 case SNDRV_PCM_FORMAT_S16_LE:
2683 default:
2684 bit_per_sample = 16;
2685 break;
2686 }
2687
2688 return bit_per_sample;
2689}
2690
2691static void update_mi2s_clk_val(int dai_id, int stream)
2692{
2693 u32 bit_per_sample = 0;
2694
2695 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2696 bit_per_sample =
2697 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2698 mi2s_clk[dai_id].clk_freq_in_hz =
2699 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2700 } else {
2701 bit_per_sample =
2702 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2703 mi2s_clk[dai_id].clk_freq_in_hz =
2704 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2705 }
2706}
2707
2708static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2709{
2710 int ret = 0;
2711 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2712 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2713 int port_id = 0;
2714 int index = cpu_dai->id;
2715
2716 port_id = msm_get_port_id(rtd->dai_link->id);
2717 if (port_id < 0) {
2718 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2719 ret = port_id;
2720 goto err;
2721 }
2722
2723 if (enable) {
2724 update_mi2s_clk_val(index, substream->stream);
2725 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2726 mi2s_clk[index].clk_freq_in_hz);
2727 }
2728
2729 mi2s_clk[index].enable = enable;
2730 ret = afe_set_lpass_clock_v2(port_id,
2731 &mi2s_clk[index]);
2732 if (ret < 0) {
2733 dev_err(rtd->card->dev,
2734 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2735 __func__, port_id, ret);
2736 goto err;
2737 }
2738
2739err:
2740 return ret;
2741}
2742
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2743static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2744{
2745 int idx = 0;
2746
2747 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2748 sizeof("WSA_CDC_DMA_RX_0")))
2749 idx = WSA_CDC_DMA_RX_0;
2750 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2751 sizeof("WSA_CDC_DMA_RX_0")))
2752 idx = WSA_CDC_DMA_RX_1;
2753 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2754 sizeof("RX_CDC_DMA_RX_0")))
2755 idx = RX_CDC_DMA_RX_0;
2756 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2757 sizeof("RX_CDC_DMA_RX_1")))
2758 idx = RX_CDC_DMA_RX_1;
2759 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2760 sizeof("RX_CDC_DMA_RX_2")))
2761 idx = RX_CDC_DMA_RX_2;
2762 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2763 sizeof("RX_CDC_DMA_RX_3")))
2764 idx = RX_CDC_DMA_RX_3;
2765 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2766 sizeof("RX_CDC_DMA_RX_5")))
2767 idx = RX_CDC_DMA_RX_5;
2768 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2769 sizeof("WSA_CDC_DMA_TX_0")))
2770 idx = WSA_CDC_DMA_TX_0;
2771 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2772 sizeof("WSA_CDC_DMA_TX_1")))
2773 idx = WSA_CDC_DMA_TX_1;
2774 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2775 sizeof("WSA_CDC_DMA_TX_2")))
2776 idx = WSA_CDC_DMA_TX_2;
2777 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2778 sizeof("TX_CDC_DMA_TX_0")))
2779 idx = TX_CDC_DMA_TX_0;
2780 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2781 sizeof("TX_CDC_DMA_TX_3")))
2782 idx = TX_CDC_DMA_TX_3;
2783 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2784 sizeof("TX_CDC_DMA_TX_4")))
2785 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2786 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2787 sizeof("VA_CDC_DMA_TX_0")))
2788 idx = VA_CDC_DMA_TX_0;
2789 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2790 sizeof("VA_CDC_DMA_TX_1")))
2791 idx = VA_CDC_DMA_TX_1;
2792 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2793 sizeof("VA_CDC_DMA_TX_2")))
2794 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2795 else {
2796 pr_err("%s: unsupported channel: %s\n",
2797 __func__, kcontrol->id.name);
2798 return -EINVAL;
2799 }
2800
2801 return idx;
2802}
2803
2804static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2805 struct snd_ctl_elem_value *ucontrol)
2806{
2807 int ch_num = cdc_dma_get_port_idx(kcontrol);
2808
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2809 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2810 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2811 return ch_num;
2812 }
2813
2814 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2815 cdc_dma_rx_cfg[ch_num].channels - 1);
2816 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2817 return 0;
2818}
2819
2820static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2821 struct snd_ctl_elem_value *ucontrol)
2822{
2823 int ch_num = cdc_dma_get_port_idx(kcontrol);
2824
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2825 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2826 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2827 return ch_num;
2828 }
2829
2830 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2831
2832 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2833 cdc_dma_rx_cfg[ch_num].channels);
2834 return 1;
2835}
2836
2837static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2838 struct snd_ctl_elem_value *ucontrol)
2839{
2840 int ch_num = cdc_dma_get_port_idx(kcontrol);
2841
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2842 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2843 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2844 return ch_num;
2845 }
2846
2847 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2848 case SNDRV_PCM_FORMAT_S32_LE:
2849 ucontrol->value.integer.value[0] = 3;
2850 break;
2851 case SNDRV_PCM_FORMAT_S24_3LE:
2852 ucontrol->value.integer.value[0] = 2;
2853 break;
2854 case SNDRV_PCM_FORMAT_S24_LE:
2855 ucontrol->value.integer.value[0] = 1;
2856 break;
2857 case SNDRV_PCM_FORMAT_S16_LE:
2858 default:
2859 ucontrol->value.integer.value[0] = 0;
2860 break;
2861 }
2862
2863 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2864 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2865 ucontrol->value.integer.value[0]);
2866 return 0;
2867}
2868
2869static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2870 struct snd_ctl_elem_value *ucontrol)
2871{
2872 int rc = 0;
2873 int ch_num = cdc_dma_get_port_idx(kcontrol);
2874
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2875 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2876 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2877 return ch_num;
2878 }
2879
2880 switch (ucontrol->value.integer.value[0]) {
2881 case 3:
2882 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2883 break;
2884 case 2:
2885 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2886 break;
2887 case 1:
2888 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2889 break;
2890 case 0:
2891 default:
2892 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2893 break;
2894 }
2895 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2896 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2897 ucontrol->value.integer.value[0]);
2898
2899 return rc;
2900}
2901
2902
2903static int cdc_dma_get_sample_rate_val(int sample_rate)
2904{
2905 int sample_rate_val = 0;
2906
2907 switch (sample_rate) {
2908 case SAMPLING_RATE_8KHZ:
2909 sample_rate_val = 0;
2910 break;
2911 case SAMPLING_RATE_11P025KHZ:
2912 sample_rate_val = 1;
2913 break;
2914 case SAMPLING_RATE_16KHZ:
2915 sample_rate_val = 2;
2916 break;
2917 case SAMPLING_RATE_22P05KHZ:
2918 sample_rate_val = 3;
2919 break;
2920 case SAMPLING_RATE_32KHZ:
2921 sample_rate_val = 4;
2922 break;
2923 case SAMPLING_RATE_44P1KHZ:
2924 sample_rate_val = 5;
2925 break;
2926 case SAMPLING_RATE_48KHZ:
2927 sample_rate_val = 6;
2928 break;
2929 case SAMPLING_RATE_88P2KHZ:
2930 sample_rate_val = 7;
2931 break;
2932 case SAMPLING_RATE_96KHZ:
2933 sample_rate_val = 8;
2934 break;
2935 case SAMPLING_RATE_176P4KHZ:
2936 sample_rate_val = 9;
2937 break;
2938 case SAMPLING_RATE_192KHZ:
2939 sample_rate_val = 10;
2940 break;
2941 case SAMPLING_RATE_352P8KHZ:
2942 sample_rate_val = 11;
2943 break;
2944 case SAMPLING_RATE_384KHZ:
2945 sample_rate_val = 12;
2946 break;
2947 default:
2948 sample_rate_val = 6;
2949 break;
2950 }
2951 return sample_rate_val;
2952}
2953
2954static int cdc_dma_get_sample_rate(int value)
2955{
2956 int sample_rate = 0;
2957
2958 switch (value) {
2959 case 0:
2960 sample_rate = SAMPLING_RATE_8KHZ;
2961 break;
2962 case 1:
2963 sample_rate = SAMPLING_RATE_11P025KHZ;
2964 break;
2965 case 2:
2966 sample_rate = SAMPLING_RATE_16KHZ;
2967 break;
2968 case 3:
2969 sample_rate = SAMPLING_RATE_22P05KHZ;
2970 break;
2971 case 4:
2972 sample_rate = SAMPLING_RATE_32KHZ;
2973 break;
2974 case 5:
2975 sample_rate = SAMPLING_RATE_44P1KHZ;
2976 break;
2977 case 6:
2978 sample_rate = SAMPLING_RATE_48KHZ;
2979 break;
2980 case 7:
2981 sample_rate = SAMPLING_RATE_88P2KHZ;
2982 break;
2983 case 8:
2984 sample_rate = SAMPLING_RATE_96KHZ;
2985 break;
2986 case 9:
2987 sample_rate = SAMPLING_RATE_176P4KHZ;
2988 break;
2989 case 10:
2990 sample_rate = SAMPLING_RATE_192KHZ;
2991 break;
2992 case 11:
2993 sample_rate = SAMPLING_RATE_352P8KHZ;
2994 break;
2995 case 12:
2996 sample_rate = SAMPLING_RATE_384KHZ;
2997 break;
2998 default:
2999 sample_rate = SAMPLING_RATE_48KHZ;
3000 break;
3001 }
3002 return sample_rate;
3003}
3004
3005static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3006 struct snd_ctl_elem_value *ucontrol)
3007{
3008 int ch_num = cdc_dma_get_port_idx(kcontrol);
3009
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]3010 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3011 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3012 return ch_num;
3013 }
3014
3015 ucontrol->value.enumerated.item[0] =
3016 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
3017
3018 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
3019 cdc_dma_rx_cfg[ch_num].sample_rate);
3020 return 0;
3021}
3022
3023static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3024 struct snd_ctl_elem_value *ucontrol)
3025{
3026 int ch_num = cdc_dma_get_port_idx(kcontrol);
3027
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]3028 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3029 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3030 return ch_num;
3031 }
3032
3033 cdc_dma_rx_cfg[ch_num].sample_rate =
3034 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
3035
3036
3037 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
3038 __func__, ucontrol->value.enumerated.item[0],
3039 cdc_dma_rx_cfg[ch_num].sample_rate);
3040 return 0;
3041}
3042
3043static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
3044 struct snd_ctl_elem_value *ucontrol)
3045{
3046 int ch_num = cdc_dma_get_port_idx(kcontrol);
3047
3048 if (ch_num < 0) {
3049 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3050 return ch_num;
3051 }
3052
3053 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3054 cdc_dma_tx_cfg[ch_num].channels);
3055 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
3056 return 0;
3057}
3058
3059static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
3060 struct snd_ctl_elem_value *ucontrol)
3061{
3062 int ch_num = cdc_dma_get_port_idx(kcontrol);
3063
3064 if (ch_num < 0) {
3065 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3066 return ch_num;
3067 }
3068
3069 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
3070
3071 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3072 cdc_dma_tx_cfg[ch_num].channels);
3073 return 1;
3074}
3075
3076static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3077 struct snd_ctl_elem_value *ucontrol)
3078{
3079 int sample_rate_val;
3080 int ch_num = cdc_dma_get_port_idx(kcontrol);
3081
3082 if (ch_num < 0) {
3083 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3084 return ch_num;
3085 }
3086
3087 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
3088 case SAMPLING_RATE_384KHZ:
3089 sample_rate_val = 12;
3090 break;
3091 case SAMPLING_RATE_352P8KHZ:
3092 sample_rate_val = 11;
3093 break;
3094 case SAMPLING_RATE_192KHZ:
3095 sample_rate_val = 10;
3096 break;
3097 case SAMPLING_RATE_176P4KHZ:
3098 sample_rate_val = 9;
3099 break;
3100 case SAMPLING_RATE_96KHZ:
3101 sample_rate_val = 8;
3102 break;
3103 case SAMPLING_RATE_88P2KHZ:
3104 sample_rate_val = 7;
3105 break;
3106 case SAMPLING_RATE_48KHZ:
3107 sample_rate_val = 6;
3108 break;
3109 case SAMPLING_RATE_44P1KHZ:
3110 sample_rate_val = 5;
3111 break;
3112 case SAMPLING_RATE_32KHZ:
3113 sample_rate_val = 4;
3114 break;
3115 case SAMPLING_RATE_22P05KHZ:
3116 sample_rate_val = 3;
3117 break;
3118 case SAMPLING_RATE_16KHZ:
3119 sample_rate_val = 2;
3120 break;
3121 case SAMPLING_RATE_11P025KHZ:
3122 sample_rate_val = 1;
3123 break;
3124 case SAMPLING_RATE_8KHZ:
3125 sample_rate_val = 0;
3126 break;
3127 default:
3128 sample_rate_val = 6;
3129 break;
3130 }
3131
3132 ucontrol->value.integer.value[0] = sample_rate_val;
3133 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
3134 cdc_dma_tx_cfg[ch_num].sample_rate);
3135 return 0;
3136}
3137
3138static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3139 struct snd_ctl_elem_value *ucontrol)
3140{
3141 int ch_num = cdc_dma_get_port_idx(kcontrol);
3142
3143 if (ch_num < 0) {
3144 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3145 return ch_num;
3146 }
3147
3148 switch (ucontrol->value.integer.value[0]) {
3149 case 12:
3150 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
3151 break;
3152 case 11:
3153 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
3154 break;
3155 case 10:
3156 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
3157 break;
3158 case 9:
3159 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
3160 break;
3161 case 8:
3162 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
3163 break;
3164 case 7:
3165 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
3166 break;
3167 case 6:
3168 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3169 break;
3170 case 5:
3171 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
3172 break;
3173 case 4:
3174 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
3175 break;
3176 case 3:
3177 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
3178 break;
3179 case 2:
3180 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
3181 break;
3182 case 1:
3183 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
3184 break;
3185 case 0:
3186 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
3187 break;
3188 default:
3189 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3190 break;
3191 }
3192
3193 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
3194 __func__, ucontrol->value.integer.value[0],
3195 cdc_dma_tx_cfg[ch_num].sample_rate);
3196 return 0;
3197}
3198
3199static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
3200 struct snd_ctl_elem_value *ucontrol)
3201{
3202 int ch_num = cdc_dma_get_port_idx(kcontrol);
3203
3204 if (ch_num < 0) {
3205 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3206 return ch_num;
3207 }
3208
3209 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
3210 case SNDRV_PCM_FORMAT_S32_LE:
3211 ucontrol->value.integer.value[0] = 3;
3212 break;
3213 case SNDRV_PCM_FORMAT_S24_3LE:
3214 ucontrol->value.integer.value[0] = 2;
3215 break;
3216 case SNDRV_PCM_FORMAT_S24_LE:
3217 ucontrol->value.integer.value[0] = 1;
3218 break;
3219 case SNDRV_PCM_FORMAT_S16_LE:
3220 default:
3221 ucontrol->value.integer.value[0] = 0;
3222 break;
3223 }
3224
3225 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3226 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3227 ucontrol->value.integer.value[0]);
3228 return 0;
3229}
3230
3231static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
3232 struct snd_ctl_elem_value *ucontrol)
3233{
3234 int rc = 0;
3235 int ch_num = cdc_dma_get_port_idx(kcontrol);
3236
3237 if (ch_num < 0) {
3238 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3239 return ch_num;
3240 }
3241
3242 switch (ucontrol->value.integer.value[0]) {
3243 case 3:
3244 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3245 break;
3246 case 2:
3247 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3248 break;
3249 case 1:
3250 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3251 break;
3252 case 0:
3253 default:
3254 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3255 break;
3256 }
3257 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3258 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3259 ucontrol->value.integer.value[0]);
3260
3261 return rc;
3262}
3263
3264static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3265{
3266 int idx = 0;
3267
3268 switch (be_id) {
3269 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3270 idx = WSA_CDC_DMA_RX_0;
3271 break;
3272 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3273 idx = WSA_CDC_DMA_TX_0;
3274 break;
3275 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3276 idx = WSA_CDC_DMA_RX_1;
3277 break;
3278 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3279 idx = WSA_CDC_DMA_TX_1;
3280 break;
3281 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3282 idx = WSA_CDC_DMA_TX_2;
3283 break;
3284 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3285 idx = RX_CDC_DMA_RX_0;
3286 break;
3287 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3288 idx = RX_CDC_DMA_RX_1;
3289 break;
3290 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3291 idx = RX_CDC_DMA_RX_2;
3292 break;
3293 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3294 idx = RX_CDC_DMA_RX_3;
3295 break;
3296 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3297 idx = RX_CDC_DMA_RX_5;
3298 break;
3299 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3300 idx = TX_CDC_DMA_TX_0;
3301 break;
3302 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3303 idx = TX_CDC_DMA_TX_3;
3304 break;
3305 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3306 idx = TX_CDC_DMA_TX_4;
3307 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3308 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3309 idx = VA_CDC_DMA_TX_0;
3310 break;
3311 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3312 idx = VA_CDC_DMA_TX_1;
3313 break;
3314 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3315 idx = VA_CDC_DMA_TX_2;
3316 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3317 default:
3318 idx = RX_CDC_DMA_RX_0;
3319 break;
3320 }
3321
3322 return idx;
3323}
3324
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3325static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3326 struct snd_ctl_elem_value *ucontrol)
3327{
3328 /*
3329 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3330 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3331 * value.
3332 */
3333 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3334 case SAMPLING_RATE_96KHZ:
3335 ucontrol->value.integer.value[0] = 5;
3336 break;
3337 case SAMPLING_RATE_88P2KHZ:
3338 ucontrol->value.integer.value[0] = 4;
3339 break;
3340 case SAMPLING_RATE_48KHZ:
3341 ucontrol->value.integer.value[0] = 3;
3342 break;
3343 case SAMPLING_RATE_44P1KHZ:
3344 ucontrol->value.integer.value[0] = 2;
3345 break;
3346 case SAMPLING_RATE_16KHZ:
3347 ucontrol->value.integer.value[0] = 1;
3348 break;
3349 case SAMPLING_RATE_8KHZ:
3350 default:
3351 ucontrol->value.integer.value[0] = 0;
3352 break;
3353 }
3354 pr_debug("%s: sample rate = %d\n", __func__,
3355 slim_rx_cfg[SLIM_RX_7].sample_rate);
3356
3357 return 0;
3358}
3359
3360static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3361 struct snd_ctl_elem_value *ucontrol)
3362{
3363 switch (ucontrol->value.integer.value[0]) {
3364 case 1:
3365 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3366 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3367 break;
3368 case 2:
3369 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3370 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3371 break;
3372 case 3:
3373 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3374 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3375 break;
3376 case 4:
3377 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3378 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3379 break;
3380 case 5:
3381 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3382 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3383 break;
3384 case 0:
3385 default:
3386 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3387 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3388 break;
3389 }
3390 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3391 __func__,
3392 slim_rx_cfg[SLIM_RX_7].sample_rate,
3393 slim_tx_cfg[SLIM_TX_7].sample_rate,
3394 ucontrol->value.enumerated.item[0]);
3395
3396 return 0;
3397}
3398
3399static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3400 struct snd_ctl_elem_value *ucontrol)
3401{
3402 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3403 case SAMPLING_RATE_96KHZ:
3404 ucontrol->value.integer.value[0] = 5;
3405 break;
3406 case SAMPLING_RATE_88P2KHZ:
3407 ucontrol->value.integer.value[0] = 4;
3408 break;
3409 case SAMPLING_RATE_48KHZ:
3410 ucontrol->value.integer.value[0] = 3;
3411 break;
3412 case SAMPLING_RATE_44P1KHZ:
3413 ucontrol->value.integer.value[0] = 2;
3414 break;
3415 case SAMPLING_RATE_16KHZ:
3416 ucontrol->value.integer.value[0] = 1;
3417 break;
3418 case SAMPLING_RATE_8KHZ:
3419 default:
3420 ucontrol->value.integer.value[0] = 0;
3421 break;
3422 }
3423 pr_debug("%s: sample rate rx = %d\n", __func__,
3424 slim_rx_cfg[SLIM_RX_7].sample_rate);
3425
3426 return 0;
3427}
3428
3429static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3430 struct snd_ctl_elem_value *ucontrol)
3431{
3432 switch (ucontrol->value.integer.value[0]) {
3433 case 1:
3434 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3435 break;
3436 case 2:
3437 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3438 break;
3439 case 3:
3440 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3441 break;
3442 case 4:
3443 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3444 break;
3445 case 5:
3446 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3447 break;
3448 case 0:
3449 default:
3450 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3451 break;
3452 }
3453 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3454 __func__,
3455 slim_rx_cfg[SLIM_RX_7].sample_rate,
3456 ucontrol->value.enumerated.item[0]);
3457
3458 return 0;
3459}
3460
3461static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3462 struct snd_ctl_elem_value *ucontrol)
3463{
3464 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3465 case SAMPLING_RATE_96KHZ:
3466 ucontrol->value.integer.value[0] = 5;
3467 break;
3468 case SAMPLING_RATE_88P2KHZ:
3469 ucontrol->value.integer.value[0] = 4;
3470 break;
3471 case SAMPLING_RATE_48KHZ:
3472 ucontrol->value.integer.value[0] = 3;
3473 break;
3474 case SAMPLING_RATE_44P1KHZ:
3475 ucontrol->value.integer.value[0] = 2;
3476 break;
3477 case SAMPLING_RATE_16KHZ:
3478 ucontrol->value.integer.value[0] = 1;
3479 break;
3480 case SAMPLING_RATE_8KHZ:
3481 default:
3482 ucontrol->value.integer.value[0] = 0;
3483 break;
3484 }
3485 pr_debug("%s: sample rate tx = %d\n", __func__,
3486 slim_tx_cfg[SLIM_TX_7].sample_rate);
3487
3488 return 0;
3489}
3490
3491static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3492 struct snd_ctl_elem_value *ucontrol)
3493{
3494 switch (ucontrol->value.integer.value[0]) {
3495 case 1:
3496 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3497 break;
3498 case 2:
3499 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3500 break;
3501 case 3:
3502 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3503 break;
3504 case 4:
3505 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3506 break;
3507 case 5:
3508 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3509 break;
3510 case 0:
3511 default:
3512 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3513 break;
3514 }
3515 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3516 __func__,
3517 slim_tx_cfg[SLIM_TX_7].sample_rate,
3518 ucontrol->value.enumerated.item[0]);
3519
3520 return 0;
3521}
3522
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3523static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3524 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3525 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3526 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3527 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3528 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3529 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3530 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3531 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3532 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3533 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3534 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3535 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3536 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3537 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3538 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3539 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3540 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3541 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3542 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3543 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3544 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3545 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3546 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3547 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3548 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3549 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3550 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3551 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3552 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3553 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3554 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3555 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3556 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3557 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3558 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3559 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3560 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3561 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3562 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3563 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3564 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3565 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3566 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3567 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3568 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3569 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3570 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3571 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3572 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3573 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3574 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3575 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3576 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3577 wsa_cdc_dma_rx_0_sample_rate,
3578 cdc_dma_rx_sample_rate_get,
3579 cdc_dma_rx_sample_rate_put),
3580 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3581 wsa_cdc_dma_rx_1_sample_rate,
3582 cdc_dma_rx_sample_rate_get,
3583 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3584 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3585 wsa_cdc_dma_tx_0_sample_rate,
3586 cdc_dma_tx_sample_rate_get,
3587 cdc_dma_tx_sample_rate_put),
3588 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3589 wsa_cdc_dma_tx_1_sample_rate,
3590 cdc_dma_tx_sample_rate_get,
3591 cdc_dma_tx_sample_rate_put),
3592 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3593 wsa_cdc_dma_tx_2_sample_rate,
3594 cdc_dma_tx_sample_rate_get,
3595 cdc_dma_tx_sample_rate_put),
3596 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3597 tx_cdc_dma_tx_0_sample_rate,
3598 cdc_dma_tx_sample_rate_get,
3599 cdc_dma_tx_sample_rate_put),
3600 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3601 tx_cdc_dma_tx_3_sample_rate,
3602 cdc_dma_tx_sample_rate_get,
3603 cdc_dma_tx_sample_rate_put),
3604 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3605 tx_cdc_dma_tx_4_sample_rate,
3606 cdc_dma_tx_sample_rate_get,
3607 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3608 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3609 va_cdc_dma_tx_0_sample_rate,
3610 cdc_dma_tx_sample_rate_get,
3611 cdc_dma_tx_sample_rate_put),
3612 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3613 va_cdc_dma_tx_1_sample_rate,
3614 cdc_dma_tx_sample_rate_get,
3615 cdc_dma_tx_sample_rate_put),
3616 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3617 va_cdc_dma_tx_2_sample_rate,
3618 cdc_dma_tx_sample_rate_get,
3619 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3620};
3621
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]3622static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3623 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3624 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3625 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3626 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3627 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3628 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3629 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3630 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3631 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3632 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3633 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3634 rx_cdc80_dma_rx_0_sample_rate,
3635 cdc_dma_rx_sample_rate_get,
3636 cdc_dma_rx_sample_rate_put),
3637 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3638 rx_cdc80_dma_rx_1_sample_rate,
3639 cdc_dma_rx_sample_rate_get,
3640 cdc_dma_rx_sample_rate_put),
3641 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3642 rx_cdc80_dma_rx_2_sample_rate,
3643 cdc_dma_rx_sample_rate_get,
3644 cdc_dma_rx_sample_rate_put),
3645 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3646 rx_cdc80_dma_rx_3_sample_rate,
3647 cdc_dma_rx_sample_rate_get,
3648 cdc_dma_rx_sample_rate_put),
3649 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3650 rx_cdc80_dma_rx_5_sample_rate,
3651 cdc_dma_rx_sample_rate_get,
3652 cdc_dma_rx_sample_rate_put),
3653};
3654
3655static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3656 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3657 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3658 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3659 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3660 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3661 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3662 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3663 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3664 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3665 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3666 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3667 rx_cdc85_dma_rx_0_sample_rate,
3668 cdc_dma_rx_sample_rate_get,
3669 cdc_dma_rx_sample_rate_put),
3670 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3671 rx_cdc85_dma_rx_1_sample_rate,
3672 cdc_dma_rx_sample_rate_get,
3673 cdc_dma_rx_sample_rate_put),
3674 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3675 rx_cdc85_dma_rx_2_sample_rate,
3676 cdc_dma_rx_sample_rate_get,
3677 cdc_dma_rx_sample_rate_put),
3678 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3679 rx_cdc85_dma_rx_3_sample_rate,
3680 cdc_dma_rx_sample_rate_get,
3681 cdc_dma_rx_sample_rate_put),
3682 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3683 rx_cdc85_dma_rx_5_sample_rate,
3684 cdc_dma_rx_sample_rate_get,
3685 cdc_dma_rx_sample_rate_put),
3686};
3687
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3688static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3689 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3690 usb_audio_rx_sample_rate_get,
3691 usb_audio_rx_sample_rate_put),
3692 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3693 usb_audio_tx_sample_rate_get,
3694 usb_audio_tx_sample_rate_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]3695 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3696 usb_audio_rx_format_get, usb_audio_rx_format_put),
3697 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3698 usb_audio_tx_format_get, usb_audio_tx_format_put),
3699 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3700 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3701 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3702 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3703 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3704 proxy_rx_ch_get, proxy_rx_ch_put),
3705 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3706 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3707 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3708 ext_disp_rx_format_get, ext_disp_rx_format_put),
3709 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3710 ext_disp_rx_sample_rate_get,
3711 ext_disp_rx_sample_rate_put),
3712 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3713 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3714 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3715 ext_disp_rx_format_get, ext_disp_rx_format_put),
3716 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3717 ext_disp_rx_sample_rate_get,
3718 ext_disp_rx_sample_rate_put),
3719 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3720 msm_bt_sample_rate_get,
3721 msm_bt_sample_rate_put),
3722 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3723 msm_bt_sample_rate_rx_get,
3724 msm_bt_sample_rate_rx_put),
3725 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3726 msm_bt_sample_rate_tx_get,
3727 msm_bt_sample_rate_tx_put),
3728 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3729 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3730 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3731 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3732};
3733
3734static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3735 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3736 tdm_rx_sample_rate_get,
3737 tdm_rx_sample_rate_put),
3738 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3739 tdm_rx_sample_rate_get,
3740 tdm_rx_sample_rate_put),
3741 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3742 tdm_rx_sample_rate_get,
3743 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3744 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3745 tdm_rx_sample_rate_get,
3746 tdm_rx_sample_rate_put),
3747 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3748 tdm_rx_sample_rate_get,
3749 tdm_rx_sample_rate_put),
3750 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3751 tdm_rx_sample_rate_get,
3752 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3753 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3754 tdm_tx_sample_rate_get,
3755 tdm_tx_sample_rate_put),
3756 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3757 tdm_tx_sample_rate_get,
3758 tdm_tx_sample_rate_put),
3759 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3760 tdm_tx_sample_rate_get,
3761 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3762 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3763 tdm_tx_sample_rate_get,
3764 tdm_tx_sample_rate_put),
3765 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3766 tdm_tx_sample_rate_get,
3767 tdm_tx_sample_rate_put),
3768 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3769 tdm_tx_sample_rate_get,
3770 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3771 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3772 tdm_rx_format_get,
3773 tdm_rx_format_put),
3774 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3775 tdm_rx_format_get,
3776 tdm_rx_format_put),
3777 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3778 tdm_rx_format_get,
3779 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3780 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3781 tdm_rx_format_get,
3782 tdm_rx_format_put),
3783 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3784 tdm_rx_format_get,
3785 tdm_rx_format_put),
3786 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3787 tdm_rx_format_get,
3788 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3789 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3790 tdm_tx_format_get,
3791 tdm_tx_format_put),
3792 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3793 tdm_tx_format_get,
3794 tdm_tx_format_put),
3795 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3796 tdm_tx_format_get,
3797 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3798 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3799 tdm_tx_format_get,
3800 tdm_tx_format_put),
3801 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3802 tdm_tx_format_get,
3803 tdm_tx_format_put),
3804 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3805 tdm_tx_format_get,
3806 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3807 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3808 tdm_rx_ch_get,
3809 tdm_rx_ch_put),
3810 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3811 tdm_rx_ch_get,
3812 tdm_rx_ch_put),
3813 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3814 tdm_rx_ch_get,
3815 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3816 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3817 tdm_rx_ch_get,
3818 tdm_rx_ch_put),
3819 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3820 tdm_rx_ch_get,
3821 tdm_rx_ch_put),
3822 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3823 tdm_rx_ch_get,
3824 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3825 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3826 tdm_tx_ch_get,
3827 tdm_tx_ch_put),
3828 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3829 tdm_tx_ch_get,
3830 tdm_tx_ch_put),
3831 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3832 tdm_tx_ch_get,
3833 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3834 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3835 tdm_tx_ch_get,
3836 tdm_tx_ch_put),
3837 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3838 tdm_tx_ch_get,
3839 tdm_tx_ch_put),
3840 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3841 tdm_tx_ch_get,
3842 tdm_tx_ch_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]3843 SOC_SINGLE_MULTI_EXT("TDM Slot Map", SND_SOC_NOPM, 0, 255, 0,
3844 TDM_MAX_SLOTS + MAX_PATH, NULL, tdm_slot_map_put),
3845};
3846
3847static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
3848 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3849 aux_pcm_rx_sample_rate_get,
3850 aux_pcm_rx_sample_rate_put),
3851 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3852 aux_pcm_rx_sample_rate_get,
3853 aux_pcm_rx_sample_rate_put),
3854 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3855 aux_pcm_rx_sample_rate_get,
3856 aux_pcm_rx_sample_rate_put),
3857 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3858 aux_pcm_rx_sample_rate_get,
3859 aux_pcm_rx_sample_rate_put),
3860 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3861 aux_pcm_rx_sample_rate_get,
3862 aux_pcm_rx_sample_rate_put),
3863 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3864 aux_pcm_rx_sample_rate_get,
3865 aux_pcm_rx_sample_rate_put),
3866 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3867 aux_pcm_tx_sample_rate_get,
3868 aux_pcm_tx_sample_rate_put),
3869 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3870 aux_pcm_tx_sample_rate_get,
3871 aux_pcm_tx_sample_rate_put),
3872 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3873 aux_pcm_tx_sample_rate_get,
3874 aux_pcm_tx_sample_rate_put),
3875 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3876 aux_pcm_tx_sample_rate_get,
3877 aux_pcm_tx_sample_rate_put),
3878 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3879 aux_pcm_tx_sample_rate_get,
3880 aux_pcm_tx_sample_rate_put),
3881 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3882 aux_pcm_tx_sample_rate_get,
3883 aux_pcm_tx_sample_rate_put),
3884 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3885 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3886 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3887 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3888 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3889 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3890 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3891 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3892 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3893 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3894 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3895 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3896 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3897 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3898 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3899 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3900 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3901 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3902 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3903 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3904 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3905 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3906 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3907 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3908};
3909
3910static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
3911 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3912 mi2s_rx_sample_rate_get,
3913 mi2s_rx_sample_rate_put),
3914 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3915 mi2s_rx_sample_rate_get,
3916 mi2s_rx_sample_rate_put),
3917 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3918 mi2s_rx_sample_rate_get,
3919 mi2s_rx_sample_rate_put),
3920 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3921 mi2s_rx_sample_rate_get,
3922 mi2s_rx_sample_rate_put),
3923 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3924 mi2s_rx_sample_rate_get,
3925 mi2s_rx_sample_rate_put),
3926 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3927 mi2s_rx_sample_rate_get,
3928 mi2s_rx_sample_rate_put),
3929 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3930 mi2s_tx_sample_rate_get,
3931 mi2s_tx_sample_rate_put),
3932 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3933 mi2s_tx_sample_rate_get,
3934 mi2s_tx_sample_rate_put),
3935 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3936 mi2s_tx_sample_rate_get,
3937 mi2s_tx_sample_rate_put),
3938 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3939 mi2s_tx_sample_rate_get,
3940 mi2s_tx_sample_rate_put),
3941 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3942 mi2s_tx_sample_rate_get,
3943 mi2s_tx_sample_rate_put),
3944 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
3945 mi2s_tx_sample_rate_get,
3946 mi2s_tx_sample_rate_put),
3947 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3948 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3949 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3950 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3951 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3952 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3953 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3954 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3955 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3956 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3957 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
3958 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3959 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3960 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3961 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3962 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3963 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3964 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3965 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3966 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3967 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3968 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3969 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
3970 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3971 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3972 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3973 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3974 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3975 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3976 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3977 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3978 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3979 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3980 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3981 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
3982 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3983 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3984 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3985 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3986 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3987 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3988 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3989 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3990 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3991 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3992 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3993 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
3994 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3995};
3996
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]3997static const struct snd_kcontrol_new msm_snd_controls[] = {
3998 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3999 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4000 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
4001 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4002 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
4003 aux_pcm_rx_sample_rate_get,
4004 aux_pcm_rx_sample_rate_put),
4005 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
4006 aux_pcm_tx_sample_rate_get,
4007 aux_pcm_tx_sample_rate_put),
4008};
4009
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4010static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4011{
4012 int idx;
4013
4014 switch (be_id) {
4015 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4016 idx = EXT_DISP_RX_IDX_DP;
4017 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4018 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
4019 idx = EXT_DISP_RX_IDX_DP1;
4020 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4021 default:
4022 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4023 idx = -EINVAL;
4024 break;
4025 }
4026
4027 return idx;
4028}
4029
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4030static int kona_send_island_va_config(int32_t be_id)
4031{
4032 int rc = 0;
4033 int port_id = 0xFFFF;
4034
4035 port_id = msm_get_port_id(be_id);
4036 if (port_id < 0) {
4037 pr_err("%s: Invalid island interface, be_id: %d\n",
4038 __func__, be_id);
4039 rc = -EINVAL;
4040 } else {
4041 /*
4042 * send island mode config
4043 * This should be the first configuration
4044 */
4045 rc = afe_send_port_island_mode(port_id);
4046 if (rc)
4047 pr_err("%s: afe send island mode failed %d\n",
4048 __func__, rc);
4049 }
4050
4051 return rc;
4052}
4053
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4054static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4055 struct snd_pcm_hw_params *params)
4056{
4057 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4058 struct snd_interval *rate = hw_param_interval(params,
4059 SNDRV_PCM_HW_PARAM_RATE);
4060 struct snd_interval *channels = hw_param_interval(params,
4061 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4062 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4063
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4064 pr_debug("%s: dai_id= %d, format = %d, rate = %d\n",
4065 __func__, dai_link->id, params_format(params),
4066 params_rate(params));
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4067
4068 switch (dai_link->id) {
4069 case MSM_BACKEND_DAI_USB_RX:
4070 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4071 usb_rx_cfg.bit_format);
4072 rate->min = rate->max = usb_rx_cfg.sample_rate;
4073 channels->min = channels->max = usb_rx_cfg.channels;
4074 break;
4075
4076 case MSM_BACKEND_DAI_USB_TX:
4077 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4078 usb_tx_cfg.bit_format);
4079 rate->min = rate->max = usb_tx_cfg.sample_rate;
4080 channels->min = channels->max = usb_tx_cfg.channels;
4081 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4082
4083 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4084 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4085 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4086 if (idx < 0) {
4087 pr_err("%s: Incorrect ext disp idx %d\n",
4088 __func__, idx);
4089 rc = idx;
4090 goto done;
4091 }
4092
4093 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4094 ext_disp_rx_cfg[idx].bit_format);
4095 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4096 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4097 break;
4098
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4099 case MSM_BACKEND_DAI_AFE_PCM_RX:
4100 channels->min = channels->max = proxy_rx_cfg.channels;
4101 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4102 break;
4103
4104 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4105 channels->min = channels->max =
4106 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4107 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4108 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4109 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4110 break;
4111
4112 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4113 channels->min = channels->max =
4114 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4115 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4116 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4117 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4118 break;
4119
4120 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4121 channels->min = channels->max =
4122 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4123 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4124 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4125 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4126 break;
4127
4128 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4129 channels->min = channels->max =
4130 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4131 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4132 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4133 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4134 break;
4135
4136 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4137 channels->min = channels->max =
4138 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4139 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4140 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4141 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4142 break;
4143
4144 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4145 channels->min = channels->max =
4146 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4147 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4148 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4149 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4150 break;
4151
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4152 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4153 channels->min = channels->max =
4154 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4155 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4156 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4157 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4158 break;
4159
4160 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4161 channels->min = channels->max =
4162 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4163 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4164 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4165 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4166 break;
4167
4168 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4169 channels->min = channels->max =
4170 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4171 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4172 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4173 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4174 break;
4175
4176 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4177 channels->min = channels->max =
4178 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4179 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4180 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4181 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4182 break;
4183
4184 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
4185 channels->min = channels->max =
4186 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4187 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4188 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
4189 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
4190 break;
4191
4192 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
4193 channels->min = channels->max =
4194 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4195 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4196 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
4197 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
4198 break;
4199
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4200 case MSM_BACKEND_DAI_AUXPCM_RX:
4201 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4202 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4203 rate->min = rate->max =
4204 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4205 channels->min = channels->max =
4206 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4207 break;
4208
4209 case MSM_BACKEND_DAI_AUXPCM_TX:
4210 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4211 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4212 rate->min = rate->max =
4213 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4214 channels->min = channels->max =
4215 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4216 break;
4217
4218 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4219 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4220 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4221 rate->min = rate->max =
4222 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4223 channels->min = channels->max =
4224 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4225 break;
4226
4227 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4228 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4229 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4230 rate->min = rate->max =
4231 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4232 channels->min = channels->max =
4233 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4234 break;
4235
4236 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4237 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4238 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4239 rate->min = rate->max =
4240 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4241 channels->min = channels->max =
4242 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4243 break;
4244
4245 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4246 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4247 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4248 rate->min = rate->max =
4249 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4250 channels->min = channels->max =
4251 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4252 break;
4253
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4254 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4255 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4256 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4257 rate->min = rate->max =
4258 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4259 channels->min = channels->max =
4260 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4261 break;
4262
4263 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4264 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4265 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4266 rate->min = rate->max =
4267 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4268 channels->min = channels->max =
4269 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4270 break;
4271
4272 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4273 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4274 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4275 rate->min = rate->max =
4276 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4277 channels->min = channels->max =
4278 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4279 break;
4280
4281 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4282 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4283 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4284 rate->min = rate->max =
4285 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4286 channels->min = channels->max =
4287 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4288 break;
4289
4290 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4291 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4292 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4293 rate->min = rate->max =
4294 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4295 channels->min = channels->max =
4296 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4297 break;
4298
4299 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4300 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4301 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4302 rate->min = rate->max =
4303 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4304 channels->min = channels->max =
4305 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4306 break;
4307
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4308 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4309 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4310 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4311 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4312 channels->min = channels->max =
4313 mi2s_rx_cfg[PRIM_MI2S].channels;
4314 break;
4315
4316 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4317 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4318 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4319 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4320 channels->min = channels->max =
4321 mi2s_tx_cfg[PRIM_MI2S].channels;
4322 break;
4323
4324 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4325 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4326 mi2s_rx_cfg[SEC_MI2S].bit_format);
4327 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4328 channels->min = channels->max =
4329 mi2s_rx_cfg[SEC_MI2S].channels;
4330 break;
4331
4332 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4333 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4334 mi2s_tx_cfg[SEC_MI2S].bit_format);
4335 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4336 channels->min = channels->max =
4337 mi2s_tx_cfg[SEC_MI2S].channels;
4338 break;
4339
4340 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4341 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4342 mi2s_rx_cfg[TERT_MI2S].bit_format);
4343 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4344 channels->min = channels->max =
4345 mi2s_rx_cfg[TERT_MI2S].channels;
4346 break;
4347
4348 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4349 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4350 mi2s_tx_cfg[TERT_MI2S].bit_format);
4351 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4352 channels->min = channels->max =
4353 mi2s_tx_cfg[TERT_MI2S].channels;
4354 break;
4355
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4356 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4357 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4358 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4359 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4360 channels->min = channels->max =
4361 mi2s_rx_cfg[QUAT_MI2S].channels;
4362 break;
4363
4364 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4365 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4366 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4367 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4368 channels->min = channels->max =
4369 mi2s_tx_cfg[QUAT_MI2S].channels;
4370 break;
4371
4372 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4373 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4374 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4375 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4376 channels->min = channels->max =
4377 mi2s_rx_cfg[QUIN_MI2S].channels;
4378 break;
4379
4380 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4381 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4382 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4383 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4384 channels->min = channels->max =
4385 mi2s_tx_cfg[QUIN_MI2S].channels;
4386 break;
4387
4388 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4389 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4390 mi2s_rx_cfg[SEN_MI2S].bit_format);
4391 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4392 channels->min = channels->max =
4393 mi2s_rx_cfg[SEN_MI2S].channels;
4394 break;
4395
4396 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4397 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4398 mi2s_tx_cfg[SEN_MI2S].bit_format);
4399 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4400 channels->min = channels->max =
4401 mi2s_tx_cfg[SEN_MI2S].channels;
4402 break;
4403
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4404 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4405 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4406 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4407 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4408 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4409 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4410 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4411 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4412 cdc_dma_rx_cfg[idx].bit_format);
4413 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4414 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4415 break;
4416
4417 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4418 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4419 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4420 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4421 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4422 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4423 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4424 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4425 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4426 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4427 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4428 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4429 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4430 break;
4431
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4432 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +0530[diff] [blame]4433 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4434 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4435 SNDRV_PCM_FORMAT_S32_LE);
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +0530[diff] [blame]4436 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4437 channels->min = channels->max = msm_vi_feed_tx_ch;
4438 break;
4439
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4440 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4441 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4442 slim_rx_cfg[SLIM_RX_7].bit_format);
4443 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4444 channels->min = channels->max =
4445 slim_rx_cfg[SLIM_RX_7].channels;
4446 break;
4447
4448 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlad7df1232019-11-29 19:39:17 +0530[diff] [blame]4449 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4450 slim_tx_cfg[SLIM_TX_7].bit_format);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4451 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4452 channels->min = channels->max =
4453 slim_tx_cfg[SLIM_TX_7].channels;
4454 break;
4455
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4456 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4457 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4458 channels->min = channels->max =
4459 slim_tx_cfg[SLIM_TX_8].channels;
4460 break;
4461
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4462 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4463 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4464 afe_loopback_tx_cfg[idx].bit_format);
4465 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4466 channels->min = channels->max =
4467 afe_loopback_tx_cfg[idx].channels;
4468 break;
4469
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4470 default:
4471 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4472 break;
4473 }
4474
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4475done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4476 return rc;
4477}
4478
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]4479static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4480{
4481 struct snd_soc_card *card = component->card;
4482 struct msm_asoc_mach_data *pdata =
4483 snd_soc_card_get_drvdata(card);
4484
4485 if (!pdata->fsa_handle)
4486 return false;
4487
4488 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4489}
4490
4491static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4492{
4493 int value = 0;
4494 bool ret = false;
4495 struct snd_soc_card *card;
4496 struct msm_asoc_mach_data *pdata;
4497
4498 if (!component) {
4499 pr_err("%s component is NULL\n", __func__);
4500 return false;
4501 }
4502 card = component->card;
4503 pdata = snd_soc_card_get_drvdata(card);
4504
4505 if (!pdata)
4506 return false;
4507
4508 if (wcd_mbhc_cfg.enable_usbc_analog)
4509 return msm_usbc_swap_gnd_mic(component, active);
4510
4511 /* if usbc is not defined, swap using us_euro_gpio_p */
4512 if (pdata->us_euro_gpio_p) {
4513 value = msm_cdc_pinctrl_get_state(
4514 pdata->us_euro_gpio_p);
4515 if (value)
4516 msm_cdc_pinctrl_select_sleep_state(
4517 pdata->us_euro_gpio_p);
4518 else
4519 msm_cdc_pinctrl_select_active_state(
4520 pdata->us_euro_gpio_p);
4521 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4522 __func__, value, !value);
4523 ret = true;
4524 }
4525
4526 return ret;
4527}
4528
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4529static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4530 struct snd_pcm_hw_params *params)
4531{
4532 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4533 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4534 int ret = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4535 int slot_width = TDM_SLOT_WIDTH_BITS;
4536 int channels, slots = TDM_MAX_SLOTS;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4537 unsigned int slot_mask, rate, clk_freq;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4538 unsigned int *slot_offset;
4539 struct tdm_dev_config *config;
4540 unsigned int path_dir = 0, interface = 0, channel_interface = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4541
4542 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4543
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4544 if (cpu_dai->id < AFE_PORT_ID_TDM_PORT_RANGE_START) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4545 pr_err("%s: dai id 0x%x not supported\n",
4546 __func__, cpu_dai->id);
4547 return -EINVAL;
4548 }
4549
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4550 /* RX or TX */
4551 path_dir = cpu_dai->id % MAX_PATH;
4552
4553 /* PRI, SEC, TERT, QUAT, QUIN, ... */
4554 interface = (cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START)
4555 / (MAX_PATH * TDM_PORT_MAX);
4556
4557 /* 0, 1, 2, .. 7 */
4558 channel_interface =
4559 ((cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START) / MAX_PATH)
4560 % TDM_PORT_MAX;
4561
4562 pr_debug("%s: path dir: %u, interface %u, channel interface %u\n",
4563 __func__, path_dir, interface, channel_interface);
4564
4565 config = ((struct tdm_dev_config *) tdm_cfg[interface]) +
4566 (path_dir * TDM_PORT_MAX) + channel_interface;
4567 slot_offset = config->tdm_slot_offset;
4568
4569 if (path_dir)
4570 channels = tdm_tx_cfg[interface][channel_interface].channels;
4571 else
4572 channels = tdm_rx_cfg[interface][channel_interface].channels;
4573
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4574 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4575 /*2 slot config - bits 0 and 1 set for the first two slots */
4576 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4577
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4578 pr_debug("%s: tdm rx slot_width %d slots %d slot_mask %x\n",
4579 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4580
4581 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4582 slots, slot_width);
4583 if (ret < 0) {
4584 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4585 __func__, ret);
4586 goto end;
4587 }
4588
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4589 pr_debug("%s: tdm rx channels: %d\n", __func__, channels);
4590
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4591 ret = snd_soc_dai_set_channel_map(cpu_dai,
4592 0, NULL, channels, slot_offset);
4593 if (ret < 0) {
4594 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4595 __func__, ret);
4596 goto end;
4597 }
4598 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4599 /*2 slot config - bits 0 and 1 set for the first two slots */
4600 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4601
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4602 pr_debug("%s: tdm tx slot_width %d slots %d slot_mask %x\n",
4603 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4604
4605 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4606 slots, slot_width);
4607 if (ret < 0) {
4608 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4609 __func__, ret);
4610 goto end;
4611 }
4612
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4613 pr_debug("%s: tdm tx channels: %d\n", __func__, channels);
4614
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4615 ret = snd_soc_dai_set_channel_map(cpu_dai,
4616 channels, slot_offset, 0, NULL);
4617 if (ret < 0) {
4618 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4619 __func__, ret);
4620 goto end;
4621 }
4622 } else {
4623 ret = -EINVAL;
4624 pr_err("%s: invalid use case, err:%d\n",
4625 __func__, ret);
4626 goto end;
4627 }
4628
4629 rate = params_rate(params);
4630 clk_freq = rate * slot_width * slots;
4631 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4632 if (ret < 0)
4633 pr_err("%s: failed to set tdm clk, err:%d\n",
4634 __func__, ret);
4635
4636end:
4637 return ret;
4638}
4639
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4640static int msm_get_tdm_mode(u32 port_id)
4641{
4642 int tdm_mode;
4643
4644 switch (port_id) {
4645 case AFE_PORT_ID_PRIMARY_TDM_RX:
4646 case AFE_PORT_ID_PRIMARY_TDM_TX:
4647 tdm_mode = TDM_PRI;
4648 break;
4649 case AFE_PORT_ID_SECONDARY_TDM_RX:
4650 case AFE_PORT_ID_SECONDARY_TDM_TX:
4651 tdm_mode = TDM_SEC;
4652 break;
4653 case AFE_PORT_ID_TERTIARY_TDM_RX:
4654 case AFE_PORT_ID_TERTIARY_TDM_TX:
4655 tdm_mode = TDM_TERT;
4656 break;
4657 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4658 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4659 tdm_mode = TDM_QUAT;
4660 break;
4661 case AFE_PORT_ID_QUINARY_TDM_RX:
4662 case AFE_PORT_ID_QUINARY_TDM_TX:
4663 tdm_mode = TDM_QUIN;
4664 break;
4665 case AFE_PORT_ID_SENARY_TDM_RX:
4666 case AFE_PORT_ID_SENARY_TDM_TX:
4667 tdm_mode = TDM_SEN;
4668 break;
4669 default:
4670 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4671 tdm_mode = -EINVAL;
4672 }
4673 return tdm_mode;
4674}
4675
4676static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4677{
4678 int ret = 0;
4679 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4680 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4681 struct snd_soc_card *card = rtd->card;
4682 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4683 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4684
4685 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4686 ret = -EINVAL;
4687 pr_err("%s: Invalid TDM interface %d\n",
4688 __func__, ret);
4689 return ret;
4690 }
4691
4692 if (pdata->mi2s_gpio_p[tdm_mode]) {
4693 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4694 == 0) {
4695 ret = msm_cdc_pinctrl_select_active_state(
4696 pdata->mi2s_gpio_p[tdm_mode]);
4697 if (ret) {
4698 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4699 __func__, ret);
4700 goto done;
4701 }
4702 }
4703 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4704 }
4705
4706done:
4707 return ret;
4708}
4709
4710static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4711{
4712 int ret = 0;
4713 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4714 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4715 struct snd_soc_card *card = rtd->card;
4716 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4717 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4718
4719 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4720 ret = -EINVAL;
4721 pr_err("%s: Invalid TDM interface %d\n",
4722 __func__, ret);
4723 return;
4724 }
4725
4726 if (pdata->mi2s_gpio_p[tdm_mode]) {
4727 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4728 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4729 == 0) {
4730 ret = msm_cdc_pinctrl_select_sleep_state(
4731 pdata->mi2s_gpio_p[tdm_mode]);
4732 if (ret)
4733 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4734 __func__, ret);
4735 }
4736 }
4737}
4738
4739static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4740{
4741 int ret = 0;
4742 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4743 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4744 struct snd_soc_card *card = rtd->card;
4745 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4746 u32 aux_mode = cpu_dai->id - 1;
4747
4748 if (aux_mode >= AUX_PCM_MAX) {
4749 ret = -EINVAL;
4750 pr_err("%s: Invalid AUX interface %d\n",
4751 __func__, ret);
4752 return ret;
4753 }
4754
4755 if (pdata->mi2s_gpio_p[aux_mode]) {
4756 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4757 == 0) {
4758 ret = msm_cdc_pinctrl_select_active_state(
4759 pdata->mi2s_gpio_p[aux_mode]);
4760 if (ret) {
4761 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4762 __func__, ret);
4763 goto done;
4764 }
4765 }
4766 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4767 }
4768
4769done:
4770 return ret;
4771}
4772
4773static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4774{
4775 int ret = 0;
4776 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4777 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4778 struct snd_soc_card *card = rtd->card;
4779 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4780 u32 aux_mode = cpu_dai->id - 1;
4781
4782 if (aux_mode >= AUX_PCM_MAX) {
4783 pr_err("%s: Invalid AUX interface %d\n",
4784 __func__, ret);
4785 return;
4786 }
4787
4788 if (pdata->mi2s_gpio_p[aux_mode]) {
4789 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4790 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4791 == 0) {
4792 ret = msm_cdc_pinctrl_select_sleep_state(
4793 pdata->mi2s_gpio_p[aux_mode]);
4794 if (ret)
4795 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4796 __func__, ret);
4797 }
4798 }
4799}
4800
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4801static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4802{
4803 int ret = 0;
4804 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4805 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4806
4807 switch (dai_link->id) {
4808 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4809 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4810 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4811 ret = kona_send_island_va_config(dai_link->id);
4812 if (ret)
4813 pr_err("%s: send island va cfg failed, err: %d\n",
4814 __func__, ret);
4815 break;
4816 }
4817
4818 return ret;
4819}
4820
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4821static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4822 struct snd_pcm_hw_params *params)
4823{
4824 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4825 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4826 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4827 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4828
4829 int ret = 0;
4830 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4831 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4832 u32 user_set_tx_ch = 0;
4833 u32 user_set_rx_ch = 0;
4834 u32 ch_id;
4835
4836 ret = snd_soc_dai_get_channel_map(codec_dai,
4837 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4838 &rx_ch_cdc_dma);
4839 if (ret < 0) {
4840 pr_err("%s: failed to get codec chan map, err:%d\n",
4841 __func__, ret);
4842 goto err;
4843 }
4844
4845 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4846 switch (dai_link->id) {
4847 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4848 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4849 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4850 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4851 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4852 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4853 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4854 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4855 {
4856 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4857 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4858 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4859 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4860 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4861 user_set_rx_ch, &rx_ch_cdc_dma);
4862 if (ret < 0) {
4863 pr_err("%s: failed to set cpu chan map, err:%d\n",
4864 __func__, ret);
4865 goto err;
4866 }
4867
4868 }
4869 break;
4870 }
4871 } else {
4872 switch (dai_link->id) {
4873 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4874 {
4875 user_set_tx_ch = msm_vi_feed_tx_ch;
4876 }
4877 break;
4878 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4879 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4880 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4881 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4882 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4883 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4884 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4885 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4886 {
4887 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4888 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4889 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4890 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4891 }
4892 break;
4893 }
4894
4895 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4896 &tx_ch_cdc_dma, 0, 0);
4897 if (ret < 0) {
4898 pr_err("%s: failed to set cpu chan map, err:%d\n",
4899 __func__, ret);
4900 goto err;
4901 }
4902 }
4903
4904err:
4905 return ret;
4906}
4907
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4908static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4909{
4910 cpumask_t mask;
4911
4912 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4913 pm_qos_remove_request(&substream->latency_pm_qos_req);
4914
4915 cpumask_clear(&mask);
4916 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4917 cpumask_set_cpu(2, &mask); /* affine to core 2 */
4918 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
4919
4920 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
4921
4922 pm_qos_add_request(&substream->latency_pm_qos_req,
4923 PM_QOS_CPU_DMA_LATENCY,
4924 MSM_LL_QOS_VALUE);
4925 return 0;
4926}
4927
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4928void mi2s_disable_audio_vote(struct snd_pcm_substream *substream)
4929{
4930 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4931 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4932 int index = cpu_dai->id;
4933 struct snd_soc_card *card = rtd->card;
4934 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4935 int sample_rate = 0;
4936
4937 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4938 sample_rate = mi2s_rx_cfg[index].sample_rate;
4939 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4940 sample_rate = mi2s_tx_cfg[index].sample_rate;
4941 } else {
4942 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
4943 return;
4944 }
4945
4946 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
4947 if (pdata->lpass_audio_hw_vote != NULL) {
4948 if (--pdata->core_audio_vote_count == 0) {
4949 clk_disable_unprepare(
4950 pdata->lpass_audio_hw_vote);
4951 } else if (pdata->core_audio_vote_count < 0) {
4952 pr_err("%s: audio vote mismatch\n", __func__);
4953 pdata->core_audio_vote_count = 0;
4954 }
4955 } else {
4956 pr_err("%s: Invalid lpass audio hw node\n", __func__);
4957 }
4958 }
4959}
4960
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4961static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
4962{
4963 int ret = 0;
4964 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4965 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4966 int index = cpu_dai->id;
4967 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4968 struct snd_soc_card *card = rtd->card;
4969 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4970 int sample_rate = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4971
4972 dev_dbg(rtd->card->dev,
4973 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
4974 __func__, substream->name, substream->stream,
4975 cpu_dai->name, cpu_dai->id);
4976
4977 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4978 ret = -EINVAL;
4979 dev_err(rtd->card->dev,
4980 "%s: CPU DAI id (%d) out of range\n",
4981 __func__, cpu_dai->id);
4982 goto err;
4983 }
4984 /*
4985 * Mutex protection in case the same MI2S
4986 * interface using for both TX and RX so
4987 * that the same clock won't be enable twice.
4988 */
4989 mutex_lock(&mi2s_intf_conf[index].lock);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4990 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4991 sample_rate = mi2s_rx_cfg[index].sample_rate;
4992 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4993 sample_rate = mi2s_tx_cfg[index].sample_rate;
4994 } else {
4995 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
4996 ret = -EINVAL;
4997 goto vote_err;
4998 }
4999
5000 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5001 if (pdata->lpass_audio_hw_vote == NULL) {
5002 dev_err(rtd->card->dev, "%s: Invalid lpass audio hw node\n",
5003 __func__);
5004 ret = -EINVAL;
5005 goto vote_err;
5006 }
5007 if (pdata->core_audio_vote_count == 0) {
5008 ret = clk_prepare_enable(pdata->lpass_audio_hw_vote);
5009 if (ret < 0) {
5010 dev_err(rtd->card->dev, "%s: audio vote error\n",
5011 __func__);
5012 goto vote_err;
5013 }
5014 }
5015 pdata->core_audio_vote_count++;
5016 }
5017
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5018 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5019 /* Check if msm needs to provide the clock to the interface */
5020 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5021 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5022 fmt = SND_SOC_DAIFMT_CBM_CFM;
5023 }
5024 ret = msm_mi2s_set_sclk(substream, true);
5025 if (ret < 0) {
5026 dev_err(rtd->card->dev,
5027 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5028 __func__, ret);
5029 goto clean_up;
5030 }
5031
5032 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5033 if (ret < 0) {
5034 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5035 __func__, index, ret);
5036 goto clk_off;
5037 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5038 if (pdata->mi2s_gpio_p[index]) {
5039 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5040 == 0) {
5041 ret = msm_cdc_pinctrl_select_active_state(
5042 pdata->mi2s_gpio_p[index]);
5043 if (ret) {
5044 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
5045 __func__, ret);
5046 goto clk_off;
5047 }
5048 }
5049 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
5050 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5051 }
5052clk_off:
5053 if (ret < 0)
5054 msm_mi2s_set_sclk(substream, false);
5055clean_up:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5056 if (ret < 0) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5057 mi2s_intf_conf[index].ref_cnt--;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5058 mi2s_disable_audio_vote(substream);
5059 }
5060vote_err:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5061 mutex_unlock(&mi2s_intf_conf[index].lock);
5062err:
5063 return ret;
5064}
5065
5066static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5067{
5068 int ret = 0;
5069 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5070 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5071 struct snd_soc_card *card = rtd->card;
5072 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5073
5074 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5075 substream->name, substream->stream);
5076 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5077 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5078 return;
5079 }
5080
5081 mutex_lock(&mi2s_intf_conf[index].lock);
5082 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5083 if (pdata->mi2s_gpio_p[index]) {
5084 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
5085 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5086 == 0) {
5087 ret = msm_cdc_pinctrl_select_sleep_state(
5088 pdata->mi2s_gpio_p[index]);
5089 if (ret)
5090 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
5091 __func__, ret);
5092 }
5093 }
5094
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5095 ret = msm_mi2s_set_sclk(substream, false);
5096 if (ret < 0)
5097 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5098 __func__, index, ret);
5099 }
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5100 mi2s_disable_audio_vote(substream);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5101 mutex_unlock(&mi2s_intf_conf[index].lock);
5102}
5103
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5104static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
5105 struct snd_pcm_hw_params *params)
5106{
5107 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5108 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5109 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5110 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5111 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
5112 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5113 int ret = 0;
5114
5115 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5116 codec_dai->name, codec_dai->id);
5117 ret = snd_soc_dai_get_channel_map(codec_dai,
5118 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5119 if (ret) {
5120 dev_err(rtd->dev,
5121 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5122 __func__, ret);
5123 goto err;
5124 }
5125
5126 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5127 __func__, tx_ch_cnt, dai_link->id);
5128
5129 ret = snd_soc_dai_set_channel_map(cpu_dai,
5130 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5131 if (ret)
5132 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5133 __func__, ret);
5134
5135err:
5136 return ret;
5137}
5138
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5139static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5140 struct snd_pcm_hw_params *params)
5141{
5142 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5143 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5144 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5145 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5146 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5147 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5148 int ret = 0;
5149
5150 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5151 codec_dai->name, codec_dai->id);
5152 ret = snd_soc_dai_get_channel_map(codec_dai,
5153 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5154 if (ret) {
5155 dev_err(rtd->dev,
5156 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5157 __func__, ret);
5158 goto err;
5159 }
5160
5161 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5162 __func__, tx_ch_cnt, dai_link->id);
5163
5164 ret = snd_soc_dai_set_channel_map(cpu_dai,
5165 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5166 if (ret)
5167 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5168 __func__, ret);
5169
5170err:
5171 return ret;
5172}
5173
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5174static struct snd_soc_ops kona_aux_be_ops = {
5175 .startup = kona_aux_snd_startup,
5176 .shutdown = kona_aux_snd_shutdown
5177};
5178
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5179static struct snd_soc_ops kona_tdm_be_ops = {
5180 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5181 .startup = kona_tdm_snd_startup,
5182 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5183};
5184
5185static struct snd_soc_ops msm_mi2s_be_ops = {
5186 .startup = msm_mi2s_snd_startup,
5187 .shutdown = msm_mi2s_snd_shutdown,
5188};
5189
5190static struct snd_soc_ops msm_fe_qos_ops = {
5191 .prepare = msm_fe_qos_prepare,
5192};
5193
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5194static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]5195 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5196 .hw_params = msm_snd_cdc_dma_hw_params,
5197};
5198
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5199static struct snd_soc_ops msm_wcn_ops = {
5200 .hw_params = msm_wcn_hw_params,
5201};
5202
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5203static struct snd_soc_ops msm_wcn_ops_lito = {
5204 .hw_params = msm_wcn_hw_params_lito,
5205};
5206
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5207static int msm_dmic_event(struct snd_soc_dapm_widget *w,
5208 struct snd_kcontrol *kcontrol, int event)
5209{
5210 struct msm_asoc_mach_data *pdata = NULL;
5211 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5212 int ret = 0;
5213 u32 dmic_idx;
5214 int *dmic_gpio_cnt;
5215 struct device_node *dmic_gpio;
5216 char *wname;
5217
5218 wname = strpbrk(w->name, "012345");
5219 if (!wname) {
5220 dev_err(component->dev, "%s: widget not found\n", __func__);
5221 return -EINVAL;
5222 }
5223
5224 ret = kstrtouint(wname, 10, &dmic_idx);
5225 if (ret < 0) {
5226 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
5227 __func__);
5228 return -EINVAL;
5229 }
5230
5231 pdata = snd_soc_card_get_drvdata(component->card);
5232
5233 switch (dmic_idx) {
5234 case 0:
5235 case 1:
5236 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
5237 dmic_gpio = pdata->dmic01_gpio_p;
5238 break;
5239 case 2:
5240 case 3:
5241 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
5242 dmic_gpio = pdata->dmic23_gpio_p;
5243 break;
5244 case 4:
5245 case 5:
5246 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
5247 dmic_gpio = pdata->dmic45_gpio_p;
5248 break;
5249 default:
5250 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
5251 __func__);
5252 return -EINVAL;
5253 }
5254
5255 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
5256 __func__, event, dmic_idx, *dmic_gpio_cnt);
5257
5258 switch (event) {
5259 case SND_SOC_DAPM_PRE_PMU:
5260 (*dmic_gpio_cnt)++;
5261 if (*dmic_gpio_cnt == 1) {
5262 ret = msm_cdc_pinctrl_select_active_state(
5263 dmic_gpio);
5264 if (ret < 0) {
5265 pr_err("%s: gpio set cannot be activated %sd",
5266 __func__, "dmic_gpio");
5267 return ret;
5268 }
5269 }
5270
5271 break;
5272 case SND_SOC_DAPM_POST_PMD:
5273 (*dmic_gpio_cnt)--;
5274 if (*dmic_gpio_cnt == 0) {
5275 ret = msm_cdc_pinctrl_select_sleep_state(
5276 dmic_gpio);
5277 if (ret < 0) {
5278 pr_err("%s: gpio set cannot be de-activated %sd",
5279 __func__, "dmic_gpio");
5280 return ret;
5281 }
5282 }
5283 break;
5284 default:
5285 pr_err("%s: invalid DAPM event %d\n", __func__, event);
5286 return -EINVAL;
5287 }
5288 return 0;
5289}
5290
5291static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
5292 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
5293 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
5294 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
5295 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5296 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5297 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
5298 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
5299 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
5300 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
5301 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
5302 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5303 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
5304 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5305};
5306
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5307static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5308{
5309 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5310 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5311 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5312
5313 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5314 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5315}
5316
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5317static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5318{
5319 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5320 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5321 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5322
5323 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5324 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5325}
5326
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]5327#ifndef CONFIG_TDM_DISABLE
5328static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5329{
5330 snd_soc_add_component_controls(component, msm_tdm_snd_controls,
5331 ARRAY_SIZE(msm_tdm_snd_controls));
5332}
5333#else
5334static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5335{
5336 return;
5337}
5338#endif
5339
5340#ifndef CONFIG_MI2S_DISABLE
5341static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5342{
5343 snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
5344 ARRAY_SIZE(msm_mi2s_snd_controls));
5345}
5346#else
5347static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5348{
5349 return;
5350}
5351#endif
5352
5353#ifndef CONFIG_AUXPCM_DISABLE
5354static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5355{
5356 snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
5357 ARRAY_SIZE(msm_auxpcm_snd_controls));
5358}
5359#else
5360static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5361{
5362 return;
5363}
5364#endif
5365
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5366static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5367{
5368 int ret = -EINVAL;
5369 struct snd_soc_component *component;
5370 struct snd_soc_dapm_context *dapm;
5371 struct snd_card *card;
5372 struct snd_info_entry *entry;
5373 struct snd_soc_component *aux_comp;
5374 struct msm_asoc_mach_data *pdata =
5375 snd_soc_card_get_drvdata(rtd->card);
5376
5377 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5378 if (!component) {
5379 pr_err("%s: could not find component for bolero_codec\n",
5380 __func__);
5381 return ret;
5382 }
5383
5384 dapm = snd_soc_component_get_dapm(component);
5385
5386 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5387 ARRAY_SIZE(msm_int_snd_controls));
5388 if (ret < 0) {
5389 pr_err("%s: add_component_controls failed: %d\n",
5390 __func__, ret);
5391 return ret;
5392 }
5393 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5394 ARRAY_SIZE(msm_common_snd_controls));
5395 if (ret < 0) {
5396 pr_err("%s: add common snd controls failed: %d\n",
5397 __func__, ret);
5398 return ret;
5399 }
5400
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]5401 msm_add_tdm_snd_controls(component);
5402 msm_add_mi2s_snd_controls(component);
5403 msm_add_auxpcm_snd_controls(component);
5404
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5405 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5406 ARRAY_SIZE(msm_int_dapm_widgets));
5407
5408 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5409 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5410 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5411 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +0530[diff] [blame]5412 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5413 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5414 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5415 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5416
5417 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5418 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5419 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5420 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5421 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5422
5423 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5424 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5425 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5426 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5427
5428 snd_soc_dapm_sync(dapm);
5429
5430 /*
5431 * Send speaker configuration only for WSA8810.
5432 * Default configuration is for WSA8815.
5433 */
5434 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5435 __func__, rtd->card->num_aux_devs);
5436 if (rtd->card->num_aux_devs &&
5437 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5438 list_for_each_entry(aux_comp,
5439 &rtd->card->aux_comp_list,
5440 card_aux_list) {
5441 if (aux_comp->name != NULL && (
5442 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5443 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5444 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5445 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5446 wsa_macro_set_spkr_gain_offset(component,
5447 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5448 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5449 }
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]5450 if (pdata->lito_v2_enabled) {
5451 /*
5452 * Enable tx data line3 for saipan version v2 amd
5453 * write corresponding lpi register.
5454 */
5455 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map_v2),
5456 sm_port_map_v2);
5457 } else {
5458 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5459 sm_port_map);
5460 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5461 }
5462 card = rtd->card->snd_card;
5463 if (!pdata->codec_root) {
5464 entry = snd_info_create_subdir(card->module, "codecs",
5465 card->proc_root);
5466 if (!entry) {
5467 pr_debug("%s: Cannot create codecs module entry\n",
5468 __func__);
5469 ret = 0;
5470 goto err;
5471 }
5472 pdata->codec_root = entry;
5473 }
5474 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -0800[diff] [blame]5475 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5476 codec_reg_done = true;
5477 return 0;
5478err:
5479 return ret;
5480}
5481
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]5482static void *def_wcd_mbhc_cal(void)
5483{
5484 void *wcd_mbhc_cal;
5485 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5486 u16 *btn_high;
5487
5488 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5489 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5490 if (!wcd_mbhc_cal)
5491 return NULL;
5492
5493 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5494 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5495 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5496 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5497 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5498
5499 btn_high[0] = 75;
5500 btn_high[1] = 150;
5501 btn_high[2] = 237;
5502 btn_high[3] = 500;
5503 btn_high[4] = 500;
5504 btn_high[5] = 500;
5505 btn_high[6] = 500;
5506 btn_high[7] = 500;
5507
5508 return wcd_mbhc_cal;
5509}
5510
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5511/* Digital audio interface glue - connects codec <---> CPU */
5512static struct snd_soc_dai_link msm_common_dai_links[] = {
5513 /* FrontEnd DAI Links */
5514 {/* hw:x,0 */
5515 .name = MSM_DAILINK_NAME(Media1),
5516 .stream_name = "MultiMedia1",
5517 .cpu_dai_name = "MultiMedia1",
5518 .platform_name = "msm-pcm-dsp.0",
5519 .dynamic = 1,
5520 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5521 .dpcm_playback = 1,
5522 .dpcm_capture = 1,
5523 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5524 SND_SOC_DPCM_TRIGGER_POST},
5525 .codec_dai_name = "snd-soc-dummy-dai",
5526 .codec_name = "snd-soc-dummy",
5527 .ignore_suspend = 1,
5528 /* this dainlink has playback support */
5529 .ignore_pmdown_time = 1,
5530 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5531 },
5532 {/* hw:x,1 */
5533 .name = MSM_DAILINK_NAME(Media2),
5534 .stream_name = "MultiMedia2",
5535 .cpu_dai_name = "MultiMedia2",
5536 .platform_name = "msm-pcm-dsp.0",
5537 .dynamic = 1,
5538 .dpcm_playback = 1,
5539 .dpcm_capture = 1,
5540 .codec_dai_name = "snd-soc-dummy-dai",
5541 .codec_name = "snd-soc-dummy",
5542 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5543 SND_SOC_DPCM_TRIGGER_POST},
5544 .ignore_suspend = 1,
5545 /* this dainlink has playback support */
5546 .ignore_pmdown_time = 1,
5547 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5548 },
5549 {/* hw:x,2 */
5550 .name = "VoiceMMode1",
5551 .stream_name = "VoiceMMode1",
5552 .cpu_dai_name = "VoiceMMode1",
5553 .platform_name = "msm-pcm-voice",
5554 .dynamic = 1,
5555 .dpcm_playback = 1,
5556 .dpcm_capture = 1,
5557 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5558 SND_SOC_DPCM_TRIGGER_POST},
5559 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5560 .ignore_suspend = 1,
5561 .ignore_pmdown_time = 1,
5562 .codec_dai_name = "snd-soc-dummy-dai",
5563 .codec_name = "snd-soc-dummy",
5564 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5565 },
5566 {/* hw:x,3 */
5567 .name = "MSM VoIP",
5568 .stream_name = "VoIP",
5569 .cpu_dai_name = "VoIP",
5570 .platform_name = "msm-voip-dsp",
5571 .dynamic = 1,
5572 .dpcm_playback = 1,
5573 .dpcm_capture = 1,
5574 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5575 SND_SOC_DPCM_TRIGGER_POST},
5576 .codec_dai_name = "snd-soc-dummy-dai",
5577 .codec_name = "snd-soc-dummy",
5578 .ignore_suspend = 1,
5579 /* this dainlink has playback support */
5580 .ignore_pmdown_time = 1,
5581 .id = MSM_FRONTEND_DAI_VOIP,
5582 },
5583 {/* hw:x,4 */
5584 .name = MSM_DAILINK_NAME(ULL),
5585 .stream_name = "MultiMedia3",
5586 .cpu_dai_name = "MultiMedia3",
5587 .platform_name = "msm-pcm-dsp.2",
5588 .dynamic = 1,
5589 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5590 .dpcm_playback = 1,
5591 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5592 SND_SOC_DPCM_TRIGGER_POST},
5593 .codec_dai_name = "snd-soc-dummy-dai",
5594 .codec_name = "snd-soc-dummy",
5595 .ignore_suspend = 1,
5596 /* this dainlink has playback support */
5597 .ignore_pmdown_time = 1,
5598 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5599 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5600 {/* hw:x,5 */
5601 .name = "MSM AFE-PCM RX",
5602 .stream_name = "AFE-PROXY RX",
5603 .cpu_dai_name = "msm-dai-q6-dev.241",
5604 .codec_name = "msm-stub-codec.1",
5605 .codec_dai_name = "msm-stub-rx",
5606 .platform_name = "msm-pcm-afe",
5607 .dpcm_playback = 1,
5608 .ignore_suspend = 1,
5609 /* this dainlink has playback support */
5610 .ignore_pmdown_time = 1,
5611 },
5612 {/* hw:x,6 */
5613 .name = "MSM AFE-PCM TX",
5614 .stream_name = "AFE-PROXY TX",
5615 .cpu_dai_name = "msm-dai-q6-dev.240",
5616 .codec_name = "msm-stub-codec.1",
5617 .codec_dai_name = "msm-stub-tx",
5618 .platform_name = "msm-pcm-afe",
5619 .dpcm_capture = 1,
5620 .ignore_suspend = 1,
5621 },
5622 {/* hw:x,7 */
5623 .name = MSM_DAILINK_NAME(Compress1),
5624 .stream_name = "Compress1",
5625 .cpu_dai_name = "MultiMedia4",
5626 .platform_name = "msm-compress-dsp",
5627 .dynamic = 1,
5628 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5629 .dpcm_playback = 1,
5630 .dpcm_capture = 1,
5631 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5632 SND_SOC_DPCM_TRIGGER_POST},
5633 .codec_dai_name = "snd-soc-dummy-dai",
5634 .codec_name = "snd-soc-dummy",
5635 .ignore_suspend = 1,
5636 .ignore_pmdown_time = 1,
5637 /* this dainlink has playback support */
5638 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5639 },
Meng Wang197cb302019-03-01 13:54:38 +0800[diff] [blame]5640 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5641 {/* hw:x,8 */
5642 .name = "AUXPCM Hostless",
5643 .stream_name = "AUXPCM Hostless",
5644 .cpu_dai_name = "AUXPCM_HOSTLESS",
5645 .platform_name = "msm-pcm-hostless",
5646 .dynamic = 1,
5647 .dpcm_playback = 1,
5648 .dpcm_capture = 1,
5649 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5650 SND_SOC_DPCM_TRIGGER_POST},
5651 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5652 .ignore_suspend = 1,
5653 /* this dainlink has playback support */
5654 .ignore_pmdown_time = 1,
5655 .codec_dai_name = "snd-soc-dummy-dai",
5656 .codec_name = "snd-soc-dummy",
5657 },
5658 {/* hw:x,9 */
5659 .name = MSM_DAILINK_NAME(LowLatency),
5660 .stream_name = "MultiMedia5",
5661 .cpu_dai_name = "MultiMedia5",
5662 .platform_name = "msm-pcm-dsp.1",
5663 .dynamic = 1,
5664 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5665 .dpcm_playback = 1,
5666 .dpcm_capture = 1,
5667 .codec_dai_name = "snd-soc-dummy-dai",
5668 .codec_name = "snd-soc-dummy",
5669 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5670 SND_SOC_DPCM_TRIGGER_POST},
5671 .ignore_suspend = 1,
5672 /* this dainlink has playback support */
5673 .ignore_pmdown_time = 1,
5674 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5675 .ops = &msm_fe_qos_ops,
5676 },
5677 {/* hw:x,10 */
5678 .name = "Listen 1 Audio Service",
5679 .stream_name = "Listen 1 Audio Service",
5680 .cpu_dai_name = "LSM1",
5681 .platform_name = "msm-lsm-client",
5682 .dynamic = 1,
5683 .dpcm_capture = 1,
5684 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5685 SND_SOC_DPCM_TRIGGER_POST },
5686 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5687 .ignore_suspend = 1,
5688 .codec_dai_name = "snd-soc-dummy-dai",
5689 .codec_name = "snd-soc-dummy",
5690 .id = MSM_FRONTEND_DAI_LSM1,
5691 },
5692 /* Multiple Tunnel instances */
5693 {/* hw:x,11 */
5694 .name = MSM_DAILINK_NAME(Compress2),
5695 .stream_name = "Compress2",
5696 .cpu_dai_name = "MultiMedia7",
5697 .platform_name = "msm-compress-dsp",
5698 .dynamic = 1,
5699 .dpcm_playback = 1,
5700 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5701 SND_SOC_DPCM_TRIGGER_POST},
5702 .codec_dai_name = "snd-soc-dummy-dai",
5703 .codec_name = "snd-soc-dummy",
5704 .ignore_suspend = 1,
5705 .ignore_pmdown_time = 1,
5706 /* this dainlink has playback support */
5707 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5708 },
5709 {/* hw:x,12 */
5710 .name = MSM_DAILINK_NAME(MultiMedia10),
5711 .stream_name = "MultiMedia10",
5712 .cpu_dai_name = "MultiMedia10",
5713 .platform_name = "msm-pcm-dsp.1",
5714 .dynamic = 1,
5715 .dpcm_playback = 1,
5716 .dpcm_capture = 1,
5717 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5718 SND_SOC_DPCM_TRIGGER_POST},
5719 .codec_dai_name = "snd-soc-dummy-dai",
5720 .codec_name = "snd-soc-dummy",
5721 .ignore_suspend = 1,
5722 .ignore_pmdown_time = 1,
5723 /* this dainlink has playback support */
5724 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5725 },
5726 {/* hw:x,13 */
5727 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5728 .stream_name = "MM_NOIRQ",
5729 .cpu_dai_name = "MultiMedia8",
5730 .platform_name = "msm-pcm-dsp-noirq",
5731 .dynamic = 1,
5732 .dpcm_playback = 1,
5733 .dpcm_capture = 1,
5734 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5735 SND_SOC_DPCM_TRIGGER_POST},
5736 .codec_dai_name = "snd-soc-dummy-dai",
5737 .codec_name = "snd-soc-dummy",
5738 .ignore_suspend = 1,
5739 .ignore_pmdown_time = 1,
5740 /* this dainlink has playback support */
5741 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5742 .ops = &msm_fe_qos_ops,
5743 },
5744 /* HDMI Hostless */
5745 {/* hw:x,14 */
5746 .name = "HDMI_RX_HOSTLESS",
5747 .stream_name = "HDMI_RX_HOSTLESS",
5748 .cpu_dai_name = "HDMI_HOSTLESS",
5749 .platform_name = "msm-pcm-hostless",
5750 .dynamic = 1,
5751 .dpcm_playback = 1,
5752 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5753 SND_SOC_DPCM_TRIGGER_POST},
5754 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5755 .ignore_suspend = 1,
5756 .ignore_pmdown_time = 1,
5757 .codec_dai_name = "snd-soc-dummy-dai",
5758 .codec_name = "snd-soc-dummy",
5759 },
5760 {/* hw:x,15 */
5761 .name = "VoiceMMode2",
5762 .stream_name = "VoiceMMode2",
5763 .cpu_dai_name = "VoiceMMode2",
5764 .platform_name = "msm-pcm-voice",
5765 .dynamic = 1,
5766 .dpcm_playback = 1,
5767 .dpcm_capture = 1,
5768 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5769 SND_SOC_DPCM_TRIGGER_POST},
5770 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5771 .ignore_suspend = 1,
5772 .ignore_pmdown_time = 1,
5773 .codec_dai_name = "snd-soc-dummy-dai",
5774 .codec_name = "snd-soc-dummy",
5775 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5776 },
5777 /* LSM FE */
5778 {/* hw:x,16 */
5779 .name = "Listen 2 Audio Service",
5780 .stream_name = "Listen 2 Audio Service",
5781 .cpu_dai_name = "LSM2",
5782 .platform_name = "msm-lsm-client",
5783 .dynamic = 1,
5784 .dpcm_capture = 1,
5785 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5786 SND_SOC_DPCM_TRIGGER_POST },
5787 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5788 .ignore_suspend = 1,
5789 .codec_dai_name = "snd-soc-dummy-dai",
5790 .codec_name = "snd-soc-dummy",
5791 .id = MSM_FRONTEND_DAI_LSM2,
5792 },
5793 {/* hw:x,17 */
5794 .name = "Listen 3 Audio Service",
5795 .stream_name = "Listen 3 Audio Service",
5796 .cpu_dai_name = "LSM3",
5797 .platform_name = "msm-lsm-client",
5798 .dynamic = 1,
5799 .dpcm_capture = 1,
5800 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5801 SND_SOC_DPCM_TRIGGER_POST },
5802 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5803 .ignore_suspend = 1,
5804 .codec_dai_name = "snd-soc-dummy-dai",
5805 .codec_name = "snd-soc-dummy",
5806 .id = MSM_FRONTEND_DAI_LSM3,
5807 },
5808 {/* hw:x,18 */
5809 .name = "Listen 4 Audio Service",
5810 .stream_name = "Listen 4 Audio Service",
5811 .cpu_dai_name = "LSM4",
5812 .platform_name = "msm-lsm-client",
5813 .dynamic = 1,
5814 .dpcm_capture = 1,
5815 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5816 SND_SOC_DPCM_TRIGGER_POST },
5817 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5818 .ignore_suspend = 1,
5819 .codec_dai_name = "snd-soc-dummy-dai",
5820 .codec_name = "snd-soc-dummy",
5821 .id = MSM_FRONTEND_DAI_LSM4,
5822 },
5823 {/* hw:x,19 */
5824 .name = "Listen 5 Audio Service",
5825 .stream_name = "Listen 5 Audio Service",
5826 .cpu_dai_name = "LSM5",
5827 .platform_name = "msm-lsm-client",
5828 .dynamic = 1,
5829 .dpcm_capture = 1,
5830 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5831 SND_SOC_DPCM_TRIGGER_POST },
5832 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5833 .ignore_suspend = 1,
5834 .codec_dai_name = "snd-soc-dummy-dai",
5835 .codec_name = "snd-soc-dummy",
5836 .id = MSM_FRONTEND_DAI_LSM5,
5837 },
5838 {/* hw:x,20 */
5839 .name = "Listen 6 Audio Service",
5840 .stream_name = "Listen 6 Audio Service",
5841 .cpu_dai_name = "LSM6",
5842 .platform_name = "msm-lsm-client",
5843 .dynamic = 1,
5844 .dpcm_capture = 1,
5845 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5846 SND_SOC_DPCM_TRIGGER_POST },
5847 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5848 .ignore_suspend = 1,
5849 .codec_dai_name = "snd-soc-dummy-dai",
5850 .codec_name = "snd-soc-dummy",
5851 .id = MSM_FRONTEND_DAI_LSM6,
5852 },
5853 {/* hw:x,21 */
5854 .name = "Listen 7 Audio Service",
5855 .stream_name = "Listen 7 Audio Service",
5856 .cpu_dai_name = "LSM7",
5857 .platform_name = "msm-lsm-client",
5858 .dynamic = 1,
5859 .dpcm_capture = 1,
5860 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5861 SND_SOC_DPCM_TRIGGER_POST },
5862 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5863 .ignore_suspend = 1,
5864 .codec_dai_name = "snd-soc-dummy-dai",
5865 .codec_name = "snd-soc-dummy",
5866 .id = MSM_FRONTEND_DAI_LSM7,
5867 },
5868 {/* hw:x,22 */
5869 .name = "Listen 8 Audio Service",
5870 .stream_name = "Listen 8 Audio Service",
5871 .cpu_dai_name = "LSM8",
5872 .platform_name = "msm-lsm-client",
5873 .dynamic = 1,
5874 .dpcm_capture = 1,
5875 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5876 SND_SOC_DPCM_TRIGGER_POST },
5877 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5878 .ignore_suspend = 1,
5879 .codec_dai_name = "snd-soc-dummy-dai",
5880 .codec_name = "snd-soc-dummy",
5881 .id = MSM_FRONTEND_DAI_LSM8,
5882 },
5883 {/* hw:x,23 */
5884 .name = MSM_DAILINK_NAME(Media9),
5885 .stream_name = "MultiMedia9",
5886 .cpu_dai_name = "MultiMedia9",
5887 .platform_name = "msm-pcm-dsp.0",
5888 .dynamic = 1,
5889 .dpcm_playback = 1,
5890 .dpcm_capture = 1,
5891 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5892 SND_SOC_DPCM_TRIGGER_POST},
5893 .codec_dai_name = "snd-soc-dummy-dai",
5894 .codec_name = "snd-soc-dummy",
5895 .ignore_suspend = 1,
5896 /* this dainlink has playback support */
5897 .ignore_pmdown_time = 1,
5898 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
5899 },
5900 {/* hw:x,24 */
5901 .name = MSM_DAILINK_NAME(Compress4),
5902 .stream_name = "Compress4",
5903 .cpu_dai_name = "MultiMedia11",
5904 .platform_name = "msm-compress-dsp",
5905 .dynamic = 1,
5906 .dpcm_playback = 1,
5907 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5908 SND_SOC_DPCM_TRIGGER_POST},
5909 .codec_dai_name = "snd-soc-dummy-dai",
5910 .codec_name = "snd-soc-dummy",
5911 .ignore_suspend = 1,
5912 .ignore_pmdown_time = 1,
5913 /* this dainlink has playback support */
5914 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
5915 },
5916 {/* hw:x,25 */
5917 .name = MSM_DAILINK_NAME(Compress5),
5918 .stream_name = "Compress5",
5919 .cpu_dai_name = "MultiMedia12",
5920 .platform_name = "msm-compress-dsp",
5921 .dynamic = 1,
5922 .dpcm_playback = 1,
5923 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5924 SND_SOC_DPCM_TRIGGER_POST},
5925 .codec_dai_name = "snd-soc-dummy-dai",
5926 .codec_name = "snd-soc-dummy",
5927 .ignore_suspend = 1,
5928 .ignore_pmdown_time = 1,
5929 /* this dainlink has playback support */
5930 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
5931 },
5932 {/* hw:x,26 */
5933 .name = MSM_DAILINK_NAME(Compress6),
5934 .stream_name = "Compress6",
5935 .cpu_dai_name = "MultiMedia13",
5936 .platform_name = "msm-compress-dsp",
5937 .dynamic = 1,
5938 .dpcm_playback = 1,
5939 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5940 SND_SOC_DPCM_TRIGGER_POST},
5941 .codec_dai_name = "snd-soc-dummy-dai",
5942 .codec_name = "snd-soc-dummy",
5943 .ignore_suspend = 1,
5944 .ignore_pmdown_time = 1,
5945 /* this dainlink has playback support */
5946 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
5947 },
5948 {/* hw:x,27 */
5949 .name = MSM_DAILINK_NAME(Compress7),
5950 .stream_name = "Compress7",
5951 .cpu_dai_name = "MultiMedia14",
5952 .platform_name = "msm-compress-dsp",
5953 .dynamic = 1,
5954 .dpcm_playback = 1,
5955 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5956 SND_SOC_DPCM_TRIGGER_POST},
5957 .codec_dai_name = "snd-soc-dummy-dai",
5958 .codec_name = "snd-soc-dummy",
5959 .ignore_suspend = 1,
5960 .ignore_pmdown_time = 1,
5961 /* this dainlink has playback support */
5962 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
5963 },
5964 {/* hw:x,28 */
5965 .name = MSM_DAILINK_NAME(Compress8),
5966 .stream_name = "Compress8",
5967 .cpu_dai_name = "MultiMedia15",
5968 .platform_name = "msm-compress-dsp",
5969 .dynamic = 1,
5970 .dpcm_playback = 1,
5971 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5972 SND_SOC_DPCM_TRIGGER_POST},
5973 .codec_dai_name = "snd-soc-dummy-dai",
5974 .codec_name = "snd-soc-dummy",
5975 .ignore_suspend = 1,
5976 .ignore_pmdown_time = 1,
5977 /* this dainlink has playback support */
5978 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
5979 },
5980 {/* hw:x,29 */
5981 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
5982 .stream_name = "MM_NOIRQ_2",
5983 .cpu_dai_name = "MultiMedia16",
5984 .platform_name = "msm-pcm-dsp-noirq",
5985 .dynamic = 1,
5986 .dpcm_playback = 1,
5987 .dpcm_capture = 1,
5988 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5989 SND_SOC_DPCM_TRIGGER_POST},
5990 .codec_dai_name = "snd-soc-dummy-dai",
5991 .codec_name = "snd-soc-dummy",
5992 .ignore_suspend = 1,
5993 .ignore_pmdown_time = 1,
5994 /* this dainlink has playback support */
5995 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -0700[diff] [blame]5996 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5997 },
5998 {/* hw:x,30 */
5999 .name = "CDC_DMA Hostless",
6000 .stream_name = "CDC_DMA Hostless",
6001 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6002 .platform_name = "msm-pcm-hostless",
6003 .dynamic = 1,
6004 .dpcm_playback = 1,
6005 .dpcm_capture = 1,
6006 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6007 SND_SOC_DPCM_TRIGGER_POST},
6008 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6009 .ignore_suspend = 1,
6010 /* this dailink has playback support */
6011 .ignore_pmdown_time = 1,
6012 .codec_dai_name = "snd-soc-dummy-dai",
6013 .codec_name = "snd-soc-dummy",
6014 },
6015 {/* hw:x,31 */
6016 .name = "TX3_CDC_DMA Hostless",
6017 .stream_name = "TX3_CDC_DMA Hostless",
6018 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6019 .platform_name = "msm-pcm-hostless",
6020 .dynamic = 1,
6021 .dpcm_capture = 1,
6022 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6023 SND_SOC_DPCM_TRIGGER_POST},
6024 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6025 .ignore_suspend = 1,
6026 .codec_dai_name = "snd-soc-dummy-dai",
6027 .codec_name = "snd-soc-dummy",
6028 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6029 {/* hw:x,32 */
6030 .name = "Tertiary MI2S TX_Hostless",
6031 .stream_name = "Tertiary MI2S_TX Hostless Capture",
6032 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
6033 .platform_name = "msm-pcm-hostless",
6034 .dynamic = 1,
6035 .dpcm_capture = 1,
6036 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6037 SND_SOC_DPCM_TRIGGER_POST},
6038 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6039 .ignore_suspend = 1,
6040 .ignore_pmdown_time = 1,
6041 .codec_dai_name = "snd-soc-dummy-dai",
6042 .codec_name = "snd-soc-dummy",
6043 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6044};
6045
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6046static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6047 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6048 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6049 .stream_name = "WSA CDC DMA0 Capture",
6050 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6051 .platform_name = "msm-pcm-hostless",
6052 .codec_name = "bolero_codec",
6053 .codec_dai_name = "wsa_macro_vifeedback",
6054 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6055 .be_hw_params_fixup = msm_be_hw_params_fixup,
6056 .ignore_suspend = 1,
6057 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6058 .ops = &msm_cdc_dma_be_ops,
6059 },
6060};
6061
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6062static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6063 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6064 .name = MSM_DAILINK_NAME(ASM Loopback),
6065 .stream_name = "MultiMedia6",
6066 .cpu_dai_name = "MultiMedia6",
6067 .platform_name = "msm-pcm-loopback",
6068 .dynamic = 1,
6069 .dpcm_playback = 1,
6070 .dpcm_capture = 1,
6071 .codec_dai_name = "snd-soc-dummy-dai",
6072 .codec_name = "snd-soc-dummy",
6073 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6074 SND_SOC_DPCM_TRIGGER_POST},
6075 .ignore_suspend = 1,
6076 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6077 .ignore_pmdown_time = 1,
6078 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6079 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6080 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6081 .name = "USB Audio Hostless",
6082 .stream_name = "USB Audio Hostless",
6083 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6084 .platform_name = "msm-pcm-hostless",
6085 .dynamic = 1,
6086 .dpcm_playback = 1,
6087 .dpcm_capture = 1,
6088 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6089 SND_SOC_DPCM_TRIGGER_POST},
6090 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6091 .ignore_suspend = 1,
6092 .ignore_pmdown_time = 1,
6093 .codec_dai_name = "snd-soc-dummy-dai",
6094 .codec_name = "snd-soc-dummy",
6095 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6096 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6097 .name = "SLIMBUS_7 Hostless",
6098 .stream_name = "SLIMBUS_7 Hostless",
6099 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
6100 .platform_name = "msm-pcm-hostless",
6101 .dynamic = 1,
6102 .dpcm_capture = 1,
6103 .dpcm_playback = 1,
6104 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6105 SND_SOC_DPCM_TRIGGER_POST},
6106 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6107 .ignore_suspend = 1,
6108 .ignore_pmdown_time = 1,
6109 .codec_dai_name = "snd-soc-dummy-dai",
6110 .codec_name = "snd-soc-dummy",
6111 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6112 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6113 .name = "Compress Capture",
6114 .stream_name = "Compress9",
6115 .cpu_dai_name = "MultiMedia17",
6116 .platform_name = "msm-compress-dsp",
6117 .dynamic = 1,
6118 .dpcm_capture = 1,
6119 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6120 SND_SOC_DPCM_TRIGGER_POST},
6121 .codec_dai_name = "snd-soc-dummy-dai",
6122 .codec_name = "snd-soc-dummy",
6123 .ignore_suspend = 1,
6124 .ignore_pmdown_time = 1,
6125 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6126 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6127 {/* hw:x,38 */
6128 .name = "SLIMBUS_8 Hostless",
6129 .stream_name = "SLIMBUS_8 Hostless",
6130 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6131 .platform_name = "msm-pcm-hostless",
6132 .dynamic = 1,
6133 .dpcm_capture = 1,
6134 .dpcm_playback = 1,
6135 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6136 SND_SOC_DPCM_TRIGGER_POST},
6137 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6138 .ignore_suspend = 1,
6139 .ignore_pmdown_time = 1,
6140 .codec_dai_name = "snd-soc-dummy-dai",
6141 .codec_name = "snd-soc-dummy",
6142 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -0700[diff] [blame]6143 {/* hw:x,39 */
6144 .name = LPASS_BE_TX_CDC_DMA_TX_5,
6145 .stream_name = "TX CDC DMA5 Capture",
6146 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
6147 .platform_name = "msm-pcm-hostless",
6148 .codec_name = "bolero_codec",
6149 .codec_dai_name = "tx_macro_tx3",
6150 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
6151 .be_hw_params_fixup = msm_be_hw_params_fixup,
6152 .ignore_suspend = 1,
6153 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6154 .ops = &msm_cdc_dma_be_ops,
6155 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6156};
6157
6158static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6159 /* Backend AFE DAI Links */
6160 {
6161 .name = LPASS_BE_AFE_PCM_RX,
6162 .stream_name = "AFE Playback",
6163 .cpu_dai_name = "msm-dai-q6-dev.224",
6164 .platform_name = "msm-pcm-routing",
6165 .codec_name = "msm-stub-codec.1",
6166 .codec_dai_name = "msm-stub-rx",
6167 .no_pcm = 1,
6168 .dpcm_playback = 1,
6169 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6170 .be_hw_params_fixup = msm_be_hw_params_fixup,
6171 /* this dainlink has playback support */
6172 .ignore_pmdown_time = 1,
6173 .ignore_suspend = 1,
6174 },
6175 {
6176 .name = LPASS_BE_AFE_PCM_TX,
6177 .stream_name = "AFE Capture",
6178 .cpu_dai_name = "msm-dai-q6-dev.225",
6179 .platform_name = "msm-pcm-routing",
6180 .codec_name = "msm-stub-codec.1",
6181 .codec_dai_name = "msm-stub-tx",
6182 .no_pcm = 1,
6183 .dpcm_capture = 1,
6184 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6185 .be_hw_params_fixup = msm_be_hw_params_fixup,
6186 .ignore_suspend = 1,
6187 },
6188 /* Incall Record Uplink BACK END DAI Link */
6189 {
6190 .name = LPASS_BE_INCALL_RECORD_TX,
6191 .stream_name = "Voice Uplink Capture",
6192 .cpu_dai_name = "msm-dai-q6-dev.32772",
6193 .platform_name = "msm-pcm-routing",
6194 .codec_name = "msm-stub-codec.1",
6195 .codec_dai_name = "msm-stub-tx",
6196 .no_pcm = 1,
6197 .dpcm_capture = 1,
6198 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6199 .be_hw_params_fixup = msm_be_hw_params_fixup,
6200 .ignore_suspend = 1,
6201 },
6202 /* Incall Record Downlink BACK END DAI Link */
6203 {
6204 .name = LPASS_BE_INCALL_RECORD_RX,
6205 .stream_name = "Voice Downlink Capture",
6206 .cpu_dai_name = "msm-dai-q6-dev.32771",
6207 .platform_name = "msm-pcm-routing",
6208 .codec_name = "msm-stub-codec.1",
6209 .codec_dai_name = "msm-stub-tx",
6210 .no_pcm = 1,
6211 .dpcm_capture = 1,
6212 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6213 .be_hw_params_fixup = msm_be_hw_params_fixup,
6214 .ignore_suspend = 1,
6215 },
6216 /* Incall Music BACK END DAI Link */
6217 {
6218 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6219 .stream_name = "Voice Farend Playback",
6220 .cpu_dai_name = "msm-dai-q6-dev.32773",
6221 .platform_name = "msm-pcm-routing",
6222 .codec_name = "msm-stub-codec.1",
6223 .codec_dai_name = "msm-stub-rx",
6224 .no_pcm = 1,
6225 .dpcm_playback = 1,
6226 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6227 .be_hw_params_fixup = msm_be_hw_params_fixup,
6228 .ignore_suspend = 1,
6229 .ignore_pmdown_time = 1,
6230 },
6231 /* Incall Music 2 BACK END DAI Link */
6232 {
6233 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6234 .stream_name = "Voice2 Farend Playback",
6235 .cpu_dai_name = "msm-dai-q6-dev.32770",
6236 .platform_name = "msm-pcm-routing",
6237 .codec_name = "msm-stub-codec.1",
6238 .codec_dai_name = "msm-stub-rx",
6239 .no_pcm = 1,
6240 .dpcm_playback = 1,
6241 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6242 .be_hw_params_fixup = msm_be_hw_params_fixup,
6243 .ignore_suspend = 1,
6244 .ignore_pmdown_time = 1,
6245 },
Jaideep Sharma2ef4fb22020-03-11 22:29:11 +0530[diff] [blame]6246 /* Proxy Tx BACK END DAI Link */
6247 {
6248 .name = LPASS_BE_PROXY_TX,
6249 .stream_name = "Proxy Capture",
6250 .cpu_dai_name = "msm-dai-q6-dev.8195",
6251 .platform_name = "msm-pcm-routing",
6252 .codec_name = "msm-stub-codec.1",
6253 .codec_dai_name = "msm-stub-tx",
6254 .no_pcm = 1,
6255 .dpcm_capture = 1,
6256 .id = MSM_BACKEND_DAI_PROXY_TX,
6257 .ignore_suspend = 1,
6258 },
6259 /* Proxy Rx BACK END DAI Link */
6260 {
6261 .name = LPASS_BE_PROXY_RX,
6262 .stream_name = "Proxy Playback",
6263 .cpu_dai_name = "msm-dai-q6-dev.8194",
6264 .platform_name = "msm-pcm-routing",
6265 .codec_name = "msm-stub-codec.1",
6266 .codec_dai_name = "msm-stub-rx",
6267 .no_pcm = 1,
6268 .dpcm_playback = 1,
6269 .id = MSM_BACKEND_DAI_PROXY_RX,
6270 .ignore_pmdown_time = 1,
6271 .ignore_suspend = 1,
6272 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6273 {
6274 .name = LPASS_BE_USB_AUDIO_RX,
6275 .stream_name = "USB Audio Playback",
6276 .cpu_dai_name = "msm-dai-q6-dev.28672",
6277 .platform_name = "msm-pcm-routing",
6278 .codec_name = "msm-stub-codec.1",
6279 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6280 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6281 .no_pcm = 1,
6282 .dpcm_playback = 1,
6283 .id = MSM_BACKEND_DAI_USB_RX,
6284 .be_hw_params_fixup = msm_be_hw_params_fixup,
6285 .ignore_pmdown_time = 1,
6286 .ignore_suspend = 1,
6287 },
6288 {
6289 .name = LPASS_BE_USB_AUDIO_TX,
6290 .stream_name = "USB Audio Capture",
6291 .cpu_dai_name = "msm-dai-q6-dev.28673",
6292 .platform_name = "msm-pcm-routing",
6293 .codec_name = "msm-stub-codec.1",
6294 .codec_dai_name = "msm-stub-tx",
6295 .no_pcm = 1,
6296 .dpcm_capture = 1,
6297 .id = MSM_BACKEND_DAI_USB_TX,
6298 .be_hw_params_fixup = msm_be_hw_params_fixup,
6299 .ignore_suspend = 1,
6300 },
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]6301};
6302
6303
6304static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6305 {
6306 .name = LPASS_BE_PRI_TDM_RX_0,
6307 .stream_name = "Primary TDM0 Playback",
6308 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6309 .platform_name = "msm-pcm-routing",
6310 .codec_name = "msm-stub-codec.1",
6311 .codec_dai_name = "msm-stub-rx",
6312 .no_pcm = 1,
6313 .dpcm_playback = 1,
6314 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6315 .be_hw_params_fixup = msm_be_hw_params_fixup,
6316 .ops = &kona_tdm_be_ops,
6317 .ignore_suspend = 1,
6318 .ignore_pmdown_time = 1,
6319 },
6320 {
6321 .name = LPASS_BE_PRI_TDM_TX_0,
6322 .stream_name = "Primary TDM0 Capture",
6323 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6324 .platform_name = "msm-pcm-routing",
6325 .codec_name = "msm-stub-codec.1",
6326 .codec_dai_name = "msm-stub-tx",
6327 .no_pcm = 1,
6328 .dpcm_capture = 1,
6329 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6330 .be_hw_params_fixup = msm_be_hw_params_fixup,
6331 .ops = &kona_tdm_be_ops,
6332 .ignore_suspend = 1,
6333 },
6334 {
6335 .name = LPASS_BE_SEC_TDM_RX_0,
6336 .stream_name = "Secondary TDM0 Playback",
6337 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6338 .platform_name = "msm-pcm-routing",
6339 .codec_name = "msm-stub-codec.1",
6340 .codec_dai_name = "msm-stub-rx",
6341 .no_pcm = 1,
6342 .dpcm_playback = 1,
6343 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6344 .be_hw_params_fixup = msm_be_hw_params_fixup,
6345 .ops = &kona_tdm_be_ops,
6346 .ignore_suspend = 1,
6347 .ignore_pmdown_time = 1,
6348 },
6349 {
6350 .name = LPASS_BE_SEC_TDM_TX_0,
6351 .stream_name = "Secondary TDM0 Capture",
6352 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6353 .platform_name = "msm-pcm-routing",
6354 .codec_name = "msm-stub-codec.1",
6355 .codec_dai_name = "msm-stub-tx",
6356 .no_pcm = 1,
6357 .dpcm_capture = 1,
6358 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6359 .be_hw_params_fixup = msm_be_hw_params_fixup,
6360 .ops = &kona_tdm_be_ops,
6361 .ignore_suspend = 1,
6362 },
6363 {
6364 .name = LPASS_BE_TERT_TDM_RX_0,
6365 .stream_name = "Tertiary TDM0 Playback",
6366 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6367 .platform_name = "msm-pcm-routing",
6368 .codec_name = "msm-stub-codec.1",
6369 .codec_dai_name = "msm-stub-rx",
6370 .no_pcm = 1,
6371 .dpcm_playback = 1,
6372 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6373 .be_hw_params_fixup = msm_be_hw_params_fixup,
6374 .ops = &kona_tdm_be_ops,
6375 .ignore_suspend = 1,
6376 .ignore_pmdown_time = 1,
6377 },
6378 {
6379 .name = LPASS_BE_TERT_TDM_TX_0,
6380 .stream_name = "Tertiary TDM0 Capture",
6381 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6382 .platform_name = "msm-pcm-routing",
6383 .codec_name = "msm-stub-codec.1",
6384 .codec_dai_name = "msm-stub-tx",
6385 .no_pcm = 1,
6386 .dpcm_capture = 1,
6387 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6388 .be_hw_params_fixup = msm_be_hw_params_fixup,
6389 .ops = &kona_tdm_be_ops,
6390 .ignore_suspend = 1,
6391 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6392 {
6393 .name = LPASS_BE_QUAT_TDM_RX_0,
6394 .stream_name = "Quaternary TDM0 Playback",
6395 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6396 .platform_name = "msm-pcm-routing",
6397 .codec_name = "msm-stub-codec.1",
6398 .codec_dai_name = "msm-stub-rx",
6399 .no_pcm = 1,
6400 .dpcm_playback = 1,
6401 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6402 .be_hw_params_fixup = msm_be_hw_params_fixup,
6403 .ops = &kona_tdm_be_ops,
6404 .ignore_suspend = 1,
6405 .ignore_pmdown_time = 1,
6406 },
6407 {
6408 .name = LPASS_BE_QUAT_TDM_TX_0,
6409 .stream_name = "Quaternary TDM0 Capture",
6410 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6411 .platform_name = "msm-pcm-routing",
6412 .codec_name = "msm-stub-codec.1",
6413 .codec_dai_name = "msm-stub-tx",
6414 .no_pcm = 1,
6415 .dpcm_capture = 1,
6416 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6417 .be_hw_params_fixup = msm_be_hw_params_fixup,
6418 .ops = &kona_tdm_be_ops,
6419 .ignore_suspend = 1,
6420 },
6421 {
6422 .name = LPASS_BE_QUIN_TDM_RX_0,
6423 .stream_name = "Quinary TDM0 Playback",
6424 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6425 .platform_name = "msm-pcm-routing",
6426 .codec_name = "msm-stub-codec.1",
6427 .codec_dai_name = "msm-stub-rx",
6428 .no_pcm = 1,
6429 .dpcm_playback = 1,
6430 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6431 .be_hw_params_fixup = msm_be_hw_params_fixup,
6432 .ops = &kona_tdm_be_ops,
6433 .ignore_suspend = 1,
6434 .ignore_pmdown_time = 1,
6435 },
6436 {
6437 .name = LPASS_BE_QUIN_TDM_TX_0,
6438 .stream_name = "Quinary TDM0 Capture",
6439 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6440 .platform_name = "msm-pcm-routing",
6441 .codec_name = "msm-stub-codec.1",
6442 .codec_dai_name = "msm-stub-tx",
6443 .no_pcm = 1,
6444 .dpcm_capture = 1,
6445 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6446 .be_hw_params_fixup = msm_be_hw_params_fixup,
6447 .ops = &kona_tdm_be_ops,
6448 .ignore_suspend = 1,
6449 },
6450 {
6451 .name = LPASS_BE_SEN_TDM_RX_0,
6452 .stream_name = "Senary TDM0 Playback",
6453 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6454 .platform_name = "msm-pcm-routing",
6455 .codec_name = "msm-stub-codec.1",
6456 .codec_dai_name = "msm-stub-rx",
6457 .no_pcm = 1,
6458 .dpcm_playback = 1,
6459 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6460 .be_hw_params_fixup = msm_be_hw_params_fixup,
6461 .ops = &kona_tdm_be_ops,
6462 .ignore_suspend = 1,
6463 .ignore_pmdown_time = 1,
6464 },
6465 {
6466 .name = LPASS_BE_SEN_TDM_TX_0,
6467 .stream_name = "Senary TDM0 Capture",
6468 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6469 .platform_name = "msm-pcm-routing",
6470 .codec_name = "msm-stub-codec.1",
6471 .codec_dai_name = "msm-stub-tx",
6472 .no_pcm = 1,
6473 .dpcm_capture = 1,
6474 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6475 .be_hw_params_fixup = msm_be_hw_params_fixup,
6476 .ops = &kona_tdm_be_ops,
6477 .ignore_suspend = 1,
6478 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6479};
6480
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6481static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6482 {
6483 .name = LPASS_BE_SLIMBUS_7_RX,
6484 .stream_name = "Slimbus7 Playback",
6485 .cpu_dai_name = "msm-dai-q6-dev.16398",
6486 .platform_name = "msm-pcm-routing",
6487 .codec_name = "btfmslim_slave",
6488 /* BT codec driver determines capabilities based on
6489 * dai name, bt codecdai name should always contains
6490 * supported usecase information
6491 */
6492 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6493 .no_pcm = 1,
6494 .dpcm_playback = 1,
6495 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6496 .be_hw_params_fixup = msm_be_hw_params_fixup,
6497 .init = &msm_wcn_init,
6498 .ops = &msm_wcn_ops,
6499 /* dai link has playback support */
6500 .ignore_pmdown_time = 1,
6501 .ignore_suspend = 1,
6502 },
6503 {
6504 .name = LPASS_BE_SLIMBUS_7_TX,
6505 .stream_name = "Slimbus7 Capture",
6506 .cpu_dai_name = "msm-dai-q6-dev.16399",
6507 .platform_name = "msm-pcm-routing",
6508 .codec_name = "btfmslim_slave",
6509 .codec_dai_name = "btfm_bt_sco_slim_tx",
6510 .no_pcm = 1,
6511 .dpcm_capture = 1,
6512 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6513 .be_hw_params_fixup = msm_be_hw_params_fixup,
6514 .ops = &msm_wcn_ops,
6515 .ignore_suspend = 1,
6516 },
6517};
6518
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6519static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6520 {
6521 .name = LPASS_BE_SLIMBUS_7_RX,
6522 .stream_name = "Slimbus7 Playback",
6523 .cpu_dai_name = "msm-dai-q6-dev.16398",
6524 .platform_name = "msm-pcm-routing",
6525 .codec_name = "btfmslim_slave",
6526 /* BT codec driver determines capabilities based on
6527 * dai name, bt codecdai name should always contains
6528 * supported usecase information
6529 */
6530 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6531 .no_pcm = 1,
6532 .dpcm_playback = 1,
6533 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6534 .be_hw_params_fixup = msm_be_hw_params_fixup,
6535 .init = &msm_wcn_init_lito,
6536 .ops = &msm_wcn_ops_lito,
6537 /* dai link has playback support */
6538 .ignore_pmdown_time = 1,
6539 .ignore_suspend = 1,
6540 },
6541 {
6542 .name = LPASS_BE_SLIMBUS_7_TX,
6543 .stream_name = "Slimbus7 Capture",
6544 .cpu_dai_name = "msm-dai-q6-dev.16399",
6545 .platform_name = "msm-pcm-routing",
6546 .codec_name = "btfmslim_slave",
6547 .codec_dai_name = "btfm_bt_sco_slim_tx",
6548 .no_pcm = 1,
6549 .dpcm_capture = 1,
6550 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6551 .be_hw_params_fixup = msm_be_hw_params_fixup,
6552 .ops = &msm_wcn_ops_lito,
6553 .ignore_suspend = 1,
6554 },
6555 {
6556 .name = LPASS_BE_SLIMBUS_8_TX,
6557 .stream_name = "Slimbus8 Capture",
6558 .cpu_dai_name = "msm-dai-q6-dev.16401",
6559 .platform_name = "msm-pcm-routing",
6560 .codec_name = "btfmslim_slave",
6561 .codec_dai_name = "btfm_fm_slim_tx",
6562 .no_pcm = 1,
6563 .dpcm_capture = 1,
6564 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6565 .be_hw_params_fixup = msm_be_hw_params_fixup,
6566 .ops = &msm_wcn_ops_lito,
6567 .ignore_suspend = 1,
6568 },
6569};
6570
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6571static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6572 /* DISP PORT BACK END DAI Link */
6573 {
6574 .name = LPASS_BE_DISPLAY_PORT,
6575 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6576 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6577 .platform_name = "msm-pcm-routing",
6578 .codec_name = "msm-ext-disp-audio-codec-rx",
6579 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6580 .no_pcm = 1,
6581 .dpcm_playback = 1,
6582 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6583 .be_hw_params_fixup = msm_be_hw_params_fixup,
6584 .ignore_pmdown_time = 1,
6585 .ignore_suspend = 1,
6586 },
6587 /* DISP PORT 1 BACK END DAI Link */
6588 {
6589 .name = LPASS_BE_DISPLAY_PORT1,
6590 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6591 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6592 .platform_name = "msm-pcm-routing",
6593 .codec_name = "msm-ext-disp-audio-codec-rx",
6594 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6595 .no_pcm = 1,
6596 .dpcm_playback = 1,
6597 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6598 .be_hw_params_fixup = msm_be_hw_params_fixup,
6599 .ignore_pmdown_time = 1,
6600 .ignore_suspend = 1,
6601 },
6602};
6603
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6604static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6605 {
6606 .name = LPASS_BE_PRI_MI2S_RX,
6607 .stream_name = "Primary MI2S Playback",
6608 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6609 .platform_name = "msm-pcm-routing",
6610 .codec_name = "msm-stub-codec.1",
6611 .codec_dai_name = "msm-stub-rx",
6612 .no_pcm = 1,
6613 .dpcm_playback = 1,
6614 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6615 .be_hw_params_fixup = msm_be_hw_params_fixup,
6616 .ops = &msm_mi2s_be_ops,
6617 .ignore_suspend = 1,
6618 .ignore_pmdown_time = 1,
6619 },
6620 {
6621 .name = LPASS_BE_PRI_MI2S_TX,
6622 .stream_name = "Primary MI2S Capture",
6623 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6624 .platform_name = "msm-pcm-routing",
6625 .codec_name = "msm-stub-codec.1",
6626 .codec_dai_name = "msm-stub-tx",
6627 .no_pcm = 1,
6628 .dpcm_capture = 1,
6629 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6630 .be_hw_params_fixup = msm_be_hw_params_fixup,
6631 .ops = &msm_mi2s_be_ops,
6632 .ignore_suspend = 1,
6633 },
6634 {
6635 .name = LPASS_BE_SEC_MI2S_RX,
6636 .stream_name = "Secondary MI2S Playback",
6637 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6638 .platform_name = "msm-pcm-routing",
6639 .codec_name = "msm-stub-codec.1",
6640 .codec_dai_name = "msm-stub-rx",
6641 .no_pcm = 1,
6642 .dpcm_playback = 1,
6643 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6644 .be_hw_params_fixup = msm_be_hw_params_fixup,
6645 .ops = &msm_mi2s_be_ops,
6646 .ignore_suspend = 1,
6647 .ignore_pmdown_time = 1,
6648 },
6649 {
6650 .name = LPASS_BE_SEC_MI2S_TX,
6651 .stream_name = "Secondary MI2S Capture",
6652 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6653 .platform_name = "msm-pcm-routing",
6654 .codec_name = "msm-stub-codec.1",
6655 .codec_dai_name = "msm-stub-tx",
6656 .no_pcm = 1,
6657 .dpcm_capture = 1,
6658 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6659 .be_hw_params_fixup = msm_be_hw_params_fixup,
6660 .ops = &msm_mi2s_be_ops,
6661 .ignore_suspend = 1,
6662 },
6663 {
6664 .name = LPASS_BE_TERT_MI2S_RX,
6665 .stream_name = "Tertiary MI2S Playback",
6666 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6667 .platform_name = "msm-pcm-routing",
6668 .codec_name = "msm-stub-codec.1",
6669 .codec_dai_name = "msm-stub-rx",
6670 .no_pcm = 1,
6671 .dpcm_playback = 1,
6672 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6673 .be_hw_params_fixup = msm_be_hw_params_fixup,
6674 .ops = &msm_mi2s_be_ops,
6675 .ignore_suspend = 1,
6676 .ignore_pmdown_time = 1,
6677 },
6678 {
6679 .name = LPASS_BE_TERT_MI2S_TX,
6680 .stream_name = "Tertiary MI2S Capture",
6681 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6682 .platform_name = "msm-pcm-routing",
6683 .codec_name = "msm-stub-codec.1",
6684 .codec_dai_name = "msm-stub-tx",
6685 .no_pcm = 1,
6686 .dpcm_capture = 1,
6687 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6688 .be_hw_params_fixup = msm_be_hw_params_fixup,
6689 .ops = &msm_mi2s_be_ops,
6690 .ignore_suspend = 1,
6691 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6692 {
6693 .name = LPASS_BE_QUAT_MI2S_RX,
6694 .stream_name = "Quaternary MI2S Playback",
6695 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6696 .platform_name = "msm-pcm-routing",
6697 .codec_name = "msm-stub-codec.1",
6698 .codec_dai_name = "msm-stub-rx",
6699 .no_pcm = 1,
6700 .dpcm_playback = 1,
6701 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6702 .be_hw_params_fixup = msm_be_hw_params_fixup,
6703 .ops = &msm_mi2s_be_ops,
6704 .ignore_suspend = 1,
6705 .ignore_pmdown_time = 1,
6706 },
6707 {
6708 .name = LPASS_BE_QUAT_MI2S_TX,
6709 .stream_name = "Quaternary MI2S Capture",
6710 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6711 .platform_name = "msm-pcm-routing",
6712 .codec_name = "msm-stub-codec.1",
6713 .codec_dai_name = "msm-stub-tx",
6714 .no_pcm = 1,
6715 .dpcm_capture = 1,
6716 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6717 .be_hw_params_fixup = msm_be_hw_params_fixup,
6718 .ops = &msm_mi2s_be_ops,
6719 .ignore_suspend = 1,
6720 },
6721 {
6722 .name = LPASS_BE_QUIN_MI2S_RX,
6723 .stream_name = "Quinary MI2S Playback",
6724 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6725 .platform_name = "msm-pcm-routing",
6726 .codec_name = "msm-stub-codec.1",
6727 .codec_dai_name = "msm-stub-rx",
6728 .no_pcm = 1,
6729 .dpcm_playback = 1,
6730 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6731 .be_hw_params_fixup = msm_be_hw_params_fixup,
6732 .ops = &msm_mi2s_be_ops,
6733 .ignore_suspend = 1,
6734 .ignore_pmdown_time = 1,
6735 },
6736 {
6737 .name = LPASS_BE_QUIN_MI2S_TX,
6738 .stream_name = "Quinary MI2S Capture",
6739 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6740 .platform_name = "msm-pcm-routing",
6741 .codec_name = "msm-stub-codec.1",
6742 .codec_dai_name = "msm-stub-tx",
6743 .no_pcm = 1,
6744 .dpcm_capture = 1,
6745 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6746 .be_hw_params_fixup = msm_be_hw_params_fixup,
6747 .ops = &msm_mi2s_be_ops,
6748 .ignore_suspend = 1,
6749 },
6750 {
6751 .name = LPASS_BE_SENARY_MI2S_RX,
6752 .stream_name = "Senary MI2S Playback",
6753 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6754 .platform_name = "msm-pcm-routing",
6755 .codec_name = "msm-stub-codec.1",
6756 .codec_dai_name = "msm-stub-rx",
6757 .no_pcm = 1,
6758 .dpcm_playback = 1,
6759 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6760 .be_hw_params_fixup = msm_be_hw_params_fixup,
6761 .ops = &msm_mi2s_be_ops,
6762 .ignore_suspend = 1,
6763 .ignore_pmdown_time = 1,
6764 },
6765 {
6766 .name = LPASS_BE_SENARY_MI2S_TX,
6767 .stream_name = "Senary MI2S Capture",
6768 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6769 .platform_name = "msm-pcm-routing",
6770 .codec_name = "msm-stub-codec.1",
6771 .codec_dai_name = "msm-stub-tx",
6772 .no_pcm = 1,
6773 .dpcm_capture = 1,
6774 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6775 .be_hw_params_fixup = msm_be_hw_params_fixup,
6776 .ops = &msm_mi2s_be_ops,
6777 .ignore_suspend = 1,
6778 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6779};
6780
6781static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6782 /* Primary AUX PCM Backend DAI Links */
6783 {
6784 .name = LPASS_BE_AUXPCM_RX,
6785 .stream_name = "AUX PCM Playback",
6786 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6787 .platform_name = "msm-pcm-routing",
6788 .codec_name = "msm-stub-codec.1",
6789 .codec_dai_name = "msm-stub-rx",
6790 .no_pcm = 1,
6791 .dpcm_playback = 1,
6792 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6793 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6794 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6795 .ignore_pmdown_time = 1,
6796 .ignore_suspend = 1,
6797 },
6798 {
6799 .name = LPASS_BE_AUXPCM_TX,
6800 .stream_name = "AUX PCM Capture",
6801 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6802 .platform_name = "msm-pcm-routing",
6803 .codec_name = "msm-stub-codec.1",
6804 .codec_dai_name = "msm-stub-tx",
6805 .no_pcm = 1,
6806 .dpcm_capture = 1,
6807 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6808 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6809 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6810 .ignore_suspend = 1,
6811 },
6812 /* Secondary AUX PCM Backend DAI Links */
6813 {
6814 .name = LPASS_BE_SEC_AUXPCM_RX,
6815 .stream_name = "Sec AUX PCM Playback",
6816 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6817 .platform_name = "msm-pcm-routing",
6818 .codec_name = "msm-stub-codec.1",
6819 .codec_dai_name = "msm-stub-rx",
6820 .no_pcm = 1,
6821 .dpcm_playback = 1,
6822 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6823 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6824 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6825 .ignore_pmdown_time = 1,
6826 .ignore_suspend = 1,
6827 },
6828 {
6829 .name = LPASS_BE_SEC_AUXPCM_TX,
6830 .stream_name = "Sec AUX PCM Capture",
6831 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6832 .platform_name = "msm-pcm-routing",
6833 .codec_name = "msm-stub-codec.1",
6834 .codec_dai_name = "msm-stub-tx",
6835 .no_pcm = 1,
6836 .dpcm_capture = 1,
6837 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6838 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6839 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6840 .ignore_suspend = 1,
6841 },
6842 /* Tertiary AUX PCM Backend DAI Links */
6843 {
6844 .name = LPASS_BE_TERT_AUXPCM_RX,
6845 .stream_name = "Tert AUX PCM Playback",
6846 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6847 .platform_name = "msm-pcm-routing",
6848 .codec_name = "msm-stub-codec.1",
6849 .codec_dai_name = "msm-stub-rx",
6850 .no_pcm = 1,
6851 .dpcm_playback = 1,
6852 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6853 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6854 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6855 .ignore_suspend = 1,
6856 },
6857 {
6858 .name = LPASS_BE_TERT_AUXPCM_TX,
6859 .stream_name = "Tert AUX PCM Capture",
6860 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6861 .platform_name = "msm-pcm-routing",
6862 .codec_name = "msm-stub-codec.1",
6863 .codec_dai_name = "msm-stub-tx",
6864 .no_pcm = 1,
6865 .dpcm_capture = 1,
6866 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6867 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6868 .ops = &kona_aux_be_ops,
6869 .ignore_suspend = 1,
6870 },
6871 /* Quaternary AUX PCM Backend DAI Links */
6872 {
6873 .name = LPASS_BE_QUAT_AUXPCM_RX,
6874 .stream_name = "Quat AUX PCM Playback",
6875 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6876 .platform_name = "msm-pcm-routing",
6877 .codec_name = "msm-stub-codec.1",
6878 .codec_dai_name = "msm-stub-rx",
6879 .no_pcm = 1,
6880 .dpcm_playback = 1,
6881 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6882 .be_hw_params_fixup = msm_be_hw_params_fixup,
6883 .ops = &kona_aux_be_ops,
6884 .ignore_suspend = 1,
6885 },
6886 {
6887 .name = LPASS_BE_QUAT_AUXPCM_TX,
6888 .stream_name = "Quat AUX PCM Capture",
6889 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6890 .platform_name = "msm-pcm-routing",
6891 .codec_name = "msm-stub-codec.1",
6892 .codec_dai_name = "msm-stub-tx",
6893 .no_pcm = 1,
6894 .dpcm_capture = 1,
6895 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
6896 .be_hw_params_fixup = msm_be_hw_params_fixup,
6897 .ops = &kona_aux_be_ops,
6898 .ignore_suspend = 1,
6899 },
6900 /* Quinary AUX PCM Backend DAI Links */
6901 {
6902 .name = LPASS_BE_QUIN_AUXPCM_RX,
6903 .stream_name = "Quin AUX PCM Playback",
6904 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6905 .platform_name = "msm-pcm-routing",
6906 .codec_name = "msm-stub-codec.1",
6907 .codec_dai_name = "msm-stub-rx",
6908 .no_pcm = 1,
6909 .dpcm_playback = 1,
6910 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
6911 .be_hw_params_fixup = msm_be_hw_params_fixup,
6912 .ops = &kona_aux_be_ops,
6913 .ignore_suspend = 1,
6914 },
6915 {
6916 .name = LPASS_BE_QUIN_AUXPCM_TX,
6917 .stream_name = "Quin AUX PCM Capture",
6918 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6919 .platform_name = "msm-pcm-routing",
6920 .codec_name = "msm-stub-codec.1",
6921 .codec_dai_name = "msm-stub-tx",
6922 .no_pcm = 1,
6923 .dpcm_capture = 1,
6924 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
6925 .be_hw_params_fixup = msm_be_hw_params_fixup,
6926 .ops = &kona_aux_be_ops,
6927 .ignore_suspend = 1,
6928 },
6929 /* Senary AUX PCM Backend DAI Links */
6930 {
6931 .name = LPASS_BE_SEN_AUXPCM_RX,
6932 .stream_name = "Sen AUX PCM Playback",
6933 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6934 .platform_name = "msm-pcm-routing",
6935 .codec_name = "msm-stub-codec.1",
6936 .codec_dai_name = "msm-stub-rx",
6937 .no_pcm = 1,
6938 .dpcm_playback = 1,
6939 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
6940 .be_hw_params_fixup = msm_be_hw_params_fixup,
6941 .ops = &kona_aux_be_ops,
6942 .ignore_suspend = 1,
6943 },
6944 {
6945 .name = LPASS_BE_SEN_AUXPCM_TX,
6946 .stream_name = "Sen AUX PCM Capture",
6947 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6948 .platform_name = "msm-pcm-routing",
6949 .codec_name = "msm-stub-codec.1",
6950 .codec_dai_name = "msm-stub-tx",
6951 .no_pcm = 1,
6952 .dpcm_capture = 1,
6953 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
6954 .be_hw_params_fixup = msm_be_hw_params_fixup,
6955 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6956 .ignore_suspend = 1,
6957 },
6958};
6959
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6960static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
6961 /* WSA CDC DMA Backend DAI Links */
6962 {
6963 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
6964 .stream_name = "WSA CDC DMA0 Playback",
6965 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
6966 .platform_name = "msm-pcm-routing",
6967 .codec_name = "bolero_codec",
6968 .codec_dai_name = "wsa_macro_rx1",
6969 .no_pcm = 1,
6970 .dpcm_playback = 1,
6971 .init = &msm_int_audrx_init,
6972 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
6973 .be_hw_params_fixup = msm_be_hw_params_fixup,
6974 .ignore_pmdown_time = 1,
6975 .ignore_suspend = 1,
6976 .ops = &msm_cdc_dma_be_ops,
6977 },
6978 {
6979 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
6980 .stream_name = "WSA CDC DMA1 Playback",
6981 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
6982 .platform_name = "msm-pcm-routing",
6983 .codec_name = "bolero_codec",
6984 .codec_dai_name = "wsa_macro_rx_mix",
6985 .no_pcm = 1,
6986 .dpcm_playback = 1,
6987 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
6988 .be_hw_params_fixup = msm_be_hw_params_fixup,
6989 .ignore_pmdown_time = 1,
6990 .ignore_suspend = 1,
6991 .ops = &msm_cdc_dma_be_ops,
6992 },
6993 {
6994 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
6995 .stream_name = "WSA CDC DMA1 Capture",
6996 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
6997 .platform_name = "msm-pcm-routing",
6998 .codec_name = "bolero_codec",
6999 .codec_dai_name = "wsa_macro_echo",
7000 .no_pcm = 1,
7001 .dpcm_capture = 1,
7002 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7003 .be_hw_params_fixup = msm_be_hw_params_fixup,
7004 .ignore_suspend = 1,
7005 .ops = &msm_cdc_dma_be_ops,
7006 },
7007};
7008
7009static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7010 /* RX CDC DMA Backend DAI Links */
7011 {
7012 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7013 .stream_name = "RX CDC DMA0 Playback",
7014 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
7015 .platform_name = "msm-pcm-routing",
7016 .codec_name = "bolero_codec",
7017 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7018 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7019 .no_pcm = 1,
7020 .dpcm_playback = 1,
7021 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7022 .be_hw_params_fixup = msm_be_hw_params_fixup,
7023 .ignore_pmdown_time = 1,
7024 .ignore_suspend = 1,
7025 .ops = &msm_cdc_dma_be_ops,
7026 },
7027 {
7028 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7029 .stream_name = "RX CDC DMA1 Playback",
7030 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
7031 .platform_name = "msm-pcm-routing",
7032 .codec_name = "bolero_codec",
7033 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7034 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7035 .no_pcm = 1,
7036 .dpcm_playback = 1,
7037 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7038 .be_hw_params_fixup = msm_be_hw_params_fixup,
7039 .ignore_pmdown_time = 1,
7040 .ignore_suspend = 1,
7041 .ops = &msm_cdc_dma_be_ops,
7042 },
7043 {
7044 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7045 .stream_name = "RX CDC DMA2 Playback",
7046 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
7047 .platform_name = "msm-pcm-routing",
7048 .codec_name = "bolero_codec",
7049 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7050 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7051 .no_pcm = 1,
7052 .dpcm_playback = 1,
7053 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7054 .be_hw_params_fixup = msm_be_hw_params_fixup,
7055 .ignore_pmdown_time = 1,
7056 .ignore_suspend = 1,
7057 .ops = &msm_cdc_dma_be_ops,
7058 },
7059 {
7060 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7061 .stream_name = "RX CDC DMA3 Playback",
7062 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
7063 .platform_name = "msm-pcm-routing",
7064 .codec_name = "bolero_codec",
7065 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7066 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7067 .no_pcm = 1,
7068 .dpcm_playback = 1,
7069 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7070 .be_hw_params_fixup = msm_be_hw_params_fixup,
7071 .ignore_pmdown_time = 1,
7072 .ignore_suspend = 1,
7073 .ops = &msm_cdc_dma_be_ops,
7074 },
7075 /* TX CDC DMA Backend DAI Links */
7076 {
7077 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7078 .stream_name = "TX CDC DMA3 Capture",
7079 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
7080 .platform_name = "msm-pcm-routing",
7081 .codec_name = "bolero_codec",
7082 .codec_dai_name = "tx_macro_tx1",
7083 .no_pcm = 1,
7084 .dpcm_capture = 1,
7085 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7086 .be_hw_params_fixup = msm_be_hw_params_fixup,
7087 .ignore_suspend = 1,
7088 .ops = &msm_cdc_dma_be_ops,
7089 },
7090 {
7091 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7092 .stream_name = "TX CDC DMA4 Capture",
7093 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
7094 .platform_name = "msm-pcm-routing",
7095 .codec_name = "bolero_codec",
7096 .codec_dai_name = "tx_macro_tx2",
7097 .no_pcm = 1,
7098 .dpcm_capture = 1,
7099 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7100 .be_hw_params_fixup = msm_be_hw_params_fixup,
7101 .ignore_suspend = 1,
7102 .ops = &msm_cdc_dma_be_ops,
7103 },
7104};
7105
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7106static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
7107 {
7108 .name = LPASS_BE_VA_CDC_DMA_TX_0,
7109 .stream_name = "VA CDC DMA0 Capture",
7110 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
7111 .platform_name = "msm-pcm-routing",
7112 .codec_name = "bolero_codec",
7113 .codec_dai_name = "va_macro_tx1",
7114 .no_pcm = 1,
7115 .dpcm_capture = 1,
7116 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
7117 .be_hw_params_fixup = msm_be_hw_params_fixup,
7118 .ignore_suspend = 1,
7119 .ops = &msm_cdc_dma_be_ops,
7120 },
7121 {
7122 .name = LPASS_BE_VA_CDC_DMA_TX_1,
7123 .stream_name = "VA CDC DMA1 Capture",
7124 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
7125 .platform_name = "msm-pcm-routing",
7126 .codec_name = "bolero_codec",
7127 .codec_dai_name = "va_macro_tx2",
7128 .no_pcm = 1,
7129 .dpcm_capture = 1,
7130 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
7131 .be_hw_params_fixup = msm_be_hw_params_fixup,
7132 .ignore_suspend = 1,
7133 .ops = &msm_cdc_dma_be_ops,
7134 },
7135 {
7136 .name = LPASS_BE_VA_CDC_DMA_TX_2,
7137 .stream_name = "VA CDC DMA2 Capture",
7138 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
7139 .platform_name = "msm-pcm-routing",
7140 .codec_name = "bolero_codec",
7141 .codec_dai_name = "va_macro_tx3",
7142 .no_pcm = 1,
7143 .dpcm_capture = 1,
7144 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
7145 .be_hw_params_fixup = msm_be_hw_params_fixup,
7146 .ignore_suspend = 1,
7147 .ops = &msm_cdc_dma_be_ops,
7148 },
7149};
7150
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7151static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
7152 {
7153 .name = LPASS_BE_AFE_LOOPBACK_TX,
7154 .stream_name = "AFE Loopback Capture",
7155 .cpu_dai_name = "msm-dai-q6-dev.24577",
7156 .platform_name = "msm-pcm-routing",
7157 .codec_name = "msm-stub-codec.1",
7158 .codec_dai_name = "msm-stub-tx",
7159 .no_pcm = 1,
7160 .dpcm_capture = 1,
7161 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
7162 .be_hw_params_fixup = msm_be_hw_params_fixup,
7163 .ignore_pmdown_time = 1,
7164 .ignore_suspend = 1,
7165 },
7166};
7167
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7168static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7169 ARRAY_SIZE(msm_common_dai_links) +
7170 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7171 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7172 ARRAY_SIZE(msm_common_be_dai_links) +
7173 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7174 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7175 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7176 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7177 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
7178 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7179 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7180 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]7181 ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
7182 ARRAY_SIZE(msm_tdm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7183
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7184static int msm_populate_dai_link_component_of_node(
7185 struct snd_soc_card *card)
7186{
7187 int i, index, ret = 0;
7188 struct device *cdev = card->dev;
7189 struct snd_soc_dai_link *dai_link = card->dai_link;
7190 struct device_node *np;
7191
7192 if (!cdev) {
7193 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
7194 return -ENODEV;
7195 }
7196
7197 for (i = 0; i < card->num_links; i++) {
7198 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7199 continue;
7200
7201 /* populate platform_of_node for snd card dai links */
7202 if (dai_link[i].platform_name &&
7203 !dai_link[i].platform_of_node) {
7204 index = of_property_match_string(cdev->of_node,
7205 "asoc-platform-names",
7206 dai_link[i].platform_name);
7207 if (index < 0) {
7208 dev_err(cdev, "%s: No match found for platform name: %s\n",
7209 __func__, dai_link[i].platform_name);
7210 ret = index;
7211 goto err;
7212 }
7213 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7214 index);
7215 if (!np) {
7216 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
7217 __func__, dai_link[i].platform_name,
7218 index);
7219 ret = -ENODEV;
7220 goto err;
7221 }
7222 dai_link[i].platform_of_node = np;
7223 dai_link[i].platform_name = NULL;
7224 }
7225
7226 /* populate cpu_of_node for snd card dai links */
7227 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7228 index = of_property_match_string(cdev->of_node,
7229 "asoc-cpu-names",
7230 dai_link[i].cpu_dai_name);
7231 if (index >= 0) {
7232 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7233 index);
7234 if (!np) {
7235 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
7236 __func__,
7237 dai_link[i].cpu_dai_name);
7238 ret = -ENODEV;
7239 goto err;
7240 }
7241 dai_link[i].cpu_of_node = np;
7242 dai_link[i].cpu_dai_name = NULL;
7243 }
7244 }
7245
7246 /* populate codec_of_node for snd card dai links */
7247 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7248 index = of_property_match_string(cdev->of_node,
7249 "asoc-codec-names",
7250 dai_link[i].codec_name);
7251 if (index < 0)
7252 continue;
7253 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7254 index);
7255 if (!np) {
7256 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
7257 __func__, dai_link[i].codec_name);
7258 ret = -ENODEV;
7259 goto err;
7260 }
7261 dai_link[i].codec_of_node = np;
7262 dai_link[i].codec_name = NULL;
7263 }
7264 }
7265
7266err:
7267 return ret;
7268}
7269
7270static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7271{
7272 int ret = -EINVAL;
7273 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
7274
7275 if (!component) {
7276 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
7277 return ret;
7278 }
7279
7280 ret = snd_soc_add_component_controls(component, msm_snd_controls,
7281 ARRAY_SIZE(msm_snd_controls));
7282 if (ret < 0) {
7283 dev_err(component->dev,
7284 "%s: add_codec_controls failed, err = %d\n",
7285 __func__, ret);
7286 return ret;
7287 }
7288
7289 return ret;
7290}
7291
7292static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7293 struct snd_pcm_hw_params *params)
7294{
7295 return 0;
7296}
7297
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7298static struct snd_soc_ops msm_stub_be_ops = {
7299 .hw_params = msm_snd_stub_hw_params,
7300};
7301
7302struct snd_soc_card snd_soc_card_stub_msm = {
7303 .name = "kona-stub-snd-card",
7304};
7305
7306static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7307 /* FrontEnd DAI Links */
7308 {
7309 .name = "MSMSTUB Media1",
7310 .stream_name = "MultiMedia1",
7311 .cpu_dai_name = "MultiMedia1",
7312 .platform_name = "msm-pcm-dsp.0",
7313 .dynamic = 1,
7314 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7315 .dpcm_playback = 1,
7316 .dpcm_capture = 1,
7317 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7318 SND_SOC_DPCM_TRIGGER_POST},
7319 .codec_dai_name = "snd-soc-dummy-dai",
7320 .codec_name = "snd-soc-dummy",
7321 .ignore_suspend = 1,
7322 /* this dainlink has playback support */
7323 .ignore_pmdown_time = 1,
7324 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7325 },
7326};
7327
7328static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7329 /* Backend DAI Links */
7330 {
7331 .name = LPASS_BE_AUXPCM_RX,
7332 .stream_name = "AUX PCM Playback",
7333 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7334 .platform_name = "msm-pcm-routing",
7335 .codec_name = "msm-stub-codec.1",
7336 .codec_dai_name = "msm-stub-rx",
7337 .no_pcm = 1,
7338 .dpcm_playback = 1,
7339 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7340 .init = &msm_audrx_stub_init,
7341 .be_hw_params_fixup = msm_be_hw_params_fixup,
7342 .ignore_pmdown_time = 1,
7343 .ignore_suspend = 1,
7344 .ops = &msm_stub_be_ops,
7345 },
7346 {
7347 .name = LPASS_BE_AUXPCM_TX,
7348 .stream_name = "AUX PCM Capture",
7349 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7350 .platform_name = "msm-pcm-routing",
7351 .codec_name = "msm-stub-codec.1",
7352 .codec_dai_name = "msm-stub-tx",
7353 .no_pcm = 1,
7354 .dpcm_capture = 1,
7355 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7356 .be_hw_params_fixup = msm_be_hw_params_fixup,
7357 .ignore_suspend = 1,
7358 .ops = &msm_stub_be_ops,
7359 },
7360};
7361
7362static struct snd_soc_dai_link msm_stub_dai_links[
7363 ARRAY_SIZE(msm_stub_fe_dai_links) +
7364 ARRAY_SIZE(msm_stub_be_dai_links)];
7365
7366static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7367 { .compatible = "qcom,kona-asoc-snd",
7368 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7369 { .compatible = "qcom,kona-asoc-snd-stub",
7370 .data = "stub_codec"},
7371 {},
7372};
7373
7374static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7375{
7376 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7377 struct snd_soc_dai_link *dailink = NULL;
7378 int len_1 = 0;
7379 int len_2 = 0;
7380 int total_links = 0;
7381 int rc = 0;
7382 u32 mi2s_audio_intf = 0;
7383 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7384 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7385 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7386 const struct of_device_id *match;
7387
7388 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
7389 if (!match) {
7390 dev_err(dev, "%s: No DT match found for sound card\n",
7391 __func__);
7392 return NULL;
7393 }
7394
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7395 if (!strcmp(match->data, "codec")) {
7396 card = &snd_soc_card_kona_msm;
7397
7398 memcpy(msm_kona_dai_links + total_links,
7399 msm_common_dai_links,
7400 sizeof(msm_common_dai_links));
7401 total_links += ARRAY_SIZE(msm_common_dai_links);
7402
7403 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7404 msm_bolero_fe_dai_links,
7405 sizeof(msm_bolero_fe_dai_links));
7406 total_links +=
7407 ARRAY_SIZE(msm_bolero_fe_dai_links);
7408
7409 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7410 msm_common_misc_fe_dai_links,
7411 sizeof(msm_common_misc_fe_dai_links));
7412 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7413
7414 memcpy(msm_kona_dai_links + total_links,
7415 msm_common_be_dai_links,
7416 sizeof(msm_common_be_dai_links));
7417 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7418
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7419 memcpy(msm_kona_dai_links + total_links,
7420 msm_wsa_cdc_dma_be_dai_links,
7421 sizeof(msm_wsa_cdc_dma_be_dai_links));
7422 total_links +=
7423 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7424
7425 memcpy(msm_kona_dai_links + total_links,
7426 msm_rx_tx_cdc_dma_be_dai_links,
7427 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7428 total_links +=
7429 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7430
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7431 memcpy(msm_kona_dai_links + total_links,
7432 msm_va_cdc_dma_be_dai_links,
7433 sizeof(msm_va_cdc_dma_be_dai_links));
7434 total_links +=
7435 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7436
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7437 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7438 &mi2s_audio_intf);
7439 if (rc) {
7440 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7441 __func__);
7442 } else {
7443 if (mi2s_audio_intf) {
7444 memcpy(msm_kona_dai_links + total_links,
7445 msm_mi2s_be_dai_links,
7446 sizeof(msm_mi2s_be_dai_links));
7447 total_links +=
7448 ARRAY_SIZE(msm_mi2s_be_dai_links);
7449 }
7450 }
7451
7452 rc = of_property_read_u32(dev->of_node,
7453 "qcom,auxpcm-audio-intf",
7454 &auxpcm_audio_intf);
7455 if (rc) {
7456 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7457 __func__);
7458 } else {
7459 if (auxpcm_audio_intf) {
7460 memcpy(msm_kona_dai_links + total_links,
7461 msm_auxpcm_be_dai_links,
7462 sizeof(msm_auxpcm_be_dai_links));
7463 total_links +=
7464 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7465 }
7466 }
7467
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7468 rc = of_property_read_u32(dev->of_node,
7469 "qcom,ext-disp-audio-rx", &val);
7470 if (!rc && val) {
7471 dev_dbg(dev, "%s(): ext disp audio support present\n",
7472 __func__);
7473 memcpy(msm_kona_dai_links + total_links,
7474 ext_disp_be_dai_link,
7475 sizeof(ext_disp_be_dai_link));
7476 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7477 }
7478
7479 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7480 if (!rc && val) {
7481 dev_dbg(dev, "%s(): WCN BT support present\n",
7482 __func__);
7483 memcpy(msm_kona_dai_links + total_links,
7484 msm_wcn_be_dai_links,
7485 sizeof(msm_wcn_be_dai_links));
7486 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7487 }
7488
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7489 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7490 &val);
7491 if (!rc && val) {
7492 memcpy(msm_kona_dai_links + total_links,
7493 msm_afe_rxtx_lb_be_dai_link,
7494 sizeof(msm_afe_rxtx_lb_be_dai_link));
7495 total_links +=
7496 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7497 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7498
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]7499 rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
7500 &val);
7501 if (!rc && val) {
7502 memcpy(msm_kona_dai_links + total_links,
7503 msm_tdm_be_dai_links,
7504 sizeof(msm_tdm_be_dai_links));
7505 total_links +=
7506 ARRAY_SIZE(msm_tdm_be_dai_links);
7507 }
7508
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7509 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7510 &wcn_btfm_intf);
7511 if (rc) {
7512 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7513 __func__);
7514 } else {
7515 if (wcn_btfm_intf) {
7516 memcpy(msm_kona_dai_links + total_links,
7517 msm_wcn_btfm_be_dai_links,
7518 sizeof(msm_wcn_btfm_be_dai_links));
7519 total_links +=
7520 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7521 }
7522 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7523 dailink = msm_kona_dai_links;
7524 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7525 card = &snd_soc_card_stub_msm;
7526 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7527 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7528
7529 memcpy(msm_stub_dai_links,
7530 msm_stub_fe_dai_links,
7531 sizeof(msm_stub_fe_dai_links));
7532 memcpy(msm_stub_dai_links + len_1,
7533 msm_stub_be_dai_links,
7534 sizeof(msm_stub_be_dai_links));
7535
7536 dailink = msm_stub_dai_links;
7537 total_links = len_2;
7538 }
7539
7540 if (card) {
7541 card->dai_link = dailink;
7542 card->num_links = total_links;
7543 }
7544
7545 return card;
7546}
7547
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7548static int msm_wsa881x_init(struct snd_soc_component *component)
7549{
7550 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7551 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7552 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7553 SPKR_L_BOOST, SPKR_L_VI};
7554 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7555 SPKR_R_BOOST, SPKR_R_VI};
7556 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7557 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7558 struct msm_asoc_mach_data *pdata;
7559 struct snd_soc_dapm_context *dapm;
7560 struct snd_card *card;
7561 struct snd_info_entry *entry;
7562 int ret = 0;
7563
7564 if (!component) {
7565 pr_err("%s component is NULL\n", __func__);
7566 return -EINVAL;
7567 }
7568
7569 card = component->card->snd_card;
7570 dapm = snd_soc_component_get_dapm(component);
7571
7572 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7573 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7574 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]7575 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7576 wsa883x_set_channel_map(component, &spkleft_ports[0],
7577 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7578 &ch_rate[0], &spkleft_port_types[0]);
7579 else
7580 wsa881x_set_channel_map(component, &spkleft_ports[0],
7581 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7582 &ch_rate[0], &spkleft_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7583 if (dapm->component) {
7584 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7585 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7586 }
7587 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7588 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7589 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]7590 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7591 wsa883x_set_channel_map(component, &spkright_ports[0],
7592 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7593 &ch_rate[0], &spkright_port_types[0]);
7594 else
7595 wsa881x_set_channel_map(component, &spkright_ports[0],
7596 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7597 &ch_rate[0], &spkright_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7598 if (dapm->component) {
7599 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7600 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7601 }
7602 } else {
7603 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7604 component->name);
7605 ret = -EINVAL;
7606 goto err;
7607 }
7608 pdata = snd_soc_card_get_drvdata(component->card);
7609 if (!pdata->codec_root) {
7610 entry = snd_info_create_subdir(card->module, "codecs",
7611 card->proc_root);
7612 if (!entry) {
7613 pr_err("%s: Cannot create codecs module entry\n",
7614 __func__);
7615 ret = 0;
7616 goto err;
7617 }
7618 pdata->codec_root = entry;
7619 }
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]7620 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7621 wsa883x_codec_info_create_codec_entry(pdata->codec_root,
7622 component);
7623 else
7624 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7625 component);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7626err:
7627 return ret;
7628}
7629
7630static int msm_aux_codec_init(struct snd_soc_component *component)
7631{
7632 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7633 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7634 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7635 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7636 struct snd_info_entry *entry;
7637 struct snd_card *card = component->card->snd_card;
7638 struct msm_asoc_mach_data *pdata;
7639
7640 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7641 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7642 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7643 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7644 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7645 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7646 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7647 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7648 snd_soc_dapm_sync(dapm);
7649
7650 pdata = snd_soc_card_get_drvdata(component->card);
7651 if (!pdata->codec_root) {
7652 entry = snd_info_create_subdir(card->module, "codecs",
7653 card->proc_root);
7654 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7655 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7656 __func__);
7657 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7658 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7659 }
7660 pdata->codec_root = entry;
7661 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7662 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7663
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7664 codec_variant = wcd938x_get_codec_variant(component);
7665 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
7666 if (codec_variant == WCD9380)
7667 ret = snd_soc_add_component_controls(component,
7668 msm_int_wcd9380_snd_controls,
7669 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
7670 else if (codec_variant == WCD9385)
7671 ret = snd_soc_add_component_controls(component,
7672 msm_int_wcd9385_snd_controls,
7673 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
7674
7675 if (ret < 0) {
7676 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
7677 __func__, ret);
7678 return ret;
7679 }
7680
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7681mbhc_cfg_cal:
7682 mbhc_calibration = def_wcd_mbhc_cal();
7683 if (!mbhc_calibration)
7684 return -ENOMEM;
7685 wcd_mbhc_cfg.calibration = mbhc_calibration;
7686 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7687 if (ret) {
7688 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7689 __func__, ret);
7690 goto err_hs_detect;
7691 }
7692 return 0;
7693
7694err_hs_detect:
7695 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7696 return ret;
7697}
7698
7699static int msm_init_aux_dev(struct platform_device *pdev,
7700 struct snd_soc_card *card)
7701{
7702 struct device_node *wsa_of_node;
7703 struct device_node *aux_codec_of_node;
7704 u32 wsa_max_devs;
7705 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7706 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7707 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7708 int i;
Xiao Lid8bb93c2020-01-07 12:59:05 +0800[diff] [blame]7709 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
7710 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7711 const char *auxdev_name_prefix[1];
7712 char *dev_name_str = NULL;
7713 int found = 0;
7714 int codecs_found = 0;
7715 int ret = 0;
7716
7717 /* Get maximum WSA device count for this platform */
7718 ret = of_property_read_u32(pdev->dev.of_node,
7719 "qcom,wsa-max-devs", &wsa_max_devs);
7720 if (ret) {
7721 dev_info(&pdev->dev,
7722 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7723 __func__, pdev->dev.of_node->full_name, ret);
7724 wsa_max_devs = 0;
7725 goto codec_aux_dev;
7726 }
7727 if (wsa_max_devs == 0) {
7728 dev_warn(&pdev->dev,
7729 "%s: Max WSA devices is 0 for this target?\n",
7730 __func__);
7731 goto codec_aux_dev;
7732 }
7733
7734 /* Get count of WSA device phandles for this platform */
7735 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7736 "qcom,wsa-devs", NULL);
7737 if (wsa_dev_cnt == -ENOENT) {
7738 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7739 __func__);
7740 goto err;
7741 } else if (wsa_dev_cnt <= 0) {
7742 dev_err(&pdev->dev,
7743 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7744 __func__, wsa_dev_cnt);
7745 ret = -EINVAL;
7746 goto err;
7747 }
7748
7749 /*
7750 * Expect total phandles count to be NOT less than maximum possible
7751 * WSA count. However, if it is less, then assign same value to
7752 * max count as well.
7753 */
7754 if (wsa_dev_cnt < wsa_max_devs) {
7755 dev_dbg(&pdev->dev,
7756 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7757 __func__, wsa_max_devs, wsa_dev_cnt);
7758 wsa_max_devs = wsa_dev_cnt;
7759 }
7760
7761 /* Make sure prefix string passed for each WSA device */
7762 ret = of_property_count_strings(pdev->dev.of_node,
7763 "qcom,wsa-aux-dev-prefix");
7764 if (ret != wsa_dev_cnt) {
7765 dev_err(&pdev->dev,
7766 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7767 __func__, wsa_dev_cnt, ret);
7768 ret = -EINVAL;
7769 goto err;
7770 }
7771
7772 /*
7773 * Alloc mem to store phandle and index info of WSA device, if already
7774 * registered with ALSA core
7775 */
7776 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7777 sizeof(struct msm_wsa881x_dev_info),
7778 GFP_KERNEL);
7779 if (!wsa881x_dev_info) {
7780 ret = -ENOMEM;
7781 goto err;
7782 }
7783
7784 /*
7785 * search and check whether all WSA devices are already
7786 * registered with ALSA core or not. If found a node, store
7787 * the node and the index in a local array of struct for later
7788 * use.
7789 */
7790 for (i = 0; i < wsa_dev_cnt; i++) {
7791 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7792 "qcom,wsa-devs", i);
7793 if (unlikely(!wsa_of_node)) {
7794 /* we should not be here */
7795 dev_err(&pdev->dev,
7796 "%s: wsa dev node is not present\n",
7797 __func__);
7798 ret = -EINVAL;
7799 goto err;
7800 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +0530[diff] [blame^]7801 if (soc_find_component_locked(wsa_of_node, NULL)) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7802 /* WSA device registered with ALSA core */
7803 wsa881x_dev_info[found].of_node = wsa_of_node;
7804 wsa881x_dev_info[found].index = i;
7805 found++;
7806 if (found == wsa_max_devs)
7807 break;
7808 }
7809 }
7810
7811 if (found < wsa_max_devs) {
7812 dev_dbg(&pdev->dev,
7813 "%s: failed to find %d components. Found only %d\n",
7814 __func__, wsa_max_devs, found);
7815 return -EPROBE_DEFER;
7816 }
7817 dev_info(&pdev->dev,
7818 "%s: found %d wsa881x devices registered with ALSA core\n",
7819 __func__, found);
7820
7821codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7822 /* Get maximum aux codec device count for this platform */
7823 ret = of_property_read_u32(pdev->dev.of_node,
7824 "qcom,codec-max-aux-devs",
7825 &codec_max_aux_devs);
7826 if (ret) {
7827 dev_err(&pdev->dev,
7828 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7829 __func__, pdev->dev.of_node->full_name, ret);
7830 codec_max_aux_devs = 0;
7831 goto aux_dev_register;
7832 }
7833 if (codec_max_aux_devs == 0) {
7834 dev_dbg(&pdev->dev,
7835 "%s: Max aux codec devices is 0 for this target?\n",
7836 __func__);
7837 goto aux_dev_register;
7838 }
7839
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7840 /* Get count of aux codec device phandles for this platform */
7841 codec_aux_dev_cnt = of_count_phandle_with_args(
7842 pdev->dev.of_node,
7843 "qcom,codec-aux-devs", NULL);
7844 if (codec_aux_dev_cnt == -ENOENT) {
7845 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7846 __func__);
7847 goto err;
7848 } else if (codec_aux_dev_cnt <= 0) {
7849 dev_err(&pdev->dev,
7850 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7851 __func__, codec_aux_dev_cnt);
7852 ret = -EINVAL;
7853 goto err;
7854 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7855
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7856 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7857 * Expect total phandles count to be NOT less than maximum possible
7858 * AUX device count. However, if it is less, then assign same value to
7859 * max count as well.
7860 */
7861 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7862 dev_dbg(&pdev->dev,
7863 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7864 __func__, codec_max_aux_devs,
7865 codec_aux_dev_cnt);
7866 codec_max_aux_devs = codec_aux_dev_cnt;
7867 }
7868
7869 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7870 * Alloc mem to store phandle and index info of aux codec
7871 * if already registered with ALSA core
7872 */
7873 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7874 sizeof(struct aux_codec_dev_info),
7875 GFP_KERNEL);
7876 if (!aux_cdc_dev_info) {
7877 ret = -ENOMEM;
7878 goto err;
7879 }
7880
7881 /*
7882 * search and check whether all aux codecs are already
7883 * registered with ALSA core or not. If found a node, store
7884 * the node and the index in a local array of struct for later
7885 * use.
7886 */
7887 for (i = 0; i < codec_aux_dev_cnt; i++) {
7888 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
7889 "qcom,codec-aux-devs", i);
7890 if (unlikely(!aux_codec_of_node)) {
7891 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7892 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7893 "%s: aux codec dev node is not present\n",
7894 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7895 ret = -EINVAL;
7896 goto err;
7897 }
Aditya Bavanari4fcf3b42020-06-02 16:00:14 +0530[diff] [blame^]7898 if (soc_find_component_locked(aux_codec_of_node, NULL)) {
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7899 /* AUX codec registered with ALSA core */
7900 aux_cdc_dev_info[codecs_found].of_node =
7901 aux_codec_of_node;
7902 aux_cdc_dev_info[codecs_found].index = i;
7903 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7904 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7905 }
7906
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7907 if (codecs_found < codec_aux_dev_cnt) {
7908 dev_dbg(&pdev->dev,
7909 "%s: failed to find %d components. Found only %d\n",
7910 __func__, codec_aux_dev_cnt, codecs_found);
7911 return -EPROBE_DEFER;
7912 }
7913 dev_info(&pdev->dev,
7914 "%s: found %d AUX codecs registered with ALSA core\n",
7915 __func__, codecs_found);
7916
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7917aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7918 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
7919 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
7920
7921 /* Alloc array of AUX devs struct */
7922 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
7923 sizeof(struct snd_soc_aux_dev),
7924 GFP_KERNEL);
7925 if (!msm_aux_dev) {
7926 ret = -ENOMEM;
7927 goto err;
7928 }
7929
7930 /* Alloc array of codec conf struct */
7931 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
7932 sizeof(struct snd_soc_codec_conf),
7933 GFP_KERNEL);
7934 if (!msm_codec_conf) {
7935 ret = -ENOMEM;
7936 goto err;
7937 }
7938
7939 for (i = 0; i < wsa_max_devs; i++) {
7940 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
7941 GFP_KERNEL);
7942 if (!dev_name_str) {
7943 ret = -ENOMEM;
7944 goto err;
7945 }
7946
7947 ret = of_property_read_string_index(pdev->dev.of_node,
7948 "qcom,wsa-aux-dev-prefix",
7949 wsa881x_dev_info[i].index,
7950 auxdev_name_prefix);
7951 if (ret) {
7952 dev_err(&pdev->dev,
7953 "%s: failed to read wsa aux dev prefix, ret = %d\n",
7954 __func__, ret);
7955 ret = -EINVAL;
7956 goto err;
7957 }
7958
7959 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
7960 msm_aux_dev[i].name = dev_name_str;
7961 msm_aux_dev[i].codec_name = NULL;
7962 msm_aux_dev[i].codec_of_node =
7963 wsa881x_dev_info[i].of_node;
7964 msm_aux_dev[i].init = msm_wsa881x_init;
7965 msm_codec_conf[i].dev_name = NULL;
7966 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
7967 msm_codec_conf[i].of_node =
7968 wsa881x_dev_info[i].of_node;
7969 }
7970
7971 for (i = 0; i < codec_aux_dev_cnt; i++) {
7972 msm_aux_dev[wsa_max_devs + i].name = NULL;
7973 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
7974 msm_aux_dev[wsa_max_devs + i].codec_of_node =
7975 aux_cdc_dev_info[i].of_node;
7976 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
7977 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
7978 msm_codec_conf[wsa_max_devs + i].name_prefix =
7979 NULL;
7980 msm_codec_conf[wsa_max_devs + i].of_node =
7981 aux_cdc_dev_info[i].of_node;
7982 }
7983
7984 card->codec_conf = msm_codec_conf;
7985 card->aux_dev = msm_aux_dev;
7986err:
7987 return ret;
7988}
7989
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7990static void msm_i2s_auxpcm_init(struct platform_device *pdev)
7991{
7992 int count = 0;
7993 u32 mi2s_master_slave[MI2S_MAX];
7994 int ret = 0;
7995
7996 for (count = 0; count < MI2S_MAX; count++) {
7997 mutex_init(&mi2s_intf_conf[count].lock);
7998 mi2s_intf_conf[count].ref_cnt = 0;
7999 }
8000
8001 ret = of_property_read_u32_array(pdev->dev.of_node,
8002 "qcom,msm-mi2s-master",
8003 mi2s_master_slave, MI2S_MAX);
8004 if (ret) {
8005 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8006 __func__);
8007 } else {
8008 for (count = 0; count < MI2S_MAX; count++) {
8009 mi2s_intf_conf[count].msm_is_mi2s_master =
8010 mi2s_master_slave[count];
8011 }
8012 }
8013}
8014
8015static void msm_i2s_auxpcm_deinit(void)
8016{
8017 int count = 0;
8018
8019 for (count = 0; count < MI2S_MAX; count++) {
8020 mutex_destroy(&mi2s_intf_conf[count].lock);
8021 mi2s_intf_conf[count].ref_cnt = 0;
8022 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8023 }
8024}
8025
8026static int kona_ssr_enable(struct device *dev, void *data)
8027{
8028 struct platform_device *pdev = to_platform_device(dev);
8029 struct snd_soc_card *card = platform_get_drvdata(pdev);
8030 int ret = 0;
8031
8032 if (!card) {
8033 dev_err(dev, "%s: card is NULL\n", __func__);
8034 ret = -EINVAL;
8035 goto err;
8036 }
8037
8038 if (!strcmp(card->name, "kona-stub-snd-card")) {
8039 /* TODO */
8040 dev_dbg(dev, "%s: TODO \n", __func__);
8041 }
8042
8043 snd_soc_card_change_online_state(card, 1);
8044 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8045
8046err:
8047 return ret;
8048}
8049
8050static void kona_ssr_disable(struct device *dev, void *data)
8051{
8052 struct platform_device *pdev = to_platform_device(dev);
8053 struct snd_soc_card *card = platform_get_drvdata(pdev);
8054
8055 if (!card) {
8056 dev_err(dev, "%s: card is NULL\n", __func__);
8057 return;
8058 }
8059
8060 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8061 snd_soc_card_change_online_state(card, 0);
8062
8063 if (!strcmp(card->name, "kona-stub-snd-card")) {
8064 /* TODO */
8065 dev_dbg(dev, "%s: TODO \n", __func__);
8066 }
8067}
8068
8069static const struct snd_event_ops kona_ssr_ops = {
8070 .enable = kona_ssr_enable,
8071 .disable = kona_ssr_disable,
8072};
8073
8074static int msm_audio_ssr_compare(struct device *dev, void *data)
8075{
8076 struct device_node *node = data;
8077
8078 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8079 __func__, dev->of_node, node);
8080 return (dev->of_node && dev->of_node == node);
8081}
8082
8083static int msm_audio_ssr_register(struct device *dev)
8084{
8085 struct device_node *np = dev->of_node;
8086 struct snd_event_clients *ssr_clients = NULL;
8087 struct device_node *node = NULL;
8088 int ret = 0;
8089 int i = 0;
8090
8091 for (i = 0; ; i++) {
8092 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8093 if (!node)
8094 break;
8095 snd_event_mstr_add_client(&ssr_clients,
8096 msm_audio_ssr_compare, node);
8097 }
8098
8099 ret = snd_event_master_register(dev, &kona_ssr_ops,
8100 ssr_clients, NULL);
8101 if (!ret)
8102 snd_event_notify(dev, SND_EVENT_UP);
8103
8104 return ret;
8105}
8106
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8107static int msm_asoc_machine_probe(struct platform_device *pdev)
8108{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8109 struct snd_soc_card *card = NULL;
8110 struct msm_asoc_mach_data *pdata = NULL;
8111 const char *mbhc_audio_jack_type = NULL;
8112 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8113 uint index = 0;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]8114 struct clk *lpass_audio_hw_vote = NULL;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8115
8116 if (!pdev->dev.of_node) {
8117 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
8118 return -EINVAL;
8119 }
8120
8121 pdata = devm_kzalloc(&pdev->dev,
8122 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8123 if (!pdata)
8124 return -ENOMEM;
8125
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]8126 of_property_read_u32(pdev->dev.of_node,
8127 "qcom,lito-is-v2-enabled",
8128 &pdata->lito_v2_enabled);
8129
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8130 card = populate_snd_card_dailinks(&pdev->dev);
8131 if (!card) {
8132 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8133 ret = -EINVAL;
8134 goto err;
8135 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8136
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8137 card->dev = &pdev->dev;
8138 platform_set_drvdata(pdev, card);
8139 snd_soc_card_set_drvdata(card, pdata);
8140
8141 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8142 if (ret) {
8143 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
8144 __func__, ret);
8145 goto err;
8146 }
8147
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8148 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8149 if (ret) {
8150 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
8151 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8152 goto err;
8153 }
8154
8155 ret = msm_populate_dai_link_component_of_node(card);
8156 if (ret) {
8157 ret = -EPROBE_DEFER;
8158 goto err;
8159 }
8160
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]8161 ret = msm_init_aux_dev(pdev, card);
8162 if (ret)
8163 goto err;
8164
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8165 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8166 if (ret == -EPROBE_DEFER) {
8167 if (codec_reg_done)
8168 ret = -EINVAL;
8169 goto err;
8170 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8171 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
8172 __func__, ret);
8173 goto err;
8174 }
8175 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
8176 __func__, card->name);
8177
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8178 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8179 "qcom,hph-en1-gpio", 0);
8180 if (!pdata->hph_en1_gpio_p) {
8181 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8182 __func__, "qcom,hph-en1-gpio",
8183 pdev->dev.of_node->full_name);
8184 }
8185
8186 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8187 "qcom,hph-en0-gpio", 0);
8188 if (!pdata->hph_en0_gpio_p) {
8189 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8190 __func__, "qcom,hph-en0-gpio",
8191 pdev->dev.of_node->full_name);
8192 }
8193
8194 ret = of_property_read_string(pdev->dev.of_node,
8195 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8196 if (ret) {
8197 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
8198 __func__, "qcom,mbhc-audio-jack-type",
8199 pdev->dev.of_node->full_name);
8200 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8201 } else {
8202 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8203 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8204 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8205 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8206 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8207 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8208 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8209 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8210 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8211 } else {
8212 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8213 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8214 }
8215 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]8216 /*
8217 * Parse US-Euro gpio info from DT. Report no error if us-euro
8218 * entry is not found in DT file as some targets do not support
8219 * US-Euro detection
8220 */
8221 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8222 "qcom,us-euro-gpios", 0);
8223 if (!pdata->us_euro_gpio_p) {
8224 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8225 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8226 } else {
8227 dev_dbg(&pdev->dev, "%s detected\n",
8228 "qcom,us-euro-gpios");
8229 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8230 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8231
Meng Wanga60b4082019-02-25 17:02:23 +0800[diff] [blame]8232 if (wcd_mbhc_cfg.enable_usbc_analog)
8233 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8234
8235 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8236 "fsa4480-i2c-handle", 0);
8237 if (!pdata->fsa_handle)
8238 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8239 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
8240
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8241 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]8242 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8243 "qcom,cdc-dmic01-gpios",
8244 0);
8245 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8246 "qcom,cdc-dmic23-gpios",
8247 0);
8248 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
8249 "qcom,cdc-dmic45-gpios",
8250 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +0530[diff] [blame]8251 if (pdata->dmic01_gpio_p)
8252 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
8253 if (pdata->dmic23_gpio_p)
8254 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +0530[diff] [blame]8255 if (pdata->dmic45_gpio_p)
8256 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8257
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8258 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8259 "qcom,pri-mi2s-gpios", 0);
8260 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8261 "qcom,sec-mi2s-gpios", 0);
8262 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8263 "qcom,tert-mi2s-gpios", 0);
8264 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8265 "qcom,quat-mi2s-gpios", 0);
8266 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8267 "qcom,quin-mi2s-gpios", 0);
8268 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8269 "qcom,sen-mi2s-gpios", 0);
Meng Wang4f5815c2020-02-13 14:10:20 +0800[diff] [blame]8270 for (index = PRIM_MI2S; index < MI2S_MAX; index++) {
8271 if (pdata->mi2s_gpio_p[index])
8272 msm_cdc_pinctrl_set_wakeup_capable(pdata->mi2s_gpio_p[index], false);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8273 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
Meng Wang4f5815c2020-02-13 14:10:20 +0800[diff] [blame]8274 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8275
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]8276 /* Register LPASS audio hw vote */
8277 lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
8278 if (IS_ERR(lpass_audio_hw_vote)) {
8279 ret = PTR_ERR(lpass_audio_hw_vote);
8280 dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
8281 __func__, "lpass_audio_hw_vote", ret);
8282 lpass_audio_hw_vote = NULL;
8283 ret = 0;
8284 }
8285 pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
8286 pdata->core_audio_vote_count = 0;
8287
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8288 ret = msm_audio_ssr_register(&pdev->dev);
8289 if (ret)
8290 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8291 __func__, ret);
8292
8293 is_initial_boot = true;
8294
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8295 return 0;
8296err:
8297 devm_kfree(&pdev->dev, pdata);
8298 return ret;
8299}
8300
8301static int msm_asoc_machine_remove(struct platform_device *pdev)
8302{
8303 struct snd_soc_card *card = platform_get_drvdata(pdev);
8304
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8305 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8306 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8307 msm_i2s_auxpcm_deinit();
8308
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8309 return 0;
8310}
8311
8312static struct platform_driver kona_asoc_machine_driver = {
8313 .driver = {
8314 .name = DRV_NAME,
8315 .owner = THIS_MODULE,
8316 .pm = &snd_soc_pm_ops,
8317 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800[diff] [blame]8318 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8319 },
8320 .probe = msm_asoc_machine_probe,
8321 .remove = msm_asoc_machine_remove,
8322};
8323module_platform_driver(kona_asoc_machine_driver);
8324
8325MODULE_DESCRIPTION("ALSA SoC msm");
8326MODULE_LICENSE("GPL v2");
8327MODULE_ALIAS("platform:" DRV_NAME);
8328MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);