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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / f61a23138f9198906c2e7311a2a9580d6c2f53aa / . / asoc / kona.c
blob: 80ddda41e2d77f675d199dd7ece524f7217719a1 [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2/*
Xiao Lid8bb93c2020-01-07 12:59:05 +0800[diff] [blame]3 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]16#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]23#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]24#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]25#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]32#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]33#include "codecs/wsa881x.h"
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]34#include "codecs/wsa883x/wsa883x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]35#include "codecs/wcd938x/wcd938x.h"
Kunlei Zhangf61a2312020-02-11 15:37:03 +0800[diff] [blame^]36#include "codecs/wcd937x/wcd937x-mbhc.h"
37#include "codecs/wcd937x/wcd937x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]38#include "codecs/bolero/bolero-cdc.h"
39#include <dt-bindings/sound/audio-codec-port-types.h>
40#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]41#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]42
43#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]44#define __CHIPSET__ "KONA "
45#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
46
47#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]48#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]49#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]50#define SAMPLING_RATE_22P05KHZ 22050
51#define SAMPLING_RATE_32KHZ 32000
52#define SAMPLING_RATE_44P1KHZ 44100
53#define SAMPLING_RATE_48KHZ 48000
54#define SAMPLING_RATE_88P2KHZ 88200
55#define SAMPLING_RATE_96KHZ 96000
56#define SAMPLING_RATE_176P4KHZ 176400
57#define SAMPLING_RATE_192KHZ 192000
58#define SAMPLING_RATE_352P8KHZ 352800
59#define SAMPLING_RATE_384KHZ 384000
60
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]61#define IS_FRACTIONAL(x) \
62((x == SAMPLING_RATE_11P025KHZ) || (x == SAMPLING_RATE_22P05KHZ) || \
63(x == SAMPLING_RATE_44P1KHZ) || (x == SAMPLING_RATE_88P2KHZ) || \
64(x == SAMPLING_RATE_176P4KHZ) || (x == SAMPLING_RATE_352P8KHZ))
65
66#define IS_MSM_INTERFACE_MI2S(x) \
67((x == PRIM_MI2S) || (x == SEC_MI2S) || (x == TERT_MI2S))
68
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]69#define WCD9XXX_MBHC_DEF_RLOADS 5
70#define WCD9XXX_MBHC_DEF_BUTTONS 8
71#define CODEC_EXT_CLK_RATE 9600000
72#define ADSP_STATE_READY_TIMEOUT_MS 3000
73#define DEV_NAME_STR_LEN 32
74#define WCD_MBHC_HS_V_MAX 1600
75
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]76#define TDM_CHANNEL_MAX 8
77#define DEV_NAME_STR_LEN 32
78
79#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
80
81#define ADSP_STATE_READY_TIMEOUT_MS 3000
82
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]83#define WSA8810_NAME_1 "wsa881x.20170211"
84#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]85#define WCN_CDC_SLIM_RX_CH_MAX 2
86#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]87#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]88
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]89enum {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]90 RX_PATH = 0,
91 TX_PATH,
92 MAX_PATH,
93};
94
95enum {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]96 TDM_0 = 0,
97 TDM_1,
98 TDM_2,
99 TDM_3,
100 TDM_4,
101 TDM_5,
102 TDM_6,
103 TDM_7,
104 TDM_PORT_MAX,
105};
106
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]107#define TDM_MAX_SLOTS 8
108#define TDM_SLOT_WIDTH_BITS 32
109
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]110enum {
111 TDM_PRI = 0,
112 TDM_SEC,
113 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]114 TDM_QUAT,
115 TDM_QUIN,
116 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]117 TDM_INTERFACE_MAX,
118};
119
120enum {
121 PRIM_AUX_PCM = 0,
122 SEC_AUX_PCM,
123 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]124 QUAT_AUX_PCM,
125 QUIN_AUX_PCM,
126 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]127 AUX_PCM_MAX,
128};
129
130enum {
131 PRIM_MI2S = 0,
132 SEC_MI2S,
133 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]134 QUAT_MI2S,
135 QUIN_MI2S,
136 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]137 MI2S_MAX,
138};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]139
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]140enum {
141 WSA_CDC_DMA_RX_0 = 0,
142 WSA_CDC_DMA_RX_1,
143 RX_CDC_DMA_RX_0,
144 RX_CDC_DMA_RX_1,
145 RX_CDC_DMA_RX_2,
146 RX_CDC_DMA_RX_3,
147 RX_CDC_DMA_RX_5,
148 CDC_DMA_RX_MAX,
149};
150
151enum {
152 WSA_CDC_DMA_TX_0 = 0,
153 WSA_CDC_DMA_TX_1,
154 WSA_CDC_DMA_TX_2,
155 TX_CDC_DMA_TX_0,
156 TX_CDC_DMA_TX_3,
157 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]158 VA_CDC_DMA_TX_0,
159 VA_CDC_DMA_TX_1,
160 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]161 CDC_DMA_TX_MAX,
162};
163
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]164enum {
165 SLIM_RX_7 = 0,
166 SLIM_RX_MAX,
167};
168enum {
169 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]170 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]171 SLIM_TX_MAX,
172};
173
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]174enum {
175 AFE_LOOPBACK_TX_IDX = 0,
176 AFE_LOOPBACK_TX_IDX_MAX,
177};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]178struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]179 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]180 int usbc_en2_gpio; /* used by gpio driver API */
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]181 int lito_v2_enabled;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]182 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
183 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
184 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]185 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
186 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]187 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
188 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
189 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
190 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
191 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]192 struct device_node *fsa_handle;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]193 struct clk *lpass_audio_hw_vote;
194 int core_audio_vote_count;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]195};
196
197struct tdm_port {
198 u32 mode;
199 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]200};
201
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]202struct tdm_dev_config {
203 unsigned int tdm_slot_offset[TDM_MAX_SLOTS];
204};
205
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]206enum {
207 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]208 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]209 EXT_DISP_RX_IDX_MAX,
210};
211
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]212struct msm_wsa881x_dev_info {
213 struct device_node *of_node;
214 u32 index;
215};
216
217struct aux_codec_dev_info {
218 struct device_node *of_node;
219 u32 index;
220};
221
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]222struct dev_config {
223 u32 sample_rate;
224 u32 bit_format;
225 u32 channels;
226};
227
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]228/* Default configuration of slimbus channels */
229static struct dev_config slim_rx_cfg[] = {
230 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
231};
232
233static struct dev_config slim_tx_cfg[] = {
234 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]235 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]236};
237
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]238/* Default configuration of external display BE */
239static struct dev_config ext_disp_rx_cfg[] = {
240 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]241 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]242};
243
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]244static struct dev_config usb_rx_cfg = {
245 .sample_rate = SAMPLING_RATE_48KHZ,
246 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
247 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]248};
249
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]250static struct dev_config usb_tx_cfg = {
251 .sample_rate = SAMPLING_RATE_48KHZ,
252 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
253 .channels = 1,
254};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]255
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]256static struct dev_config proxy_rx_cfg = {
257 .sample_rate = SAMPLING_RATE_48KHZ,
258 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
259 .channels = 2,
260};
261
262static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
263 {
264 AFE_API_VERSION_I2S_CONFIG,
265 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
266 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
267 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
268 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
269 0,
270 },
271 {
272 AFE_API_VERSION_I2S_CONFIG,
273 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
274 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
275 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
276 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
277 0,
278 },
279 {
280 AFE_API_VERSION_I2S_CONFIG,
281 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
282 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
283 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
284 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
285 0,
286 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]287 {
288 AFE_API_VERSION_I2S_CONFIG,
289 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
290 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
291 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
292 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
293 0,
294 },
295 {
296 AFE_API_VERSION_I2S_CONFIG,
297 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
298 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
299 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
300 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
301 0,
302 },
303 {
304 AFE_API_VERSION_I2S_CONFIG,
305 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
306 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
307 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
308 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
309 0,
310 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]311};
312
313struct mi2s_conf {
314 struct mutex lock;
315 u32 ref_cnt;
316 u32 msm_is_mi2s_master;
317};
318
319static u32 mi2s_ebit_clk[MI2S_MAX] = {
320 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
321 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
322 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
323};
324
325static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
326
327/* Default configuration of TDM channels */
328static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
329 { /* PRI TDM */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
338 },
339 { /* SEC TDM */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
348 },
349 { /* TERT TDM */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
356 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
358 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]359 { /* QUAT TDM */
360 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
361 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
362 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
363 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
365 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
366 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
368 },
369 { /* QUIN TDM */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
372 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
373 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
375 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
376 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
377 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
378 },
379 { /* SEN TDM */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
382 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
383 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
386 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
387 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
388 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]389};
390
391static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
392 { /* PRI TDM */
393 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
398 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
399 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
400 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
401 },
402 { /* SEC TDM */
403 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
409 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
411 },
412 { /* TERT TDM */
413 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
419 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
421 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]422 { /* QUAT TDM */
423 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
424 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
425 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
426 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
427 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
428 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
429 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
430 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
431 },
432 { /* QUIN TDM */
433 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
434 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
435 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
436 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
437 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
438 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
439 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
440 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
441 },
442 { /* SEN TDM */
443 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
444 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
445 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
446 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
447 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
448 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
449 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
450 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
451 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]452};
453
454/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]455static struct dev_config aux_pcm_rx_cfg[] = {
456 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]457 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
458 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]459 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
460 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
461 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]462};
463
464static struct dev_config aux_pcm_tx_cfg[] = {
465 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]466 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
467 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]468 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
469 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
470 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]471};
472
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]473/* Default configuration of MI2S channels */
474static struct dev_config mi2s_rx_cfg[] = {
475 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
476 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
477 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]478 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
479 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
480 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]481};
482
483static struct dev_config mi2s_tx_cfg[] = {
484 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
485 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
486 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]487 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
488 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
489 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]490};
491
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]492static struct tdm_dev_config pri_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
493 { /* PRI TDM */
494 { {0, 4, 0xFFFF} }, /* RX_0 */
495 { {8, 12, 0xFFFF} }, /* RX_1 */
496 { {16, 20, 0xFFFF} }, /* RX_2 */
497 { {24, 28, 0xFFFF} }, /* RX_3 */
498 { {0xFFFF} }, /* RX_4 */
499 { {0xFFFF} }, /* RX_5 */
500 { {0xFFFF} }, /* RX_6 */
501 { {0xFFFF} }, /* RX_7 */
502 },
503 {
504 { {0, 4, 8, 12, 0xFFFF} }, /* TX_0 */
505 { {8, 12, 0xFFFF} }, /* TX_1 */
506 { {16, 20, 0xFFFF} }, /* TX_2 */
507 { {24, 28, 0xFFFF} }, /* TX_3 */
508 { {0xFFFF} }, /* TX_4 */
509 { {0xFFFF} }, /* TX_5 */
510 { {0xFFFF} }, /* TX_6 */
511 { {0xFFFF} }, /* TX_7 */
512 },
513};
514
515static struct tdm_dev_config sec_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
516 { /* SEC TDM */
517 { {0, 4, 0xFFFF} }, /* RX_0 */
518 { {8, 12, 0xFFFF} }, /* RX_1 */
519 { {16, 20, 0xFFFF} }, /* RX_2 */
520 { {24, 28, 0xFFFF} }, /* RX_3 */
521 { {0xFFFF} }, /* RX_4 */
522 { {0xFFFF} }, /* RX_5 */
523 { {0xFFFF} }, /* RX_6 */
524 { {0xFFFF} }, /* RX_7 */
525 },
526 {
527 { {0, 4, 0xFFFF} }, /* TX_0 */
528 { {8, 12, 0xFFFF} }, /* TX_1 */
529 { {16, 20, 0xFFFF} }, /* TX_2 */
530 { {24, 28, 0xFFFF} }, /* TX_3 */
531 { {0xFFFF} }, /* TX_4 */
532 { {0xFFFF} }, /* TX_5 */
533 { {0xFFFF} }, /* TX_6 */
534 { {0xFFFF} }, /* TX_7 */
535 },
536};
537
538static struct tdm_dev_config tert_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
539 { /* TERT TDM */
540 { {0, 4, 0xFFFF} }, /* RX_0 */
541 { {8, 12, 0xFFFF} }, /* RX_1 */
542 { {16, 20, 0xFFFF} }, /* RX_2 */
543 { {24, 28, 0xFFFF} }, /* RX_3 */
544 { {0xFFFF} }, /* RX_4 */
545 { {0xFFFF} }, /* RX_5 */
546 { {0xFFFF} }, /* RX_6 */
547 { {0xFFFF} }, /* RX_7 */
548 },
549 {
550 { {0, 4, 0xFFFF} }, /* TX_0 */
551 { {8, 12, 0xFFFF} }, /* TX_1 */
552 { {16, 20, 0xFFFF} }, /* TX_2 */
553 { {24, 28, 0xFFFF} }, /* TX_3 */
554 { {0xFFFF} }, /* TX_4 */
555 { {0xFFFF} }, /* TX_5 */
556 { {0xFFFF} }, /* TX_6 */
557 { {0xFFFF} }, /* TX_7 */
558 },
559};
560
561static struct tdm_dev_config quat_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
562 { /* QUAT TDM */
563 { {0, 4, 0xFFFF} }, /* RX_0 */
564 { {8, 12, 0xFFFF} }, /* RX_1 */
565 { {16, 20, 0xFFFF} }, /* RX_2 */
566 { {24, 28, 0xFFFF} }, /* RX_3 */
567 { {0xFFFF} }, /* RX_4 */
568 { {0xFFFF} }, /* RX_5 */
569 { {0xFFFF} }, /* RX_6 */
570 { {0xFFFF} }, /* RX_7 */
571 },
572 {
573 { {0, 4, 0xFFFF} }, /* TX_0 */
574 { {8, 12, 0xFFFF} }, /* TX_1 */
575 { {16, 20, 0xFFFF} }, /* TX_2 */
576 { {24, 28, 0xFFFF} }, /* TX_3 */
577 { {0xFFFF} }, /* TX_4 */
578 { {0xFFFF} }, /* TX_5 */
579 { {0xFFFF} }, /* TX_6 */
580 { {0xFFFF} }, /* TX_7 */
581 },
582};
583
584static struct tdm_dev_config quin_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
585 { /* QUIN TDM */
586 { {0, 4, 0xFFFF} }, /* RX_0 */
587 { {8, 12, 0xFFFF} }, /* RX_1 */
588 { {16, 20, 0xFFFF} }, /* RX_2 */
589 { {24, 28, 0xFFFF} }, /* RX_3 */
590 { {0xFFFF} }, /* RX_4 */
591 { {0xFFFF} }, /* RX_5 */
592 { {0xFFFF} }, /* RX_6 */
593 { {0xFFFF} }, /* RX_7 */
594 },
595 {
596 { {0, 4, 0xFFFF} }, /* TX_0 */
597 { {8, 12, 0xFFFF} }, /* TX_1 */
598 { {16, 20, 0xFFFF} }, /* TX_2 */
599 { {24, 28, 0xFFFF} }, /* TX_3 */
600 { {0xFFFF} }, /* TX_4 */
601 { {0xFFFF} }, /* TX_5 */
602 { {0xFFFF} }, /* TX_6 */
603 { {0xFFFF} }, /* TX_7 */
604 },
605};
606
607static struct tdm_dev_config sen_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
608 { /* SEN TDM */
609 { {0, 4, 0xFFFF} }, /* RX_0 */
610 { {8, 12, 0xFFFF} }, /* RX_1 */
611 { {16, 20, 0xFFFF} }, /* RX_2 */
612 { {24, 28, 0xFFFF} }, /* RX_3 */
613 { {0xFFFF} }, /* RX_4 */
614 { {0xFFFF} }, /* RX_5 */
615 { {0xFFFF} }, /* RX_6 */
616 { {0xFFFF} }, /* RX_7 */
617 },
618 {
619 { {0, 4, 0xFFFF} }, /* TX_0 */
620 { {8, 12, 0xFFFF} }, /* TX_1 */
621 { {16, 20, 0xFFFF} }, /* TX_2 */
622 { {24, 28, 0xFFFF} }, /* TX_3 */
623 { {0xFFFF} }, /* TX_4 */
624 { {0xFFFF} }, /* TX_5 */
625 { {0xFFFF} }, /* TX_6 */
626 { {0xFFFF} }, /* TX_7 */
627 },
628};
629
630static void *tdm_cfg[TDM_INTERFACE_MAX] = {
631 pri_tdm_dev_config,
632 sec_tdm_dev_config,
633 tert_tdm_dev_config,
634 quat_tdm_dev_config,
635 quin_tdm_dev_config,
636 sen_tdm_dev_config,
637};
638
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]639/* Default configuration of Codec DMA Interface RX */
640static struct dev_config cdc_dma_rx_cfg[] = {
641 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
642 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
643 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
644 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
645 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
646 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
647 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
648};
649
650/* Default configuration of Codec DMA Interface TX */
651static struct dev_config cdc_dma_tx_cfg[] = {
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +0530[diff] [blame]652 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]653 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
654 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
655 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
656 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
657 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]658 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
659 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
660 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]661};
662
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]663static struct dev_config afe_loopback_tx_cfg[] = {
664 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
665};
666
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]667static int msm_vi_feed_tx_ch = 2;
668static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]669static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
670 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]671static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]672static char const *ch_text[] = {"Two", "Three", "Four", "Five",
673 "Six", "Seven", "Eight"};
674static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
675 "KHZ_16", "KHZ_22P05",
676 "KHZ_32", "KHZ_44P1", "KHZ_48",
677 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
678 "KHZ_192", "KHZ_352P8", "KHZ_384"};
679static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
680 "Five", "Six", "Seven",
681 "Eight"};
682static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
683 "KHZ_48", "KHZ_176P4",
684 "KHZ_352P8"};
685static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
686static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
687 "Five", "Six", "Seven", "Eight"};
688static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
689static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
690 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]691 "KHZ_48", "KHZ_88P2", "KHZ_96",
692 "KHZ_176P4", "KHZ_192","KHZ_352P8",
693 "KHZ_384"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]694static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
695 "Five", "Six", "Seven",
696 "Eight"};
697
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]698static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
699static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
700 "Five", "Six", "Seven",
701 "Eight"};
702static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
703 "KHZ_16", "KHZ_22P05",
704 "KHZ_32", "KHZ_44P1", "KHZ_48",
705 "KHZ_88P2", "KHZ_96",
706 "KHZ_176P4", "KHZ_192",
707 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]708static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
709 "KHZ_16", "KHZ_22P05",
710 "KHZ_32", "KHZ_44P1", "KHZ_48",
711 "KHZ_88P2", "KHZ_96",
712 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]713static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
714 "S24_3LE"};
715static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
716 "KHZ_192", "KHZ_32", "KHZ_44P1",
717 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]718static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
719 "KHZ_44P1", "KHZ_48",
720 "KHZ_88P2", "KHZ_96"};
721static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
722 "KHZ_44P1", "KHZ_48",
723 "KHZ_88P2", "KHZ_96"};
724static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
725 "KHZ_44P1", "KHZ_48",
726 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]727static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]728
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]729static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
730static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
731static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
732static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
733static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
734static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]735static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]736static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
737static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
738static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
739static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
740static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
741static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
742static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]743static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]744static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
745static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]746static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
747static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
748static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]749static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]750static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
751static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]752static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
753static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
754static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]755static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
756static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]757static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
758static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
759static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]760static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
761static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
762static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]763static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
764static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
765static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]766static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
767static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
768static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]769static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
770static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
771static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
772static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
773static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]774static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
775static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
776static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]777static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
778static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
779static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]780static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
781static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
782static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]783static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
784static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
785static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
786static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
787static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
788static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
789static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
790static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
791static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
792static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
793static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
794static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
795static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]796static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
797static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
798static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]799static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
800static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]801static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
802static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
803static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
804static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
805static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]806static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
807static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
808static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]809static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
810 cdc_dma_sample_rate_text);
811static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
812 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]813static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
814 cdc_dma_sample_rate_text);
815static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
816 cdc_dma_sample_rate_text);
817static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
818 cdc_dma_sample_rate_text);
819static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
820 cdc_dma_sample_rate_text);
821static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
822 cdc_dma_sample_rate_text);
823static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
824 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]825static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
826 cdc_dma_sample_rate_text);
827static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
828 cdc_dma_sample_rate_text);
829static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
830 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]831
832/* WCD9380 */
833static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
834static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
835static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
836static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
837static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
838static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
839 cdc80_dma_sample_rate_text);
840static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
841 cdc80_dma_sample_rate_text);
842static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
843 cdc80_dma_sample_rate_text);
844static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
845 cdc80_dma_sample_rate_text);
846static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
847 cdc80_dma_sample_rate_text);
848/* WCD9385 */
849static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
850static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
851static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
852static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
853static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
854static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
855 cdc_dma_sample_rate_text);
856static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
857 cdc_dma_sample_rate_text);
858static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
859 cdc_dma_sample_rate_text);
860static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
861 cdc_dma_sample_rate_text);
862static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
863 cdc_dma_sample_rate_text);
864
Kunlei Zhangf61a2312020-02-11 15:37:03 +0800[diff] [blame^]865/* WCD937x */
866static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
867static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
868static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
869static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
870static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
871static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
872 cdc_dma_sample_rate_text);
873static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
874 cdc_dma_sample_rate_text);
875static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
876 cdc_dma_sample_rate_text);
877static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
878 cdc_dma_sample_rate_text);
879static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
880 cdc_dma_sample_rate_text);
881
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]882static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
883static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
884static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
885 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]886static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
887static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
888static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]889static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]890
891static bool is_initial_boot;
892static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]893static struct snd_soc_aux_dev *msm_aux_dev;
894static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]895static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]896static int dmic_0_1_gpio_cnt;
897static int dmic_2_3_gpio_cnt;
898static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]899
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]900static void *def_wcd_mbhc_cal(void);
901
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]902/*
903 * Need to report LINEIN
904 * if R/L channel impedance is larger than 5K ohm
905 */
906static struct wcd_mbhc_config wcd_mbhc_cfg = {
907 .read_fw_bin = false,
908 .calibration = NULL,
909 .detect_extn_cable = true,
910 .mono_stero_detection = false,
911 .swap_gnd_mic = NULL,
912 .hs_ext_micbias = true,
913 .key_code[0] = KEY_MEDIA,
914 .key_code[1] = KEY_VOICECOMMAND,
915 .key_code[2] = KEY_VOLUMEUP,
916 .key_code[3] = KEY_VOLUMEDOWN,
917 .key_code[4] = 0,
918 .key_code[5] = 0,
919 .key_code[6] = 0,
920 .key_code[7] = 0,
921 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]922 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]923 .mbhc_micbias = MIC_BIAS_2,
924 .anc_micbias = MIC_BIAS_2,
925 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]926 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]927};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]928
929static inline int param_is_mask(int p)
930{
931 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
932 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
933}
934
935static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
936 int n)
937{
938 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
939}
940
941static void param_set_mask(struct snd_pcm_hw_params *p, int n,
942 unsigned int bit)
943{
944 if (bit >= SNDRV_MASK_MAX)
945 return;
946 if (param_is_mask(n)) {
947 struct snd_mask *m = param_to_mask(p, n);
948
949 m->bits[0] = 0;
950 m->bits[1] = 0;
951 m->bits[bit >> 5] |= (1 << (bit & 31));
952 }
953}
954
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]955static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
956 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]957{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]958 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]959
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]960 switch (usb_rx_cfg.sample_rate) {
961 case SAMPLING_RATE_384KHZ:
962 sample_rate_val = 12;
963 break;
964 case SAMPLING_RATE_352P8KHZ:
965 sample_rate_val = 11;
966 break;
967 case SAMPLING_RATE_192KHZ:
968 sample_rate_val = 10;
969 break;
970 case SAMPLING_RATE_176P4KHZ:
971 sample_rate_val = 9;
972 break;
973 case SAMPLING_RATE_96KHZ:
974 sample_rate_val = 8;
975 break;
976 case SAMPLING_RATE_88P2KHZ:
977 sample_rate_val = 7;
978 break;
979 case SAMPLING_RATE_48KHZ:
980 sample_rate_val = 6;
981 break;
982 case SAMPLING_RATE_44P1KHZ:
983 sample_rate_val = 5;
984 break;
985 case SAMPLING_RATE_32KHZ:
986 sample_rate_val = 4;
987 break;
988 case SAMPLING_RATE_22P05KHZ:
989 sample_rate_val = 3;
990 break;
991 case SAMPLING_RATE_16KHZ:
992 sample_rate_val = 2;
993 break;
994 case SAMPLING_RATE_11P025KHZ:
995 sample_rate_val = 1;
996 break;
997 case SAMPLING_RATE_8KHZ:
998 default:
999 sample_rate_val = 0;
1000 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1001 }
1002
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1003 ucontrol->value.integer.value[0] = sample_rate_val;
1004 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1005 usb_rx_cfg.sample_rate);
1006 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1007}
1008
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1009static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1010 struct snd_ctl_elem_value *ucontrol)
1011{
1012 switch (ucontrol->value.integer.value[0]) {
1013 case 12:
1014 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1015 break;
1016 case 11:
1017 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1018 break;
1019 case 10:
1020 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1021 break;
1022 case 9:
1023 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1024 break;
1025 case 8:
1026 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1027 break;
1028 case 7:
1029 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1030 break;
1031 case 6:
1032 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1033 break;
1034 case 5:
1035 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1036 break;
1037 case 4:
1038 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1039 break;
1040 case 3:
1041 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1042 break;
1043 case 2:
1044 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1045 break;
1046 case 1:
1047 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1048 break;
1049 case 0:
1050 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1051 break;
1052 default:
1053 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1054 break;
1055 }
1056
1057 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1058 __func__, ucontrol->value.integer.value[0],
1059 usb_rx_cfg.sample_rate);
1060 return 0;
1061}
1062
1063static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1064 struct snd_ctl_elem_value *ucontrol)
1065{
1066 int sample_rate_val = 0;
1067
1068 switch (usb_tx_cfg.sample_rate) {
1069 case SAMPLING_RATE_384KHZ:
1070 sample_rate_val = 12;
1071 break;
1072 case SAMPLING_RATE_352P8KHZ:
1073 sample_rate_val = 11;
1074 break;
1075 case SAMPLING_RATE_192KHZ:
1076 sample_rate_val = 10;
1077 break;
1078 case SAMPLING_RATE_176P4KHZ:
1079 sample_rate_val = 9;
1080 break;
1081 case SAMPLING_RATE_96KHZ:
1082 sample_rate_val = 8;
1083 break;
1084 case SAMPLING_RATE_88P2KHZ:
1085 sample_rate_val = 7;
1086 break;
1087 case SAMPLING_RATE_48KHZ:
1088 sample_rate_val = 6;
1089 break;
1090 case SAMPLING_RATE_44P1KHZ:
1091 sample_rate_val = 5;
1092 break;
1093 case SAMPLING_RATE_32KHZ:
1094 sample_rate_val = 4;
1095 break;
1096 case SAMPLING_RATE_22P05KHZ:
1097 sample_rate_val = 3;
1098 break;
1099 case SAMPLING_RATE_16KHZ:
1100 sample_rate_val = 2;
1101 break;
1102 case SAMPLING_RATE_11P025KHZ:
1103 sample_rate_val = 1;
1104 break;
1105 case SAMPLING_RATE_8KHZ:
1106 sample_rate_val = 0;
1107 break;
1108 default:
1109 sample_rate_val = 6;
1110 break;
1111 }
1112
1113 ucontrol->value.integer.value[0] = sample_rate_val;
1114 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1115 usb_tx_cfg.sample_rate);
1116 return 0;
1117}
1118
1119static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1120 struct snd_ctl_elem_value *ucontrol)
1121{
1122 switch (ucontrol->value.integer.value[0]) {
1123 case 12:
1124 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1125 break;
1126 case 11:
1127 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1128 break;
1129 case 10:
1130 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1131 break;
1132 case 9:
1133 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1134 break;
1135 case 8:
1136 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1137 break;
1138 case 7:
1139 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1140 break;
1141 case 6:
1142 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1143 break;
1144 case 5:
1145 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1146 break;
1147 case 4:
1148 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1149 break;
1150 case 3:
1151 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1152 break;
1153 case 2:
1154 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1155 break;
1156 case 1:
1157 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1158 break;
1159 case 0:
1160 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1161 break;
1162 default:
1163 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1164 break;
1165 }
1166
1167 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1168 __func__, ucontrol->value.integer.value[0],
1169 usb_tx_cfg.sample_rate);
1170 return 0;
1171}
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]1172static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
1173 struct snd_ctl_elem_value *ucontrol)
1174{
1175 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1176 afe_loopback_tx_cfg[0].channels);
1177 ucontrol->value.enumerated.item[0] =
1178 afe_loopback_tx_cfg[0].channels - 1;
1179
1180 return 0;
1181}
1182
1183static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
1184 struct snd_ctl_elem_value *ucontrol)
1185{
1186 afe_loopback_tx_cfg[0].channels =
1187 ucontrol->value.enumerated.item[0] + 1;
1188 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1189 afe_loopback_tx_cfg[0].channels);
1190
1191 return 1;
1192}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1193
1194static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1195 struct snd_ctl_elem_value *ucontrol)
1196{
1197 switch (usb_rx_cfg.bit_format) {
1198 case SNDRV_PCM_FORMAT_S32_LE:
1199 ucontrol->value.integer.value[0] = 3;
1200 break;
1201 case SNDRV_PCM_FORMAT_S24_3LE:
1202 ucontrol->value.integer.value[0] = 2;
1203 break;
1204 case SNDRV_PCM_FORMAT_S24_LE:
1205 ucontrol->value.integer.value[0] = 1;
1206 break;
1207 case SNDRV_PCM_FORMAT_S16_LE:
1208 default:
1209 ucontrol->value.integer.value[0] = 0;
1210 break;
1211 }
1212
1213 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1214 __func__, usb_rx_cfg.bit_format,
1215 ucontrol->value.integer.value[0]);
1216 return 0;
1217}
1218
1219static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1220 struct snd_ctl_elem_value *ucontrol)
1221{
1222 int rc = 0;
1223
1224 switch (ucontrol->value.integer.value[0]) {
1225 case 3:
1226 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1227 break;
1228 case 2:
1229 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1230 break;
1231 case 1:
1232 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1233 break;
1234 case 0:
1235 default:
1236 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1237 break;
1238 }
1239 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1240 __func__, usb_rx_cfg.bit_format,
1241 ucontrol->value.integer.value[0]);
1242
1243 return rc;
1244}
1245
1246static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1247 struct snd_ctl_elem_value *ucontrol)
1248{
1249 switch (usb_tx_cfg.bit_format) {
1250 case SNDRV_PCM_FORMAT_S32_LE:
1251 ucontrol->value.integer.value[0] = 3;
1252 break;
1253 case SNDRV_PCM_FORMAT_S24_3LE:
1254 ucontrol->value.integer.value[0] = 2;
1255 break;
1256 case SNDRV_PCM_FORMAT_S24_LE:
1257 ucontrol->value.integer.value[0] = 1;
1258 break;
1259 case SNDRV_PCM_FORMAT_S16_LE:
1260 default:
1261 ucontrol->value.integer.value[0] = 0;
1262 break;
1263 }
1264
1265 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1266 __func__, usb_tx_cfg.bit_format,
1267 ucontrol->value.integer.value[0]);
1268 return 0;
1269}
1270
1271static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1272 struct snd_ctl_elem_value *ucontrol)
1273{
1274 int rc = 0;
1275
1276 switch (ucontrol->value.integer.value[0]) {
1277 case 3:
1278 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1279 break;
1280 case 2:
1281 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1282 break;
1283 case 1:
1284 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1285 break;
1286 case 0:
1287 default:
1288 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1289 break;
1290 }
1291 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1292 __func__, usb_tx_cfg.bit_format,
1293 ucontrol->value.integer.value[0]);
1294
1295 return rc;
1296}
1297
1298static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1299 struct snd_ctl_elem_value *ucontrol)
1300{
1301 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1302 usb_rx_cfg.channels);
1303 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1304 return 0;
1305}
1306
1307static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1308 struct snd_ctl_elem_value *ucontrol)
1309{
1310 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1311
1312 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1313 return 1;
1314}
1315
1316static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1317 struct snd_ctl_elem_value *ucontrol)
1318{
1319 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1320 usb_tx_cfg.channels);
1321 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1322 return 0;
1323}
1324
1325static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1326 struct snd_ctl_elem_value *ucontrol)
1327{
1328 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1329
1330 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1331 return 1;
1332}
1333
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]1334static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1335 struct snd_ctl_elem_value *ucontrol)
1336{
1337 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1338 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1339 ucontrol->value.integer.value[0]);
1340 return 0;
1341}
1342
1343static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1344 struct snd_ctl_elem_value *ucontrol)
1345{
1346 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1347 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1348 return 1;
1349}
1350
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1351static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1352{
1353 int idx = 0;
1354
1355 if (strnstr(kcontrol->id.name, "Display Port RX",
1356 sizeof("Display Port RX"))) {
1357 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]1358 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1359 sizeof("Display Port1 RX"))) {
1360 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1361 } else {
1362 pr_err("%s: unsupported BE: %s\n",
1363 __func__, kcontrol->id.name);
1364 idx = -EINVAL;
1365 }
1366
1367 return idx;
1368}
1369
1370static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1371 struct snd_ctl_elem_value *ucontrol)
1372{
1373 int idx = ext_disp_get_port_idx(kcontrol);
1374
1375 if (idx < 0)
1376 return idx;
1377
1378 switch (ext_disp_rx_cfg[idx].bit_format) {
1379 case SNDRV_PCM_FORMAT_S24_3LE:
1380 ucontrol->value.integer.value[0] = 2;
1381 break;
1382 case SNDRV_PCM_FORMAT_S24_LE:
1383 ucontrol->value.integer.value[0] = 1;
1384 break;
1385 case SNDRV_PCM_FORMAT_S16_LE:
1386 default:
1387 ucontrol->value.integer.value[0] = 0;
1388 break;
1389 }
1390
1391 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1392 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1393 ucontrol->value.integer.value[0]);
1394 return 0;
1395}
1396
1397static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1398 struct snd_ctl_elem_value *ucontrol)
1399{
1400 int idx = ext_disp_get_port_idx(kcontrol);
1401
1402 if (idx < 0)
1403 return idx;
1404
1405 switch (ucontrol->value.integer.value[0]) {
1406 case 2:
1407 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1408 break;
1409 case 1:
1410 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1411 break;
1412 case 0:
1413 default:
1414 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1415 break;
1416 }
1417 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1418 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1419 ucontrol->value.integer.value[0]);
1420
1421 return 0;
1422}
1423
1424static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1425 struct snd_ctl_elem_value *ucontrol)
1426{
1427 int idx = ext_disp_get_port_idx(kcontrol);
1428
1429 if (idx < 0)
1430 return idx;
1431
1432 ucontrol->value.integer.value[0] =
1433 ext_disp_rx_cfg[idx].channels - 2;
1434
1435 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1436 idx, ext_disp_rx_cfg[idx].channels);
1437
1438 return 0;
1439}
1440
1441static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1442 struct snd_ctl_elem_value *ucontrol)
1443{
1444 int idx = ext_disp_get_port_idx(kcontrol);
1445
1446 if (idx < 0)
1447 return idx;
1448
1449 ext_disp_rx_cfg[idx].channels =
1450 ucontrol->value.integer.value[0] + 2;
1451
1452 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1453 idx, ext_disp_rx_cfg[idx].channels);
1454 return 1;
1455}
1456
1457static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1458 struct snd_ctl_elem_value *ucontrol)
1459{
1460 int sample_rate_val;
1461 int idx = ext_disp_get_port_idx(kcontrol);
1462
1463 if (idx < 0)
1464 return idx;
1465
1466 switch (ext_disp_rx_cfg[idx].sample_rate) {
1467 case SAMPLING_RATE_176P4KHZ:
1468 sample_rate_val = 6;
1469 break;
1470
1471 case SAMPLING_RATE_88P2KHZ:
1472 sample_rate_val = 5;
1473 break;
1474
1475 case SAMPLING_RATE_44P1KHZ:
1476 sample_rate_val = 4;
1477 break;
1478
1479 case SAMPLING_RATE_32KHZ:
1480 sample_rate_val = 3;
1481 break;
1482
1483 case SAMPLING_RATE_192KHZ:
1484 sample_rate_val = 2;
1485 break;
1486
1487 case SAMPLING_RATE_96KHZ:
1488 sample_rate_val = 1;
1489 break;
1490
1491 case SAMPLING_RATE_48KHZ:
1492 default:
1493 sample_rate_val = 0;
1494 break;
1495 }
1496
1497 ucontrol->value.integer.value[0] = sample_rate_val;
1498 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1499 idx, ext_disp_rx_cfg[idx].sample_rate);
1500
1501 return 0;
1502}
1503
1504static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1505 struct snd_ctl_elem_value *ucontrol)
1506{
1507 int idx = ext_disp_get_port_idx(kcontrol);
1508
1509 if (idx < 0)
1510 return idx;
1511
1512 switch (ucontrol->value.integer.value[0]) {
1513 case 6:
1514 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1515 break;
1516 case 5:
1517 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1518 break;
1519 case 4:
1520 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1521 break;
1522 case 3:
1523 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1524 break;
1525 case 2:
1526 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1527 break;
1528 case 1:
1529 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1530 break;
1531 case 0:
1532 default:
1533 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1534 break;
1535 }
1536
1537 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1538 __func__, ucontrol->value.integer.value[0], idx,
1539 ext_disp_rx_cfg[idx].sample_rate);
1540 return 0;
1541}
1542
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1543static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1544 struct snd_ctl_elem_value *ucontrol)
1545{
1546 pr_debug("%s: proxy_rx channels = %d\n",
1547 __func__, proxy_rx_cfg.channels);
1548 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1549
1550 return 0;
1551}
1552
1553static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1554 struct snd_ctl_elem_value *ucontrol)
1555{
1556 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1557 pr_debug("%s: proxy_rx channels = %d\n",
1558 __func__, proxy_rx_cfg.channels);
1559
1560 return 1;
1561}
1562
1563static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1564 struct tdm_port *port)
1565{
1566 if (port) {
1567 if (strnstr(kcontrol->id.name, "PRI",
1568 sizeof(kcontrol->id.name))) {
1569 port->mode = TDM_PRI;
1570 } else if (strnstr(kcontrol->id.name, "SEC",
1571 sizeof(kcontrol->id.name))) {
1572 port->mode = TDM_SEC;
1573 } else if (strnstr(kcontrol->id.name, "TERT",
1574 sizeof(kcontrol->id.name))) {
1575 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]1576 } else if (strnstr(kcontrol->id.name, "QUAT",
1577 sizeof(kcontrol->id.name))) {
1578 port->mode = TDM_QUAT;
1579 } else if (strnstr(kcontrol->id.name, "QUIN",
1580 sizeof(kcontrol->id.name))) {
1581 port->mode = TDM_QUIN;
1582 } else if (strnstr(kcontrol->id.name, "SEN",
1583 sizeof(kcontrol->id.name))) {
1584 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1585 } else {
1586 pr_err("%s: unsupported mode in: %s\n",
1587 __func__, kcontrol->id.name);
1588 return -EINVAL;
1589 }
1590
1591 if (strnstr(kcontrol->id.name, "RX_0",
1592 sizeof(kcontrol->id.name)) ||
1593 strnstr(kcontrol->id.name, "TX_0",
1594 sizeof(kcontrol->id.name))) {
1595 port->channel = TDM_0;
1596 } else if (strnstr(kcontrol->id.name, "RX_1",
1597 sizeof(kcontrol->id.name)) ||
1598 strnstr(kcontrol->id.name, "TX_1",
1599 sizeof(kcontrol->id.name))) {
1600 port->channel = TDM_1;
1601 } else if (strnstr(kcontrol->id.name, "RX_2",
1602 sizeof(kcontrol->id.name)) ||
1603 strnstr(kcontrol->id.name, "TX_2",
1604 sizeof(kcontrol->id.name))) {
1605 port->channel = TDM_2;
1606 } else if (strnstr(kcontrol->id.name, "RX_3",
1607 sizeof(kcontrol->id.name)) ||
1608 strnstr(kcontrol->id.name, "TX_3",
1609 sizeof(kcontrol->id.name))) {
1610 port->channel = TDM_3;
1611 } else if (strnstr(kcontrol->id.name, "RX_4",
1612 sizeof(kcontrol->id.name)) ||
1613 strnstr(kcontrol->id.name, "TX_4",
1614 sizeof(kcontrol->id.name))) {
1615 port->channel = TDM_4;
1616 } else if (strnstr(kcontrol->id.name, "RX_5",
1617 sizeof(kcontrol->id.name)) ||
1618 strnstr(kcontrol->id.name, "TX_5",
1619 sizeof(kcontrol->id.name))) {
1620 port->channel = TDM_5;
1621 } else if (strnstr(kcontrol->id.name, "RX_6",
1622 sizeof(kcontrol->id.name)) ||
1623 strnstr(kcontrol->id.name, "TX_6",
1624 sizeof(kcontrol->id.name))) {
1625 port->channel = TDM_6;
1626 } else if (strnstr(kcontrol->id.name, "RX_7",
1627 sizeof(kcontrol->id.name)) ||
1628 strnstr(kcontrol->id.name, "TX_7",
1629 sizeof(kcontrol->id.name))) {
1630 port->channel = TDM_7;
1631 } else {
1632 pr_err("%s: unsupported channel in: %s\n",
1633 __func__, kcontrol->id.name);
1634 return -EINVAL;
1635 }
1636 } else {
1637 return -EINVAL;
1638 }
1639 return 0;
1640}
1641
1642static int tdm_get_sample_rate(int value)
1643{
1644 int sample_rate = 0;
1645
1646 switch (value) {
1647 case 0:
1648 sample_rate = SAMPLING_RATE_8KHZ;
1649 break;
1650 case 1:
1651 sample_rate = SAMPLING_RATE_16KHZ;
1652 break;
1653 case 2:
1654 sample_rate = SAMPLING_RATE_32KHZ;
1655 break;
1656 case 3:
1657 sample_rate = SAMPLING_RATE_48KHZ;
1658 break;
1659 case 4:
1660 sample_rate = SAMPLING_RATE_176P4KHZ;
1661 break;
1662 case 5:
1663 sample_rate = SAMPLING_RATE_352P8KHZ;
1664 break;
1665 default:
1666 sample_rate = SAMPLING_RATE_48KHZ;
1667 break;
1668 }
1669 return sample_rate;
1670}
1671
1672static int tdm_get_sample_rate_val(int sample_rate)
1673{
1674 int sample_rate_val = 0;
1675
1676 switch (sample_rate) {
1677 case SAMPLING_RATE_8KHZ:
1678 sample_rate_val = 0;
1679 break;
1680 case SAMPLING_RATE_16KHZ:
1681 sample_rate_val = 1;
1682 break;
1683 case SAMPLING_RATE_32KHZ:
1684 sample_rate_val = 2;
1685 break;
1686 case SAMPLING_RATE_48KHZ:
1687 sample_rate_val = 3;
1688 break;
1689 case SAMPLING_RATE_176P4KHZ:
1690 sample_rate_val = 4;
1691 break;
1692 case SAMPLING_RATE_352P8KHZ:
1693 sample_rate_val = 5;
1694 break;
1695 default:
1696 sample_rate_val = 3;
1697 break;
1698 }
1699 return sample_rate_val;
1700}
1701
1702static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1703 struct snd_ctl_elem_value *ucontrol)
1704{
1705 struct tdm_port port;
1706 int ret = tdm_get_port_idx(kcontrol, &port);
1707
1708 if (ret) {
1709 pr_err("%s: unsupported control: %s\n",
1710 __func__, kcontrol->id.name);
1711 } else {
1712 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1713 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1714
1715 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1716 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1717 ucontrol->value.enumerated.item[0]);
1718 }
1719 return ret;
1720}
1721
1722static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1723 struct snd_ctl_elem_value *ucontrol)
1724{
1725 struct tdm_port port;
1726 int ret = tdm_get_port_idx(kcontrol, &port);
1727
1728 if (ret) {
1729 pr_err("%s: unsupported control: %s\n",
1730 __func__, kcontrol->id.name);
1731 } else {
1732 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1733 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1734
1735 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1736 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1737 ucontrol->value.enumerated.item[0]);
1738 }
1739 return ret;
1740}
1741
1742static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1743 struct snd_ctl_elem_value *ucontrol)
1744{
1745 struct tdm_port port;
1746 int ret = tdm_get_port_idx(kcontrol, &port);
1747
1748 if (ret) {
1749 pr_err("%s: unsupported control: %s\n",
1750 __func__, kcontrol->id.name);
1751 } else {
1752 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1753 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1754
1755 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1756 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1757 ucontrol->value.enumerated.item[0]);
1758 }
1759 return ret;
1760}
1761
1762static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1763 struct snd_ctl_elem_value *ucontrol)
1764{
1765 struct tdm_port port;
1766 int ret = tdm_get_port_idx(kcontrol, &port);
1767
1768 if (ret) {
1769 pr_err("%s: unsupported control: %s\n",
1770 __func__, kcontrol->id.name);
1771 } else {
1772 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1773 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1774
1775 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1776 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1777 ucontrol->value.enumerated.item[0]);
1778 }
1779 return ret;
1780}
1781
1782static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1783{
1784 int format = 0;
1785
1786 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1787 case 0:
1788 format = SNDRV_PCM_FORMAT_S16_LE;
1789 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1790 case 1:
1791 format = SNDRV_PCM_FORMAT_S24_LE;
1792 break;
1793 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1794 format = SNDRV_PCM_FORMAT_S32_LE;
1795 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1796 default:
1797 format = SNDRV_PCM_FORMAT_S16_LE;
1798 break;
1799 }
1800 return format;
1801}
1802
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1803static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1804{
1805 int value = 0;
1806
1807 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1808 case SNDRV_PCM_FORMAT_S16_LE:
1809 value = 0;
1810 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1811 case SNDRV_PCM_FORMAT_S24_LE:
1812 value = 1;
1813 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1814 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1815 value = 2;
1816 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1817 default:
1818 value = 0;
1819 break;
1820 }
1821 return value;
1822}
1823
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1824static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1825 struct snd_ctl_elem_value *ucontrol)
1826{
1827 struct tdm_port port;
1828 int ret = tdm_get_port_idx(kcontrol, &port);
1829
1830 if (ret) {
1831 pr_err("%s: unsupported control: %s\n",
1832 __func__, kcontrol->id.name);
1833 } else {
1834 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1835 tdm_rx_cfg[port.mode][port.channel].bit_format);
1836
1837 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1838 tdm_rx_cfg[port.mode][port.channel].bit_format,
1839 ucontrol->value.enumerated.item[0]);
1840 }
1841 return ret;
1842}
1843
1844static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1845 struct snd_ctl_elem_value *ucontrol)
1846{
1847 struct tdm_port port;
1848 int ret = tdm_get_port_idx(kcontrol, &port);
1849
1850 if (ret) {
1851 pr_err("%s: unsupported control: %s\n",
1852 __func__, kcontrol->id.name);
1853 } else {
1854 tdm_rx_cfg[port.mode][port.channel].bit_format =
1855 tdm_get_format(ucontrol->value.enumerated.item[0]);
1856
1857 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1858 tdm_rx_cfg[port.mode][port.channel].bit_format,
1859 ucontrol->value.enumerated.item[0]);
1860 }
1861 return ret;
1862}
1863
1864static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1865 struct snd_ctl_elem_value *ucontrol)
1866{
1867 struct tdm_port port;
1868 int ret = tdm_get_port_idx(kcontrol, &port);
1869
1870 if (ret) {
1871 pr_err("%s: unsupported control: %s\n",
1872 __func__, kcontrol->id.name);
1873 } else {
1874 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1875 tdm_tx_cfg[port.mode][port.channel].bit_format);
1876
1877 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1878 tdm_tx_cfg[port.mode][port.channel].bit_format,
1879 ucontrol->value.enumerated.item[0]);
1880 }
1881 return ret;
1882}
1883
1884static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1885 struct snd_ctl_elem_value *ucontrol)
1886{
1887 struct tdm_port port;
1888 int ret = tdm_get_port_idx(kcontrol, &port);
1889
1890 if (ret) {
1891 pr_err("%s: unsupported control: %s\n",
1892 __func__, kcontrol->id.name);
1893 } else {
1894 tdm_tx_cfg[port.mode][port.channel].bit_format =
1895 tdm_get_format(ucontrol->value.enumerated.item[0]);
1896
1897 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1898 tdm_tx_cfg[port.mode][port.channel].bit_format,
1899 ucontrol->value.enumerated.item[0]);
1900 }
1901 return ret;
1902}
1903
1904static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1905 struct snd_ctl_elem_value *ucontrol)
1906{
1907 struct tdm_port port;
1908 int ret = tdm_get_port_idx(kcontrol, &port);
1909
1910 if (ret) {
1911 pr_err("%s: unsupported control: %s\n",
1912 __func__, kcontrol->id.name);
1913 } else {
1914
1915 ucontrol->value.enumerated.item[0] =
1916 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1917
1918 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1919 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1920 ucontrol->value.enumerated.item[0]);
1921 }
1922 return ret;
1923}
1924
1925static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1926 struct snd_ctl_elem_value *ucontrol)
1927{
1928 struct tdm_port port;
1929 int ret = tdm_get_port_idx(kcontrol, &port);
1930
1931 if (ret) {
1932 pr_err("%s: unsupported control: %s\n",
1933 __func__, kcontrol->id.name);
1934 } else {
1935 tdm_rx_cfg[port.mode][port.channel].channels =
1936 ucontrol->value.enumerated.item[0] + 1;
1937
1938 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1939 tdm_rx_cfg[port.mode][port.channel].channels,
1940 ucontrol->value.enumerated.item[0] + 1);
1941 }
1942 return ret;
1943}
1944
1945static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1946 struct snd_ctl_elem_value *ucontrol)
1947{
1948 struct tdm_port port;
1949 int ret = tdm_get_port_idx(kcontrol, &port);
1950
1951 if (ret) {
1952 pr_err("%s: unsupported control: %s\n",
1953 __func__, kcontrol->id.name);
1954 } else {
1955 ucontrol->value.enumerated.item[0] =
1956 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1957
1958 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1959 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1960 ucontrol->value.enumerated.item[0]);
1961 }
1962 return ret;
1963}
1964
1965static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1966 struct snd_ctl_elem_value *ucontrol)
1967{
1968 struct tdm_port port;
1969 int ret = tdm_get_port_idx(kcontrol, &port);
1970
1971 if (ret) {
1972 pr_err("%s: unsupported control: %s\n",
1973 __func__, kcontrol->id.name);
1974 } else {
1975 tdm_tx_cfg[port.mode][port.channel].channels =
1976 ucontrol->value.enumerated.item[0] + 1;
1977
1978 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1979 tdm_tx_cfg[port.mode][port.channel].channels,
1980 ucontrol->value.enumerated.item[0] + 1);
1981 }
1982 return ret;
1983}
1984
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]1985static int tdm_slot_map_put(struct snd_kcontrol *kcontrol,
1986 struct snd_ctl_elem_value *ucontrol)
1987{
1988 int slot_index = 0;
1989 int interface = ucontrol->value.integer.value[0];
1990 int channel = ucontrol->value.integer.value[1];
1991 unsigned int offset_val = 0;
1992 unsigned int *slot_offset = NULL;
1993 struct tdm_dev_config *config = NULL;
1994
1995 if (interface < 0 || interface >= (TDM_INTERFACE_MAX * MAX_PATH)) {
1996 pr_err("%s: incorrect interface = %d\n", __func__, interface);
1997 return -EINVAL;
1998 }
1999 if (channel < 0 || channel >= TDM_PORT_MAX) {
2000 pr_err("%s: incorrect channel = %d\n", __func__, channel);
2001 return -EINVAL;
2002 }
2003
2004 pr_debug("%s: interface = %d, channel = %d\n", __func__,
2005 interface, channel);
2006
2007 config = ((struct tdm_dev_config *) tdm_cfg[interface / MAX_PATH]) +
2008 ((interface % MAX_PATH) * TDM_PORT_MAX) + channel;
2009 slot_offset = config->tdm_slot_offset;
2010
2011 for (slot_index = 0; slot_index < TDM_MAX_SLOTS; slot_index++) {
2012 offset_val = ucontrol->value.integer.value[MAX_PATH +
2013 slot_index];
2014 /* Offset value can only be 0, 4, 8, ..28 */
2015 if (offset_val % 4 == 0 && offset_val <= 28)
2016 slot_offset[slot_index] = offset_val;
2017 pr_debug("%s: slot offset[%d] = %d\n", __func__,
2018 slot_index, slot_offset[slot_index]);
2019 }
2020
2021 return 0;
2022}
2023
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2024static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2025{
2026 int idx = 0;
2027
2028 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2029 sizeof("PRIM_AUX_PCM"))) {
2030 idx = PRIM_AUX_PCM;
2031 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2032 sizeof("SEC_AUX_PCM"))) {
2033 idx = SEC_AUX_PCM;
2034 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2035 sizeof("TERT_AUX_PCM"))) {
2036 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2037 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2038 sizeof("QUAT_AUX_PCM"))) {
2039 idx = QUAT_AUX_PCM;
2040 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2041 sizeof("QUIN_AUX_PCM"))) {
2042 idx = QUIN_AUX_PCM;
2043 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
2044 sizeof("SEN_AUX_PCM"))) {
2045 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2046 } else {
2047 pr_err("%s: unsupported port: %s\n",
2048 __func__, kcontrol->id.name);
2049 idx = -EINVAL;
2050 }
2051
2052 return idx;
2053}
2054
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2055static int aux_pcm_get_sample_rate(int value)
2056{
2057 int sample_rate = 0;
2058
2059 switch (value) {
2060 case 1:
2061 sample_rate = SAMPLING_RATE_16KHZ;
2062 break;
2063 case 0:
2064 default:
2065 sample_rate = SAMPLING_RATE_8KHZ;
2066 break;
2067 }
2068 return sample_rate;
2069}
2070
2071static int aux_pcm_get_sample_rate_val(int sample_rate)
2072{
2073 int sample_rate_val = 0;
2074
2075 switch (sample_rate) {
2076 case SAMPLING_RATE_16KHZ:
2077 sample_rate_val = 1;
2078 break;
2079 case SAMPLING_RATE_8KHZ:
2080 default:
2081 sample_rate_val = 0;
2082 break;
2083 }
2084 return sample_rate_val;
2085}
2086
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2087static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2088{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2089 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2090
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2091 switch (value) {
2092 case 0:
2093 format = SNDRV_PCM_FORMAT_S16_LE;
2094 break;
2095 case 1:
2096 format = SNDRV_PCM_FORMAT_S24_LE;
2097 break;
2098 case 2:
2099 format = SNDRV_PCM_FORMAT_S24_3LE;
2100 break;
2101 case 3:
2102 format = SNDRV_PCM_FORMAT_S32_LE;
2103 break;
2104 default:
2105 format = SNDRV_PCM_FORMAT_S16_LE;
2106 break;
2107 }
2108 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2109}
2110
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2111static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2112{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2113 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2114
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2115 switch (format) {
2116 case SNDRV_PCM_FORMAT_S16_LE:
2117 value = 0;
2118 break;
2119 case SNDRV_PCM_FORMAT_S24_LE:
2120 value = 1;
2121 break;
2122 case SNDRV_PCM_FORMAT_S24_3LE:
2123 value = 2;
2124 break;
2125 case SNDRV_PCM_FORMAT_S32_LE:
2126 value = 3;
2127 break;
2128 default:
2129 value = 0;
2130 break;
2131 }
2132 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2133}
2134
2135static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2136 struct snd_ctl_elem_value *ucontrol)
2137{
2138 int idx = aux_pcm_get_port_idx(kcontrol);
2139
2140 if (idx < 0)
2141 return idx;
2142
2143 ucontrol->value.enumerated.item[0] =
2144 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2145
2146 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2147 idx, aux_pcm_rx_cfg[idx].sample_rate,
2148 ucontrol->value.enumerated.item[0]);
2149
2150 return 0;
2151}
2152
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2153static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2154 struct snd_ctl_elem_value *ucontrol)
2155{
2156 int idx = aux_pcm_get_port_idx(kcontrol);
2157
2158 if (idx < 0)
2159 return idx;
2160
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2161 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2162 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2163
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2164 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2165 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2166 ucontrol->value.enumerated.item[0]);
2167
2168 return 0;
2169}
2170
2171static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2172 struct snd_ctl_elem_value *ucontrol)
2173{
2174 int idx = aux_pcm_get_port_idx(kcontrol);
2175
2176 if (idx < 0)
2177 return idx;
2178
2179 ucontrol->value.enumerated.item[0] =
2180 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2181
2182 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2183 idx, aux_pcm_tx_cfg[idx].sample_rate,
2184 ucontrol->value.enumerated.item[0]);
2185
2186 return 0;
2187}
2188
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2189static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2190 struct snd_ctl_elem_value *ucontrol)
2191{
2192 int idx = aux_pcm_get_port_idx(kcontrol);
2193
2194 if (idx < 0)
2195 return idx;
2196
2197 aux_pcm_tx_cfg[idx].sample_rate =
2198 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2199
2200 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2201 idx, aux_pcm_tx_cfg[idx].sample_rate,
2202 ucontrol->value.enumerated.item[0]);
2203
2204 return 0;
2205}
2206
2207static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
2208 struct snd_ctl_elem_value *ucontrol)
2209{
2210 int idx = aux_pcm_get_port_idx(kcontrol);
2211
2212 if (idx < 0)
2213 return idx;
2214
2215 ucontrol->value.enumerated.item[0] =
2216 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
2217
2218 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2219 idx, aux_pcm_rx_cfg[idx].bit_format,
2220 ucontrol->value.enumerated.item[0]);
2221
2222 return 0;
2223}
2224
2225static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
2226 struct snd_ctl_elem_value *ucontrol)
2227{
2228 int idx = aux_pcm_get_port_idx(kcontrol);
2229
2230 if (idx < 0)
2231 return idx;
2232
2233 aux_pcm_rx_cfg[idx].bit_format =
2234 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2235
2236 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2237 idx, aux_pcm_rx_cfg[idx].bit_format,
2238 ucontrol->value.enumerated.item[0]);
2239
2240 return 0;
2241}
2242
2243static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2244 struct snd_ctl_elem_value *ucontrol)
2245{
2246 int idx = aux_pcm_get_port_idx(kcontrol);
2247
2248 if (idx < 0)
2249 return idx;
2250
2251 ucontrol->value.enumerated.item[0] =
2252 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2253
2254 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2255 idx, aux_pcm_tx_cfg[idx].bit_format,
2256 ucontrol->value.enumerated.item[0]);
2257
2258 return 0;
2259}
2260
2261static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2262 struct snd_ctl_elem_value *ucontrol)
2263{
2264 int idx = aux_pcm_get_port_idx(kcontrol);
2265
2266 if (idx < 0)
2267 return idx;
2268
2269 aux_pcm_tx_cfg[idx].bit_format =
2270 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2271
2272 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2273 idx, aux_pcm_tx_cfg[idx].bit_format,
2274 ucontrol->value.enumerated.item[0]);
2275
2276 return 0;
2277}
2278
2279static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2280{
2281 int idx = 0;
2282
2283 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2284 sizeof("PRIM_MI2S_RX"))) {
2285 idx = PRIM_MI2S;
2286 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2287 sizeof("SEC_MI2S_RX"))) {
2288 idx = SEC_MI2S;
2289 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2290 sizeof("TERT_MI2S_RX"))) {
2291 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2292 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2293 sizeof("QUAT_MI2S_RX"))) {
2294 idx = QUAT_MI2S;
2295 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2296 sizeof("QUIN_MI2S_RX"))) {
2297 idx = QUIN_MI2S;
2298 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2299 sizeof("SEN_MI2S_RX"))) {
2300 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2301 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2302 sizeof("PRIM_MI2S_TX"))) {
2303 idx = PRIM_MI2S;
2304 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2305 sizeof("SEC_MI2S_TX"))) {
2306 idx = SEC_MI2S;
2307 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2308 sizeof("TERT_MI2S_TX"))) {
2309 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2310 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2311 sizeof("QUAT_MI2S_TX"))) {
2312 idx = QUAT_MI2S;
2313 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2314 sizeof("QUIN_MI2S_TX"))) {
2315 idx = QUIN_MI2S;
2316 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2317 sizeof("SEN_MI2S_TX"))) {
2318 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2319 } else {
2320 pr_err("%s: unsupported channel: %s\n",
2321 __func__, kcontrol->id.name);
2322 idx = -EINVAL;
2323 }
2324
2325 return idx;
2326}
2327
2328static int mi2s_get_sample_rate(int value)
2329{
2330 int sample_rate = 0;
2331
2332 switch (value) {
2333 case 0:
2334 sample_rate = SAMPLING_RATE_8KHZ;
2335 break;
2336 case 1:
2337 sample_rate = SAMPLING_RATE_11P025KHZ;
2338 break;
2339 case 2:
2340 sample_rate = SAMPLING_RATE_16KHZ;
2341 break;
2342 case 3:
2343 sample_rate = SAMPLING_RATE_22P05KHZ;
2344 break;
2345 case 4:
2346 sample_rate = SAMPLING_RATE_32KHZ;
2347 break;
2348 case 5:
2349 sample_rate = SAMPLING_RATE_44P1KHZ;
2350 break;
2351 case 6:
2352 sample_rate = SAMPLING_RATE_48KHZ;
2353 break;
2354 case 7:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2355 sample_rate = SAMPLING_RATE_88P2KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2356 break;
2357 case 8:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2358 sample_rate = SAMPLING_RATE_96KHZ;
2359 break;
2360 case 9:
2361 sample_rate = SAMPLING_RATE_176P4KHZ;
2362 break;
2363 case 10:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2364 sample_rate = SAMPLING_RATE_192KHZ;
2365 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2366 case 11:
2367 sample_rate = SAMPLING_RATE_352P8KHZ;
2368 break;
2369 case 12:
2370 sample_rate = SAMPLING_RATE_384KHZ;
2371 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2372 default:
2373 sample_rate = SAMPLING_RATE_48KHZ;
2374 break;
2375 }
2376 return sample_rate;
2377}
2378
2379static int mi2s_get_sample_rate_val(int sample_rate)
2380{
2381 int sample_rate_val = 0;
2382
2383 switch (sample_rate) {
2384 case SAMPLING_RATE_8KHZ:
2385 sample_rate_val = 0;
2386 break;
2387 case SAMPLING_RATE_11P025KHZ:
2388 sample_rate_val = 1;
2389 break;
2390 case SAMPLING_RATE_16KHZ:
2391 sample_rate_val = 2;
2392 break;
2393 case SAMPLING_RATE_22P05KHZ:
2394 sample_rate_val = 3;
2395 break;
2396 case SAMPLING_RATE_32KHZ:
2397 sample_rate_val = 4;
2398 break;
2399 case SAMPLING_RATE_44P1KHZ:
2400 sample_rate_val = 5;
2401 break;
2402 case SAMPLING_RATE_48KHZ:
2403 sample_rate_val = 6;
2404 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2405 case SAMPLING_RATE_88P2KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2406 sample_rate_val = 7;
2407 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2408 case SAMPLING_RATE_96KHZ:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2409 sample_rate_val = 8;
2410 break;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]2411 case SAMPLING_RATE_176P4KHZ:
2412 sample_rate_val = 9;
2413 break;
2414 case SAMPLING_RATE_192KHZ:
2415 sample_rate_val = 10;
2416 break;
2417 case SAMPLING_RATE_352P8KHZ:
2418 sample_rate_val = 11;
2419 break;
2420 case SAMPLING_RATE_384KHZ:
2421 sample_rate_val = 12;
2422 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2423 default:
2424 sample_rate_val = 6;
2425 break;
2426 }
2427 return sample_rate_val;
2428}
2429
2430static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2431 struct snd_ctl_elem_value *ucontrol)
2432{
2433 int idx = mi2s_get_port_idx(kcontrol);
2434
2435 if (idx < 0)
2436 return idx;
2437
2438 ucontrol->value.enumerated.item[0] =
2439 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2440
2441 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2442 idx, mi2s_rx_cfg[idx].sample_rate,
2443 ucontrol->value.enumerated.item[0]);
2444
2445 return 0;
2446}
2447
2448static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2449 struct snd_ctl_elem_value *ucontrol)
2450{
2451 int idx = mi2s_get_port_idx(kcontrol);
2452
2453 if (idx < 0)
2454 return idx;
2455
2456 mi2s_rx_cfg[idx].sample_rate =
2457 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2458
2459 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2460 idx, mi2s_rx_cfg[idx].sample_rate,
2461 ucontrol->value.enumerated.item[0]);
2462
2463 return 0;
2464}
2465
2466static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2467 struct snd_ctl_elem_value *ucontrol)
2468{
2469 int idx = mi2s_get_port_idx(kcontrol);
2470
2471 if (idx < 0)
2472 return idx;
2473
2474 ucontrol->value.enumerated.item[0] =
2475 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2476
2477 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2478 idx, mi2s_tx_cfg[idx].sample_rate,
2479 ucontrol->value.enumerated.item[0]);
2480
2481 return 0;
2482}
2483
2484static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2485 struct snd_ctl_elem_value *ucontrol)
2486{
2487 int idx = mi2s_get_port_idx(kcontrol);
2488
2489 if (idx < 0)
2490 return idx;
2491
2492 mi2s_tx_cfg[idx].sample_rate =
2493 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2494
2495 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2496 idx, mi2s_tx_cfg[idx].sample_rate,
2497 ucontrol->value.enumerated.item[0]);
2498
2499 return 0;
2500}
2501
2502static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2503 struct snd_ctl_elem_value *ucontrol)
2504{
2505 int idx = mi2s_get_port_idx(kcontrol);
2506
2507 if (idx < 0)
2508 return idx;
2509
2510 ucontrol->value.enumerated.item[0] =
2511 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2512
2513 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2514 idx, mi2s_rx_cfg[idx].bit_format,
2515 ucontrol->value.enumerated.item[0]);
2516
2517 return 0;
2518}
2519
2520static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2521 struct snd_ctl_elem_value *ucontrol)
2522{
2523 int idx = mi2s_get_port_idx(kcontrol);
2524
2525 if (idx < 0)
2526 return idx;
2527
2528 mi2s_rx_cfg[idx].bit_format =
2529 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2530
2531 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2532 idx, mi2s_rx_cfg[idx].bit_format,
2533 ucontrol->value.enumerated.item[0]);
2534
2535 return 0;
2536}
2537
2538static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2539 struct snd_ctl_elem_value *ucontrol)
2540{
2541 int idx = mi2s_get_port_idx(kcontrol);
2542
2543 if (idx < 0)
2544 return idx;
2545
2546 ucontrol->value.enumerated.item[0] =
2547 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2548
2549 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2550 idx, mi2s_tx_cfg[idx].bit_format,
2551 ucontrol->value.enumerated.item[0]);
2552
2553 return 0;
2554}
2555
2556static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2557 struct snd_ctl_elem_value *ucontrol)
2558{
2559 int idx = mi2s_get_port_idx(kcontrol);
2560
2561 if (idx < 0)
2562 return idx;
2563
2564 mi2s_tx_cfg[idx].bit_format =
2565 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2566
2567 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2568 idx, mi2s_tx_cfg[idx].bit_format,
2569 ucontrol->value.enumerated.item[0]);
2570
2571 return 0;
2572}
2573static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2574 struct snd_ctl_elem_value *ucontrol)
2575{
2576 int idx = mi2s_get_port_idx(kcontrol);
2577
2578 if (idx < 0)
2579 return idx;
2580
2581 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2582 idx, mi2s_rx_cfg[idx].channels);
2583 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2584
2585 return 0;
2586}
2587
2588static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2589 struct snd_ctl_elem_value *ucontrol)
2590{
2591 int idx = mi2s_get_port_idx(kcontrol);
2592
2593 if (idx < 0)
2594 return idx;
2595
2596 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2597 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2598 idx, mi2s_rx_cfg[idx].channels);
2599
2600 return 1;
2601}
2602
2603static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2604 struct snd_ctl_elem_value *ucontrol)
2605{
2606 int idx = mi2s_get_port_idx(kcontrol);
2607
2608 if (idx < 0)
2609 return idx;
2610
2611 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2612 idx, mi2s_tx_cfg[idx].channels);
2613 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2614
2615 return 0;
2616}
2617
2618static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2619 struct snd_ctl_elem_value *ucontrol)
2620{
2621 int idx = mi2s_get_port_idx(kcontrol);
2622
2623 if (idx < 0)
2624 return idx;
2625
2626 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2627 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2628 idx, mi2s_tx_cfg[idx].channels);
2629
2630 return 1;
2631}
2632
2633static int msm_get_port_id(int be_id)
2634{
2635 int afe_port_id = 0;
2636
2637 switch (be_id) {
2638 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2639 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2640 break;
2641 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2642 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2643 break;
2644 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2645 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2646 break;
2647 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2648 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2649 break;
2650 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2651 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2652 break;
2653 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2654 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2655 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2656 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2657 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2658 break;
2659 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2660 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2661 break;
2662 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2663 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2664 break;
2665 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2666 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2667 break;
2668 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2669 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2670 break;
2671 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2672 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2673 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]2674 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2675 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2676 break;
2677 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2678 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2679 break;
2680 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2681 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2682 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2683 default:
2684 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2685 afe_port_id = -EINVAL;
2686 }
2687
2688 return afe_port_id;
2689}
2690
2691static u32 get_mi2s_bits_per_sample(u32 bit_format)
2692{
2693 u32 bit_per_sample = 0;
2694
2695 switch (bit_format) {
2696 case SNDRV_PCM_FORMAT_S32_LE:
2697 case SNDRV_PCM_FORMAT_S24_3LE:
2698 case SNDRV_PCM_FORMAT_S24_LE:
2699 bit_per_sample = 32;
2700 break;
2701 case SNDRV_PCM_FORMAT_S16_LE:
2702 default:
2703 bit_per_sample = 16;
2704 break;
2705 }
2706
2707 return bit_per_sample;
2708}
2709
2710static void update_mi2s_clk_val(int dai_id, int stream)
2711{
2712 u32 bit_per_sample = 0;
2713
2714 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2715 bit_per_sample =
2716 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2717 mi2s_clk[dai_id].clk_freq_in_hz =
2718 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2719 } else {
2720 bit_per_sample =
2721 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2722 mi2s_clk[dai_id].clk_freq_in_hz =
2723 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2724 }
2725}
2726
2727static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2728{
2729 int ret = 0;
2730 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2731 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2732 int port_id = 0;
2733 int index = cpu_dai->id;
2734
2735 port_id = msm_get_port_id(rtd->dai_link->id);
2736 if (port_id < 0) {
2737 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2738 ret = port_id;
2739 goto err;
2740 }
2741
2742 if (enable) {
2743 update_mi2s_clk_val(index, substream->stream);
2744 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2745 mi2s_clk[index].clk_freq_in_hz);
2746 }
2747
2748 mi2s_clk[index].enable = enable;
2749 ret = afe_set_lpass_clock_v2(port_id,
2750 &mi2s_clk[index]);
2751 if (ret < 0) {
2752 dev_err(rtd->card->dev,
2753 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2754 __func__, port_id, ret);
2755 goto err;
2756 }
2757
2758err:
2759 return ret;
2760}
2761
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2762static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2763{
2764 int idx = 0;
2765
2766 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2767 sizeof("WSA_CDC_DMA_RX_0")))
2768 idx = WSA_CDC_DMA_RX_0;
2769 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2770 sizeof("WSA_CDC_DMA_RX_0")))
2771 idx = WSA_CDC_DMA_RX_1;
2772 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2773 sizeof("RX_CDC_DMA_RX_0")))
2774 idx = RX_CDC_DMA_RX_0;
2775 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2776 sizeof("RX_CDC_DMA_RX_1")))
2777 idx = RX_CDC_DMA_RX_1;
2778 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2779 sizeof("RX_CDC_DMA_RX_2")))
2780 idx = RX_CDC_DMA_RX_2;
2781 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2782 sizeof("RX_CDC_DMA_RX_3")))
2783 idx = RX_CDC_DMA_RX_3;
2784 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2785 sizeof("RX_CDC_DMA_RX_5")))
2786 idx = RX_CDC_DMA_RX_5;
2787 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2788 sizeof("WSA_CDC_DMA_TX_0")))
2789 idx = WSA_CDC_DMA_TX_0;
2790 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2791 sizeof("WSA_CDC_DMA_TX_1")))
2792 idx = WSA_CDC_DMA_TX_1;
2793 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2794 sizeof("WSA_CDC_DMA_TX_2")))
2795 idx = WSA_CDC_DMA_TX_2;
2796 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2797 sizeof("TX_CDC_DMA_TX_0")))
2798 idx = TX_CDC_DMA_TX_0;
2799 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2800 sizeof("TX_CDC_DMA_TX_3")))
2801 idx = TX_CDC_DMA_TX_3;
2802 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2803 sizeof("TX_CDC_DMA_TX_4")))
2804 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2805 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2806 sizeof("VA_CDC_DMA_TX_0")))
2807 idx = VA_CDC_DMA_TX_0;
2808 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2809 sizeof("VA_CDC_DMA_TX_1")))
2810 idx = VA_CDC_DMA_TX_1;
2811 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2812 sizeof("VA_CDC_DMA_TX_2")))
2813 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2814 else {
2815 pr_err("%s: unsupported channel: %s\n",
2816 __func__, kcontrol->id.name);
2817 return -EINVAL;
2818 }
2819
2820 return idx;
2821}
2822
2823static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2824 struct snd_ctl_elem_value *ucontrol)
2825{
2826 int ch_num = cdc_dma_get_port_idx(kcontrol);
2827
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2828 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2829 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2830 return ch_num;
2831 }
2832
2833 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2834 cdc_dma_rx_cfg[ch_num].channels - 1);
2835 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2836 return 0;
2837}
2838
2839static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2840 struct snd_ctl_elem_value *ucontrol)
2841{
2842 int ch_num = cdc_dma_get_port_idx(kcontrol);
2843
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2844 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2845 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2846 return ch_num;
2847 }
2848
2849 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2850
2851 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2852 cdc_dma_rx_cfg[ch_num].channels);
2853 return 1;
2854}
2855
2856static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2857 struct snd_ctl_elem_value *ucontrol)
2858{
2859 int ch_num = cdc_dma_get_port_idx(kcontrol);
2860
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2861 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2862 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2863 return ch_num;
2864 }
2865
2866 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2867 case SNDRV_PCM_FORMAT_S32_LE:
2868 ucontrol->value.integer.value[0] = 3;
2869 break;
2870 case SNDRV_PCM_FORMAT_S24_3LE:
2871 ucontrol->value.integer.value[0] = 2;
2872 break;
2873 case SNDRV_PCM_FORMAT_S24_LE:
2874 ucontrol->value.integer.value[0] = 1;
2875 break;
2876 case SNDRV_PCM_FORMAT_S16_LE:
2877 default:
2878 ucontrol->value.integer.value[0] = 0;
2879 break;
2880 }
2881
2882 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2883 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2884 ucontrol->value.integer.value[0]);
2885 return 0;
2886}
2887
2888static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2889 struct snd_ctl_elem_value *ucontrol)
2890{
2891 int rc = 0;
2892 int ch_num = cdc_dma_get_port_idx(kcontrol);
2893
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2894 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2895 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2896 return ch_num;
2897 }
2898
2899 switch (ucontrol->value.integer.value[0]) {
2900 case 3:
2901 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2902 break;
2903 case 2:
2904 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2905 break;
2906 case 1:
2907 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2908 break;
2909 case 0:
2910 default:
2911 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2912 break;
2913 }
2914 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2915 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2916 ucontrol->value.integer.value[0]);
2917
2918 return rc;
2919}
2920
2921
2922static int cdc_dma_get_sample_rate_val(int sample_rate)
2923{
2924 int sample_rate_val = 0;
2925
2926 switch (sample_rate) {
2927 case SAMPLING_RATE_8KHZ:
2928 sample_rate_val = 0;
2929 break;
2930 case SAMPLING_RATE_11P025KHZ:
2931 sample_rate_val = 1;
2932 break;
2933 case SAMPLING_RATE_16KHZ:
2934 sample_rate_val = 2;
2935 break;
2936 case SAMPLING_RATE_22P05KHZ:
2937 sample_rate_val = 3;
2938 break;
2939 case SAMPLING_RATE_32KHZ:
2940 sample_rate_val = 4;
2941 break;
2942 case SAMPLING_RATE_44P1KHZ:
2943 sample_rate_val = 5;
2944 break;
2945 case SAMPLING_RATE_48KHZ:
2946 sample_rate_val = 6;
2947 break;
2948 case SAMPLING_RATE_88P2KHZ:
2949 sample_rate_val = 7;
2950 break;
2951 case SAMPLING_RATE_96KHZ:
2952 sample_rate_val = 8;
2953 break;
2954 case SAMPLING_RATE_176P4KHZ:
2955 sample_rate_val = 9;
2956 break;
2957 case SAMPLING_RATE_192KHZ:
2958 sample_rate_val = 10;
2959 break;
2960 case SAMPLING_RATE_352P8KHZ:
2961 sample_rate_val = 11;
2962 break;
2963 case SAMPLING_RATE_384KHZ:
2964 sample_rate_val = 12;
2965 break;
2966 default:
2967 sample_rate_val = 6;
2968 break;
2969 }
2970 return sample_rate_val;
2971}
2972
2973static int cdc_dma_get_sample_rate(int value)
2974{
2975 int sample_rate = 0;
2976
2977 switch (value) {
2978 case 0:
2979 sample_rate = SAMPLING_RATE_8KHZ;
2980 break;
2981 case 1:
2982 sample_rate = SAMPLING_RATE_11P025KHZ;
2983 break;
2984 case 2:
2985 sample_rate = SAMPLING_RATE_16KHZ;
2986 break;
2987 case 3:
2988 sample_rate = SAMPLING_RATE_22P05KHZ;
2989 break;
2990 case 4:
2991 sample_rate = SAMPLING_RATE_32KHZ;
2992 break;
2993 case 5:
2994 sample_rate = SAMPLING_RATE_44P1KHZ;
2995 break;
2996 case 6:
2997 sample_rate = SAMPLING_RATE_48KHZ;
2998 break;
2999 case 7:
3000 sample_rate = SAMPLING_RATE_88P2KHZ;
3001 break;
3002 case 8:
3003 sample_rate = SAMPLING_RATE_96KHZ;
3004 break;
3005 case 9:
3006 sample_rate = SAMPLING_RATE_176P4KHZ;
3007 break;
3008 case 10:
3009 sample_rate = SAMPLING_RATE_192KHZ;
3010 break;
3011 case 11:
3012 sample_rate = SAMPLING_RATE_352P8KHZ;
3013 break;
3014 case 12:
3015 sample_rate = SAMPLING_RATE_384KHZ;
3016 break;
3017 default:
3018 sample_rate = SAMPLING_RATE_48KHZ;
3019 break;
3020 }
3021 return sample_rate;
3022}
3023
3024static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3025 struct snd_ctl_elem_value *ucontrol)
3026{
3027 int ch_num = cdc_dma_get_port_idx(kcontrol);
3028
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]3029 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3030 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3031 return ch_num;
3032 }
3033
3034 ucontrol->value.enumerated.item[0] =
3035 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
3036
3037 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
3038 cdc_dma_rx_cfg[ch_num].sample_rate);
3039 return 0;
3040}
3041
3042static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
3043 struct snd_ctl_elem_value *ucontrol)
3044{
3045 int ch_num = cdc_dma_get_port_idx(kcontrol);
3046
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]3047 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3048 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3049 return ch_num;
3050 }
3051
3052 cdc_dma_rx_cfg[ch_num].sample_rate =
3053 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
3054
3055
3056 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
3057 __func__, ucontrol->value.enumerated.item[0],
3058 cdc_dma_rx_cfg[ch_num].sample_rate);
3059 return 0;
3060}
3061
3062static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
3063 struct snd_ctl_elem_value *ucontrol)
3064{
3065 int ch_num = cdc_dma_get_port_idx(kcontrol);
3066
3067 if (ch_num < 0) {
3068 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3069 return ch_num;
3070 }
3071
3072 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3073 cdc_dma_tx_cfg[ch_num].channels);
3074 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
3075 return 0;
3076}
3077
3078static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
3079 struct snd_ctl_elem_value *ucontrol)
3080{
3081 int ch_num = cdc_dma_get_port_idx(kcontrol);
3082
3083 if (ch_num < 0) {
3084 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3085 return ch_num;
3086 }
3087
3088 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
3089
3090 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3091 cdc_dma_tx_cfg[ch_num].channels);
3092 return 1;
3093}
3094
3095static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3096 struct snd_ctl_elem_value *ucontrol)
3097{
3098 int sample_rate_val;
3099 int ch_num = cdc_dma_get_port_idx(kcontrol);
3100
3101 if (ch_num < 0) {
3102 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3103 return ch_num;
3104 }
3105
3106 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
3107 case SAMPLING_RATE_384KHZ:
3108 sample_rate_val = 12;
3109 break;
3110 case SAMPLING_RATE_352P8KHZ:
3111 sample_rate_val = 11;
3112 break;
3113 case SAMPLING_RATE_192KHZ:
3114 sample_rate_val = 10;
3115 break;
3116 case SAMPLING_RATE_176P4KHZ:
3117 sample_rate_val = 9;
3118 break;
3119 case SAMPLING_RATE_96KHZ:
3120 sample_rate_val = 8;
3121 break;
3122 case SAMPLING_RATE_88P2KHZ:
3123 sample_rate_val = 7;
3124 break;
3125 case SAMPLING_RATE_48KHZ:
3126 sample_rate_val = 6;
3127 break;
3128 case SAMPLING_RATE_44P1KHZ:
3129 sample_rate_val = 5;
3130 break;
3131 case SAMPLING_RATE_32KHZ:
3132 sample_rate_val = 4;
3133 break;
3134 case SAMPLING_RATE_22P05KHZ:
3135 sample_rate_val = 3;
3136 break;
3137 case SAMPLING_RATE_16KHZ:
3138 sample_rate_val = 2;
3139 break;
3140 case SAMPLING_RATE_11P025KHZ:
3141 sample_rate_val = 1;
3142 break;
3143 case SAMPLING_RATE_8KHZ:
3144 sample_rate_val = 0;
3145 break;
3146 default:
3147 sample_rate_val = 6;
3148 break;
3149 }
3150
3151 ucontrol->value.integer.value[0] = sample_rate_val;
3152 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
3153 cdc_dma_tx_cfg[ch_num].sample_rate);
3154 return 0;
3155}
3156
3157static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3158 struct snd_ctl_elem_value *ucontrol)
3159{
3160 int ch_num = cdc_dma_get_port_idx(kcontrol);
3161
3162 if (ch_num < 0) {
3163 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3164 return ch_num;
3165 }
3166
3167 switch (ucontrol->value.integer.value[0]) {
3168 case 12:
3169 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
3170 break;
3171 case 11:
3172 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
3173 break;
3174 case 10:
3175 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
3176 break;
3177 case 9:
3178 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
3179 break;
3180 case 8:
3181 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
3182 break;
3183 case 7:
3184 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
3185 break;
3186 case 6:
3187 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3188 break;
3189 case 5:
3190 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
3191 break;
3192 case 4:
3193 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
3194 break;
3195 case 3:
3196 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
3197 break;
3198 case 2:
3199 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
3200 break;
3201 case 1:
3202 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
3203 break;
3204 case 0:
3205 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
3206 break;
3207 default:
3208 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3209 break;
3210 }
3211
3212 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
3213 __func__, ucontrol->value.integer.value[0],
3214 cdc_dma_tx_cfg[ch_num].sample_rate);
3215 return 0;
3216}
3217
3218static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
3219 struct snd_ctl_elem_value *ucontrol)
3220{
3221 int ch_num = cdc_dma_get_port_idx(kcontrol);
3222
3223 if (ch_num < 0) {
3224 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3225 return ch_num;
3226 }
3227
3228 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
3229 case SNDRV_PCM_FORMAT_S32_LE:
3230 ucontrol->value.integer.value[0] = 3;
3231 break;
3232 case SNDRV_PCM_FORMAT_S24_3LE:
3233 ucontrol->value.integer.value[0] = 2;
3234 break;
3235 case SNDRV_PCM_FORMAT_S24_LE:
3236 ucontrol->value.integer.value[0] = 1;
3237 break;
3238 case SNDRV_PCM_FORMAT_S16_LE:
3239 default:
3240 ucontrol->value.integer.value[0] = 0;
3241 break;
3242 }
3243
3244 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3245 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3246 ucontrol->value.integer.value[0]);
3247 return 0;
3248}
3249
3250static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
3251 struct snd_ctl_elem_value *ucontrol)
3252{
3253 int rc = 0;
3254 int ch_num = cdc_dma_get_port_idx(kcontrol);
3255
3256 if (ch_num < 0) {
3257 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3258 return ch_num;
3259 }
3260
3261 switch (ucontrol->value.integer.value[0]) {
3262 case 3:
3263 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3264 break;
3265 case 2:
3266 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3267 break;
3268 case 1:
3269 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3270 break;
3271 case 0:
3272 default:
3273 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3274 break;
3275 }
3276 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3277 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3278 ucontrol->value.integer.value[0]);
3279
3280 return rc;
3281}
3282
3283static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3284{
3285 int idx = 0;
3286
3287 switch (be_id) {
3288 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3289 idx = WSA_CDC_DMA_RX_0;
3290 break;
3291 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3292 idx = WSA_CDC_DMA_TX_0;
3293 break;
3294 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3295 idx = WSA_CDC_DMA_RX_1;
3296 break;
3297 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3298 idx = WSA_CDC_DMA_TX_1;
3299 break;
3300 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3301 idx = WSA_CDC_DMA_TX_2;
3302 break;
3303 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3304 idx = RX_CDC_DMA_RX_0;
3305 break;
3306 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3307 idx = RX_CDC_DMA_RX_1;
3308 break;
3309 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3310 idx = RX_CDC_DMA_RX_2;
3311 break;
3312 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3313 idx = RX_CDC_DMA_RX_3;
3314 break;
3315 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3316 idx = RX_CDC_DMA_RX_5;
3317 break;
3318 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3319 idx = TX_CDC_DMA_TX_0;
3320 break;
3321 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3322 idx = TX_CDC_DMA_TX_3;
3323 break;
3324 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3325 idx = TX_CDC_DMA_TX_4;
3326 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3327 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3328 idx = VA_CDC_DMA_TX_0;
3329 break;
3330 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3331 idx = VA_CDC_DMA_TX_1;
3332 break;
3333 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3334 idx = VA_CDC_DMA_TX_2;
3335 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3336 default:
3337 idx = RX_CDC_DMA_RX_0;
3338 break;
3339 }
3340
3341 return idx;
3342}
3343
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3344static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3345 struct snd_ctl_elem_value *ucontrol)
3346{
3347 /*
3348 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3349 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3350 * value.
3351 */
3352 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3353 case SAMPLING_RATE_96KHZ:
3354 ucontrol->value.integer.value[0] = 5;
3355 break;
3356 case SAMPLING_RATE_88P2KHZ:
3357 ucontrol->value.integer.value[0] = 4;
3358 break;
3359 case SAMPLING_RATE_48KHZ:
3360 ucontrol->value.integer.value[0] = 3;
3361 break;
3362 case SAMPLING_RATE_44P1KHZ:
3363 ucontrol->value.integer.value[0] = 2;
3364 break;
3365 case SAMPLING_RATE_16KHZ:
3366 ucontrol->value.integer.value[0] = 1;
3367 break;
3368 case SAMPLING_RATE_8KHZ:
3369 default:
3370 ucontrol->value.integer.value[0] = 0;
3371 break;
3372 }
3373 pr_debug("%s: sample rate = %d\n", __func__,
3374 slim_rx_cfg[SLIM_RX_7].sample_rate);
3375
3376 return 0;
3377}
3378
3379static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3380 struct snd_ctl_elem_value *ucontrol)
3381{
3382 switch (ucontrol->value.integer.value[0]) {
3383 case 1:
3384 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3385 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3386 break;
3387 case 2:
3388 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3389 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3390 break;
3391 case 3:
3392 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3393 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3394 break;
3395 case 4:
3396 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3397 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3398 break;
3399 case 5:
3400 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3401 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3402 break;
3403 case 0:
3404 default:
3405 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3406 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3407 break;
3408 }
3409 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3410 __func__,
3411 slim_rx_cfg[SLIM_RX_7].sample_rate,
3412 slim_tx_cfg[SLIM_TX_7].sample_rate,
3413 ucontrol->value.enumerated.item[0]);
3414
3415 return 0;
3416}
3417
3418static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3419 struct snd_ctl_elem_value *ucontrol)
3420{
3421 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3422 case SAMPLING_RATE_96KHZ:
3423 ucontrol->value.integer.value[0] = 5;
3424 break;
3425 case SAMPLING_RATE_88P2KHZ:
3426 ucontrol->value.integer.value[0] = 4;
3427 break;
3428 case SAMPLING_RATE_48KHZ:
3429 ucontrol->value.integer.value[0] = 3;
3430 break;
3431 case SAMPLING_RATE_44P1KHZ:
3432 ucontrol->value.integer.value[0] = 2;
3433 break;
3434 case SAMPLING_RATE_16KHZ:
3435 ucontrol->value.integer.value[0] = 1;
3436 break;
3437 case SAMPLING_RATE_8KHZ:
3438 default:
3439 ucontrol->value.integer.value[0] = 0;
3440 break;
3441 }
3442 pr_debug("%s: sample rate rx = %d\n", __func__,
3443 slim_rx_cfg[SLIM_RX_7].sample_rate);
3444
3445 return 0;
3446}
3447
3448static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3449 struct snd_ctl_elem_value *ucontrol)
3450{
3451 switch (ucontrol->value.integer.value[0]) {
3452 case 1:
3453 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3454 break;
3455 case 2:
3456 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3457 break;
3458 case 3:
3459 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3460 break;
3461 case 4:
3462 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3463 break;
3464 case 5:
3465 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3466 break;
3467 case 0:
3468 default:
3469 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3470 break;
3471 }
3472 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3473 __func__,
3474 slim_rx_cfg[SLIM_RX_7].sample_rate,
3475 ucontrol->value.enumerated.item[0]);
3476
3477 return 0;
3478}
3479
3480static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3481 struct snd_ctl_elem_value *ucontrol)
3482{
3483 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3484 case SAMPLING_RATE_96KHZ:
3485 ucontrol->value.integer.value[0] = 5;
3486 break;
3487 case SAMPLING_RATE_88P2KHZ:
3488 ucontrol->value.integer.value[0] = 4;
3489 break;
3490 case SAMPLING_RATE_48KHZ:
3491 ucontrol->value.integer.value[0] = 3;
3492 break;
3493 case SAMPLING_RATE_44P1KHZ:
3494 ucontrol->value.integer.value[0] = 2;
3495 break;
3496 case SAMPLING_RATE_16KHZ:
3497 ucontrol->value.integer.value[0] = 1;
3498 break;
3499 case SAMPLING_RATE_8KHZ:
3500 default:
3501 ucontrol->value.integer.value[0] = 0;
3502 break;
3503 }
3504 pr_debug("%s: sample rate tx = %d\n", __func__,
3505 slim_tx_cfg[SLIM_TX_7].sample_rate);
3506
3507 return 0;
3508}
3509
3510static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3511 struct snd_ctl_elem_value *ucontrol)
3512{
3513 switch (ucontrol->value.integer.value[0]) {
3514 case 1:
3515 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3516 break;
3517 case 2:
3518 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3519 break;
3520 case 3:
3521 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3522 break;
3523 case 4:
3524 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3525 break;
3526 case 5:
3527 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3528 break;
3529 case 0:
3530 default:
3531 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3532 break;
3533 }
3534 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3535 __func__,
3536 slim_tx_cfg[SLIM_TX_7].sample_rate,
3537 ucontrol->value.enumerated.item[0]);
3538
3539 return 0;
3540}
3541
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3542static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3543 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3544 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3545 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3546 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3547 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3548 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3549 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3550 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3551 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3552 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3553 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3554 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3555 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3556 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3557 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3558 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3559 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3560 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3561 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3562 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3563 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3564 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3565 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3566 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3567 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3568 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3569 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3570 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3571 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3572 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3573 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3574 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3575 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3576 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3577 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3578 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3579 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3580 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3581 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3582 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3583 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3584 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3585 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3586 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3587 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3588 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3589 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3590 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3591 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3592 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3593 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3594 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3595 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3596 wsa_cdc_dma_rx_0_sample_rate,
3597 cdc_dma_rx_sample_rate_get,
3598 cdc_dma_rx_sample_rate_put),
3599 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3600 wsa_cdc_dma_rx_1_sample_rate,
3601 cdc_dma_rx_sample_rate_get,
3602 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3603 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3604 wsa_cdc_dma_tx_0_sample_rate,
3605 cdc_dma_tx_sample_rate_get,
3606 cdc_dma_tx_sample_rate_put),
3607 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3608 wsa_cdc_dma_tx_1_sample_rate,
3609 cdc_dma_tx_sample_rate_get,
3610 cdc_dma_tx_sample_rate_put),
3611 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3612 wsa_cdc_dma_tx_2_sample_rate,
3613 cdc_dma_tx_sample_rate_get,
3614 cdc_dma_tx_sample_rate_put),
3615 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3616 tx_cdc_dma_tx_0_sample_rate,
3617 cdc_dma_tx_sample_rate_get,
3618 cdc_dma_tx_sample_rate_put),
3619 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3620 tx_cdc_dma_tx_3_sample_rate,
3621 cdc_dma_tx_sample_rate_get,
3622 cdc_dma_tx_sample_rate_put),
3623 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3624 tx_cdc_dma_tx_4_sample_rate,
3625 cdc_dma_tx_sample_rate_get,
3626 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3627 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3628 va_cdc_dma_tx_0_sample_rate,
3629 cdc_dma_tx_sample_rate_get,
3630 cdc_dma_tx_sample_rate_put),
3631 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3632 va_cdc_dma_tx_1_sample_rate,
3633 cdc_dma_tx_sample_rate_get,
3634 cdc_dma_tx_sample_rate_put),
3635 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3636 va_cdc_dma_tx_2_sample_rate,
3637 cdc_dma_tx_sample_rate_get,
3638 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3639};
3640
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]3641static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3642 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3643 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3644 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3645 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3646 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3647 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3648 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3649 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3650 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3651 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3652 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3653 rx_cdc80_dma_rx_0_sample_rate,
3654 cdc_dma_rx_sample_rate_get,
3655 cdc_dma_rx_sample_rate_put),
3656 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3657 rx_cdc80_dma_rx_1_sample_rate,
3658 cdc_dma_rx_sample_rate_get,
3659 cdc_dma_rx_sample_rate_put),
3660 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3661 rx_cdc80_dma_rx_2_sample_rate,
3662 cdc_dma_rx_sample_rate_get,
3663 cdc_dma_rx_sample_rate_put),
3664 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3665 rx_cdc80_dma_rx_3_sample_rate,
3666 cdc_dma_rx_sample_rate_get,
3667 cdc_dma_rx_sample_rate_put),
3668 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3669 rx_cdc80_dma_rx_5_sample_rate,
3670 cdc_dma_rx_sample_rate_get,
3671 cdc_dma_rx_sample_rate_put),
3672};
3673
3674static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3675 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3676 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3677 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3678 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3679 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3680 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3681 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3682 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3683 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3684 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3685 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3686 rx_cdc85_dma_rx_0_sample_rate,
3687 cdc_dma_rx_sample_rate_get,
3688 cdc_dma_rx_sample_rate_put),
3689 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3690 rx_cdc85_dma_rx_1_sample_rate,
3691 cdc_dma_rx_sample_rate_get,
3692 cdc_dma_rx_sample_rate_put),
3693 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3694 rx_cdc85_dma_rx_2_sample_rate,
3695 cdc_dma_rx_sample_rate_get,
3696 cdc_dma_rx_sample_rate_put),
3697 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3698 rx_cdc85_dma_rx_3_sample_rate,
3699 cdc_dma_rx_sample_rate_get,
3700 cdc_dma_rx_sample_rate_put),
3701 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3702 rx_cdc85_dma_rx_5_sample_rate,
3703 cdc_dma_rx_sample_rate_get,
3704 cdc_dma_rx_sample_rate_put),
3705};
3706
Kunlei Zhangf61a2312020-02-11 15:37:03 +0800[diff] [blame^]3707static const struct snd_kcontrol_new msm_int_wcd937x_snd_controls[] = {
3708 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3709 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3710 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3711 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3712 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3713 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3714 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3715 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3716 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3717 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3718 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3719 rx_cdc_dma_rx_0_sample_rate,
3720 cdc_dma_rx_sample_rate_get,
3721 cdc_dma_rx_sample_rate_put),
3722 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3723 rx_cdc_dma_rx_1_sample_rate,
3724 cdc_dma_rx_sample_rate_get,
3725 cdc_dma_rx_sample_rate_put),
3726 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3727 rx_cdc_dma_rx_2_sample_rate,
3728 cdc_dma_rx_sample_rate_get,
3729 cdc_dma_rx_sample_rate_put),
3730 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3731 rx_cdc_dma_rx_3_sample_rate,
3732 cdc_dma_rx_sample_rate_get,
3733 cdc_dma_rx_sample_rate_put),
3734 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3735 rx_cdc_dma_rx_5_sample_rate,
3736 cdc_dma_rx_sample_rate_get,
3737 cdc_dma_rx_sample_rate_put),
3738};
3739
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3740static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3741 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3742 usb_audio_rx_sample_rate_get,
3743 usb_audio_rx_sample_rate_put),
3744 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3745 usb_audio_tx_sample_rate_get,
3746 usb_audio_tx_sample_rate_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]3747 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3748 usb_audio_rx_format_get, usb_audio_rx_format_put),
3749 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3750 usb_audio_tx_format_get, usb_audio_tx_format_put),
3751 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3752 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3753 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3754 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3755 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3756 proxy_rx_ch_get, proxy_rx_ch_put),
3757 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3758 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3759 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3760 ext_disp_rx_format_get, ext_disp_rx_format_put),
3761 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3762 ext_disp_rx_sample_rate_get,
3763 ext_disp_rx_sample_rate_put),
3764 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3765 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3766 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3767 ext_disp_rx_format_get, ext_disp_rx_format_put),
3768 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3769 ext_disp_rx_sample_rate_get,
3770 ext_disp_rx_sample_rate_put),
3771 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3772 msm_bt_sample_rate_get,
3773 msm_bt_sample_rate_put),
3774 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3775 msm_bt_sample_rate_rx_get,
3776 msm_bt_sample_rate_rx_put),
3777 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3778 msm_bt_sample_rate_tx_get,
3779 msm_bt_sample_rate_tx_put),
3780 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3781 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3782 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3783 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3784};
3785
3786static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3787 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3788 tdm_rx_sample_rate_get,
3789 tdm_rx_sample_rate_put),
3790 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3791 tdm_rx_sample_rate_get,
3792 tdm_rx_sample_rate_put),
3793 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3794 tdm_rx_sample_rate_get,
3795 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3796 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3797 tdm_rx_sample_rate_get,
3798 tdm_rx_sample_rate_put),
3799 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3800 tdm_rx_sample_rate_get,
3801 tdm_rx_sample_rate_put),
3802 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3803 tdm_rx_sample_rate_get,
3804 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3805 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3806 tdm_tx_sample_rate_get,
3807 tdm_tx_sample_rate_put),
3808 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3809 tdm_tx_sample_rate_get,
3810 tdm_tx_sample_rate_put),
3811 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3812 tdm_tx_sample_rate_get,
3813 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3814 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3815 tdm_tx_sample_rate_get,
3816 tdm_tx_sample_rate_put),
3817 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3818 tdm_tx_sample_rate_get,
3819 tdm_tx_sample_rate_put),
3820 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3821 tdm_tx_sample_rate_get,
3822 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3823 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3824 tdm_rx_format_get,
3825 tdm_rx_format_put),
3826 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3827 tdm_rx_format_get,
3828 tdm_rx_format_put),
3829 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3830 tdm_rx_format_get,
3831 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3832 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3833 tdm_rx_format_get,
3834 tdm_rx_format_put),
3835 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3836 tdm_rx_format_get,
3837 tdm_rx_format_put),
3838 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3839 tdm_rx_format_get,
3840 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3841 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3842 tdm_tx_format_get,
3843 tdm_tx_format_put),
3844 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3845 tdm_tx_format_get,
3846 tdm_tx_format_put),
3847 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3848 tdm_tx_format_get,
3849 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3850 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3851 tdm_tx_format_get,
3852 tdm_tx_format_put),
3853 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3854 tdm_tx_format_get,
3855 tdm_tx_format_put),
3856 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3857 tdm_tx_format_get,
3858 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3859 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3860 tdm_rx_ch_get,
3861 tdm_rx_ch_put),
3862 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3863 tdm_rx_ch_get,
3864 tdm_rx_ch_put),
3865 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3866 tdm_rx_ch_get,
3867 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3868 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3869 tdm_rx_ch_get,
3870 tdm_rx_ch_put),
3871 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3872 tdm_rx_ch_get,
3873 tdm_rx_ch_put),
3874 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3875 tdm_rx_ch_get,
3876 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3877 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3878 tdm_tx_ch_get,
3879 tdm_tx_ch_put),
3880 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3881 tdm_tx_ch_get,
3882 tdm_tx_ch_put),
3883 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3884 tdm_tx_ch_get,
3885 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3886 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3887 tdm_tx_ch_get,
3888 tdm_tx_ch_put),
3889 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3890 tdm_tx_ch_get,
3891 tdm_tx_ch_put),
3892 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3893 tdm_tx_ch_get,
3894 tdm_tx_ch_put),
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]3895 SOC_SINGLE_MULTI_EXT("TDM Slot Map", SND_SOC_NOPM, 0, 255, 0,
3896 TDM_MAX_SLOTS + MAX_PATH, NULL, tdm_slot_map_put),
3897};
3898
3899static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
3900 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3901 aux_pcm_rx_sample_rate_get,
3902 aux_pcm_rx_sample_rate_put),
3903 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3904 aux_pcm_rx_sample_rate_get,
3905 aux_pcm_rx_sample_rate_put),
3906 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3907 aux_pcm_rx_sample_rate_get,
3908 aux_pcm_rx_sample_rate_put),
3909 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3910 aux_pcm_rx_sample_rate_get,
3911 aux_pcm_rx_sample_rate_put),
3912 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3913 aux_pcm_rx_sample_rate_get,
3914 aux_pcm_rx_sample_rate_put),
3915 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3916 aux_pcm_rx_sample_rate_get,
3917 aux_pcm_rx_sample_rate_put),
3918 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3919 aux_pcm_tx_sample_rate_get,
3920 aux_pcm_tx_sample_rate_put),
3921 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3922 aux_pcm_tx_sample_rate_get,
3923 aux_pcm_tx_sample_rate_put),
3924 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3925 aux_pcm_tx_sample_rate_get,
3926 aux_pcm_tx_sample_rate_put),
3927 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3928 aux_pcm_tx_sample_rate_get,
3929 aux_pcm_tx_sample_rate_put),
3930 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3931 aux_pcm_tx_sample_rate_get,
3932 aux_pcm_tx_sample_rate_put),
3933 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3934 aux_pcm_tx_sample_rate_get,
3935 aux_pcm_tx_sample_rate_put),
3936 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3937 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3938 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3939 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3940 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3941 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3942 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3943 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3944 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3945 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3946 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3947 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3948 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3949 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3950 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3951 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3952 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3953 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3954 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3955 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3956 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3957 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3958 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3959 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3960};
3961
3962static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
3963 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3964 mi2s_rx_sample_rate_get,
3965 mi2s_rx_sample_rate_put),
3966 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3967 mi2s_rx_sample_rate_get,
3968 mi2s_rx_sample_rate_put),
3969 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3970 mi2s_rx_sample_rate_get,
3971 mi2s_rx_sample_rate_put),
3972 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3973 mi2s_rx_sample_rate_get,
3974 mi2s_rx_sample_rate_put),
3975 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3976 mi2s_rx_sample_rate_get,
3977 mi2s_rx_sample_rate_put),
3978 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3979 mi2s_rx_sample_rate_get,
3980 mi2s_rx_sample_rate_put),
3981 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3982 mi2s_tx_sample_rate_get,
3983 mi2s_tx_sample_rate_put),
3984 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3985 mi2s_tx_sample_rate_get,
3986 mi2s_tx_sample_rate_put),
3987 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3988 mi2s_tx_sample_rate_get,
3989 mi2s_tx_sample_rate_put),
3990 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3991 mi2s_tx_sample_rate_get,
3992 mi2s_tx_sample_rate_put),
3993 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3994 mi2s_tx_sample_rate_get,
3995 mi2s_tx_sample_rate_put),
3996 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
3997 mi2s_tx_sample_rate_get,
3998 mi2s_tx_sample_rate_put),
3999 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
4000 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4001 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
4002 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4003 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
4004 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4005 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
4006 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4007 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
4008 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4009 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
4010 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
4011 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
4012 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4013 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
4014 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4015 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
4016 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4017 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
4018 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4019 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
4020 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
4021 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
4022 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4023 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
4024 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4025 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
4026 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4027 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
4028 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4029 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
4030 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4031 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
4032 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
4033 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
4034 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4035 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
4036 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4037 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
4038 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4039 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
4040 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4041 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
4042 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4043 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
4044 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
4045 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
4046 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4047};
4048
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4049static const struct snd_kcontrol_new msm_snd_controls[] = {
4050 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
4051 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
4052 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
4053 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
4054 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
4055 aux_pcm_rx_sample_rate_get,
4056 aux_pcm_rx_sample_rate_put),
4057 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
4058 aux_pcm_tx_sample_rate_get,
4059 aux_pcm_tx_sample_rate_put),
4060};
4061
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4062static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4063{
4064 int idx;
4065
4066 switch (be_id) {
4067 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4068 idx = EXT_DISP_RX_IDX_DP;
4069 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4070 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
4071 idx = EXT_DISP_RX_IDX_DP1;
4072 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4073 default:
4074 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4075 idx = -EINVAL;
4076 break;
4077 }
4078
4079 return idx;
4080}
4081
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4082static int kona_send_island_va_config(int32_t be_id)
4083{
4084 int rc = 0;
4085 int port_id = 0xFFFF;
4086
4087 port_id = msm_get_port_id(be_id);
4088 if (port_id < 0) {
4089 pr_err("%s: Invalid island interface, be_id: %d\n",
4090 __func__, be_id);
4091 rc = -EINVAL;
4092 } else {
4093 /*
4094 * send island mode config
4095 * This should be the first configuration
4096 */
4097 rc = afe_send_port_island_mode(port_id);
4098 if (rc)
4099 pr_err("%s: afe send island mode failed %d\n",
4100 __func__, rc);
4101 }
4102
4103 return rc;
4104}
4105
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4106static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4107 struct snd_pcm_hw_params *params)
4108{
4109 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4110 struct snd_interval *rate = hw_param_interval(params,
4111 SNDRV_PCM_HW_PARAM_RATE);
4112 struct snd_interval *channels = hw_param_interval(params,
4113 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4114 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4115
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4116 pr_debug("%s: dai_id= %d, format = %d, rate = %d\n",
4117 __func__, dai_link->id, params_format(params),
4118 params_rate(params));
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4119
4120 switch (dai_link->id) {
4121 case MSM_BACKEND_DAI_USB_RX:
4122 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4123 usb_rx_cfg.bit_format);
4124 rate->min = rate->max = usb_rx_cfg.sample_rate;
4125 channels->min = channels->max = usb_rx_cfg.channels;
4126 break;
4127
4128 case MSM_BACKEND_DAI_USB_TX:
4129 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4130 usb_tx_cfg.bit_format);
4131 rate->min = rate->max = usb_tx_cfg.sample_rate;
4132 channels->min = channels->max = usb_tx_cfg.channels;
4133 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4134
4135 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4136 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4137 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4138 if (idx < 0) {
4139 pr_err("%s: Incorrect ext disp idx %d\n",
4140 __func__, idx);
4141 rc = idx;
4142 goto done;
4143 }
4144
4145 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4146 ext_disp_rx_cfg[idx].bit_format);
4147 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4148 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4149 break;
4150
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4151 case MSM_BACKEND_DAI_AFE_PCM_RX:
4152 channels->min = channels->max = proxy_rx_cfg.channels;
4153 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4154 break;
4155
4156 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4157 channels->min = channels->max =
4158 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4159 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4160 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4161 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4162 break;
4163
4164 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4165 channels->min = channels->max =
4166 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4167 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4168 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4169 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4170 break;
4171
4172 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4173 channels->min = channels->max =
4174 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4175 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4176 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4177 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4178 break;
4179
4180 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4181 channels->min = channels->max =
4182 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4183 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4184 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4185 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4186 break;
4187
4188 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4189 channels->min = channels->max =
4190 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4191 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4192 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4193 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4194 break;
4195
4196 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4197 channels->min = channels->max =
4198 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4199 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4200 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4201 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4202 break;
4203
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4204 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4205 channels->min = channels->max =
4206 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4207 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4208 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4209 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4210 break;
4211
4212 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4213 channels->min = channels->max =
4214 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4215 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4216 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4217 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4218 break;
4219
4220 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4221 channels->min = channels->max =
4222 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4223 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4224 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4225 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4226 break;
4227
4228 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4229 channels->min = channels->max =
4230 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4231 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4232 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4233 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4234 break;
4235
4236 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
4237 channels->min = channels->max =
4238 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4239 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4240 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
4241 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
4242 break;
4243
4244 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
4245 channels->min = channels->max =
4246 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4247 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4248 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
4249 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
4250 break;
4251
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4252 case MSM_BACKEND_DAI_AUXPCM_RX:
4253 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4254 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4255 rate->min = rate->max =
4256 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4257 channels->min = channels->max =
4258 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4259 break;
4260
4261 case MSM_BACKEND_DAI_AUXPCM_TX:
4262 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4263 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4264 rate->min = rate->max =
4265 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4266 channels->min = channels->max =
4267 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4268 break;
4269
4270 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4271 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4272 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4273 rate->min = rate->max =
4274 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4275 channels->min = channels->max =
4276 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4277 break;
4278
4279 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4280 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4281 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4282 rate->min = rate->max =
4283 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4284 channels->min = channels->max =
4285 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4286 break;
4287
4288 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4289 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4290 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4291 rate->min = rate->max =
4292 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4293 channels->min = channels->max =
4294 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4295 break;
4296
4297 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4298 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4299 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4300 rate->min = rate->max =
4301 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4302 channels->min = channels->max =
4303 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4304 break;
4305
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4306 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4307 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4308 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4309 rate->min = rate->max =
4310 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4311 channels->min = channels->max =
4312 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4313 break;
4314
4315 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4316 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4317 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4318 rate->min = rate->max =
4319 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4320 channels->min = channels->max =
4321 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4322 break;
4323
4324 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4325 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4326 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4327 rate->min = rate->max =
4328 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4329 channels->min = channels->max =
4330 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4331 break;
4332
4333 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4334 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4335 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4336 rate->min = rate->max =
4337 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4338 channels->min = channels->max =
4339 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4340 break;
4341
4342 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4343 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4344 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4345 rate->min = rate->max =
4346 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4347 channels->min = channels->max =
4348 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4349 break;
4350
4351 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4352 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4353 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4354 rate->min = rate->max =
4355 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4356 channels->min = channels->max =
4357 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4358 break;
4359
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4360 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4361 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4362 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4363 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4364 channels->min = channels->max =
4365 mi2s_rx_cfg[PRIM_MI2S].channels;
4366 break;
4367
4368 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4369 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4370 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4371 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4372 channels->min = channels->max =
4373 mi2s_tx_cfg[PRIM_MI2S].channels;
4374 break;
4375
4376 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4377 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4378 mi2s_rx_cfg[SEC_MI2S].bit_format);
4379 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4380 channels->min = channels->max =
4381 mi2s_rx_cfg[SEC_MI2S].channels;
4382 break;
4383
4384 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4385 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4386 mi2s_tx_cfg[SEC_MI2S].bit_format);
4387 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4388 channels->min = channels->max =
4389 mi2s_tx_cfg[SEC_MI2S].channels;
4390 break;
4391
4392 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4393 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4394 mi2s_rx_cfg[TERT_MI2S].bit_format);
4395 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4396 channels->min = channels->max =
4397 mi2s_rx_cfg[TERT_MI2S].channels;
4398 break;
4399
4400 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4401 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4402 mi2s_tx_cfg[TERT_MI2S].bit_format);
4403 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4404 channels->min = channels->max =
4405 mi2s_tx_cfg[TERT_MI2S].channels;
4406 break;
4407
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4408 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4409 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4410 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4411 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4412 channels->min = channels->max =
4413 mi2s_rx_cfg[QUAT_MI2S].channels;
4414 break;
4415
4416 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4417 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4418 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4419 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4420 channels->min = channels->max =
4421 mi2s_tx_cfg[QUAT_MI2S].channels;
4422 break;
4423
4424 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4425 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4426 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4427 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4428 channels->min = channels->max =
4429 mi2s_rx_cfg[QUIN_MI2S].channels;
4430 break;
4431
4432 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4433 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4434 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4435 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4436 channels->min = channels->max =
4437 mi2s_tx_cfg[QUIN_MI2S].channels;
4438 break;
4439
4440 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4441 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4442 mi2s_rx_cfg[SEN_MI2S].bit_format);
4443 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4444 channels->min = channels->max =
4445 mi2s_rx_cfg[SEN_MI2S].channels;
4446 break;
4447
4448 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4449 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4450 mi2s_tx_cfg[SEN_MI2S].bit_format);
4451 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4452 channels->min = channels->max =
4453 mi2s_tx_cfg[SEN_MI2S].channels;
4454 break;
4455
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4456 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4457 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4458 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4459 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4460 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4461 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4462 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4463 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4464 cdc_dma_rx_cfg[idx].bit_format);
4465 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4466 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4467 break;
4468
4469 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4470 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4471 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4472 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4473 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4474 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4475 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4476 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4477 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4478 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4479 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4480 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4481 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4482 break;
4483
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4484 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +0530[diff] [blame]4485 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4486 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4487 SNDRV_PCM_FORMAT_S32_LE);
Vangala, Amarnath1b9c7892020-05-08 17:59:02 +0530[diff] [blame]4488 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4489 channels->min = channels->max = msm_vi_feed_tx_ch;
4490 break;
4491
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4492 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4493 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4494 slim_rx_cfg[SLIM_RX_7].bit_format);
4495 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4496 channels->min = channels->max =
4497 slim_rx_cfg[SLIM_RX_7].channels;
4498 break;
4499
4500 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlad7df1232019-11-29 19:39:17 +0530[diff] [blame]4501 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4502 slim_tx_cfg[SLIM_TX_7].bit_format);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4503 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4504 channels->min = channels->max =
4505 slim_tx_cfg[SLIM_TX_7].channels;
4506 break;
4507
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4508 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4509 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4510 channels->min = channels->max =
4511 slim_tx_cfg[SLIM_TX_8].channels;
4512 break;
4513
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4514 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4515 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4516 afe_loopback_tx_cfg[idx].bit_format);
4517 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4518 channels->min = channels->max =
4519 afe_loopback_tx_cfg[idx].channels;
4520 break;
4521
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4522 default:
4523 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4524 break;
4525 }
4526
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4527done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4528 return rc;
4529}
4530
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]4531static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4532{
4533 struct snd_soc_card *card = component->card;
4534 struct msm_asoc_mach_data *pdata =
4535 snd_soc_card_get_drvdata(card);
4536
4537 if (!pdata->fsa_handle)
4538 return false;
4539
4540 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4541}
4542
4543static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4544{
4545 int value = 0;
4546 bool ret = false;
4547 struct snd_soc_card *card;
4548 struct msm_asoc_mach_data *pdata;
4549
4550 if (!component) {
4551 pr_err("%s component is NULL\n", __func__);
4552 return false;
4553 }
4554 card = component->card;
4555 pdata = snd_soc_card_get_drvdata(card);
4556
4557 if (!pdata)
4558 return false;
4559
4560 if (wcd_mbhc_cfg.enable_usbc_analog)
4561 return msm_usbc_swap_gnd_mic(component, active);
4562
4563 /* if usbc is not defined, swap using us_euro_gpio_p */
4564 if (pdata->us_euro_gpio_p) {
4565 value = msm_cdc_pinctrl_get_state(
4566 pdata->us_euro_gpio_p);
4567 if (value)
4568 msm_cdc_pinctrl_select_sleep_state(
4569 pdata->us_euro_gpio_p);
4570 else
4571 msm_cdc_pinctrl_select_active_state(
4572 pdata->us_euro_gpio_p);
4573 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4574 __func__, value, !value);
4575 ret = true;
4576 }
4577
4578 return ret;
4579}
4580
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4581static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4582 struct snd_pcm_hw_params *params)
4583{
4584 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4585 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4586 int ret = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4587 int slot_width = TDM_SLOT_WIDTH_BITS;
4588 int channels, slots = TDM_MAX_SLOTS;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4589 unsigned int slot_mask, rate, clk_freq;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4590 unsigned int *slot_offset;
4591 struct tdm_dev_config *config;
4592 unsigned int path_dir = 0, interface = 0, channel_interface = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4593
4594 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4595
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4596 if (cpu_dai->id < AFE_PORT_ID_TDM_PORT_RANGE_START) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4597 pr_err("%s: dai id 0x%x not supported\n",
4598 __func__, cpu_dai->id);
4599 return -EINVAL;
4600 }
4601
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4602 /* RX or TX */
4603 path_dir = cpu_dai->id % MAX_PATH;
4604
4605 /* PRI, SEC, TERT, QUAT, QUIN, ... */
4606 interface = (cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START)
4607 / (MAX_PATH * TDM_PORT_MAX);
4608
4609 /* 0, 1, 2, .. 7 */
4610 channel_interface =
4611 ((cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START) / MAX_PATH)
4612 % TDM_PORT_MAX;
4613
4614 pr_debug("%s: path dir: %u, interface %u, channel interface %u\n",
4615 __func__, path_dir, interface, channel_interface);
4616
4617 config = ((struct tdm_dev_config *) tdm_cfg[interface]) +
4618 (path_dir * TDM_PORT_MAX) + channel_interface;
4619 slot_offset = config->tdm_slot_offset;
4620
4621 if (path_dir)
4622 channels = tdm_tx_cfg[interface][channel_interface].channels;
4623 else
4624 channels = tdm_rx_cfg[interface][channel_interface].channels;
4625
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4626 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4627 /*2 slot config - bits 0 and 1 set for the first two slots */
4628 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4629
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4630 pr_debug("%s: tdm rx slot_width %d slots %d slot_mask %x\n",
4631 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4632
4633 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4634 slots, slot_width);
4635 if (ret < 0) {
4636 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4637 __func__, ret);
4638 goto end;
4639 }
4640
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4641 pr_debug("%s: tdm rx channels: %d\n", __func__, channels);
4642
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4643 ret = snd_soc_dai_set_channel_map(cpu_dai,
4644 0, NULL, channels, slot_offset);
4645 if (ret < 0) {
4646 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4647 __func__, ret);
4648 goto end;
4649 }
4650 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4651 /*2 slot config - bits 0 and 1 set for the first two slots */
4652 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4653
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4654 pr_debug("%s: tdm tx slot_width %d slots %d slot_mask %x\n",
4655 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4656
4657 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4658 slots, slot_width);
4659 if (ret < 0) {
4660 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4661 __func__, ret);
4662 goto end;
4663 }
4664
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4665 pr_debug("%s: tdm tx channels: %d\n", __func__, channels);
4666
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4667 ret = snd_soc_dai_set_channel_map(cpu_dai,
4668 channels, slot_offset, 0, NULL);
4669 if (ret < 0) {
4670 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4671 __func__, ret);
4672 goto end;
4673 }
4674 } else {
4675 ret = -EINVAL;
4676 pr_err("%s: invalid use case, err:%d\n",
4677 __func__, ret);
4678 goto end;
4679 }
4680
4681 rate = params_rate(params);
4682 clk_freq = rate * slot_width * slots;
4683 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4684 if (ret < 0)
4685 pr_err("%s: failed to set tdm clk, err:%d\n",
4686 __func__, ret);
4687
4688end:
4689 return ret;
4690}
4691
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4692static int msm_get_tdm_mode(u32 port_id)
4693{
4694 int tdm_mode;
4695
4696 switch (port_id) {
4697 case AFE_PORT_ID_PRIMARY_TDM_RX:
4698 case AFE_PORT_ID_PRIMARY_TDM_TX:
4699 tdm_mode = TDM_PRI;
4700 break;
4701 case AFE_PORT_ID_SECONDARY_TDM_RX:
4702 case AFE_PORT_ID_SECONDARY_TDM_TX:
4703 tdm_mode = TDM_SEC;
4704 break;
4705 case AFE_PORT_ID_TERTIARY_TDM_RX:
4706 case AFE_PORT_ID_TERTIARY_TDM_TX:
4707 tdm_mode = TDM_TERT;
4708 break;
4709 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4710 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4711 tdm_mode = TDM_QUAT;
4712 break;
4713 case AFE_PORT_ID_QUINARY_TDM_RX:
4714 case AFE_PORT_ID_QUINARY_TDM_TX:
4715 tdm_mode = TDM_QUIN;
4716 break;
4717 case AFE_PORT_ID_SENARY_TDM_RX:
4718 case AFE_PORT_ID_SENARY_TDM_TX:
4719 tdm_mode = TDM_SEN;
4720 break;
4721 default:
4722 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4723 tdm_mode = -EINVAL;
4724 }
4725 return tdm_mode;
4726}
4727
4728static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4729{
4730 int ret = 0;
4731 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4732 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4733 struct snd_soc_card *card = rtd->card;
4734 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4735 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4736
4737 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4738 ret = -EINVAL;
4739 pr_err("%s: Invalid TDM interface %d\n",
4740 __func__, ret);
4741 return ret;
4742 }
4743
4744 if (pdata->mi2s_gpio_p[tdm_mode]) {
4745 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4746 == 0) {
4747 ret = msm_cdc_pinctrl_select_active_state(
4748 pdata->mi2s_gpio_p[tdm_mode]);
4749 if (ret) {
4750 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4751 __func__, ret);
4752 goto done;
4753 }
4754 }
4755 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4756 }
4757
4758done:
4759 return ret;
4760}
4761
4762static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4763{
4764 int ret = 0;
4765 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4766 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4767 struct snd_soc_card *card = rtd->card;
4768 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4769 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4770
4771 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4772 ret = -EINVAL;
4773 pr_err("%s: Invalid TDM interface %d\n",
4774 __func__, ret);
4775 return;
4776 }
4777
4778 if (pdata->mi2s_gpio_p[tdm_mode]) {
4779 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4780 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4781 == 0) {
4782 ret = msm_cdc_pinctrl_select_sleep_state(
4783 pdata->mi2s_gpio_p[tdm_mode]);
4784 if (ret)
4785 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4786 __func__, ret);
4787 }
4788 }
4789}
4790
4791static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4792{
4793 int ret = 0;
4794 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4795 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4796 struct snd_soc_card *card = rtd->card;
4797 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4798 u32 aux_mode = cpu_dai->id - 1;
4799
4800 if (aux_mode >= AUX_PCM_MAX) {
4801 ret = -EINVAL;
4802 pr_err("%s: Invalid AUX interface %d\n",
4803 __func__, ret);
4804 return ret;
4805 }
4806
4807 if (pdata->mi2s_gpio_p[aux_mode]) {
4808 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4809 == 0) {
4810 ret = msm_cdc_pinctrl_select_active_state(
4811 pdata->mi2s_gpio_p[aux_mode]);
4812 if (ret) {
4813 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4814 __func__, ret);
4815 goto done;
4816 }
4817 }
4818 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4819 }
4820
4821done:
4822 return ret;
4823}
4824
4825static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4826{
4827 int ret = 0;
4828 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4829 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4830 struct snd_soc_card *card = rtd->card;
4831 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4832 u32 aux_mode = cpu_dai->id - 1;
4833
4834 if (aux_mode >= AUX_PCM_MAX) {
4835 pr_err("%s: Invalid AUX interface %d\n",
4836 __func__, ret);
4837 return;
4838 }
4839
4840 if (pdata->mi2s_gpio_p[aux_mode]) {
4841 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4842 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4843 == 0) {
4844 ret = msm_cdc_pinctrl_select_sleep_state(
4845 pdata->mi2s_gpio_p[aux_mode]);
4846 if (ret)
4847 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4848 __func__, ret);
4849 }
4850 }
4851}
4852
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4853static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4854{
4855 int ret = 0;
4856 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4857 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4858
4859 switch (dai_link->id) {
4860 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4861 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4862 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4863 ret = kona_send_island_va_config(dai_link->id);
4864 if (ret)
4865 pr_err("%s: send island va cfg failed, err: %d\n",
4866 __func__, ret);
4867 break;
4868 }
4869
4870 return ret;
4871}
4872
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4873static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4874 struct snd_pcm_hw_params *params)
4875{
4876 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4877 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4878 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4879 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4880
4881 int ret = 0;
4882 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4883 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4884 u32 user_set_tx_ch = 0;
4885 u32 user_set_rx_ch = 0;
4886 u32 ch_id;
4887
4888 ret = snd_soc_dai_get_channel_map(codec_dai,
4889 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4890 &rx_ch_cdc_dma);
4891 if (ret < 0) {
4892 pr_err("%s: failed to get codec chan map, err:%d\n",
4893 __func__, ret);
4894 goto err;
4895 }
4896
4897 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4898 switch (dai_link->id) {
4899 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4900 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4901 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4902 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4903 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4904 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4905 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4906 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4907 {
4908 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4909 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4910 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4911 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4912 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4913 user_set_rx_ch, &rx_ch_cdc_dma);
4914 if (ret < 0) {
4915 pr_err("%s: failed to set cpu chan map, err:%d\n",
4916 __func__, ret);
4917 goto err;
4918 }
4919
4920 }
4921 break;
4922 }
4923 } else {
4924 switch (dai_link->id) {
4925 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4926 {
4927 user_set_tx_ch = msm_vi_feed_tx_ch;
4928 }
4929 break;
4930 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4931 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4932 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4933 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4934 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4935 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4936 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4937 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4938 {
4939 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4940 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4941 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4942 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4943 }
4944 break;
4945 }
4946
4947 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4948 &tx_ch_cdc_dma, 0, 0);
4949 if (ret < 0) {
4950 pr_err("%s: failed to set cpu chan map, err:%d\n",
4951 __func__, ret);
4952 goto err;
4953 }
4954 }
4955
4956err:
4957 return ret;
4958}
4959
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4960static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4961{
4962 cpumask_t mask;
4963
4964 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4965 pm_qos_remove_request(&substream->latency_pm_qos_req);
4966
4967 cpumask_clear(&mask);
4968 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4969 cpumask_set_cpu(2, &mask); /* affine to core 2 */
4970 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
4971
4972 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
4973
4974 pm_qos_add_request(&substream->latency_pm_qos_req,
4975 PM_QOS_CPU_DMA_LATENCY,
4976 MSM_LL_QOS_VALUE);
4977 return 0;
4978}
4979
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]4980void mi2s_disable_audio_vote(struct snd_pcm_substream *substream)
4981{
4982 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4983 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4984 int index = cpu_dai->id;
4985 struct snd_soc_card *card = rtd->card;
4986 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4987 int sample_rate = 0;
4988
4989 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4990 sample_rate = mi2s_rx_cfg[index].sample_rate;
4991 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4992 sample_rate = mi2s_tx_cfg[index].sample_rate;
4993 } else {
4994 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
4995 return;
4996 }
4997
4998 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
4999 if (pdata->lpass_audio_hw_vote != NULL) {
5000 if (--pdata->core_audio_vote_count == 0) {
5001 clk_disable_unprepare(
5002 pdata->lpass_audio_hw_vote);
5003 } else if (pdata->core_audio_vote_count < 0) {
5004 pr_err("%s: audio vote mismatch\n", __func__);
5005 pdata->core_audio_vote_count = 0;
5006 }
5007 } else {
5008 pr_err("%s: Invalid lpass audio hw node\n", __func__);
5009 }
5010 }
5011}
5012
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5013static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5014{
5015 int ret = 0;
5016 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5017 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5018 int index = cpu_dai->id;
5019 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5020 struct snd_soc_card *card = rtd->card;
5021 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5022 int sample_rate = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5023
5024 dev_dbg(rtd->card->dev,
5025 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5026 __func__, substream->name, substream->stream,
5027 cpu_dai->name, cpu_dai->id);
5028
5029 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5030 ret = -EINVAL;
5031 dev_err(rtd->card->dev,
5032 "%s: CPU DAI id (%d) out of range\n",
5033 __func__, cpu_dai->id);
5034 goto err;
5035 }
5036 /*
5037 * Mutex protection in case the same MI2S
5038 * interface using for both TX and RX so
5039 * that the same clock won't be enable twice.
5040 */
5041 mutex_lock(&mi2s_intf_conf[index].lock);
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5042 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5043 sample_rate = mi2s_rx_cfg[index].sample_rate;
5044 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5045 sample_rate = mi2s_tx_cfg[index].sample_rate;
5046 } else {
5047 pr_err("%s: invalid stream %d\n", __func__, substream->stream);
5048 ret = -EINVAL;
5049 goto vote_err;
5050 }
5051
5052 if (IS_MSM_INTERFACE_MI2S(index) && IS_FRACTIONAL(sample_rate)) {
5053 if (pdata->lpass_audio_hw_vote == NULL) {
5054 dev_err(rtd->card->dev, "%s: Invalid lpass audio hw node\n",
5055 __func__);
5056 ret = -EINVAL;
5057 goto vote_err;
5058 }
5059 if (pdata->core_audio_vote_count == 0) {
5060 ret = clk_prepare_enable(pdata->lpass_audio_hw_vote);
5061 if (ret < 0) {
5062 dev_err(rtd->card->dev, "%s: audio vote error\n",
5063 __func__);
5064 goto vote_err;
5065 }
5066 }
5067 pdata->core_audio_vote_count++;
5068 }
5069
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5070 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5071 /* Check if msm needs to provide the clock to the interface */
5072 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5073 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5074 fmt = SND_SOC_DAIFMT_CBM_CFM;
5075 }
5076 ret = msm_mi2s_set_sclk(substream, true);
5077 if (ret < 0) {
5078 dev_err(rtd->card->dev,
5079 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5080 __func__, ret);
5081 goto clean_up;
5082 }
5083
5084 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5085 if (ret < 0) {
5086 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5087 __func__, index, ret);
5088 goto clk_off;
5089 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5090 if (pdata->mi2s_gpio_p[index]) {
5091 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5092 == 0) {
5093 ret = msm_cdc_pinctrl_select_active_state(
5094 pdata->mi2s_gpio_p[index]);
5095 if (ret) {
5096 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
5097 __func__, ret);
5098 goto clk_off;
5099 }
5100 }
5101 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
5102 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5103 }
5104clk_off:
5105 if (ret < 0)
5106 msm_mi2s_set_sclk(substream, false);
5107clean_up:
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5108 if (ret < 0) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5109 mi2s_intf_conf[index].ref_cnt--;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5110 mi2s_disable_audio_vote(substream);
5111 }
5112vote_err:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5113 mutex_unlock(&mi2s_intf_conf[index].lock);
5114err:
5115 return ret;
5116}
5117
5118static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5119{
5120 int ret = 0;
5121 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5122 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5123 struct snd_soc_card *card = rtd->card;
5124 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5125
5126 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5127 substream->name, substream->stream);
5128 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5129 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5130 return;
5131 }
5132
5133 mutex_lock(&mi2s_intf_conf[index].lock);
5134 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5135 if (pdata->mi2s_gpio_p[index]) {
5136 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
5137 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
5138 == 0) {
5139 ret = msm_cdc_pinctrl_select_sleep_state(
5140 pdata->mi2s_gpio_p[index]);
5141 if (ret)
5142 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
5143 __func__, ret);
5144 }
5145 }
5146
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5147 ret = msm_mi2s_set_sclk(substream, false);
5148 if (ret < 0)
5149 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5150 __func__, index, ret);
5151 }
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]5152 mi2s_disable_audio_vote(substream);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5153 mutex_unlock(&mi2s_intf_conf[index].lock);
5154}
5155
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5156static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
5157 struct snd_pcm_hw_params *params)
5158{
5159 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5160 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5161 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5162 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5163 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
5164 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5165 int ret = 0;
5166
5167 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5168 codec_dai->name, codec_dai->id);
5169 ret = snd_soc_dai_get_channel_map(codec_dai,
5170 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5171 if (ret) {
5172 dev_err(rtd->dev,
5173 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5174 __func__, ret);
5175 goto err;
5176 }
5177
5178 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5179 __func__, tx_ch_cnt, dai_link->id);
5180
5181 ret = snd_soc_dai_set_channel_map(cpu_dai,
5182 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5183 if (ret)
5184 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5185 __func__, ret);
5186
5187err:
5188 return ret;
5189}
5190
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5191static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5192 struct snd_pcm_hw_params *params)
5193{
5194 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5195 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5196 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5197 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5198 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5199 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5200 int ret = 0;
5201
5202 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5203 codec_dai->name, codec_dai->id);
5204 ret = snd_soc_dai_get_channel_map(codec_dai,
5205 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5206 if (ret) {
5207 dev_err(rtd->dev,
5208 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5209 __func__, ret);
5210 goto err;
5211 }
5212
5213 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5214 __func__, tx_ch_cnt, dai_link->id);
5215
5216 ret = snd_soc_dai_set_channel_map(cpu_dai,
5217 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5218 if (ret)
5219 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5220 __func__, ret);
5221
5222err:
5223 return ret;
5224}
5225
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5226static struct snd_soc_ops kona_aux_be_ops = {
5227 .startup = kona_aux_snd_startup,
5228 .shutdown = kona_aux_snd_shutdown
5229};
5230
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5231static struct snd_soc_ops kona_tdm_be_ops = {
5232 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5233 .startup = kona_tdm_snd_startup,
5234 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5235};
5236
5237static struct snd_soc_ops msm_mi2s_be_ops = {
5238 .startup = msm_mi2s_snd_startup,
5239 .shutdown = msm_mi2s_snd_shutdown,
5240};
5241
5242static struct snd_soc_ops msm_fe_qos_ops = {
5243 .prepare = msm_fe_qos_prepare,
5244};
5245
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5246static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]5247 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5248 .hw_params = msm_snd_cdc_dma_hw_params,
5249};
5250
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5251static struct snd_soc_ops msm_wcn_ops = {
5252 .hw_params = msm_wcn_hw_params,
5253};
5254
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5255static struct snd_soc_ops msm_wcn_ops_lito = {
5256 .hw_params = msm_wcn_hw_params_lito,
5257};
5258
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5259static int msm_dmic_event(struct snd_soc_dapm_widget *w,
5260 struct snd_kcontrol *kcontrol, int event)
5261{
5262 struct msm_asoc_mach_data *pdata = NULL;
5263 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5264 int ret = 0;
5265 u32 dmic_idx;
5266 int *dmic_gpio_cnt;
5267 struct device_node *dmic_gpio;
5268 char *wname;
5269
5270 wname = strpbrk(w->name, "012345");
5271 if (!wname) {
5272 dev_err(component->dev, "%s: widget not found\n", __func__);
5273 return -EINVAL;
5274 }
5275
5276 ret = kstrtouint(wname, 10, &dmic_idx);
5277 if (ret < 0) {
5278 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
5279 __func__);
5280 return -EINVAL;
5281 }
5282
5283 pdata = snd_soc_card_get_drvdata(component->card);
5284
5285 switch (dmic_idx) {
5286 case 0:
5287 case 1:
5288 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
5289 dmic_gpio = pdata->dmic01_gpio_p;
5290 break;
5291 case 2:
5292 case 3:
5293 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
5294 dmic_gpio = pdata->dmic23_gpio_p;
5295 break;
5296 case 4:
5297 case 5:
5298 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
5299 dmic_gpio = pdata->dmic45_gpio_p;
5300 break;
5301 default:
5302 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
5303 __func__);
5304 return -EINVAL;
5305 }
5306
5307 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
5308 __func__, event, dmic_idx, *dmic_gpio_cnt);
5309
5310 switch (event) {
5311 case SND_SOC_DAPM_PRE_PMU:
5312 (*dmic_gpio_cnt)++;
5313 if (*dmic_gpio_cnt == 1) {
5314 ret = msm_cdc_pinctrl_select_active_state(
5315 dmic_gpio);
5316 if (ret < 0) {
5317 pr_err("%s: gpio set cannot be activated %sd",
5318 __func__, "dmic_gpio");
5319 return ret;
5320 }
5321 }
5322
5323 break;
5324 case SND_SOC_DAPM_POST_PMD:
5325 (*dmic_gpio_cnt)--;
5326 if (*dmic_gpio_cnt == 0) {
5327 ret = msm_cdc_pinctrl_select_sleep_state(
5328 dmic_gpio);
5329 if (ret < 0) {
5330 pr_err("%s: gpio set cannot be de-activated %sd",
5331 __func__, "dmic_gpio");
5332 return ret;
5333 }
5334 }
5335 break;
5336 default:
5337 pr_err("%s: invalid DAPM event %d\n", __func__, event);
5338 return -EINVAL;
5339 }
5340 return 0;
5341}
5342
5343static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
5344 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
5345 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
5346 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
5347 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5348 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5349 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
5350 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
5351 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
5352 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
5353 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
5354 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5355 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
5356 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5357};
5358
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5359static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5360{
5361 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5362 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5363 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5364
5365 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5366 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5367}
5368
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5369static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5370{
5371 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5372 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5373 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5374
5375 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5376 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5377}
5378
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]5379#ifndef CONFIG_TDM_DISABLE
5380static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5381{
5382 snd_soc_add_component_controls(component, msm_tdm_snd_controls,
5383 ARRAY_SIZE(msm_tdm_snd_controls));
5384}
5385#else
5386static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
5387{
5388 return;
5389}
5390#endif
5391
5392#ifndef CONFIG_MI2S_DISABLE
5393static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5394{
5395 snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
5396 ARRAY_SIZE(msm_mi2s_snd_controls));
5397}
5398#else
5399static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
5400{
5401 return;
5402}
5403#endif
5404
5405#ifndef CONFIG_AUXPCM_DISABLE
5406static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5407{
5408 snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
5409 ARRAY_SIZE(msm_auxpcm_snd_controls));
5410}
5411#else
5412static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
5413{
5414 return;
5415}
5416#endif
5417
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5418static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5419{
5420 int ret = -EINVAL;
5421 struct snd_soc_component *component;
5422 struct snd_soc_dapm_context *dapm;
5423 struct snd_card *card;
5424 struct snd_info_entry *entry;
5425 struct snd_soc_component *aux_comp;
5426 struct msm_asoc_mach_data *pdata =
5427 snd_soc_card_get_drvdata(rtd->card);
5428
5429 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5430 if (!component) {
5431 pr_err("%s: could not find component for bolero_codec\n",
5432 __func__);
5433 return ret;
5434 }
5435
5436 dapm = snd_soc_component_get_dapm(component);
5437
5438 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5439 ARRAY_SIZE(msm_int_snd_controls));
5440 if (ret < 0) {
5441 pr_err("%s: add_component_controls failed: %d\n",
5442 __func__, ret);
5443 return ret;
5444 }
5445 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5446 ARRAY_SIZE(msm_common_snd_controls));
5447 if (ret < 0) {
5448 pr_err("%s: add common snd controls failed: %d\n",
5449 __func__, ret);
5450 return ret;
5451 }
5452
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]5453 msm_add_tdm_snd_controls(component);
5454 msm_add_mi2s_snd_controls(component);
5455 msm_add_auxpcm_snd_controls(component);
5456
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5457 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5458 ARRAY_SIZE(msm_int_dapm_widgets));
5459
5460 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5461 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5462 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5463 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +0530[diff] [blame]5464 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5465 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5466 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5467 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5468
5469 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5470 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5471 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5472 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5473 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5474
5475 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5476 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5477 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5478 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5479
5480 snd_soc_dapm_sync(dapm);
5481
5482 /*
5483 * Send speaker configuration only for WSA8810.
5484 * Default configuration is for WSA8815.
5485 */
5486 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5487 __func__, rtd->card->num_aux_devs);
5488 if (rtd->card->num_aux_devs &&
5489 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5490 list_for_each_entry(aux_comp,
5491 &rtd->card->aux_comp_list,
5492 card_aux_list) {
5493 if (aux_comp->name != NULL && (
5494 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5495 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5496 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5497 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5498 wsa_macro_set_spkr_gain_offset(component,
5499 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5500 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5501 }
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]5502 if (pdata->lito_v2_enabled) {
5503 /*
5504 * Enable tx data line3 for saipan version v2 amd
5505 * write corresponding lpi register.
5506 */
5507 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map_v2),
5508 sm_port_map_v2);
5509 } else {
5510 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5511 sm_port_map);
5512 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5513 }
5514 card = rtd->card->snd_card;
5515 if (!pdata->codec_root) {
5516 entry = snd_info_create_subdir(card->module, "codecs",
5517 card->proc_root);
5518 if (!entry) {
5519 pr_debug("%s: Cannot create codecs module entry\n",
5520 __func__);
5521 ret = 0;
5522 goto err;
5523 }
5524 pdata->codec_root = entry;
5525 }
5526 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -0800[diff] [blame]5527 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5528 codec_reg_done = true;
5529 return 0;
5530err:
5531 return ret;
5532}
5533
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]5534static void *def_wcd_mbhc_cal(void)
5535{
5536 void *wcd_mbhc_cal;
5537 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5538 u16 *btn_high;
5539
5540 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5541 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5542 if (!wcd_mbhc_cal)
5543 return NULL;
5544
5545 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5546 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5547 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5548 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5549 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5550
5551 btn_high[0] = 75;
5552 btn_high[1] = 150;
5553 btn_high[2] = 237;
5554 btn_high[3] = 500;
5555 btn_high[4] = 500;
5556 btn_high[5] = 500;
5557 btn_high[6] = 500;
5558 btn_high[7] = 500;
5559
5560 return wcd_mbhc_cal;
5561}
5562
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5563/* Digital audio interface glue - connects codec <---> CPU */
5564static struct snd_soc_dai_link msm_common_dai_links[] = {
5565 /* FrontEnd DAI Links */
5566 {/* hw:x,0 */
5567 .name = MSM_DAILINK_NAME(Media1),
5568 .stream_name = "MultiMedia1",
5569 .cpu_dai_name = "MultiMedia1",
5570 .platform_name = "msm-pcm-dsp.0",
5571 .dynamic = 1,
5572 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5573 .dpcm_playback = 1,
5574 .dpcm_capture = 1,
5575 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5576 SND_SOC_DPCM_TRIGGER_POST},
5577 .codec_dai_name = "snd-soc-dummy-dai",
5578 .codec_name = "snd-soc-dummy",
5579 .ignore_suspend = 1,
5580 /* this dainlink has playback support */
5581 .ignore_pmdown_time = 1,
5582 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5583 },
5584 {/* hw:x,1 */
5585 .name = MSM_DAILINK_NAME(Media2),
5586 .stream_name = "MultiMedia2",
5587 .cpu_dai_name = "MultiMedia2",
5588 .platform_name = "msm-pcm-dsp.0",
5589 .dynamic = 1,
5590 .dpcm_playback = 1,
5591 .dpcm_capture = 1,
5592 .codec_dai_name = "snd-soc-dummy-dai",
5593 .codec_name = "snd-soc-dummy",
5594 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5595 SND_SOC_DPCM_TRIGGER_POST},
5596 .ignore_suspend = 1,
5597 /* this dainlink has playback support */
5598 .ignore_pmdown_time = 1,
5599 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5600 },
5601 {/* hw:x,2 */
5602 .name = "VoiceMMode1",
5603 .stream_name = "VoiceMMode1",
5604 .cpu_dai_name = "VoiceMMode1",
5605 .platform_name = "msm-pcm-voice",
5606 .dynamic = 1,
5607 .dpcm_playback = 1,
5608 .dpcm_capture = 1,
5609 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5610 SND_SOC_DPCM_TRIGGER_POST},
5611 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5612 .ignore_suspend = 1,
5613 .ignore_pmdown_time = 1,
5614 .codec_dai_name = "snd-soc-dummy-dai",
5615 .codec_name = "snd-soc-dummy",
5616 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5617 },
5618 {/* hw:x,3 */
5619 .name = "MSM VoIP",
5620 .stream_name = "VoIP",
5621 .cpu_dai_name = "VoIP",
5622 .platform_name = "msm-voip-dsp",
5623 .dynamic = 1,
5624 .dpcm_playback = 1,
5625 .dpcm_capture = 1,
5626 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5627 SND_SOC_DPCM_TRIGGER_POST},
5628 .codec_dai_name = "snd-soc-dummy-dai",
5629 .codec_name = "snd-soc-dummy",
5630 .ignore_suspend = 1,
5631 /* this dainlink has playback support */
5632 .ignore_pmdown_time = 1,
5633 .id = MSM_FRONTEND_DAI_VOIP,
5634 },
5635 {/* hw:x,4 */
5636 .name = MSM_DAILINK_NAME(ULL),
5637 .stream_name = "MultiMedia3",
5638 .cpu_dai_name = "MultiMedia3",
5639 .platform_name = "msm-pcm-dsp.2",
5640 .dynamic = 1,
5641 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5642 .dpcm_playback = 1,
5643 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5644 SND_SOC_DPCM_TRIGGER_POST},
5645 .codec_dai_name = "snd-soc-dummy-dai",
5646 .codec_name = "snd-soc-dummy",
5647 .ignore_suspend = 1,
5648 /* this dainlink has playback support */
5649 .ignore_pmdown_time = 1,
5650 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5651 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5652 {/* hw:x,5 */
5653 .name = "MSM AFE-PCM RX",
5654 .stream_name = "AFE-PROXY RX",
5655 .cpu_dai_name = "msm-dai-q6-dev.241",
5656 .codec_name = "msm-stub-codec.1",
5657 .codec_dai_name = "msm-stub-rx",
5658 .platform_name = "msm-pcm-afe",
5659 .dpcm_playback = 1,
5660 .ignore_suspend = 1,
5661 /* this dainlink has playback support */
5662 .ignore_pmdown_time = 1,
5663 },
5664 {/* hw:x,6 */
5665 .name = "MSM AFE-PCM TX",
5666 .stream_name = "AFE-PROXY TX",
5667 .cpu_dai_name = "msm-dai-q6-dev.240",
5668 .codec_name = "msm-stub-codec.1",
5669 .codec_dai_name = "msm-stub-tx",
5670 .platform_name = "msm-pcm-afe",
5671 .dpcm_capture = 1,
5672 .ignore_suspend = 1,
5673 },
5674 {/* hw:x,7 */
5675 .name = MSM_DAILINK_NAME(Compress1),
5676 .stream_name = "Compress1",
5677 .cpu_dai_name = "MultiMedia4",
5678 .platform_name = "msm-compress-dsp",
5679 .dynamic = 1,
5680 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5681 .dpcm_playback = 1,
5682 .dpcm_capture = 1,
5683 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5684 SND_SOC_DPCM_TRIGGER_POST},
5685 .codec_dai_name = "snd-soc-dummy-dai",
5686 .codec_name = "snd-soc-dummy",
5687 .ignore_suspend = 1,
5688 .ignore_pmdown_time = 1,
5689 /* this dainlink has playback support */
5690 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5691 },
Meng Wang197cb302019-03-01 13:54:38 +0800[diff] [blame]5692 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5693 {/* hw:x,8 */
5694 .name = "AUXPCM Hostless",
5695 .stream_name = "AUXPCM Hostless",
5696 .cpu_dai_name = "AUXPCM_HOSTLESS",
5697 .platform_name = "msm-pcm-hostless",
5698 .dynamic = 1,
5699 .dpcm_playback = 1,
5700 .dpcm_capture = 1,
5701 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5702 SND_SOC_DPCM_TRIGGER_POST},
5703 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5704 .ignore_suspend = 1,
5705 /* this dainlink has playback support */
5706 .ignore_pmdown_time = 1,
5707 .codec_dai_name = "snd-soc-dummy-dai",
5708 .codec_name = "snd-soc-dummy",
5709 },
5710 {/* hw:x,9 */
5711 .name = MSM_DAILINK_NAME(LowLatency),
5712 .stream_name = "MultiMedia5",
5713 .cpu_dai_name = "MultiMedia5",
5714 .platform_name = "msm-pcm-dsp.1",
5715 .dynamic = 1,
5716 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5717 .dpcm_playback = 1,
5718 .dpcm_capture = 1,
5719 .codec_dai_name = "snd-soc-dummy-dai",
5720 .codec_name = "snd-soc-dummy",
5721 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5722 SND_SOC_DPCM_TRIGGER_POST},
5723 .ignore_suspend = 1,
5724 /* this dainlink has playback support */
5725 .ignore_pmdown_time = 1,
5726 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5727 .ops = &msm_fe_qos_ops,
5728 },
5729 {/* hw:x,10 */
5730 .name = "Listen 1 Audio Service",
5731 .stream_name = "Listen 1 Audio Service",
5732 .cpu_dai_name = "LSM1",
5733 .platform_name = "msm-lsm-client",
5734 .dynamic = 1,
5735 .dpcm_capture = 1,
5736 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5737 SND_SOC_DPCM_TRIGGER_POST },
5738 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5739 .ignore_suspend = 1,
5740 .codec_dai_name = "snd-soc-dummy-dai",
5741 .codec_name = "snd-soc-dummy",
5742 .id = MSM_FRONTEND_DAI_LSM1,
5743 },
5744 /* Multiple Tunnel instances */
5745 {/* hw:x,11 */
5746 .name = MSM_DAILINK_NAME(Compress2),
5747 .stream_name = "Compress2",
5748 .cpu_dai_name = "MultiMedia7",
5749 .platform_name = "msm-compress-dsp",
5750 .dynamic = 1,
5751 .dpcm_playback = 1,
5752 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5753 SND_SOC_DPCM_TRIGGER_POST},
5754 .codec_dai_name = "snd-soc-dummy-dai",
5755 .codec_name = "snd-soc-dummy",
5756 .ignore_suspend = 1,
5757 .ignore_pmdown_time = 1,
5758 /* this dainlink has playback support */
5759 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5760 },
5761 {/* hw:x,12 */
5762 .name = MSM_DAILINK_NAME(MultiMedia10),
5763 .stream_name = "MultiMedia10",
5764 .cpu_dai_name = "MultiMedia10",
5765 .platform_name = "msm-pcm-dsp.1",
5766 .dynamic = 1,
5767 .dpcm_playback = 1,
5768 .dpcm_capture = 1,
5769 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5770 SND_SOC_DPCM_TRIGGER_POST},
5771 .codec_dai_name = "snd-soc-dummy-dai",
5772 .codec_name = "snd-soc-dummy",
5773 .ignore_suspend = 1,
5774 .ignore_pmdown_time = 1,
5775 /* this dainlink has playback support */
5776 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5777 },
5778 {/* hw:x,13 */
5779 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5780 .stream_name = "MM_NOIRQ",
5781 .cpu_dai_name = "MultiMedia8",
5782 .platform_name = "msm-pcm-dsp-noirq",
5783 .dynamic = 1,
5784 .dpcm_playback = 1,
5785 .dpcm_capture = 1,
5786 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5787 SND_SOC_DPCM_TRIGGER_POST},
5788 .codec_dai_name = "snd-soc-dummy-dai",
5789 .codec_name = "snd-soc-dummy",
5790 .ignore_suspend = 1,
5791 .ignore_pmdown_time = 1,
5792 /* this dainlink has playback support */
5793 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5794 .ops = &msm_fe_qos_ops,
5795 },
5796 /* HDMI Hostless */
5797 {/* hw:x,14 */
5798 .name = "HDMI_RX_HOSTLESS",
5799 .stream_name = "HDMI_RX_HOSTLESS",
5800 .cpu_dai_name = "HDMI_HOSTLESS",
5801 .platform_name = "msm-pcm-hostless",
5802 .dynamic = 1,
5803 .dpcm_playback = 1,
5804 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5805 SND_SOC_DPCM_TRIGGER_POST},
5806 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5807 .ignore_suspend = 1,
5808 .ignore_pmdown_time = 1,
5809 .codec_dai_name = "snd-soc-dummy-dai",
5810 .codec_name = "snd-soc-dummy",
5811 },
5812 {/* hw:x,15 */
5813 .name = "VoiceMMode2",
5814 .stream_name = "VoiceMMode2",
5815 .cpu_dai_name = "VoiceMMode2",
5816 .platform_name = "msm-pcm-voice",
5817 .dynamic = 1,
5818 .dpcm_playback = 1,
5819 .dpcm_capture = 1,
5820 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5821 SND_SOC_DPCM_TRIGGER_POST},
5822 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5823 .ignore_suspend = 1,
5824 .ignore_pmdown_time = 1,
5825 .codec_dai_name = "snd-soc-dummy-dai",
5826 .codec_name = "snd-soc-dummy",
5827 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5828 },
5829 /* LSM FE */
5830 {/* hw:x,16 */
5831 .name = "Listen 2 Audio Service",
5832 .stream_name = "Listen 2 Audio Service",
5833 .cpu_dai_name = "LSM2",
5834 .platform_name = "msm-lsm-client",
5835 .dynamic = 1,
5836 .dpcm_capture = 1,
5837 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5838 SND_SOC_DPCM_TRIGGER_POST },
5839 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5840 .ignore_suspend = 1,
5841 .codec_dai_name = "snd-soc-dummy-dai",
5842 .codec_name = "snd-soc-dummy",
5843 .id = MSM_FRONTEND_DAI_LSM2,
5844 },
5845 {/* hw:x,17 */
5846 .name = "Listen 3 Audio Service",
5847 .stream_name = "Listen 3 Audio Service",
5848 .cpu_dai_name = "LSM3",
5849 .platform_name = "msm-lsm-client",
5850 .dynamic = 1,
5851 .dpcm_capture = 1,
5852 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5853 SND_SOC_DPCM_TRIGGER_POST },
5854 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5855 .ignore_suspend = 1,
5856 .codec_dai_name = "snd-soc-dummy-dai",
5857 .codec_name = "snd-soc-dummy",
5858 .id = MSM_FRONTEND_DAI_LSM3,
5859 },
5860 {/* hw:x,18 */
5861 .name = "Listen 4 Audio Service",
5862 .stream_name = "Listen 4 Audio Service",
5863 .cpu_dai_name = "LSM4",
5864 .platform_name = "msm-lsm-client",
5865 .dynamic = 1,
5866 .dpcm_capture = 1,
5867 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5868 SND_SOC_DPCM_TRIGGER_POST },
5869 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5870 .ignore_suspend = 1,
5871 .codec_dai_name = "snd-soc-dummy-dai",
5872 .codec_name = "snd-soc-dummy",
5873 .id = MSM_FRONTEND_DAI_LSM4,
5874 },
5875 {/* hw:x,19 */
5876 .name = "Listen 5 Audio Service",
5877 .stream_name = "Listen 5 Audio Service",
5878 .cpu_dai_name = "LSM5",
5879 .platform_name = "msm-lsm-client",
5880 .dynamic = 1,
5881 .dpcm_capture = 1,
5882 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5883 SND_SOC_DPCM_TRIGGER_POST },
5884 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5885 .ignore_suspend = 1,
5886 .codec_dai_name = "snd-soc-dummy-dai",
5887 .codec_name = "snd-soc-dummy",
5888 .id = MSM_FRONTEND_DAI_LSM5,
5889 },
5890 {/* hw:x,20 */
5891 .name = "Listen 6 Audio Service",
5892 .stream_name = "Listen 6 Audio Service",
5893 .cpu_dai_name = "LSM6",
5894 .platform_name = "msm-lsm-client",
5895 .dynamic = 1,
5896 .dpcm_capture = 1,
5897 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5898 SND_SOC_DPCM_TRIGGER_POST },
5899 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5900 .ignore_suspend = 1,
5901 .codec_dai_name = "snd-soc-dummy-dai",
5902 .codec_name = "snd-soc-dummy",
5903 .id = MSM_FRONTEND_DAI_LSM6,
5904 },
5905 {/* hw:x,21 */
5906 .name = "Listen 7 Audio Service",
5907 .stream_name = "Listen 7 Audio Service",
5908 .cpu_dai_name = "LSM7",
5909 .platform_name = "msm-lsm-client",
5910 .dynamic = 1,
5911 .dpcm_capture = 1,
5912 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5913 SND_SOC_DPCM_TRIGGER_POST },
5914 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5915 .ignore_suspend = 1,
5916 .codec_dai_name = "snd-soc-dummy-dai",
5917 .codec_name = "snd-soc-dummy",
5918 .id = MSM_FRONTEND_DAI_LSM7,
5919 },
5920 {/* hw:x,22 */
5921 .name = "Listen 8 Audio Service",
5922 .stream_name = "Listen 8 Audio Service",
5923 .cpu_dai_name = "LSM8",
5924 .platform_name = "msm-lsm-client",
5925 .dynamic = 1,
5926 .dpcm_capture = 1,
5927 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5928 SND_SOC_DPCM_TRIGGER_POST },
5929 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5930 .ignore_suspend = 1,
5931 .codec_dai_name = "snd-soc-dummy-dai",
5932 .codec_name = "snd-soc-dummy",
5933 .id = MSM_FRONTEND_DAI_LSM8,
5934 },
5935 {/* hw:x,23 */
5936 .name = MSM_DAILINK_NAME(Media9),
5937 .stream_name = "MultiMedia9",
5938 .cpu_dai_name = "MultiMedia9",
5939 .platform_name = "msm-pcm-dsp.0",
5940 .dynamic = 1,
5941 .dpcm_playback = 1,
5942 .dpcm_capture = 1,
5943 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5944 SND_SOC_DPCM_TRIGGER_POST},
5945 .codec_dai_name = "snd-soc-dummy-dai",
5946 .codec_name = "snd-soc-dummy",
5947 .ignore_suspend = 1,
5948 /* this dainlink has playback support */
5949 .ignore_pmdown_time = 1,
5950 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
5951 },
5952 {/* hw:x,24 */
5953 .name = MSM_DAILINK_NAME(Compress4),
5954 .stream_name = "Compress4",
5955 .cpu_dai_name = "MultiMedia11",
5956 .platform_name = "msm-compress-dsp",
5957 .dynamic = 1,
5958 .dpcm_playback = 1,
5959 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5960 SND_SOC_DPCM_TRIGGER_POST},
5961 .codec_dai_name = "snd-soc-dummy-dai",
5962 .codec_name = "snd-soc-dummy",
5963 .ignore_suspend = 1,
5964 .ignore_pmdown_time = 1,
5965 /* this dainlink has playback support */
5966 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
5967 },
5968 {/* hw:x,25 */
5969 .name = MSM_DAILINK_NAME(Compress5),
5970 .stream_name = "Compress5",
5971 .cpu_dai_name = "MultiMedia12",
5972 .platform_name = "msm-compress-dsp",
5973 .dynamic = 1,
5974 .dpcm_playback = 1,
5975 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5976 SND_SOC_DPCM_TRIGGER_POST},
5977 .codec_dai_name = "snd-soc-dummy-dai",
5978 .codec_name = "snd-soc-dummy",
5979 .ignore_suspend = 1,
5980 .ignore_pmdown_time = 1,
5981 /* this dainlink has playback support */
5982 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
5983 },
5984 {/* hw:x,26 */
5985 .name = MSM_DAILINK_NAME(Compress6),
5986 .stream_name = "Compress6",
5987 .cpu_dai_name = "MultiMedia13",
5988 .platform_name = "msm-compress-dsp",
5989 .dynamic = 1,
5990 .dpcm_playback = 1,
5991 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5992 SND_SOC_DPCM_TRIGGER_POST},
5993 .codec_dai_name = "snd-soc-dummy-dai",
5994 .codec_name = "snd-soc-dummy",
5995 .ignore_suspend = 1,
5996 .ignore_pmdown_time = 1,
5997 /* this dainlink has playback support */
5998 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
5999 },
6000 {/* hw:x,27 */
6001 .name = MSM_DAILINK_NAME(Compress7),
6002 .stream_name = "Compress7",
6003 .cpu_dai_name = "MultiMedia14",
6004 .platform_name = "msm-compress-dsp",
6005 .dynamic = 1,
6006 .dpcm_playback = 1,
6007 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6008 SND_SOC_DPCM_TRIGGER_POST},
6009 .codec_dai_name = "snd-soc-dummy-dai",
6010 .codec_name = "snd-soc-dummy",
6011 .ignore_suspend = 1,
6012 .ignore_pmdown_time = 1,
6013 /* this dainlink has playback support */
6014 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6015 },
6016 {/* hw:x,28 */
6017 .name = MSM_DAILINK_NAME(Compress8),
6018 .stream_name = "Compress8",
6019 .cpu_dai_name = "MultiMedia15",
6020 .platform_name = "msm-compress-dsp",
6021 .dynamic = 1,
6022 .dpcm_playback = 1,
6023 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6024 SND_SOC_DPCM_TRIGGER_POST},
6025 .codec_dai_name = "snd-soc-dummy-dai",
6026 .codec_name = "snd-soc-dummy",
6027 .ignore_suspend = 1,
6028 .ignore_pmdown_time = 1,
6029 /* this dainlink has playback support */
6030 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6031 },
6032 {/* hw:x,29 */
6033 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6034 .stream_name = "MM_NOIRQ_2",
6035 .cpu_dai_name = "MultiMedia16",
6036 .platform_name = "msm-pcm-dsp-noirq",
6037 .dynamic = 1,
6038 .dpcm_playback = 1,
6039 .dpcm_capture = 1,
6040 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6041 SND_SOC_DPCM_TRIGGER_POST},
6042 .codec_dai_name = "snd-soc-dummy-dai",
6043 .codec_name = "snd-soc-dummy",
6044 .ignore_suspend = 1,
6045 .ignore_pmdown_time = 1,
6046 /* this dainlink has playback support */
6047 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -0700[diff] [blame]6048 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6049 },
6050 {/* hw:x,30 */
6051 .name = "CDC_DMA Hostless",
6052 .stream_name = "CDC_DMA Hostless",
6053 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6054 .platform_name = "msm-pcm-hostless",
6055 .dynamic = 1,
6056 .dpcm_playback = 1,
6057 .dpcm_capture = 1,
6058 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6059 SND_SOC_DPCM_TRIGGER_POST},
6060 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6061 .ignore_suspend = 1,
6062 /* this dailink has playback support */
6063 .ignore_pmdown_time = 1,
6064 .codec_dai_name = "snd-soc-dummy-dai",
6065 .codec_name = "snd-soc-dummy",
6066 },
6067 {/* hw:x,31 */
6068 .name = "TX3_CDC_DMA Hostless",
6069 .stream_name = "TX3_CDC_DMA Hostless",
6070 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6071 .platform_name = "msm-pcm-hostless",
6072 .dynamic = 1,
6073 .dpcm_capture = 1,
6074 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6075 SND_SOC_DPCM_TRIGGER_POST},
6076 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6077 .ignore_suspend = 1,
6078 .codec_dai_name = "snd-soc-dummy-dai",
6079 .codec_name = "snd-soc-dummy",
6080 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6081 {/* hw:x,32 */
6082 .name = "Tertiary MI2S TX_Hostless",
6083 .stream_name = "Tertiary MI2S_TX Hostless Capture",
6084 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
6085 .platform_name = "msm-pcm-hostless",
6086 .dynamic = 1,
6087 .dpcm_capture = 1,
6088 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6089 SND_SOC_DPCM_TRIGGER_POST},
6090 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6091 .ignore_suspend = 1,
6092 .ignore_pmdown_time = 1,
6093 .codec_dai_name = "snd-soc-dummy-dai",
6094 .codec_name = "snd-soc-dummy",
6095 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6096};
6097
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6098static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6099 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6100 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6101 .stream_name = "WSA CDC DMA0 Capture",
6102 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6103 .platform_name = "msm-pcm-hostless",
6104 .codec_name = "bolero_codec",
6105 .codec_dai_name = "wsa_macro_vifeedback",
6106 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6107 .be_hw_params_fixup = msm_be_hw_params_fixup,
6108 .ignore_suspend = 1,
6109 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6110 .ops = &msm_cdc_dma_be_ops,
6111 },
6112};
6113
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6114static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6115 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6116 .name = MSM_DAILINK_NAME(ASM Loopback),
6117 .stream_name = "MultiMedia6",
6118 .cpu_dai_name = "MultiMedia6",
6119 .platform_name = "msm-pcm-loopback",
6120 .dynamic = 1,
6121 .dpcm_playback = 1,
6122 .dpcm_capture = 1,
6123 .codec_dai_name = "snd-soc-dummy-dai",
6124 .codec_name = "snd-soc-dummy",
6125 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6126 SND_SOC_DPCM_TRIGGER_POST},
6127 .ignore_suspend = 1,
6128 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6129 .ignore_pmdown_time = 1,
6130 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6131 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6132 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6133 .name = "USB Audio Hostless",
6134 .stream_name = "USB Audio Hostless",
6135 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6136 .platform_name = "msm-pcm-hostless",
6137 .dynamic = 1,
6138 .dpcm_playback = 1,
6139 .dpcm_capture = 1,
6140 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6141 SND_SOC_DPCM_TRIGGER_POST},
6142 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6143 .ignore_suspend = 1,
6144 .ignore_pmdown_time = 1,
6145 .codec_dai_name = "snd-soc-dummy-dai",
6146 .codec_name = "snd-soc-dummy",
6147 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6148 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6149 .name = "SLIMBUS_7 Hostless",
6150 .stream_name = "SLIMBUS_7 Hostless",
6151 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
6152 .platform_name = "msm-pcm-hostless",
6153 .dynamic = 1,
6154 .dpcm_capture = 1,
6155 .dpcm_playback = 1,
6156 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6157 SND_SOC_DPCM_TRIGGER_POST},
6158 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6159 .ignore_suspend = 1,
6160 .ignore_pmdown_time = 1,
6161 .codec_dai_name = "snd-soc-dummy-dai",
6162 .codec_name = "snd-soc-dummy",
6163 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]6164 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6165 .name = "Compress Capture",
6166 .stream_name = "Compress9",
6167 .cpu_dai_name = "MultiMedia17",
6168 .platform_name = "msm-compress-dsp",
6169 .dynamic = 1,
6170 .dpcm_capture = 1,
6171 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6172 SND_SOC_DPCM_TRIGGER_POST},
6173 .codec_dai_name = "snd-soc-dummy-dai",
6174 .codec_name = "snd-soc-dummy",
6175 .ignore_suspend = 1,
6176 .ignore_pmdown_time = 1,
6177 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
6178 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6179 {/* hw:x,38 */
6180 .name = "SLIMBUS_8 Hostless",
6181 .stream_name = "SLIMBUS_8 Hostless",
6182 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6183 .platform_name = "msm-pcm-hostless",
6184 .dynamic = 1,
6185 .dpcm_capture = 1,
6186 .dpcm_playback = 1,
6187 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6188 SND_SOC_DPCM_TRIGGER_POST},
6189 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6190 .ignore_suspend = 1,
6191 .ignore_pmdown_time = 1,
6192 .codec_dai_name = "snd-soc-dummy-dai",
6193 .codec_name = "snd-soc-dummy",
6194 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -0700[diff] [blame]6195 {/* hw:x,39 */
6196 .name = LPASS_BE_TX_CDC_DMA_TX_5,
6197 .stream_name = "TX CDC DMA5 Capture",
6198 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
6199 .platform_name = "msm-pcm-hostless",
6200 .codec_name = "bolero_codec",
6201 .codec_dai_name = "tx_macro_tx3",
6202 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
6203 .be_hw_params_fixup = msm_be_hw_params_fixup,
6204 .ignore_suspend = 1,
6205 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6206 .ops = &msm_cdc_dma_be_ops,
6207 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6208};
6209
6210static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6211 /* Backend AFE DAI Links */
6212 {
6213 .name = LPASS_BE_AFE_PCM_RX,
6214 .stream_name = "AFE Playback",
6215 .cpu_dai_name = "msm-dai-q6-dev.224",
6216 .platform_name = "msm-pcm-routing",
6217 .codec_name = "msm-stub-codec.1",
6218 .codec_dai_name = "msm-stub-rx",
6219 .no_pcm = 1,
6220 .dpcm_playback = 1,
6221 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6222 .be_hw_params_fixup = msm_be_hw_params_fixup,
6223 /* this dainlink has playback support */
6224 .ignore_pmdown_time = 1,
6225 .ignore_suspend = 1,
6226 },
6227 {
6228 .name = LPASS_BE_AFE_PCM_TX,
6229 .stream_name = "AFE Capture",
6230 .cpu_dai_name = "msm-dai-q6-dev.225",
6231 .platform_name = "msm-pcm-routing",
6232 .codec_name = "msm-stub-codec.1",
6233 .codec_dai_name = "msm-stub-tx",
6234 .no_pcm = 1,
6235 .dpcm_capture = 1,
6236 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6237 .be_hw_params_fixup = msm_be_hw_params_fixup,
6238 .ignore_suspend = 1,
6239 },
6240 /* Incall Record Uplink BACK END DAI Link */
6241 {
6242 .name = LPASS_BE_INCALL_RECORD_TX,
6243 .stream_name = "Voice Uplink Capture",
6244 .cpu_dai_name = "msm-dai-q6-dev.32772",
6245 .platform_name = "msm-pcm-routing",
6246 .codec_name = "msm-stub-codec.1",
6247 .codec_dai_name = "msm-stub-tx",
6248 .no_pcm = 1,
6249 .dpcm_capture = 1,
6250 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6251 .be_hw_params_fixup = msm_be_hw_params_fixup,
6252 .ignore_suspend = 1,
6253 },
6254 /* Incall Record Downlink BACK END DAI Link */
6255 {
6256 .name = LPASS_BE_INCALL_RECORD_RX,
6257 .stream_name = "Voice Downlink Capture",
6258 .cpu_dai_name = "msm-dai-q6-dev.32771",
6259 .platform_name = "msm-pcm-routing",
6260 .codec_name = "msm-stub-codec.1",
6261 .codec_dai_name = "msm-stub-tx",
6262 .no_pcm = 1,
6263 .dpcm_capture = 1,
6264 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6265 .be_hw_params_fixup = msm_be_hw_params_fixup,
6266 .ignore_suspend = 1,
6267 },
6268 /* Incall Music BACK END DAI Link */
6269 {
6270 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6271 .stream_name = "Voice Farend Playback",
6272 .cpu_dai_name = "msm-dai-q6-dev.32773",
6273 .platform_name = "msm-pcm-routing",
6274 .codec_name = "msm-stub-codec.1",
6275 .codec_dai_name = "msm-stub-rx",
6276 .no_pcm = 1,
6277 .dpcm_playback = 1,
6278 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6279 .be_hw_params_fixup = msm_be_hw_params_fixup,
6280 .ignore_suspend = 1,
6281 .ignore_pmdown_time = 1,
6282 },
6283 /* Incall Music 2 BACK END DAI Link */
6284 {
6285 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6286 .stream_name = "Voice2 Farend Playback",
6287 .cpu_dai_name = "msm-dai-q6-dev.32770",
6288 .platform_name = "msm-pcm-routing",
6289 .codec_name = "msm-stub-codec.1",
6290 .codec_dai_name = "msm-stub-rx",
6291 .no_pcm = 1,
6292 .dpcm_playback = 1,
6293 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6294 .be_hw_params_fixup = msm_be_hw_params_fixup,
6295 .ignore_suspend = 1,
6296 .ignore_pmdown_time = 1,
6297 },
Jaideep Sharma2ef4fb22020-03-11 22:29:11 +0530[diff] [blame]6298 /* Proxy Tx BACK END DAI Link */
6299 {
6300 .name = LPASS_BE_PROXY_TX,
6301 .stream_name = "Proxy Capture",
6302 .cpu_dai_name = "msm-dai-q6-dev.8195",
6303 .platform_name = "msm-pcm-routing",
6304 .codec_name = "msm-stub-codec.1",
6305 .codec_dai_name = "msm-stub-tx",
6306 .no_pcm = 1,
6307 .dpcm_capture = 1,
6308 .id = MSM_BACKEND_DAI_PROXY_TX,
6309 .ignore_suspend = 1,
6310 },
6311 /* Proxy Rx BACK END DAI Link */
6312 {
6313 .name = LPASS_BE_PROXY_RX,
6314 .stream_name = "Proxy Playback",
6315 .cpu_dai_name = "msm-dai-q6-dev.8194",
6316 .platform_name = "msm-pcm-routing",
6317 .codec_name = "msm-stub-codec.1",
6318 .codec_dai_name = "msm-stub-rx",
6319 .no_pcm = 1,
6320 .dpcm_playback = 1,
6321 .id = MSM_BACKEND_DAI_PROXY_RX,
6322 .ignore_pmdown_time = 1,
6323 .ignore_suspend = 1,
6324 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6325 {
6326 .name = LPASS_BE_USB_AUDIO_RX,
6327 .stream_name = "USB Audio Playback",
6328 .cpu_dai_name = "msm-dai-q6-dev.28672",
6329 .platform_name = "msm-pcm-routing",
6330 .codec_name = "msm-stub-codec.1",
6331 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6332 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6333 .no_pcm = 1,
6334 .dpcm_playback = 1,
6335 .id = MSM_BACKEND_DAI_USB_RX,
6336 .be_hw_params_fixup = msm_be_hw_params_fixup,
6337 .ignore_pmdown_time = 1,
6338 .ignore_suspend = 1,
6339 },
6340 {
6341 .name = LPASS_BE_USB_AUDIO_TX,
6342 .stream_name = "USB Audio Capture",
6343 .cpu_dai_name = "msm-dai-q6-dev.28673",
6344 .platform_name = "msm-pcm-routing",
6345 .codec_name = "msm-stub-codec.1",
6346 .codec_dai_name = "msm-stub-tx",
6347 .no_pcm = 1,
6348 .dpcm_capture = 1,
6349 .id = MSM_BACKEND_DAI_USB_TX,
6350 .be_hw_params_fixup = msm_be_hw_params_fixup,
6351 .ignore_suspend = 1,
6352 },
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]6353};
6354
6355
6356static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6357 {
6358 .name = LPASS_BE_PRI_TDM_RX_0,
6359 .stream_name = "Primary TDM0 Playback",
6360 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6361 .platform_name = "msm-pcm-routing",
6362 .codec_name = "msm-stub-codec.1",
6363 .codec_dai_name = "msm-stub-rx",
6364 .no_pcm = 1,
6365 .dpcm_playback = 1,
6366 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6367 .be_hw_params_fixup = msm_be_hw_params_fixup,
6368 .ops = &kona_tdm_be_ops,
6369 .ignore_suspend = 1,
6370 .ignore_pmdown_time = 1,
6371 },
6372 {
6373 .name = LPASS_BE_PRI_TDM_TX_0,
6374 .stream_name = "Primary TDM0 Capture",
6375 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6376 .platform_name = "msm-pcm-routing",
6377 .codec_name = "msm-stub-codec.1",
6378 .codec_dai_name = "msm-stub-tx",
6379 .no_pcm = 1,
6380 .dpcm_capture = 1,
6381 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6382 .be_hw_params_fixup = msm_be_hw_params_fixup,
6383 .ops = &kona_tdm_be_ops,
6384 .ignore_suspend = 1,
6385 },
6386 {
6387 .name = LPASS_BE_SEC_TDM_RX_0,
6388 .stream_name = "Secondary TDM0 Playback",
6389 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6390 .platform_name = "msm-pcm-routing",
6391 .codec_name = "msm-stub-codec.1",
6392 .codec_dai_name = "msm-stub-rx",
6393 .no_pcm = 1,
6394 .dpcm_playback = 1,
6395 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6396 .be_hw_params_fixup = msm_be_hw_params_fixup,
6397 .ops = &kona_tdm_be_ops,
6398 .ignore_suspend = 1,
6399 .ignore_pmdown_time = 1,
6400 },
6401 {
6402 .name = LPASS_BE_SEC_TDM_TX_0,
6403 .stream_name = "Secondary TDM0 Capture",
6404 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6405 .platform_name = "msm-pcm-routing",
6406 .codec_name = "msm-stub-codec.1",
6407 .codec_dai_name = "msm-stub-tx",
6408 .no_pcm = 1,
6409 .dpcm_capture = 1,
6410 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6411 .be_hw_params_fixup = msm_be_hw_params_fixup,
6412 .ops = &kona_tdm_be_ops,
6413 .ignore_suspend = 1,
6414 },
6415 {
6416 .name = LPASS_BE_TERT_TDM_RX_0,
6417 .stream_name = "Tertiary TDM0 Playback",
6418 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6419 .platform_name = "msm-pcm-routing",
6420 .codec_name = "msm-stub-codec.1",
6421 .codec_dai_name = "msm-stub-rx",
6422 .no_pcm = 1,
6423 .dpcm_playback = 1,
6424 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6425 .be_hw_params_fixup = msm_be_hw_params_fixup,
6426 .ops = &kona_tdm_be_ops,
6427 .ignore_suspend = 1,
6428 .ignore_pmdown_time = 1,
6429 },
6430 {
6431 .name = LPASS_BE_TERT_TDM_TX_0,
6432 .stream_name = "Tertiary TDM0 Capture",
6433 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6434 .platform_name = "msm-pcm-routing",
6435 .codec_name = "msm-stub-codec.1",
6436 .codec_dai_name = "msm-stub-tx",
6437 .no_pcm = 1,
6438 .dpcm_capture = 1,
6439 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6440 .be_hw_params_fixup = msm_be_hw_params_fixup,
6441 .ops = &kona_tdm_be_ops,
6442 .ignore_suspend = 1,
6443 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6444 {
6445 .name = LPASS_BE_QUAT_TDM_RX_0,
6446 .stream_name = "Quaternary TDM0 Playback",
6447 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6448 .platform_name = "msm-pcm-routing",
6449 .codec_name = "msm-stub-codec.1",
6450 .codec_dai_name = "msm-stub-rx",
6451 .no_pcm = 1,
6452 .dpcm_playback = 1,
6453 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6454 .be_hw_params_fixup = msm_be_hw_params_fixup,
6455 .ops = &kona_tdm_be_ops,
6456 .ignore_suspend = 1,
6457 .ignore_pmdown_time = 1,
6458 },
6459 {
6460 .name = LPASS_BE_QUAT_TDM_TX_0,
6461 .stream_name = "Quaternary TDM0 Capture",
6462 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6463 .platform_name = "msm-pcm-routing",
6464 .codec_name = "msm-stub-codec.1",
6465 .codec_dai_name = "msm-stub-tx",
6466 .no_pcm = 1,
6467 .dpcm_capture = 1,
6468 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6469 .be_hw_params_fixup = msm_be_hw_params_fixup,
6470 .ops = &kona_tdm_be_ops,
6471 .ignore_suspend = 1,
6472 },
6473 {
6474 .name = LPASS_BE_QUIN_TDM_RX_0,
6475 .stream_name = "Quinary TDM0 Playback",
6476 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6477 .platform_name = "msm-pcm-routing",
6478 .codec_name = "msm-stub-codec.1",
6479 .codec_dai_name = "msm-stub-rx",
6480 .no_pcm = 1,
6481 .dpcm_playback = 1,
6482 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6483 .be_hw_params_fixup = msm_be_hw_params_fixup,
6484 .ops = &kona_tdm_be_ops,
6485 .ignore_suspend = 1,
6486 .ignore_pmdown_time = 1,
6487 },
6488 {
6489 .name = LPASS_BE_QUIN_TDM_TX_0,
6490 .stream_name = "Quinary TDM0 Capture",
6491 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6492 .platform_name = "msm-pcm-routing",
6493 .codec_name = "msm-stub-codec.1",
6494 .codec_dai_name = "msm-stub-tx",
6495 .no_pcm = 1,
6496 .dpcm_capture = 1,
6497 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6498 .be_hw_params_fixup = msm_be_hw_params_fixup,
6499 .ops = &kona_tdm_be_ops,
6500 .ignore_suspend = 1,
6501 },
6502 {
6503 .name = LPASS_BE_SEN_TDM_RX_0,
6504 .stream_name = "Senary TDM0 Playback",
6505 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6506 .platform_name = "msm-pcm-routing",
6507 .codec_name = "msm-stub-codec.1",
6508 .codec_dai_name = "msm-stub-rx",
6509 .no_pcm = 1,
6510 .dpcm_playback = 1,
6511 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6512 .be_hw_params_fixup = msm_be_hw_params_fixup,
6513 .ops = &kona_tdm_be_ops,
6514 .ignore_suspend = 1,
6515 .ignore_pmdown_time = 1,
6516 },
6517 {
6518 .name = LPASS_BE_SEN_TDM_TX_0,
6519 .stream_name = "Senary TDM0 Capture",
6520 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6521 .platform_name = "msm-pcm-routing",
6522 .codec_name = "msm-stub-codec.1",
6523 .codec_dai_name = "msm-stub-tx",
6524 .no_pcm = 1,
6525 .dpcm_capture = 1,
6526 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6527 .be_hw_params_fixup = msm_be_hw_params_fixup,
6528 .ops = &kona_tdm_be_ops,
6529 .ignore_suspend = 1,
6530 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6531};
6532
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6533static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6534 {
6535 .name = LPASS_BE_SLIMBUS_7_RX,
6536 .stream_name = "Slimbus7 Playback",
6537 .cpu_dai_name = "msm-dai-q6-dev.16398",
6538 .platform_name = "msm-pcm-routing",
6539 .codec_name = "btfmslim_slave",
6540 /* BT codec driver determines capabilities based on
6541 * dai name, bt codecdai name should always contains
6542 * supported usecase information
6543 */
6544 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6545 .no_pcm = 1,
6546 .dpcm_playback = 1,
6547 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6548 .be_hw_params_fixup = msm_be_hw_params_fixup,
6549 .init = &msm_wcn_init,
6550 .ops = &msm_wcn_ops,
6551 /* dai link has playback support */
6552 .ignore_pmdown_time = 1,
6553 .ignore_suspend = 1,
6554 },
6555 {
6556 .name = LPASS_BE_SLIMBUS_7_TX,
6557 .stream_name = "Slimbus7 Capture",
6558 .cpu_dai_name = "msm-dai-q6-dev.16399",
6559 .platform_name = "msm-pcm-routing",
6560 .codec_name = "btfmslim_slave",
6561 .codec_dai_name = "btfm_bt_sco_slim_tx",
6562 .no_pcm = 1,
6563 .dpcm_capture = 1,
6564 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6565 .be_hw_params_fixup = msm_be_hw_params_fixup,
6566 .ops = &msm_wcn_ops,
6567 .ignore_suspend = 1,
6568 },
6569};
6570
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6571static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6572 {
6573 .name = LPASS_BE_SLIMBUS_7_RX,
6574 .stream_name = "Slimbus7 Playback",
6575 .cpu_dai_name = "msm-dai-q6-dev.16398",
6576 .platform_name = "msm-pcm-routing",
6577 .codec_name = "btfmslim_slave",
6578 /* BT codec driver determines capabilities based on
6579 * dai name, bt codecdai name should always contains
6580 * supported usecase information
6581 */
6582 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6583 .no_pcm = 1,
6584 .dpcm_playback = 1,
6585 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6586 .be_hw_params_fixup = msm_be_hw_params_fixup,
6587 .init = &msm_wcn_init_lito,
6588 .ops = &msm_wcn_ops_lito,
6589 /* dai link has playback support */
6590 .ignore_pmdown_time = 1,
6591 .ignore_suspend = 1,
6592 },
6593 {
6594 .name = LPASS_BE_SLIMBUS_7_TX,
6595 .stream_name = "Slimbus7 Capture",
6596 .cpu_dai_name = "msm-dai-q6-dev.16399",
6597 .platform_name = "msm-pcm-routing",
6598 .codec_name = "btfmslim_slave",
6599 .codec_dai_name = "btfm_bt_sco_slim_tx",
6600 .no_pcm = 1,
6601 .dpcm_capture = 1,
6602 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6603 .be_hw_params_fixup = msm_be_hw_params_fixup,
6604 .ops = &msm_wcn_ops_lito,
6605 .ignore_suspend = 1,
6606 },
6607 {
6608 .name = LPASS_BE_SLIMBUS_8_TX,
6609 .stream_name = "Slimbus8 Capture",
6610 .cpu_dai_name = "msm-dai-q6-dev.16401",
6611 .platform_name = "msm-pcm-routing",
6612 .codec_name = "btfmslim_slave",
6613 .codec_dai_name = "btfm_fm_slim_tx",
6614 .no_pcm = 1,
6615 .dpcm_capture = 1,
6616 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6617 .be_hw_params_fixup = msm_be_hw_params_fixup,
6618 .ops = &msm_wcn_ops_lito,
6619 .ignore_suspend = 1,
6620 },
6621};
6622
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6623static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6624 /* DISP PORT BACK END DAI Link */
6625 {
6626 .name = LPASS_BE_DISPLAY_PORT,
6627 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6628 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6629 .platform_name = "msm-pcm-routing",
6630 .codec_name = "msm-ext-disp-audio-codec-rx",
6631 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6632 .no_pcm = 1,
6633 .dpcm_playback = 1,
6634 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6635 .be_hw_params_fixup = msm_be_hw_params_fixup,
6636 .ignore_pmdown_time = 1,
6637 .ignore_suspend = 1,
6638 },
6639 /* DISP PORT 1 BACK END DAI Link */
6640 {
6641 .name = LPASS_BE_DISPLAY_PORT1,
6642 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6643 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6644 .platform_name = "msm-pcm-routing",
6645 .codec_name = "msm-ext-disp-audio-codec-rx",
6646 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6647 .no_pcm = 1,
6648 .dpcm_playback = 1,
6649 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6650 .be_hw_params_fixup = msm_be_hw_params_fixup,
6651 .ignore_pmdown_time = 1,
6652 .ignore_suspend = 1,
6653 },
6654};
6655
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6656static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6657 {
6658 .name = LPASS_BE_PRI_MI2S_RX,
6659 .stream_name = "Primary MI2S Playback",
6660 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6661 .platform_name = "msm-pcm-routing",
6662 .codec_name = "msm-stub-codec.1",
6663 .codec_dai_name = "msm-stub-rx",
6664 .no_pcm = 1,
6665 .dpcm_playback = 1,
6666 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6667 .be_hw_params_fixup = msm_be_hw_params_fixup,
6668 .ops = &msm_mi2s_be_ops,
6669 .ignore_suspend = 1,
6670 .ignore_pmdown_time = 1,
6671 },
6672 {
6673 .name = LPASS_BE_PRI_MI2S_TX,
6674 .stream_name = "Primary MI2S Capture",
6675 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6676 .platform_name = "msm-pcm-routing",
6677 .codec_name = "msm-stub-codec.1",
6678 .codec_dai_name = "msm-stub-tx",
6679 .no_pcm = 1,
6680 .dpcm_capture = 1,
6681 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6682 .be_hw_params_fixup = msm_be_hw_params_fixup,
6683 .ops = &msm_mi2s_be_ops,
6684 .ignore_suspend = 1,
6685 },
6686 {
6687 .name = LPASS_BE_SEC_MI2S_RX,
6688 .stream_name = "Secondary MI2S Playback",
6689 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6690 .platform_name = "msm-pcm-routing",
6691 .codec_name = "msm-stub-codec.1",
6692 .codec_dai_name = "msm-stub-rx",
6693 .no_pcm = 1,
6694 .dpcm_playback = 1,
6695 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6696 .be_hw_params_fixup = msm_be_hw_params_fixup,
6697 .ops = &msm_mi2s_be_ops,
6698 .ignore_suspend = 1,
6699 .ignore_pmdown_time = 1,
6700 },
6701 {
6702 .name = LPASS_BE_SEC_MI2S_TX,
6703 .stream_name = "Secondary MI2S Capture",
6704 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6705 .platform_name = "msm-pcm-routing",
6706 .codec_name = "msm-stub-codec.1",
6707 .codec_dai_name = "msm-stub-tx",
6708 .no_pcm = 1,
6709 .dpcm_capture = 1,
6710 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6711 .be_hw_params_fixup = msm_be_hw_params_fixup,
6712 .ops = &msm_mi2s_be_ops,
6713 .ignore_suspend = 1,
6714 },
6715 {
6716 .name = LPASS_BE_TERT_MI2S_RX,
6717 .stream_name = "Tertiary MI2S Playback",
6718 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6719 .platform_name = "msm-pcm-routing",
6720 .codec_name = "msm-stub-codec.1",
6721 .codec_dai_name = "msm-stub-rx",
6722 .no_pcm = 1,
6723 .dpcm_playback = 1,
6724 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6725 .be_hw_params_fixup = msm_be_hw_params_fixup,
6726 .ops = &msm_mi2s_be_ops,
6727 .ignore_suspend = 1,
6728 .ignore_pmdown_time = 1,
6729 },
6730 {
6731 .name = LPASS_BE_TERT_MI2S_TX,
6732 .stream_name = "Tertiary MI2S Capture",
6733 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6734 .platform_name = "msm-pcm-routing",
6735 .codec_name = "msm-stub-codec.1",
6736 .codec_dai_name = "msm-stub-tx",
6737 .no_pcm = 1,
6738 .dpcm_capture = 1,
6739 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6740 .be_hw_params_fixup = msm_be_hw_params_fixup,
6741 .ops = &msm_mi2s_be_ops,
6742 .ignore_suspend = 1,
6743 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6744 {
6745 .name = LPASS_BE_QUAT_MI2S_RX,
6746 .stream_name = "Quaternary MI2S Playback",
6747 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6748 .platform_name = "msm-pcm-routing",
6749 .codec_name = "msm-stub-codec.1",
6750 .codec_dai_name = "msm-stub-rx",
6751 .no_pcm = 1,
6752 .dpcm_playback = 1,
6753 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6754 .be_hw_params_fixup = msm_be_hw_params_fixup,
6755 .ops = &msm_mi2s_be_ops,
6756 .ignore_suspend = 1,
6757 .ignore_pmdown_time = 1,
6758 },
6759 {
6760 .name = LPASS_BE_QUAT_MI2S_TX,
6761 .stream_name = "Quaternary MI2S Capture",
6762 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6763 .platform_name = "msm-pcm-routing",
6764 .codec_name = "msm-stub-codec.1",
6765 .codec_dai_name = "msm-stub-tx",
6766 .no_pcm = 1,
6767 .dpcm_capture = 1,
6768 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6769 .be_hw_params_fixup = msm_be_hw_params_fixup,
6770 .ops = &msm_mi2s_be_ops,
6771 .ignore_suspend = 1,
6772 },
6773 {
6774 .name = LPASS_BE_QUIN_MI2S_RX,
6775 .stream_name = "Quinary MI2S Playback",
6776 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6777 .platform_name = "msm-pcm-routing",
6778 .codec_name = "msm-stub-codec.1",
6779 .codec_dai_name = "msm-stub-rx",
6780 .no_pcm = 1,
6781 .dpcm_playback = 1,
6782 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6783 .be_hw_params_fixup = msm_be_hw_params_fixup,
6784 .ops = &msm_mi2s_be_ops,
6785 .ignore_suspend = 1,
6786 .ignore_pmdown_time = 1,
6787 },
6788 {
6789 .name = LPASS_BE_QUIN_MI2S_TX,
6790 .stream_name = "Quinary MI2S Capture",
6791 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6792 .platform_name = "msm-pcm-routing",
6793 .codec_name = "msm-stub-codec.1",
6794 .codec_dai_name = "msm-stub-tx",
6795 .no_pcm = 1,
6796 .dpcm_capture = 1,
6797 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6798 .be_hw_params_fixup = msm_be_hw_params_fixup,
6799 .ops = &msm_mi2s_be_ops,
6800 .ignore_suspend = 1,
6801 },
6802 {
6803 .name = LPASS_BE_SENARY_MI2S_RX,
6804 .stream_name = "Senary MI2S Playback",
6805 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6806 .platform_name = "msm-pcm-routing",
6807 .codec_name = "msm-stub-codec.1",
6808 .codec_dai_name = "msm-stub-rx",
6809 .no_pcm = 1,
6810 .dpcm_playback = 1,
6811 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6812 .be_hw_params_fixup = msm_be_hw_params_fixup,
6813 .ops = &msm_mi2s_be_ops,
6814 .ignore_suspend = 1,
6815 .ignore_pmdown_time = 1,
6816 },
6817 {
6818 .name = LPASS_BE_SENARY_MI2S_TX,
6819 .stream_name = "Senary MI2S Capture",
6820 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6821 .platform_name = "msm-pcm-routing",
6822 .codec_name = "msm-stub-codec.1",
6823 .codec_dai_name = "msm-stub-tx",
6824 .no_pcm = 1,
6825 .dpcm_capture = 1,
6826 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6827 .be_hw_params_fixup = msm_be_hw_params_fixup,
6828 .ops = &msm_mi2s_be_ops,
6829 .ignore_suspend = 1,
6830 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6831};
6832
6833static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6834 /* Primary AUX PCM Backend DAI Links */
6835 {
6836 .name = LPASS_BE_AUXPCM_RX,
6837 .stream_name = "AUX PCM Playback",
6838 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6839 .platform_name = "msm-pcm-routing",
6840 .codec_name = "msm-stub-codec.1",
6841 .codec_dai_name = "msm-stub-rx",
6842 .no_pcm = 1,
6843 .dpcm_playback = 1,
6844 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6845 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6846 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6847 .ignore_pmdown_time = 1,
6848 .ignore_suspend = 1,
6849 },
6850 {
6851 .name = LPASS_BE_AUXPCM_TX,
6852 .stream_name = "AUX PCM Capture",
6853 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6854 .platform_name = "msm-pcm-routing",
6855 .codec_name = "msm-stub-codec.1",
6856 .codec_dai_name = "msm-stub-tx",
6857 .no_pcm = 1,
6858 .dpcm_capture = 1,
6859 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6860 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6861 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6862 .ignore_suspend = 1,
6863 },
6864 /* Secondary AUX PCM Backend DAI Links */
6865 {
6866 .name = LPASS_BE_SEC_AUXPCM_RX,
6867 .stream_name = "Sec AUX PCM Playback",
6868 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6869 .platform_name = "msm-pcm-routing",
6870 .codec_name = "msm-stub-codec.1",
6871 .codec_dai_name = "msm-stub-rx",
6872 .no_pcm = 1,
6873 .dpcm_playback = 1,
6874 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6875 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6876 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6877 .ignore_pmdown_time = 1,
6878 .ignore_suspend = 1,
6879 },
6880 {
6881 .name = LPASS_BE_SEC_AUXPCM_TX,
6882 .stream_name = "Sec AUX PCM Capture",
6883 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6884 .platform_name = "msm-pcm-routing",
6885 .codec_name = "msm-stub-codec.1",
6886 .codec_dai_name = "msm-stub-tx",
6887 .no_pcm = 1,
6888 .dpcm_capture = 1,
6889 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6890 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6891 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6892 .ignore_suspend = 1,
6893 },
6894 /* Tertiary AUX PCM Backend DAI Links */
6895 {
6896 .name = LPASS_BE_TERT_AUXPCM_RX,
6897 .stream_name = "Tert AUX PCM Playback",
6898 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6899 .platform_name = "msm-pcm-routing",
6900 .codec_name = "msm-stub-codec.1",
6901 .codec_dai_name = "msm-stub-rx",
6902 .no_pcm = 1,
6903 .dpcm_playback = 1,
6904 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6905 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6906 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6907 .ignore_suspend = 1,
6908 },
6909 {
6910 .name = LPASS_BE_TERT_AUXPCM_TX,
6911 .stream_name = "Tert AUX PCM Capture",
6912 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6913 .platform_name = "msm-pcm-routing",
6914 .codec_name = "msm-stub-codec.1",
6915 .codec_dai_name = "msm-stub-tx",
6916 .no_pcm = 1,
6917 .dpcm_capture = 1,
6918 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6919 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6920 .ops = &kona_aux_be_ops,
6921 .ignore_suspend = 1,
6922 },
6923 /* Quaternary AUX PCM Backend DAI Links */
6924 {
6925 .name = LPASS_BE_QUAT_AUXPCM_RX,
6926 .stream_name = "Quat AUX PCM Playback",
6927 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6928 .platform_name = "msm-pcm-routing",
6929 .codec_name = "msm-stub-codec.1",
6930 .codec_dai_name = "msm-stub-rx",
6931 .no_pcm = 1,
6932 .dpcm_playback = 1,
6933 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6934 .be_hw_params_fixup = msm_be_hw_params_fixup,
6935 .ops = &kona_aux_be_ops,
6936 .ignore_suspend = 1,
6937 },
6938 {
6939 .name = LPASS_BE_QUAT_AUXPCM_TX,
6940 .stream_name = "Quat AUX PCM Capture",
6941 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6942 .platform_name = "msm-pcm-routing",
6943 .codec_name = "msm-stub-codec.1",
6944 .codec_dai_name = "msm-stub-tx",
6945 .no_pcm = 1,
6946 .dpcm_capture = 1,
6947 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
6948 .be_hw_params_fixup = msm_be_hw_params_fixup,
6949 .ops = &kona_aux_be_ops,
6950 .ignore_suspend = 1,
6951 },
6952 /* Quinary AUX PCM Backend DAI Links */
6953 {
6954 .name = LPASS_BE_QUIN_AUXPCM_RX,
6955 .stream_name = "Quin AUX PCM Playback",
6956 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6957 .platform_name = "msm-pcm-routing",
6958 .codec_name = "msm-stub-codec.1",
6959 .codec_dai_name = "msm-stub-rx",
6960 .no_pcm = 1,
6961 .dpcm_playback = 1,
6962 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
6963 .be_hw_params_fixup = msm_be_hw_params_fixup,
6964 .ops = &kona_aux_be_ops,
6965 .ignore_suspend = 1,
6966 },
6967 {
6968 .name = LPASS_BE_QUIN_AUXPCM_TX,
6969 .stream_name = "Quin AUX PCM Capture",
6970 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6971 .platform_name = "msm-pcm-routing",
6972 .codec_name = "msm-stub-codec.1",
6973 .codec_dai_name = "msm-stub-tx",
6974 .no_pcm = 1,
6975 .dpcm_capture = 1,
6976 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
6977 .be_hw_params_fixup = msm_be_hw_params_fixup,
6978 .ops = &kona_aux_be_ops,
6979 .ignore_suspend = 1,
6980 },
6981 /* Senary AUX PCM Backend DAI Links */
6982 {
6983 .name = LPASS_BE_SEN_AUXPCM_RX,
6984 .stream_name = "Sen AUX PCM Playback",
6985 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6986 .platform_name = "msm-pcm-routing",
6987 .codec_name = "msm-stub-codec.1",
6988 .codec_dai_name = "msm-stub-rx",
6989 .no_pcm = 1,
6990 .dpcm_playback = 1,
6991 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
6992 .be_hw_params_fixup = msm_be_hw_params_fixup,
6993 .ops = &kona_aux_be_ops,
6994 .ignore_suspend = 1,
6995 },
6996 {
6997 .name = LPASS_BE_SEN_AUXPCM_TX,
6998 .stream_name = "Sen AUX PCM Capture",
6999 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
7000 .platform_name = "msm-pcm-routing",
7001 .codec_name = "msm-stub-codec.1",
7002 .codec_dai_name = "msm-stub-tx",
7003 .no_pcm = 1,
7004 .dpcm_capture = 1,
7005 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
7006 .be_hw_params_fixup = msm_be_hw_params_fixup,
7007 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7008 .ignore_suspend = 1,
7009 },
7010};
7011
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7012static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7013 /* WSA CDC DMA Backend DAI Links */
7014 {
7015 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7016 .stream_name = "WSA CDC DMA0 Playback",
7017 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7018 .platform_name = "msm-pcm-routing",
7019 .codec_name = "bolero_codec",
7020 .codec_dai_name = "wsa_macro_rx1",
7021 .no_pcm = 1,
7022 .dpcm_playback = 1,
7023 .init = &msm_int_audrx_init,
7024 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7025 .be_hw_params_fixup = msm_be_hw_params_fixup,
7026 .ignore_pmdown_time = 1,
7027 .ignore_suspend = 1,
7028 .ops = &msm_cdc_dma_be_ops,
7029 },
7030 {
7031 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7032 .stream_name = "WSA CDC DMA1 Playback",
7033 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7034 .platform_name = "msm-pcm-routing",
7035 .codec_name = "bolero_codec",
7036 .codec_dai_name = "wsa_macro_rx_mix",
7037 .no_pcm = 1,
7038 .dpcm_playback = 1,
7039 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7040 .be_hw_params_fixup = msm_be_hw_params_fixup,
7041 .ignore_pmdown_time = 1,
7042 .ignore_suspend = 1,
7043 .ops = &msm_cdc_dma_be_ops,
7044 },
7045 {
7046 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7047 .stream_name = "WSA CDC DMA1 Capture",
7048 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7049 .platform_name = "msm-pcm-routing",
7050 .codec_name = "bolero_codec",
7051 .codec_dai_name = "wsa_macro_echo",
7052 .no_pcm = 1,
7053 .dpcm_capture = 1,
7054 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7055 .be_hw_params_fixup = msm_be_hw_params_fixup,
7056 .ignore_suspend = 1,
7057 .ops = &msm_cdc_dma_be_ops,
7058 },
7059};
7060
7061static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7062 /* RX CDC DMA Backend DAI Links */
7063 {
7064 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7065 .stream_name = "RX CDC DMA0 Playback",
7066 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
7067 .platform_name = "msm-pcm-routing",
7068 .codec_name = "bolero_codec",
7069 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7070 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7071 .no_pcm = 1,
7072 .dpcm_playback = 1,
7073 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7074 .be_hw_params_fixup = msm_be_hw_params_fixup,
7075 .ignore_pmdown_time = 1,
7076 .ignore_suspend = 1,
7077 .ops = &msm_cdc_dma_be_ops,
7078 },
7079 {
7080 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7081 .stream_name = "RX CDC DMA1 Playback",
7082 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
7083 .platform_name = "msm-pcm-routing",
7084 .codec_name = "bolero_codec",
7085 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7086 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7087 .no_pcm = 1,
7088 .dpcm_playback = 1,
7089 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7090 .be_hw_params_fixup = msm_be_hw_params_fixup,
7091 .ignore_pmdown_time = 1,
7092 .ignore_suspend = 1,
7093 .ops = &msm_cdc_dma_be_ops,
7094 },
7095 {
7096 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7097 .stream_name = "RX CDC DMA2 Playback",
7098 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
7099 .platform_name = "msm-pcm-routing",
7100 .codec_name = "bolero_codec",
7101 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7102 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7103 .no_pcm = 1,
7104 .dpcm_playback = 1,
7105 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7106 .be_hw_params_fixup = msm_be_hw_params_fixup,
7107 .ignore_pmdown_time = 1,
7108 .ignore_suspend = 1,
7109 .ops = &msm_cdc_dma_be_ops,
7110 },
7111 {
7112 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7113 .stream_name = "RX CDC DMA3 Playback",
7114 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
7115 .platform_name = "msm-pcm-routing",
7116 .codec_name = "bolero_codec",
7117 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]7118 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7119 .no_pcm = 1,
7120 .dpcm_playback = 1,
7121 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7122 .be_hw_params_fixup = msm_be_hw_params_fixup,
7123 .ignore_pmdown_time = 1,
7124 .ignore_suspend = 1,
7125 .ops = &msm_cdc_dma_be_ops,
7126 },
7127 /* TX CDC DMA Backend DAI Links */
7128 {
7129 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7130 .stream_name = "TX CDC DMA3 Capture",
7131 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
7132 .platform_name = "msm-pcm-routing",
7133 .codec_name = "bolero_codec",
7134 .codec_dai_name = "tx_macro_tx1",
7135 .no_pcm = 1,
7136 .dpcm_capture = 1,
7137 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7138 .be_hw_params_fixup = msm_be_hw_params_fixup,
7139 .ignore_suspend = 1,
7140 .ops = &msm_cdc_dma_be_ops,
7141 },
7142 {
7143 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7144 .stream_name = "TX CDC DMA4 Capture",
7145 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
7146 .platform_name = "msm-pcm-routing",
7147 .codec_name = "bolero_codec",
7148 .codec_dai_name = "tx_macro_tx2",
7149 .no_pcm = 1,
7150 .dpcm_capture = 1,
7151 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7152 .be_hw_params_fixup = msm_be_hw_params_fixup,
7153 .ignore_suspend = 1,
7154 .ops = &msm_cdc_dma_be_ops,
7155 },
7156};
7157
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7158static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
7159 {
7160 .name = LPASS_BE_VA_CDC_DMA_TX_0,
7161 .stream_name = "VA CDC DMA0 Capture",
7162 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
7163 .platform_name = "msm-pcm-routing",
7164 .codec_name = "bolero_codec",
7165 .codec_dai_name = "va_macro_tx1",
7166 .no_pcm = 1,
7167 .dpcm_capture = 1,
7168 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
7169 .be_hw_params_fixup = msm_be_hw_params_fixup,
7170 .ignore_suspend = 1,
7171 .ops = &msm_cdc_dma_be_ops,
7172 },
7173 {
7174 .name = LPASS_BE_VA_CDC_DMA_TX_1,
7175 .stream_name = "VA CDC DMA1 Capture",
7176 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
7177 .platform_name = "msm-pcm-routing",
7178 .codec_name = "bolero_codec",
7179 .codec_dai_name = "va_macro_tx2",
7180 .no_pcm = 1,
7181 .dpcm_capture = 1,
7182 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
7183 .be_hw_params_fixup = msm_be_hw_params_fixup,
7184 .ignore_suspend = 1,
7185 .ops = &msm_cdc_dma_be_ops,
7186 },
7187 {
7188 .name = LPASS_BE_VA_CDC_DMA_TX_2,
7189 .stream_name = "VA CDC DMA2 Capture",
7190 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
7191 .platform_name = "msm-pcm-routing",
7192 .codec_name = "bolero_codec",
7193 .codec_dai_name = "va_macro_tx3",
7194 .no_pcm = 1,
7195 .dpcm_capture = 1,
7196 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
7197 .be_hw_params_fixup = msm_be_hw_params_fixup,
7198 .ignore_suspend = 1,
7199 .ops = &msm_cdc_dma_be_ops,
7200 },
7201};
7202
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7203static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
7204 {
7205 .name = LPASS_BE_AFE_LOOPBACK_TX,
7206 .stream_name = "AFE Loopback Capture",
7207 .cpu_dai_name = "msm-dai-q6-dev.24577",
7208 .platform_name = "msm-pcm-routing",
7209 .codec_name = "msm-stub-codec.1",
7210 .codec_dai_name = "msm-stub-tx",
7211 .no_pcm = 1,
7212 .dpcm_capture = 1,
7213 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
7214 .be_hw_params_fixup = msm_be_hw_params_fixup,
7215 .ignore_pmdown_time = 1,
7216 .ignore_suspend = 1,
7217 },
7218};
7219
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7220static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7221 ARRAY_SIZE(msm_common_dai_links) +
7222 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7223 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7224 ARRAY_SIZE(msm_common_be_dai_links) +
7225 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7226 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7227 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7228 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7229 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
7230 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7231 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7232 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]7233 ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
7234 ARRAY_SIZE(msm_tdm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7235
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7236static int msm_populate_dai_link_component_of_node(
7237 struct snd_soc_card *card)
7238{
7239 int i, index, ret = 0;
7240 struct device *cdev = card->dev;
7241 struct snd_soc_dai_link *dai_link = card->dai_link;
7242 struct device_node *np;
7243
7244 if (!cdev) {
7245 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
7246 return -ENODEV;
7247 }
7248
7249 for (i = 0; i < card->num_links; i++) {
7250 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7251 continue;
7252
7253 /* populate platform_of_node for snd card dai links */
7254 if (dai_link[i].platform_name &&
7255 !dai_link[i].platform_of_node) {
7256 index = of_property_match_string(cdev->of_node,
7257 "asoc-platform-names",
7258 dai_link[i].platform_name);
7259 if (index < 0) {
7260 dev_err(cdev, "%s: No match found for platform name: %s\n",
7261 __func__, dai_link[i].platform_name);
7262 ret = index;
7263 goto err;
7264 }
7265 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7266 index);
7267 if (!np) {
7268 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
7269 __func__, dai_link[i].platform_name,
7270 index);
7271 ret = -ENODEV;
7272 goto err;
7273 }
7274 dai_link[i].platform_of_node = np;
7275 dai_link[i].platform_name = NULL;
7276 }
7277
7278 /* populate cpu_of_node for snd card dai links */
7279 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7280 index = of_property_match_string(cdev->of_node,
7281 "asoc-cpu-names",
7282 dai_link[i].cpu_dai_name);
7283 if (index >= 0) {
7284 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7285 index);
7286 if (!np) {
7287 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
7288 __func__,
7289 dai_link[i].cpu_dai_name);
7290 ret = -ENODEV;
7291 goto err;
7292 }
7293 dai_link[i].cpu_of_node = np;
7294 dai_link[i].cpu_dai_name = NULL;
7295 }
7296 }
7297
7298 /* populate codec_of_node for snd card dai links */
7299 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7300 index = of_property_match_string(cdev->of_node,
7301 "asoc-codec-names",
7302 dai_link[i].codec_name);
7303 if (index < 0)
7304 continue;
7305 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7306 index);
7307 if (!np) {
7308 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
7309 __func__, dai_link[i].codec_name);
7310 ret = -ENODEV;
7311 goto err;
7312 }
7313 dai_link[i].codec_of_node = np;
7314 dai_link[i].codec_name = NULL;
7315 }
7316 }
7317
7318err:
7319 return ret;
7320}
7321
7322static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7323{
7324 int ret = -EINVAL;
7325 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
7326
7327 if (!component) {
7328 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
7329 return ret;
7330 }
7331
7332 ret = snd_soc_add_component_controls(component, msm_snd_controls,
7333 ARRAY_SIZE(msm_snd_controls));
7334 if (ret < 0) {
7335 dev_err(component->dev,
7336 "%s: add_codec_controls failed, err = %d\n",
7337 __func__, ret);
7338 return ret;
7339 }
7340
7341 return ret;
7342}
7343
7344static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7345 struct snd_pcm_hw_params *params)
7346{
7347 return 0;
7348}
7349
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7350static struct snd_soc_ops msm_stub_be_ops = {
7351 .hw_params = msm_snd_stub_hw_params,
7352};
7353
7354struct snd_soc_card snd_soc_card_stub_msm = {
7355 .name = "kona-stub-snd-card",
7356};
7357
7358static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7359 /* FrontEnd DAI Links */
7360 {
7361 .name = "MSMSTUB Media1",
7362 .stream_name = "MultiMedia1",
7363 .cpu_dai_name = "MultiMedia1",
7364 .platform_name = "msm-pcm-dsp.0",
7365 .dynamic = 1,
7366 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7367 .dpcm_playback = 1,
7368 .dpcm_capture = 1,
7369 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7370 SND_SOC_DPCM_TRIGGER_POST},
7371 .codec_dai_name = "snd-soc-dummy-dai",
7372 .codec_name = "snd-soc-dummy",
7373 .ignore_suspend = 1,
7374 /* this dainlink has playback support */
7375 .ignore_pmdown_time = 1,
7376 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7377 },
7378};
7379
7380static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7381 /* Backend DAI Links */
7382 {
7383 .name = LPASS_BE_AUXPCM_RX,
7384 .stream_name = "AUX PCM Playback",
7385 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7386 .platform_name = "msm-pcm-routing",
7387 .codec_name = "msm-stub-codec.1",
7388 .codec_dai_name = "msm-stub-rx",
7389 .no_pcm = 1,
7390 .dpcm_playback = 1,
7391 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7392 .init = &msm_audrx_stub_init,
7393 .be_hw_params_fixup = msm_be_hw_params_fixup,
7394 .ignore_pmdown_time = 1,
7395 .ignore_suspend = 1,
7396 .ops = &msm_stub_be_ops,
7397 },
7398 {
7399 .name = LPASS_BE_AUXPCM_TX,
7400 .stream_name = "AUX PCM Capture",
7401 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7402 .platform_name = "msm-pcm-routing",
7403 .codec_name = "msm-stub-codec.1",
7404 .codec_dai_name = "msm-stub-tx",
7405 .no_pcm = 1,
7406 .dpcm_capture = 1,
7407 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7408 .be_hw_params_fixup = msm_be_hw_params_fixup,
7409 .ignore_suspend = 1,
7410 .ops = &msm_stub_be_ops,
7411 },
7412};
7413
7414static struct snd_soc_dai_link msm_stub_dai_links[
7415 ARRAY_SIZE(msm_stub_fe_dai_links) +
7416 ARRAY_SIZE(msm_stub_be_dai_links)];
7417
7418static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7419 { .compatible = "qcom,kona-asoc-snd",
7420 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7421 { .compatible = "qcom,kona-asoc-snd-stub",
7422 .data = "stub_codec"},
7423 {},
7424};
7425
7426static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7427{
7428 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7429 struct snd_soc_dai_link *dailink = NULL;
7430 int len_1 = 0;
7431 int len_2 = 0;
7432 int total_links = 0;
7433 int rc = 0;
7434 u32 mi2s_audio_intf = 0;
7435 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7436 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7437 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7438 const struct of_device_id *match;
7439
7440 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
7441 if (!match) {
7442 dev_err(dev, "%s: No DT match found for sound card\n",
7443 __func__);
7444 return NULL;
7445 }
7446
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7447 if (!strcmp(match->data, "codec")) {
7448 card = &snd_soc_card_kona_msm;
7449
7450 memcpy(msm_kona_dai_links + total_links,
7451 msm_common_dai_links,
7452 sizeof(msm_common_dai_links));
7453 total_links += ARRAY_SIZE(msm_common_dai_links);
7454
7455 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7456 msm_bolero_fe_dai_links,
7457 sizeof(msm_bolero_fe_dai_links));
7458 total_links +=
7459 ARRAY_SIZE(msm_bolero_fe_dai_links);
7460
7461 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7462 msm_common_misc_fe_dai_links,
7463 sizeof(msm_common_misc_fe_dai_links));
7464 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7465
7466 memcpy(msm_kona_dai_links + total_links,
7467 msm_common_be_dai_links,
7468 sizeof(msm_common_be_dai_links));
7469 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7470
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7471 memcpy(msm_kona_dai_links + total_links,
7472 msm_wsa_cdc_dma_be_dai_links,
7473 sizeof(msm_wsa_cdc_dma_be_dai_links));
7474 total_links +=
7475 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7476
7477 memcpy(msm_kona_dai_links + total_links,
7478 msm_rx_tx_cdc_dma_be_dai_links,
7479 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7480 total_links +=
7481 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7482
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7483 memcpy(msm_kona_dai_links + total_links,
7484 msm_va_cdc_dma_be_dai_links,
7485 sizeof(msm_va_cdc_dma_be_dai_links));
7486 total_links +=
7487 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7488
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7489 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7490 &mi2s_audio_intf);
7491 if (rc) {
7492 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7493 __func__);
7494 } else {
7495 if (mi2s_audio_intf) {
7496 memcpy(msm_kona_dai_links + total_links,
7497 msm_mi2s_be_dai_links,
7498 sizeof(msm_mi2s_be_dai_links));
7499 total_links +=
7500 ARRAY_SIZE(msm_mi2s_be_dai_links);
7501 }
7502 }
7503
7504 rc = of_property_read_u32(dev->of_node,
7505 "qcom,auxpcm-audio-intf",
7506 &auxpcm_audio_intf);
7507 if (rc) {
7508 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7509 __func__);
7510 } else {
7511 if (auxpcm_audio_intf) {
7512 memcpy(msm_kona_dai_links + total_links,
7513 msm_auxpcm_be_dai_links,
7514 sizeof(msm_auxpcm_be_dai_links));
7515 total_links +=
7516 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7517 }
7518 }
7519
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7520 rc = of_property_read_u32(dev->of_node,
7521 "qcom,ext-disp-audio-rx", &val);
7522 if (!rc && val) {
7523 dev_dbg(dev, "%s(): ext disp audio support present\n",
7524 __func__);
7525 memcpy(msm_kona_dai_links + total_links,
7526 ext_disp_be_dai_link,
7527 sizeof(ext_disp_be_dai_link));
7528 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7529 }
7530
7531 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7532 if (!rc && val) {
7533 dev_dbg(dev, "%s(): WCN BT support present\n",
7534 __func__);
7535 memcpy(msm_kona_dai_links + total_links,
7536 msm_wcn_be_dai_links,
7537 sizeof(msm_wcn_be_dai_links));
7538 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7539 }
7540
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7541 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7542 &val);
7543 if (!rc && val) {
7544 memcpy(msm_kona_dai_links + total_links,
7545 msm_afe_rxtx_lb_be_dai_link,
7546 sizeof(msm_afe_rxtx_lb_be_dai_link));
7547 total_links +=
7548 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7549 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7550
Aditya Bavanari2d763ba2020-02-17 13:26:50 +0530[diff] [blame]7551 rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
7552 &val);
7553 if (!rc && val) {
7554 memcpy(msm_kona_dai_links + total_links,
7555 msm_tdm_be_dai_links,
7556 sizeof(msm_tdm_be_dai_links));
7557 total_links +=
7558 ARRAY_SIZE(msm_tdm_be_dai_links);
7559 }
7560
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7561 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7562 &wcn_btfm_intf);
7563 if (rc) {
7564 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7565 __func__);
7566 } else {
7567 if (wcn_btfm_intf) {
7568 memcpy(msm_kona_dai_links + total_links,
7569 msm_wcn_btfm_be_dai_links,
7570 sizeof(msm_wcn_btfm_be_dai_links));
7571 total_links +=
7572 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7573 }
7574 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7575 dailink = msm_kona_dai_links;
7576 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7577 card = &snd_soc_card_stub_msm;
7578 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7579 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7580
7581 memcpy(msm_stub_dai_links,
7582 msm_stub_fe_dai_links,
7583 sizeof(msm_stub_fe_dai_links));
7584 memcpy(msm_stub_dai_links + len_1,
7585 msm_stub_be_dai_links,
7586 sizeof(msm_stub_be_dai_links));
7587
7588 dailink = msm_stub_dai_links;
7589 total_links = len_2;
7590 }
7591
7592 if (card) {
7593 card->dai_link = dailink;
7594 card->num_links = total_links;
7595 }
7596
7597 return card;
7598}
7599
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7600static int msm_wsa881x_init(struct snd_soc_component *component)
7601{
7602 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7603 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7604 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7605 SPKR_L_BOOST, SPKR_L_VI};
7606 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7607 SPKR_R_BOOST, SPKR_R_VI};
7608 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7609 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7610 struct msm_asoc_mach_data *pdata;
7611 struct snd_soc_dapm_context *dapm;
7612 struct snd_card *card;
7613 struct snd_info_entry *entry;
7614 int ret = 0;
7615
7616 if (!component) {
7617 pr_err("%s component is NULL\n", __func__);
7618 return -EINVAL;
7619 }
7620
7621 card = component->card->snd_card;
7622 dapm = snd_soc_component_get_dapm(component);
7623
7624 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7625 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7626 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]7627 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7628 wsa883x_set_channel_map(component, &spkleft_ports[0],
7629 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7630 &ch_rate[0], &spkleft_port_types[0]);
7631 else
7632 wsa881x_set_channel_map(component, &spkleft_ports[0],
7633 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7634 &ch_rate[0], &spkleft_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7635 if (dapm->component) {
7636 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7637 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7638 }
7639 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7640 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7641 __func__, component->name);
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]7642 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7643 wsa883x_set_channel_map(component, &spkright_ports[0],
7644 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7645 &ch_rate[0], &spkright_port_types[0]);
7646 else
7647 wsa881x_set_channel_map(component, &spkright_ports[0],
7648 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7649 &ch_rate[0], &spkright_port_types[0]);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7650 if (dapm->component) {
7651 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7652 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7653 }
7654 } else {
7655 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7656 component->name);
7657 ret = -EINVAL;
7658 goto err;
7659 }
7660 pdata = snd_soc_card_get_drvdata(component->card);
7661 if (!pdata->codec_root) {
7662 entry = snd_info_create_subdir(card->module, "codecs",
7663 card->proc_root);
7664 if (!entry) {
7665 pr_err("%s: Cannot create codecs module entry\n",
7666 __func__);
7667 ret = 0;
7668 goto err;
7669 }
7670 pdata->codec_root = entry;
7671 }
Laxminath Kasam99690f12020-03-15 15:38:21 +0530[diff] [blame]7672 if (strnstr(component->name, "wsa883x", sizeof(component->name)))
7673 wsa883x_codec_info_create_codec_entry(pdata->codec_root,
7674 component);
7675 else
7676 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7677 component);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7678err:
7679 return ret;
7680}
7681
7682static int msm_aux_codec_init(struct snd_soc_component *component)
7683{
7684 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7685 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7686 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7687 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7688 struct snd_info_entry *entry;
7689 struct snd_card *card = component->card->snd_card;
7690 struct msm_asoc_mach_data *pdata;
7691
7692 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7693 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7694 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7695 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7696 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7697 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7698 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7699 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7700 snd_soc_dapm_sync(dapm);
7701
7702 pdata = snd_soc_card_get_drvdata(component->card);
7703 if (!pdata->codec_root) {
7704 entry = snd_info_create_subdir(card->module, "codecs",
7705 card->proc_root);
7706 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7707 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7708 __func__);
7709 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7710 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7711 }
7712 pdata->codec_root = entry;
7713 }
Kunlei Zhangf61a2312020-02-11 15:37:03 +0800[diff] [blame^]7714 if (!strncmp(component->driver->name, "wcd937x", 7)) {
7715 wcd937x_info_create_codec_entry(pdata->codec_root, component);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7716 ret = snd_soc_add_component_controls(component,
Kunlei Zhangf61a2312020-02-11 15:37:03 +0800[diff] [blame^]7717 msm_int_wcd937x_snd_controls,
7718 ARRAY_SIZE(msm_int_wcd937x_snd_controls));
7719 } else {
7720 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7721 codec_variant = wcd938x_get_codec_variant(component);
7722 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
7723 if (codec_variant == WCD9380)
7724 ret = snd_soc_add_component_controls(component,
7725 msm_int_wcd9380_snd_controls,
7726 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
7727 else if (codec_variant == WCD9385)
7728 ret = snd_soc_add_component_controls(component,
7729 msm_int_wcd9385_snd_controls,
7730 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
7731 }
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7732
7733 if (ret < 0) {
7734 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
7735 __func__, ret);
7736 return ret;
7737 }
7738
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7739mbhc_cfg_cal:
7740 mbhc_calibration = def_wcd_mbhc_cal();
7741 if (!mbhc_calibration)
7742 return -ENOMEM;
7743 wcd_mbhc_cfg.calibration = mbhc_calibration;
Kunlei Zhangf61a2312020-02-11 15:37:03 +0800[diff] [blame^]7744 if (!strncmp(component->driver->name, "wcd937x", 7))
7745 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7746 else
7747 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7748 if (ret) {
7749 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7750 __func__, ret);
7751 goto err_hs_detect;
7752 }
7753 return 0;
7754
7755err_hs_detect:
7756 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7757 return ret;
7758}
7759
7760static int msm_init_aux_dev(struct platform_device *pdev,
7761 struct snd_soc_card *card)
7762{
7763 struct device_node *wsa_of_node;
7764 struct device_node *aux_codec_of_node;
7765 u32 wsa_max_devs;
7766 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7767 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7768 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7769 int i;
Xiao Lid8bb93c2020-01-07 12:59:05 +0800[diff] [blame]7770 struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
7771 struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7772 const char *auxdev_name_prefix[1];
7773 char *dev_name_str = NULL;
7774 int found = 0;
7775 int codecs_found = 0;
7776 int ret = 0;
7777
7778 /* Get maximum WSA device count for this platform */
7779 ret = of_property_read_u32(pdev->dev.of_node,
7780 "qcom,wsa-max-devs", &wsa_max_devs);
7781 if (ret) {
7782 dev_info(&pdev->dev,
7783 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7784 __func__, pdev->dev.of_node->full_name, ret);
7785 wsa_max_devs = 0;
7786 goto codec_aux_dev;
7787 }
7788 if (wsa_max_devs == 0) {
7789 dev_warn(&pdev->dev,
7790 "%s: Max WSA devices is 0 for this target?\n",
7791 __func__);
7792 goto codec_aux_dev;
7793 }
7794
7795 /* Get count of WSA device phandles for this platform */
7796 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7797 "qcom,wsa-devs", NULL);
7798 if (wsa_dev_cnt == -ENOENT) {
7799 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7800 __func__);
7801 goto err;
7802 } else if (wsa_dev_cnt <= 0) {
7803 dev_err(&pdev->dev,
7804 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7805 __func__, wsa_dev_cnt);
7806 ret = -EINVAL;
7807 goto err;
7808 }
7809
7810 /*
7811 * Expect total phandles count to be NOT less than maximum possible
7812 * WSA count. However, if it is less, then assign same value to
7813 * max count as well.
7814 */
7815 if (wsa_dev_cnt < wsa_max_devs) {
7816 dev_dbg(&pdev->dev,
7817 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7818 __func__, wsa_max_devs, wsa_dev_cnt);
7819 wsa_max_devs = wsa_dev_cnt;
7820 }
7821
7822 /* Make sure prefix string passed for each WSA device */
7823 ret = of_property_count_strings(pdev->dev.of_node,
7824 "qcom,wsa-aux-dev-prefix");
7825 if (ret != wsa_dev_cnt) {
7826 dev_err(&pdev->dev,
7827 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7828 __func__, wsa_dev_cnt, ret);
7829 ret = -EINVAL;
7830 goto err;
7831 }
7832
7833 /*
7834 * Alloc mem to store phandle and index info of WSA device, if already
7835 * registered with ALSA core
7836 */
7837 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7838 sizeof(struct msm_wsa881x_dev_info),
7839 GFP_KERNEL);
7840 if (!wsa881x_dev_info) {
7841 ret = -ENOMEM;
7842 goto err;
7843 }
7844
7845 /*
7846 * search and check whether all WSA devices are already
7847 * registered with ALSA core or not. If found a node, store
7848 * the node and the index in a local array of struct for later
7849 * use.
7850 */
7851 for (i = 0; i < wsa_dev_cnt; i++) {
7852 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7853 "qcom,wsa-devs", i);
7854 if (unlikely(!wsa_of_node)) {
7855 /* we should not be here */
7856 dev_err(&pdev->dev,
7857 "%s: wsa dev node is not present\n",
7858 __func__);
7859 ret = -EINVAL;
7860 goto err;
7861 }
7862 if (soc_find_component(wsa_of_node, NULL)) {
7863 /* WSA device registered with ALSA core */
7864 wsa881x_dev_info[found].of_node = wsa_of_node;
7865 wsa881x_dev_info[found].index = i;
7866 found++;
7867 if (found == wsa_max_devs)
7868 break;
7869 }
7870 }
7871
7872 if (found < wsa_max_devs) {
7873 dev_dbg(&pdev->dev,
7874 "%s: failed to find %d components. Found only %d\n",
7875 __func__, wsa_max_devs, found);
7876 return -EPROBE_DEFER;
7877 }
7878 dev_info(&pdev->dev,
7879 "%s: found %d wsa881x devices registered with ALSA core\n",
7880 __func__, found);
7881
7882codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7883 /* Get maximum aux codec device count for this platform */
7884 ret = of_property_read_u32(pdev->dev.of_node,
7885 "qcom,codec-max-aux-devs",
7886 &codec_max_aux_devs);
7887 if (ret) {
7888 dev_err(&pdev->dev,
7889 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7890 __func__, pdev->dev.of_node->full_name, ret);
7891 codec_max_aux_devs = 0;
7892 goto aux_dev_register;
7893 }
7894 if (codec_max_aux_devs == 0) {
7895 dev_dbg(&pdev->dev,
7896 "%s: Max aux codec devices is 0 for this target?\n",
7897 __func__);
7898 goto aux_dev_register;
7899 }
7900
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7901 /* Get count of aux codec device phandles for this platform */
7902 codec_aux_dev_cnt = of_count_phandle_with_args(
7903 pdev->dev.of_node,
7904 "qcom,codec-aux-devs", NULL);
7905 if (codec_aux_dev_cnt == -ENOENT) {
7906 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7907 __func__);
7908 goto err;
7909 } else if (codec_aux_dev_cnt <= 0) {
7910 dev_err(&pdev->dev,
7911 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7912 __func__, codec_aux_dev_cnt);
7913 ret = -EINVAL;
7914 goto err;
7915 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7916
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7917 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7918 * Expect total phandles count to be NOT less than maximum possible
7919 * AUX device count. However, if it is less, then assign same value to
7920 * max count as well.
7921 */
7922 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7923 dev_dbg(&pdev->dev,
7924 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7925 __func__, codec_max_aux_devs,
7926 codec_aux_dev_cnt);
7927 codec_max_aux_devs = codec_aux_dev_cnt;
7928 }
7929
7930 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7931 * Alloc mem to store phandle and index info of aux codec
7932 * if already registered with ALSA core
7933 */
7934 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7935 sizeof(struct aux_codec_dev_info),
7936 GFP_KERNEL);
7937 if (!aux_cdc_dev_info) {
7938 ret = -ENOMEM;
7939 goto err;
7940 }
7941
7942 /*
7943 * search and check whether all aux codecs are already
7944 * registered with ALSA core or not. If found a node, store
7945 * the node and the index in a local array of struct for later
7946 * use.
7947 */
7948 for (i = 0; i < codec_aux_dev_cnt; i++) {
7949 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
7950 "qcom,codec-aux-devs", i);
7951 if (unlikely(!aux_codec_of_node)) {
7952 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7953 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7954 "%s: aux codec dev node is not present\n",
7955 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7956 ret = -EINVAL;
7957 goto err;
7958 }
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7959 if (soc_find_component(aux_codec_of_node, NULL)) {
7960 /* AUX codec registered with ALSA core */
7961 aux_cdc_dev_info[codecs_found].of_node =
7962 aux_codec_of_node;
7963 aux_cdc_dev_info[codecs_found].index = i;
7964 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7965 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7966 }
7967
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7968 if (codecs_found < codec_aux_dev_cnt) {
7969 dev_dbg(&pdev->dev,
7970 "%s: failed to find %d components. Found only %d\n",
7971 __func__, codec_aux_dev_cnt, codecs_found);
7972 return -EPROBE_DEFER;
7973 }
7974 dev_info(&pdev->dev,
7975 "%s: found %d AUX codecs registered with ALSA core\n",
7976 __func__, codecs_found);
7977
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7978aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7979 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
7980 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
7981
7982 /* Alloc array of AUX devs struct */
7983 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
7984 sizeof(struct snd_soc_aux_dev),
7985 GFP_KERNEL);
7986 if (!msm_aux_dev) {
7987 ret = -ENOMEM;
7988 goto err;
7989 }
7990
7991 /* Alloc array of codec conf struct */
7992 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
7993 sizeof(struct snd_soc_codec_conf),
7994 GFP_KERNEL);
7995 if (!msm_codec_conf) {
7996 ret = -ENOMEM;
7997 goto err;
7998 }
7999
8000 for (i = 0; i < wsa_max_devs; i++) {
8001 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8002 GFP_KERNEL);
8003 if (!dev_name_str) {
8004 ret = -ENOMEM;
8005 goto err;
8006 }
8007
8008 ret = of_property_read_string_index(pdev->dev.of_node,
8009 "qcom,wsa-aux-dev-prefix",
8010 wsa881x_dev_info[i].index,
8011 auxdev_name_prefix);
8012 if (ret) {
8013 dev_err(&pdev->dev,
8014 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8015 __func__, ret);
8016 ret = -EINVAL;
8017 goto err;
8018 }
8019
8020 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8021 msm_aux_dev[i].name = dev_name_str;
8022 msm_aux_dev[i].codec_name = NULL;
8023 msm_aux_dev[i].codec_of_node =
8024 wsa881x_dev_info[i].of_node;
8025 msm_aux_dev[i].init = msm_wsa881x_init;
8026 msm_codec_conf[i].dev_name = NULL;
8027 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8028 msm_codec_conf[i].of_node =
8029 wsa881x_dev_info[i].of_node;
8030 }
8031
8032 for (i = 0; i < codec_aux_dev_cnt; i++) {
8033 msm_aux_dev[wsa_max_devs + i].name = NULL;
8034 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8035 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8036 aux_cdc_dev_info[i].of_node;
8037 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8038 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8039 msm_codec_conf[wsa_max_devs + i].name_prefix =
8040 NULL;
8041 msm_codec_conf[wsa_max_devs + i].of_node =
8042 aux_cdc_dev_info[i].of_node;
8043 }
8044
8045 card->codec_conf = msm_codec_conf;
8046 card->aux_dev = msm_aux_dev;
8047err:
8048 return ret;
8049}
8050
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8051static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8052{
8053 int count = 0;
8054 u32 mi2s_master_slave[MI2S_MAX];
8055 int ret = 0;
8056
8057 for (count = 0; count < MI2S_MAX; count++) {
8058 mutex_init(&mi2s_intf_conf[count].lock);
8059 mi2s_intf_conf[count].ref_cnt = 0;
8060 }
8061
8062 ret = of_property_read_u32_array(pdev->dev.of_node,
8063 "qcom,msm-mi2s-master",
8064 mi2s_master_slave, MI2S_MAX);
8065 if (ret) {
8066 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8067 __func__);
8068 } else {
8069 for (count = 0; count < MI2S_MAX; count++) {
8070 mi2s_intf_conf[count].msm_is_mi2s_master =
8071 mi2s_master_slave[count];
8072 }
8073 }
8074}
8075
8076static void msm_i2s_auxpcm_deinit(void)
8077{
8078 int count = 0;
8079
8080 for (count = 0; count < MI2S_MAX; count++) {
8081 mutex_destroy(&mi2s_intf_conf[count].lock);
8082 mi2s_intf_conf[count].ref_cnt = 0;
8083 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8084 }
8085}
8086
8087static int kona_ssr_enable(struct device *dev, void *data)
8088{
8089 struct platform_device *pdev = to_platform_device(dev);
8090 struct snd_soc_card *card = platform_get_drvdata(pdev);
8091 int ret = 0;
8092
8093 if (!card) {
8094 dev_err(dev, "%s: card is NULL\n", __func__);
8095 ret = -EINVAL;
8096 goto err;
8097 }
8098
8099 if (!strcmp(card->name, "kona-stub-snd-card")) {
8100 /* TODO */
8101 dev_dbg(dev, "%s: TODO \n", __func__);
8102 }
8103
8104 snd_soc_card_change_online_state(card, 1);
8105 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8106
8107err:
8108 return ret;
8109}
8110
8111static void kona_ssr_disable(struct device *dev, void *data)
8112{
8113 struct platform_device *pdev = to_platform_device(dev);
8114 struct snd_soc_card *card = platform_get_drvdata(pdev);
8115
8116 if (!card) {
8117 dev_err(dev, "%s: card is NULL\n", __func__);
8118 return;
8119 }
8120
8121 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8122 snd_soc_card_change_online_state(card, 0);
8123
8124 if (!strcmp(card->name, "kona-stub-snd-card")) {
8125 /* TODO */
8126 dev_dbg(dev, "%s: TODO \n", __func__);
8127 }
8128}
8129
8130static const struct snd_event_ops kona_ssr_ops = {
8131 .enable = kona_ssr_enable,
8132 .disable = kona_ssr_disable,
8133};
8134
8135static int msm_audio_ssr_compare(struct device *dev, void *data)
8136{
8137 struct device_node *node = data;
8138
8139 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8140 __func__, dev->of_node, node);
8141 return (dev->of_node && dev->of_node == node);
8142}
8143
8144static int msm_audio_ssr_register(struct device *dev)
8145{
8146 struct device_node *np = dev->of_node;
8147 struct snd_event_clients *ssr_clients = NULL;
8148 struct device_node *node = NULL;
8149 int ret = 0;
8150 int i = 0;
8151
8152 for (i = 0; ; i++) {
8153 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8154 if (!node)
8155 break;
8156 snd_event_mstr_add_client(&ssr_clients,
8157 msm_audio_ssr_compare, node);
8158 }
8159
8160 ret = snd_event_master_register(dev, &kona_ssr_ops,
8161 ssr_clients, NULL);
8162 if (!ret)
8163 snd_event_notify(dev, SND_EVENT_UP);
8164
8165 return ret;
8166}
8167
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8168static int msm_asoc_machine_probe(struct platform_device *pdev)
8169{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8170 struct snd_soc_card *card = NULL;
8171 struct msm_asoc_mach_data *pdata = NULL;
8172 const char *mbhc_audio_jack_type = NULL;
8173 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8174 uint index = 0;
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]8175 struct clk *lpass_audio_hw_vote = NULL;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8176
8177 if (!pdev->dev.of_node) {
8178 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
8179 return -EINVAL;
8180 }
8181
8182 pdata = devm_kzalloc(&pdev->dev,
8183 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8184 if (!pdata)
8185 return -ENOMEM;
8186
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]8187 of_property_read_u32(pdev->dev.of_node,
8188 "qcom,lito-is-v2-enabled",
8189 &pdata->lito_v2_enabled);
8190
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8191 card = populate_snd_card_dailinks(&pdev->dev);
8192 if (!card) {
8193 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8194 ret = -EINVAL;
8195 goto err;
8196 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8197
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8198 card->dev = &pdev->dev;
8199 platform_set_drvdata(pdev, card);
8200 snd_soc_card_set_drvdata(card, pdata);
8201
8202 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8203 if (ret) {
8204 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
8205 __func__, ret);
8206 goto err;
8207 }
8208
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8209 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8210 if (ret) {
8211 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
8212 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8213 goto err;
8214 }
8215
8216 ret = msm_populate_dai_link_component_of_node(card);
8217 if (ret) {
8218 ret = -EPROBE_DEFER;
8219 goto err;
8220 }
8221
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]8222 ret = msm_init_aux_dev(pdev, card);
8223 if (ret)
8224 goto err;
8225
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8226 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8227 if (ret == -EPROBE_DEFER) {
8228 if (codec_reg_done)
8229 ret = -EINVAL;
8230 goto err;
8231 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8232 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
8233 __func__, ret);
8234 goto err;
8235 }
8236 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
8237 __func__, card->name);
8238
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8239 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8240 "qcom,hph-en1-gpio", 0);
8241 if (!pdata->hph_en1_gpio_p) {
8242 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8243 __func__, "qcom,hph-en1-gpio",
8244 pdev->dev.of_node->full_name);
8245 }
8246
8247 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8248 "qcom,hph-en0-gpio", 0);
8249 if (!pdata->hph_en0_gpio_p) {
8250 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
8251 __func__, "qcom,hph-en0-gpio",
8252 pdev->dev.of_node->full_name);
8253 }
8254
8255 ret = of_property_read_string(pdev->dev.of_node,
8256 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8257 if (ret) {
8258 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
8259 __func__, "qcom,mbhc-audio-jack-type",
8260 pdev->dev.of_node->full_name);
8261 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8262 } else {
8263 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8264 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8265 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8266 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8267 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8268 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8269 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8270 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8271 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8272 } else {
8273 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8274 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8275 }
8276 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]8277 /*
8278 * Parse US-Euro gpio info from DT. Report no error if us-euro
8279 * entry is not found in DT file as some targets do not support
8280 * US-Euro detection
8281 */
8282 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8283 "qcom,us-euro-gpios", 0);
8284 if (!pdata->us_euro_gpio_p) {
8285 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8286 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8287 } else {
8288 dev_dbg(&pdev->dev, "%s detected\n",
8289 "qcom,us-euro-gpios");
8290 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8291 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8292
Meng Wanga60b4082019-02-25 17:02:23 +0800[diff] [blame]8293 if (wcd_mbhc_cfg.enable_usbc_analog)
8294 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8295
8296 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8297 "fsa4480-i2c-handle", 0);
8298 if (!pdata->fsa_handle)
8299 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8300 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
8301
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8302 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]8303 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8304 "qcom,cdc-dmic01-gpios",
8305 0);
8306 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8307 "qcom,cdc-dmic23-gpios",
8308 0);
8309 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
8310 "qcom,cdc-dmic45-gpios",
8311 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +0530[diff] [blame]8312 if (pdata->dmic01_gpio_p)
8313 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
8314 if (pdata->dmic23_gpio_p)
8315 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +0530[diff] [blame]8316 if (pdata->dmic45_gpio_p)
8317 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8318
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8319 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8320 "qcom,pri-mi2s-gpios", 0);
8321 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8322 "qcom,sec-mi2s-gpios", 0);
8323 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8324 "qcom,tert-mi2s-gpios", 0);
8325 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8326 "qcom,quat-mi2s-gpios", 0);
8327 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8328 "qcom,quin-mi2s-gpios", 0);
8329 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8330 "qcom,sen-mi2s-gpios", 0);
Meng Wang4f5815c2020-02-13 14:10:20 +0800[diff] [blame]8331 for (index = PRIM_MI2S; index < MI2S_MAX; index++) {
8332 if (pdata->mi2s_gpio_p[index])
8333 msm_cdc_pinctrl_set_wakeup_capable(pdata->mi2s_gpio_p[index], false);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8334 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
Meng Wang4f5815c2020-02-13 14:10:20 +0800[diff] [blame]8335 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8336
Karthikeyan Mani1a9d7502019-09-23 21:00:20 -0700[diff] [blame]8337 /* Register LPASS audio hw vote */
8338 lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
8339 if (IS_ERR(lpass_audio_hw_vote)) {
8340 ret = PTR_ERR(lpass_audio_hw_vote);
8341 dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
8342 __func__, "lpass_audio_hw_vote", ret);
8343 lpass_audio_hw_vote = NULL;
8344 ret = 0;
8345 }
8346 pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
8347 pdata->core_audio_vote_count = 0;
8348
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8349 ret = msm_audio_ssr_register(&pdev->dev);
8350 if (ret)
8351 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8352 __func__, ret);
8353
8354 is_initial_boot = true;
8355
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8356 return 0;
8357err:
8358 devm_kfree(&pdev->dev, pdata);
8359 return ret;
8360}
8361
8362static int msm_asoc_machine_remove(struct platform_device *pdev)
8363{
8364 struct snd_soc_card *card = platform_get_drvdata(pdev);
8365
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8366 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8367 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8368 msm_i2s_auxpcm_deinit();
8369
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8370 return 0;
8371}
8372
8373static struct platform_driver kona_asoc_machine_driver = {
8374 .driver = {
8375 .name = DRV_NAME,
8376 .owner = THIS_MODULE,
8377 .pm = &snd_soc_pm_ops,
8378 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800[diff] [blame]8379 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8380 },
8381 .probe = msm_asoc_machine_probe,
8382 .remove = msm_asoc_machine_remove,
8383};
8384module_platform_driver(kona_asoc_machine_driver);
8385
8386MODULE_DESCRIPTION("ALSA SoC msm");
8387MODULE_LICENSE("GPL v2");
8388MODULE_ALIAS("platform:" DRV_NAME);
8389MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);