Abhijeet Dharmapurikar | fb4a2f8 | 2012-08-23 14:36:59 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/list.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/msm_rotator.h> |
Joel Nider | e5de00e | 2012-07-03 10:58:10 +0300 | [diff] [blame] | 18 | #include <linux/gpio.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 19 | #include <linux/clkdev.h> |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 20 | #include <linux/dma-mapping.h> |
Pratik Patel | 1746b8f | 2012-06-02 21:11:41 -0700 | [diff] [blame] | 21 | #include <linux/coresight.h> |
Srikanth Uyyala | 7d4f721 | 2012-10-12 17:45:36 +0530 | [diff] [blame] | 22 | #include <linux/avtimer.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 23 | #include <mach/irqs-8064.h> |
| 24 | #include <mach/board.h> |
| 25 | #include <mach/msm_iomap.h> |
Yan He | 06913ce | 2011-08-26 16:33:46 -0700 | [diff] [blame] | 26 | #include <mach/usbdiag.h> |
| 27 | #include <mach/msm_sps.h> |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 28 | #include <mach/dma.h> |
Jin Hong | d3024e6 | 2012-02-09 16:13:32 -0800 | [diff] [blame] | 29 | #include <mach/msm_dsps.h> |
Matt Wagantall | 33d01f5 | 2012-02-23 23:27:44 -0800 | [diff] [blame] | 30 | #include <mach/clk-provider.h> |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 31 | #include <sound/msm-dai-q6.h> |
| 32 | #include <sound/apr_audio.h> |
Joel Nider | e5de00e | 2012-07-03 10:58:10 +0300 | [diff] [blame] | 33 | #include <mach/msm_tsif.h> |
Joel Nider | 50b50fa | 2012-08-05 14:17:29 +0300 | [diff] [blame] | 34 | #include <mach/msm_tspp.h> |
Gagan Mac | 8a7a5d3 | 2011-11-11 16:43:06 -0700 | [diff] [blame] | 35 | #include <mach/msm_bus_board.h> |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 36 | #include <mach/rpm.h> |
Joel King | dacbc82 | 2012-01-25 13:30:57 -0800 | [diff] [blame] | 37 | #include <mach/mdm2.h> |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 38 | #include <mach/msm_smd.h> |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 39 | #include <mach/msm_dcvs.h> |
Laura Abbott | 532b2df | 2012-04-12 10:53:48 -0700 | [diff] [blame] | 40 | #include <mach/msm_rtb.h> |
Mitchel Humpherys | a67e37f | 2012-09-06 11:35:39 -0700 | [diff] [blame] | 41 | #include <linux/msm_ion.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 42 | #include "clock.h" |
| 43 | #include "devices.h" |
Matt Wagantall | 1875d32 | 2012-02-22 16:11:33 -0800 | [diff] [blame] | 44 | #include "footswitch.h" |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 45 | #include "msm_watchdog.h" |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 46 | #include "rpm_stats.h" |
| 47 | #include "rpm_log.h" |
Subhash Jadavani | 909e04f | 2012-04-12 10:52:50 +0530 | [diff] [blame] | 48 | #include <mach/mpm.h> |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 49 | #include <mach/iommu_domains.h> |
Laura Abbott | 93a4a35 | 2012-05-25 09:26:35 -0700 | [diff] [blame] | 50 | #include <mach/msm_cache_dump.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 51 | |
| 52 | /* Address of GSBI blocks */ |
Stepan Moskovchenko | 2701a44 | 2011-08-19 13:47:22 -0700 | [diff] [blame] | 53 | #define MSM_GSBI1_PHYS 0x12440000 |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 54 | #define MSM_GSBI3_PHYS 0x16200000 |
Harini Jayaraman | c4c5869 | 2011-07-19 14:50:10 -0600 | [diff] [blame] | 55 | #define MSM_GSBI4_PHYS 0x16300000 |
| 56 | #define MSM_GSBI5_PHYS 0x1A200000 |
| 57 | #define MSM_GSBI6_PHYS 0x16500000 |
| 58 | #define MSM_GSBI7_PHYS 0x16600000 |
| 59 | |
Kenneth Heitke | 748593a | 2011-07-15 15:45:11 -0600 | [diff] [blame] | 60 | /* GSBI UART devices */ |
Stepan Moskovchenko | 2701a44 | 2011-08-19 13:47:22 -0700 | [diff] [blame] | 61 | #define MSM_UART1DM_PHYS (MSM_GSBI1_PHYS + 0x10000) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 62 | #define MSM_UART3DM_PHYS (MSM_GSBI3_PHYS + 0x40000) |
Saket Saurabh | d425a5d | 2012-11-06 16:08:28 +0530 | [diff] [blame] | 63 | #define MSM_UART5DM_PHYS (MSM_GSBI5_PHYS + 0x40000) |
Mayank Rana | 262e903 | 2012-05-10 15:14:00 -0700 | [diff] [blame] | 64 | #define MSM_UART6DM_PHYS (MSM_GSBI6_PHYS + 0x40000) |
Jin Hong | 4bbbfba | 2012-02-02 21:48:07 -0800 | [diff] [blame] | 65 | #define MSM_UART7DM_PHYS (MSM_GSBI7_PHYS + 0x40000) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 66 | |
Harini Jayaraman | c4c5869 | 2011-07-19 14:50:10 -0600 | [diff] [blame] | 67 | /* GSBI QUP devices */ |
David Keitel | 3c40fc5 | 2012-02-09 17:53:52 -0800 | [diff] [blame] | 68 | #define MSM_GSBI1_QUP_PHYS (MSM_GSBI1_PHYS + 0x20000) |
Harini Jayaraman | c4c5869 | 2011-07-19 14:50:10 -0600 | [diff] [blame] | 69 | #define MSM_GSBI3_QUP_PHYS (MSM_GSBI3_PHYS + 0x80000) |
| 70 | #define MSM_GSBI4_QUP_PHYS (MSM_GSBI4_PHYS + 0x80000) |
| 71 | #define MSM_GSBI5_QUP_PHYS (MSM_GSBI5_PHYS + 0x80000) |
| 72 | #define MSM_GSBI6_QUP_PHYS (MSM_GSBI6_PHYS + 0x80000) |
| 73 | #define MSM_GSBI7_QUP_PHYS (MSM_GSBI7_PHYS + 0x80000) |
| 74 | #define MSM_QUP_SIZE SZ_4K |
| 75 | |
Kenneth Heitke | 36920d3 | 2011-07-20 16:44:30 -0600 | [diff] [blame] | 76 | /* Address of SSBI CMD */ |
| 77 | #define MSM_PMIC1_SSBI_CMD_PHYS 0x00500000 |
| 78 | #define MSM_PMIC2_SSBI_CMD_PHYS 0x00C00000 |
| 79 | #define MSM_PMIC_SSBI_SIZE SZ_4K |
Harini Jayaraman | c4c5869 | 2011-07-19 14:50:10 -0600 | [diff] [blame] | 80 | |
Hemant Kumar | caa0909 | 2011-07-30 00:26:33 -0700 | [diff] [blame] | 81 | /* Address of HS USBOTG1 */ |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 82 | #define MSM_HSUSB1_PHYS 0x12500000 |
| 83 | #define MSM_HSUSB1_SIZE SZ_4K |
Hemant Kumar | caa0909 | 2011-07-30 00:26:33 -0700 | [diff] [blame] | 84 | |
Manu Gautam | 91223e0 | 2011-11-08 15:27:22 +0530 | [diff] [blame] | 85 | /* Address of HS USB3 */ |
| 86 | #define MSM_HSUSB3_PHYS 0x12520000 |
| 87 | #define MSM_HSUSB3_SIZE SZ_4K |
| 88 | |
Hemant Kumar | 1d66e1c | 2012-02-13 15:24:59 -0800 | [diff] [blame] | 89 | /* Address of HS USB4 */ |
| 90 | #define MSM_HSUSB4_PHYS 0x12530000 |
| 91 | #define MSM_HSUSB4_SIZE SZ_4K |
| 92 | |
Niranjana Vishwanathapura | 06f8933 | 2012-05-03 17:11:13 -0600 | [diff] [blame] | 93 | /* Address of PCIE20 PARF */ |
| 94 | #define PCIE20_PARF_PHYS 0x1b600000 |
| 95 | #define PCIE20_PARF_SIZE SZ_128 |
| 96 | |
| 97 | /* Address of PCIE20 ELBI */ |
| 98 | #define PCIE20_ELBI_PHYS 0x1b502000 |
| 99 | #define PCIE20_ELBI_SIZE SZ_256 |
| 100 | |
| 101 | /* Address of PCIE20 */ |
| 102 | #define PCIE20_PHYS 0x1b500000 |
| 103 | #define PCIE20_SIZE SZ_4K |
Anji Jonnala | 6c2b685 | 2012-09-21 13:34:44 +0530 | [diff] [blame] | 104 | #define MSM8064_PC_CNTR_PHYS (APQ8064_IMEM_PHYS + 0x664) |
| 105 | #define MSM8064_PC_CNTR_SIZE 0x40 |
Anji Jonnala | 9312992 | 2012-10-09 20:57:53 +0530 | [diff] [blame] | 106 | #define MSM8064_RPM_MASTER_STATS_BASE 0x10BB00 |
Srikanth Uyyala | 7d4f721 | 2012-10-12 17:45:36 +0530 | [diff] [blame] | 107 | /* avtimer */ |
| 108 | #define AVTIMER_MSW_PHYSICAL_ADDRESS 0x2800900C |
| 109 | #define AVTIMER_LSW_PHYSICAL_ADDRESS 0x28009008 |
Anji Jonnala | 6c2b685 | 2012-09-21 13:34:44 +0530 | [diff] [blame] | 110 | |
| 111 | static struct resource msm8064_resources_pccntr[] = { |
| 112 | { |
| 113 | .start = MSM8064_PC_CNTR_PHYS, |
| 114 | .end = MSM8064_PC_CNTR_PHYS + MSM8064_PC_CNTR_SIZE, |
| 115 | .flags = IORESOURCE_MEM, |
| 116 | }, |
| 117 | }; |
| 118 | |
| 119 | struct platform_device msm8064_pc_cntr = { |
| 120 | .name = "pc-cntr", |
| 121 | .id = -1, |
| 122 | .num_resources = ARRAY_SIZE(msm8064_resources_pccntr), |
| 123 | .resource = msm8064_resources_pccntr, |
| 124 | }; |
Niranjana Vishwanathapura | 06f8933 | 2012-05-03 17:11:13 -0600 | [diff] [blame] | 125 | |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 126 | static struct msm_watchdog_pdata msm_watchdog_pdata = { |
| 127 | .pet_time = 10000, |
| 128 | .bark_time = 11000, |
| 129 | .has_secure = true, |
Joel King | e7ca6f7 | 2012-02-09 20:51:25 -0800 | [diff] [blame] | 130 | .needs_expired_enable = true, |
Rohit Vaswani | c77e4a6 | 2012-08-09 18:10:28 -0700 | [diff] [blame] | 131 | .base = MSM_TMR0_BASE + WDT0_OFFSET, |
| 132 | }; |
| 133 | |
| 134 | static struct resource msm_watchdog_resources[] = { |
| 135 | { |
| 136 | .start = WDT0_ACCSCSSNBARK_INT, |
| 137 | .end = WDT0_ACCSCSSNBARK_INT, |
| 138 | .flags = IORESOURCE_IRQ, |
| 139 | }, |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 140 | }; |
| 141 | |
| 142 | struct platform_device msm8064_device_watchdog = { |
| 143 | .name = "msm_watchdog", |
| 144 | .id = -1, |
| 145 | .dev = { |
| 146 | .platform_data = &msm_watchdog_pdata, |
| 147 | }, |
Rohit Vaswani | c77e4a6 | 2012-08-09 18:10:28 -0700 | [diff] [blame] | 148 | .num_resources = ARRAY_SIZE(msm_watchdog_resources), |
| 149 | .resource = msm_watchdog_resources, |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 150 | }; |
| 151 | |
Joel King | 0581896d | 2011-07-19 16:43:28 -0700 | [diff] [blame] | 152 | static struct resource msm_dmov_resource[] = { |
| 153 | { |
Jeff Ohlstein | 4af7269 | 2011-11-07 15:59:17 -0800 | [diff] [blame] | 154 | .start = ADM_0_SCSS_1_IRQ, |
Joel King | 0581896d | 2011-07-19 16:43:28 -0700 | [diff] [blame] | 155 | .flags = IORESOURCE_IRQ, |
| 156 | }, |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 157 | { |
Jeff Ohlstein | 4af7269 | 2011-11-07 15:59:17 -0800 | [diff] [blame] | 158 | .start = 0x18320000, |
| 159 | .end = 0x18320000 + SZ_1M - 1, |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 160 | .flags = IORESOURCE_MEM, |
| 161 | }, |
| 162 | }; |
| 163 | |
| 164 | static struct msm_dmov_pdata msm_dmov_pdata = { |
Jeff Ohlstein | 4af7269 | 2011-11-07 15:59:17 -0800 | [diff] [blame] | 165 | .sd = 1, |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 166 | .sd_size = 0x800, |
Joel King | 0581896d | 2011-07-19 16:43:28 -0700 | [diff] [blame] | 167 | }; |
| 168 | |
Stepan Moskovchenko | df13d34 | 2011-08-03 19:01:25 -0700 | [diff] [blame] | 169 | struct platform_device apq8064_device_dmov = { |
Joel King | 0581896d | 2011-07-19 16:43:28 -0700 | [diff] [blame] | 170 | .name = "msm_dmov", |
| 171 | .id = -1, |
| 172 | .resource = msm_dmov_resource, |
| 173 | .num_resources = ARRAY_SIZE(msm_dmov_resource), |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 174 | .dev = { |
| 175 | .platform_data = &msm_dmov_pdata, |
| 176 | }, |
Joel King | 0581896d | 2011-07-19 16:43:28 -0700 | [diff] [blame] | 177 | }; |
| 178 | |
Stepan Moskovchenko | 2701a44 | 2011-08-19 13:47:22 -0700 | [diff] [blame] | 179 | static struct resource resources_uart_gsbi1[] = { |
| 180 | { |
| 181 | .start = APQ8064_GSBI1_UARTDM_IRQ, |
| 182 | .end = APQ8064_GSBI1_UARTDM_IRQ, |
| 183 | .flags = IORESOURCE_IRQ, |
| 184 | }, |
| 185 | { |
| 186 | .start = MSM_UART1DM_PHYS, |
| 187 | .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1, |
| 188 | .name = "uartdm_resource", |
| 189 | .flags = IORESOURCE_MEM, |
| 190 | }, |
| 191 | { |
| 192 | .start = MSM_GSBI1_PHYS, |
| 193 | .end = MSM_GSBI1_PHYS + PAGE_SIZE - 1, |
| 194 | .name = "gsbi_resource", |
| 195 | .flags = IORESOURCE_MEM, |
| 196 | }, |
| 197 | }; |
| 198 | |
| 199 | struct platform_device apq8064_device_uart_gsbi1 = { |
| 200 | .name = "msm_serial_hsl", |
Jin Hong | 4bbbfba | 2012-02-02 21:48:07 -0800 | [diff] [blame] | 201 | .id = 1, |
Stepan Moskovchenko | 2701a44 | 2011-08-19 13:47:22 -0700 | [diff] [blame] | 202 | .num_resources = ARRAY_SIZE(resources_uart_gsbi1), |
| 203 | .resource = resources_uart_gsbi1, |
| 204 | }; |
| 205 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 206 | static struct resource resources_uart_gsbi3[] = { |
| 207 | { |
| 208 | .start = GSBI3_UARTDM_IRQ, |
| 209 | .end = GSBI3_UARTDM_IRQ, |
| 210 | .flags = IORESOURCE_IRQ, |
| 211 | }, |
| 212 | { |
| 213 | .start = MSM_UART3DM_PHYS, |
| 214 | .end = MSM_UART3DM_PHYS + PAGE_SIZE - 1, |
| 215 | .name = "uartdm_resource", |
| 216 | .flags = IORESOURCE_MEM, |
| 217 | }, |
| 218 | { |
| 219 | .start = MSM_GSBI3_PHYS, |
| 220 | .end = MSM_GSBI3_PHYS + PAGE_SIZE - 1, |
| 221 | .name = "gsbi_resource", |
| 222 | .flags = IORESOURCE_MEM, |
| 223 | }, |
| 224 | }; |
| 225 | |
| 226 | struct platform_device apq8064_device_uart_gsbi3 = { |
| 227 | .name = "msm_serial_hsl", |
| 228 | .id = 0, |
| 229 | .num_resources = ARRAY_SIZE(resources_uart_gsbi3), |
| 230 | .resource = resources_uart_gsbi3, |
| 231 | }; |
| 232 | |
Jing Lin | 04601f9 | 2012-02-05 15:36:07 -0800 | [diff] [blame] | 233 | static struct resource resources_qup_i2c_gsbi3[] = { |
| 234 | { |
| 235 | .name = "gsbi_qup_i2c_addr", |
| 236 | .start = MSM_GSBI3_PHYS, |
| 237 | .end = MSM_GSBI3_PHYS + 4 - 1, |
| 238 | .flags = IORESOURCE_MEM, |
| 239 | }, |
| 240 | { |
| 241 | .name = "qup_phys_addr", |
| 242 | .start = MSM_GSBI3_QUP_PHYS, |
| 243 | .end = MSM_GSBI3_QUP_PHYS + MSM_QUP_SIZE - 1, |
| 244 | .flags = IORESOURCE_MEM, |
| 245 | }, |
| 246 | { |
| 247 | .name = "qup_err_intr", |
| 248 | .start = GSBI3_QUP_IRQ, |
| 249 | .end = GSBI3_QUP_IRQ, |
| 250 | .flags = IORESOURCE_IRQ, |
| 251 | }, |
| 252 | { |
| 253 | .name = "i2c_clk", |
| 254 | .start = 9, |
| 255 | .end = 9, |
| 256 | .flags = IORESOURCE_IO, |
| 257 | }, |
| 258 | { |
| 259 | .name = "i2c_sda", |
| 260 | .start = 8, |
| 261 | .end = 8, |
| 262 | .flags = IORESOURCE_IO, |
| 263 | }, |
| 264 | }; |
| 265 | |
David Keitel | 3c40fc5 | 2012-02-09 17:53:52 -0800 | [diff] [blame] | 266 | static struct resource resources_qup_i2c_gsbi1[] = { |
| 267 | { |
| 268 | .name = "gsbi_qup_i2c_addr", |
| 269 | .start = MSM_GSBI1_PHYS, |
| 270 | .end = MSM_GSBI1_PHYS + 4 - 1, |
| 271 | .flags = IORESOURCE_MEM, |
| 272 | }, |
| 273 | { |
| 274 | .name = "qup_phys_addr", |
| 275 | .start = MSM_GSBI1_QUP_PHYS, |
| 276 | .end = MSM_GSBI1_QUP_PHYS + MSM_QUP_SIZE - 1, |
| 277 | .flags = IORESOURCE_MEM, |
| 278 | }, |
| 279 | { |
| 280 | .name = "qup_err_intr", |
| 281 | .start = APQ8064_GSBI1_QUP_IRQ, |
| 282 | .end = APQ8064_GSBI1_QUP_IRQ, |
| 283 | .flags = IORESOURCE_IRQ, |
| 284 | }, |
| 285 | { |
| 286 | .name = "i2c_clk", |
| 287 | .start = 21, |
| 288 | .end = 21, |
| 289 | .flags = IORESOURCE_IO, |
| 290 | }, |
| 291 | { |
| 292 | .name = "i2c_sda", |
| 293 | .start = 20, |
| 294 | .end = 20, |
| 295 | .flags = IORESOURCE_IO, |
| 296 | }, |
| 297 | }; |
| 298 | |
| 299 | struct platform_device apq8064_device_qup_i2c_gsbi1 = { |
| 300 | .name = "qup_i2c", |
| 301 | .id = 0, |
| 302 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi1), |
| 303 | .resource = resources_qup_i2c_gsbi1, |
| 304 | }; |
| 305 | |
Jing Lin | 04601f9 | 2012-02-05 15:36:07 -0800 | [diff] [blame] | 306 | struct platform_device apq8064_device_qup_i2c_gsbi3 = { |
| 307 | .name = "qup_i2c", |
| 308 | .id = 3, |
| 309 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi3), |
| 310 | .resource = resources_qup_i2c_gsbi3, |
| 311 | }; |
| 312 | |
Kenneth Heitke | 748593a | 2011-07-15 15:45:11 -0600 | [diff] [blame] | 313 | static struct resource resources_qup_i2c_gsbi4[] = { |
| 314 | { |
| 315 | .name = "gsbi_qup_i2c_addr", |
| 316 | .start = MSM_GSBI4_PHYS, |
Harini Jayaraman | e1554a9 | 2011-09-15 14:43:02 -0600 | [diff] [blame] | 317 | .end = MSM_GSBI4_PHYS + 4 - 1, |
Kenneth Heitke | 748593a | 2011-07-15 15:45:11 -0600 | [diff] [blame] | 318 | .flags = IORESOURCE_MEM, |
| 319 | }, |
| 320 | { |
| 321 | .name = "qup_phys_addr", |
| 322 | .start = MSM_GSBI4_QUP_PHYS, |
Harini Jayaraman | e1554a9 | 2011-09-15 14:43:02 -0600 | [diff] [blame] | 323 | .end = MSM_GSBI4_QUP_PHYS + MSM_QUP_SIZE - 1, |
Kenneth Heitke | 748593a | 2011-07-15 15:45:11 -0600 | [diff] [blame] | 324 | .flags = IORESOURCE_MEM, |
| 325 | }, |
| 326 | { |
| 327 | .name = "qup_err_intr", |
| 328 | .start = GSBI4_QUP_IRQ, |
| 329 | .end = GSBI4_QUP_IRQ, |
| 330 | .flags = IORESOURCE_IRQ, |
| 331 | }, |
Kevin Chan | d07220e | 2012-02-13 15:52:22 -0800 | [diff] [blame] | 332 | { |
| 333 | .name = "i2c_clk", |
| 334 | .start = 11, |
| 335 | .end = 11, |
| 336 | .flags = IORESOURCE_IO, |
| 337 | }, |
| 338 | { |
| 339 | .name = "i2c_sda", |
| 340 | .start = 10, |
| 341 | .end = 10, |
| 342 | .flags = IORESOURCE_IO, |
| 343 | }, |
Kenneth Heitke | 748593a | 2011-07-15 15:45:11 -0600 | [diff] [blame] | 344 | }; |
| 345 | |
| 346 | struct platform_device apq8064_device_qup_i2c_gsbi4 = { |
| 347 | .name = "qup_i2c", |
| 348 | .id = 4, |
| 349 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi4), |
| 350 | .resource = resources_qup_i2c_gsbi4, |
| 351 | }; |
| 352 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 353 | static struct resource resources_qup_spi_gsbi5[] = { |
| 354 | { |
| 355 | .name = "spi_base", |
| 356 | .start = MSM_GSBI5_QUP_PHYS, |
| 357 | .end = MSM_GSBI5_QUP_PHYS + SZ_4K - 1, |
| 358 | .flags = IORESOURCE_MEM, |
| 359 | }, |
| 360 | { |
| 361 | .name = "gsbi_base", |
| 362 | .start = MSM_GSBI5_PHYS, |
| 363 | .end = MSM_GSBI5_PHYS + 4 - 1, |
| 364 | .flags = IORESOURCE_MEM, |
| 365 | }, |
| 366 | { |
| 367 | .name = "spi_irq_in", |
| 368 | .start = GSBI5_QUP_IRQ, |
| 369 | .end = GSBI5_QUP_IRQ, |
| 370 | .flags = IORESOURCE_IRQ, |
| 371 | }, |
| 372 | }; |
| 373 | |
| 374 | struct platform_device apq8064_device_qup_spi_gsbi5 = { |
| 375 | .name = "spi_qsd", |
| 376 | .id = 0, |
| 377 | .num_resources = ARRAY_SIZE(resources_qup_spi_gsbi5), |
| 378 | .resource = resources_qup_spi_gsbi5, |
| 379 | }; |
| 380 | |
Bar Weiner | f82c587 | 2012-10-23 14:31:26 +0200 | [diff] [blame] | 381 | static struct resource resources_qup_spi_gsbi6[] = { |
| 382 | { |
| 383 | .name = "spi_base", |
| 384 | .start = MSM_GSBI6_QUP_PHYS, |
| 385 | .end = MSM_GSBI6_QUP_PHYS + SZ_4K - 1, |
| 386 | .flags = IORESOURCE_MEM, |
| 387 | }, |
| 388 | { |
| 389 | .name = "gsbi_base", |
| 390 | .start = MSM_GSBI6_PHYS, |
| 391 | .end = MSM_GSBI6_PHYS + 4 - 1, |
| 392 | .flags = IORESOURCE_MEM, |
| 393 | }, |
| 394 | { |
| 395 | .name = "spi_irq_in", |
| 396 | .start = GSBI6_QUP_IRQ, |
| 397 | .end = GSBI6_QUP_IRQ, |
| 398 | .flags = IORESOURCE_IRQ, |
| 399 | }, |
| 400 | { |
| 401 | .name = "spi_clk", |
| 402 | .start = 17, |
| 403 | .end = 17, |
| 404 | .flags = IORESOURCE_IO, |
| 405 | }, |
| 406 | { |
| 407 | .name = "spi_miso", |
| 408 | .start = 15, |
| 409 | .end = 15, |
| 410 | .flags = IORESOURCE_IO, |
| 411 | }, |
| 412 | { |
| 413 | .name = "spi_mosi", |
| 414 | .start = 14, |
| 415 | .end = 14, |
| 416 | .flags = IORESOURCE_IO, |
| 417 | }, |
| 418 | { |
| 419 | .name = "spi_cs", |
| 420 | .start = 16, |
| 421 | .end = 16, |
| 422 | .flags = IORESOURCE_IO, |
| 423 | } |
| 424 | }; |
| 425 | |
| 426 | struct platform_device mpq8064_device_qup_spi_gsbi6 = { |
| 427 | .name = "spi_qsd", |
| 428 | .id = 1, |
| 429 | .num_resources = ARRAY_SIZE(resources_qup_spi_gsbi6), |
| 430 | .resource = resources_qup_spi_gsbi6, |
| 431 | }; |
| 432 | |
Joel King | 8f839b9 | 2012-04-01 14:37:46 -0700 | [diff] [blame] | 433 | static struct resource resources_qup_i2c_gsbi5[] = { |
| 434 | { |
| 435 | .name = "gsbi_qup_i2c_addr", |
| 436 | .start = MSM_GSBI5_PHYS, |
| 437 | .end = MSM_GSBI5_PHYS + 4 - 1, |
| 438 | .flags = IORESOURCE_MEM, |
| 439 | }, |
| 440 | { |
| 441 | .name = "qup_phys_addr", |
| 442 | .start = MSM_GSBI5_QUP_PHYS, |
| 443 | .end = MSM_GSBI5_QUP_PHYS + MSM_QUP_SIZE - 1, |
| 444 | .flags = IORESOURCE_MEM, |
| 445 | }, |
| 446 | { |
| 447 | .name = "qup_err_intr", |
| 448 | .start = GSBI5_QUP_IRQ, |
| 449 | .end = GSBI5_QUP_IRQ, |
| 450 | .flags = IORESOURCE_IRQ, |
| 451 | }, |
| 452 | { |
| 453 | .name = "i2c_clk", |
| 454 | .start = 54, |
| 455 | .end = 54, |
| 456 | .flags = IORESOURCE_IO, |
| 457 | }, |
| 458 | { |
| 459 | .name = "i2c_sda", |
| 460 | .start = 53, |
| 461 | .end = 53, |
| 462 | .flags = IORESOURCE_IO, |
| 463 | }, |
| 464 | }; |
| 465 | |
| 466 | struct platform_device mpq8064_device_qup_i2c_gsbi5 = { |
| 467 | .name = "qup_i2c", |
| 468 | .id = 5, |
| 469 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi5), |
| 470 | .resource = resources_qup_i2c_gsbi5, |
| 471 | }; |
| 472 | |
Saket Saurabh | d425a5d | 2012-11-06 16:08:28 +0530 | [diff] [blame] | 473 | static struct resource resources_uart_gsbi5[] = { |
| 474 | { |
| 475 | .start = GSBI5_UARTDM_IRQ, |
| 476 | .end = GSBI5_UARTDM_IRQ, |
| 477 | .flags = IORESOURCE_IRQ, |
| 478 | }, |
| 479 | { |
| 480 | .start = MSM_UART5DM_PHYS, |
| 481 | .end = MSM_UART5DM_PHYS + PAGE_SIZE - 1, |
| 482 | .name = "uartdm_resource", |
| 483 | .flags = IORESOURCE_MEM, |
| 484 | }, |
| 485 | { |
| 486 | .start = MSM_GSBI5_PHYS, |
| 487 | .end = MSM_GSBI5_PHYS + PAGE_SIZE - 1, |
| 488 | .name = "gsbi_resource", |
| 489 | .flags = IORESOURCE_MEM, |
| 490 | }, |
| 491 | }; |
| 492 | |
| 493 | struct platform_device mpq8064_device_uart_gsbi5 = { |
| 494 | .name = "msm_serial_hsl", |
| 495 | .id = 2, |
| 496 | .num_resources = ARRAY_SIZE(resources_uart_gsbi5), |
| 497 | .resource = resources_uart_gsbi5, |
| 498 | }; |
| 499 | |
Mayank Rana | 262e903 | 2012-05-10 15:14:00 -0700 | [diff] [blame] | 500 | /* GSBI 6 used into UARTDM Mode */ |
| 501 | static struct resource msm_uart_dm6_resources[] = { |
| 502 | { |
| 503 | .start = MSM_UART6DM_PHYS, |
| 504 | .end = MSM_UART6DM_PHYS + PAGE_SIZE - 1, |
| 505 | .name = "uartdm_resource", |
| 506 | .flags = IORESOURCE_MEM, |
| 507 | }, |
| 508 | { |
| 509 | .start = GSBI6_UARTDM_IRQ, |
| 510 | .end = GSBI6_UARTDM_IRQ, |
| 511 | .flags = IORESOURCE_IRQ, |
| 512 | }, |
| 513 | { |
| 514 | .start = MSM_GSBI6_PHYS, |
| 515 | .end = MSM_GSBI6_PHYS + 4 - 1, |
| 516 | .name = "gsbi_resource", |
| 517 | .flags = IORESOURCE_MEM, |
| 518 | }, |
| 519 | { |
| 520 | .start = DMOV_MPQ8064_HSUART_GSBI6_TX_CHAN, |
| 521 | .end = DMOV_MPQ8064_HSUART_GSBI6_RX_CHAN, |
| 522 | .name = "uartdm_channels", |
| 523 | .flags = IORESOURCE_DMA, |
| 524 | }, |
| 525 | { |
| 526 | .start = DMOV_MPQ8064_HSUART_GSBI6_TX_CRCI, |
| 527 | .end = DMOV_MPQ8064_HSUART_GSBI6_RX_CRCI, |
| 528 | .name = "uartdm_crci", |
| 529 | .flags = IORESOURCE_DMA, |
| 530 | }, |
| 531 | }; |
| 532 | static u64 msm_uart_dm6_dma_mask = DMA_BIT_MASK(32); |
| 533 | struct platform_device mpq8064_device_uartdm_gsbi6 = { |
| 534 | .name = "msm_serial_hs", |
| 535 | .id = 0, |
| 536 | .num_resources = ARRAY_SIZE(msm_uart_dm6_resources), |
| 537 | .resource = msm_uart_dm6_resources, |
| 538 | .dev = { |
| 539 | .dma_mask = &msm_uart_dm6_dma_mask, |
| 540 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 541 | }, |
| 542 | }; |
| 543 | |
Jin Hong | 4bbbfba | 2012-02-02 21:48:07 -0800 | [diff] [blame] | 544 | static struct resource resources_uart_gsbi7[] = { |
| 545 | { |
| 546 | .start = GSBI7_UARTDM_IRQ, |
| 547 | .end = GSBI7_UARTDM_IRQ, |
| 548 | .flags = IORESOURCE_IRQ, |
| 549 | }, |
| 550 | { |
| 551 | .start = MSM_UART7DM_PHYS, |
| 552 | .end = MSM_UART7DM_PHYS + PAGE_SIZE - 1, |
| 553 | .name = "uartdm_resource", |
| 554 | .flags = IORESOURCE_MEM, |
| 555 | }, |
| 556 | { |
| 557 | .start = MSM_GSBI7_PHYS, |
| 558 | .end = MSM_GSBI7_PHYS + PAGE_SIZE - 1, |
| 559 | .name = "gsbi_resource", |
| 560 | .flags = IORESOURCE_MEM, |
| 561 | }, |
| 562 | }; |
| 563 | |
| 564 | struct platform_device apq8064_device_uart_gsbi7 = { |
| 565 | .name = "msm_serial_hsl", |
| 566 | .id = 0, |
| 567 | .num_resources = ARRAY_SIZE(resources_uart_gsbi7), |
| 568 | .resource = resources_uart_gsbi7, |
| 569 | }; |
| 570 | |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 571 | struct platform_device apq_pcm = { |
| 572 | .name = "msm-pcm-dsp", |
| 573 | .id = -1, |
| 574 | }; |
| 575 | |
| 576 | struct platform_device apq_pcm_routing = { |
| 577 | .name = "msm-pcm-routing", |
| 578 | .id = -1, |
| 579 | }; |
| 580 | |
| 581 | struct platform_device apq_cpudai0 = { |
| 582 | .name = "msm-dai-q6", |
| 583 | .id = 0x4000, |
| 584 | }; |
| 585 | |
| 586 | struct platform_device apq_cpudai1 = { |
| 587 | .name = "msm-dai-q6", |
| 588 | .id = 0x4001, |
| 589 | }; |
Santosh Mardi | eff9a74 | 2012-04-09 23:23:39 +0530 | [diff] [blame] | 590 | struct platform_device mpq_cpudai_sec_i2s_rx = { |
| 591 | .name = "msm-dai-q6", |
| 592 | .id = 4, |
| 593 | }; |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 594 | struct platform_device apq_cpudai_hdmi_rx = { |
Swaminathan Sathappan | fd9dbad | 2012-02-15 16:56:44 -0800 | [diff] [blame] | 595 | .name = "msm-dai-q6-hdmi", |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 596 | .id = 8, |
| 597 | }; |
| 598 | |
| 599 | struct platform_device apq_cpudai_bt_rx = { |
| 600 | .name = "msm-dai-q6", |
| 601 | .id = 0x3000, |
| 602 | }; |
| 603 | |
| 604 | struct platform_device apq_cpudai_bt_tx = { |
| 605 | .name = "msm-dai-q6", |
| 606 | .id = 0x3001, |
| 607 | }; |
| 608 | |
| 609 | struct platform_device apq_cpudai_fm_rx = { |
| 610 | .name = "msm-dai-q6", |
| 611 | .id = 0x3004, |
| 612 | }; |
| 613 | |
| 614 | struct platform_device apq_cpudai_fm_tx = { |
| 615 | .name = "msm-dai-q6", |
| 616 | .id = 0x3005, |
| 617 | }; |
| 618 | |
Helen Zeng | 8f92550 | 2012-03-05 16:50:17 -0800 | [diff] [blame] | 619 | struct platform_device apq_cpudai_slim_4_rx = { |
| 620 | .name = "msm-dai-q6", |
| 621 | .id = 0x4008, |
| 622 | }; |
| 623 | |
| 624 | struct platform_device apq_cpudai_slim_4_tx = { |
| 625 | .name = "msm-dai-q6", |
| 626 | .id = 0x4009, |
| 627 | }; |
| 628 | |
Aviral Gupta | bfa9788 | 2012-10-16 12:15:59 +0530 | [diff] [blame] | 629 | struct platform_device mpq_cpudai_pseudo = { |
| 630 | .name = "msm-dai-q6", |
| 631 | .id = 0x8001, |
| 632 | }; |
Joel Nider | e5de00e | 2012-07-03 10:58:10 +0300 | [diff] [blame] | 633 | #define MSM_TSIF0_PHYS (0x18200000) |
| 634 | #define MSM_TSIF1_PHYS (0x18201000) |
| 635 | #define MSM_TSIF_SIZE (0x200) |
| 636 | |
| 637 | #define TSIF_0_CLK GPIO_CFG(55, 1, GPIO_CFG_INPUT, \ |
| 638 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 639 | #define TSIF_0_EN GPIO_CFG(56, 1, GPIO_CFG_INPUT, \ |
| 640 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 641 | #define TSIF_0_DATA GPIO_CFG(57, 1, GPIO_CFG_INPUT, \ |
| 642 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 643 | #define TSIF_0_SYNC GPIO_CFG(62, 1, GPIO_CFG_INPUT, \ |
| 644 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 645 | #define TSIF_1_CLK GPIO_CFG(59, 1, GPIO_CFG_INPUT, \ |
| 646 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 647 | #define TSIF_1_EN GPIO_CFG(60, 1, GPIO_CFG_INPUT, \ |
| 648 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 649 | #define TSIF_1_DATA GPIO_CFG(61, 1, GPIO_CFG_INPUT, \ |
| 650 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 651 | #define TSIF_1_SYNC GPIO_CFG(58, 1, GPIO_CFG_INPUT, \ |
| 652 | GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA) |
| 653 | |
| 654 | static const struct msm_gpio tsif0_gpios[] = { |
| 655 | { .gpio_cfg = TSIF_0_CLK, .label = "tsif_clk", }, |
| 656 | { .gpio_cfg = TSIF_0_EN, .label = "tsif_en", }, |
| 657 | { .gpio_cfg = TSIF_0_DATA, .label = "tsif_data", }, |
| 658 | { .gpio_cfg = TSIF_0_SYNC, .label = "tsif_sync", }, |
| 659 | }; |
| 660 | |
| 661 | static const struct msm_gpio tsif1_gpios[] = { |
| 662 | { .gpio_cfg = TSIF_1_CLK, .label = "tsif_clk", }, |
| 663 | { .gpio_cfg = TSIF_1_EN, .label = "tsif_en", }, |
| 664 | { .gpio_cfg = TSIF_1_DATA, .label = "tsif_data", }, |
| 665 | { .gpio_cfg = TSIF_1_SYNC, .label = "tsif_sync", }, |
| 666 | }; |
| 667 | |
| 668 | struct msm_tsif_platform_data tsif1_8064_platform_data = { |
| 669 | .num_gpios = ARRAY_SIZE(tsif1_gpios), |
| 670 | .gpios = tsif1_gpios, |
| 671 | .tsif_pclk = "iface_clk", |
| 672 | .tsif_ref_clk = "ref_clk", |
| 673 | }; |
| 674 | |
| 675 | struct resource tsif1_8064_resources[] = { |
| 676 | [0] = { |
| 677 | .flags = IORESOURCE_IRQ, |
| 678 | .start = TSIF2_IRQ, |
| 679 | .end = TSIF2_IRQ, |
| 680 | }, |
| 681 | [1] = { |
| 682 | .flags = IORESOURCE_MEM, |
| 683 | .start = MSM_TSIF1_PHYS, |
| 684 | .end = MSM_TSIF1_PHYS + MSM_TSIF_SIZE - 1, |
| 685 | }, |
| 686 | [2] = { |
| 687 | .flags = IORESOURCE_DMA, |
| 688 | .start = DMOV8064_TSIF_CHAN, |
| 689 | .end = DMOV8064_TSIF_CRCI, |
| 690 | }, |
| 691 | }; |
| 692 | |
| 693 | struct msm_tsif_platform_data tsif0_8064_platform_data = { |
| 694 | .num_gpios = ARRAY_SIZE(tsif0_gpios), |
| 695 | .gpios = tsif0_gpios, |
| 696 | .tsif_pclk = "iface_clk", |
| 697 | .tsif_ref_clk = "ref_clk", |
| 698 | }; |
| 699 | |
| 700 | struct resource tsif0_8064_resources[] = { |
| 701 | [0] = { |
| 702 | .flags = IORESOURCE_IRQ, |
| 703 | .start = TSIF1_IRQ, |
| 704 | .end = TSIF1_IRQ, |
| 705 | }, |
| 706 | [1] = { |
| 707 | .flags = IORESOURCE_MEM, |
| 708 | .start = MSM_TSIF0_PHYS, |
| 709 | .end = MSM_TSIF0_PHYS + MSM_TSIF_SIZE - 1, |
| 710 | }, |
| 711 | [2] = { |
| 712 | .flags = IORESOURCE_DMA, |
| 713 | .start = DMOV_TSIF_CHAN, |
| 714 | .end = DMOV_TSIF_CRCI, |
| 715 | }, |
| 716 | }; |
| 717 | |
| 718 | struct platform_device msm_8064_device_tsif[2] = { |
| 719 | { |
| 720 | .name = "msm_tsif", |
| 721 | .id = 0, |
| 722 | .num_resources = ARRAY_SIZE(tsif0_8064_resources), |
| 723 | .resource = tsif0_8064_resources, |
| 724 | .dev = { |
| 725 | .platform_data = &tsif0_8064_platform_data |
| 726 | }, |
| 727 | }, |
| 728 | { |
| 729 | .name = "msm_tsif", |
| 730 | .id = 1, |
| 731 | .num_resources = ARRAY_SIZE(tsif1_8064_resources), |
| 732 | .resource = tsif1_8064_resources, |
| 733 | .dev = { |
| 734 | .platform_data = &tsif1_8064_platform_data |
| 735 | }, |
| 736 | } |
| 737 | }; |
| 738 | |
Joel Nider | 50b50fa | 2012-08-05 14:17:29 +0300 | [diff] [blame] | 739 | #define MSM_TSPP_PHYS (0x18202000) |
| 740 | #define MSM_TSPP_SIZE (0x1000) |
| 741 | #define MSM_TSPP_BAM_PHYS (0x18204000) |
| 742 | #define MSM_TSPP_BAM_SIZE (0x2000) |
| 743 | |
| 744 | static const struct msm_gpio tspp_gpios[] = { |
| 745 | { .gpio_cfg = TSIF_0_CLK, .label = "tsif_clk", }, |
| 746 | { .gpio_cfg = TSIF_0_EN, .label = "tsif_en", }, |
| 747 | { .gpio_cfg = TSIF_0_DATA, .label = "tsif_data", }, |
| 748 | { .gpio_cfg = TSIF_0_SYNC, .label = "tsif_sync", }, |
| 749 | { .gpio_cfg = TSIF_1_CLK, .label = "tsif_clk", }, |
| 750 | { .gpio_cfg = TSIF_1_EN, .label = "tsif_en", }, |
| 751 | { .gpio_cfg = TSIF_1_DATA, .label = "tsif_data", }, |
| 752 | { .gpio_cfg = TSIF_1_SYNC, .label = "tsif_sync", }, |
| 753 | }; |
| 754 | |
| 755 | static struct resource tspp_resources[] = { |
| 756 | [0] = { |
| 757 | .flags = IORESOURCE_IRQ, |
| 758 | .start = TSIF_TSPP_IRQ, |
| 759 | .end = TSIF1_IRQ, |
| 760 | }, |
| 761 | [1] = { |
| 762 | .flags = IORESOURCE_MEM, |
| 763 | .start = MSM_TSIF0_PHYS, |
| 764 | .end = MSM_TSIF0_PHYS + MSM_TSIF_SIZE - 1, |
| 765 | }, |
| 766 | [2] = { |
| 767 | .flags = IORESOURCE_MEM, |
| 768 | .start = MSM_TSIF1_PHYS, |
| 769 | .end = MSM_TSIF1_PHYS + MSM_TSIF_SIZE - 1, |
| 770 | }, |
| 771 | [3] = { |
| 772 | .flags = IORESOURCE_MEM, |
| 773 | .start = MSM_TSPP_PHYS, |
| 774 | .end = MSM_TSPP_PHYS + MSM_TSPP_SIZE - 1, |
| 775 | }, |
| 776 | [4] = { |
| 777 | .flags = IORESOURCE_MEM, |
| 778 | .start = MSM_TSPP_BAM_PHYS, |
| 779 | .end = MSM_TSPP_BAM_PHYS + MSM_TSPP_BAM_SIZE - 1, |
| 780 | }, |
| 781 | }; |
| 782 | |
| 783 | static struct msm_tspp_platform_data tspp_platform_data = { |
| 784 | .num_gpios = ARRAY_SIZE(tspp_gpios), |
| 785 | .gpios = tspp_gpios, |
| 786 | .tsif_pclk = "iface_clk", |
| 787 | .tsif_ref_clk = "ref_clk", |
| 788 | }; |
| 789 | |
| 790 | struct platform_device msm_8064_device_tspp = { |
| 791 | .name = "msm_tspp", |
| 792 | .id = 0, |
| 793 | .num_resources = ARRAY_SIZE(tspp_resources), |
| 794 | .resource = tspp_resources, |
| 795 | .dev = { |
| 796 | .platform_data = &tspp_platform_data |
| 797 | }, |
| 798 | }; |
| 799 | |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 800 | /* |
| 801 | * Machine specific data for AUX PCM Interface |
| 802 | * which the driver will be unware of. |
| 803 | */ |
Kiran Kandi | 5f4ab69 | 2012-02-23 11:23:56 -0800 | [diff] [blame] | 804 | struct msm_dai_auxpcm_pdata apq_auxpcm_pdata = { |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 805 | .clk = "pcm_clk", |
Kuirong Wang | 547a998 | 2012-05-04 18:29:11 -0700 | [diff] [blame] | 806 | .mode_8k = { |
| 807 | .mode = AFE_PCM_CFG_MODE_PCM, |
| 808 | .sync = AFE_PCM_CFG_SYNC_INT, |
| 809 | .frame = AFE_PCM_CFG_FRM_256BPF, |
| 810 | .quant = AFE_PCM_CFG_QUANT_LINEAR_NOPAD, |
| 811 | .slot = 0, |
| 812 | .data = AFE_PCM_CFG_CDATAOE_MASTER, |
| 813 | .pcm_clk_rate = 2048000, |
| 814 | }, |
| 815 | .mode_16k = { |
| 816 | .mode = AFE_PCM_CFG_MODE_PCM, |
| 817 | .sync = AFE_PCM_CFG_SYNC_INT, |
| 818 | .frame = AFE_PCM_CFG_FRM_256BPF, |
| 819 | .quant = AFE_PCM_CFG_QUANT_LINEAR_NOPAD, |
| 820 | .slot = 0, |
| 821 | .data = AFE_PCM_CFG_CDATAOE_MASTER, |
| 822 | .pcm_clk_rate = 4096000, |
| 823 | } |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 824 | }; |
| 825 | |
| 826 | struct platform_device apq_cpudai_auxpcm_rx = { |
| 827 | .name = "msm-dai-q6", |
| 828 | .id = 2, |
| 829 | .dev = { |
Kiran Kandi | 5f4ab69 | 2012-02-23 11:23:56 -0800 | [diff] [blame] | 830 | .platform_data = &apq_auxpcm_pdata, |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 831 | }, |
| 832 | }; |
| 833 | |
| 834 | struct platform_device apq_cpudai_auxpcm_tx = { |
| 835 | .name = "msm-dai-q6", |
| 836 | .id = 3, |
Kiran Kandi | 5f4ab69 | 2012-02-23 11:23:56 -0800 | [diff] [blame] | 837 | .dev = { |
| 838 | .platform_data = &apq_auxpcm_pdata, |
| 839 | }, |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 840 | }; |
| 841 | |
Patrick Lai | 04baee94 | 2012-05-01 14:38:47 -0700 | [diff] [blame] | 842 | struct msm_mi2s_pdata mpq_mi2s_tx_data = { |
| 843 | .rx_sd_lines = 0, |
| 844 | .tx_sd_lines = MSM_MI2S_SD0 | MSM_MI2S_SD1 | MSM_MI2S_SD2 | |
| 845 | MSM_MI2S_SD3, |
Kuirong Wang | f23f8c5 | 2012-03-31 12:34:51 -0700 | [diff] [blame] | 846 | }; |
| 847 | |
| 848 | struct platform_device mpq_cpudai_mi2s_tx = { |
Patrick Lai | 04baee94 | 2012-05-01 14:38:47 -0700 | [diff] [blame] | 849 | .name = "msm-dai-q6-mi2s", |
| 850 | .id = -1, /*MI2S_TX */ |
Kuirong Wang | f23f8c5 | 2012-03-31 12:34:51 -0700 | [diff] [blame] | 851 | .dev = { |
| 852 | .platform_data = &mpq_mi2s_tx_data, |
| 853 | }, |
| 854 | }; |
| 855 | |
Kuirong Wang | f8c5e14 | 2012-06-21 16:17:32 -0700 | [diff] [blame] | 856 | struct msm_mi2s_pdata apq_mi2s_data = { |
| 857 | .rx_sd_lines = MSM_MI2S_SD0, |
| 858 | .tx_sd_lines = MSM_MI2S_SD3, |
| 859 | }; |
| 860 | |
| 861 | struct platform_device apq_cpudai_mi2s = { |
| 862 | .name = "msm-dai-q6-mi2s", |
| 863 | .id = -1, |
| 864 | .dev = { |
| 865 | .platform_data = &apq_mi2s_data, |
| 866 | }, |
| 867 | }; |
| 868 | |
| 869 | struct platform_device apq_cpudai_i2s_rx = { |
| 870 | .name = "msm-dai-q6", |
| 871 | .id = PRIMARY_I2S_RX, |
| 872 | }; |
| 873 | |
| 874 | struct platform_device apq_cpudai_i2s_tx = { |
| 875 | .name = "msm-dai-q6", |
| 876 | .id = PRIMARY_I2S_TX, |
| 877 | }; |
| 878 | |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 879 | struct platform_device apq_cpu_fe = { |
| 880 | .name = "msm-dai-fe", |
| 881 | .id = -1, |
| 882 | }; |
| 883 | |
| 884 | struct platform_device apq_stub_codec = { |
| 885 | .name = "msm-stub-codec", |
| 886 | .id = 1, |
| 887 | }; |
| 888 | |
| 889 | struct platform_device apq_voice = { |
| 890 | .name = "msm-pcm-voice", |
| 891 | .id = -1, |
| 892 | }; |
| 893 | |
| 894 | struct platform_device apq_voip = { |
| 895 | .name = "msm-voip-dsp", |
| 896 | .id = -1, |
| 897 | }; |
| 898 | |
| 899 | struct platform_device apq_lpa_pcm = { |
| 900 | .name = "msm-pcm-lpa", |
| 901 | .id = -1, |
| 902 | }; |
| 903 | |
Krishnankutty Kolathappilly | 4374e33 | 2012-03-18 22:27:30 -0700 | [diff] [blame] | 904 | struct platform_device apq_compr_dsp = { |
| 905 | .name = "msm-compr-dsp", |
| 906 | .id = -1, |
| 907 | }; |
| 908 | |
| 909 | struct platform_device apq_multi_ch_pcm = { |
| 910 | .name = "msm-multi-ch-pcm-dsp", |
| 911 | .id = -1, |
| 912 | }; |
| 913 | |
Jayasena Sangaraboina | 99bf09c | 2012-07-17 12:03:08 -0700 | [diff] [blame] | 914 | struct platform_device apq_lowlatency_pcm = { |
| 915 | .name = "msm-lowlatency-pcm-dsp", |
| 916 | .id = -1, |
| 917 | }; |
| 918 | |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 919 | struct platform_device apq_pcm_hostless = { |
| 920 | .name = "msm-pcm-hostless", |
| 921 | .id = -1, |
| 922 | }; |
| 923 | |
| 924 | struct platform_device apq_cpudai_afe_01_rx = { |
| 925 | .name = "msm-dai-q6", |
| 926 | .id = 0xE0, |
| 927 | }; |
| 928 | |
| 929 | struct platform_device apq_cpudai_afe_01_tx = { |
| 930 | .name = "msm-dai-q6", |
| 931 | .id = 0xF0, |
| 932 | }; |
| 933 | |
| 934 | struct platform_device apq_cpudai_afe_02_rx = { |
| 935 | .name = "msm-dai-q6", |
| 936 | .id = 0xF1, |
| 937 | }; |
| 938 | |
| 939 | struct platform_device apq_cpudai_afe_02_tx = { |
| 940 | .name = "msm-dai-q6", |
| 941 | .id = 0xE1, |
| 942 | }; |
| 943 | |
| 944 | struct platform_device apq_pcm_afe = { |
| 945 | .name = "msm-pcm-afe", |
| 946 | .id = -1, |
| 947 | }; |
| 948 | |
Neema Shetty | 8427c26 | 2012-02-16 11:23:43 -0800 | [diff] [blame] | 949 | struct platform_device apq_cpudai_stub = { |
| 950 | .name = "msm-dai-stub", |
| 951 | .id = -1, |
| 952 | }; |
| 953 | |
Neema Shetty | 3c9d286 | 2012-03-11 01:25:32 -0800 | [diff] [blame] | 954 | struct platform_device apq_cpudai_slimbus_1_rx = { |
| 955 | .name = "msm-dai-q6", |
| 956 | .id = 0x4002, |
| 957 | }; |
| 958 | |
| 959 | struct platform_device apq_cpudai_slimbus_1_tx = { |
| 960 | .name = "msm-dai-q6", |
| 961 | .id = 0x4003, |
| 962 | }; |
| 963 | |
Kiran Kandi | 97fe19d | 2012-05-20 22:34:04 -0700 | [diff] [blame] | 964 | struct platform_device apq_cpudai_slimbus_2_rx = { |
| 965 | .name = "msm-dai-q6", |
| 966 | .id = 0x4004, |
| 967 | }; |
| 968 | |
Kiran Kandi | 1e6371d | 2012-03-29 11:48:57 -0700 | [diff] [blame] | 969 | struct platform_device apq_cpudai_slimbus_2_tx = { |
| 970 | .name = "msm-dai-q6", |
| 971 | .id = 0x4005, |
| 972 | }; |
| 973 | |
Neema Shetty | c9d86c3 | 2012-05-09 12:01:39 -0700 | [diff] [blame] | 974 | struct platform_device apq_cpudai_slimbus_3_rx = { |
| 975 | .name = "msm-dai-q6", |
| 976 | .id = 0x4006, |
| 977 | }; |
| 978 | |
Helen Zeng | 38c3c96 | 2012-05-17 14:56:20 -0700 | [diff] [blame] | 979 | struct platform_device apq_cpudai_slimbus_3_tx = { |
| 980 | .name = "msm-dai-q6", |
| 981 | .id = 0x4007, |
| 982 | }; |
| 983 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 984 | static struct resource resources_ssbi_pmic1[] = { |
| 985 | { |
| 986 | .start = MSM_PMIC1_SSBI_CMD_PHYS, |
| 987 | .end = MSM_PMIC1_SSBI_CMD_PHYS + MSM_PMIC_SSBI_SIZE - 1, |
| 988 | .flags = IORESOURCE_MEM, |
| 989 | }, |
| 990 | }; |
| 991 | |
Sagar Dharia | 8bdcdaf | 2011-09-16 16:01:15 -0600 | [diff] [blame] | 992 | #define LPASS_SLIMBUS_PHYS 0x28080000 |
| 993 | #define LPASS_SLIMBUS_BAM_PHYS 0x28084000 |
Swaminathan Sathappan | 2316e08 | 2012-02-03 14:07:17 -0800 | [diff] [blame] | 994 | #define LPASS_SLIMBUS_SLEW (MSM8960_TLMM_PHYS + 0x207C) |
Sagar Dharia | 8bdcdaf | 2011-09-16 16:01:15 -0600 | [diff] [blame] | 995 | /* Board info for the slimbus slave device */ |
| 996 | static struct resource slimbus_res[] = { |
| 997 | { |
| 998 | .start = LPASS_SLIMBUS_PHYS, |
| 999 | .end = LPASS_SLIMBUS_PHYS + 8191, |
| 1000 | .flags = IORESOURCE_MEM, |
| 1001 | .name = "slimbus_physical", |
| 1002 | }, |
| 1003 | { |
| 1004 | .start = LPASS_SLIMBUS_BAM_PHYS, |
| 1005 | .end = LPASS_SLIMBUS_BAM_PHYS + 8191, |
| 1006 | .flags = IORESOURCE_MEM, |
| 1007 | .name = "slimbus_bam_physical", |
| 1008 | }, |
| 1009 | { |
Swaminathan Sathappan | 2316e08 | 2012-02-03 14:07:17 -0800 | [diff] [blame] | 1010 | .start = LPASS_SLIMBUS_SLEW, |
| 1011 | .end = LPASS_SLIMBUS_SLEW + 4 - 1, |
| 1012 | .flags = IORESOURCE_MEM, |
| 1013 | .name = "slimbus_slew_reg", |
| 1014 | }, |
| 1015 | { |
Sagar Dharia | 8bdcdaf | 2011-09-16 16:01:15 -0600 | [diff] [blame] | 1016 | .start = SLIMBUS0_CORE_EE1_IRQ, |
| 1017 | .end = SLIMBUS0_CORE_EE1_IRQ, |
| 1018 | .flags = IORESOURCE_IRQ, |
| 1019 | .name = "slimbus_irq", |
| 1020 | }, |
| 1021 | { |
| 1022 | .start = SLIMBUS0_BAM_EE1_IRQ, |
| 1023 | .end = SLIMBUS0_BAM_EE1_IRQ, |
| 1024 | .flags = IORESOURCE_IRQ, |
| 1025 | .name = "slimbus_bam_irq", |
| 1026 | }, |
| 1027 | }; |
| 1028 | |
| 1029 | struct platform_device apq8064_slim_ctrl = { |
| 1030 | .name = "msm_slim_ctrl", |
| 1031 | .id = 1, |
| 1032 | .num_resources = ARRAY_SIZE(slimbus_res), |
| 1033 | .resource = slimbus_res, |
| 1034 | .dev = { |
| 1035 | .coherent_dma_mask = 0xffffffffULL, |
| 1036 | }, |
| 1037 | }; |
| 1038 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1039 | struct platform_device apq8064_device_ssbi_pmic1 = { |
| 1040 | .name = "msm_ssbi", |
| 1041 | .id = 0, |
| 1042 | .resource = resources_ssbi_pmic1, |
| 1043 | .num_resources = ARRAY_SIZE(resources_ssbi_pmic1), |
| 1044 | }; |
| 1045 | |
| 1046 | static struct resource resources_ssbi_pmic2[] = { |
| 1047 | { |
| 1048 | .start = MSM_PMIC2_SSBI_CMD_PHYS, |
| 1049 | .end = MSM_PMIC2_SSBI_CMD_PHYS + MSM_PMIC_SSBI_SIZE - 1, |
| 1050 | .flags = IORESOURCE_MEM, |
| 1051 | }, |
| 1052 | }; |
| 1053 | |
| 1054 | struct platform_device apq8064_device_ssbi_pmic2 = { |
| 1055 | .name = "msm_ssbi", |
| 1056 | .id = 1, |
| 1057 | .resource = resources_ssbi_pmic2, |
| 1058 | .num_resources = ARRAY_SIZE(resources_ssbi_pmic2), |
| 1059 | }; |
| 1060 | |
| 1061 | static struct resource resources_otg[] = { |
| 1062 | { |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 1063 | .start = MSM_HSUSB1_PHYS, |
| 1064 | .end = MSM_HSUSB1_PHYS + MSM_HSUSB1_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1065 | .flags = IORESOURCE_MEM, |
| 1066 | }, |
| 1067 | { |
| 1068 | .start = USB1_HS_IRQ, |
| 1069 | .end = USB1_HS_IRQ, |
| 1070 | .flags = IORESOURCE_IRQ, |
| 1071 | }, |
| 1072 | }; |
| 1073 | |
Stepan Moskovchenko | 14aa649 | 2011-08-08 15:15:01 -0700 | [diff] [blame] | 1074 | struct platform_device apq8064_device_otg = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1075 | .name = "msm_otg", |
| 1076 | .id = -1, |
| 1077 | .num_resources = ARRAY_SIZE(resources_otg), |
| 1078 | .resource = resources_otg, |
| 1079 | .dev = { |
| 1080 | .coherent_dma_mask = 0xffffffff, |
| 1081 | }, |
| 1082 | }; |
| 1083 | |
| 1084 | static struct resource resources_hsusb[] = { |
| 1085 | { |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 1086 | .start = MSM_HSUSB1_PHYS, |
| 1087 | .end = MSM_HSUSB1_PHYS + MSM_HSUSB1_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1088 | .flags = IORESOURCE_MEM, |
| 1089 | }, |
| 1090 | { |
| 1091 | .start = USB1_HS_IRQ, |
| 1092 | .end = USB1_HS_IRQ, |
| 1093 | .flags = IORESOURCE_IRQ, |
| 1094 | }, |
| 1095 | }; |
| 1096 | |
Stepan Moskovchenko | 14aa649 | 2011-08-08 15:15:01 -0700 | [diff] [blame] | 1097 | struct platform_device apq8064_device_gadget_peripheral = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1098 | .name = "msm_hsusb", |
| 1099 | .id = -1, |
| 1100 | .num_resources = ARRAY_SIZE(resources_hsusb), |
| 1101 | .resource = resources_hsusb, |
| 1102 | .dev = { |
| 1103 | .coherent_dma_mask = 0xffffffff, |
| 1104 | }, |
| 1105 | }; |
| 1106 | |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 1107 | static struct resource resources_hsusb_host[] = { |
| 1108 | { |
| 1109 | .start = MSM_HSUSB1_PHYS, |
| 1110 | .end = MSM_HSUSB1_PHYS + MSM_HSUSB1_SIZE - 1, |
| 1111 | .flags = IORESOURCE_MEM, |
| 1112 | }, |
| 1113 | { |
| 1114 | .start = USB1_HS_IRQ, |
| 1115 | .end = USB1_HS_IRQ, |
| 1116 | .flags = IORESOURCE_IRQ, |
| 1117 | }, |
| 1118 | }; |
| 1119 | |
Hemant Kumar | a945b47 | 2012-01-25 15:08:06 -0800 | [diff] [blame] | 1120 | static struct resource resources_hsic_host[] = { |
| 1121 | { |
| 1122 | .start = 0x12510000, |
| 1123 | .end = 0x12510000 + SZ_4K - 1, |
| 1124 | .flags = IORESOURCE_MEM, |
| 1125 | }, |
| 1126 | { |
| 1127 | .start = USB2_HSIC_IRQ, |
| 1128 | .end = USB2_HSIC_IRQ, |
| 1129 | .flags = IORESOURCE_IRQ, |
| 1130 | }, |
| 1131 | { |
| 1132 | .start = MSM_GPIO_TO_INT(49), |
| 1133 | .end = MSM_GPIO_TO_INT(49), |
| 1134 | .name = "peripheral_status_irq", |
| 1135 | .flags = IORESOURCE_IRQ, |
| 1136 | }, |
Vamsi Krishna | 6921cbe | 2012-02-21 18:34:43 -0800 | [diff] [blame] | 1137 | { |
Jack Pham | 0cc75c4 | 2012-10-10 02:03:50 +0200 | [diff] [blame] | 1138 | .start = MSM_GPIO_TO_INT(47), |
| 1139 | .end = MSM_GPIO_TO_INT(47), |
Hemant Kumar | 6fd6503 | 2012-05-23 13:02:24 -0700 | [diff] [blame] | 1140 | .name = "wakeup", |
Jack Pham | 0cc75c4 | 2012-10-10 02:03:50 +0200 | [diff] [blame] | 1141 | .flags = IORESOURCE_IRQ, |
Vamsi Krishna | 6921cbe | 2012-02-21 18:34:43 -0800 | [diff] [blame] | 1142 | }, |
Hemant Kumar | a945b47 | 2012-01-25 15:08:06 -0800 | [diff] [blame] | 1143 | }; |
| 1144 | |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 1145 | static u64 dma_mask = DMA_BIT_MASK(32); |
| 1146 | struct platform_device apq8064_device_hsusb_host = { |
| 1147 | .name = "msm_hsusb_host", |
| 1148 | .id = -1, |
| 1149 | .num_resources = ARRAY_SIZE(resources_hsusb_host), |
| 1150 | .resource = resources_hsusb_host, |
| 1151 | .dev = { |
| 1152 | .dma_mask = &dma_mask, |
| 1153 | .coherent_dma_mask = 0xffffffff, |
| 1154 | }, |
| 1155 | }; |
| 1156 | |
Hemant Kumar | a945b47 | 2012-01-25 15:08:06 -0800 | [diff] [blame] | 1157 | struct platform_device apq8064_device_hsic_host = { |
| 1158 | .name = "msm_hsic_host", |
| 1159 | .id = -1, |
| 1160 | .num_resources = ARRAY_SIZE(resources_hsic_host), |
| 1161 | .resource = resources_hsic_host, |
| 1162 | .dev = { |
| 1163 | .dma_mask = &dma_mask, |
| 1164 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 1165 | }, |
| 1166 | }; |
| 1167 | |
Manu Gautam | 91223e0 | 2011-11-08 15:27:22 +0530 | [diff] [blame] | 1168 | static struct resource resources_ehci_host3[] = { |
| 1169 | { |
| 1170 | .start = MSM_HSUSB3_PHYS, |
| 1171 | .end = MSM_HSUSB3_PHYS + MSM_HSUSB3_SIZE - 1, |
| 1172 | .flags = IORESOURCE_MEM, |
| 1173 | }, |
| 1174 | { |
| 1175 | .start = USB3_HS_IRQ, |
| 1176 | .end = USB3_HS_IRQ, |
| 1177 | .flags = IORESOURCE_IRQ, |
| 1178 | }, |
| 1179 | }; |
| 1180 | |
| 1181 | struct platform_device apq8064_device_ehci_host3 = { |
| 1182 | .name = "msm_ehci_host", |
| 1183 | .id = 0, |
| 1184 | .num_resources = ARRAY_SIZE(resources_ehci_host3), |
| 1185 | .resource = resources_ehci_host3, |
| 1186 | .dev = { |
| 1187 | .dma_mask = &dma_mask, |
| 1188 | .coherent_dma_mask = 0xffffffff, |
| 1189 | }, |
| 1190 | }; |
| 1191 | |
Hemant Kumar | 1d66e1c | 2012-02-13 15:24:59 -0800 | [diff] [blame] | 1192 | static struct resource resources_ehci_host4[] = { |
| 1193 | { |
| 1194 | .start = MSM_HSUSB4_PHYS, |
| 1195 | .end = MSM_HSUSB4_PHYS + MSM_HSUSB4_SIZE - 1, |
| 1196 | .flags = IORESOURCE_MEM, |
| 1197 | }, |
| 1198 | { |
| 1199 | .start = USB4_HS_IRQ, |
| 1200 | .end = USB4_HS_IRQ, |
| 1201 | .flags = IORESOURCE_IRQ, |
| 1202 | }, |
| 1203 | }; |
| 1204 | |
| 1205 | struct platform_device apq8064_device_ehci_host4 = { |
| 1206 | .name = "msm_ehci_host", |
| 1207 | .id = 1, |
| 1208 | .num_resources = ARRAY_SIZE(resources_ehci_host4), |
| 1209 | .resource = resources_ehci_host4, |
| 1210 | .dev = { |
| 1211 | .dma_mask = &dma_mask, |
| 1212 | .coherent_dma_mask = 0xffffffff, |
| 1213 | }, |
| 1214 | }; |
| 1215 | |
Matt Wagantall | f5cc389 | 2012-06-07 19:47:02 -0700 | [diff] [blame] | 1216 | struct platform_device apq8064_device_acpuclk = { |
| 1217 | .name = "acpuclk-8064", |
| 1218 | .id = -1, |
| 1219 | }; |
| 1220 | |
Ramesh Masavarapu | f31ff24 | 2012-05-10 18:55:21 -0700 | [diff] [blame] | 1221 | #define SHARED_IMEM_TZ_BASE 0x2a03f720 |
| 1222 | static struct resource tzlog_resources[] = { |
| 1223 | { |
| 1224 | .start = SHARED_IMEM_TZ_BASE, |
| 1225 | .end = SHARED_IMEM_TZ_BASE + SZ_4K - 1, |
| 1226 | .flags = IORESOURCE_MEM, |
| 1227 | }, |
| 1228 | }; |
| 1229 | |
| 1230 | struct platform_device apq_device_tz_log = { |
| 1231 | .name = "tz_log", |
| 1232 | .id = 0, |
| 1233 | .num_resources = ARRAY_SIZE(tzlog_resources), |
| 1234 | .resource = tzlog_resources, |
| 1235 | }; |
| 1236 | |
Mohan Kumar Gubbihalli Lachma Naik | 7f72edd | 2012-02-06 17:26:47 -0800 | [diff] [blame] | 1237 | /* MSM Video core device */ |
| 1238 | #ifdef CONFIG_MSM_BUS_SCALING |
| 1239 | static struct msm_bus_vectors vidc_init_vectors[] = { |
| 1240 | { |
| 1241 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 1242 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1243 | .ab = 0, |
| 1244 | .ib = 0, |
| 1245 | }, |
| 1246 | { |
| 1247 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 1248 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1249 | .ab = 0, |
| 1250 | .ib = 0, |
| 1251 | }, |
| 1252 | { |
| 1253 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1254 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1255 | .ab = 0, |
| 1256 | .ib = 0, |
| 1257 | }, |
| 1258 | { |
| 1259 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1260 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1261 | .ab = 0, |
| 1262 | .ib = 0, |
| 1263 | }, |
| 1264 | }; |
| 1265 | static struct msm_bus_vectors vidc_venc_vga_vectors[] = { |
| 1266 | { |
| 1267 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 1268 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1269 | .ab = 54525952, |
| 1270 | .ib = 436207616, |
| 1271 | }, |
| 1272 | { |
| 1273 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 1274 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1275 | .ab = 72351744, |
| 1276 | .ib = 289406976, |
| 1277 | }, |
| 1278 | { |
| 1279 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1280 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1281 | .ab = 500000, |
| 1282 | .ib = 1000000, |
| 1283 | }, |
| 1284 | { |
| 1285 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1286 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1287 | .ab = 500000, |
| 1288 | .ib = 1000000, |
| 1289 | }, |
| 1290 | }; |
| 1291 | static struct msm_bus_vectors vidc_vdec_vga_vectors[] = { |
| 1292 | { |
| 1293 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 1294 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1295 | .ab = 40894464, |
| 1296 | .ib = 327155712, |
| 1297 | }, |
| 1298 | { |
| 1299 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 1300 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1301 | .ab = 48234496, |
| 1302 | .ib = 192937984, |
| 1303 | }, |
| 1304 | { |
| 1305 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1306 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1307 | .ab = 500000, |
| 1308 | .ib = 2000000, |
| 1309 | }, |
| 1310 | { |
| 1311 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1312 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1313 | .ab = 500000, |
| 1314 | .ib = 2000000, |
| 1315 | }, |
| 1316 | }; |
| 1317 | static struct msm_bus_vectors vidc_venc_720p_vectors[] = { |
| 1318 | { |
| 1319 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 1320 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1321 | .ab = 163577856, |
| 1322 | .ib = 1308622848, |
| 1323 | }, |
| 1324 | { |
| 1325 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 1326 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1327 | .ab = 219152384, |
| 1328 | .ib = 876609536, |
| 1329 | }, |
| 1330 | { |
| 1331 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1332 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1333 | .ab = 1750000, |
| 1334 | .ib = 3500000, |
| 1335 | }, |
| 1336 | { |
| 1337 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1338 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1339 | .ab = 1750000, |
| 1340 | .ib = 3500000, |
| 1341 | }, |
| 1342 | }; |
| 1343 | static struct msm_bus_vectors vidc_vdec_720p_vectors[] = { |
| 1344 | { |
| 1345 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 1346 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1347 | .ab = 121634816, |
| 1348 | .ib = 973078528, |
| 1349 | }, |
| 1350 | { |
| 1351 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 1352 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1353 | .ab = 155189248, |
| 1354 | .ib = 620756992, |
| 1355 | }, |
| 1356 | { |
| 1357 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1358 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1359 | .ab = 1750000, |
| 1360 | .ib = 7000000, |
| 1361 | }, |
| 1362 | { |
| 1363 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1364 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1365 | .ab = 1750000, |
| 1366 | .ib = 7000000, |
| 1367 | }, |
| 1368 | }; |
| 1369 | static struct msm_bus_vectors vidc_venc_1080p_vectors[] = { |
| 1370 | { |
| 1371 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 1372 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1373 | .ab = 372244480, |
| 1374 | .ib = 2560000000U, |
| 1375 | }, |
| 1376 | { |
| 1377 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 1378 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1379 | .ab = 501219328, |
| 1380 | .ib = 2560000000U, |
| 1381 | }, |
| 1382 | { |
| 1383 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1384 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1385 | .ab = 2500000, |
| 1386 | .ib = 5000000, |
| 1387 | }, |
| 1388 | { |
| 1389 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1390 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1391 | .ab = 2500000, |
| 1392 | .ib = 5000000, |
| 1393 | }, |
| 1394 | }; |
| 1395 | static struct msm_bus_vectors vidc_vdec_1080p_vectors[] = { |
| 1396 | { |
| 1397 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 1398 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1399 | .ab = 222298112, |
| 1400 | .ib = 2560000000U, |
| 1401 | }, |
| 1402 | { |
| 1403 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 1404 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1405 | .ab = 330301440, |
| 1406 | .ib = 2560000000U, |
| 1407 | }, |
| 1408 | { |
| 1409 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1410 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1411 | .ab = 2500000, |
| 1412 | .ib = 700000000, |
| 1413 | }, |
| 1414 | { |
| 1415 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1416 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1417 | .ab = 2500000, |
| 1418 | .ib = 10000000, |
| 1419 | }, |
| 1420 | }; |
| 1421 | |
Arun Menon | 152c3c7 | 2012-06-20 11:50:08 -0700 | [diff] [blame] | 1422 | static struct msm_bus_vectors vidc_venc_1080p_turbo_vectors[] = { |
| 1423 | { |
| 1424 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 1425 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1426 | .ab = 222298112, |
| 1427 | .ib = 3522000000U, |
| 1428 | }, |
| 1429 | { |
| 1430 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 1431 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1432 | .ab = 330301440, |
| 1433 | .ib = 3522000000U, |
| 1434 | }, |
| 1435 | { |
| 1436 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1437 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1438 | .ab = 2500000, |
| 1439 | .ib = 700000000, |
| 1440 | }, |
| 1441 | { |
| 1442 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1443 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1444 | .ab = 2500000, |
| 1445 | .ib = 10000000, |
| 1446 | }, |
| 1447 | }; |
| 1448 | static struct msm_bus_vectors vidc_vdec_1080p_turbo_vectors[] = { |
| 1449 | { |
| 1450 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 1451 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1452 | .ab = 222298112, |
| 1453 | .ib = 3522000000U, |
| 1454 | }, |
| 1455 | { |
| 1456 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 1457 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1458 | .ab = 330301440, |
| 1459 | .ib = 3522000000U, |
| 1460 | }, |
| 1461 | { |
| 1462 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1463 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1464 | .ab = 2500000, |
| 1465 | .ib = 700000000, |
| 1466 | }, |
| 1467 | { |
| 1468 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 1469 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 1470 | .ab = 2500000, |
| 1471 | .ib = 10000000, |
| 1472 | }, |
| 1473 | }; |
| 1474 | |
Mohan Kumar Gubbihalli Lachma Naik | 7f72edd | 2012-02-06 17:26:47 -0800 | [diff] [blame] | 1475 | static struct msm_bus_paths vidc_bus_client_config[] = { |
| 1476 | { |
| 1477 | ARRAY_SIZE(vidc_init_vectors), |
| 1478 | vidc_init_vectors, |
| 1479 | }, |
| 1480 | { |
| 1481 | ARRAY_SIZE(vidc_venc_vga_vectors), |
| 1482 | vidc_venc_vga_vectors, |
| 1483 | }, |
| 1484 | { |
| 1485 | ARRAY_SIZE(vidc_vdec_vga_vectors), |
| 1486 | vidc_vdec_vga_vectors, |
| 1487 | }, |
| 1488 | { |
| 1489 | ARRAY_SIZE(vidc_venc_720p_vectors), |
| 1490 | vidc_venc_720p_vectors, |
| 1491 | }, |
| 1492 | { |
| 1493 | ARRAY_SIZE(vidc_vdec_720p_vectors), |
| 1494 | vidc_vdec_720p_vectors, |
| 1495 | }, |
| 1496 | { |
| 1497 | ARRAY_SIZE(vidc_venc_1080p_vectors), |
| 1498 | vidc_venc_1080p_vectors, |
| 1499 | }, |
| 1500 | { |
| 1501 | ARRAY_SIZE(vidc_vdec_1080p_vectors), |
| 1502 | vidc_vdec_1080p_vectors, |
| 1503 | }, |
Arun Menon | 152c3c7 | 2012-06-20 11:50:08 -0700 | [diff] [blame] | 1504 | { |
| 1505 | ARRAY_SIZE(vidc_venc_1080p_turbo_vectors), |
| 1506 | vidc_venc_1080p_turbo_vectors, |
| 1507 | }, |
| 1508 | { |
| 1509 | ARRAY_SIZE(vidc_vdec_1080p_turbo_vectors), |
| 1510 | vidc_vdec_1080p_turbo_vectors, |
| 1511 | }, |
Mohan Kumar Gubbihalli Lachma Naik | 7f72edd | 2012-02-06 17:26:47 -0800 | [diff] [blame] | 1512 | }; |
| 1513 | |
| 1514 | static struct msm_bus_scale_pdata vidc_bus_client_data = { |
| 1515 | vidc_bus_client_config, |
| 1516 | ARRAY_SIZE(vidc_bus_client_config), |
| 1517 | .name = "vidc", |
| 1518 | }; |
| 1519 | #endif |
| 1520 | |
| 1521 | |
| 1522 | #define APQ8064_VIDC_BASE_PHYS 0x04400000 |
| 1523 | #define APQ8064_VIDC_BASE_SIZE 0x00100000 |
| 1524 | |
| 1525 | static struct resource apq8064_device_vidc_resources[] = { |
| 1526 | { |
| 1527 | .start = APQ8064_VIDC_BASE_PHYS, |
| 1528 | .end = APQ8064_VIDC_BASE_PHYS + APQ8064_VIDC_BASE_SIZE - 1, |
| 1529 | .flags = IORESOURCE_MEM, |
| 1530 | }, |
| 1531 | { |
| 1532 | .start = VCODEC_IRQ, |
| 1533 | .end = VCODEC_IRQ, |
| 1534 | .flags = IORESOURCE_IRQ, |
| 1535 | }, |
| 1536 | }; |
| 1537 | |
| 1538 | struct msm_vidc_platform_data apq8064_vidc_platform_data = { |
| 1539 | #ifdef CONFIG_MSM_BUS_SCALING |
| 1540 | .vidc_bus_client_pdata = &vidc_bus_client_data, |
| 1541 | #endif |
| 1542 | #ifdef CONFIG_MSM_MULTIMEDIA_USE_ION |
| 1543 | .memtype = ION_CP_MM_HEAP_ID, |
| 1544 | .enable_ion = 1, |
Deepak kotur | eda295a | 2012-05-10 19:49:46 -0700 | [diff] [blame] | 1545 | .cp_enabled = 1, |
Mohan Kumar Gubbihalli Lachma Naik | 7f72edd | 2012-02-06 17:26:47 -0800 | [diff] [blame] | 1546 | #else |
| 1547 | .memtype = MEMTYPE_EBI1, |
| 1548 | .enable_ion = 0, |
| 1549 | #endif |
| 1550 | .disable_dmx = 0, |
| 1551 | .disable_fullhd = 0, |
Mohan Kumar Gubbihalli Lachma Naik | ed9dc91 | 2012-03-01 19:11:14 -0800 | [diff] [blame] | 1552 | .cont_mode_dpb_count = 18, |
Riaz Rahaman | 84f8c68 | 2012-05-30 13:32:10 +0530 | [diff] [blame] | 1553 | .fw_addr = 0x9fe00000, |
Mohan Kumar Gubbihalli Lachma Naik | 7f72edd | 2012-02-06 17:26:47 -0800 | [diff] [blame] | 1554 | }; |
| 1555 | |
| 1556 | struct platform_device apq8064_msm_device_vidc = { |
| 1557 | .name = "msm_vidc", |
| 1558 | .id = 0, |
| 1559 | .num_resources = ARRAY_SIZE(apq8064_device_vidc_resources), |
| 1560 | .resource = apq8064_device_vidc_resources, |
| 1561 | .dev = { |
| 1562 | .platform_data = &apq8064_vidc_platform_data, |
| 1563 | }, |
| 1564 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1565 | #define MSM_SDC1_BASE 0x12400000 |
| 1566 | #define MSM_SDC1_DML_BASE (MSM_SDC1_BASE + 0x800) |
| 1567 | #define MSM_SDC1_BAM_BASE (MSM_SDC1_BASE + 0x2000) |
| 1568 | #define MSM_SDC2_BASE 0x12140000 |
| 1569 | #define MSM_SDC2_DML_BASE (MSM_SDC2_BASE + 0x800) |
| 1570 | #define MSM_SDC2_BAM_BASE (MSM_SDC2_BASE + 0x2000) |
| 1571 | #define MSM_SDC3_BASE 0x12180000 |
| 1572 | #define MSM_SDC3_DML_BASE (MSM_SDC3_BASE + 0x800) |
| 1573 | #define MSM_SDC3_BAM_BASE (MSM_SDC3_BASE + 0x2000) |
| 1574 | #define MSM_SDC4_BASE 0x121C0000 |
| 1575 | #define MSM_SDC4_DML_BASE (MSM_SDC4_BASE + 0x800) |
| 1576 | #define MSM_SDC4_BAM_BASE (MSM_SDC4_BASE + 0x2000) |
| 1577 | |
| 1578 | static struct resource resources_sdc1[] = { |
| 1579 | { |
| 1580 | .name = "core_mem", |
| 1581 | .flags = IORESOURCE_MEM, |
| 1582 | .start = MSM_SDC1_BASE, |
| 1583 | .end = MSM_SDC1_DML_BASE - 1, |
| 1584 | }, |
| 1585 | { |
| 1586 | .name = "core_irq", |
| 1587 | .flags = IORESOURCE_IRQ, |
| 1588 | .start = SDC1_IRQ_0, |
| 1589 | .end = SDC1_IRQ_0 |
| 1590 | }, |
| 1591 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1592 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1593 | .name = "dml_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1594 | .start = MSM_SDC1_DML_BASE, |
| 1595 | .end = MSM_SDC1_BAM_BASE - 1, |
| 1596 | .flags = IORESOURCE_MEM, |
| 1597 | }, |
| 1598 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1599 | .name = "bam_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1600 | .start = MSM_SDC1_BAM_BASE, |
| 1601 | .end = MSM_SDC1_BAM_BASE + (2 * SZ_4K) - 1, |
| 1602 | .flags = IORESOURCE_MEM, |
| 1603 | }, |
| 1604 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1605 | .name = "bam_irq", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1606 | .start = SDC1_BAM_IRQ, |
| 1607 | .end = SDC1_BAM_IRQ, |
| 1608 | .flags = IORESOURCE_IRQ, |
| 1609 | }, |
| 1610 | #endif |
| 1611 | }; |
| 1612 | |
| 1613 | static struct resource resources_sdc2[] = { |
| 1614 | { |
| 1615 | .name = "core_mem", |
| 1616 | .flags = IORESOURCE_MEM, |
| 1617 | .start = MSM_SDC2_BASE, |
| 1618 | .end = MSM_SDC2_DML_BASE - 1, |
| 1619 | }, |
| 1620 | { |
| 1621 | .name = "core_irq", |
| 1622 | .flags = IORESOURCE_IRQ, |
| 1623 | .start = SDC2_IRQ_0, |
| 1624 | .end = SDC2_IRQ_0 |
| 1625 | }, |
| 1626 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1627 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1628 | .name = "dml_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1629 | .start = MSM_SDC2_DML_BASE, |
| 1630 | .end = MSM_SDC2_BAM_BASE - 1, |
| 1631 | .flags = IORESOURCE_MEM, |
| 1632 | }, |
| 1633 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1634 | .name = "bam_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1635 | .start = MSM_SDC2_BAM_BASE, |
| 1636 | .end = MSM_SDC2_BAM_BASE + (2 * SZ_4K) - 1, |
| 1637 | .flags = IORESOURCE_MEM, |
| 1638 | }, |
| 1639 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1640 | .name = "bam_irq", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1641 | .start = SDC2_BAM_IRQ, |
| 1642 | .end = SDC2_BAM_IRQ, |
| 1643 | .flags = IORESOURCE_IRQ, |
| 1644 | }, |
| 1645 | #endif |
| 1646 | }; |
| 1647 | |
| 1648 | static struct resource resources_sdc3[] = { |
| 1649 | { |
| 1650 | .name = "core_mem", |
| 1651 | .flags = IORESOURCE_MEM, |
| 1652 | .start = MSM_SDC3_BASE, |
| 1653 | .end = MSM_SDC3_DML_BASE - 1, |
| 1654 | }, |
| 1655 | { |
| 1656 | .name = "core_irq", |
| 1657 | .flags = IORESOURCE_IRQ, |
| 1658 | .start = SDC3_IRQ_0, |
| 1659 | .end = SDC3_IRQ_0 |
| 1660 | }, |
| 1661 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1662 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1663 | .name = "dml_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1664 | .start = MSM_SDC3_DML_BASE, |
| 1665 | .end = MSM_SDC3_BAM_BASE - 1, |
| 1666 | .flags = IORESOURCE_MEM, |
| 1667 | }, |
| 1668 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1669 | .name = "bam_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1670 | .start = MSM_SDC3_BAM_BASE, |
| 1671 | .end = MSM_SDC3_BAM_BASE + (2 * SZ_4K) - 1, |
| 1672 | .flags = IORESOURCE_MEM, |
| 1673 | }, |
| 1674 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1675 | .name = "bam_irq", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1676 | .start = SDC3_BAM_IRQ, |
| 1677 | .end = SDC3_BAM_IRQ, |
| 1678 | .flags = IORESOURCE_IRQ, |
| 1679 | }, |
| 1680 | #endif |
| 1681 | }; |
| 1682 | |
| 1683 | static struct resource resources_sdc4[] = { |
| 1684 | { |
| 1685 | .name = "core_mem", |
| 1686 | .flags = IORESOURCE_MEM, |
| 1687 | .start = MSM_SDC4_BASE, |
| 1688 | .end = MSM_SDC4_DML_BASE - 1, |
| 1689 | }, |
| 1690 | { |
| 1691 | .name = "core_irq", |
| 1692 | .flags = IORESOURCE_IRQ, |
| 1693 | .start = SDC4_IRQ_0, |
| 1694 | .end = SDC4_IRQ_0 |
| 1695 | }, |
| 1696 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1697 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1698 | .name = "dml_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1699 | .start = MSM_SDC4_DML_BASE, |
| 1700 | .end = MSM_SDC4_BAM_BASE - 1, |
| 1701 | .flags = IORESOURCE_MEM, |
| 1702 | }, |
| 1703 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1704 | .name = "bam_mem", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1705 | .start = MSM_SDC4_BAM_BASE, |
| 1706 | .end = MSM_SDC4_BAM_BASE + (2 * SZ_4K) - 1, |
| 1707 | .flags = IORESOURCE_MEM, |
| 1708 | }, |
| 1709 | { |
Sujit Reddy Thumma | 1dfac2c | 2012-07-30 10:15:39 +0530 | [diff] [blame] | 1710 | .name = "bam_irq", |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1711 | .start = SDC4_BAM_IRQ, |
| 1712 | .end = SDC4_BAM_IRQ, |
| 1713 | .flags = IORESOURCE_IRQ, |
| 1714 | }, |
| 1715 | #endif |
| 1716 | }; |
| 1717 | |
| 1718 | struct platform_device apq8064_device_sdc1 = { |
| 1719 | .name = "msm_sdcc", |
| 1720 | .id = 1, |
| 1721 | .num_resources = ARRAY_SIZE(resources_sdc1), |
| 1722 | .resource = resources_sdc1, |
| 1723 | .dev = { |
| 1724 | .coherent_dma_mask = 0xffffffff, |
| 1725 | }, |
| 1726 | }; |
| 1727 | |
| 1728 | struct platform_device apq8064_device_sdc2 = { |
| 1729 | .name = "msm_sdcc", |
| 1730 | .id = 2, |
| 1731 | .num_resources = ARRAY_SIZE(resources_sdc2), |
| 1732 | .resource = resources_sdc2, |
| 1733 | .dev = { |
| 1734 | .coherent_dma_mask = 0xffffffff, |
| 1735 | }, |
| 1736 | }; |
| 1737 | |
| 1738 | struct platform_device apq8064_device_sdc3 = { |
| 1739 | .name = "msm_sdcc", |
| 1740 | .id = 3, |
| 1741 | .num_resources = ARRAY_SIZE(resources_sdc3), |
| 1742 | .resource = resources_sdc3, |
| 1743 | .dev = { |
| 1744 | .coherent_dma_mask = 0xffffffff, |
| 1745 | }, |
| 1746 | }; |
| 1747 | |
| 1748 | struct platform_device apq8064_device_sdc4 = { |
| 1749 | .name = "msm_sdcc", |
| 1750 | .id = 4, |
| 1751 | .num_resources = ARRAY_SIZE(resources_sdc4), |
| 1752 | .resource = resources_sdc4, |
| 1753 | .dev = { |
| 1754 | .coherent_dma_mask = 0xffffffff, |
| 1755 | }, |
| 1756 | }; |
| 1757 | |
| 1758 | static struct platform_device *apq8064_sdcc_devices[] __initdata = { |
| 1759 | &apq8064_device_sdc1, |
| 1760 | &apq8064_device_sdc2, |
| 1761 | &apq8064_device_sdc3, |
| 1762 | &apq8064_device_sdc4, |
| 1763 | }; |
| 1764 | |
| 1765 | int __init apq8064_add_sdcc(unsigned int controller, |
| 1766 | struct mmc_platform_data *plat) |
| 1767 | { |
| 1768 | struct platform_device *pdev; |
| 1769 | |
| 1770 | if (!plat) |
| 1771 | return 0; |
| 1772 | if (controller < 1 || controller > 4) |
| 1773 | return -EINVAL; |
| 1774 | |
| 1775 | pdev = apq8064_sdcc_devices[controller-1]; |
| 1776 | pdev->dev.platform_data = plat; |
| 1777 | return platform_device_register(pdev); |
| 1778 | } |
| 1779 | |
Yan He | 06913ce | 2011-08-26 16:33:46 -0700 | [diff] [blame] | 1780 | static struct resource resources_sps[] = { |
| 1781 | { |
| 1782 | .name = "pipe_mem", |
| 1783 | .start = 0x12800000, |
| 1784 | .end = 0x12800000 + 0x4000 - 1, |
| 1785 | .flags = IORESOURCE_MEM, |
| 1786 | }, |
| 1787 | { |
| 1788 | .name = "bamdma_dma", |
| 1789 | .start = 0x12240000, |
| 1790 | .end = 0x12240000 + 0x1000 - 1, |
| 1791 | .flags = IORESOURCE_MEM, |
| 1792 | }, |
| 1793 | { |
| 1794 | .name = "bamdma_bam", |
| 1795 | .start = 0x12244000, |
| 1796 | .end = 0x12244000 + 0x4000 - 1, |
| 1797 | .flags = IORESOURCE_MEM, |
| 1798 | }, |
| 1799 | { |
| 1800 | .name = "bamdma_irq", |
| 1801 | .start = SPS_BAM_DMA_IRQ, |
| 1802 | .end = SPS_BAM_DMA_IRQ, |
| 1803 | .flags = IORESOURCE_IRQ, |
| 1804 | }, |
| 1805 | }; |
| 1806 | |
Gagan Mac | 8a7a5d3 | 2011-11-11 16:43:06 -0700 | [diff] [blame] | 1807 | struct platform_device msm_bus_8064_sys_fabric = { |
| 1808 | .name = "msm_bus_fabric", |
| 1809 | .id = MSM_BUS_FAB_SYSTEM, |
| 1810 | }; |
| 1811 | struct platform_device msm_bus_8064_apps_fabric = { |
| 1812 | .name = "msm_bus_fabric", |
| 1813 | .id = MSM_BUS_FAB_APPSS, |
| 1814 | }; |
| 1815 | struct platform_device msm_bus_8064_mm_fabric = { |
| 1816 | .name = "msm_bus_fabric", |
| 1817 | .id = MSM_BUS_FAB_MMSS, |
| 1818 | }; |
| 1819 | struct platform_device msm_bus_8064_sys_fpb = { |
| 1820 | .name = "msm_bus_fabric", |
| 1821 | .id = MSM_BUS_FAB_SYSTEM_FPB, |
| 1822 | }; |
| 1823 | struct platform_device msm_bus_8064_cpss_fpb = { |
| 1824 | .name = "msm_bus_fabric", |
| 1825 | .id = MSM_BUS_FAB_CPSS_FPB, |
| 1826 | }; |
| 1827 | |
Yan He | 06913ce | 2011-08-26 16:33:46 -0700 | [diff] [blame] | 1828 | static struct msm_sps_platform_data msm_sps_pdata = { |
| 1829 | .bamdma_restricted_pipes = 0x06, |
| 1830 | }; |
| 1831 | |
| 1832 | struct platform_device msm_device_sps_apq8064 = { |
| 1833 | .name = "msm_sps", |
| 1834 | .id = -1, |
| 1835 | .num_resources = ARRAY_SIZE(resources_sps), |
| 1836 | .resource = resources_sps, |
| 1837 | .dev.platform_data = &msm_sps_pdata, |
| 1838 | }; |
| 1839 | |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1840 | static struct resource smd_resource[] = { |
| 1841 | { |
| 1842 | .name = "a9_m2a_0", |
| 1843 | .start = INT_A9_M2A_0, |
| 1844 | .flags = IORESOURCE_IRQ, |
| 1845 | }, |
| 1846 | { |
| 1847 | .name = "a9_m2a_5", |
| 1848 | .start = INT_A9_M2A_5, |
| 1849 | .flags = IORESOURCE_IRQ, |
| 1850 | }, |
| 1851 | { |
| 1852 | .name = "adsp_a11", |
| 1853 | .start = INT_ADSP_A11, |
| 1854 | .flags = IORESOURCE_IRQ, |
| 1855 | }, |
| 1856 | { |
| 1857 | .name = "adsp_a11_smsm", |
| 1858 | .start = INT_ADSP_A11_SMSM, |
| 1859 | .flags = IORESOURCE_IRQ, |
| 1860 | }, |
| 1861 | { |
| 1862 | .name = "dsps_a11", |
| 1863 | .start = INT_DSPS_A11, |
| 1864 | .flags = IORESOURCE_IRQ, |
| 1865 | }, |
| 1866 | { |
| 1867 | .name = "dsps_a11_smsm", |
| 1868 | .start = INT_DSPS_A11_SMSM, |
| 1869 | .flags = IORESOURCE_IRQ, |
| 1870 | }, |
| 1871 | { |
| 1872 | .name = "wcnss_a11", |
| 1873 | .start = INT_WCNSS_A11, |
| 1874 | .flags = IORESOURCE_IRQ, |
| 1875 | }, |
| 1876 | { |
| 1877 | .name = "wcnss_a11_smsm", |
| 1878 | .start = INT_WCNSS_A11_SMSM, |
| 1879 | .flags = IORESOURCE_IRQ, |
| 1880 | }, |
| 1881 | }; |
| 1882 | |
| 1883 | static struct smd_subsystem_config smd_config_list[] = { |
| 1884 | { |
| 1885 | .irq_config_id = SMD_MODEM, |
| 1886 | .subsys_name = "gss", |
| 1887 | .edge = SMD_APPS_MODEM, |
| 1888 | |
| 1889 | .smd_int.irq_name = "a9_m2a_0", |
| 1890 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1891 | .smd_int.irq_id = -1, |
| 1892 | .smd_int.device_name = "smd_dev", |
| 1893 | .smd_int.dev_id = 0, |
| 1894 | .smd_int.out_bit_pos = 1 << 3, |
| 1895 | .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1896 | .smd_int.out_offset = 0x8, |
| 1897 | |
| 1898 | .smsm_int.irq_name = "a9_m2a_5", |
| 1899 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1900 | .smsm_int.irq_id = -1, |
| 1901 | .smsm_int.device_name = "smd_smsm", |
| 1902 | .smsm_int.dev_id = 0, |
| 1903 | .smsm_int.out_bit_pos = 1 << 4, |
| 1904 | .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1905 | .smsm_int.out_offset = 0x8, |
| 1906 | }, |
| 1907 | { |
| 1908 | .irq_config_id = SMD_Q6, |
Stephen Boyd | 77db8bb | 2012-06-27 15:15:16 -0700 | [diff] [blame] | 1909 | .subsys_name = "adsp", |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1910 | .edge = SMD_APPS_QDSP, |
| 1911 | |
| 1912 | .smd_int.irq_name = "adsp_a11", |
| 1913 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1914 | .smd_int.irq_id = -1, |
| 1915 | .smd_int.device_name = "smd_dev", |
| 1916 | .smd_int.dev_id = 0, |
| 1917 | .smd_int.out_bit_pos = 1 << 15, |
| 1918 | .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1919 | .smd_int.out_offset = 0x8, |
| 1920 | |
| 1921 | .smsm_int.irq_name = "adsp_a11_smsm", |
| 1922 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1923 | .smsm_int.irq_id = -1, |
| 1924 | .smsm_int.device_name = "smd_smsm", |
| 1925 | .smsm_int.dev_id = 0, |
| 1926 | .smsm_int.out_bit_pos = 1 << 14, |
| 1927 | .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1928 | .smsm_int.out_offset = 0x8, |
| 1929 | }, |
| 1930 | { |
| 1931 | .irq_config_id = SMD_DSPS, |
| 1932 | .subsys_name = "dsps", |
| 1933 | .edge = SMD_APPS_DSPS, |
| 1934 | |
| 1935 | .smd_int.irq_name = "dsps_a11", |
| 1936 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1937 | .smd_int.irq_id = -1, |
| 1938 | .smd_int.device_name = "smd_dev", |
| 1939 | .smd_int.dev_id = 0, |
| 1940 | .smd_int.out_bit_pos = 1, |
| 1941 | .smd_int.out_base = (void __iomem *)MSM_SIC_NON_SECURE_BASE, |
| 1942 | .smd_int.out_offset = 0x4080, |
| 1943 | |
| 1944 | .smsm_int.irq_name = "dsps_a11_smsm", |
| 1945 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1946 | .smsm_int.irq_id = -1, |
| 1947 | .smsm_int.device_name = "smd_smsm", |
| 1948 | .smsm_int.dev_id = 0, |
| 1949 | .smsm_int.out_bit_pos = 1, |
| 1950 | .smsm_int.out_base = (void __iomem *)MSM_SIC_NON_SECURE_BASE, |
| 1951 | .smsm_int.out_offset = 0x4094, |
| 1952 | }, |
| 1953 | { |
| 1954 | .irq_config_id = SMD_WCNSS, |
| 1955 | .subsys_name = "wcnss", |
| 1956 | .edge = SMD_APPS_WCNSS, |
| 1957 | |
| 1958 | .smd_int.irq_name = "wcnss_a11", |
| 1959 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1960 | .smd_int.irq_id = -1, |
| 1961 | .smd_int.device_name = "smd_dev", |
| 1962 | .smd_int.dev_id = 0, |
| 1963 | .smd_int.out_bit_pos = 1 << 25, |
| 1964 | .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1965 | .smd_int.out_offset = 0x8, |
| 1966 | |
| 1967 | .smsm_int.irq_name = "wcnss_a11_smsm", |
| 1968 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1969 | .smsm_int.irq_id = -1, |
| 1970 | .smsm_int.device_name = "smd_smsm", |
| 1971 | .smsm_int.dev_id = 0, |
| 1972 | .smsm_int.out_bit_pos = 1 << 23, |
| 1973 | .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1974 | .smsm_int.out_offset = 0x8, |
| 1975 | }, |
| 1976 | }; |
| 1977 | |
Eric Holmberg | 2bb6ccd | 2012-03-13 13:05:14 -0600 | [diff] [blame] | 1978 | static struct smd_subsystem_restart_config smd_ssr_config = { |
| 1979 | .disable_smsm_reset_handshake = 1, |
| 1980 | }; |
| 1981 | |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1982 | static struct smd_platform smd_platform_data = { |
| 1983 | .num_ss_configs = ARRAY_SIZE(smd_config_list), |
| 1984 | .smd_ss_configs = smd_config_list, |
Eric Holmberg | 2bb6ccd | 2012-03-13 13:05:14 -0600 | [diff] [blame] | 1985 | .smd_ssr_config = &smd_ssr_config, |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1986 | }; |
| 1987 | |
Jeff Hugo | 0c0f5e9 | 2011-09-28 13:55:45 -0600 | [diff] [blame] | 1988 | struct platform_device msm_device_smd_apq8064 = { |
| 1989 | .name = "msm_smd", |
| 1990 | .id = -1, |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1991 | .resource = smd_resource, |
| 1992 | .num_resources = ARRAY_SIZE(smd_resource), |
| 1993 | .dev = { |
| 1994 | .platform_data = &smd_platform_data, |
| 1995 | }, |
Jeff Hugo | 0c0f5e9 | 2011-09-28 13:55:45 -0600 | [diff] [blame] | 1996 | }; |
| 1997 | |
Niranjana Vishwanathapura | 06f8933 | 2012-05-03 17:11:13 -0600 | [diff] [blame] | 1998 | static struct resource resources_msm_pcie[] = { |
| 1999 | { |
Niranjana Vishwanathapura | 68210ff | 2012-06-24 18:03:49 -0600 | [diff] [blame] | 2000 | .name = "pcie_parf", |
Niranjana Vishwanathapura | 06f8933 | 2012-05-03 17:11:13 -0600 | [diff] [blame] | 2001 | .start = PCIE20_PARF_PHYS, |
| 2002 | .end = PCIE20_PARF_PHYS + PCIE20_PARF_SIZE - 1, |
| 2003 | .flags = IORESOURCE_MEM, |
| 2004 | }, |
| 2005 | { |
Niranjana Vishwanathapura | 68210ff | 2012-06-24 18:03:49 -0600 | [diff] [blame] | 2006 | .name = "pcie_elbi", |
Niranjana Vishwanathapura | 06f8933 | 2012-05-03 17:11:13 -0600 | [diff] [blame] | 2007 | .start = PCIE20_ELBI_PHYS, |
| 2008 | .end = PCIE20_ELBI_PHYS + PCIE20_ELBI_SIZE - 1, |
| 2009 | .flags = IORESOURCE_MEM, |
| 2010 | }, |
| 2011 | { |
| 2012 | .name = "pcie20", |
| 2013 | .start = PCIE20_PHYS, |
| 2014 | .end = PCIE20_PHYS + PCIE20_SIZE - 1, |
| 2015 | .flags = IORESOURCE_MEM, |
| 2016 | }, |
Niranjana Vishwanathapura | 06f8933 | 2012-05-03 17:11:13 -0600 | [diff] [blame] | 2017 | }; |
| 2018 | |
| 2019 | struct platform_device msm_device_pcie = { |
| 2020 | .name = "msm_pcie", |
| 2021 | .id = -1, |
| 2022 | .num_resources = ARRAY_SIZE(resources_msm_pcie), |
| 2023 | .resource = resources_msm_pcie, |
| 2024 | }; |
| 2025 | |
Ramesh Masavarapu | f46be1b | 2011-11-03 11:13:41 -0700 | [diff] [blame] | 2026 | #ifdef CONFIG_HW_RANDOM_MSM |
| 2027 | /* PRNG device */ |
| 2028 | #define MSM_PRNG_PHYS 0x1A500000 |
| 2029 | static struct resource rng_resources = { |
| 2030 | .flags = IORESOURCE_MEM, |
| 2031 | .start = MSM_PRNG_PHYS, |
| 2032 | .end = MSM_PRNG_PHYS + SZ_512 - 1, |
| 2033 | }; |
| 2034 | |
| 2035 | struct platform_device apq8064_device_rng = { |
| 2036 | .name = "msm_rng", |
| 2037 | .id = 0, |
| 2038 | .num_resources = 1, |
| 2039 | .resource = &rng_resources, |
| 2040 | }; |
| 2041 | #endif |
| 2042 | |
Matt Wagantall | 292aace | 2012-01-26 19:12:34 -0800 | [diff] [blame] | 2043 | static struct resource msm_gss_resources[] = { |
| 2044 | { |
| 2045 | .start = 0x10000000, |
| 2046 | .end = 0x10000000 + SZ_256 - 1, |
| 2047 | .flags = IORESOURCE_MEM, |
| 2048 | }, |
Matt Wagantall | 19ac4fd | 2012-02-03 20:18:23 -0800 | [diff] [blame] | 2049 | { |
| 2050 | .start = 0x10008000, |
| 2051 | .end = 0x10008000 + SZ_256 - 1, |
| 2052 | .flags = IORESOURCE_MEM, |
| 2053 | }, |
Stephen Boyd | d86214b | 2012-05-10 15:26:35 -0700 | [diff] [blame] | 2054 | { |
Stephen Boyd | e24edf5 | 2012-07-12 17:46:19 -0700 | [diff] [blame] | 2055 | .start = 0x00900000, |
| 2056 | .end = 0x00900000 + SZ_16K - 1, |
| 2057 | .flags = IORESOURCE_MEM, |
| 2058 | }, |
| 2059 | { |
Stephen Boyd | d86214b | 2012-05-10 15:26:35 -0700 | [diff] [blame] | 2060 | .start = GSS_A5_WDOG_EXPIRED, |
| 2061 | .end = GSS_A5_WDOG_EXPIRED, |
| 2062 | .flags = IORESOURCE_IRQ, |
| 2063 | }, |
Matt Wagantall | 292aace | 2012-01-26 19:12:34 -0800 | [diff] [blame] | 2064 | }; |
| 2065 | |
| 2066 | struct platform_device msm_gss = { |
| 2067 | .name = "pil_gss", |
| 2068 | .id = -1, |
| 2069 | .num_resources = ARRAY_SIZE(msm_gss_resources), |
| 2070 | .resource = msm_gss_resources, |
| 2071 | }; |
| 2072 | |
Matt Wagantall | 1f65d9d | 2012-04-25 14:24:20 -0700 | [diff] [blame] | 2073 | static struct fs_driver_data gfx3d_fs_data = { |
| 2074 | .clks = (struct fs_clk_data[]){ |
| 2075 | { .name = "core_clk", .reset_rate = 27000000 }, |
| 2076 | { .name = "iface_clk" }, |
| 2077 | { .name = "bus_clk" }, |
| 2078 | { 0 } |
| 2079 | }, |
| 2080 | .bus_port0 = MSM_BUS_MASTER_GRAPHICS_3D, |
| 2081 | .bus_port1 = MSM_BUS_MASTER_GRAPHICS_3D_PORT1, |
Matt Wagantall | 1875d32 | 2012-02-22 16:11:33 -0800 | [diff] [blame] | 2082 | }; |
Matt Wagantall | 1f65d9d | 2012-04-25 14:24:20 -0700 | [diff] [blame] | 2083 | |
| 2084 | static struct fs_driver_data ijpeg_fs_data = { |
| 2085 | .clks = (struct fs_clk_data[]){ |
| 2086 | { .name = "core_clk" }, |
| 2087 | { .name = "iface_clk" }, |
| 2088 | { .name = "bus_clk" }, |
| 2089 | { 0 } |
| 2090 | }, |
| 2091 | .bus_port0 = MSM_BUS_MASTER_JPEG_ENC, |
| 2092 | }; |
| 2093 | |
Nagamalleswararao Ganji | 6db8c51 | 2012-05-24 20:26:23 -0700 | [diff] [blame] | 2094 | static struct fs_driver_data mdp_fs_data = { |
| 2095 | .clks = (struct fs_clk_data[]){ |
| 2096 | { .name = "core_clk" }, |
| 2097 | { .name = "iface_clk" }, |
| 2098 | { .name = "bus_clk" }, |
| 2099 | { .name = "vsync_clk" }, |
| 2100 | { .name = "lut_clk" }, |
| 2101 | { .name = "tv_src_clk" }, |
| 2102 | { .name = "tv_clk" }, |
Matt Wagantall | c33c1ed | 2012-07-23 17:19:08 -0700 | [diff] [blame] | 2103 | { .name = "reset1_clk" }, |
| 2104 | { .name = "reset2_clk" }, |
Nagamalleswararao Ganji | 6db8c51 | 2012-05-24 20:26:23 -0700 | [diff] [blame] | 2105 | { 0 } |
| 2106 | }, |
| 2107 | .bus_port0 = MSM_BUS_MASTER_MDP_PORT0, |
| 2108 | .bus_port1 = MSM_BUS_MASTER_MDP_PORT1, |
| 2109 | }; |
| 2110 | |
Matt Wagantall | 1f65d9d | 2012-04-25 14:24:20 -0700 | [diff] [blame] | 2111 | static struct fs_driver_data rot_fs_data = { |
| 2112 | .clks = (struct fs_clk_data[]){ |
| 2113 | { .name = "core_clk" }, |
| 2114 | { .name = "iface_clk" }, |
| 2115 | { .name = "bus_clk" }, |
| 2116 | { 0 } |
| 2117 | }, |
| 2118 | .bus_port0 = MSM_BUS_MASTER_ROTATOR, |
| 2119 | }; |
| 2120 | |
| 2121 | static struct fs_driver_data ved_fs_data = { |
| 2122 | .clks = (struct fs_clk_data[]){ |
| 2123 | { .name = "core_clk" }, |
| 2124 | { .name = "iface_clk" }, |
| 2125 | { .name = "bus_clk" }, |
| 2126 | { 0 } |
| 2127 | }, |
| 2128 | .bus_port0 = MSM_BUS_MASTER_VIDEO_ENC, |
| 2129 | .bus_port1 = MSM_BUS_MASTER_VIDEO_DEC, |
| 2130 | }; |
| 2131 | |
| 2132 | static struct fs_driver_data vfe_fs_data = { |
| 2133 | .clks = (struct fs_clk_data[]){ |
| 2134 | { .name = "core_clk" }, |
| 2135 | { .name = "iface_clk" }, |
| 2136 | { .name = "bus_clk" }, |
| 2137 | { 0 } |
| 2138 | }, |
| 2139 | .bus_port0 = MSM_BUS_MASTER_VFE, |
| 2140 | }; |
| 2141 | |
| 2142 | static struct fs_driver_data vpe_fs_data = { |
| 2143 | .clks = (struct fs_clk_data[]){ |
| 2144 | { .name = "core_clk" }, |
| 2145 | { .name = "iface_clk" }, |
| 2146 | { .name = "bus_clk" }, |
| 2147 | { 0 } |
| 2148 | }, |
| 2149 | .bus_port0 = MSM_BUS_MASTER_VPE, |
| 2150 | }; |
| 2151 | |
| 2152 | static struct fs_driver_data vcap_fs_data = { |
| 2153 | .clks = (struct fs_clk_data[]){ |
| 2154 | { .name = "core_clk" }, |
| 2155 | { .name = "iface_clk" }, |
| 2156 | { .name = "bus_clk" }, |
| 2157 | { 0 }, |
| 2158 | }, |
| 2159 | .bus_port0 = MSM_BUS_MASTER_VIDEO_CAP, |
| 2160 | }; |
| 2161 | |
| 2162 | struct platform_device *apq8064_footswitch[] __initdata = { |
Nagamalleswararao Ganji | 6db8c51 | 2012-05-24 20:26:23 -0700 | [diff] [blame] | 2163 | FS_8X60(FS_MDP, "vdd", "mdp.0", &mdp_fs_data), |
Matt Wagantall | 316f2fc | 2012-05-03 20:41:42 -0700 | [diff] [blame] | 2164 | FS_8X60(FS_ROT, "vdd", "msm_rotator.0", &rot_fs_data), |
Matt Wagantall | e4454b8 | 2012-05-03 20:48:01 -0700 | [diff] [blame] | 2165 | FS_8X60(FS_IJPEG, "vdd", "msm_gemini.0", &ijpeg_fs_data), |
Kiran Kumar H N | fa18a03 | 2012-06-25 14:34:18 -0700 | [diff] [blame] | 2166 | FS_8X60(FS_VFE, "vdd", "msm_vfe.0", &vfe_fs_data), |
| 2167 | FS_8X60(FS_VPE, "vdd", "msm_vpe.0", &vpe_fs_data), |
Matt Wagantall | d6fbf23 | 2012-05-03 20:09:28 -0700 | [diff] [blame] | 2168 | FS_8X60(FS_GFX3D, "vdd", "kgsl-3d0.0", &gfx3d_fs_data), |
Matt Wagantall | 5e46aac | 2012-05-03 20:20:18 -0700 | [diff] [blame] | 2169 | FS_8X60(FS_VED, "vdd", "msm_vidc.0", &ved_fs_data), |
Matt Wagantall | 3cd5b3d | 2012-05-03 20:35:20 -0700 | [diff] [blame] | 2170 | FS_8X60(FS_VCAP, "vdd", "msm_vcap.0", &vcap_fs_data), |
Matt Wagantall | 1f65d9d | 2012-04-25 14:24:20 -0700 | [diff] [blame] | 2171 | }; |
| 2172 | unsigned apq8064_num_footswitch __initdata = ARRAY_SIZE(apq8064_footswitch); |
Matt Wagantall | 1875d32 | 2012-02-22 16:11:33 -0800 | [diff] [blame] | 2173 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2174 | struct msm_rpm_platform_data apq8064_rpm_data __initdata = { |
| 2175 | .reg_base_addrs = { |
| 2176 | [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE, |
| 2177 | [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400, |
| 2178 | [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600, |
| 2179 | [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00, |
| 2180 | }, |
| 2181 | .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ, |
Stephen Boyd | f61255e | 2012-02-24 14:31:09 -0800 | [diff] [blame] | 2182 | .irq_err = RPM_APCC_CPU0_GP_LOW_IRQ, |
Praveen Chidambaram | e396ce6 | 2012-03-30 11:15:57 -0600 | [diff] [blame] | 2183 | .irq_wakeup = RPM_APCC_CPU0_WAKE_UP_IRQ, |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2184 | .ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008, |
| 2185 | .ipc_rpm_val = 4, |
| 2186 | .target_id = { |
| 2187 | MSM_RPM_MAP(8064, NOTIFICATION_CONFIGURED_0, NOTIFICATION, 4), |
| 2188 | MSM_RPM_MAP(8064, NOTIFICATION_REGISTERED_0, NOTIFICATION, 4), |
| 2189 | MSM_RPM_MAP(8064, INVALIDATE_0, INVALIDATE, 8), |
| 2190 | MSM_RPM_MAP(8064, TRIGGER_TIMED_TO, TRIGGER_TIMED, 1), |
| 2191 | MSM_RPM_MAP(8064, TRIGGER_TIMED_SCLK_COUNT, TRIGGER_TIMED, 1), |
| 2192 | MSM_RPM_MAP(8064, RPM_CTL, RPM_CTL, 1), |
| 2193 | MSM_RPM_MAP(8064, CXO_CLK, CXO_CLK, 1), |
| 2194 | MSM_RPM_MAP(8064, PXO_CLK, PXO_CLK, 1), |
| 2195 | MSM_RPM_MAP(8064, APPS_FABRIC_CLK, APPS_FABRIC_CLK, 1), |
| 2196 | MSM_RPM_MAP(8064, SYSTEM_FABRIC_CLK, SYSTEM_FABRIC_CLK, 1), |
| 2197 | MSM_RPM_MAP(8064, MM_FABRIC_CLK, MM_FABRIC_CLK, 1), |
| 2198 | MSM_RPM_MAP(8064, DAYTONA_FABRIC_CLK, DAYTONA_FABRIC_CLK, 1), |
| 2199 | MSM_RPM_MAP(8064, SFPB_CLK, SFPB_CLK, 1), |
| 2200 | MSM_RPM_MAP(8064, CFPB_CLK, CFPB_CLK, 1), |
| 2201 | MSM_RPM_MAP(8064, MMFPB_CLK, MMFPB_CLK, 1), |
| 2202 | MSM_RPM_MAP(8064, EBI1_CLK, EBI1_CLK, 1), |
| 2203 | MSM_RPM_MAP(8064, APPS_FABRIC_CFG_HALT_0, |
| 2204 | APPS_FABRIC_CFG_HALT, 2), |
| 2205 | MSM_RPM_MAP(8064, APPS_FABRIC_CFG_CLKMOD_0, |
| 2206 | APPS_FABRIC_CFG_CLKMOD, 3), |
| 2207 | MSM_RPM_MAP(8064, APPS_FABRIC_CFG_IOCTL, |
| 2208 | APPS_FABRIC_CFG_IOCTL, 1), |
| 2209 | MSM_RPM_MAP(8064, APPS_FABRIC_ARB_0, APPS_FABRIC_ARB, 12), |
| 2210 | MSM_RPM_MAP(8064, SYS_FABRIC_CFG_HALT_0, |
| 2211 | SYS_FABRIC_CFG_HALT, 2), |
| 2212 | MSM_RPM_MAP(8064, SYS_FABRIC_CFG_CLKMOD_0, |
| 2213 | SYS_FABRIC_CFG_CLKMOD, 3), |
| 2214 | MSM_RPM_MAP(8064, SYS_FABRIC_CFG_IOCTL, |
| 2215 | SYS_FABRIC_CFG_IOCTL, 1), |
| 2216 | MSM_RPM_MAP(8064, SYSTEM_FABRIC_ARB_0, SYSTEM_FABRIC_ARB, 30), |
| 2217 | MSM_RPM_MAP(8064, MMSS_FABRIC_CFG_HALT_0, |
| 2218 | MMSS_FABRIC_CFG_HALT, 2), |
| 2219 | MSM_RPM_MAP(8064, MMSS_FABRIC_CFG_CLKMOD_0, |
| 2220 | MMSS_FABRIC_CFG_CLKMOD, 3), |
| 2221 | MSM_RPM_MAP(8064, MMSS_FABRIC_CFG_IOCTL, |
| 2222 | MMSS_FABRIC_CFG_IOCTL, 1), |
| 2223 | MSM_RPM_MAP(8064, MM_FABRIC_ARB_0, MM_FABRIC_ARB, 21), |
| 2224 | MSM_RPM_MAP(8064, PM8921_S1_0, PM8921_S1, 2), |
| 2225 | MSM_RPM_MAP(8064, PM8921_S2_0, PM8921_S2, 2), |
| 2226 | MSM_RPM_MAP(8064, PM8921_S3_0, PM8921_S3, 2), |
| 2227 | MSM_RPM_MAP(8064, PM8921_S4_0, PM8921_S4, 2), |
| 2228 | MSM_RPM_MAP(8064, PM8921_S5_0, PM8921_S5, 2), |
| 2229 | MSM_RPM_MAP(8064, PM8921_S6_0, PM8921_S6, 2), |
| 2230 | MSM_RPM_MAP(8064, PM8921_S7_0, PM8921_S7, 2), |
| 2231 | MSM_RPM_MAP(8064, PM8921_S8_0, PM8921_S8, 2), |
| 2232 | MSM_RPM_MAP(8064, PM8921_L1_0, PM8921_L1, 2), |
| 2233 | MSM_RPM_MAP(8064, PM8921_L2_0, PM8921_L2, 2), |
| 2234 | MSM_RPM_MAP(8064, PM8921_L3_0, PM8921_L3, 2), |
| 2235 | MSM_RPM_MAP(8064, PM8921_L4_0, PM8921_L4, 2), |
| 2236 | MSM_RPM_MAP(8064, PM8921_L5_0, PM8921_L5, 2), |
| 2237 | MSM_RPM_MAP(8064, PM8921_L6_0, PM8921_L6, 2), |
| 2238 | MSM_RPM_MAP(8064, PM8921_L7_0, PM8921_L7, 2), |
| 2239 | MSM_RPM_MAP(8064, PM8921_L8_0, PM8921_L8, 2), |
| 2240 | MSM_RPM_MAP(8064, PM8921_L9_0, PM8921_L9, 2), |
| 2241 | MSM_RPM_MAP(8064, PM8921_L10_0, PM8921_L10, 2), |
| 2242 | MSM_RPM_MAP(8064, PM8921_L11_0, PM8921_L11, 2), |
| 2243 | MSM_RPM_MAP(8064, PM8921_L12_0, PM8921_L12, 2), |
| 2244 | MSM_RPM_MAP(8064, PM8921_L13_0, PM8921_L13, 2), |
| 2245 | MSM_RPM_MAP(8064, PM8921_L14_0, PM8921_L14, 2), |
| 2246 | MSM_RPM_MAP(8064, PM8921_L15_0, PM8921_L15, 2), |
| 2247 | MSM_RPM_MAP(8064, PM8921_L16_0, PM8921_L16, 2), |
| 2248 | MSM_RPM_MAP(8064, PM8921_L17_0, PM8921_L17, 2), |
| 2249 | MSM_RPM_MAP(8064, PM8921_L18_0, PM8921_L18, 2), |
| 2250 | MSM_RPM_MAP(8064, PM8921_L19_0, PM8921_L19, 2), |
| 2251 | MSM_RPM_MAP(8064, PM8921_L20_0, PM8921_L20, 2), |
| 2252 | MSM_RPM_MAP(8064, PM8921_L21_0, PM8921_L21, 2), |
| 2253 | MSM_RPM_MAP(8064, PM8921_L22_0, PM8921_L22, 2), |
| 2254 | MSM_RPM_MAP(8064, PM8921_L23_0, PM8921_L23, 2), |
| 2255 | MSM_RPM_MAP(8064, PM8921_L24_0, PM8921_L24, 2), |
| 2256 | MSM_RPM_MAP(8064, PM8921_L25_0, PM8921_L25, 2), |
| 2257 | MSM_RPM_MAP(8064, PM8921_L26_0, PM8921_L26, 2), |
| 2258 | MSM_RPM_MAP(8064, PM8921_L27_0, PM8921_L27, 2), |
| 2259 | MSM_RPM_MAP(8064, PM8921_L28_0, PM8921_L28, 2), |
| 2260 | MSM_RPM_MAP(8064, PM8921_L29_0, PM8921_L29, 2), |
| 2261 | MSM_RPM_MAP(8064, PM8921_CLK1_0, PM8921_CLK1, 2), |
| 2262 | MSM_RPM_MAP(8064, PM8921_CLK2_0, PM8921_CLK2, 2), |
| 2263 | MSM_RPM_MAP(8064, PM8921_LVS1, PM8921_LVS1, 1), |
| 2264 | MSM_RPM_MAP(8064, PM8921_LVS2, PM8921_LVS2, 1), |
| 2265 | MSM_RPM_MAP(8064, PM8921_LVS3, PM8921_LVS3, 1), |
| 2266 | MSM_RPM_MAP(8064, PM8921_LVS4, PM8921_LVS4, 1), |
| 2267 | MSM_RPM_MAP(8064, PM8921_LVS5, PM8921_LVS5, 1), |
| 2268 | MSM_RPM_MAP(8064, PM8921_LVS6, PM8921_LVS6, 1), |
| 2269 | MSM_RPM_MAP(8064, PM8921_LVS7, PM8921_LVS7, 1), |
| 2270 | MSM_RPM_MAP(8064, PM8821_S1_0, PM8821_S1, 2), |
| 2271 | MSM_RPM_MAP(8064, PM8821_S2_0, PM8821_S2, 2), |
| 2272 | MSM_RPM_MAP(8064, PM8821_L1_0, PM8821_L1, 2), |
| 2273 | MSM_RPM_MAP(8064, NCP_0, NCP, 2), |
| 2274 | MSM_RPM_MAP(8064, CXO_BUFFERS, CXO_BUFFERS, 1), |
| 2275 | MSM_RPM_MAP(8064, USB_OTG_SWITCH, USB_OTG_SWITCH, 1), |
| 2276 | MSM_RPM_MAP(8064, HDMI_SWITCH, HDMI_SWITCH, 1), |
| 2277 | MSM_RPM_MAP(8064, DDR_DMM_0, DDR_DMM, 2), |
| 2278 | MSM_RPM_MAP(8064, QDSS_CLK, QDSS_CLK, 1), |
Joel King | ef39084 | 2012-05-23 16:42:48 -0700 | [diff] [blame] | 2279 | MSM_RPM_MAP(8064, VDDMIN_GPIO, VDDMIN_GPIO, 1), |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2280 | }, |
| 2281 | .target_status = { |
| 2282 | MSM_RPM_STATUS_ID_MAP(8064, VERSION_MAJOR), |
| 2283 | MSM_RPM_STATUS_ID_MAP(8064, VERSION_MINOR), |
| 2284 | MSM_RPM_STATUS_ID_MAP(8064, VERSION_BUILD), |
| 2285 | MSM_RPM_STATUS_ID_MAP(8064, SUPPORTED_RESOURCES_0), |
| 2286 | MSM_RPM_STATUS_ID_MAP(8064, SUPPORTED_RESOURCES_1), |
| 2287 | MSM_RPM_STATUS_ID_MAP(8064, SUPPORTED_RESOURCES_2), |
| 2288 | MSM_RPM_STATUS_ID_MAP(8064, RESERVED_SUPPORTED_RESOURCES_0), |
| 2289 | MSM_RPM_STATUS_ID_MAP(8064, SEQUENCE), |
| 2290 | MSM_RPM_STATUS_ID_MAP(8064, RPM_CTL), |
| 2291 | MSM_RPM_STATUS_ID_MAP(8064, CXO_CLK), |
| 2292 | MSM_RPM_STATUS_ID_MAP(8064, PXO_CLK), |
| 2293 | MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CLK), |
| 2294 | MSM_RPM_STATUS_ID_MAP(8064, SYSTEM_FABRIC_CLK), |
| 2295 | MSM_RPM_STATUS_ID_MAP(8064, MM_FABRIC_CLK), |
| 2296 | MSM_RPM_STATUS_ID_MAP(8064, DAYTONA_FABRIC_CLK), |
| 2297 | MSM_RPM_STATUS_ID_MAP(8064, SFPB_CLK), |
| 2298 | MSM_RPM_STATUS_ID_MAP(8064, CFPB_CLK), |
| 2299 | MSM_RPM_STATUS_ID_MAP(8064, MMFPB_CLK), |
| 2300 | MSM_RPM_STATUS_ID_MAP(8064, EBI1_CLK), |
| 2301 | MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CFG_HALT), |
| 2302 | MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CFG_CLKMOD), |
| 2303 | MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CFG_IOCTL), |
| 2304 | MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_ARB), |
| 2305 | MSM_RPM_STATUS_ID_MAP(8064, SYS_FABRIC_CFG_HALT), |
| 2306 | MSM_RPM_STATUS_ID_MAP(8064, SYS_FABRIC_CFG_CLKMOD), |
| 2307 | MSM_RPM_STATUS_ID_MAP(8064, SYS_FABRIC_CFG_IOCTL), |
| 2308 | MSM_RPM_STATUS_ID_MAP(8064, SYSTEM_FABRIC_ARB), |
| 2309 | MSM_RPM_STATUS_ID_MAP(8064, MMSS_FABRIC_CFG_HALT), |
| 2310 | MSM_RPM_STATUS_ID_MAP(8064, MMSS_FABRIC_CFG_CLKMOD), |
| 2311 | MSM_RPM_STATUS_ID_MAP(8064, MMSS_FABRIC_CFG_IOCTL), |
| 2312 | MSM_RPM_STATUS_ID_MAP(8064, MM_FABRIC_ARB), |
| 2313 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S1_0), |
| 2314 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S1_1), |
| 2315 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S2_0), |
| 2316 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S2_1), |
| 2317 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S3_0), |
| 2318 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S3_1), |
| 2319 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S4_0), |
| 2320 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S4_1), |
| 2321 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S5_0), |
| 2322 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S5_1), |
| 2323 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S6_0), |
| 2324 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S6_1), |
| 2325 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S7_0), |
| 2326 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S7_1), |
| 2327 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S8_0), |
| 2328 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S8_1), |
| 2329 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L1_0), |
| 2330 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L1_1), |
| 2331 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L2_0), |
| 2332 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L2_1), |
| 2333 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L3_0), |
| 2334 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L3_1), |
| 2335 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L4_0), |
| 2336 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L4_1), |
| 2337 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L5_0), |
| 2338 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L5_1), |
| 2339 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L6_0), |
| 2340 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L6_1), |
| 2341 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L7_0), |
| 2342 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L7_1), |
| 2343 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L8_0), |
| 2344 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L8_1), |
| 2345 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L9_0), |
| 2346 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L9_1), |
| 2347 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L10_0), |
| 2348 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L10_1), |
| 2349 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L11_0), |
| 2350 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L11_1), |
| 2351 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L12_0), |
| 2352 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L12_1), |
| 2353 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L13_0), |
| 2354 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L13_1), |
| 2355 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L14_0), |
| 2356 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L14_1), |
| 2357 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L15_0), |
| 2358 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L15_1), |
| 2359 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L16_0), |
| 2360 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L16_1), |
| 2361 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L17_0), |
| 2362 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L17_1), |
| 2363 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L18_0), |
| 2364 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L18_1), |
| 2365 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L19_0), |
| 2366 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L19_1), |
| 2367 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L20_0), |
| 2368 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L20_1), |
| 2369 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L21_0), |
| 2370 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L21_1), |
| 2371 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L22_0), |
| 2372 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L22_1), |
| 2373 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L23_0), |
| 2374 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L23_1), |
| 2375 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L24_0), |
| 2376 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L24_1), |
| 2377 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L25_0), |
| 2378 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L25_1), |
| 2379 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L26_0), |
| 2380 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L26_1), |
| 2381 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L27_0), |
| 2382 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L27_1), |
| 2383 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L28_0), |
| 2384 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L28_1), |
| 2385 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L29_0), |
| 2386 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L29_1), |
| 2387 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK1_0), |
| 2388 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK1_1), |
| 2389 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK2_0), |
| 2390 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK2_1), |
| 2391 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS1), |
| 2392 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS2), |
| 2393 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS3), |
| 2394 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS4), |
| 2395 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS5), |
| 2396 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS6), |
| 2397 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS7), |
| 2398 | MSM_RPM_STATUS_ID_MAP(8064, NCP_0), |
| 2399 | MSM_RPM_STATUS_ID_MAP(8064, NCP_1), |
| 2400 | MSM_RPM_STATUS_ID_MAP(8064, CXO_BUFFERS), |
| 2401 | MSM_RPM_STATUS_ID_MAP(8064, USB_OTG_SWITCH), |
| 2402 | MSM_RPM_STATUS_ID_MAP(8064, HDMI_SWITCH), |
| 2403 | MSM_RPM_STATUS_ID_MAP(8064, DDR_DMM_0), |
| 2404 | MSM_RPM_STATUS_ID_MAP(8064, DDR_DMM_1), |
| 2405 | MSM_RPM_STATUS_ID_MAP(8064, EBI1_CH0_RANGE), |
| 2406 | MSM_RPM_STATUS_ID_MAP(8064, EBI1_CH1_RANGE), |
| 2407 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_S1_0), |
| 2408 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_S1_1), |
| 2409 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_S2_0), |
| 2410 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_S2_1), |
| 2411 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_L1_0), |
| 2412 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_L1_1), |
Joel King | ef39084 | 2012-05-23 16:42:48 -0700 | [diff] [blame] | 2413 | MSM_RPM_STATUS_ID_MAP(8064, VDDMIN_GPIO), |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2414 | }, |
| 2415 | .target_ctrl_id = { |
| 2416 | MSM_RPM_CTRL_MAP(8064, VERSION_MAJOR), |
| 2417 | MSM_RPM_CTRL_MAP(8064, VERSION_MINOR), |
| 2418 | MSM_RPM_CTRL_MAP(8064, VERSION_BUILD), |
| 2419 | MSM_RPM_CTRL_MAP(8064, REQ_CTX_0), |
| 2420 | MSM_RPM_CTRL_MAP(8064, REQ_SEL_0), |
| 2421 | MSM_RPM_CTRL_MAP(8064, ACK_CTX_0), |
| 2422 | MSM_RPM_CTRL_MAP(8064, ACK_SEL_0), |
| 2423 | }, |
| 2424 | .sel_invalidate = MSM_RPM_8064_SEL_INVALIDATE, |
| 2425 | .sel_notification = MSM_RPM_8064_SEL_NOTIFICATION, |
| 2426 | .sel_last = MSM_RPM_8064_SEL_LAST, |
| 2427 | .ver = {3, 0, 0}, |
| 2428 | }; |
| 2429 | |
| 2430 | struct platform_device apq8064_rpm_device = { |
| 2431 | .name = "msm_rpm", |
| 2432 | .id = -1, |
| 2433 | }; |
| 2434 | |
| 2435 | static struct msm_rpmstats_platform_data msm_rpm_stat_pdata = { |
Priyanka Mathur | 71859f4 | 2012-10-17 10:54:35 -0700 | [diff] [blame] | 2436 | .version = 1, |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2437 | }; |
| 2438 | |
Priyanka Mathur | 71859f4 | 2012-10-17 10:54:35 -0700 | [diff] [blame] | 2439 | |
| 2440 | static struct resource msm_rpm_stat_resource[] = { |
| 2441 | { |
| 2442 | .start = 0x0010D204, |
| 2443 | .end = 0x0010D204 + SZ_8K, |
| 2444 | .flags = IORESOURCE_MEM, |
| 2445 | .name = "phys_addr_base" |
| 2446 | }, |
| 2447 | }; |
| 2448 | |
| 2449 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2450 | struct platform_device apq8064_rpm_stat_device = { |
| 2451 | .name = "msm_rpm_stat", |
| 2452 | .id = -1, |
Priyanka Mathur | 71859f4 | 2012-10-17 10:54:35 -0700 | [diff] [blame] | 2453 | .resource = msm_rpm_stat_resource, |
| 2454 | .num_resources = ARRAY_SIZE(msm_rpm_stat_resource), |
| 2455 | .dev = { |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2456 | .platform_data = &msm_rpm_stat_pdata, |
Priyanka Mathur | 71859f4 | 2012-10-17 10:54:35 -0700 | [diff] [blame] | 2457 | } |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2458 | }; |
| 2459 | |
Anji Jonnala | 9312992 | 2012-10-09 20:57:53 +0530 | [diff] [blame] | 2460 | static struct resource resources_rpm_master_stats[] = { |
| 2461 | { |
| 2462 | .start = MSM8064_RPM_MASTER_STATS_BASE, |
| 2463 | .end = MSM8064_RPM_MASTER_STATS_BASE + SZ_256, |
| 2464 | .flags = IORESOURCE_MEM, |
| 2465 | }, |
| 2466 | }; |
| 2467 | |
| 2468 | static char *master_names[] = { |
| 2469 | "KPSS", |
| 2470 | "MPSS", |
| 2471 | "LPASS", |
| 2472 | "RIVA", |
| 2473 | "DSPS", |
| 2474 | }; |
| 2475 | |
| 2476 | static struct msm_rpm_master_stats_platform_data msm_rpm_master_stat_pdata = { |
| 2477 | .masters = master_names, |
| 2478 | .nomasters = ARRAY_SIZE(master_names), |
| 2479 | }; |
| 2480 | |
| 2481 | struct platform_device apq8064_rpm_master_stat_device = { |
| 2482 | .name = "msm_rpm_master_stat", |
| 2483 | .id = -1, |
| 2484 | .num_resources = ARRAY_SIZE(resources_rpm_master_stats), |
| 2485 | .resource = resources_rpm_master_stats, |
| 2486 | .dev = { |
| 2487 | .platform_data = &msm_rpm_master_stat_pdata, |
| 2488 | }, |
| 2489 | }; |
| 2490 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2491 | static struct msm_rpm_log_platform_data msm_rpm_log_pdata = { |
| 2492 | .phys_addr_base = 0x0010C000, |
| 2493 | .reg_offsets = { |
| 2494 | [MSM_RPM_LOG_PAGE_INDICES] = 0x00000080, |
| 2495 | [MSM_RPM_LOG_PAGE_BUFFER] = 0x000000A0, |
| 2496 | }, |
| 2497 | .phys_size = SZ_8K, |
| 2498 | .log_len = 4096, /* log's buffer length in bytes */ |
| 2499 | .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */ |
| 2500 | }; |
| 2501 | |
| 2502 | struct platform_device apq8064_rpm_log_device = { |
| 2503 | .name = "msm_rpm_log", |
| 2504 | .id = -1, |
| 2505 | .dev = { |
| 2506 | .platform_data = &msm_rpm_log_pdata, |
| 2507 | }, |
| 2508 | }; |
| 2509 | |
Jin Hong | d3024e6 | 2012-02-09 16:13:32 -0800 | [diff] [blame] | 2510 | /* Sensors DSPS platform data */ |
| 2511 | |
Jin Hong | d3024e6 | 2012-02-09 16:13:32 -0800 | [diff] [blame] | 2512 | static struct dsps_clk_info dsps_clks[] = {}; |
| 2513 | static struct dsps_regulator_info dsps_regs[] = {}; |
| 2514 | |
| 2515 | /* |
| 2516 | * Note: GPIOs field is intialized in run-time at the function |
| 2517 | * apq8064_init_dsps(). |
| 2518 | */ |
| 2519 | |
Stephen Boyd | f169b4b | 2012-05-10 17:55:55 -0700 | [diff] [blame] | 2520 | #define PPSS_REG_PHYS_BASE 0x12080000 |
| 2521 | |
Jin Hong | d3024e6 | 2012-02-09 16:13:32 -0800 | [diff] [blame] | 2522 | struct msm_dsps_platform_data msm_dsps_pdata_8064 = { |
| 2523 | .clks = dsps_clks, |
| 2524 | .clks_num = ARRAY_SIZE(dsps_clks), |
| 2525 | .gpios = NULL, |
| 2526 | .gpios_num = 0, |
| 2527 | .regs = dsps_regs, |
| 2528 | .regs_num = ARRAY_SIZE(dsps_regs), |
| 2529 | .dsps_pwr_ctl_en = 1, |
| 2530 | .signature = DSPS_SIGNATURE, |
| 2531 | }; |
| 2532 | |
| 2533 | static struct resource msm_dsps_resources[] = { |
| 2534 | { |
| 2535 | .start = PPSS_REG_PHYS_BASE, |
| 2536 | .end = PPSS_REG_PHYS_BASE + SZ_8K - 1, |
| 2537 | .name = "ppss_reg", |
| 2538 | .flags = IORESOURCE_MEM, |
| 2539 | }, |
Jin Hong | d3024e6 | 2012-02-09 16:13:32 -0800 | [diff] [blame] | 2540 | }; |
| 2541 | |
| 2542 | struct platform_device msm_dsps_device_8064 = { |
| 2543 | .name = "msm_dsps", |
| 2544 | .id = 0, |
| 2545 | .num_resources = ARRAY_SIZE(msm_dsps_resources), |
| 2546 | .resource = msm_dsps_resources, |
| 2547 | .dev.platform_data = &msm_dsps_pdata_8064, |
| 2548 | }; |
| 2549 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2550 | #ifdef CONFIG_MSM_MPM |
| 2551 | static uint16_t msm_mpm_irqs_m2a[MSM_MPM_NR_MPM_IRQS] __initdata = { |
| 2552 | [1] = MSM_GPIO_TO_INT(26), |
| 2553 | [2] = MSM_GPIO_TO_INT(88), |
| 2554 | [4] = MSM_GPIO_TO_INT(73), |
| 2555 | [5] = MSM_GPIO_TO_INT(74), |
| 2556 | [6] = MSM_GPIO_TO_INT(75), |
| 2557 | [7] = MSM_GPIO_TO_INT(76), |
| 2558 | [8] = MSM_GPIO_TO_INT(77), |
| 2559 | [9] = MSM_GPIO_TO_INT(36), |
| 2560 | [10] = MSM_GPIO_TO_INT(84), |
| 2561 | [11] = MSM_GPIO_TO_INT(7), |
| 2562 | [12] = MSM_GPIO_TO_INT(11), |
| 2563 | [13] = MSM_GPIO_TO_INT(52), |
| 2564 | [14] = MSM_GPIO_TO_INT(15), |
| 2565 | [15] = MSM_GPIO_TO_INT(83), |
| 2566 | [16] = USB3_HS_IRQ, |
| 2567 | [19] = MSM_GPIO_TO_INT(61), |
| 2568 | [20] = MSM_GPIO_TO_INT(58), |
| 2569 | [23] = MSM_GPIO_TO_INT(65), |
| 2570 | [24] = MSM_GPIO_TO_INT(63), |
| 2571 | [25] = USB1_HS_IRQ, |
| 2572 | [27] = HDMI_IRQ, |
| 2573 | [29] = MSM_GPIO_TO_INT(22), |
| 2574 | [30] = MSM_GPIO_TO_INT(72), |
| 2575 | [31] = USB4_HS_IRQ, |
| 2576 | [33] = MSM_GPIO_TO_INT(44), |
| 2577 | [34] = MSM_GPIO_TO_INT(39), |
| 2578 | [35] = MSM_GPIO_TO_INT(19), |
| 2579 | [36] = MSM_GPIO_TO_INT(23), |
| 2580 | [37] = MSM_GPIO_TO_INT(41), |
| 2581 | [38] = MSM_GPIO_TO_INT(30), |
| 2582 | [41] = MSM_GPIO_TO_INT(42), |
| 2583 | [42] = MSM_GPIO_TO_INT(56), |
| 2584 | [43] = MSM_GPIO_TO_INT(55), |
| 2585 | [44] = MSM_GPIO_TO_INT(50), |
| 2586 | [45] = MSM_GPIO_TO_INT(49), |
| 2587 | [46] = MSM_GPIO_TO_INT(47), |
| 2588 | [47] = MSM_GPIO_TO_INT(45), |
| 2589 | [48] = MSM_GPIO_TO_INT(38), |
| 2590 | [49] = MSM_GPIO_TO_INT(34), |
| 2591 | [50] = MSM_GPIO_TO_INT(32), |
| 2592 | [51] = MSM_GPIO_TO_INT(29), |
| 2593 | [52] = MSM_GPIO_TO_INT(18), |
| 2594 | [53] = MSM_GPIO_TO_INT(10), |
| 2595 | [54] = MSM_GPIO_TO_INT(81), |
| 2596 | [55] = MSM_GPIO_TO_INT(6), |
| 2597 | }; |
| 2598 | |
| 2599 | static uint16_t msm_mpm_bypassed_apps_irqs[] __initdata = { |
| 2600 | TLMM_MSM_SUMMARY_IRQ, |
| 2601 | RPM_APCC_CPU0_GP_HIGH_IRQ, |
| 2602 | RPM_APCC_CPU0_GP_MEDIUM_IRQ, |
| 2603 | RPM_APCC_CPU0_GP_LOW_IRQ, |
| 2604 | RPM_APCC_CPU0_WAKE_UP_IRQ, |
| 2605 | RPM_APCC_CPU1_GP_HIGH_IRQ, |
| 2606 | RPM_APCC_CPU1_GP_MEDIUM_IRQ, |
| 2607 | RPM_APCC_CPU1_GP_LOW_IRQ, |
| 2608 | RPM_APCC_CPU1_WAKE_UP_IRQ, |
| 2609 | MSS_TO_APPS_IRQ_0, |
| 2610 | MSS_TO_APPS_IRQ_1, |
| 2611 | MSS_TO_APPS_IRQ_2, |
| 2612 | MSS_TO_APPS_IRQ_3, |
| 2613 | MSS_TO_APPS_IRQ_4, |
| 2614 | MSS_TO_APPS_IRQ_5, |
| 2615 | MSS_TO_APPS_IRQ_6, |
| 2616 | MSS_TO_APPS_IRQ_7, |
| 2617 | MSS_TO_APPS_IRQ_8, |
| 2618 | MSS_TO_APPS_IRQ_9, |
| 2619 | LPASS_SCSS_GP_LOW_IRQ, |
| 2620 | LPASS_SCSS_GP_MEDIUM_IRQ, |
| 2621 | LPASS_SCSS_GP_HIGH_IRQ, |
| 2622 | SPS_MTI_30, |
| 2623 | SPS_MTI_31, |
| 2624 | RIVA_APSS_SPARE_IRQ, |
| 2625 | RIVA_APPS_WLAN_SMSM_IRQ, |
| 2626 | RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ, |
| 2627 | RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ, |
Chandra Ramachandran | 5985172 | 2012-07-23 11:19:48 -0700 | [diff] [blame] | 2628 | PM8821_SEC_IRQ_N, |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2629 | }; |
| 2630 | |
| 2631 | struct msm_mpm_device_data apq8064_mpm_dev_data __initdata = { |
| 2632 | .irqs_m2a = msm_mpm_irqs_m2a, |
| 2633 | .irqs_m2a_size = ARRAY_SIZE(msm_mpm_irqs_m2a), |
| 2634 | .bypassed_apps_irqs = msm_mpm_bypassed_apps_irqs, |
| 2635 | .bypassed_apps_irqs_size = ARRAY_SIZE(msm_mpm_bypassed_apps_irqs), |
| 2636 | .mpm_request_reg_base = MSM_RPM_BASE + 0x9d8, |
| 2637 | .mpm_status_reg_base = MSM_RPM_BASE + 0xdf8, |
| 2638 | .mpm_apps_ipc_reg = MSM_APCS_GCC_BASE + 0x008, |
| 2639 | .mpm_apps_ipc_val = BIT(1), |
| 2640 | .mpm_ipc_irq = RPM_APCC_CPU0_GP_MEDIUM_IRQ, |
| 2641 | |
| 2642 | }; |
| 2643 | #endif |
Joel King | dacbc82 | 2012-01-25 13:30:57 -0800 | [diff] [blame] | 2644 | |
Joel King | 14fe7fa | 2012-05-27 14:26:11 -0700 | [diff] [blame] | 2645 | /* AP2MDM_SOFT_RESET is implemented by the PON_RESET_N gpio */ |
Joel King | dacbc82 | 2012-01-25 13:30:57 -0800 | [diff] [blame] | 2646 | #define MDM2AP_ERRFATAL 19 |
| 2647 | #define AP2MDM_ERRFATAL 18 |
| 2648 | #define MDM2AP_STATUS 49 |
| 2649 | #define AP2MDM_STATUS 48 |
Joel King | 14fe7fa | 2012-05-27 14:26:11 -0700 | [diff] [blame] | 2650 | #define AP2MDM_SOFT_RESET 27 |
Ameya Thakur | e155ece | 2012-07-09 12:08:37 -0700 | [diff] [blame] | 2651 | #define I2S_AP2MDM_SOFT_RESET 0 |
Vamsi Krishna | 9e307cd | 2012-04-11 13:15:36 -0700 | [diff] [blame] | 2652 | #define AP2MDM_WAKEUP 35 |
Ameya Thakur | e155ece | 2012-07-09 12:08:37 -0700 | [diff] [blame] | 2653 | #define I2S_AP2MDM_WAKEUP 44 |
Vamsi Krishna | c6dcd5e | 2012-05-09 15:38:01 -0700 | [diff] [blame] | 2654 | #define MDM2AP_PBLRDY 46 |
Ameya Thakur | e155ece | 2012-07-09 12:08:37 -0700 | [diff] [blame] | 2655 | #define I2S_MDM2AP_PBLRDY 81 |
Joel King | dacbc82 | 2012-01-25 13:30:57 -0800 | [diff] [blame] | 2656 | |
| 2657 | static struct resource mdm_resources[] = { |
| 2658 | { |
| 2659 | .start = MDM2AP_ERRFATAL, |
| 2660 | .end = MDM2AP_ERRFATAL, |
| 2661 | .name = "MDM2AP_ERRFATAL", |
| 2662 | .flags = IORESOURCE_IO, |
| 2663 | }, |
| 2664 | { |
| 2665 | .start = AP2MDM_ERRFATAL, |
| 2666 | .end = AP2MDM_ERRFATAL, |
| 2667 | .name = "AP2MDM_ERRFATAL", |
| 2668 | .flags = IORESOURCE_IO, |
| 2669 | }, |
| 2670 | { |
| 2671 | .start = MDM2AP_STATUS, |
| 2672 | .end = MDM2AP_STATUS, |
| 2673 | .name = "MDM2AP_STATUS", |
| 2674 | .flags = IORESOURCE_IO, |
| 2675 | }, |
| 2676 | { |
| 2677 | .start = AP2MDM_STATUS, |
| 2678 | .end = AP2MDM_STATUS, |
| 2679 | .name = "AP2MDM_STATUS", |
| 2680 | .flags = IORESOURCE_IO, |
| 2681 | }, |
| 2682 | { |
Joel King | 14fe7fa | 2012-05-27 14:26:11 -0700 | [diff] [blame] | 2683 | .start = AP2MDM_SOFT_RESET, |
| 2684 | .end = AP2MDM_SOFT_RESET, |
| 2685 | .name = "AP2MDM_SOFT_RESET", |
Joel King | dacbc82 | 2012-01-25 13:30:57 -0800 | [diff] [blame] | 2686 | .flags = IORESOURCE_IO, |
| 2687 | }, |
Vamsi Krishna | 9e307cd | 2012-04-11 13:15:36 -0700 | [diff] [blame] | 2688 | { |
| 2689 | .start = AP2MDM_WAKEUP, |
| 2690 | .end = AP2MDM_WAKEUP, |
| 2691 | .name = "AP2MDM_WAKEUP", |
| 2692 | .flags = IORESOURCE_IO, |
| 2693 | }, |
Vamsi Krishna | c6dcd5e | 2012-05-09 15:38:01 -0700 | [diff] [blame] | 2694 | { |
| 2695 | .start = MDM2AP_PBLRDY, |
| 2696 | .end = MDM2AP_PBLRDY, |
| 2697 | .name = "MDM2AP_PBLRDY", |
| 2698 | .flags = IORESOURCE_IO, |
| 2699 | }, |
Joel King | dacbc82 | 2012-01-25 13:30:57 -0800 | [diff] [blame] | 2700 | }; |
| 2701 | |
Ameya Thakur | e155ece | 2012-07-09 12:08:37 -0700 | [diff] [blame] | 2702 | static struct resource i2s_mdm_resources[] = { |
| 2703 | { |
| 2704 | .start = MDM2AP_ERRFATAL, |
| 2705 | .end = MDM2AP_ERRFATAL, |
| 2706 | .name = "MDM2AP_ERRFATAL", |
| 2707 | .flags = IORESOURCE_IO, |
| 2708 | }, |
| 2709 | { |
| 2710 | .start = AP2MDM_ERRFATAL, |
| 2711 | .end = AP2MDM_ERRFATAL, |
| 2712 | .name = "AP2MDM_ERRFATAL", |
| 2713 | .flags = IORESOURCE_IO, |
| 2714 | }, |
| 2715 | { |
| 2716 | .start = MDM2AP_STATUS, |
| 2717 | .end = MDM2AP_STATUS, |
| 2718 | .name = "MDM2AP_STATUS", |
| 2719 | .flags = IORESOURCE_IO, |
| 2720 | }, |
| 2721 | { |
| 2722 | .start = AP2MDM_STATUS, |
| 2723 | .end = AP2MDM_STATUS, |
| 2724 | .name = "AP2MDM_STATUS", |
| 2725 | .flags = IORESOURCE_IO, |
| 2726 | }, |
| 2727 | { |
| 2728 | .start = I2S_AP2MDM_SOFT_RESET, |
| 2729 | .end = I2S_AP2MDM_SOFT_RESET, |
| 2730 | .name = "AP2MDM_SOFT_RESET", |
| 2731 | .flags = IORESOURCE_IO, |
| 2732 | }, |
| 2733 | { |
| 2734 | .start = I2S_AP2MDM_WAKEUP, |
| 2735 | .end = I2S_AP2MDM_WAKEUP, |
| 2736 | .name = "AP2MDM_WAKEUP", |
| 2737 | .flags = IORESOURCE_IO, |
| 2738 | }, |
| 2739 | { |
| 2740 | .start = I2S_MDM2AP_PBLRDY, |
| 2741 | .end = I2S_MDM2AP_PBLRDY, |
| 2742 | .name = "MDM2AP_PBLRDY", |
| 2743 | .flags = IORESOURCE_IO, |
| 2744 | }, |
| 2745 | }; |
| 2746 | |
Joel King | dacbc82 | 2012-01-25 13:30:57 -0800 | [diff] [blame] | 2747 | struct platform_device mdm_8064_device = { |
| 2748 | .name = "mdm2_modem", |
| 2749 | .id = -1, |
| 2750 | .num_resources = ARRAY_SIZE(mdm_resources), |
| 2751 | .resource = mdm_resources, |
| 2752 | }; |
Praveen Chidambaram | 8ea3dcd | 2011-12-07 14:46:31 -0700 | [diff] [blame] | 2753 | |
Ameya Thakur | e155ece | 2012-07-09 12:08:37 -0700 | [diff] [blame] | 2754 | struct platform_device i2s_mdm_8064_device = { |
| 2755 | .name = "mdm2_modem", |
| 2756 | .id = -1, |
| 2757 | .num_resources = ARRAY_SIZE(i2s_mdm_resources), |
| 2758 | .resource = i2s_mdm_resources, |
| 2759 | }; |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 2760 | |
Steve Muckle | f9a8749 | 2012-11-02 15:41:00 -0700 | [diff] [blame] | 2761 | static struct msm_dcvs_sync_rule apq8064_dcvs_sync_rules[] = { |
| 2762 | {1026000, 400000}, |
| 2763 | {384000, 200000}, |
Steve Muckle | 682c7a0 | 2012-11-12 14:20:39 -0800 | [diff] [blame] | 2764 | {0, 128000}, |
Steve Muckle | f9a8749 | 2012-11-02 15:41:00 -0700 | [diff] [blame] | 2765 | }; |
| 2766 | |
| 2767 | static struct msm_dcvs_platform_data apq8064_dcvs_data = { |
| 2768 | .sync_rules = apq8064_dcvs_sync_rules, |
| 2769 | .num_sync_rules = ARRAY_SIZE(apq8064_dcvs_sync_rules), |
Steve Muckle | 749f301 | 2012-11-21 10:12:39 -0800 | [diff] [blame] | 2770 | .gpu_max_nom_khz = 320000, |
Steve Muckle | f9a8749 | 2012-11-02 15:41:00 -0700 | [diff] [blame] | 2771 | }; |
| 2772 | |
| 2773 | struct platform_device apq8064_dcvs_device = { |
| 2774 | .name = "dcvs", |
| 2775 | .id = -1, |
| 2776 | .dev = { |
| 2777 | .platform_data = &apq8064_dcvs_data, |
| 2778 | }, |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 2779 | }; |
| 2780 | |
| 2781 | static struct msm_dcvs_core_info apq8064_core_info = { |
Abhijeet Dharmapurikar | 80add42 | 2012-09-13 11:11:54 -0700 | [diff] [blame] | 2782 | .num_cores = 4, |
| 2783 | .sensors = (int[]){7, 8, 9, 10}, |
| 2784 | .thermal_poll_ms = 60000, |
| 2785 | .core_param = { |
Abhijeet Dharmapurikar | 4445166 | 2012-08-23 18:58:44 -0700 | [diff] [blame] | 2786 | .core_type = MSM_DCVS_CORE_TYPE_CPU, |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 2787 | }, |
Abhijeet Dharmapurikar | 80add42 | 2012-09-13 11:11:54 -0700 | [diff] [blame] | 2788 | .algo_param = { |
Abhijeet Dharmapurikar | 4445166 | 2012-08-23 18:58:44 -0700 | [diff] [blame] | 2789 | .disable_pc_threshold = 1458000, |
| 2790 | .em_win_size_min_us = 100000, |
| 2791 | .em_win_size_max_us = 300000, |
| 2792 | .em_max_util_pct = 97, |
| 2793 | .group_id = 1, |
| 2794 | .max_freq_chg_time_us = 100000, |
| 2795 | .slack_mode_dynamic = 0, |
| 2796 | .slack_weight_thresh_pct = 3, |
| 2797 | .slack_time_min_us = 45000, |
| 2798 | .slack_time_max_us = 45000, |
| 2799 | .ss_iobusy_conv = 100, |
| 2800 | .ss_win_size_min_us = 1000000, |
| 2801 | .ss_win_size_max_us = 1000000, |
| 2802 | .ss_util_pct = 95, |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 2803 | }, |
Abhijeet Dharmapurikar | 80add42 | 2012-09-13 11:11:54 -0700 | [diff] [blame] | 2804 | .energy_coeffs = { |
Abhijeet Dharmapurikar | 4445166 | 2012-08-23 18:58:44 -0700 | [diff] [blame] | 2805 | .active_coeff_a = 336, |
| 2806 | .active_coeff_b = 0, |
| 2807 | .active_coeff_c = 0, |
| 2808 | |
| 2809 | .leakage_coeff_a = -17720, |
| 2810 | .leakage_coeff_b = 37, |
| 2811 | .leakage_coeff_c = 3329, |
| 2812 | .leakage_coeff_d = -277, |
| 2813 | }, |
Abhijeet Dharmapurikar | 80add42 | 2012-09-13 11:11:54 -0700 | [diff] [blame] | 2814 | .power_param = { |
Abhijeet Dharmapurikar | 4445166 | 2012-08-23 18:58:44 -0700 | [diff] [blame] | 2815 | .current_temp = 25, |
Steve Muckle | f9a8749 | 2012-11-02 15:41:00 -0700 | [diff] [blame] | 2816 | .num_freq = 0, /* set at runtime */ |
Abhijeet Dharmapurikar | 4445166 | 2012-08-23 18:58:44 -0700 | [diff] [blame] | 2817 | } |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 2818 | }; |
| 2819 | |
Abhijeet Dharmapurikar | c1ed66c | 2012-09-10 16:03:39 -0700 | [diff] [blame] | 2820 | #define APQ8064_LPM_LATENCY 1000 /* >100 usec for WFI */ |
| 2821 | |
| 2822 | static struct msm_gov_platform_data gov_platform_data = { |
| 2823 | .info = &apq8064_core_info, |
| 2824 | .latency = APQ8064_LPM_LATENCY, |
| 2825 | }; |
| 2826 | |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 2827 | struct platform_device apq8064_msm_gov_device = { |
| 2828 | .name = "msm_dcvs_gov", |
| 2829 | .id = -1, |
| 2830 | .dev = { |
Abhijeet Dharmapurikar | c1ed66c | 2012-09-10 16:03:39 -0700 | [diff] [blame] | 2831 | .platform_data = &gov_platform_data, |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 2832 | }, |
| 2833 | }; |
Stepan Moskovchenko | 28662c5 | 2012-03-01 12:48:45 -0800 | [diff] [blame] | 2834 | |
Abhijeet Dharmapurikar | fb4a2f8 | 2012-08-23 14:36:59 -0700 | [diff] [blame] | 2835 | static struct msm_mpd_algo_param apq8064_mpd_algo_param = { |
| 2836 | .em_win_size_min_us = 10000, |
| 2837 | .em_win_size_max_us = 100000, |
| 2838 | .em_max_util_pct = 90, |
| 2839 | .online_util_pct_min = 60, |
| 2840 | .slack_time_min_us = 50000, |
| 2841 | .slack_time_max_us = 100000, |
| 2842 | }; |
| 2843 | |
| 2844 | struct platform_device apq8064_msm_mpd_device = { |
| 2845 | .name = "msm_mpdecision", |
| 2846 | .id = -1, |
| 2847 | .dev = { |
| 2848 | .platform_data = &apq8064_mpd_algo_param, |
| 2849 | }, |
| 2850 | }; |
| 2851 | |
Terence Hampson | 2e1705f | 2012-04-11 19:55:29 -0400 | [diff] [blame] | 2852 | #ifdef CONFIG_MSM_VCAP |
| 2853 | #define VCAP_HW_BASE 0x05900000 |
| 2854 | |
| 2855 | static struct msm_bus_vectors vcap_init_vectors[] = { |
| 2856 | { |
| 2857 | .src = MSM_BUS_MASTER_VIDEO_CAP, |
| 2858 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2859 | .ab = 0, |
| 2860 | .ib = 0, |
| 2861 | }, |
| 2862 | }; |
| 2863 | |
Terence Hampson | 2e1705f | 2012-04-11 19:55:29 -0400 | [diff] [blame] | 2864 | static struct msm_bus_vectors vcap_480_vectors[] = { |
| 2865 | { |
| 2866 | .src = MSM_BUS_MASTER_VIDEO_CAP, |
| 2867 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
Terence Hampson | 779dc76 | 2012-06-07 15:59:27 -0400 | [diff] [blame] | 2868 | .ab = 480 * 720 * 3 * 60, |
| 2869 | .ib = 480 * 720 * 3 * 60 * 1.5, |
| 2870 | }, |
| 2871 | }; |
| 2872 | |
| 2873 | static struct msm_bus_vectors vcap_576_vectors[] = { |
| 2874 | { |
| 2875 | .src = MSM_BUS_MASTER_VIDEO_CAP, |
| 2876 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 2877 | .ab = 576 * 720 * 3 * 60, |
| 2878 | .ib = 576 * 720 * 3 * 60 * 1.5, |
Terence Hampson | 2e1705f | 2012-04-11 19:55:29 -0400 | [diff] [blame] | 2879 | }, |
| 2880 | }; |
| 2881 | |
| 2882 | static struct msm_bus_vectors vcap_720_vectors[] = { |
| 2883 | { |
| 2884 | .src = MSM_BUS_MASTER_VIDEO_CAP, |
| 2885 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
Terence Hampson | 35a1ff0 | 2012-04-25 17:07:18 -0400 | [diff] [blame] | 2886 | .ab = 1280 * 720 * 3 * 60, |
| 2887 | .ib = 1280 * 720 * 3 * 60 * 1.5, |
Terence Hampson | 2e1705f | 2012-04-11 19:55:29 -0400 | [diff] [blame] | 2888 | }, |
| 2889 | }; |
| 2890 | |
| 2891 | static struct msm_bus_vectors vcap_1080_vectors[] = { |
| 2892 | { |
| 2893 | .src = MSM_BUS_MASTER_VIDEO_CAP, |
| 2894 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
Terence Hampson | f51f6e6 | 2012-08-29 11:02:17 -0400 | [diff] [blame] | 2895 | .ab = 1920 * 1080 * 10 * 60, |
| 2896 | .ib = 1920 * 1080 * 10 * 60 * 1.5, |
Terence Hampson | 2e1705f | 2012-04-11 19:55:29 -0400 | [diff] [blame] | 2897 | }, |
| 2898 | }; |
| 2899 | |
| 2900 | static struct msm_bus_paths vcap_bus_usecases[] = { |
| 2901 | { |
| 2902 | ARRAY_SIZE(vcap_init_vectors), |
| 2903 | vcap_init_vectors, |
| 2904 | }, |
| 2905 | { |
| 2906 | ARRAY_SIZE(vcap_480_vectors), |
| 2907 | vcap_480_vectors, |
| 2908 | }, |
| 2909 | { |
Terence Hampson | 779dc76 | 2012-06-07 15:59:27 -0400 | [diff] [blame] | 2910 | ARRAY_SIZE(vcap_576_vectors), |
| 2911 | vcap_576_vectors, |
| 2912 | }, |
| 2913 | { |
Terence Hampson | 2e1705f | 2012-04-11 19:55:29 -0400 | [diff] [blame] | 2914 | ARRAY_SIZE(vcap_720_vectors), |
| 2915 | vcap_720_vectors, |
| 2916 | }, |
| 2917 | { |
| 2918 | ARRAY_SIZE(vcap_1080_vectors), |
| 2919 | vcap_1080_vectors, |
| 2920 | }, |
| 2921 | }; |
| 2922 | |
| 2923 | static struct msm_bus_scale_pdata vcap_axi_client_pdata = { |
| 2924 | vcap_bus_usecases, |
| 2925 | ARRAY_SIZE(vcap_bus_usecases), |
| 2926 | }; |
| 2927 | |
| 2928 | static struct resource msm_vcap_resources[] = { |
| 2929 | { |
| 2930 | .name = "vcap", |
| 2931 | .start = VCAP_HW_BASE, |
| 2932 | .end = VCAP_HW_BASE + SZ_1M - 1, |
| 2933 | .flags = IORESOURCE_MEM, |
| 2934 | }, |
| 2935 | { |
Terence Hampson | aeb793e | 2012-05-11 11:41:16 -0400 | [diff] [blame] | 2936 | .name = "vc_irq", |
Terence Hampson | 2e1705f | 2012-04-11 19:55:29 -0400 | [diff] [blame] | 2937 | .start = VCAP_VC, |
| 2938 | .end = VCAP_VC, |
| 2939 | .flags = IORESOURCE_IRQ, |
| 2940 | }, |
Terence Hampson | aeb793e | 2012-05-11 11:41:16 -0400 | [diff] [blame] | 2941 | { |
| 2942 | .name = "vp_irq", |
| 2943 | .start = VCAP_VP, |
| 2944 | .end = VCAP_VP, |
| 2945 | .flags = IORESOURCE_IRQ, |
| 2946 | }, |
Terence Hampson | 2e1705f | 2012-04-11 19:55:29 -0400 | [diff] [blame] | 2947 | }; |
| 2948 | |
| 2949 | static unsigned vcap_gpios[] = { |
| 2950 | 2, 3, 4, 5, 6, 7, 8, 9, 10, |
| 2951 | 11, 12, 13, 18, 19, 20, 21, |
| 2952 | 22, 23, 24, 25, 26, 80, 82, |
| 2953 | 83, 84, 85, 86, 87, |
| 2954 | }; |
| 2955 | |
| 2956 | static struct vcap_platform_data vcap_pdata = { |
| 2957 | .gpios = vcap_gpios, |
| 2958 | .num_gpios = ARRAY_SIZE(vcap_gpios), |
| 2959 | .bus_client_pdata = &vcap_axi_client_pdata |
| 2960 | }; |
| 2961 | |
| 2962 | struct platform_device msm8064_device_vcap = { |
| 2963 | .name = "msm_vcap", |
| 2964 | .id = 0, |
| 2965 | .resource = msm_vcap_resources, |
| 2966 | .num_resources = ARRAY_SIZE(msm_vcap_resources), |
| 2967 | .dev = { |
| 2968 | .platform_data = &vcap_pdata, |
| 2969 | }, |
| 2970 | }; |
| 2971 | #endif |
| 2972 | |
Stepan Moskovchenko | 28662c5 | 2012-03-01 12:48:45 -0800 | [diff] [blame] | 2973 | static struct resource msm_cache_erp_resources[] = { |
| 2974 | { |
| 2975 | .name = "l1_irq", |
| 2976 | .start = SC_SICCPUXEXTFAULTIRPTREQ, |
| 2977 | .flags = IORESOURCE_IRQ, |
| 2978 | }, |
| 2979 | { |
| 2980 | .name = "l2_irq", |
| 2981 | .start = APCC_QGICL2IRPTREQ, |
| 2982 | .flags = IORESOURCE_IRQ, |
| 2983 | } |
| 2984 | }; |
| 2985 | |
| 2986 | struct platform_device apq8064_device_cache_erp = { |
| 2987 | .name = "msm_cache_erp", |
| 2988 | .id = -1, |
| 2989 | .num_resources = ARRAY_SIZE(msm_cache_erp_resources), |
| 2990 | .resource = msm_cache_erp_resources, |
| 2991 | }; |
Pratik Patel | 212ab36 | 2012-03-16 12:30:07 -0700 | [diff] [blame] | 2992 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 2993 | #define CORESIGHT_PHYS_BASE 0x01A00000 |
| 2994 | #define CORESIGHT_FUNNEL_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x4000) |
| 2995 | #define CORESIGHT_ETM2_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x1E000) |
| 2996 | #define CORESIGHT_ETM3_PHYS_BASE (CORESIGHT_PHYS_BASE + 0x1F000) |
Pratik Patel | 212ab36 | 2012-03-16 12:30:07 -0700 | [diff] [blame] | 2997 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 2998 | static struct resource coresight_funnel_resources[] = { |
Pratik Patel | 212ab36 | 2012-03-16 12:30:07 -0700 | [diff] [blame] | 2999 | { |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3000 | .start = CORESIGHT_FUNNEL_PHYS_BASE, |
| 3001 | .end = CORESIGHT_FUNNEL_PHYS_BASE + SZ_4K - 1, |
Pratik Patel | 212ab36 | 2012-03-16 12:30:07 -0700 | [diff] [blame] | 3002 | .flags = IORESOURCE_MEM, |
| 3003 | }, |
| 3004 | }; |
| 3005 | |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3006 | static const int coresight_funnel_outports[] = { 0, 1 }; |
| 3007 | static const int coresight_funnel_child_ids[] = { 0, 1 }; |
| 3008 | static const int coresight_funnel_child_ports[] = { 0, 0 }; |
| 3009 | |
| 3010 | static struct coresight_platform_data coresight_funnel_pdata = { |
| 3011 | .id = 2, |
| 3012 | .name = "coresight-funnel", |
Pratik Patel | 0480dc6 | 2012-09-06 09:41:49 -0700 | [diff] [blame] | 3013 | .nr_inports = 8, |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3014 | .outports = coresight_funnel_outports, |
| 3015 | .child_ids = coresight_funnel_child_ids, |
| 3016 | .child_ports = coresight_funnel_child_ports, |
| 3017 | .nr_outports = ARRAY_SIZE(coresight_funnel_outports), |
| 3018 | }; |
| 3019 | |
| 3020 | struct platform_device apq8064_coresight_funnel_device = { |
| 3021 | .name = "coresight-funnel", |
Pratik Patel | 212ab36 | 2012-03-16 12:30:07 -0700 | [diff] [blame] | 3022 | .id = 0, |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3023 | .num_resources = ARRAY_SIZE(coresight_funnel_resources), |
| 3024 | .resource = coresight_funnel_resources, |
| 3025 | .dev = { |
| 3026 | .platform_data = &coresight_funnel_pdata, |
| 3027 | }, |
| 3028 | }; |
| 3029 | |
| 3030 | static struct resource coresight_etm2_resources[] = { |
| 3031 | { |
| 3032 | .start = CORESIGHT_ETM2_PHYS_BASE, |
| 3033 | .end = CORESIGHT_ETM2_PHYS_BASE + SZ_4K - 1, |
| 3034 | .flags = IORESOURCE_MEM, |
| 3035 | }, |
| 3036 | }; |
| 3037 | |
| 3038 | static const int coresight_etm2_outports[] = { 0 }; |
| 3039 | static const int coresight_etm2_child_ids[] = { 2 }; |
| 3040 | static const int coresight_etm2_child_ports[] = { 4 }; |
| 3041 | |
| 3042 | static struct coresight_platform_data coresight_etm2_pdata = { |
| 3043 | .id = 6, |
| 3044 | .name = "coresight-etm2", |
Pratik Patel | 0480dc6 | 2012-09-06 09:41:49 -0700 | [diff] [blame] | 3045 | .nr_inports = 0, |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3046 | .outports = coresight_etm2_outports, |
| 3047 | .child_ids = coresight_etm2_child_ids, |
| 3048 | .child_ports = coresight_etm2_child_ports, |
| 3049 | .nr_outports = ARRAY_SIZE(coresight_etm2_outports), |
| 3050 | }; |
| 3051 | |
| 3052 | struct platform_device coresight_etm2_device = { |
| 3053 | .name = "coresight-etm", |
| 3054 | .id = 2, |
| 3055 | .num_resources = ARRAY_SIZE(coresight_etm2_resources), |
| 3056 | .resource = coresight_etm2_resources, |
| 3057 | .dev = { |
| 3058 | .platform_data = &coresight_etm2_pdata, |
| 3059 | }, |
| 3060 | }; |
| 3061 | |
| 3062 | static struct resource coresight_etm3_resources[] = { |
| 3063 | { |
| 3064 | .start = CORESIGHT_ETM3_PHYS_BASE, |
| 3065 | .end = CORESIGHT_ETM3_PHYS_BASE + SZ_4K - 1, |
| 3066 | .flags = IORESOURCE_MEM, |
| 3067 | }, |
| 3068 | }; |
| 3069 | |
| 3070 | static const int coresight_etm3_outports[] = { 0 }; |
| 3071 | static const int coresight_etm3_child_ids[] = { 2 }; |
| 3072 | static const int coresight_etm3_child_ports[] = { 5 }; |
| 3073 | |
| 3074 | static struct coresight_platform_data coresight_etm3_pdata = { |
| 3075 | .id = 7, |
| 3076 | .name = "coresight-etm3", |
Pratik Patel | 0480dc6 | 2012-09-06 09:41:49 -0700 | [diff] [blame] | 3077 | .nr_inports = 0, |
Pratik Patel | 3b0ca88 | 2012-06-01 16:54:14 -0700 | [diff] [blame] | 3078 | .outports = coresight_etm3_outports, |
| 3079 | .child_ids = coresight_etm3_child_ids, |
| 3080 | .child_ports = coresight_etm3_child_ports, |
| 3081 | .nr_outports = ARRAY_SIZE(coresight_etm3_outports), |
| 3082 | }; |
| 3083 | |
| 3084 | struct platform_device coresight_etm3_device = { |
| 3085 | .name = "coresight-etm", |
| 3086 | .id = 3, |
| 3087 | .num_resources = ARRAY_SIZE(coresight_etm3_resources), |
| 3088 | .resource = coresight_etm3_resources, |
| 3089 | .dev = { |
| 3090 | .platform_data = &coresight_etm3_pdata, |
| 3091 | }, |
Pratik Patel | 212ab36 | 2012-03-16 12:30:07 -0700 | [diff] [blame] | 3092 | }; |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3093 | |
| 3094 | struct msm_iommu_domain_name apq8064_iommu_ctx_names[] = { |
| 3095 | /* Camera */ |
| 3096 | { |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3097 | .name = "ijpeg_src", |
| 3098 | .domain = CAMERA_DOMAIN, |
| 3099 | }, |
| 3100 | /* Camera */ |
| 3101 | { |
| 3102 | .name = "ijpeg_dst", |
| 3103 | .domain = CAMERA_DOMAIN, |
| 3104 | }, |
| 3105 | /* Camera */ |
| 3106 | { |
| 3107 | .name = "jpegd_src", |
| 3108 | .domain = CAMERA_DOMAIN, |
| 3109 | }, |
| 3110 | /* Camera */ |
| 3111 | { |
| 3112 | .name = "jpegd_dst", |
| 3113 | .domain = CAMERA_DOMAIN, |
| 3114 | }, |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 3115 | /* Rotator src*/ |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3116 | { |
| 3117 | .name = "rot_src", |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 3118 | .domain = ROTATOR_SRC_DOMAIN, |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3119 | }, |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 3120 | /* Rotator dst */ |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3121 | { |
| 3122 | .name = "rot_dst", |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 3123 | .domain = ROTATOR_DST_DOMAIN, |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3124 | }, |
| 3125 | /* Video */ |
| 3126 | { |
| 3127 | .name = "vcodec_a_mm1", |
| 3128 | .domain = VIDEO_DOMAIN, |
| 3129 | }, |
| 3130 | /* Video */ |
| 3131 | { |
| 3132 | .name = "vcodec_b_mm2", |
| 3133 | .domain = VIDEO_DOMAIN, |
| 3134 | }, |
| 3135 | /* Video */ |
| 3136 | { |
| 3137 | .name = "vcodec_a_stream", |
| 3138 | .domain = VIDEO_DOMAIN, |
| 3139 | }, |
| 3140 | }; |
| 3141 | |
| 3142 | static struct mem_pool apq8064_video_pools[] = { |
| 3143 | /* |
| 3144 | * Video hardware has the following requirements: |
| 3145 | * 1. All video addresses used by the video hardware must be at a higher |
| 3146 | * address than video firmware address. |
| 3147 | * 2. Video hardware can only access a range of 256MB from the base of |
| 3148 | * the video firmware. |
| 3149 | */ |
| 3150 | [VIDEO_FIRMWARE_POOL] = |
| 3151 | /* Low addresses, intended for video firmware */ |
| 3152 | { |
| 3153 | .paddr = SZ_128K, |
| 3154 | .size = SZ_16M - SZ_128K, |
| 3155 | }, |
| 3156 | [VIDEO_MAIN_POOL] = |
| 3157 | /* Main video pool */ |
| 3158 | { |
| 3159 | .paddr = SZ_16M, |
| 3160 | .size = SZ_256M - SZ_16M, |
| 3161 | }, |
| 3162 | [GEN_POOL] = |
| 3163 | /* Remaining address space up to 2G */ |
| 3164 | { |
| 3165 | .paddr = SZ_256M, |
| 3166 | .size = SZ_2G - SZ_256M, |
| 3167 | }, |
| 3168 | }; |
| 3169 | |
| 3170 | static struct mem_pool apq8064_camera_pools[] = { |
| 3171 | [GEN_POOL] = |
| 3172 | /* One address space for camera */ |
| 3173 | { |
| 3174 | .paddr = SZ_128K, |
| 3175 | .size = SZ_2G - SZ_128K, |
| 3176 | }, |
| 3177 | }; |
| 3178 | |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 3179 | static struct mem_pool apq8064_display_read_pools[] = { |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3180 | [GEN_POOL] = |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 3181 | /* One address space for display reads */ |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3182 | { |
| 3183 | .paddr = SZ_128K, |
| 3184 | .size = SZ_2G - SZ_128K, |
| 3185 | }, |
| 3186 | }; |
| 3187 | |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 3188 | static struct mem_pool apq8064_display_write_pools[] = { |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3189 | [GEN_POOL] = |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 3190 | /* One address space for display writes */ |
| 3191 | { |
| 3192 | .paddr = SZ_128K, |
| 3193 | .size = SZ_2G - SZ_128K, |
| 3194 | }, |
| 3195 | }; |
| 3196 | |
| 3197 | static struct mem_pool apq8064_rotator_src_pools[] = { |
| 3198 | [GEN_POOL] = |
| 3199 | /* One address space for rotator src */ |
| 3200 | { |
| 3201 | .paddr = SZ_128K, |
| 3202 | .size = SZ_2G - SZ_128K, |
| 3203 | }, |
| 3204 | }; |
| 3205 | |
| 3206 | static struct mem_pool apq8064_rotator_dst_pools[] = { |
| 3207 | [GEN_POOL] = |
| 3208 | /* One address space for rotator dst */ |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3209 | { |
| 3210 | .paddr = SZ_128K, |
| 3211 | .size = SZ_2G - SZ_128K, |
| 3212 | }, |
| 3213 | }; |
| 3214 | |
| 3215 | static struct msm_iommu_domain apq8064_iommu_domains[] = { |
| 3216 | [VIDEO_DOMAIN] = { |
| 3217 | .iova_pools = apq8064_video_pools, |
| 3218 | .npools = ARRAY_SIZE(apq8064_video_pools), |
| 3219 | }, |
| 3220 | [CAMERA_DOMAIN] = { |
| 3221 | .iova_pools = apq8064_camera_pools, |
| 3222 | .npools = ARRAY_SIZE(apq8064_camera_pools), |
| 3223 | }, |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 3224 | [DISPLAY_READ_DOMAIN] = { |
| 3225 | .iova_pools = apq8064_display_read_pools, |
| 3226 | .npools = ARRAY_SIZE(apq8064_display_read_pools), |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3227 | }, |
Olav Haugan | ef95ae3 | 2012-05-15 09:50:30 -0700 | [diff] [blame] | 3228 | [DISPLAY_WRITE_DOMAIN] = { |
| 3229 | .iova_pools = apq8064_display_write_pools, |
| 3230 | .npools = ARRAY_SIZE(apq8064_display_write_pools), |
| 3231 | }, |
| 3232 | [ROTATOR_SRC_DOMAIN] = { |
| 3233 | .iova_pools = apq8064_rotator_src_pools, |
| 3234 | .npools = ARRAY_SIZE(apq8064_rotator_src_pools), |
| 3235 | }, |
| 3236 | [ROTATOR_DST_DOMAIN] = { |
| 3237 | .iova_pools = apq8064_rotator_dst_pools, |
| 3238 | .npools = ARRAY_SIZE(apq8064_rotator_dst_pools), |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3239 | }, |
| 3240 | }; |
| 3241 | |
| 3242 | struct iommu_domains_pdata apq8064_iommu_domain_pdata = { |
| 3243 | .domains = apq8064_iommu_domains, |
| 3244 | .ndomains = ARRAY_SIZE(apq8064_iommu_domains), |
| 3245 | .domain_names = apq8064_iommu_ctx_names, |
| 3246 | .nnames = ARRAY_SIZE(apq8064_iommu_ctx_names), |
| 3247 | .domain_alloc_flags = 0, |
| 3248 | }; |
| 3249 | |
| 3250 | struct platform_device apq8064_iommu_domain_device = { |
| 3251 | .name = "iommu_domains", |
| 3252 | .id = -1, |
| 3253 | .dev = { |
| 3254 | .platform_data = &apq8064_iommu_domain_pdata, |
Laura Abbott | 532b2df | 2012-04-12 10:53:48 -0700 | [diff] [blame] | 3255 | } |
| 3256 | }; |
| 3257 | |
| 3258 | struct msm_rtb_platform_data apq8064_rtb_pdata = { |
| 3259 | .size = SZ_1M, |
| 3260 | }; |
| 3261 | |
| 3262 | static int __init msm_rtb_set_buffer_size(char *p) |
| 3263 | { |
| 3264 | int s; |
| 3265 | |
| 3266 | s = memparse(p, NULL); |
| 3267 | apq8064_rtb_pdata.size = ALIGN(s, SZ_4K); |
| 3268 | return 0; |
| 3269 | } |
| 3270 | early_param("msm_rtb_size", msm_rtb_set_buffer_size); |
| 3271 | |
| 3272 | struct platform_device apq8064_rtb_device = { |
| 3273 | .name = "msm_rtb", |
| 3274 | .id = -1, |
| 3275 | .dev = { |
| 3276 | .platform_data = &apq8064_rtb_pdata, |
Laura Abbott | 0577d7b | 2012-04-17 11:14:30 -0700 | [diff] [blame] | 3277 | }, |
| 3278 | }; |
Laura Abbott | 93a4a35 | 2012-05-25 09:26:35 -0700 | [diff] [blame] | 3279 | |
| 3280 | #define APQ8064_L1_SIZE SZ_1M |
| 3281 | /* |
| 3282 | * The actual L2 size is smaller but we need a larger buffer |
| 3283 | * size to store other dump information |
| 3284 | */ |
| 3285 | #define APQ8064_L2_SIZE SZ_8M |
| 3286 | |
| 3287 | struct msm_cache_dump_platform_data apq8064_cache_dump_pdata = { |
| 3288 | .l2_size = APQ8064_L2_SIZE, |
| 3289 | .l1_size = APQ8064_L1_SIZE, |
| 3290 | }; |
| 3291 | |
| 3292 | struct platform_device apq8064_cache_dump_device = { |
| 3293 | .name = "msm_cache_dump", |
| 3294 | .id = -1, |
| 3295 | .dev = { |
| 3296 | .platform_data = &apq8064_cache_dump_pdata, |
| 3297 | }, |
| 3298 | }; |
Srikanth Uyyala | 7d4f721 | 2012-10-12 17:45:36 +0530 | [diff] [blame] | 3299 | |
| 3300 | struct dev_avtimer_data dev_avtimer_pdata = { |
| 3301 | .avtimer_msw_phy_addr = AVTIMER_MSW_PHYSICAL_ADDRESS, |
| 3302 | .avtimer_lsw_phy_addr = AVTIMER_LSW_PHYSICAL_ADDRESS, |
| 3303 | }; |