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gerrit-public.fairphone.software / fp2-dev / kernel / msm / 510d4423269a75edcc61ab6ceffef4b052ea6eae / . / arch / arm / boot / dts / msm8226.dtsi
blob: 17de1571bb0e27467ff919dcbe2dc9c09cf05ed9 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -0700[diff] [blame]14/include/ "msm8226-ion.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]15/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]16/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]17/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -0700[diff] [blame]18/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -0700[diff] [blame]19/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -0700[diff] [blame]20/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -0800[diff] [blame]21/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -0800[diff] [blame]22/include/ "msm8226-coresight.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]23
24/ {
25 model = "Qualcomm MSM 8226";
26 compatible = "qcom,msm8226";
27 interrupt-parent = <&intc>;
28
29 intc: interrupt-controller@f9000000 {
30 compatible = "qcom,msm-qgic2";
31 interrupt-controller;
32 #interrupt-cells = <3>;
33 reg = <0xF9000000 0x1000>,
34 <0xF9002000 0x1000>;
35 };
36
37 msmgpio: gpio@fd510000 {
38 compatible = "qcom,msm-gpio";
39 interrupt-controller;
40 #interrupt-cells = <2>;
41 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -0800[diff] [blame]42 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]43 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -0800[diff] [blame]44 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -0800[diff] [blame]45 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -0800[diff] [blame]46 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]47 };
48
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]49 aliases {
50 spi0 = &spi_0;
51 };
52
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]53 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]54 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]55 interrupts = <1 2 0 1 3 0>;
56 clock-frequency = <19200000>;
57 };
58
59 serial@f991f000 {
60 compatible = "qcom,msm-lsuart-v14";
61 reg = <0xf991f000 0x1000>;
62 interrupts = <0 109 0>;
63 status = "disabled";
64 };
65
66 serial@f995e000 {
67 compatible = "qcom,msm-lsuart-v14";
68 reg = <0xf995e000 0x1000>;
69 interrupts = <0 114 0>;
70 status = "disabled";
71 };
72
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]73 qcom,msm-imem@fe805000 {
74 compatible = "qcom,msm-imem";
75 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
76 };
77
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]78 qcom,sps@f9984000 {
79 compatible = "qcom,msm_sps";
80 reg = <0xf9984000 0x15000>,
81 <0xf9999000 0xb000>;
82 interrupts = <0 94 0>;
83 };
84
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]85 usb@f9a55000 {
86 compatible = "qcom,hsusb-otg";
87 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]88 interrupts = <0 134 0>, <0 140 0>;
89 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]90 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]91 HSUSB_1p8-supply = <&pm8226_l10>;
92 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]93 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]94
95 qcom,hsusb-otg-phy-type = <2>;
96 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]97 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]98 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]99 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]100
101 qcom,msm-bus,name = "usb2";
102 qcom,msm-bus,num-cases = <2>;
103 qcom,msm-bus,active-only = <0>;
104 qcom,msm-bus,num-paths = <1>;
105 qcom,msm-bus,vectors-KBps =
106 <87 512 0 0>,
107 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]108 };
109
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]110 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]111 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]112 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]113 };
114
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]115 wcd9xxx_intc: wcd9xxx-irq {
116 compatible = "qcom,wcd9xxx-irq";
117 interrupt-controller;
118 #interrupt-cells = <1>;
119 interrupt-parent = <&msmgpio>;
120 interrupts = <68 0>;
121 interrupt-names = "cdc-int";
122 };
123
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]124 slim@fe12f000 {
125 cell-index = <1>;
126 compatible = "qcom,slim-ngd";
127 reg = <0xfe12f000 0x35000>,
128 <0xfe104000 0x20000>;
129 reg-names = "slimbus_physical", "slimbus_bam_physical";
130 interrupts = <0 163 0>, <0 164 0>;
131 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]132
133 tapan_codec {
134 compatible = "qcom,tapan-slim-pgd";
135 elemental-addr = [00 01 E0 00 17 02];
136
137 interrupt-parent = <&wcd9xxx_intc>;
138 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
139 17 18 19 20 21 22 23 24 25 26 27 28>;
140 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
141
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]142 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]143 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
144 qcom,cdc-vdd-buck-current = <650000>;
145
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]146 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]147 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
148 qcom,cdc-vdd-h-current = <25000>;
149
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]150 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]151 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
152 qcom,cdc-vdd-px-current = <25000>;
153
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]154 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]155 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
156 qcom,cdc-vdd-a-1p2v-current = <10000>;
157
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]158 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]159 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
160 qcom,cdc-vdd-cx-current = <10000>;
161
162 qcom,cdc-micbias-ldoh-v = <0x3>;
163 qcom,cdc-micbias-cfilt1-mv = <1800>;
164 qcom,cdc-micbias-cfilt2-mv = <1800>;
165 qcom,cdc-micbias-cfilt3-mv = <1800>;
166
167 qcom,cdc-micbias1-cfilt-sel = <0x0>;
168 qcom,cdc-micbias2-cfilt-sel = <0x1>;
169 qcom,cdc-micbias3-cfilt-sel = <0x2>;
170
171 qcom,cdc-mclk-clk-rate = <9600000>;
172 qcom,cdc-slim-ifd = "tapan-slim-ifd";
173 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
174 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]175 };
176
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]177 qcom,msm-adsp-loader {
178 compatible = "qcom,adsp-loader";
179 qcom,adsp-state = <0>;
180 };
181
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]182 sound {
183 compatible = "qcom,msm8226-audio-tapan";
184 qcom,model = "msm8226-tapan-snd-card";
185
186 qcom,audio-routing =
187 "RX_BIAS", "MCLK",
188 "LDO_H", "MCLK",
189 "AMIC1", "MIC BIAS1 Internal1",
190 "MIC BIAS1 Internal1", "Handset Mic",
191 "AMIC2", "MIC BIAS2 External",
192 "MIC BIAS2 External", "Headset Mic",
193 "AMIC3", "MIC BIAS2 External",
194 "MIC BIAS2 External", "ANCRight Headset Mic",
195 "AMIC4", "MIC BIAS2 External",
196 "MIC BIAS2 External", "ANCLeft Headset Mic",
197 "DMIC1", "MIC BIAS1 External",
198 "MIC BIAS1 External", "Digital Mic1",
199 "DMIC2", "MIC BIAS1 External",
200 "MIC BIAS1 External", "Digital Mic2",
201 "DMIC3", "MIC BIAS3 External",
202 "MIC BIAS3 External", "Digital Mic3",
203 "DMIC4", "MIC BIAS3 External",
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame^]204 "MIC BIAS3 External", "Digital Mic4";
205
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]206 qcom,tapan-mclk-clk-freq = <9600000>;
207 };
208
209 qcom,msm-pcm {
210 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame^]211 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]212 };
213
214 qcom,msm-pcm-routing {
215 compatible = "qcom,msm-pcm-routing";
216 };
217
218 qcom,msm-pcm-lpa {
219 compatible = "qcom,msm-pcm-lpa";
220 };
221
222 qcom,msm-compr-dsp {
223 compatible = "qcom,msm-compr-dsp";
224 };
225
226 qcom,msm-voip-dsp {
227 compatible = "qcom,msm-voip-dsp";
228 };
229
230 qcom,msm-pcm-voice {
231 compatible = "qcom,msm-pcm-voice";
232 };
233
234 qcom,msm-stub-codec {
235 compatible = "qcom,msm-stub-codec";
236 };
237
238 qcom,msm-dai-fe {
239 compatible = "qcom,msm-dai-fe";
240 };
241
242 qcom,msm-pcm-afe {
243 compatible = "qcom,msm-pcm-afe";
244 };
245
246 qcom,msm-dai-q6-hdmi {
247 compatible = "qcom,msm-dai-q6-hdmi";
248 qcom,msm-dai-q6-dev-id = <8>;
249 };
250
251 qcom,msm-dai-q6 {
252 compatible = "qcom,msm-dai-q6";
253 qcom,msm-dai-q6-sb-0-rx {
254 compatible = "qcom,msm-dai-q6-dev";
255 qcom,msm-dai-q6-dev-id = <16384>;
256 };
257
258 qcom,msm-dai-q6-sb-0-tx {
259 compatible = "qcom,msm-dai-q6-dev";
260 qcom,msm-dai-q6-dev-id = <16385>;
261 };
262
263 qcom,msm-dai-q6-sb-1-rx {
264 compatible = "qcom,msm-dai-q6-dev";
265 qcom,msm-dai-q6-dev-id = <16386>;
266 };
267
268 qcom,msm-dai-q6-sb-1-tx {
269 compatible = "qcom,msm-dai-q6-dev";
270 qcom,msm-dai-q6-dev-id = <16387>;
271 };
272
273 qcom,msm-dai-q6-sb-3-rx {
274 compatible = "qcom,msm-dai-q6-dev";
275 qcom,msm-dai-q6-dev-id = <16390>;
276 };
277
278 qcom,msm-dai-q6-sb-3-tx {
279 compatible = "qcom,msm-dai-q6-dev";
280 qcom,msm-dai-q6-dev-id = <16391>;
281 };
282
283 qcom,msm-dai-q6-sb-4-rx {
284 compatible = "qcom,msm-dai-q6-dev";
285 qcom,msm-dai-q6-dev-id = <16392>;
286 };
287
288 qcom,msm-dai-q6-sb-4-tx {
289 compatible = "qcom,msm-dai-q6-dev";
290 qcom,msm-dai-q6-dev-id = <16393>;
291 };
292
293 qcom,msm-dai-q6-bt-sco-rx {
294 compatible = "qcom,msm-dai-q6-dev";
295 qcom,msm-dai-q6-dev-id = <12288>;
296 };
297
298 qcom,msm-dai-q6-bt-sco-tx {
299 compatible = "qcom,msm-dai-q6-dev";
300 qcom,msm-dai-q6-dev-id = <12289>;
301 };
302
303 qcom,msm-dai-q6-int-fm-rx {
304 compatible = "qcom,msm-dai-q6-dev";
305 qcom,msm-dai-q6-dev-id = <12292>;
306 };
307
308 qcom,msm-dai-q6-int-fm-tx {
309 compatible = "qcom,msm-dai-q6-dev";
310 qcom,msm-dai-q6-dev-id = <12293>;
311 };
312
313 qcom,msm-dai-q6-be-afe-pcm-rx {
314 compatible = "qcom,msm-dai-q6-dev";
315 qcom,msm-dai-q6-dev-id = <224>;
316 };
317
318 qcom,msm-dai-q6-be-afe-pcm-tx {
319 compatible = "qcom,msm-dai-q6-dev";
320 qcom,msm-dai-q6-dev-id = <225>;
321 };
322
323 qcom,msm-dai-q6-afe-proxy-rx {
324 compatible = "qcom,msm-dai-q6-dev";
325 qcom,msm-dai-q6-dev-id = <241>;
326 };
327
328 qcom,msm-dai-q6-afe-proxy-tx {
329 compatible = "qcom,msm-dai-q6-dev";
330 qcom,msm-dai-q6-dev-id = <240>;
331 };
332 };
333
334 qcom,msm-pcm-hostless {
335 compatible = "qcom,msm-pcm-hostless";
336 };
337
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]338 qcom,wdt@f9017000 {
339 compatible = "qcom,msm-watchdog";
340 reg = <0xf9017000 0x1000>;
341 interrupts = <0 3 0>, <0 4 0>;
342 qcom,bark-time = <11000>;
343 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]344 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]345 };
346
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]347 qcom,smem@fa00000 {
348 compatible = "qcom,smem";
349 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]350 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]351 <0xfc428000 0x4000>;
352 reg-names = "smem", "irq-reg-base", "aux-mem1";
353
354 qcom,smd-modem {
355 compatible = "qcom,smd";
356 qcom,smd-edge = <0>;
357 qcom,smd-irq-offset = <0x8>;
358 qcom,smd-irq-bitmask = <0x1000>;
359 qcom,pil-string = "modem";
360 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]361 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]362
363 qcom,smsm-modem {
364 compatible = "qcom,smsm";
365 qcom,smsm-edge = <0>;
366 qcom,smsm-irq-offset = <0x8>;
367 qcom,smsm-irq-bitmask = <0x2000>;
368 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]369 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]370
371 qcom,smd-adsp {
372 compatible = "qcom,smd";
373 qcom,smd-edge = <1>;
374 qcom,smd-irq-offset = <0x8>;
375 qcom,smd-irq-bitmask = <0x100>;
376 qcom,pil-string = "adsp";
377 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]378 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]379
380 qcom,smsm-adsp {
381 compatible = "qcom,smsm";
382 qcom,smsm-edge = <1>;
383 qcom,smsm-irq-offset = <0x8>;
384 qcom,smsm-irq-bitmask = <0x200>;
385 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]386 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]387
388 qcom,smd-wcnss {
389 compatible = "qcom,smd";
390 qcom,smd-edge = <6>;
391 qcom,smd-irq-offset = <0x8>;
392 qcom,smd-irq-bitmask = <0x20000>;
393 qcom,pil-string = "wcnss";
394 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]395 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]396
397 qcom,smsm-wcnss {
398 compatible = "qcom,smsm";
399 qcom,smsm-edge = <6>;
400 qcom,smsm-irq-offset = <0x8>;
401 qcom,smsm-irq-bitmask = <0x80000>;
402 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]403 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]404
405 qcom,smd-rpm {
406 compatible = "qcom,smd";
407 qcom,smd-edge = <15>;
408 qcom,smd-irq-offset = <0x8>;
409 qcom,smd-irq-bitmask = <0x1>;
410 interrupts = <0 168 1>;
411 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]412 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]413 };
414
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]415 rpm_bus: qcom,rpm-smd {
416 compatible = "qcom,rpm-smd";
417 rpm-channel-name = "rpm_requests";
418 rpm-channel-type = <15>; /* SMD_APPS_RPM */
419 rpm-standalone;
420 };
421
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]422 sdcc1: qcom,sdcc@f9824000 {
423 cell-index = <1>; /* SDC1 eMMC slot */
424 compatible = "qcom,msm-sdcc";
425
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]426 reg = <0xf9824000 0x800>,
427 <0xf9824800 0x100>,
428 <0xf9804000 0x7000>;
429 reg-names = "core_mem", "dml_mem", "bam_mem";
430 interrupts = <0 123 0>, <0 137 0>;
431 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]432
433 qcom,bus-width = <8>;
434 status = "disabled";
435 };
436
437 sdcc2: qcom,sdcc@f98a4000 {
438 cell-index = <2>; /* SDC2 SD card slot */
439 compatible = "qcom,msm-sdcc";
440
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]441 reg = <0xf98a4000 0x800>,
442 <0xf98a4800 0x100>,
443 <0xf9884000 0x7000>;
444 reg-names = "core_mem", "dml_mem", "bam_mem";
445 interrupts = <0 125 0>, <0 220 0>;
446 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]447
448 qcom,bus-width = <4>;
449 status = "disabled";
450 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]451
452 spmi_bus: qcom,spmi@fc4c0000 {
453 cell-index = <0>;
454 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]455 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]456 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]457 <0Xfc4cb000 0x1000>,
458 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]459 /* 190,ee0_krait_hlos_spmi_periph_irq */
460 /* 187,channel_0_krait_hlos_trans_done_irq */
461 interrupts = <0 190 0>, <0 187 0>;
462 qcom,not-wakeup;
463 qcom,pmic-arb-ee = <0>;
464 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]465 };
466
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]467 i2c@f9926000 { /* BLSP-1 QUP-4 */
468 cell-index = <0>;
469 compatible = "qcom,i2c-qup";
470 reg = <0xf9926000 0x1000>;
471 #address-cells = <1>;
472 #size-cells = <0>;
473 reg-names = "qup_phys_addr";
474 interrupts = <0 98 0>;
475 interrupt-names = "qup_err_intr";
476 qcom,i2c-bus-freq = <100000>;
477 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]478
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]479 i2c@f9927000 { /* BLSP1 QUP5 */
480 cell-index = <5>;
481 compatible = "qcom,i2c-qup";
482 #address-cells = <1>;
483 #size-cells = <0>;
484 reg-names = "qup_phys_addr";
485 reg = <0xf9927000 0x1000>;
486 interrupt-names = "qup_err_intr";
487 interrupts = <0 99 0>;
488 qcom,i2c-bus-freq = <100000>;
489 qcom,i2c-src-freq = <19200000>;
490 };
491
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]492 qcom,acpuclk@f9011050 {
493 compatible = "qcom,acpuclk-a7";
494 reg = <0xf9011050 0x8>;
495 reg-names = "rcg_base";
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]496 a7_cpu-supply = <&pm8226_s2>;
497 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]498 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]499
500 qcom,ocmem@fdd00000 {
501 compatible = "qcom,msm-ocmem";
502 reg = <0xfdd00000 0x2000>,
503 <0xfdd02000 0x2000>,
504 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]505 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]506 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
507 interrupts = <0 76 0 0 77 0>;
508 interrupt-names = "ocmem_irq", "dm_irq";
509 qcom,ocmem-num-regions = <0x1>;
510 qcom,ocmem-num-macros = <0x2>;
511 qcom,resource-type = <0x706d636f>;
512 #address-cells = <1>;
513 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]514 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]515
516 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]517 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]518 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]519 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]520 };
521 };
522
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]523 qcom,venus@fdce0000 {
524 compatible = "qcom,pil-venus";
525 reg = <0xfdce0000 0x4000>,
526 <0xfdc80000 0x400>;
527 reg-names = "wrapper_base", "vbif_base";
528 vdd-supply = <&gdsc_venus>;
529
530 qcom,firmware-name = "venus";
531 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]532
533 qcom,pronto@fb21b000 {
534 compatible = "qcom,pil-pronto";
535 reg = <0xfb21b000 0x3000>,
536 <0xfc401700 0x4>,
537 <0xfd485300 0xc>;
538 reg-names = "pmu_base", "clk_base", "halt_base";
539 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]540 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]541
542 qcom,firmware-name = "wcnss";
543 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]544
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]545 qcom,lpass@fe200000 {
546 compatible = "qcom,pil-q6v5-lpass";
547 reg = <0xfe200000 0x00100>,
548 <0xfd485100 0x00010>;
549 reg-names = "qdsp6_base", "halt_base";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]550 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]551 interrupts = <0 162 1>;
552
553 qcom,firmware-name = "adsp";
554 };
555
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]556 qcom,mss@fc880000 {
557 compatible = "qcom,pil-q6v5-mss";
558 reg = <0xfc880000 0x100>,
559 <0xfd485000 0x400>,
560 <0xfc820000 0x020>,
561 <0xfc401680 0x004>,
562 <0x0d1fc000 0x4000>,
563 <0xfd485194 0x4>;
564 reg-names = "qdsp6_base", "halt_base", "rmb_base",
565 "restart_reg", "metadata_base", "cxrail_bhs_reg";
566
567 interrupts = <0 24 1>;
568 vdd_mss-supply = <&pm8226_s1>;
569 vdd_cx-supply = <&pm8226_s1_corner>;
570 vdd_mx-supply = <&pm8226_l3>;
571 vdd_pll-supply = <&pm8226_l8>;
572 qcom,vdd_pll = <1800000>;
573
574 qcom,is-loadable;
575 qcom,firmware-name = "mba";
576 qcom,pil-self-auth;
577 };
578
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]579 qcom,msm-mem-hole {
580 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800[diff] [blame]581 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]582 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]583
584 tsens: tsens@fc4a8000 {
585 compatible = "qcom,msm-tsens";
586 reg = <0xfc4a8000 0x2000>,
587 <0xfc4b8000 0x1000>;
588 reg-names = "tsens_physical", "tsens_eeprom_physical";
589 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]590 qcom,sensors = <4>;
591 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]592 qcom,calib-mode = "fuse_map2";
593 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]594
595 qcom,msm-thermal {
596 compatible = "qcom,msm-thermal";
597 qcom,sensor-id = <0>;
598 qcom,poll-ms = <250>;
599 qcom,limit-temp = <60>;
600 qcom,temp-hysteresis = <10>;
601 qcom,freq-step = <2>;
602 };
603
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]604 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
605 compatible = "qcom,spi-qup-v2";
606 #address-cells = <1>;
607 #size-cells = <0>;
608 reg-names = "spi_physical", "spi_bam_physical";
609 reg = <0xf9923000 0x1000>,
610 <0xf9904000 0xF000>;
611 interrupt-names = "spi_irq", "spi_bam_irq";
612 interrupts = <0 95 0>, <0 238 0>;
613 spi-max-frequency = <19200000>;
614
615 gpios = <&msmgpio 3 0>, /* CLK */
616 <&msmgpio 1 0>, /* MISO */
617 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]618 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]619
620 qcom,infinite-mode = <0>;
621 qcom,use-bam;
622 qcom,ver-reg-exists;
623 qcom,bam-consumer-pipe-index = <12>;
624 qcom,bam-producer-pipe-index = <13>;
625 };
626
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]627 qcom,bam_dmux@fc834000 {
628 compatible = "qcom,bam_dmux";
629 reg = <0xfc834000 0x7000>;
630 interrupts = <0 29 1>;
631 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]632
633 qcom,msm-rtb {
634 compatible = "qcom,msm-rtb";
635 qcom,memory-reservation-type = "EBI1";
636 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
637 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]638
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]639 qcom,msm-rng@f9bff000 {
640 compatible = "qcom,msm-rng";
641 reg = <0xf9bff000 0x200>;
642 qcom,msm-rng-iface-clk;
643 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]644
645 qcom,tz-log@fc5b82c {
646 compatible = "qcom,tz-log";
647 reg = <0x0fc5b82c 0x1000>;
648 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]649};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]650
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]651&gdsc_venus {
652 status = "ok";
653};
654
655&gdsc_mdss {
656 status = "ok";
657};
658
659&gdsc_jpeg {
660 status = "ok";
661};
662
663&gdsc_vfe {
664 status = "ok";
665};
666
667&gdsc_oxili_cx {
668 status = "ok";
669};
670
671&gdsc_usb_hsic {
672 status = "ok";
673};
674
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]675/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]676/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]677/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]678
679&pm8226_vadc {
680 chan@0 {
681 label = "usb_in";
682 reg = <0>;
683 qcom,decimation = <0>;
684 qcom,pre-div-channel-scaling = <4>;
685 qcom,calibration-type = "absolute";
686 qcom,scale-function = <0>;
687 qcom,hw-settle-time = <0>;
688 qcom,fast-avg-setup = <0>;
689 };
690
691 chan@2 {
692 label = "vchg_sns";
693 reg = <2>;
694 qcom,decimation = <0>;
695 qcom,pre-div-channel-scaling = <3>;
696 qcom,calibration-type = "absolute";
697 qcom,scale-function = <0>;
698 qcom,hw-settle-time = <0>;
699 qcom,fast-avg-setup = <0>;
700 };
701
702 chan@5 {
703 label = "vcoin";
704 reg = <5>;
705 qcom,decimation = <0>;
706 qcom,pre-div-channel-scaling = <1>;
707 qcom,calibration-type = "absolute";
708 qcom,scale-function = <0>;
709 qcom,hw-settle-time = <0>;
710 qcom,fast-avg-setup = <0>;
711 };
712
713 chan@6 {
714 label = "vbat_sns";
715 reg = <6>;
716 qcom,decimation = <0>;
717 qcom,pre-div-channel-scaling = <1>;
718 qcom,calibration-type = "absolute";
719 qcom,scale-function = <0>;
720 qcom,hw-settle-time = <0>;
721 qcom,fast-avg-setup = <0>;
722 };
723
724 chan@7 {
725 label = "vph_pwr";
726 reg = <7>;
727 qcom,decimation = <0>;
728 qcom,pre-div-channel-scaling = <1>;
729 qcom,calibration-type = "absolute";
730 qcom,scale-function = <0>;
731 qcom,hw-settle-time = <0>;
732 qcom,fast-avg-setup = <0>;
733 };
734
735 chan@30 {
736 label = "batt_therm";
737 reg = <0x30>;
738 qcom,decimation = <0>;
739 qcom,pre-div-channel-scaling = <0>;
740 qcom,calibration-type = "ratiometric";
741 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]742 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]743 qcom,fast-avg-setup = <0>;
744 };
745
746 chan@31 {
747 label = "batt_id";
748 reg = <0x31>;
749 qcom,decimation = <0>;
750 qcom,pre-div-channel-scaling = <0>;
751 qcom,calibration-type = "ratiometric";
752 qcom,scale-function = <0>;
753 qcom,hw-settle-time = <2>;
754 qcom,fast-avg-setup = <0>;
755 };
756
757 chan@b2 {
758 label = "xo_therm_pu2";
759 reg = <0xb2>;
760 qcom,decimation = <0>;
761 qcom,pre-div-channel-scaling = <0>;
762 qcom,calibration-type = "ratiometric";
763 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]764 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]765 qcom,fast-avg-setup = <0>;
766 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]767
768};
769
770&pm8226_chg {
771 status = "ok";
772
773 qcom,chg-charging-disabled;
774 qcom,chg-use-default-batt-values;
775
776 qcom,chg-chgr@1000 {
777 status = "ok";
778 };
779
780 qcom,chg-buck@1100 {
781 status = "ok";
782 };
783
784 qcom,chg-usb-chgpth@1300 {
785 status = "ok";
786 };
787
788 qcom,chg-boost@1500 {
789 status = "ok";
790 };
791
792 qcom,chg-misc@1600 {
793 status = "ok";
794 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]795};