blob: 0792031a5cf959a1543f32f4e0f2ab4ccb7b0ec2 [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Stephen Hemminger793b8832005-09-14 16:06:14 -070025#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070026#include <linux/kernel.h>
27#include <linux/version.h>
28#include <linux/module.h>
29#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080030#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070031#include <linux/etherdevice.h>
32#include <linux/ethtool.h>
33#include <linux/pci.h>
34#include <linux/ip.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030035#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070036#include <linux/tcp.h>
37#include <linux/in.h>
38#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080039#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070040#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080041#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070042#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080043#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070044
45#include <asm/irq.h>
46
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070047#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
48#define SKY2_VLAN_TAG_USED 1
49#endif
50
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070051#include "sky2.h"
52
53#define DRV_NAME "sky2"
Stephen Hemmingerfaf60e72007-09-19 15:36:47 -070054#define DRV_VERSION "1.18"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070055#define PFX DRV_NAME " "
56
57/*
58 * The Yukon II chipset takes 64 bit command blocks (called list elements)
59 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070060 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070061 */
62
Stephen Hemminger14d02632006-09-26 11:57:43 -070063#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070064#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070065#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080066#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemminger82788c72006-01-17 13:43:10 -080067#define RX_SKB_ALIGN 8
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070068
Stephen Hemminger793b8832005-09-14 16:06:14 -070069#define TX_RING_SIZE 512
70#define TX_DEF_PENDING (TX_RING_SIZE - 1)
71#define TX_MIN_PENDING 64
Stephen Hemmingerb19666d2006-03-07 11:06:36 -080072#define MAX_SKB_TX_LE (4 + (sizeof(dma_addr_t)/sizeof(u32))*MAX_SKB_FRAGS)
Stephen Hemminger793b8832005-09-14 16:06:14 -070073
74#define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070075#define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070076#define TX_WATCHDOG (5 * HZ)
77#define NAPI_WEIGHT 64
78#define PHY_RETRIES 1000
79
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070080#define SKY2_EEPROM_MAGIC 0x9955aabb
81
82
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070083#define RING_NEXT(x,s) (((x)+1) & ((s)-1))
84
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070085static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070086 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
87 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080088 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070089
Stephen Hemminger793b8832005-09-14 16:06:14 -070090static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070091module_param(debug, int, 0);
92MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
93
Stephen Hemminger14d02632006-09-26 11:57:43 -070094static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080095module_param(copybreak, int, 0);
96MODULE_PARM_DESC(copybreak, "Receive copy threshold");
97
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080098static int disable_msi = 0;
99module_param(disable_msi, int, 0);
100MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
101
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700102static const struct pci_device_id sky2_id_table[] = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800103 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
104 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700106 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800107 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800108 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700136 { 0 }
137};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700138
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700139MODULE_DEVICE_TABLE(pci, sky2_id_table);
140
141/* Avoid conditionals by using array */
142static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
143static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700144static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700145
Stephen Hemminger92f965e2005-12-09 11:34:53 -0800146/* This driver supports yukon2 chipset only */
147static const char *yukon2_name[] = {
148 "XL", /* 0xb3 */
149 "EC Ultra", /* 0xb4 */
Stephen Hemminger93745492007-02-06 10:45:43 -0800150 "Extreme", /* 0xb5 */
Stephen Hemminger92f965e2005-12-09 11:34:53 -0800151 "EC", /* 0xb6 */
152 "FE", /* 0xb7 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700153 "FE+", /* 0xb8 */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700154};
155
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100156static void sky2_set_multicast(struct net_device *dev);
157
Stephen Hemminger793b8832005-09-14 16:06:14 -0700158/* Access to external PHY */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800159static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700160{
161 int i;
162
163 gma_write16(hw, port, GM_SMI_DATA, val);
164 gma_write16(hw, port, GM_SMI_CTRL,
165 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
166
167 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700168 if (!(gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800169 return 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700170 udelay(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700171 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800172
Stephen Hemminger793b8832005-09-14 16:06:14 -0700173 printk(KERN_WARNING PFX "%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800174 return -ETIMEDOUT;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700175}
176
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800177static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700178{
179 int i;
180
Stephen Hemminger793b8832005-09-14 16:06:14 -0700181 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700182 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
183
184 for (i = 0; i < PHY_RETRIES; i++) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800185 if (gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_RD_VAL) {
186 *val = gma_read16(hw, port, GM_SMI_DATA);
187 return 0;
188 }
189
Stephen Hemminger793b8832005-09-14 16:06:14 -0700190 udelay(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700191 }
192
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800193 return -ETIMEDOUT;
194}
195
196static u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
197{
198 u16 v;
199
200 if (__gm_phy_read(hw, port, reg, &v) != 0)
201 printk(KERN_WARNING PFX "%s: phy read timeout\n", hw->dev[port]->name);
202 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700203}
204
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800205
206static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700207{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800208 /* switch power to VCC (WA for VAUX problem) */
209 sky2_write8(hw, B0_POWER_CTRL,
210 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700211
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800212 /* disable Core Clock Division, */
213 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700214
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800215 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
216 /* enable bits are inverted */
217 sky2_write8(hw, B2_Y2_CLK_GATE,
218 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
219 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
220 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
221 else
222 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700223
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700224 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700225 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700226
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700227 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
228
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700229 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
230 /* set all bits to 0 except bits 15..12 and 8 */
231 reg &= P_ASPM_CONTROL_MSK;
232 sky2_pci_write32(hw, PCI_DEV_REG4, reg);
233
234 reg = sky2_pci_read32(hw, PCI_DEV_REG5);
235 /* set all bits to 0 except bits 28 & 27 */
236 reg &= P_CTL_TIM_VMAIN_AV_MSK;
237 sky2_pci_write32(hw, PCI_DEV_REG5, reg);
238
239 sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700240
241 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
242 reg = sky2_read32(hw, B2_GP_IO);
243 reg |= GLB_GPIO_STAT_RACE_DIS;
244 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700245
246 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700247 }
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800248}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700249
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800250static void sky2_power_aux(struct sky2_hw *hw)
251{
252 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
253 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
254 else
255 /* enable bits are inverted */
256 sky2_write8(hw, B2_Y2_CLK_GATE,
257 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
258 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
259 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
260
261 /* switch power to VAUX */
262 if (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL)
263 sky2_write8(hw, B0_POWER_CTRL,
264 (PC_VAUX_ENA | PC_VCC_ENA |
265 PC_VAUX_ON | PC_VCC_OFF));
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700266}
267
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700268static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700269{
270 u16 reg;
271
272 /* disable all GMAC IRQ's */
273 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
274 /* disable PHY IRQs */
275 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700276
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700277 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
278 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
279 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
280 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
281
282 reg = gma_read16(hw, port, GM_RX_CTRL);
283 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
284 gma_write16(hw, port, GM_RX_CTRL, reg);
285}
286
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700287/* flow control to advertise bits */
288static const u16 copper_fc_adv[] = {
289 [FC_NONE] = 0,
290 [FC_TX] = PHY_M_AN_ASP,
291 [FC_RX] = PHY_M_AN_PC,
292 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
293};
294
295/* flow control to advertise bits when using 1000BaseX */
296static const u16 fiber_fc_adv[] = {
297 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
298 [FC_TX] = PHY_M_P_ASYM_MD_X,
299 [FC_RX] = PHY_M_P_SYM_MD_X,
300 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
301};
302
303/* flow control to GMA disable bits */
304static const u16 gm_fc_disable[] = {
305 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
306 [FC_TX] = GM_GPCR_FC_RX_DIS,
307 [FC_RX] = GM_GPCR_FC_TX_DIS,
308 [FC_BOTH] = 0,
309};
310
311
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700312static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
313{
314 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700315 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700316
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700317 if (sky2->autoneg == AUTONEG_ENABLE &&
318 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700319 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
320
321 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700322 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700323 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
324
Stephen Hemminger53419c62007-05-14 12:38:11 -0700325 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700326 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700327 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700328 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
329 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700330 /* set master & slave downshift counter to 1x */
331 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700332
333 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
334 }
335
336 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700337 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700338 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700339 /* enable automatic crossover */
340 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700341
342 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
343 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
344 u16 spec;
345
346 /* Enable Class A driver for FE+ A0 */
347 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
348 spec |= PHY_M_FESC_SEL_CL_A;
349 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
350 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700351 } else {
352 /* disable energy detect */
353 ctrl &= ~PHY_M_PC_EN_DET_MSK;
354
355 /* enable automatic crossover */
356 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
357
Stephen Hemminger53419c62007-05-14 12:38:11 -0700358 /* downshift on PHY 88E1112 and 88E1149 is changed */
Stephen Hemminger93745492007-02-06 10:45:43 -0800359 if (sky2->autoneg == AUTONEG_ENABLE
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700360 && (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700361 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700362 ctrl &= ~PHY_M_PC_DSC_MSK;
363 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
364 }
365 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700366 } else {
367 /* workaround for deviation #4.88 (CRC errors) */
368 /* disable Automatic Crossover */
369
370 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700371 }
372
373 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
374
375 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700376 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700377 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
378
379 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
380 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
381 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
382 ctrl &= ~PHY_M_MAC_MD_MSK;
383 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700384 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
385
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700386 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700387 /* select page 1 to access Fiber registers */
388 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700389
390 /* for SFP-module set SIGDET polarity to low */
391 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
392 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700393 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700394 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700395
396 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700397 }
398
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700399 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700400 ct1000 = 0;
401 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700402 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700403
404 if (sky2->autoneg == AUTONEG_ENABLE) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700405 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700406 if (sky2->advertising & ADVERTISED_1000baseT_Full)
407 ct1000 |= PHY_M_1000C_AFD;
408 if (sky2->advertising & ADVERTISED_1000baseT_Half)
409 ct1000 |= PHY_M_1000C_AHD;
410 if (sky2->advertising & ADVERTISED_100baseT_Full)
411 adv |= PHY_M_AN_100_FD;
412 if (sky2->advertising & ADVERTISED_100baseT_Half)
413 adv |= PHY_M_AN_100_HD;
414 if (sky2->advertising & ADVERTISED_10baseT_Full)
415 adv |= PHY_M_AN_10_FD;
416 if (sky2->advertising & ADVERTISED_10baseT_Half)
417 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700418
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700419 adv |= copper_fc_adv[sky2->flow_mode];
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700420 } else { /* special defines for FIBER (88E1040S only) */
421 if (sky2->advertising & ADVERTISED_1000baseT_Full)
422 adv |= PHY_M_AN_1000X_AFD;
423 if (sky2->advertising & ADVERTISED_1000baseT_Half)
424 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700425
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700426 adv |= fiber_fc_adv[sky2->flow_mode];
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700427 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700428
429 /* Restart Auto-negotiation */
430 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
431 } else {
432 /* forced speed/duplex settings */
433 ct1000 = PHY_M_1000C_MSE;
434
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700435 /* Disable auto update for duplex flow control and speed */
436 reg |= GM_GPCR_AU_ALL_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700437
438 switch (sky2->speed) {
439 case SPEED_1000:
440 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700441 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700442 break;
443 case SPEED_100:
444 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700445 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700446 break;
447 }
448
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700449 if (sky2->duplex == DUPLEX_FULL) {
450 reg |= GM_GPCR_DUP_FULL;
451 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700452 } else if (sky2->speed < SPEED_1000)
453 sky2->flow_mode = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700454
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700455
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700456 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700457
458 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700459 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700460 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
461 else
462 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700463 }
464
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700465 gma_write16(hw, port, GM_GP_CTRL, reg);
466
Stephen Hemminger05745c42007-09-19 15:36:45 -0700467 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700468 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
469
470 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
471 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
472
473 /* Setup Phy LED's */
474 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
475 ledover = 0;
476
477 switch (hw->chip_id) {
478 case CHIP_ID_YUKON_FE:
479 /* on 88E3082 these bits are at 11..9 (shifted left) */
480 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
481
482 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
483
484 /* delete ACT LED control bits */
485 ctrl &= ~PHY_M_FELP_LED1_MSK;
486 /* change ACT LED control to blink mode */
487 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
488 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
489 break;
490
Stephen Hemminger05745c42007-09-19 15:36:45 -0700491 case CHIP_ID_YUKON_FE_P:
492 /* Enable Link Partner Next Page */
493 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
494 ctrl |= PHY_M_PC_ENA_LIP_NP;
495
496 /* disable Energy Detect and enable scrambler */
497 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
498 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
499
500 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
501 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
502 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
503 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
504
505 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
506 break;
507
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700508 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700509 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700510
511 /* select page 3 to access LED control register */
512 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
513
514 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700515 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
516 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
517 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
518 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
519 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700520
521 /* set Polarity Control register */
522 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700523 (PHY_M_POLC_LS1_P_MIX(4) |
524 PHY_M_POLC_IS0_P_MIX(4) |
525 PHY_M_POLC_LOS_CTRL(2) |
526 PHY_M_POLC_INIT_CTRL(2) |
527 PHY_M_POLC_STA1_CTRL(2) |
528 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700529
530 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700531 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700532 break;
Stephen Hemminger93745492007-02-06 10:45:43 -0800533
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700534 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -0800535 case CHIP_ID_YUKON_EX:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700536 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
537
538 /* select page 3 to access LED control register */
539 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
540
541 /* set LED Function Control register */
542 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
543 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
544 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
545 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
546 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
547
548 /* set Blink Rate in LED Timer Control Register */
549 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
550 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
551 /* restore page register */
552 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
553 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700554
555 default:
556 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
557 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
558 /* turn off the Rx LED (LED_RX) */
Stephen Hemminger0efdf262006-12-05 12:03:41 -0800559 ledover &= ~PHY_M_LED_MO_RX;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700560 }
561
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700562 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
563 hw->chip_rev == CHIP_REV_YU_EC_U_A1) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800564 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700565 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
566
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800567 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700568 gm_phy_write(hw, port, 0x18, 0xaa99);
569 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700570
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800571 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700572 gm_phy_write(hw, port, 0x18, 0xa204);
573 gm_phy_write(hw, port, 0x17, 0x2002);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800574
575 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700576 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700577 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
578 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
579 /* apply workaround for integrated resistors calibration */
580 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
581 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemminger93745492007-02-06 10:45:43 -0800582 } else if (hw->chip_id != CHIP_ID_YUKON_EX) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700583 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800584 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
585
586 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
587 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemminger0efdf262006-12-05 12:03:41 -0800588 ledover |= PHY_M_LED_MO_100;
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800589 }
590
591 if (ledover)
592 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
593
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700594 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700595
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700596 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700597 if (sky2->autoneg == AUTONEG_ENABLE)
598 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
599 else
600 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
601}
602
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700603static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
604{
605 u32 reg1;
606 static const u32 phy_power[]
607 = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
608
609 /* looks like this XL is back asswards .. */
610 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
611 onoff = !onoff;
612
Stephen Hemmingeraed2cec2006-12-20 13:06:35 -0800613 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700614 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700615 if (onoff)
616 /* Turn off phy power saving */
617 reg1 &= ~phy_power[port];
618 else
619 reg1 |= phy_power[port];
620
621 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
shemminger@osdl.org98232f82006-08-28 10:00:52 -0700622 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingeraed2cec2006-12-20 13:06:35 -0800623 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700624 udelay(100);
625}
626
Stephen Hemminger1b537562005-12-20 15:08:07 -0800627/* Force a renegotiation */
628static void sky2_phy_reinit(struct sky2_port *sky2)
629{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800630 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800631 sky2_phy_init(sky2->hw, sky2->port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800632 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800633}
634
Stephen Hemmingere3173832007-02-06 10:45:39 -0800635/* Put device in state to listen for Wake On Lan */
636static void sky2_wol_init(struct sky2_port *sky2)
637{
638 struct sky2_hw *hw = sky2->hw;
639 unsigned port = sky2->port;
640 enum flow_control save_mode;
641 u16 ctrl;
642 u32 reg1;
643
644 /* Bring hardware out of reset */
645 sky2_write16(hw, B0_CTST, CS_RST_CLR);
646 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
647
648 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
649 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
650
651 /* Force to 10/100
652 * sky2_reset will re-enable on resume
653 */
654 save_mode = sky2->flow_mode;
655 ctrl = sky2->advertising;
656
657 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
658 sky2->flow_mode = FC_NONE;
659 sky2_phy_power(hw, port, 1);
660 sky2_phy_reinit(sky2);
661
662 sky2->flow_mode = save_mode;
663 sky2->advertising = ctrl;
664
665 /* Set GMAC to no flow control and auto update for speed/duplex */
666 gma_write16(hw, port, GM_GP_CTRL,
667 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
668 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
669
670 /* Set WOL address */
671 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
672 sky2->netdev->dev_addr, ETH_ALEN);
673
674 /* Turn on appropriate WOL control bits */
675 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
676 ctrl = 0;
677 if (sky2->wol & WAKE_PHY)
678 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
679 else
680 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
681
682 if (sky2->wol & WAKE_MAGIC)
683 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
684 else
685 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;;
686
687 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
688 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
689
690 /* Turn on legacy PCI-Express PME mode */
691 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
692 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
693 reg1 |= PCI_Y2_PME_LEGACY;
694 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
695 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
696
697 /* block receiver */
698 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
699
700}
701
Stephen Hemminger69161612007-06-04 17:23:26 -0700702static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
703{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700704 struct net_device *dev = hw->dev[port];
705
706 if (dev->mtu <= ETH_DATA_LEN)
Stephen Hemminger69161612007-06-04 17:23:26 -0700707 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
Stephen Hemminger05745c42007-09-19 15:36:45 -0700708 TX_JUMBO_DIS | TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700709
Stephen Hemminger05745c42007-09-19 15:36:45 -0700710 else if (hw->chip_id != CHIP_ID_YUKON_EC_U)
711 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
712 TX_STFW_ENA | TX_JUMBO_ENA);
713 else {
714 /* set Tx GMAC FIFO Almost Empty Threshold */
715 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
716 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger69161612007-06-04 17:23:26 -0700717
Stephen Hemminger05745c42007-09-19 15:36:45 -0700718 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
719 TX_JUMBO_ENA | TX_STFW_DIS);
720
721 /* Can't do offload because of lack of store/forward */
722 dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | NETIF_F_ALL_CSUM);
Stephen Hemminger69161612007-06-04 17:23:26 -0700723 }
724}
725
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700726static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
727{
728 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
729 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100730 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700731 int i;
732 const u8 *addr = hw->dev[port]->dev_addr;
733
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700734 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
735 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700736
737 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
738
Stephen Hemminger793b8832005-09-14 16:06:14 -0700739 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700740 /* WA DEV_472 -- looks like crossed wires on port 2 */
741 /* clear GMAC 1 Control reset */
742 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
743 do {
744 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
745 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
746 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
747 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
748 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
749 }
750
Stephen Hemminger793b8832005-09-14 16:06:14 -0700751 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700752
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700753 /* Enable Transmit FIFO Underrun */
754 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
755
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800756 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700757 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800758 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700759
760 /* MIB clear */
761 reg = gma_read16(hw, port, GM_PHY_ADDR);
762 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
763
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700764 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
765 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700766 gma_write16(hw, port, GM_PHY_ADDR, reg);
767
768 /* transmit control */
769 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
770
771 /* receive control reg: unicast + multicast + no FCS */
772 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700773 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700774
775 /* transmit flow control */
776 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
777
778 /* transmit parameter */
779 gma_write16(hw, port, GM_TX_PARAM,
780 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
781 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
782 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
783 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
784
785 /* serial mode register */
786 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700787 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700788
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700789 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700790 reg |= GM_SMOD_JUMBO_ENA;
791
792 gma_write16(hw, port, GM_SERIAL_MODE, reg);
793
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700794 /* virtual address for data */
795 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
796
Stephen Hemminger793b8832005-09-14 16:06:14 -0700797 /* physical address: used for pause frames */
798 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
799
800 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700801 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
802 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
803 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
804
805 /* Configure Rx MAC FIFO */
806 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100807 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700808 if (hw->chip_id == CHIP_ID_YUKON_EX ||
809 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100810 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700811
Al Viro25cccec2007-07-20 16:07:33 +0100812 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700813
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700814 /* Flush Rx MAC FIFO on any flow control or error */
shemminger@osdl.org42eeea02005-11-30 11:45:13 -0800815 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700816
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800817 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700818 reg = RX_GMF_FL_THR_DEF + 1;
819 /* Another magic mystery workaround from sk98lin */
820 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
821 hw->chip_rev == CHIP_REV_YU_FE2_A0)
822 reg = 0x178;
823 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700824
825 /* Configure Tx MAC FIFO */
826 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
827 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800828
Stephen Hemmingere0c28112007-09-20 13:03:49 -0700829 /* On chips without ram buffer, pause is controled by MAC level */
830 if (sky2_read8(hw, B2_E_0) == 0) {
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800831 sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800832 sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -0700833
Stephen Hemminger69161612007-06-04 17:23:26 -0700834 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800835 }
836
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700837}
838
Stephen Hemminger67712902006-12-04 15:53:45 -0800839/* Assign Ram Buffer allocation to queue */
840static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700841{
Stephen Hemminger67712902006-12-04 15:53:45 -0800842 u32 end;
843
844 /* convert from K bytes to qwords used for hw register */
845 start *= 1024/8;
846 space *= 1024/8;
847 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700848
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700849 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
850 sky2_write32(hw, RB_ADDR(q, RB_START), start);
851 sky2_write32(hw, RB_ADDR(q, RB_END), end);
852 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
853 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
854
855 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800856 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700857
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800858 /* On receive queue's set the thresholds
859 * give receiver priority when > 3/4 full
860 * send pause when down to 2K
861 */
862 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
863 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700864
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800865 tp = space - 2048/8;
866 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
867 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700868 } else {
869 /* Enable store & forward on Tx queue's because
870 * Tx FIFO is only 1K on Yukon
871 */
872 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
873 }
874
875 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700876 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700877}
878
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700879/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800880static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700881{
882 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
883 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
884 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800885 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700886}
887
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700888/* Setup prefetch unit registers. This is the interface between
889 * hardware and driver list elements
890 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -0800891static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700892 u64 addr, u32 last)
893{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700894 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
895 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
896 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), addr >> 32);
897 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), (u32) addr);
898 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
899 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700900
901 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700902}
903
Stephen Hemminger793b8832005-09-14 16:06:14 -0700904static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2)
905{
906 struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod;
907
Stephen Hemmingercb5d9542006-05-08 15:11:29 -0700908 sky2->tx_prod = RING_NEXT(sky2->tx_prod, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -0700909 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700910 return le;
911}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700912
Stephen Hemminger291ea612006-09-26 11:57:41 -0700913static inline struct tx_ring_info *tx_le_re(struct sky2_port *sky2,
914 struct sky2_tx_le *le)
915{
916 return sky2->tx_ring + (le - sky2->tx_le);
917}
918
Stephen Hemminger290d4de2006-03-20 15:48:15 -0800919/* Update chip's next pointer */
920static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700921{
Stephen Hemminger50432cb2007-05-14 12:38:15 -0700922 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -0800923 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -0700924 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
925
926 /* Synchronize I/O on since next processor may write to tail */
927 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700928}
929
Stephen Hemminger793b8832005-09-14 16:06:14 -0700930
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700931static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
932{
933 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -0700934 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -0700935 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700936 return le;
937}
938
Stephen Hemminger14d02632006-09-26 11:57:43 -0700939/* Build description to hardware for one receive segment */
940static void sky2_rx_add(struct sky2_port *sky2, u8 op,
941 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700942{
943 struct sky2_rx_le *le;
Stephen Hemminger36eb0c72007-07-09 15:33:42 -0700944 u32 hi = upper_32_bits(map);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700945
Stephen Hemminger793b8832005-09-14 16:06:14 -0700946 if (sky2->rx_addr64 != hi) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700947 le = sky2_next_rx(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700948 le->addr = cpu_to_le32(hi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700949 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger36eb0c72007-07-09 15:33:42 -0700950 sky2->rx_addr64 = upper_32_bits(map + len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700951 }
Stephen Hemminger793b8832005-09-14 16:06:14 -0700952
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700953 le = sky2_next_rx(sky2);
Stephen Hemminger734d1862005-12-09 11:35:00 -0800954 le->addr = cpu_to_le32((u32) map);
955 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -0700956 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700957}
958
Stephen Hemminger14d02632006-09-26 11:57:43 -0700959/* Build description to hardware for one possibly fragmented skb */
960static void sky2_rx_submit(struct sky2_port *sky2,
961 const struct rx_ring_info *re)
962{
963 int i;
964
965 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
966
967 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
968 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
969}
970
971
972static void sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
973 unsigned size)
974{
975 struct sk_buff *skb = re->skb;
976 int i;
977
978 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
979 pci_unmap_len_set(re, data_size, size);
980
981 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
982 re->frag_addr[i] = pci_map_page(pdev,
983 skb_shinfo(skb)->frags[i].page,
984 skb_shinfo(skb)->frags[i].page_offset,
985 skb_shinfo(skb)->frags[i].size,
986 PCI_DMA_FROMDEVICE);
987}
988
989static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
990{
991 struct sk_buff *skb = re->skb;
992 int i;
993
994 pci_unmap_single(pdev, re->data_addr, pci_unmap_len(re, data_size),
995 PCI_DMA_FROMDEVICE);
996
997 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
998 pci_unmap_page(pdev, re->frag_addr[i],
999 skb_shinfo(skb)->frags[i].size,
1000 PCI_DMA_FROMDEVICE);
1001}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001002
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001003/* Tell chip where to start receive checksum.
1004 * Actually has two checksums, but set both same to avoid possible byte
1005 * order problems.
1006 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001007static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001008{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001009 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001010
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001011 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1012 le->ctrl = 0;
1013 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001014
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001015 sky2_write32(sky2->hw,
1016 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1017 sky2->rx_csum ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001018}
1019
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001020/*
1021 * The RX Stop command will not work for Yukon-2 if the BMU does not
1022 * reach the end of packet and since we can't make sure that we have
1023 * incoming data, we must reset the BMU while it is not doing a DMA
1024 * transfer. Since it is possible that the RX path is still active,
1025 * the RX RAM buffer will be stopped first, so any possible incoming
1026 * data will not trigger a DMA. After the RAM buffer is stopped, the
1027 * BMU is polled until any DMA in progress is ended and only then it
1028 * will be reset.
1029 */
1030static void sky2_rx_stop(struct sky2_port *sky2)
1031{
1032 struct sky2_hw *hw = sky2->hw;
1033 unsigned rxq = rxqaddr[sky2->port];
1034 int i;
1035
1036 /* disable the RAM Buffer receive queue */
1037 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1038
1039 for (i = 0; i < 0xffff; i++)
1040 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1041 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1042 goto stopped;
1043
1044 printk(KERN_WARNING PFX "%s: receiver stop failed\n",
1045 sky2->netdev->name);
1046stopped:
1047 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1048
1049 /* reset the Rx prefetch unit */
1050 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001051 mmiowb();
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001052}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001053
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001054/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001055static void sky2_rx_clean(struct sky2_port *sky2)
1056{
1057 unsigned i;
1058
1059 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001060 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001061 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001062
1063 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001064 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001065 kfree_skb(re->skb);
1066 re->skb = NULL;
1067 }
1068 }
1069}
1070
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001071/* Basic MII support */
1072static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1073{
1074 struct mii_ioctl_data *data = if_mii(ifr);
1075 struct sky2_port *sky2 = netdev_priv(dev);
1076 struct sky2_hw *hw = sky2->hw;
1077 int err = -EOPNOTSUPP;
1078
1079 if (!netif_running(dev))
1080 return -ENODEV; /* Phy still in reset */
1081
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001082 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001083 case SIOCGMIIPHY:
1084 data->phy_id = PHY_ADDR_MARV;
1085
1086 /* fallthru */
1087 case SIOCGMIIREG: {
1088 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001089
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001090 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001091 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001092 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001093
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001094 data->val_out = val;
1095 break;
1096 }
1097
1098 case SIOCSMIIREG:
1099 if (!capable(CAP_NET_ADMIN))
1100 return -EPERM;
1101
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001102 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001103 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1104 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001105 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001106 break;
1107 }
1108 return err;
1109}
1110
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001111#ifdef SKY2_VLAN_TAG_USED
1112static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
1113{
1114 struct sky2_port *sky2 = netdev_priv(dev);
1115 struct sky2_hw *hw = sky2->hw;
1116 u16 port = sky2->port;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001117
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001118 netif_tx_lock_bh(dev);
Stephen Hemminger3d4e66f2007-06-01 09:43:58 -07001119 netif_poll_disable(sky2->hw->dev[0]);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001120
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001121 sky2->vlgrp = grp;
Stephen Hemminger3d4e66f2007-06-01 09:43:58 -07001122 if (grp) {
1123 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1124 RX_VLAN_STRIP_ON);
1125 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1126 TX_VLAN_TAG_ON);
1127 } else {
1128 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1129 RX_VLAN_STRIP_OFF);
1130 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1131 TX_VLAN_TAG_OFF);
1132 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001133
Stephen Hemminger3d4e66f2007-06-01 09:43:58 -07001134 netif_poll_enable(sky2->hw->dev[0]);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001135 netif_tx_unlock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001136}
1137#endif
1138
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001139/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001140 * Allocate an skb for receiving. If the MTU is large enough
1141 * make the skb non-linear with a fragment list of pages.
1142 *
Stephen Hemminger82788c72006-01-17 13:43:10 -08001143 * It appears the hardware has a bug in the FIFO logic that
1144 * cause it to hang if the FIFO gets overrun and the receive buffer
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07001145 * is not 64 byte aligned. The buffer returned from netdev_alloc_skb is
1146 * aligned except if slab debugging is enabled.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001147 */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001148static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001149{
1150 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001151 unsigned long p;
1152 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001153
Stephen Hemminger14d02632006-09-26 11:57:43 -07001154 skb = netdev_alloc_skb(sky2->netdev, sky2->rx_data_size + RX_SKB_ALIGN);
1155 if (!skb)
1156 goto nomem;
1157
1158 p = (unsigned long) skb->data;
1159 skb_reserve(skb, ALIGN(p, RX_SKB_ALIGN) - p);
1160
1161 for (i = 0; i < sky2->rx_nfrags; i++) {
1162 struct page *page = alloc_page(GFP_ATOMIC);
1163
1164 if (!page)
1165 goto free_partial;
1166 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001167 }
1168
1169 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001170free_partial:
1171 kfree_skb(skb);
1172nomem:
1173 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001174}
1175
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001176static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1177{
1178 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1179}
1180
Stephen Hemminger82788c72006-01-17 13:43:10 -08001181/*
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001182 * Allocate and setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001183 * Normal case this ends up creating one list element for skb
1184 * in the receive ring. Worst case if using large MTU and each
1185 * allocation falls on a different 64 bit region, that results
1186 * in 6 list elements per ring entry.
1187 * One element is used for checksum enable/disable, and one
1188 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001189 */
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001190static int sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001191{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001192 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001193 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001194 unsigned rxq = rxqaddr[sky2->port];
Stephen Hemminger14d02632006-09-26 11:57:43 -07001195 unsigned i, size, space, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001196
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001197 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001198 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001199
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001200 /* On PCI express lowering the watermark gives better performance */
1201 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1202 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1203
1204 /* These chips have no ram buffer?
1205 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001206 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001207 (hw->chip_rev == CHIP_REV_YU_EC_U_A1
1208 || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001209 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001210
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001211 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1212
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001213 if (!(hw->flags & SKY2_HW_NEW_LE))
1214 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001215
Stephen Hemminger14d02632006-09-26 11:57:43 -07001216 /* Space needed for frame data + headers rounded up */
Stephen Hemmingerf957da22007-07-09 15:33:41 -07001217 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001218
1219 /* Stopping point for hardware truncation */
1220 thresh = (size - 8) / sizeof(u32);
1221
1222 /* Account for overhead of skb - to avoid order > 0 allocation */
1223 space = SKB_DATA_ALIGN(size) + NET_SKB_PAD
1224 + sizeof(struct skb_shared_info);
1225
1226 sky2->rx_nfrags = space >> PAGE_SHIFT;
1227 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1228
1229 if (sky2->rx_nfrags != 0) {
1230 /* Compute residue after pages */
1231 space = sky2->rx_nfrags << PAGE_SHIFT;
1232
1233 if (space < size)
1234 size -= space;
1235 else
1236 size = 0;
1237
1238 /* Optimize to handle small packets and headers */
1239 if (size < copybreak)
1240 size = copybreak;
1241 if (size < ETH_HLEN)
1242 size = ETH_HLEN;
1243 }
1244 sky2->rx_data_size = size;
1245
1246 /* Fill Rx ring */
1247 for (i = 0; i < sky2->rx_pending; i++) {
1248 re = sky2->rx_ring + i;
1249
1250 re->skb = sky2_rx_alloc(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001251 if (!re->skb)
1252 goto nomem;
1253
Stephen Hemminger14d02632006-09-26 11:57:43 -07001254 sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size);
1255 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001256 }
1257
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001258 /*
1259 * The receiver hangs if it receives frames larger than the
1260 * packet buffer. As a workaround, truncate oversize frames, but
1261 * the register is limited to 9 bits, so if you do frames > 2052
1262 * you better get the MTU right!
1263 */
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001264 if (thresh > 0x1ff)
1265 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1266 else {
1267 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1268 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1269 }
1270
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001271 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001272 sky2_rx_update(sky2, rxq);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001273 return 0;
1274nomem:
1275 sky2_rx_clean(sky2);
1276 return -ENOMEM;
1277}
1278
1279/* Bring up network interface. */
1280static int sky2_up(struct net_device *dev)
1281{
1282 struct sky2_port *sky2 = netdev_priv(dev);
1283 struct sky2_hw *hw = sky2->hw;
1284 unsigned port = sky2->port;
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001285 u32 imask, ramsize;
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001286 int cap, err = -ENOMEM;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001287 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001288
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001289 /*
1290 * On dual port PCI-X card, there is an problem where status
1291 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001292 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001293 if (otherdev && netif_running(otherdev) &&
1294 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
1295 struct sky2_port *osky2 = netdev_priv(otherdev);
1296 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001297
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001298 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
1299 cmd &= ~PCI_X_CMD_MAX_SPLIT;
1300 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
1301
1302 sky2->rx_csum = 0;
1303 osky2->rx_csum = 0;
1304 }
1305
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001306 if (netif_msg_ifup(sky2))
1307 printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);
1308
Stephen Hemminger55d7b4e2007-07-09 15:33:34 -07001309 netif_carrier_off(dev);
1310
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001311 /* must be power of 2 */
1312 sky2->tx_le = pci_alloc_consistent(hw->pdev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07001313 TX_RING_SIZE *
1314 sizeof(struct sky2_tx_le),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001315 &sky2->tx_le_map);
1316 if (!sky2->tx_le)
1317 goto err_out;
1318
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001319 sky2->tx_ring = kcalloc(TX_RING_SIZE, sizeof(struct tx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001320 GFP_KERNEL);
1321 if (!sky2->tx_ring)
1322 goto err_out;
1323 sky2->tx_prod = sky2->tx_cons = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001324
1325 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1326 &sky2->rx_le_map);
1327 if (!sky2->rx_le)
1328 goto err_out;
1329 memset(sky2->rx_le, 0, RX_LE_BYTES);
1330
Stephen Hemminger291ea612006-09-26 11:57:41 -07001331 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001332 GFP_KERNEL);
1333 if (!sky2->rx_ring)
1334 goto err_out;
1335
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001336 sky2_phy_power(hw, port, 1);
1337
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001338 sky2_mac_init(hw, port);
1339
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001340 /* Register is number of 4K blocks on internal RAM buffer. */
1341 ramsize = sky2_read8(hw, B2_E_0) * 4;
1342 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001343 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001344
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001345 pr_debug(PFX "%s: ram buffer %dK\n", dev->name, ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001346 if (ramsize < 16)
1347 rxspace = ramsize / 2;
1348 else
1349 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001350
Stephen Hemminger67712902006-12-04 15:53:45 -08001351 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1352 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1353
1354 /* Make sure SyncQ is disabled */
1355 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1356 RB_RST_SET);
1357 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001358
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001359 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001360
Stephen Hemminger69161612007-06-04 17:23:26 -07001361 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1362 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1363 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1364
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001365 /* Set almost empty threshold */
Stephen Hemmingerc2716fb2006-09-26 11:57:39 -07001366 if (hw->chip_id == CHIP_ID_YUKON_EC_U
1367 && hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07001368 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001369
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001370 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
1371 TX_RING_SIZE - 1);
1372
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001373 err = sky2_rx_start(sky2);
1374 if (err)
1375 goto err_out;
1376
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001377 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001378 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001379 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001380 sky2_write32(hw, B0_IMSK, imask);
1381
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001382 return 0;
1383
1384err_out:
Stephen Hemminger1b537562005-12-20 15:08:07 -08001385 if (sky2->rx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001386 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1387 sky2->rx_le, sky2->rx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001388 sky2->rx_le = NULL;
1389 }
1390 if (sky2->tx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001391 pci_free_consistent(hw->pdev,
1392 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1393 sky2->tx_le, sky2->tx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001394 sky2->tx_le = NULL;
1395 }
1396 kfree(sky2->tx_ring);
1397 kfree(sky2->rx_ring);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001398
Stephen Hemminger1b537562005-12-20 15:08:07 -08001399 sky2->tx_ring = NULL;
1400 sky2->rx_ring = NULL;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001401 return err;
1402}
1403
Stephen Hemminger793b8832005-09-14 16:06:14 -07001404/* Modular subtraction in ring */
1405static inline int tx_dist(unsigned tail, unsigned head)
1406{
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001407 return (head - tail) & (TX_RING_SIZE - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001408}
1409
1410/* Number of list elements available for next tx */
1411static inline int tx_avail(const struct sky2_port *sky2)
1412{
1413 return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod);
1414}
1415
1416/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001417static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001418{
1419 unsigned count;
1420
1421 count = sizeof(dma_addr_t) / sizeof(u32);
1422 count += skb_shinfo(skb)->nr_frags * count;
1423
Herbert Xu89114af2006-07-08 13:34:32 -07001424 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001425 ++count;
1426
Patrick McHardy84fa7932006-08-29 16:44:56 -07001427 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001428 ++count;
1429
1430 return count;
1431}
1432
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001433/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001434 * Put one packet in ring for transmit.
1435 * A single packet can generate multiple list elements, and
1436 * the number of ring elements will probably be less than the number
1437 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001438 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001439static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1440{
1441 struct sky2_port *sky2 = netdev_priv(dev);
1442 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001443 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001444 struct tx_ring_info *re;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001445 unsigned i, len;
1446 dma_addr_t mapping;
1447 u32 addr64;
1448 u16 mss;
1449 u8 ctrl;
1450
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001451 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1452 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001453
Stephen Hemminger793b8832005-09-14 16:06:14 -07001454 if (unlikely(netif_msg_tx_queued(sky2)))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001455 printk(KERN_DEBUG "%s: tx queued, slot %u, len %d\n",
1456 dev->name, sky2->tx_prod, skb->len);
1457
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001458 len = skb_headlen(skb);
1459 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger36eb0c72007-07-09 15:33:42 -07001460 addr64 = upper_32_bits(mapping);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001461
shemminger@osdl.orga018e332005-11-30 11:45:16 -08001462 /* Send high bits if changed or crosses boundary */
Stephen Hemminger36eb0c72007-07-09 15:33:42 -07001463 if (addr64 != sky2->tx_addr64 ||
1464 upper_32_bits(mapping + len) != sky2->tx_addr64) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001465 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001466 le->addr = cpu_to_le32(addr64);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001467 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger36eb0c72007-07-09 15:33:42 -07001468 sky2->tx_addr64 = upper_32_bits(mapping + len);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001469 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001470
1471 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001472 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001473 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001474
1475 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001476 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001477
Stephen Hemminger69161612007-06-04 17:23:26 -07001478 if (mss != sky2->tx_last_mss) {
1479 le = get_tx_le(sky2);
1480 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001481
1482 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001483 le->opcode = OP_MSS | HW_OWNER;
1484 else
1485 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001486 sky2->tx_last_mss = mss;
1487 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001488 }
1489
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001490 ctrl = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001491#ifdef SKY2_VLAN_TAG_USED
1492 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
1493 if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
1494 if (!le) {
1495 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001496 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001497 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001498 } else
1499 le->opcode |= OP_VLAN;
1500 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1501 ctrl |= INS_VLAN;
1502 }
1503#endif
1504
1505 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001506 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001507 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001508 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001509 ctrl |= CALSUM; /* auto checksum */
1510 else {
1511 const unsigned offset = skb_transport_offset(skb);
1512 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001513
Stephen Hemminger69161612007-06-04 17:23:26 -07001514 tcpsum = offset << 16; /* sum start */
1515 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001516
Stephen Hemminger69161612007-06-04 17:23:26 -07001517 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1518 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1519 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001520
Stephen Hemminger69161612007-06-04 17:23:26 -07001521 if (tcpsum != sky2->tx_tcpsum) {
1522 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001523
Stephen Hemminger69161612007-06-04 17:23:26 -07001524 le = get_tx_le(sky2);
1525 le->addr = cpu_to_le32(tcpsum);
1526 le->length = 0; /* initial checksum value */
1527 le->ctrl = 1; /* one packet */
1528 le->opcode = OP_TCPLISW | HW_OWNER;
1529 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001530 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001531 }
1532
1533 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001534 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001535 le->length = cpu_to_le16(len);
1536 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001537 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001538
Stephen Hemminger291ea612006-09-26 11:57:41 -07001539 re = tx_le_re(sky2, le);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001540 re->skb = skb;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001541 pci_unmap_addr_set(re, mapaddr, mapping);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001542 pci_unmap_len_set(re, maplen, len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001543
1544 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001545 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001546
1547 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1548 frag->size, PCI_DMA_TODEVICE);
Stephen Hemminger36eb0c72007-07-09 15:33:42 -07001549 addr64 = upper_32_bits(mapping);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001550 if (addr64 != sky2->tx_addr64) {
1551 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001552 le->addr = cpu_to_le32(addr64);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001553 le->ctrl = 0;
1554 le->opcode = OP_ADDR64 | HW_OWNER;
1555 sky2->tx_addr64 = addr64;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001556 }
1557
1558 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001559 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001560 le->length = cpu_to_le16(frag->size);
1561 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001562 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001563
Stephen Hemminger291ea612006-09-26 11:57:41 -07001564 re = tx_le_re(sky2, le);
1565 re->skb = skb;
1566 pci_unmap_addr_set(re, mapaddr, mapping);
1567 pci_unmap_len_set(re, maplen, frag->size);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001568 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001569
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001570 le->ctrl |= EOP;
1571
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001572 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1573 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001574
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001575 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001576
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001577 dev->trans_start = jiffies;
1578 return NETDEV_TX_OK;
1579}
1580
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001581/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001582 * Free ring elements from starting at tx_cons until "done"
1583 *
1584 * NB: the hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001585 * buffers so make sure not to free skb to early.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001586 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001587static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001588{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001589 struct net_device *dev = sky2->netdev;
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001590 struct pci_dev *pdev = sky2->hw->pdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001591 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001592
Stephen Hemminger0e3ff6a2005-12-09 11:35:02 -08001593 BUG_ON(done >= TX_RING_SIZE);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001594
Stephen Hemminger291ea612006-09-26 11:57:41 -07001595 for (idx = sky2->tx_cons; idx != done;
1596 idx = RING_NEXT(idx, TX_RING_SIZE)) {
1597 struct sky2_tx_le *le = sky2->tx_le + idx;
1598 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001599
Stephen Hemminger291ea612006-09-26 11:57:41 -07001600 switch(le->opcode & ~HW_OWNER) {
1601 case OP_LARGESEND:
1602 case OP_PACKET:
1603 pci_unmap_single(pdev,
1604 pci_unmap_addr(re, mapaddr),
1605 pci_unmap_len(re, maplen),
1606 PCI_DMA_TODEVICE);
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001607 break;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001608 case OP_BUFFER:
1609 pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr),
1610 pci_unmap_len(re, maplen),
Stephen Hemminger734d1862005-12-09 11:35:00 -08001611 PCI_DMA_TODEVICE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001612 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001613 }
1614
Stephen Hemminger291ea612006-09-26 11:57:41 -07001615 if (le->ctrl & EOP) {
1616 if (unlikely(netif_msg_tx_done(sky2)))
1617 printk(KERN_DEBUG "%s: tx done %u\n",
1618 dev->name, idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001619
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001620 sky2->net_stats.tx_packets++;
1621 sky2->net_stats.tx_bytes += re->skb->len;
1622
Stephen Hemminger794b2bd2006-12-01 14:29:36 -08001623 dev_kfree_skb_any(re->skb);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001624 sky2->tx_next = RING_NEXT(idx, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001625 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001626 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001627
Stephen Hemminger291ea612006-09-26 11:57:41 -07001628 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001629 smp_mb();
1630
Stephen Hemminger22e11702006-07-12 15:23:48 -07001631 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001632 netif_wake_queue(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001633}
1634
1635/* Cleanup all untransmitted buffers, assume transmitter not running */
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001636static void sky2_tx_clean(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001637{
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001638 struct sky2_port *sky2 = netdev_priv(dev);
1639
1640 netif_tx_lock_bh(dev);
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001641 sky2_tx_complete(sky2, sky2->tx_prod);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001642 netif_tx_unlock_bh(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001643}
1644
1645/* Network shutdown */
1646static int sky2_down(struct net_device *dev)
1647{
1648 struct sky2_port *sky2 = netdev_priv(dev);
1649 struct sky2_hw *hw = sky2->hw;
1650 unsigned port = sky2->port;
1651 u16 ctrl;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001652 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001653
Stephen Hemminger1b537562005-12-20 15:08:07 -08001654 /* Never really got started! */
1655 if (!sky2->tx_le)
1656 return 0;
1657
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001658 if (netif_msg_ifdown(sky2))
1659 printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);
1660
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08001661 /* Stop more packets from being queued */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001662 netif_stop_queue(dev);
1663
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001664 /* Disable port IRQ */
1665 imask = sky2_read32(hw, B0_IMSK);
1666 imask &= ~portirq_msk[port];
1667 sky2_write32(hw, B0_IMSK, imask);
1668
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001669 sky2_gmac_reset(hw, port);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001670
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001671 /* Stop transmitter */
1672 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1673 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
1674
1675 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07001676 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001677
1678 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001679 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001680 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1681
1682 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1683
1684 /* Workaround shared GMAC reset */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001685 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0
1686 && port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001687 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1688
1689 /* Disable Force Sync bit and Enable Alloc bit */
1690 sky2_write8(hw, SK_REG(port, TXA_CTRL),
1691 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
1692
1693 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1694 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
1695 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
1696
1697 /* Reset the PCI FIFO of the async Tx queue */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001698 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1699 BMU_RST_SET | BMU_FIFO_RST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001700
1701 /* Reset the Tx prefetch units */
1702 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
1703 PREF_UNIT_RST_SET);
1704
1705 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1706
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001707 sky2_rx_stop(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001708
1709 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
1710 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1711
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001712 sky2_phy_power(hw, port, 0);
1713
Stephen Hemminger55d7b4e2007-07-09 15:33:34 -07001714 netif_carrier_off(dev);
1715
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001716 /* turn off LED's */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001717 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
1718
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08001719 synchronize_irq(hw->pdev->irq);
1720
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001721 sky2_tx_clean(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001722 sky2_rx_clean(sky2);
1723
1724 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1725 sky2->rx_le, sky2->rx_le_map);
1726 kfree(sky2->rx_ring);
1727
1728 pci_free_consistent(hw->pdev,
1729 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1730 sky2->tx_le, sky2->tx_le_map);
1731 kfree(sky2->tx_ring);
1732
Stephen Hemminger1b537562005-12-20 15:08:07 -08001733 sky2->tx_le = NULL;
1734 sky2->rx_le = NULL;
1735
1736 sky2->rx_ring = NULL;
1737 sky2->tx_ring = NULL;
1738
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001739 return 0;
1740}
1741
1742static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
1743{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001744 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001745 return SPEED_1000;
1746
Stephen Hemminger05745c42007-09-19 15:36:45 -07001747 if (!(hw->flags & SKY2_HW_GIGABIT)) {
1748 if (aux & PHY_M_PS_SPEED_100)
1749 return SPEED_100;
1750 else
1751 return SPEED_10;
1752 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001753
1754 switch (aux & PHY_M_PS_SPEED_MSK) {
1755 case PHY_M_PS_SPEED_1000:
1756 return SPEED_1000;
1757 case PHY_M_PS_SPEED_100:
1758 return SPEED_100;
1759 default:
1760 return SPEED_10;
1761 }
1762}
1763
1764static void sky2_link_up(struct sky2_port *sky2)
1765{
1766 struct sky2_hw *hw = sky2->hw;
1767 unsigned port = sky2->port;
1768 u16 reg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001769 static const char *fc_name[] = {
1770 [FC_NONE] = "none",
1771 [FC_TX] = "tx",
1772 [FC_RX] = "rx",
1773 [FC_BOTH] = "both",
1774 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001775
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001776 /* enable Rx/Tx */
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001777 reg = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001778 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
1779 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001780
1781 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
1782
1783 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001784
Stephen Hemminger75e80682007-09-19 15:36:46 -07001785 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07001786
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001787 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001788 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001789 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
1790
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001791 if (hw->flags & SKY2_HW_NEWER_PHY) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001792 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingered6d32c2006-05-08 15:11:33 -07001793 u16 led = PHY_M_LEDC_LOS_CTRL(1); /* link active */
1794
1795 switch(sky2->speed) {
1796 case SPEED_10:
1797 led |= PHY_M_LEDC_INIT_CTRL(7);
1798 break;
1799
1800 case SPEED_100:
1801 led |= PHY_M_LEDC_STA1_CTRL(7);
1802 break;
1803
1804 case SPEED_1000:
1805 led |= PHY_M_LEDC_STA0_CTRL(7);
1806 break;
1807 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001808
1809 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingered6d32c2006-05-08 15:11:33 -07001810 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, led);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001811 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
1812 }
1813
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001814 if (netif_msg_link(sky2))
1815 printk(KERN_INFO PFX
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001816 "%s: Link is up at %d Mbps, %s duplex, flow control %s\n",
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001817 sky2->netdev->name, sky2->speed,
1818 sky2->duplex == DUPLEX_FULL ? "full" : "half",
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001819 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001820}
1821
1822static void sky2_link_down(struct sky2_port *sky2)
1823{
1824 struct sky2_hw *hw = sky2->hw;
1825 unsigned port = sky2->port;
1826 u16 reg;
1827
1828 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
1829
1830 reg = gma_read16(hw, port, GM_GP_CTRL);
1831 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
1832 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001833
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001834 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001835
1836 /* Turn on link LED */
1837 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
1838
1839 if (netif_msg_link(sky2))
1840 printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001841
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001842 sky2_phy_init(hw, port);
1843}
1844
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001845static enum flow_control sky2_flow(int rx, int tx)
1846{
1847 if (rx)
1848 return tx ? FC_BOTH : FC_RX;
1849 else
1850 return tx ? FC_TX : FC_NONE;
1851}
1852
Stephen Hemminger793b8832005-09-14 16:06:14 -07001853static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
1854{
1855 struct sky2_hw *hw = sky2->hw;
1856 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001857 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001858
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001859 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001860 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001861 if (lpa & PHY_M_AN_RF) {
1862 printk(KERN_ERR PFX "%s: remote fault", sky2->netdev->name);
1863 return -1;
1864 }
1865
Stephen Hemminger793b8832005-09-14 16:06:14 -07001866 if (!(aux & PHY_M_PS_SPDUP_RES)) {
1867 printk(KERN_ERR PFX "%s: speed/duplex mismatch",
1868 sky2->netdev->name);
1869 return -1;
1870 }
1871
Stephen Hemminger793b8832005-09-14 16:06:14 -07001872 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07001873 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001874
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001875 /* Since the pause result bits seem to in different positions on
1876 * different chips. look at registers.
1877 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001878 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001879 /* Shift for bits in fiber PHY */
1880 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
1881 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001882
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001883 if (advert & ADVERTISE_1000XPAUSE)
1884 advert |= ADVERTISE_PAUSE_CAP;
1885 if (advert & ADVERTISE_1000XPSE_ASYM)
1886 advert |= ADVERTISE_PAUSE_ASYM;
1887 if (lpa & LPA_1000XPAUSE)
1888 lpa |= LPA_PAUSE_CAP;
1889 if (lpa & LPA_1000XPAUSE_ASYM)
1890 lpa |= LPA_PAUSE_ASYM;
1891 }
1892
1893 sky2->flow_status = FC_NONE;
1894 if (advert & ADVERTISE_PAUSE_CAP) {
1895 if (lpa & LPA_PAUSE_CAP)
1896 sky2->flow_status = FC_BOTH;
1897 else if (advert & ADVERTISE_PAUSE_ASYM)
1898 sky2->flow_status = FC_RX;
1899 } else if (advert & ADVERTISE_PAUSE_ASYM) {
1900 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
1901 sky2->flow_status = FC_TX;
1902 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001903
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001904 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000
Stephen Hemminger93745492007-02-06 10:45:43 -08001905 && !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001906 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001907
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001908 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001909 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
1910 else
1911 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
1912
1913 return 0;
1914}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001915
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001916/* Interrupt from PHY */
1917static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001918{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001919 struct net_device *dev = hw->dev[port];
1920 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001921 u16 istatus, phystat;
1922
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001923 if (!netif_running(dev))
1924 return;
1925
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001926 spin_lock(&sky2->phy_lock);
1927 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
1928 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
1929
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001930 if (netif_msg_intr(sky2))
1931 printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
1932 sky2->netdev->name, istatus, phystat);
1933
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001934 if (sky2->autoneg == AUTONEG_ENABLE && (istatus & PHY_M_IS_AN_COMPL)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001935 if (sky2_autoneg_done(sky2, phystat) == 0)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001936 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001937 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001938 }
1939
Stephen Hemminger793b8832005-09-14 16:06:14 -07001940 if (istatus & PHY_M_IS_LSP_CHANGE)
1941 sky2->speed = sky2_phy_speed(hw, phystat);
1942
1943 if (istatus & PHY_M_IS_DUP_CHANGE)
1944 sky2->duplex =
1945 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
1946
1947 if (istatus & PHY_M_IS_LST_CHANGE) {
1948 if (phystat & PHY_M_PS_LINK_UP)
1949 sky2_link_up(sky2);
1950 else
1951 sky2_link_down(sky2);
1952 }
1953out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001954 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001955}
1956
Stephen Hemminger62335ab2007-02-06 10:45:42 -08001957/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08001958 * and tx queue is full (stopped).
1959 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001960static void sky2_tx_timeout(struct net_device *dev)
1961{
1962 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001963 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001964
1965 if (netif_msg_timer(sky2))
1966 printk(KERN_ERR PFX "%s: tx timeout\n", dev->name);
1967
Stephen Hemminger8f246642006-03-20 15:48:21 -08001968 printk(KERN_DEBUG PFX "%s: transmit ring %u .. %u report=%u done=%u\n",
Stephen Hemminger62335ab2007-02-06 10:45:42 -08001969 dev->name, sky2->tx_cons, sky2->tx_prod,
1970 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
1971 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001972
Stephen Hemminger81906792007-02-15 16:40:33 -08001973 /* can't restart safely under softirq */
1974 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001975}
1976
1977static int sky2_change_mtu(struct net_device *dev, int new_mtu)
1978{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001979 struct sky2_port *sky2 = netdev_priv(dev);
1980 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07001981 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001982 int err;
1983 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001984 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001985
1986 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
1987 return -EINVAL;
1988
Stephen Hemminger05745c42007-09-19 15:36:45 -07001989 if (new_mtu > ETH_DATA_LEN &&
1990 (hw->chip_id == CHIP_ID_YUKON_FE ||
1991 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07001992 return -EINVAL;
1993
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001994 if (!netif_running(dev)) {
1995 dev->mtu = new_mtu;
1996 return 0;
1997 }
1998
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001999 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002000 sky2_write32(hw, B0_IMSK, 0);
2001
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002002 dev->trans_start = jiffies; /* prevent tx timeout */
2003 netif_stop_queue(dev);
2004 netif_poll_disable(hw->dev[0]);
2005
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002006 synchronize_irq(hw->pdev->irq);
2007
Stephen Hemmingere0c28112007-09-20 13:03:49 -07002008 if (sky2_read8(hw, B2_E_0) == 0)
Stephen Hemminger69161612007-06-04 17:23:26 -07002009 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002010
2011 ctl = gma_read16(hw, port, GM_GP_CTRL);
2012 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002013 sky2_rx_stop(sky2);
2014 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002015
2016 dev->mtu = new_mtu;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002017
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002018 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
2019 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002020
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002021 if (dev->mtu > ETH_DATA_LEN)
2022 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002023
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002024 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002025
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002026 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002027
2028 err = sky2_rx_start(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002029 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002030
Stephen Hemminger1b537562005-12-20 15:08:07 -08002031 if (err)
2032 dev_close(dev);
2033 else {
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002034 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002035
2036 netif_poll_enable(hw->dev[0]);
2037 netif_wake_queue(dev);
2038 }
2039
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002040 return err;
2041}
2042
Stephen Hemminger14d02632006-09-26 11:57:43 -07002043/* For small just reuse existing skb for next receive */
2044static struct sk_buff *receive_copy(struct sky2_port *sky2,
2045 const struct rx_ring_info *re,
2046 unsigned length)
2047{
2048 struct sk_buff *skb;
2049
2050 skb = netdev_alloc_skb(sky2->netdev, length + 2);
2051 if (likely(skb)) {
2052 skb_reserve(skb, 2);
2053 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2054 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002055 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002056 skb->ip_summed = re->skb->ip_summed;
2057 skb->csum = re->skb->csum;
2058 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2059 length, PCI_DMA_FROMDEVICE);
2060 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002061 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002062 }
2063 return skb;
2064}
2065
2066/* Adjust length of skb with fragments to match received data */
2067static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2068 unsigned int length)
2069{
2070 int i, num_frags;
2071 unsigned int size;
2072
2073 /* put header into skb */
2074 size = min(length, hdr_space);
2075 skb->tail += size;
2076 skb->len += size;
2077 length -= size;
2078
2079 num_frags = skb_shinfo(skb)->nr_frags;
2080 for (i = 0; i < num_frags; i++) {
2081 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2082
2083 if (length == 0) {
2084 /* don't need this page */
2085 __free_page(frag->page);
2086 --skb_shinfo(skb)->nr_frags;
2087 } else {
2088 size = min(length, (unsigned) PAGE_SIZE);
2089
2090 frag->size = size;
2091 skb->data_len += size;
2092 skb->truesize += size;
2093 skb->len += size;
2094 length -= size;
2095 }
2096 }
2097}
2098
2099/* Normal packet - take skb from ring element and put in a new one */
2100static struct sk_buff *receive_new(struct sky2_port *sky2,
2101 struct rx_ring_info *re,
2102 unsigned int length)
2103{
2104 struct sk_buff *skb, *nskb;
2105 unsigned hdr_space = sky2->rx_data_size;
2106
Stephen Hemminger14d02632006-09-26 11:57:43 -07002107 /* Don't be tricky about reusing pages (yet) */
2108 nskb = sky2_rx_alloc(sky2);
2109 if (unlikely(!nskb))
2110 return NULL;
2111
2112 skb = re->skb;
2113 sky2_rx_unmap_skb(sky2->hw->pdev, re);
2114
2115 prefetch(skb->data);
2116 re->skb = nskb;
2117 sky2_rx_map_skb(sky2->hw->pdev, re, hdr_space);
2118
2119 if (skb_shinfo(skb)->nr_frags)
2120 skb_put_frags(skb, hdr_space, length);
2121 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002122 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002123 return skb;
2124}
2125
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002126/*
2127 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002128 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002129 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002130static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002131 u16 length, u32 status)
2132{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002133 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002134 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002135 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002136 u16 count = (status & GMR_FS_LEN) >> 16;
2137
2138#ifdef SKY2_VLAN_TAG_USED
2139 /* Account for vlan tag */
2140 if (sky2->vlgrp && (status & GMR_FS_VLAN))
2141 count -= VLAN_HLEN;
2142#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002143
2144 if (unlikely(netif_msg_rx_status(sky2)))
2145 printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002146 dev->name, sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002147
Stephen Hemminger793b8832005-09-14 16:06:14 -07002148 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002149 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002150
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002151 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002152 goto error;
2153
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002154 if (!(status & GMR_FS_RX_OK))
2155 goto resubmit;
2156
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002157 /* if length reported by DMA does not match PHY, packet was truncated */
2158 if (length != count)
Stephen Hemminger71749532007-07-09 15:33:40 -07002159 goto len_mismatch;
2160
Stephen Hemminger14d02632006-09-26 11:57:43 -07002161 if (length < copybreak)
2162 skb = receive_copy(sky2, re, length);
2163 else
2164 skb = receive_new(sky2, re, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002165resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002166 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002167
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002168 return skb;
2169
Stephen Hemminger71749532007-07-09 15:33:40 -07002170len_mismatch:
2171 /* Truncation of overlength packets
2172 causes PHY length to not match MAC length */
2173 ++sky2->net_stats.rx_length_errors;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002174 if (netif_msg_rx_err(sky2) && net_ratelimit())
2175 pr_info(PFX "%s: rx length mismatch: length %d status %#x\n",
2176 dev->name, length, status);
2177 goto resubmit;
Stephen Hemminger71749532007-07-09 15:33:40 -07002178
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002179error:
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002180 ++sky2->net_stats.rx_errors;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002181 if (status & GMR_FS_RX_FF_OV) {
Stephen Hemmingera79abdc2007-02-15 16:40:34 -08002182 sky2->net_stats.rx_over_errors++;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002183 goto resubmit;
2184 }
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002185
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002186 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002187 printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002188 dev->name, status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002189
2190 if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002191 sky2->net_stats.rx_length_errors++;
2192 if (status & GMR_FS_FRAGMENT)
2193 sky2->net_stats.rx_frame_errors++;
2194 if (status & GMR_FS_CRC_ERR)
2195 sky2->net_stats.rx_crc_errors++;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002196
Stephen Hemminger793b8832005-09-14 16:06:14 -07002197 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002198}
2199
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002200/* Transmit complete */
2201static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002202{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002203 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002204
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002205 if (netif_running(dev)) {
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002206 netif_tx_lock(dev);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002207 sky2_tx_complete(sky2, last);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002208 netif_tx_unlock(dev);
shemminger@osdl.org22247952005-11-30 11:45:19 -08002209 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002210}
2211
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002212/* Process status response ring */
2213static int sky2_status_intr(struct sky2_hw *hw, int to_do)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002214{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002215 int work_done = 0;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002216 unsigned rx[2] = { 0, 0 };
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002217 u16 hwidx = sky2_read16(hw, STAT_PUT_IDX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002218
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002219 rmb();
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002220
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002221 while (hw->st_idx != hwidx) {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002222 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002223 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemminger69161612007-06-04 17:23:26 -07002224 unsigned port = le->css & CSS_LINK_BIT;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002225 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002226 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002227 u32 status;
2228 u16 length;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002229
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07002230 hw->st_idx = RING_NEXT(hw->st_idx, STATUS_RING_SIZE);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002231
Stephen Hemminger69161612007-06-04 17:23:26 -07002232 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002233 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002234 length = le16_to_cpu(le->length);
2235 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002236
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002237 switch (le->opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002238 case OP_RXSTAT:
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002239 ++rx[port];
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002240 skb = sky2_receive(dev, length, status);
Stephen Hemminger3225b912007-05-14 12:38:12 -07002241 if (unlikely(!skb)) {
2242 sky2->net_stats.rx_dropped++;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002243 break;
Stephen Hemminger3225b912007-05-14 12:38:12 -07002244 }
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002245
Stephen Hemminger69161612007-06-04 17:23:26 -07002246 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002247 if (hw->flags & SKY2_HW_NEW_LE) {
Stephen Hemminger69161612007-06-04 17:23:26 -07002248 if (sky2->rx_csum &&
2249 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2250 (le->css & CSS_TCPUDPCSOK))
2251 skb->ip_summed = CHECKSUM_UNNECESSARY;
2252 else
2253 skb->ip_summed = CHECKSUM_NONE;
2254 }
2255
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002256 skb->protocol = eth_type_trans(skb, dev);
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08002257 sky2->net_stats.rx_packets++;
2258 sky2->net_stats.rx_bytes += skb->len;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002259 dev->last_rx = jiffies;
2260
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002261#ifdef SKY2_VLAN_TAG_USED
2262 if (sky2->vlgrp && (status & GMR_FS_VLAN)) {
2263 vlan_hwaccel_receive_skb(skb,
2264 sky2->vlgrp,
2265 be16_to_cpu(sky2->rx_tag));
2266 } else
2267#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002268 netif_receive_skb(skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002269
Stephen Hemminger22e11702006-07-12 15:23:48 -07002270 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002271 if (++work_done >= to_do)
2272 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002273 break;
2274
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002275#ifdef SKY2_VLAN_TAG_USED
2276 case OP_RXVLAN:
2277 sky2->rx_tag = length;
2278 break;
2279
2280 case OP_RXCHKSVLAN:
2281 sky2->rx_tag = length;
2282 /* fall through */
2283#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002284 case OP_RXCHKS:
Stephen Hemminger87418302007-03-08 12:42:30 -08002285 if (!sky2->rx_csum)
2286 break;
2287
Stephen Hemminger05745c42007-09-19 15:36:45 -07002288 /* If this happens then driver assuming wrong format */
2289 if (unlikely(hw->flags & SKY2_HW_NEW_LE)) {
2290 if (net_ratelimit())
2291 printk(KERN_NOTICE "%s: unexpected"
2292 " checksum status\n",
2293 dev->name);
Stephen Hemminger69161612007-06-04 17:23:26 -07002294 break;
Stephen Hemminger05745c42007-09-19 15:36:45 -07002295 }
Stephen Hemminger69161612007-06-04 17:23:26 -07002296
Stephen Hemminger87418302007-03-08 12:42:30 -08002297 /* Both checksum counters are programmed to start at
2298 * the same offset, so unless there is a problem they
2299 * should match. This failure is an early indication that
2300 * hardware receive checksumming won't work.
2301 */
2302 if (likely(status >> 16 == (status & 0xffff))) {
2303 skb = sky2->rx_ring[sky2->rx_next].skb;
2304 skb->ip_summed = CHECKSUM_COMPLETE;
2305 skb->csum = status & 0xffff;
2306 } else {
2307 printk(KERN_NOTICE PFX "%s: hardware receive "
2308 "checksum problem (status = %#x)\n",
2309 dev->name, status);
2310 sky2->rx_csum = 0;
2311 sky2_write32(sky2->hw,
Stephen Hemminger69161612007-06-04 17:23:26 -07002312 Q_ADDR(rxqaddr[port], Q_CSR),
Stephen Hemminger87418302007-03-08 12:42:30 -08002313 BMU_DIS_RX_CHKSUM);
2314 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002315 break;
2316
2317 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002318 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002319 BUILD_BUG_ON(TX_RING_SIZE > 0x1000);
2320 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002321 if (hw->dev[1])
2322 sky2_tx_done(hw->dev[1],
2323 ((status >> 24) & 0xff)
2324 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002325 break;
2326
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002327 default:
2328 if (net_ratelimit())
Stephen Hemminger793b8832005-09-14 16:06:14 -07002329 printk(KERN_WARNING PFX
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002330 "unknown status opcode 0x%x\n", le->opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002331 }
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002332 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002333
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002334 /* Fully processed status ring so clear irq */
2335 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2336
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002337exit_loop:
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002338 if (rx[0])
2339 sky2_rx_update(netdev_priv(hw->dev[0]), Q_R1);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002340
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002341 if (rx[1])
2342 sky2_rx_update(netdev_priv(hw->dev[1]), Q_R2);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002343
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002344 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002345}
2346
2347static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2348{
2349 struct net_device *dev = hw->dev[port];
2350
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002351 if (net_ratelimit())
2352 printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
2353 dev->name, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002354
2355 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002356 if (net_ratelimit())
2357 printk(KERN_ERR PFX "%s: ram data read parity error\n",
2358 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002359 /* Clear IRQ */
2360 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2361 }
2362
2363 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002364 if (net_ratelimit())
2365 printk(KERN_ERR PFX "%s: ram data write parity error\n",
2366 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002367
2368 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2369 }
2370
2371 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002372 if (net_ratelimit())
2373 printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002374 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2375 }
2376
2377 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002378 if (net_ratelimit())
2379 printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002380 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2381 }
2382
2383 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002384 if (net_ratelimit())
2385 printk(KERN_ERR PFX "%s: TCP segmentation error\n",
2386 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002387 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2388 }
2389}
2390
2391static void sky2_hw_intr(struct sky2_hw *hw)
2392{
2393 u32 status = sky2_read32(hw, B0_HWE_ISRC);
2394
Stephen Hemminger793b8832005-09-14 16:06:14 -07002395 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002396 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002397
2398 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002399 u16 pci_err;
2400
Stephen Hemminger56a645c2006-02-22 11:45:02 -08002401 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002402 if (net_ratelimit())
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002403 dev_err(&hw->pdev->dev, "PCI hardware error (0x%x)\n",
2404 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002405
2406 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger56a645c2006-02-22 11:45:02 -08002407 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger91aeb3e2006-09-26 11:57:38 -07002408 pci_err | PCI_STATUS_ERROR_BITS);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002409 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2410 }
2411
2412 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002413 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002414 u32 pex_err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002415
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002416 pex_err = sky2_pci_read32(hw, PEX_UNC_ERR_STAT);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002417
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002418 if (net_ratelimit())
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002419 dev_err(&hw->pdev->dev, "PCI Express error (0x%x)\n",
2420 pex_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002421
2422 /* clear the interrupt */
2423 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002424 sky2_pci_write32(hw, PEX_UNC_ERR_STAT,
2425 0xffffffffUL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002426 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2427
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002428 if (pex_err & PEX_FATAL_ERRORS) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002429 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2430 hwmsk &= ~Y2_IS_PCI_EXP;
2431 sky2_write32(hw, B0_HWE_IMSK, hwmsk);
2432 }
2433 }
2434
2435 if (status & Y2_HWE_L1_MASK)
2436 sky2_hw_error(hw, 0, status);
2437 status >>= 8;
2438 if (status & Y2_HWE_L1_MASK)
2439 sky2_hw_error(hw, 1, status);
2440}
2441
2442static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2443{
2444 struct net_device *dev = hw->dev[port];
2445 struct sky2_port *sky2 = netdev_priv(dev);
2446 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2447
2448 if (netif_msg_intr(sky2))
2449 printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n",
2450 dev->name, status);
2451
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002452 if (status & GM_IS_RX_CO_OV)
2453 gma_read16(hw, port, GM_RX_IRQ_SRC);
2454
2455 if (status & GM_IS_TX_CO_OV)
2456 gma_read16(hw, port, GM_TX_IRQ_SRC);
2457
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002458 if (status & GM_IS_RX_FF_OR) {
2459 ++sky2->net_stats.rx_fifo_errors;
2460 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2461 }
2462
2463 if (status & GM_IS_TX_FF_UR) {
2464 ++sky2->net_stats.tx_fifo_errors;
2465 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2466 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002467}
2468
Stephen Hemminger40b01722007-04-11 14:47:59 -07002469/* This should never happen it is a bug. */
2470static void sky2_le_error(struct sky2_hw *hw, unsigned port,
2471 u16 q, unsigned ring_size)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002472{
2473 struct net_device *dev = hw->dev[port];
2474 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002475 unsigned idx;
2476 const u64 *le = (q == Q_R1 || q == Q_R2)
2477 ? (u64 *) sky2->rx_le : (u64 *) sky2->tx_le;
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002478
Stephen Hemminger40b01722007-04-11 14:47:59 -07002479 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
2480 printk(KERN_ERR PFX "%s: descriptor error q=%#x get=%u [%llx] put=%u\n",
2481 dev->name, (unsigned) q, idx, (unsigned long long) le[idx],
2482 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002483
Stephen Hemminger40b01722007-04-11 14:47:59 -07002484 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002485}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002486
Stephen Hemminger75e80682007-09-19 15:36:46 -07002487static int sky2_rx_hung(struct net_device *dev)
2488{
2489 struct sky2_port *sky2 = netdev_priv(dev);
2490 struct sky2_hw *hw = sky2->hw;
2491 unsigned port = sky2->port;
2492 unsigned rxq = rxqaddr[port];
2493 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2494 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2495 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2496 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2497
2498 /* If idle and MAC or PCI is stuck */
2499 if (sky2->check.last == dev->last_rx &&
2500 ((mac_rp == sky2->check.mac_rp &&
2501 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2502 /* Check if the PCI RX hang */
2503 (fifo_rp == sky2->check.fifo_rp &&
2504 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
2505 printk(KERN_DEBUG PFX "%s: hung mac %d:%d fifo %d (%d:%d)\n",
2506 dev->name, mac_lev, mac_rp, fifo_lev, fifo_rp,
2507 sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
2508 return 1;
2509 } else {
2510 sky2->check.last = dev->last_rx;
2511 sky2->check.mac_rp = mac_rp;
2512 sky2->check.mac_lev = mac_lev;
2513 sky2->check.fifo_rp = fifo_rp;
2514 sky2->check.fifo_lev = fifo_lev;
2515 return 0;
2516 }
2517}
2518
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002519static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002520{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002521 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemminger75e80682007-09-19 15:36:46 -07002522 struct net_device *dev;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002523
Stephen Hemminger75e80682007-09-19 15:36:46 -07002524 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002525 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemminger75e80682007-09-19 15:36:46 -07002526 dev = hw->dev[0];
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002527 if (__netif_rx_schedule_prep(dev))
2528 __netif_rx_schedule(dev);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002529 } else {
2530 int i, active = 0;
2531
2532 for (i = 0; i < hw->ports; i++) {
2533 dev = hw->dev[i];
2534 if (!netif_running(dev))
2535 continue;
2536 ++active;
2537
2538 /* For chips with Rx FIFO, check if stuck */
Stephen Hemmingere0c28112007-09-20 13:03:49 -07002539 if ((hw->flags & SKY2_HW_FIFO_HANG_CHECK) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002540 sky2_rx_hung(dev)) {
2541 pr_info(PFX "%s: receiver hang detected\n",
2542 dev->name);
2543 schedule_work(&hw->restart_work);
2544 return;
2545 }
2546 }
2547
2548 if (active == 0)
2549 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002550 }
2551
Stephen Hemminger75e80682007-09-19 15:36:46 -07002552 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002553}
2554
Stephen Hemminger40b01722007-04-11 14:47:59 -07002555/* Hardware/software error handling */
2556static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002557{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002558 if (net_ratelimit())
2559 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002560
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002561 if (status & Y2_IS_HW_ERR)
2562 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002563
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002564 if (status & Y2_IS_IRQ_MAC1)
2565 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002566
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002567 if (status & Y2_IS_IRQ_MAC2)
2568 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002569
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002570 if (status & Y2_IS_CHK_RX1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002571 sky2_le_error(hw, 0, Q_R1, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002572
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002573 if (status & Y2_IS_CHK_RX2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002574 sky2_le_error(hw, 1, Q_R2, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002575
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002576 if (status & Y2_IS_CHK_TXA1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002577 sky2_le_error(hw, 0, Q_XA1, TX_RING_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002578
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002579 if (status & Y2_IS_CHK_TXA2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002580 sky2_le_error(hw, 1, Q_XA2, TX_RING_SIZE);
2581}
2582
2583static int sky2_poll(struct net_device *dev0, int *budget)
2584{
2585 struct sky2_hw *hw = ((struct sky2_port *) netdev_priv(dev0))->hw;
Stephen Hemminger5c11ce72007-07-09 15:33:36 -07002586 int work_done;
Stephen Hemminger40b01722007-04-11 14:47:59 -07002587 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
2588
2589 if (unlikely(status & Y2_IS_ERROR))
2590 sky2_err_intr(hw, status);
2591
2592 if (status & Y2_IS_IRQ_PHY1)
2593 sky2_phy_intr(hw, 0);
2594
2595 if (status & Y2_IS_IRQ_PHY2)
2596 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002597
Stephen Hemminger5c11ce72007-07-09 15:33:36 -07002598 work_done = sky2_status_intr(hw, min(dev0->quota, *budget));
2599 *budget -= work_done;
2600 dev0->quota -= work_done;
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002601
Stephen Hemminger5c11ce72007-07-09 15:33:36 -07002602 /* More work? */
2603 if (hw->st_idx != sky2_read16(hw, STAT_PUT_IDX))
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002604 return 1;
Stephen Hemminger5c11ce72007-07-09 15:33:36 -07002605
2606 /* Bug/Errata workaround?
2607 * Need to kick the TX irq moderation timer.
2608 */
2609 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_START) {
2610 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
2611 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002612 }
Stephen Hemminger5c11ce72007-07-09 15:33:36 -07002613 netif_rx_complete(dev0);
2614
2615 sky2_read32(hw, B0_Y2_SP_LISR);
2616 return 0;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002617}
2618
David Howells7d12e782006-10-05 14:55:46 +01002619static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002620{
2621 struct sky2_hw *hw = dev_id;
2622 struct net_device *dev0 = hw->dev[0];
2623 u32 status;
2624
2625 /* Reading this mask interrupts as side effect */
2626 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
2627 if (status == 0 || status == ~0)
2628 return IRQ_NONE;
2629
2630 prefetch(&hw->st_le[hw->st_idx]);
2631 if (likely(__netif_rx_schedule_prep(dev0)))
2632 __netif_rx_schedule(dev0);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002633
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002634 return IRQ_HANDLED;
2635}
2636
2637#ifdef CONFIG_NET_POLL_CONTROLLER
2638static void sky2_netpoll(struct net_device *dev)
2639{
2640 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger88d11362006-06-16 12:10:46 -07002641 struct net_device *dev0 = sky2->hw->dev[0];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002642
Stephen Hemminger88d11362006-06-16 12:10:46 -07002643 if (netif_running(dev) && __netif_rx_schedule_prep(dev0))
2644 __netif_rx_schedule(dev0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002645}
2646#endif
2647
2648/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002649static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002650{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002651 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002652 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08002653 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -08002654 case CHIP_ID_YUKON_EX:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002655 return 125;
2656
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002657 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002658 return 100;
2659
2660 case CHIP_ID_YUKON_FE_P:
2661 return 50;
2662
2663 case CHIP_ID_YUKON_XL:
2664 return 156;
2665
2666 default:
2667 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002668 }
2669}
2670
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002671static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2672{
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002673 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002674}
2675
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002676static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2677{
2678 return clk / sky2_mhz(hw);
2679}
2680
2681
Stephen Hemmingere3173832007-02-06 10:45:39 -08002682static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002683{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002684 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002685
Stephen Hemminger451af332007-06-04 17:23:24 -07002686 /* Enable all clocks */
2687 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
2688
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002689 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08002690
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002691 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002692 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
2693
2694 switch(hw->chip_id) {
2695 case CHIP_ID_YUKON_XL:
2696 hw->flags = SKY2_HW_GIGABIT
Stephen Hemmingere0c28112007-09-20 13:03:49 -07002697 | SKY2_HW_NEWER_PHY;
2698 if (hw->chip_rev < 3)
2699 hw->flags |= SKY2_HW_FIFO_HANG_CHECK;
2700
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002701 break;
2702
2703 case CHIP_ID_YUKON_EC_U:
2704 hw->flags = SKY2_HW_GIGABIT
2705 | SKY2_HW_NEWER_PHY
2706 | SKY2_HW_ADV_POWER_CTL;
2707 break;
2708
2709 case CHIP_ID_YUKON_EX:
2710 hw->flags = SKY2_HW_GIGABIT
2711 | SKY2_HW_NEWER_PHY
2712 | SKY2_HW_NEW_LE
2713 | SKY2_HW_ADV_POWER_CTL;
2714
2715 /* New transmit checksum */
2716 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
2717 hw->flags |= SKY2_HW_AUTO_TX_SUM;
2718 break;
2719
2720 case CHIP_ID_YUKON_EC:
2721 /* This rev is really old, and requires untested workarounds */
2722 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
2723 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
2724 return -EOPNOTSUPP;
2725 }
Stephen Hemmingere0c28112007-09-20 13:03:49 -07002726 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_FIFO_HANG_CHECK;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002727 break;
2728
2729 case CHIP_ID_YUKON_FE:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002730 break;
2731
Stephen Hemminger05745c42007-09-19 15:36:45 -07002732 case CHIP_ID_YUKON_FE_P:
2733 hw->flags = SKY2_HW_NEWER_PHY
2734 | SKY2_HW_NEW_LE
2735 | SKY2_HW_AUTO_TX_SUM
2736 | SKY2_HW_ADV_POWER_CTL;
2737 break;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002738 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002739 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
2740 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002741 return -EOPNOTSUPP;
2742 }
2743
Stephen Hemmingere3173832007-02-06 10:45:39 -08002744 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002745 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
2746 hw->flags |= SKY2_HW_FIBRE_PHY;
2747
2748
Stephen Hemmingere3173832007-02-06 10:45:39 -08002749 hw->ports = 1;
2750 t8 = sky2_read8(hw, B2_Y2_HW_RES);
2751 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
2752 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
2753 ++hw->ports;
2754 }
2755
2756 return 0;
2757}
2758
2759static void sky2_reset(struct sky2_hw *hw)
2760{
2761 u16 status;
2762 int i;
2763
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002764 /* disable ASF */
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07002765 if (hw->chip_id == CHIP_ID_YUKON_EX) {
2766 status = sky2_read16(hw, HCU_CCSR);
2767 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
2768 HCU_CCSR_UC_STATE_MSK);
2769 sky2_write16(hw, HCU_CCSR, status);
2770 } else
2771 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
2772 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002773
2774 /* do a SW reset */
2775 sky2_write8(hw, B0_CTST, CS_RST_SET);
2776 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2777
2778 /* clear PCI errors, if any */
Stephen Hemminger56a645c2006-02-22 11:45:02 -08002779 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger2d42d212006-01-30 11:37:55 -08002780
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002781 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger56a645c2006-02-22 11:45:02 -08002782 sky2_pci_write16(hw, PCI_STATUS, status | PCI_STATUS_ERROR_BITS);
2783
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002784
2785 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2786
2787 /* clear any PEX errors */
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002788 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
2789 sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL);
2790
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002791
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08002792 sky2_power_on(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002793
2794 for (i = 0; i < hw->ports; i++) {
2795 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
2796 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07002797
2798 if (hw->chip_id == CHIP_ID_YUKON_EX)
2799 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
2800 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
2801 | GMC_BYP_RETR_ON);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002802 }
2803
2804 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2805
Stephen Hemminger793b8832005-09-14 16:06:14 -07002806 /* Clear I2C IRQ noise */
2807 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002808
2809 /* turn off hardware timer (unused) */
2810 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
2811 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002812
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002813 sky2_write8(hw, B0_Y2LED, LED_STAT_ON);
2814
Stephen Hemminger69634ee2005-12-09 11:35:06 -08002815 /* Turn off descriptor polling */
2816 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002817
2818 /* Turn off receive timestamp */
2819 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002820 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002821
2822 /* enable the Tx Arbiters */
2823 for (i = 0; i < hw->ports; i++)
2824 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
2825
2826 /* Initialize ram interface */
2827 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002828 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002829
2830 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
2831 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
2832 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
2833 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
2834 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
2835 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
2836 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
2837 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
2838 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
2839 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
2840 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
2841 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
2842 }
2843
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002844 sky2_write32(hw, B0_HWE_IMSK, Y2_HWE_ALL_MASK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002845
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002846 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07002847 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002848
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002849 memset(hw->st_le, 0, STATUS_LE_BYTES);
2850 hw->st_idx = 0;
2851
2852 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
2853 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
2854
2855 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002856 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002857
2858 /* Set the list last index */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002859 sky2_write16(hw, STAT_LAST_IDX, STATUS_RING_SIZE - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002860
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002861 sky2_write16(hw, STAT_TX_IDX_TH, 10);
2862 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002863
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002864 /* set Status-FIFO ISR watermark */
2865 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
2866 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
2867 else
2868 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002869
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002870 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08002871 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
2872 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002873
Stephen Hemminger793b8832005-09-14 16:06:14 -07002874 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002875 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
2876
2877 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
2878 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
2879 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08002880}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002881
Stephen Hemminger81906792007-02-15 16:40:33 -08002882static void sky2_restart(struct work_struct *work)
2883{
2884 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
2885 struct net_device *dev;
2886 int i, err;
2887
Stephen Hemminger81906792007-02-15 16:40:33 -08002888 rtnl_lock();
2889 sky2_write32(hw, B0_IMSK, 0);
2890 sky2_read32(hw, B0_IMSK);
2891
2892 netif_poll_disable(hw->dev[0]);
2893
2894 for (i = 0; i < hw->ports; i++) {
2895 dev = hw->dev[i];
2896 if (netif_running(dev))
2897 sky2_down(dev);
2898 }
2899
2900 sky2_reset(hw);
2901 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
2902 netif_poll_enable(hw->dev[0]);
2903
2904 for (i = 0; i < hw->ports; i++) {
2905 dev = hw->dev[i];
2906 if (netif_running(dev)) {
2907 err = sky2_up(dev);
2908 if (err) {
2909 printk(KERN_INFO PFX "%s: could not restart %d\n",
2910 dev->name, err);
2911 dev_close(dev);
2912 }
2913 }
2914 }
2915
Stephen Hemminger81906792007-02-15 16:40:33 -08002916 rtnl_unlock();
2917}
2918
Stephen Hemmingere3173832007-02-06 10:45:39 -08002919static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
2920{
2921 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
2922}
2923
2924static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2925{
2926 const struct sky2_port *sky2 = netdev_priv(dev);
2927
2928 wol->supported = sky2_wol_supported(sky2->hw);
2929 wol->wolopts = sky2->wol;
2930}
2931
2932static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2933{
2934 struct sky2_port *sky2 = netdev_priv(dev);
2935 struct sky2_hw *hw = sky2->hw;
2936
2937 if (wol->wolopts & ~sky2_wol_supported(sky2->hw))
2938 return -EOPNOTSUPP;
2939
2940 sky2->wol = wol->wolopts;
2941
Stephen Hemminger05745c42007-09-19 15:36:45 -07002942 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
2943 hw->chip_id == CHIP_ID_YUKON_EX ||
2944 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemmingere3173832007-02-06 10:45:39 -08002945 sky2_write32(hw, B0_CTST, sky2->wol
2946 ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
2947
2948 if (!netif_running(dev))
2949 sky2_wol_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002950 return 0;
2951}
2952
Stephen Hemminger28bd1812006-01-17 13:43:19 -08002953static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002954{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002955 if (sky2_is_copper(hw)) {
2956 u32 modes = SUPPORTED_10baseT_Half
2957 | SUPPORTED_10baseT_Full
2958 | SUPPORTED_100baseT_Half
2959 | SUPPORTED_100baseT_Full
2960 | SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002961
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002962 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002963 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002964 | SUPPORTED_1000baseT_Full;
2965 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002966 } else
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002967 return SUPPORTED_1000baseT_Half
2968 | SUPPORTED_1000baseT_Full
2969 | SUPPORTED_Autoneg
2970 | SUPPORTED_FIBRE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002971}
2972
Stephen Hemminger793b8832005-09-14 16:06:14 -07002973static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002974{
2975 struct sky2_port *sky2 = netdev_priv(dev);
2976 struct sky2_hw *hw = sky2->hw;
2977
2978 ecmd->transceiver = XCVR_INTERNAL;
2979 ecmd->supported = sky2_supported_modes(hw);
2980 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002981 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002982 ecmd->port = PORT_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002983 ecmd->speed = sky2->speed;
2984 } else {
2985 ecmd->speed = SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002986 ecmd->port = PORT_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002987 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002988
2989 ecmd->advertising = sky2->advertising;
2990 ecmd->autoneg = sky2->autoneg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002991 ecmd->duplex = sky2->duplex;
2992 return 0;
2993}
2994
2995static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2996{
2997 struct sky2_port *sky2 = netdev_priv(dev);
2998 const struct sky2_hw *hw = sky2->hw;
2999 u32 supported = sky2_supported_modes(hw);
3000
3001 if (ecmd->autoneg == AUTONEG_ENABLE) {
3002 ecmd->advertising = supported;
3003 sky2->duplex = -1;
3004 sky2->speed = -1;
3005 } else {
3006 u32 setting;
3007
Stephen Hemminger793b8832005-09-14 16:06:14 -07003008 switch (ecmd->speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003009 case SPEED_1000:
3010 if (ecmd->duplex == DUPLEX_FULL)
3011 setting = SUPPORTED_1000baseT_Full;
3012 else if (ecmd->duplex == DUPLEX_HALF)
3013 setting = SUPPORTED_1000baseT_Half;
3014 else
3015 return -EINVAL;
3016 break;
3017 case SPEED_100:
3018 if (ecmd->duplex == DUPLEX_FULL)
3019 setting = SUPPORTED_100baseT_Full;
3020 else if (ecmd->duplex == DUPLEX_HALF)
3021 setting = SUPPORTED_100baseT_Half;
3022 else
3023 return -EINVAL;
3024 break;
3025
3026 case SPEED_10:
3027 if (ecmd->duplex == DUPLEX_FULL)
3028 setting = SUPPORTED_10baseT_Full;
3029 else if (ecmd->duplex == DUPLEX_HALF)
3030 setting = SUPPORTED_10baseT_Half;
3031 else
3032 return -EINVAL;
3033 break;
3034 default:
3035 return -EINVAL;
3036 }
3037
3038 if ((setting & supported) == 0)
3039 return -EINVAL;
3040
3041 sky2->speed = ecmd->speed;
3042 sky2->duplex = ecmd->duplex;
3043 }
3044
3045 sky2->autoneg = ecmd->autoneg;
3046 sky2->advertising = ecmd->advertising;
3047
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003048 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003049 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003050 sky2_set_multicast(dev);
3051 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003052
3053 return 0;
3054}
3055
3056static void sky2_get_drvinfo(struct net_device *dev,
3057 struct ethtool_drvinfo *info)
3058{
3059 struct sky2_port *sky2 = netdev_priv(dev);
3060
3061 strcpy(info->driver, DRV_NAME);
3062 strcpy(info->version, DRV_VERSION);
3063 strcpy(info->fw_version, "N/A");
3064 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3065}
3066
3067static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003068 char name[ETH_GSTRING_LEN];
3069 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003070} sky2_stats[] = {
3071 { "tx_bytes", GM_TXO_OK_HI },
3072 { "rx_bytes", GM_RXO_OK_HI },
3073 { "tx_broadcast", GM_TXF_BC_OK },
3074 { "rx_broadcast", GM_RXF_BC_OK },
3075 { "tx_multicast", GM_TXF_MC_OK },
3076 { "rx_multicast", GM_RXF_MC_OK },
3077 { "tx_unicast", GM_TXF_UC_OK },
3078 { "rx_unicast", GM_RXF_UC_OK },
3079 { "tx_mac_pause", GM_TXF_MPAUSE },
3080 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003081 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003082 { "late_collision",GM_TXF_LAT_COL },
3083 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003084 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003085 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003086
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003087 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003088 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003089 { "rx_64_byte_packets", GM_RXF_64B },
3090 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3091 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3092 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3093 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3094 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3095 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003096 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003097 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3098 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003099 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003100
3101 { "tx_64_byte_packets", GM_TXF_64B },
3102 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3103 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3104 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3105 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3106 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3107 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3108 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003109};
3110
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003111static u32 sky2_get_rx_csum(struct net_device *dev)
3112{
3113 struct sky2_port *sky2 = netdev_priv(dev);
3114
3115 return sky2->rx_csum;
3116}
3117
3118static int sky2_set_rx_csum(struct net_device *dev, u32 data)
3119{
3120 struct sky2_port *sky2 = netdev_priv(dev);
3121
3122 sky2->rx_csum = data;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003123
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003124 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
3125 data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
3126
3127 return 0;
3128}
3129
3130static u32 sky2_get_msglevel(struct net_device *netdev)
3131{
3132 struct sky2_port *sky2 = netdev_priv(netdev);
3133 return sky2->msg_enable;
3134}
3135
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003136static int sky2_nway_reset(struct net_device *dev)
3137{
3138 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003139
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003140 if (!netif_running(dev) || sky2->autoneg != AUTONEG_ENABLE)
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003141 return -EINVAL;
3142
Stephen Hemminger1b537562005-12-20 15:08:07 -08003143 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003144 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003145
3146 return 0;
3147}
3148
Stephen Hemminger793b8832005-09-14 16:06:14 -07003149static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003150{
3151 struct sky2_hw *hw = sky2->hw;
3152 unsigned port = sky2->port;
3153 int i;
3154
3155 data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003156 | (u64) gma_read32(hw, port, GM_TXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003157 data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003158 | (u64) gma_read32(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003159
Stephen Hemminger793b8832005-09-14 16:06:14 -07003160 for (i = 2; i < count; i++)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003161 data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset);
3162}
3163
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003164static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3165{
3166 struct sky2_port *sky2 = netdev_priv(netdev);
3167 sky2->msg_enable = value;
3168}
3169
3170static int sky2_get_stats_count(struct net_device *dev)
3171{
3172 return ARRAY_SIZE(sky2_stats);
3173}
3174
3175static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003176 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003177{
3178 struct sky2_port *sky2 = netdev_priv(dev);
3179
Stephen Hemminger793b8832005-09-14 16:06:14 -07003180 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003181}
3182
Stephen Hemminger793b8832005-09-14 16:06:14 -07003183static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003184{
3185 int i;
3186
3187 switch (stringset) {
3188 case ETH_SS_STATS:
3189 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3190 memcpy(data + i * ETH_GSTRING_LEN,
3191 sky2_stats[i].name, ETH_GSTRING_LEN);
3192 break;
3193 }
3194}
3195
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003196static struct net_device_stats *sky2_get_stats(struct net_device *dev)
3197{
3198 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003199 return &sky2->net_stats;
3200}
3201
3202static int sky2_set_mac_address(struct net_device *dev, void *p)
3203{
3204 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003205 struct sky2_hw *hw = sky2->hw;
3206 unsigned port = sky2->port;
3207 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003208
3209 if (!is_valid_ether_addr(addr->sa_data))
3210 return -EADDRNOTAVAIL;
3211
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003212 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003213 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003214 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003215 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003216 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003217
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003218 /* virtual address for data */
3219 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3220
3221 /* physical address: used for pause frames */
3222 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003223
3224 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003225}
3226
Stephen Hemmingera052b522006-10-17 10:24:23 -07003227static void inline sky2_add_filter(u8 filter[8], const u8 *addr)
3228{
3229 u32 bit;
3230
3231 bit = ether_crc(ETH_ALEN, addr) & 63;
3232 filter[bit >> 3] |= 1 << (bit & 7);
3233}
3234
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003235static void sky2_set_multicast(struct net_device *dev)
3236{
3237 struct sky2_port *sky2 = netdev_priv(dev);
3238 struct sky2_hw *hw = sky2->hw;
3239 unsigned port = sky2->port;
3240 struct dev_mc_list *list = dev->mc_list;
3241 u16 reg;
3242 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003243 int rx_pause;
3244 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003245
Stephen Hemmingera052b522006-10-17 10:24:23 -07003246 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003247 memset(filter, 0, sizeof(filter));
3248
3249 reg = gma_read16(hw, port, GM_RX_CTRL);
3250 reg |= GM_RXCR_UCF_ENA;
3251
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003252 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003253 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003254 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003255 memset(filter, 0xff, sizeof(filter));
Stephen Hemmingera052b522006-10-17 10:24:23 -07003256 else if (dev->mc_count == 0 && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003257 reg &= ~GM_RXCR_MCF_ENA;
3258 else {
3259 int i;
3260 reg |= GM_RXCR_MCF_ENA;
3261
Stephen Hemmingera052b522006-10-17 10:24:23 -07003262 if (rx_pause)
3263 sky2_add_filter(filter, pause_mc_addr);
3264
3265 for (i = 0; list && i < dev->mc_count; i++, list = list->next)
3266 sky2_add_filter(filter, list->dmi_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003267 }
3268
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003269 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003270 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003271 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003272 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003273 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003274 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003275 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003276 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003277
3278 gma_write16(hw, port, GM_RX_CTRL, reg);
3279}
3280
3281/* Can have one global because blinking is controlled by
3282 * ethtool and that is always under RTNL mutex
3283 */
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003284static void sky2_led(struct sky2_hw *hw, unsigned port, int on)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003285{
Stephen Hemminger793b8832005-09-14 16:06:14 -07003286 u16 pg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003287
Stephen Hemminger793b8832005-09-14 16:06:14 -07003288 switch (hw->chip_id) {
3289 case CHIP_ID_YUKON_XL:
3290 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3291 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
3292 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3293 on ? (PHY_M_LEDC_LOS_CTRL(1) |
3294 PHY_M_LEDC_INIT_CTRL(7) |
3295 PHY_M_LEDC_STA1_CTRL(7) |
3296 PHY_M_LEDC_STA0_CTRL(7))
3297 : 0);
3298
3299 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
3300 break;
3301
3302 default:
3303 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0);
Stephen Hemminger0efdf262006-12-05 12:03:41 -08003304 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
3305 on ? PHY_M_LED_ALL : 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003306 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003307}
3308
3309/* blink LED's for finding board */
3310static int sky2_phys_id(struct net_device *dev, u32 data)
3311{
3312 struct sky2_port *sky2 = netdev_priv(dev);
3313 struct sky2_hw *hw = sky2->hw;
3314 unsigned port = sky2->port;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003315 u16 ledctrl, ledover = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003316 long ms;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003317 int interrupted;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003318 int onoff = 1;
3319
Stephen Hemminger793b8832005-09-14 16:06:14 -07003320 if (!data || data > (u32) (MAX_SCHEDULE_TIMEOUT / HZ))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003321 ms = jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT);
3322 else
3323 ms = data * 1000;
3324
3325 /* save initial values */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003326 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003327 if (hw->chip_id == CHIP_ID_YUKON_XL) {
3328 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3329 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
3330 ledctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
3331 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
3332 } else {
3333 ledctrl = gm_phy_read(hw, port, PHY_MARV_LED_CTRL);
3334 ledover = gm_phy_read(hw, port, PHY_MARV_LED_OVER);
3335 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003336
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003337 interrupted = 0;
3338 while (!interrupted && ms > 0) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003339 sky2_led(hw, port, onoff);
3340 onoff = !onoff;
3341
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003342 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003343 interrupted = msleep_interruptible(250);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003344 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003345
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003346 ms -= 250;
3347 }
3348
3349 /* resume regularly scheduled programming */
Stephen Hemminger793b8832005-09-14 16:06:14 -07003350 if (hw->chip_id == CHIP_ID_YUKON_XL) {
3351 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3352 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
3353 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ledctrl);
3354 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
3355 } else {
3356 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
3357 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
3358 }
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003359 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003360
3361 return 0;
3362}
3363
3364static void sky2_get_pauseparam(struct net_device *dev,
3365 struct ethtool_pauseparam *ecmd)
3366{
3367 struct sky2_port *sky2 = netdev_priv(dev);
3368
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003369 switch (sky2->flow_mode) {
3370 case FC_NONE:
3371 ecmd->tx_pause = ecmd->rx_pause = 0;
3372 break;
3373 case FC_TX:
3374 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3375 break;
3376 case FC_RX:
3377 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3378 break;
3379 case FC_BOTH:
3380 ecmd->tx_pause = ecmd->rx_pause = 1;
3381 }
3382
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003383 ecmd->autoneg = sky2->autoneg;
3384}
3385
3386static int sky2_set_pauseparam(struct net_device *dev,
3387 struct ethtool_pauseparam *ecmd)
3388{
3389 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003390
3391 sky2->autoneg = ecmd->autoneg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003392 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003393
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003394 if (netif_running(dev))
3395 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003396
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003397 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003398}
3399
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003400static int sky2_get_coalesce(struct net_device *dev,
3401 struct ethtool_coalesce *ecmd)
3402{
3403 struct sky2_port *sky2 = netdev_priv(dev);
3404 struct sky2_hw *hw = sky2->hw;
3405
3406 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3407 ecmd->tx_coalesce_usecs = 0;
3408 else {
3409 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3410 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3411 }
3412 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3413
3414 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3415 ecmd->rx_coalesce_usecs = 0;
3416 else {
3417 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3418 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3419 }
3420 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3421
3422 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3423 ecmd->rx_coalesce_usecs_irq = 0;
3424 else {
3425 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3426 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3427 }
3428
3429 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
3430
3431 return 0;
3432}
3433
3434/* Note: this affect both ports */
3435static int sky2_set_coalesce(struct net_device *dev,
3436 struct ethtool_coalesce *ecmd)
3437{
3438 struct sky2_port *sky2 = netdev_priv(dev);
3439 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003440 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003441
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003442 if (ecmd->tx_coalesce_usecs > tmax ||
3443 ecmd->rx_coalesce_usecs > tmax ||
3444 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003445 return -EINVAL;
3446
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003447 if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003448 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003449 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003450 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003451 if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003452 return -EINVAL;
3453
3454 if (ecmd->tx_coalesce_usecs == 0)
3455 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
3456 else {
3457 sky2_write32(hw, STAT_TX_TIMER_INI,
3458 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
3459 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3460 }
3461 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
3462
3463 if (ecmd->rx_coalesce_usecs == 0)
3464 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
3465 else {
3466 sky2_write32(hw, STAT_LEV_TIMER_INI,
3467 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
3468 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3469 }
3470 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
3471
3472 if (ecmd->rx_coalesce_usecs_irq == 0)
3473 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
3474 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08003475 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003476 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
3477 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
3478 }
3479 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
3480 return 0;
3481}
3482
Stephen Hemminger793b8832005-09-14 16:06:14 -07003483static void sky2_get_ringparam(struct net_device *dev,
3484 struct ethtool_ringparam *ering)
3485{
3486 struct sky2_port *sky2 = netdev_priv(dev);
3487
3488 ering->rx_max_pending = RX_MAX_PENDING;
3489 ering->rx_mini_max_pending = 0;
3490 ering->rx_jumbo_max_pending = 0;
3491 ering->tx_max_pending = TX_RING_SIZE - 1;
3492
3493 ering->rx_pending = sky2->rx_pending;
3494 ering->rx_mini_pending = 0;
3495 ering->rx_jumbo_pending = 0;
3496 ering->tx_pending = sky2->tx_pending;
3497}
3498
3499static int sky2_set_ringparam(struct net_device *dev,
3500 struct ethtool_ringparam *ering)
3501{
3502 struct sky2_port *sky2 = netdev_priv(dev);
3503 int err = 0;
3504
3505 if (ering->rx_pending > RX_MAX_PENDING ||
3506 ering->rx_pending < 8 ||
3507 ering->tx_pending < MAX_SKB_TX_LE ||
3508 ering->tx_pending > TX_RING_SIZE - 1)
3509 return -EINVAL;
3510
3511 if (netif_running(dev))
3512 sky2_down(dev);
3513
3514 sky2->rx_pending = ering->rx_pending;
3515 sky2->tx_pending = ering->tx_pending;
3516
Stephen Hemminger1b537562005-12-20 15:08:07 -08003517 if (netif_running(dev)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003518 err = sky2_up(dev);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003519 if (err)
3520 dev_close(dev);
Stephen Hemminger6ed995b2005-12-20 15:08:08 -08003521 else
3522 sky2_set_multicast(dev);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003523 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003524
3525 return err;
3526}
3527
Stephen Hemminger793b8832005-09-14 16:06:14 -07003528static int sky2_get_regs_len(struct net_device *dev)
3529{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003530 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003531}
3532
3533/*
3534 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003535 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07003536 */
3537static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
3538 void *p)
3539{
3540 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003541 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003542
3543 regs->version = 1;
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003544 memset(p, 0, regs->len);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003545
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003546 memcpy_fromio(p, io, B3_RAM_ADDR);
3547
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003548 /* skip diagnostic ram region */
3549 memcpy_fromio(p + B3_RI_WTO_R1, io + B3_RI_WTO_R1, 0x2000 - B3_RI_WTO_R1);
3550
3551 /* copy GMAC registers */
3552 memcpy_fromio(p + BASE_GMAC_1, io + BASE_GMAC_1, 0x1000);
3553 if (sky2->hw->ports > 1)
3554 memcpy_fromio(p + BASE_GMAC_2, io + BASE_GMAC_2, 0x1000);
3555
Stephen Hemminger793b8832005-09-14 16:06:14 -07003556}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003557
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003558/* In order to do Jumbo packets on these chips, need to turn off the
3559 * transmit store/forward. Therefore checksum offload won't work.
3560 */
3561static int no_tx_offload(struct net_device *dev)
3562{
3563 const struct sky2_port *sky2 = netdev_priv(dev);
3564 const struct sky2_hw *hw = sky2->hw;
3565
Stephen Hemminger69161612007-06-04 17:23:26 -07003566 return dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003567}
3568
3569static int sky2_set_tx_csum(struct net_device *dev, u32 data)
3570{
3571 if (data && no_tx_offload(dev))
3572 return -EINVAL;
3573
3574 return ethtool_op_set_tx_csum(dev, data);
3575}
3576
3577
3578static int sky2_set_tso(struct net_device *dev, u32 data)
3579{
3580 if (data && no_tx_offload(dev))
3581 return -EINVAL;
3582
3583 return ethtool_op_set_tso(dev, data);
3584}
3585
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003586static int sky2_get_eeprom_len(struct net_device *dev)
3587{
3588 struct sky2_port *sky2 = netdev_priv(dev);
3589 u16 reg2;
3590
3591 reg2 = sky2_pci_read32(sky2->hw, PCI_DEV_REG2);
3592 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
3593}
3594
3595static u32 sky2_vpd_read(struct sky2_hw *hw, int cap, u16 offset)
3596{
3597 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
3598
3599 while (!(sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F))
3600 cpu_relax();
3601 return sky2_pci_read32(hw, cap + PCI_VPD_DATA);
3602}
3603
3604static void sky2_vpd_write(struct sky2_hw *hw, int cap, u16 offset, u32 val)
3605{
3606 sky2_pci_write32(hw, cap + PCI_VPD_DATA, val);
3607 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
3608 do {
3609 cpu_relax();
3610 } while (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F);
3611}
3612
3613static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3614 u8 *data)
3615{
3616 struct sky2_port *sky2 = netdev_priv(dev);
3617 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
3618 int length = eeprom->len;
3619 u16 offset = eeprom->offset;
3620
3621 if (!cap)
3622 return -EINVAL;
3623
3624 eeprom->magic = SKY2_EEPROM_MAGIC;
3625
3626 while (length > 0) {
3627 u32 val = sky2_vpd_read(sky2->hw, cap, offset);
3628 int n = min_t(int, length, sizeof(val));
3629
3630 memcpy(data, &val, n);
3631 length -= n;
3632 data += n;
3633 offset += n;
3634 }
3635 return 0;
3636}
3637
3638static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3639 u8 *data)
3640{
3641 struct sky2_port *sky2 = netdev_priv(dev);
3642 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
3643 int length = eeprom->len;
3644 u16 offset = eeprom->offset;
3645
3646 if (!cap)
3647 return -EINVAL;
3648
3649 if (eeprom->magic != SKY2_EEPROM_MAGIC)
3650 return -EINVAL;
3651
3652 while (length > 0) {
3653 u32 val;
3654 int n = min_t(int, length, sizeof(val));
3655
3656 if (n < sizeof(val))
3657 val = sky2_vpd_read(sky2->hw, cap, offset);
3658 memcpy(&val, data, n);
3659
3660 sky2_vpd_write(sky2->hw, cap, offset, val);
3661
3662 length -= n;
3663 data += n;
3664 offset += n;
3665 }
3666 return 0;
3667}
3668
3669
Jeff Garzik7282d492006-09-13 14:30:00 -04003670static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003671 .get_settings = sky2_get_settings,
3672 .set_settings = sky2_set_settings,
3673 .get_drvinfo = sky2_get_drvinfo,
3674 .get_wol = sky2_get_wol,
3675 .set_wol = sky2_set_wol,
3676 .get_msglevel = sky2_get_msglevel,
3677 .set_msglevel = sky2_set_msglevel,
3678 .nway_reset = sky2_nway_reset,
3679 .get_regs_len = sky2_get_regs_len,
3680 .get_regs = sky2_get_regs,
3681 .get_link = ethtool_op_get_link,
3682 .get_eeprom_len = sky2_get_eeprom_len,
3683 .get_eeprom = sky2_get_eeprom,
3684 .set_eeprom = sky2_set_eeprom,
3685 .get_sg = ethtool_op_get_sg,
3686 .set_sg = ethtool_op_set_sg,
3687 .get_tx_csum = ethtool_op_get_tx_csum,
3688 .set_tx_csum = sky2_set_tx_csum,
3689 .get_tso = ethtool_op_get_tso,
3690 .set_tso = sky2_set_tso,
3691 .get_rx_csum = sky2_get_rx_csum,
3692 .set_rx_csum = sky2_set_rx_csum,
3693 .get_strings = sky2_get_strings,
3694 .get_coalesce = sky2_get_coalesce,
3695 .set_coalesce = sky2_set_coalesce,
3696 .get_ringparam = sky2_get_ringparam,
3697 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003698 .get_pauseparam = sky2_get_pauseparam,
3699 .set_pauseparam = sky2_set_pauseparam,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003700 .phys_id = sky2_phys_id,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003701 .get_stats_count = sky2_get_stats_count,
3702 .get_ethtool_stats = sky2_get_ethtool_stats,
3703};
3704
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003705#ifdef CONFIG_SKY2_DEBUG
3706
3707static struct dentry *sky2_debug;
3708
3709static int sky2_debug_show(struct seq_file *seq, void *v)
3710{
3711 struct net_device *dev = seq->private;
3712 const struct sky2_port *sky2 = netdev_priv(dev);
3713 const struct sky2_hw *hw = sky2->hw;
3714 unsigned port = sky2->port;
3715 unsigned idx, last;
3716 int sop;
3717
3718 if (!netif_running(dev))
3719 return -ENETDOWN;
3720
3721 seq_printf(seq, "IRQ src=%x mask=%x control=%x\n",
3722 sky2_read32(hw, B0_ISRC),
3723 sky2_read32(hw, B0_IMSK),
3724 sky2_read32(hw, B0_Y2_SP_ICR));
3725
3726 netif_poll_disable(hw->dev[0]);
3727 last = sky2_read16(hw, STAT_PUT_IDX);
3728
3729 if (hw->st_idx == last)
3730 seq_puts(seq, "Status ring (empty)\n");
3731 else {
3732 seq_puts(seq, "Status ring\n");
3733 for (idx = hw->st_idx; idx != last && idx < STATUS_RING_SIZE;
3734 idx = RING_NEXT(idx, STATUS_RING_SIZE)) {
3735 const struct sky2_status_le *le = hw->st_le + idx;
3736 seq_printf(seq, "[%d] %#x %d %#x\n",
3737 idx, le->opcode, le->length, le->status);
3738 }
3739 seq_puts(seq, "\n");
3740 }
3741
3742 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
3743 sky2->tx_cons, sky2->tx_prod,
3744 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
3745 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
3746
3747 /* Dump contents of tx ring */
3748 sop = 1;
3749 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < TX_RING_SIZE;
3750 idx = RING_NEXT(idx, TX_RING_SIZE)) {
3751 const struct sky2_tx_le *le = sky2->tx_le + idx;
3752 u32 a = le32_to_cpu(le->addr);
3753
3754 if (sop)
3755 seq_printf(seq, "%u:", idx);
3756 sop = 0;
3757
3758 switch(le->opcode & ~HW_OWNER) {
3759 case OP_ADDR64:
3760 seq_printf(seq, " %#x:", a);
3761 break;
3762 case OP_LRGLEN:
3763 seq_printf(seq, " mtu=%d", a);
3764 break;
3765 case OP_VLAN:
3766 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
3767 break;
3768 case OP_TCPLISW:
3769 seq_printf(seq, " csum=%#x", a);
3770 break;
3771 case OP_LARGESEND:
3772 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
3773 break;
3774 case OP_PACKET:
3775 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
3776 break;
3777 case OP_BUFFER:
3778 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
3779 break;
3780 default:
3781 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
3782 a, le16_to_cpu(le->length));
3783 }
3784
3785 if (le->ctrl & EOP) {
3786 seq_putc(seq, '\n');
3787 sop = 1;
3788 }
3789 }
3790
3791 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
3792 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
3793 last = sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
3794 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
3795
3796 netif_poll_enable(hw->dev[0]);
3797 return 0;
3798}
3799
3800static int sky2_debug_open(struct inode *inode, struct file *file)
3801{
3802 return single_open(file, sky2_debug_show, inode->i_private);
3803}
3804
3805static const struct file_operations sky2_debug_fops = {
3806 .owner = THIS_MODULE,
3807 .open = sky2_debug_open,
3808 .read = seq_read,
3809 .llseek = seq_lseek,
3810 .release = single_release,
3811};
3812
3813/*
3814 * Use network device events to create/remove/rename
3815 * debugfs file entries
3816 */
3817static int sky2_device_event(struct notifier_block *unused,
3818 unsigned long event, void *ptr)
3819{
3820 struct net_device *dev = ptr;
3821
3822 if (dev->open == sky2_up) {
3823 struct sky2_port *sky2 = netdev_priv(dev);
3824
3825 switch(event) {
3826 case NETDEV_CHANGENAME:
3827 if (!netif_running(dev))
3828 break;
3829 /* fallthrough */
3830 case NETDEV_DOWN:
3831 case NETDEV_GOING_DOWN:
3832 if (sky2->debugfs) {
3833 printk(KERN_DEBUG PFX "%s: remove debugfs\n",
3834 dev->name);
3835 debugfs_remove(sky2->debugfs);
3836 sky2->debugfs = NULL;
3837 }
3838
3839 if (event != NETDEV_CHANGENAME)
3840 break;
3841 /* fallthrough for changename */
3842 case NETDEV_UP:
3843 if (sky2_debug) {
3844 struct dentry *d;
3845 d = debugfs_create_file(dev->name, S_IRUGO,
3846 sky2_debug, dev,
3847 &sky2_debug_fops);
3848 if (d == NULL || IS_ERR(d))
3849 printk(KERN_INFO PFX
3850 "%s: debugfs create failed\n",
3851 dev->name);
3852 else
3853 sky2->debugfs = d;
3854 }
3855 break;
3856 }
3857 }
3858
3859 return NOTIFY_DONE;
3860}
3861
3862static struct notifier_block sky2_notifier = {
3863 .notifier_call = sky2_device_event,
3864};
3865
3866
3867static __init void sky2_debug_init(void)
3868{
3869 struct dentry *ent;
3870
3871 ent = debugfs_create_dir("sky2", NULL);
3872 if (!ent || IS_ERR(ent))
3873 return;
3874
3875 sky2_debug = ent;
3876 register_netdevice_notifier(&sky2_notifier);
3877}
3878
3879static __exit void sky2_debug_cleanup(void)
3880{
3881 if (sky2_debug) {
3882 unregister_netdevice_notifier(&sky2_notifier);
3883 debugfs_remove(sky2_debug);
3884 sky2_debug = NULL;
3885 }
3886}
3887
3888#else
3889#define sky2_debug_init()
3890#define sky2_debug_cleanup()
3891#endif
3892
3893
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003894/* Initialize network device */
3895static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08003896 unsigned port,
3897 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003898{
3899 struct sky2_port *sky2;
3900 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
3901
3902 if (!dev) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003903 dev_err(&hw->pdev->dev, "etherdev alloc failed");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003904 return NULL;
3905 }
3906
3907 SET_MODULE_OWNER(dev);
3908 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08003909 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003910 dev->open = sky2_up;
3911 dev->stop = sky2_down;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08003912 dev->do_ioctl = sky2_ioctl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003913 dev->hard_start_xmit = sky2_xmit_frame;
3914 dev->get_stats = sky2_get_stats;
3915 dev->set_multicast_list = sky2_set_multicast;
3916 dev->set_mac_address = sky2_set_mac_address;
3917 dev->change_mtu = sky2_change_mtu;
3918 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
3919 dev->tx_timeout = sky2_tx_timeout;
3920 dev->watchdog_timeo = TX_WATCHDOG;
3921 if (port == 0)
3922 dev->poll = sky2_poll;
3923 dev->weight = NAPI_WEIGHT;
3924#ifdef CONFIG_NET_POLL_CONTROLLER
Stephen Hemminger0ca43232006-10-18 13:39:28 -07003925 /* Network console (only works on port 0)
3926 * because netpoll makes assumptions about NAPI
3927 */
3928 if (port == 0)
3929 dev->poll_controller = sky2_netpoll;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003930#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003931
3932 sky2 = netdev_priv(dev);
3933 sky2->netdev = dev;
3934 sky2->hw = hw;
3935 sky2->msg_enable = netif_msg_init(debug, default_msg);
3936
Stephen Hemminger05745c42007-09-19 15:36:45 -07003937 /* This chip has hardware problems that generates
3938 * bogus PHY receive status so by default shut up the message.
3939 */
3940 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
3941 hw->chip_rev == CHIP_REV_YU_FE2_A0)
3942 sky2->msg_enable &= ~NETIF_MSG_RX_ERR;
3943
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003944 /* Auto speed and flow control */
3945 sky2->autoneg = AUTONEG_ENABLE;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003946 sky2->flow_mode = FC_BOTH;
3947
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003948 sky2->duplex = -1;
3949 sky2->speed = -1;
3950 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07003951 sky2->rx_csum = 1;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003952 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08003953
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003954 spin_lock_init(&sky2->phy_lock);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003955 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003956 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003957
3958 hw->dev[port] = dev;
3959
3960 sky2->port = port;
3961
Stephen Hemminger4a50a872007-02-06 10:45:41 -08003962 dev->features |= NETIF_F_TSO | NETIF_F_IP_CSUM | NETIF_F_SG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003963 if (highmem)
3964 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003965
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07003966#ifdef SKY2_VLAN_TAG_USED
3967 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
3968 dev->vlan_rx_register = sky2_vlan_rx_register;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07003969#endif
3970
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003971 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07003972 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07003973 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003974
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003975 return dev;
3976}
3977
Stephen Hemminger28bd1812006-01-17 13:43:19 -08003978static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003979{
3980 const struct sky2_port *sky2 = netdev_priv(dev);
3981
3982 if (netif_msg_probe(sky2))
3983 printk(KERN_INFO PFX "%s: addr %02x:%02x:%02x:%02x:%02x:%02x\n",
3984 dev->name,
3985 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
3986 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
3987}
3988
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003989/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01003990static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003991{
3992 struct sky2_hw *hw = dev_id;
3993 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
3994
3995 if (status == 0)
3996 return IRQ_NONE;
3997
3998 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003999 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004000 wake_up(&hw->msi_wait);
4001 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4002 }
4003 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4004
4005 return IRQ_HANDLED;
4006}
4007
4008/* Test interrupt path by forcing a a software IRQ */
4009static int __devinit sky2_test_msi(struct sky2_hw *hw)
4010{
4011 struct pci_dev *pdev = hw->pdev;
4012 int err;
4013
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004014 init_waitqueue_head (&hw->msi_wait);
4015
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004016 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4017
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004018 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004019 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004020 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004021 return err;
4022 }
4023
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004024 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004025 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004026
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004027 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004028
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004029 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004030 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004031 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4032 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004033
4034 err = -EOPNOTSUPP;
4035 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4036 }
4037
4038 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004039 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004040
4041 free_irq(pdev->irq, hw);
4042
4043 return err;
4044}
4045
Stephen Hemmingere3173832007-02-06 10:45:39 -08004046static int __devinit pci_wake_enabled(struct pci_dev *dev)
4047{
4048 int pm = pci_find_capability(dev, PCI_CAP_ID_PM);
4049 u16 value;
4050
4051 if (!pm)
4052 return 0;
4053 if (pci_read_config_word(dev, pm + PCI_PM_CTRL, &value))
4054 return 0;
4055 return value & PCI_PM_CTRL_PME_ENABLE;
4056}
4057
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004058static int __devinit sky2_probe(struct pci_dev *pdev,
4059 const struct pci_device_id *ent)
4060{
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004061 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004062 struct sky2_hw *hw;
Stephen Hemmingere3173832007-02-06 10:45:39 -08004063 int err, using_dac = 0, wol_default;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004064
Stephen Hemminger793b8832005-09-14 16:06:14 -07004065 err = pci_enable_device(pdev);
4066 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004067 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004068 goto err_out;
4069 }
4070
Stephen Hemminger793b8832005-09-14 16:06:14 -07004071 err = pci_request_regions(pdev, DRV_NAME);
4072 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004073 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004074 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004075 }
4076
4077 pci_set_master(pdev);
4078
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004079 if (sizeof(dma_addr_t) > sizeof(u32) &&
4080 !(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
4081 using_dac = 1;
4082 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4083 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004084 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4085 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004086 goto err_out_free_regions;
4087 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004088 } else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004089 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4090 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004091 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004092 goto err_out_free_regions;
4093 }
4094 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004095
Stephen Hemmingere3173832007-02-06 10:45:39 -08004096 wol_default = pci_wake_enabled(pdev) ? WAKE_MAGIC : 0;
4097
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004098 err = -ENOMEM;
Stephen Hemminger6aad85d2006-01-17 13:43:18 -08004099 hw = kzalloc(sizeof(*hw), GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004100 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004101 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004102 goto err_out_free_regions;
4103 }
4104
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004105 hw->pdev = pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004106
4107 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4108 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004109 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004110 goto err_out_free_hw;
4111 }
4112
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004113#ifdef __BIG_ENDIAN
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07004114 /* The sk98lin vendor driver uses hardware byte swapping but
4115 * this driver uses software swapping.
4116 */
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004117 {
4118 u32 reg;
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004119 reg = sky2_pci_read32(hw, PCI_DEV_REG2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07004120 reg &= ~PCI_REV_DESC;
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004121 sky2_pci_write32(hw, PCI_DEV_REG2, reg);
4122 }
4123#endif
4124
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004125 /* ring for status responses */
4126 hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES,
4127 &hw->st_dma);
4128 if (!hw->st_le)
4129 goto err_out_iounmap;
4130
Stephen Hemmingere3173832007-02-06 10:45:39 -08004131 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004132 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004133 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004134
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004135 dev_info(&pdev->dev, "v%s addr 0x%llx irq %d Yukon-%s (0x%x) rev %d\n",
Greg Kroah-Hartman7c7459d2006-06-12 15:13:08 -07004136 DRV_VERSION, (unsigned long long)pci_resource_start(pdev, 0),
4137 pdev->irq, yukon2_name[hw->chip_id - CHIP_ID_YUKON_XL],
Stephen Hemminger793b8832005-09-14 16:06:14 -07004138 hw->chip_id, hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004139
Stephen Hemmingere3173832007-02-06 10:45:39 -08004140 sky2_reset(hw);
4141
4142 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004143 if (!dev) {
4144 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004145 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004146 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004147
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004148 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4149 err = sky2_test_msi(hw);
4150 if (err == -EOPNOTSUPP)
4151 pci_disable_msi(pdev);
4152 else if (err)
4153 goto err_out_free_netdev;
4154 }
4155
Stephen Hemminger793b8832005-09-14 16:06:14 -07004156 err = register_netdev(dev);
4157 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004158 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004159 goto err_out_free_netdev;
4160 }
4161
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004162 err = request_irq(pdev->irq, sky2_intr,
4163 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004164 dev->name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004165 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004166 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004167 goto err_out_unregister;
4168 }
4169 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
4170
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004171 sky2_show_addr(dev);
4172
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004173 if (hw->ports > 1) {
4174 struct net_device *dev1;
4175
Stephen Hemmingere3173832007-02-06 10:45:39 -08004176 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004177 if (!dev1)
4178 dev_warn(&pdev->dev, "allocation for second device failed\n");
4179 else if ((err = register_netdev(dev1))) {
4180 dev_warn(&pdev->dev,
4181 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004182 hw->dev[1] = NULL;
4183 free_netdev(dev1);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004184 } else
4185 sky2_show_addr(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004186 }
4187
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004188 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08004189 INIT_WORK(&hw->restart_work, sky2_restart);
4190
Stephen Hemminger793b8832005-09-14 16:06:14 -07004191 pci_set_drvdata(pdev, hw);
4192
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004193 return 0;
4194
Stephen Hemminger793b8832005-09-14 16:06:14 -07004195err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004196 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004197 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004198 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004199err_out_free_netdev:
4200 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004201err_out_free_pci:
Stephen Hemminger793b8832005-09-14 16:06:14 -07004202 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004203 pci_free_consistent(hw->pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
4204err_out_iounmap:
4205 iounmap(hw->regs);
4206err_out_free_hw:
4207 kfree(hw);
4208err_out_free_regions:
4209 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004210err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004211 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004212err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004213 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004214 return err;
4215}
4216
4217static void __devexit sky2_remove(struct pci_dev *pdev)
4218{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004219 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004220 struct net_device *dev0, *dev1;
4221
Stephen Hemminger793b8832005-09-14 16:06:14 -07004222 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004223 return;
4224
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004225 del_timer_sync(&hw->watchdog_timer);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004226
Stephen Hemminger81906792007-02-15 16:40:33 -08004227 flush_scheduled_work();
4228
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004229 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger72cb8522006-05-08 15:11:32 -07004230 synchronize_irq(hw->pdev->irq);
4231
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004232 dev0 = hw->dev[0];
Stephen Hemminger793b8832005-09-14 16:06:14 -07004233 dev1 = hw->dev[1];
4234 if (dev1)
4235 unregister_netdev(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004236 unregister_netdev(dev0);
4237
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004238 sky2_power_aux(hw);
4239
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004240 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004241 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004242 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004243
4244 free_irq(pdev->irq, hw);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004245 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004246 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004247 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004248 pci_release_regions(pdev);
4249 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004250
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004251 if (dev1)
4252 free_netdev(dev1);
4253 free_netdev(dev0);
4254 iounmap(hw->regs);
4255 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004256
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004257 pci_set_drvdata(pdev, NULL);
4258}
4259
4260#ifdef CONFIG_PM
4261static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
4262{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004263 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004264 int i, wol = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004265
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004266 if (!hw)
4267 return 0;
4268
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07004269 netif_poll_disable(hw->dev[0]);
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004270
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004271 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004272 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08004273 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004274
Stephen Hemmingere3173832007-02-06 10:45:39 -08004275 if (netif_running(dev))
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004276 sky2_down(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004277
4278 if (sky2->wol)
4279 sky2_wol_init(sky2);
4280
4281 wol |= sky2->wol;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004282 }
4283
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004284 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004285 sky2_power_aux(hw);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004286
Linus Torvaldsd374c1c2006-06-12 12:53:27 -07004287 pci_save_state(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004288 pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004289 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4290
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09004291 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004292}
4293
4294static int sky2_resume(struct pci_dev *pdev)
4295{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004296 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004297 int i, err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004298
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004299 if (!hw)
4300 return 0;
4301
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004302 err = pci_set_power_state(pdev, PCI_D0);
4303 if (err)
4304 goto out;
4305
4306 err = pci_restore_state(pdev);
4307 if (err)
4308 goto out;
4309
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004310 pci_enable_wake(pdev, PCI_D0, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004311
4312 /* Re-enable all clocks */
Stephen Hemminger05745c42007-09-19 15:36:45 -07004313 if (hw->chip_id == CHIP_ID_YUKON_EX ||
4314 hw->chip_id == CHIP_ID_YUKON_EC_U ||
4315 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004316 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
4317
Stephen Hemmingere3173832007-02-06 10:45:39 -08004318 sky2_reset(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004319
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004320 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
4321
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004322 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004323 struct net_device *dev = hw->dev[i];
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07004324 if (netif_running(dev)) {
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004325 err = sky2_up(dev);
4326 if (err) {
4327 printk(KERN_ERR PFX "%s: could not up: %d\n",
4328 dev->name, err);
4329 dev_close(dev);
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004330 goto out;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004331 }
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01004332
4333 sky2_set_multicast(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004334 }
4335 }
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004336
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07004337 netif_poll_enable(hw->dev[0]);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004338
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004339 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004340out:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004341 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004342 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004343 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004344}
4345#endif
4346
Stephen Hemmingere3173832007-02-06 10:45:39 -08004347static void sky2_shutdown(struct pci_dev *pdev)
4348{
4349 struct sky2_hw *hw = pci_get_drvdata(pdev);
4350 int i, wol = 0;
4351
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004352 if (!hw)
4353 return;
4354
Stephen Hemmingere3173832007-02-06 10:45:39 -08004355 netif_poll_disable(hw->dev[0]);
4356
4357 for (i = 0; i < hw->ports; i++) {
4358 struct net_device *dev = hw->dev[i];
4359 struct sky2_port *sky2 = netdev_priv(dev);
4360
4361 if (sky2->wol) {
4362 wol = 1;
4363 sky2_wol_init(sky2);
4364 }
4365 }
4366
4367 if (wol)
4368 sky2_power_aux(hw);
4369
4370 pci_enable_wake(pdev, PCI_D3hot, wol);
4371 pci_enable_wake(pdev, PCI_D3cold, wol);
4372
4373 pci_disable_device(pdev);
4374 pci_set_power_state(pdev, PCI_D3hot);
4375
4376}
4377
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004378static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07004379 .name = DRV_NAME,
4380 .id_table = sky2_id_table,
4381 .probe = sky2_probe,
4382 .remove = __devexit_p(sky2_remove),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004383#ifdef CONFIG_PM
Stephen Hemminger793b8832005-09-14 16:06:14 -07004384 .suspend = sky2_suspend,
4385 .resume = sky2_resume,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004386#endif
Stephen Hemmingere3173832007-02-06 10:45:39 -08004387 .shutdown = sky2_shutdown,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004388};
4389
4390static int __init sky2_init_module(void)
4391{
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004392 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08004393 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004394}
4395
4396static void __exit sky2_cleanup_module(void)
4397{
4398 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004399 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004400}
4401
4402module_init(sky2_init_module);
4403module_exit(sky2_cleanup_module);
4404
4405MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe632007-01-23 11:38:57 -08004406MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004407MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08004408MODULE_VERSION(DRV_VERSION);