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Channagoud Kadabi31d648c2015-01-29 12:59:00 -08001/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <string.h>
30#include <stdlib.h>
31#include <debug.h>
32#include <reg.h>
33#include <mmc_sdhci.h>
34#include <sdhci.h>
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070035#include <sdhci_msm.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070036#include <partition_parser.h>
37#include <platform/iomap.h>
38#include <platform/timer.h>
vijay kumar4f4405f2014-08-08 11:49:53 +053039#include <platform.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070040
41extern void clock_init_mmc(uint32_t);
42extern void clock_config_mmc(uint32_t, uint32_t);
43
44/* data access time unit in ns */
45static const uint32_t taac_unit[] =
46{
47 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
48};
49
50/* data access time value x 10 */
51static const uint32_t taac_value[] =
52{
53 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
54};
55
56/* data transfer rate in kbit/s */
57static const uint32_t xfer_rate_unit[] =
58{
59 100, 1000, 10000, 100000, 0, 0, 0, 0
60};
61
62/* data transfer rate value x 10*/
63static const uint32_t xfer_rate_value[] =
64{
65 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80
66};
67
68/*
69 * Function: mmc decode and save csd
70 * Arg : Card structure & raw csd
71 * Return : 0 on Success, 1 on Failure
72 * Flow : Decodes CSD response received from the card.
73 * Note that we have defined only few of the CSD elements
74 * in csd structure. We'll only decode those values.
75 */
76static uint32_t mmc_decode_and_save_csd(struct mmc_card *card)
77{
78 uint32_t mmc_sizeof = 0;
79 uint32_t mmc_unit = 0;
80 uint32_t mmc_value = 0;
81 uint32_t mmc_temp = 0;
82 uint32_t *raw_csd = card->raw_csd;
83
84 struct mmc_csd mmc_csd;
85
86 mmc_sizeof = sizeof(uint32_t) * 8;
87
88 mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
89
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070090 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070091 /* Parse CSD according to SD card spec. */
92
93 /* CSD register is little bit differnet for CSD version 2.0 High
94 * Capacity and CSD version 1.0/2.0 Standard memory cards.
95 * In Version 2.0 some of the fields have fixed values and it's
96 * not necessary for host to refer these fields in CSD sent by
97 * card
98 */
99
100 if (mmc_csd.cmmc_structure == 1) {
101 /* CSD Version 2.0 */
102 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
103 /* Fixed value is 9 = 2^9 = 512 */
104 mmc_csd.write_blk_len = 512;
105 /* Fixed value is 9 = 512 */
106 mmc_csd.read_blk_len = 512;
107 /* Fixed value: 010b */
108 mmc_csd.r2w_factor = 0x2;
109 /* Not there in version 2.0 */
110 mmc_csd.c_size_mult = 0;
111 mmc_csd.c_size = UNPACK_BITS(raw_csd, 48, 22, mmc_sizeof);
112 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
113 * 100;
114
115 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
116 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
117 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
118 / 10;
119
120 mmc_csd.erase_blk_len = 1;
121 mmc_csd.read_blk_misalign = 0;
122 mmc_csd.write_blk_misalign = 0;
123 mmc_csd.read_blk_partial = 0;
124 mmc_csd.write_blk_partial = 0;
125
126 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
127 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
128 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
129 xfer_rate_unit[mmc_unit]) / 10;
130
131 mmc_csd.wp_grp_size = 0x0;
132 mmc_csd.wp_grp_enable = 0x0;
133 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
134 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
135
136 /* Calculate the card capcity */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700137 card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700138 } else {
139 /* CSD Version 1.0 */
140 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
141
142 mmc_temp = UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
143 mmc_csd.write_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
144 (1 << mmc_temp) : 512;
145
146 mmc_temp = UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
147 mmc_csd.read_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
148 (1 << mmc_temp) : 512;
149
150 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
151 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
152 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
153 / 10;
154
155 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
156 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
157 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
158 xfer_rate_unit[mmc_unit]) / 10;
159
160 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
161 * 100;
162
163 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
164 mmc_csd.sector_size = UNPACK_BITS(raw_csd, 39, 7, mmc_sizeof) + 1;
165
166 mmc_csd.erase_blk_len = UNPACK_BITS(raw_csd, 46, 1, mmc_sizeof);
167 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
168 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
169 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
170 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
171
172 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
173 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
174 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 7, mmc_sizeof);
175 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
176 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
177 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
178
179 /* Calculate the card capacity */
180 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700181 card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700182 }
183 } else {
184 /* Parse CSD according to MMC card spec. */
185 mmc_csd.spec_vers = UNPACK_BITS(raw_csd, 122, 4, mmc_sizeof);
186 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
187 mmc_csd.write_blk_len = 1 << UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
188 mmc_csd.read_blk_len = 1 << UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
189 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
190 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
191 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
192 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof) * 100;
193
194 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
195 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
196 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
197
198 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
199 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
200 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
201 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
202
203 /* Ignore -- no use of this value. */
204 mmc_csd.tran_speed = 0x00;
205
206 mmc_csd.erase_grp_size = UNPACK_BITS(raw_csd, 42, 5, mmc_sizeof);
207 mmc_csd.erase_grp_mult = UNPACK_BITS(raw_csd, 37, 5, mmc_sizeof);
208 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 5, mmc_sizeof);
209 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
210 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
211 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
212
213 /* Calculate the card capcity */
214 if (mmc_csd.c_size != 0xFFF) {
215 /* For cards less than or equal to 2GB */
216 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700217 card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700218 } else {
219 /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
220 * is used to calculate the size.
221 */
222 uint64_t sec_count;
223
224 sec_count = (card->ext_csd[MMC_SEC_COUNT4] << MMC_SEC_COUNT4_SHIFT)
225 | (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
226 | (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
227 | card->ext_csd[MMC_SEC_COUNT1];
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700228 card->capacity = sec_count * MMC_BLK_SZ;
229 }
230 }
231
232 /* save the information in card structure */
233 memcpy((struct mmc_csd *)&card->csd,(struct mmc_csd *)&mmc_csd,
234 sizeof(struct mmc_csd));
235
vijay kumar488e4842015-08-21 20:37:29 +0530236 if (MMC_CARD_MMC(card)) {
vijay kumar697dbfd2014-04-24 17:12:49 +0530237
vijay kumar488e4842015-08-21 20:37:29 +0530238 /* Calculate the wp grp size */
239 if (card->ext_csd[MMC_ERASE_GRP_DEF])
240 card->wp_grp_size = MMC_HC_ERASE_MULT * card->ext_csd[MMC_HC_ERASE_GRP_SIZE] / MMC_BLK_SZ;
241 else
242 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
243 * (card->csd.erase_grp_mult + 1);
244
245 card->rpmb_size = RPMB_PART_MIN_SIZE * card->ext_csd[RPMB_SIZE_MULT];
246 card->rel_wr_count = card->ext_csd[REL_WR_SEC_C];
247 }
248 else {
249 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
250 * (card->csd.erase_grp_mult + 1);
251 }
Channagoud Kadabi31d648c2015-01-29 12:59:00 -0800252
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700253 dprintf(SPEW, "Decoded CSD fields:\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700254 dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700255 dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700256 dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
257 dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
258 dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
259 dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
260 dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
261 dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
262 dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
263 dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
264 dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
265 dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
266 dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
267 dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
268 dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
269 dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
vijay kumar697dbfd2014-04-24 17:12:49 +0530270 dprintf(SPEW, "wp_grp_size: %u\n", card->wp_grp_size);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700271 dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
272
273 return 0;
274}
275
276/*
277 * Function: mmc decode & save cid
278 * Arg : card structure & raw cid
279 * Return : 0 on Success, 1 on Failure
280 * Flow : Decode CID sent by the card.
281 */
282static uint32_t mmc_decode_and_save_cid(struct mmc_card *card,
283 uint32_t *raw_cid)
284{
285 struct mmc_cid mmc_cid;
286 uint32_t mmc_sizeof = 0;
287 int i = 0;
288
289 if (!raw_cid) {
290 return 1;
291 }
292
293 mmc_sizeof = sizeof(uint32_t) * 8;
294
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700295 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700296 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
297 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
298
299 for (i = 0; i < 5; i++) {
300 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid,
301 (104 - 8 * (i + 1)),
302 8,
303 mmc_sizeof);
304 }
305 mmc_cid.pnm[5] = 0;
306 mmc_cid.pnm[6] = 0;
307
308 mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700309 mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700310 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
311 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
312 mmc_cid.year += 2000;
313 } else {
314 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
315 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
316
317 for (i = 0; i < 6; i++) {
318 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid, (104 - 8 * (i + 1)),
319 8, mmc_sizeof);
320 }
321 mmc_cid.pnm[6] = 0;
322
323 mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700324 mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700325 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
326 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
327 mmc_cid.year += 1997;
328 }
329
330 /* save it in card database */
331 memcpy((struct mmc_cid *)&card->cid,
332 (struct mmc_cid *)&mmc_cid, sizeof(struct mmc_cid));
333
334 dprintf(SPEW, "Decoded CID fields:\n");
335 dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid);
336 dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid);
337 dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm);
338 dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4),
339 (mmc_cid.prv & 0xF));
340 dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn);
341 dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year);
342
343 return 0;
344}
345
346/*
347 * Function: mmc reset cards
348 * Arg : host structure
349 * Return : 0 on Success, 1 on Failure
350 * Flow : Reset all the cards to idle condition (CMD 0)
351 */
352static uint8_t mmc_reset_card(struct sdhci_host *host)
353{
354 struct mmc_command cmd;
355
356 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
357
358 cmd.cmd_index = CMD0_GO_IDLE_STATE;
359 cmd.argument = 0;
360 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
361 cmd.resp_type = SDHCI_CMD_RESP_NONE;
362
363 /* send command */
364 return sdhci_send_command(host, &cmd);
365}
366
367/*
368 * Function: mmc operations command
369 * Arg : host & card structure
370 * Return : 0 on Success, 1 on Failure
371 * Flow : Send CMD1 to know whether the card supports host VDD profile or not.
372 */
373static uint32_t mmc_send_op_cond(struct sdhci_host *host, struct mmc_card *card)
374{
375 struct mmc_command cmd;
376 uint32_t mmc_resp = 0;
377 uint32_t mmc_ret = 0;
378 uint32_t mmc_retry = 0;
379
380 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
381
382 /* CMD1 format:
383 * [31] Busy bit
384 * [30:29] Access mode
385 * [28:24] reserved
386 * [23:15] 2.7-3.6
387 * [14:8] 2.0-2.6
388 * [7] 1.7-1.95
389 * [6:0] reserved
390 */
391
392 cmd.cmd_index = CMD1_SEND_OP_COND;
393 cmd.argument = card->ocr;
394 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
395 cmd.resp_type = SDHCI_CMD_RESP_R3;
396
397 do {
398 mmc_ret = sdhci_send_command(host, &cmd);
399 if (mmc_ret)
400 return mmc_ret;
401
402 /* Command returned success, now it's time to examine response */
403 mmc_resp = cmd.resp[0];
404
405 /* Check the response for busy status */
406 if (!(mmc_resp & MMC_OCR_BUSY)) {
407 mmc_retry++;
408 mdelay(1);
409 continue;
410 } else
411 break;
412 } while (mmc_retry < MMC_MAX_COMMAND_RETRY);
413
414 /* If we reached here after max retries, we failed to get OCR */
415 if (mmc_retry == MMC_MAX_COMMAND_RETRY && !(mmc_resp & MMC_OCR_BUSY)) {
416 dprintf(CRITICAL, "Card has busy status set. Init did not complete\n");
417 return 1;
418 }
419
420 /* Response contains card's ocr. Update card's information */
421 card->ocr = mmc_resp;
422
423 if (mmc_resp & MMC_OCR_SEC_MODE)
424 card->type = MMC_TYPE_MMCHC;
425 else
426 card->type = MMC_TYPE_STD_MMC;
427
428 return 0;
429}
430
431/*
432 * Function: mmc send cid
433 * Arg : host & card structure
434 * Return : 0 on Success, 1 on Failure
435 * Flow : Request any card to send its uniquie card identification
436 * (CID) number (CMD2).
437 */
438static uint32_t mmc_all_send_cid(struct sdhci_host *host, struct mmc_card *card)
439{
440 struct mmc_command cmd;
441 uint32_t mmc_ret = 0;
442
443 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
444
445 /* CMD2 Format:
446 * [31:0] stuff bits
447 */
448 cmd.cmd_index = CMD2_ALL_SEND_CID;
449 cmd.argument = 0;
450 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
451 cmd.resp_type = SDHCI_CMD_RESP_R2;
452
453 /* send command */
454 mmc_ret = sdhci_send_command(host, &cmd);
455 if (mmc_ret) {
456 return mmc_ret;
457 }
458
459 /* Response contains card's 128 bits CID register */
460 mmc_ret = mmc_decode_and_save_cid(card, cmd.resp);
461 if (mmc_ret) {
462 return mmc_ret;
463 }
464
465 return 0;
466}
467
468/*
469 * Function: mmc send relative address
470 * Arg : host & card structure
471 * Return : 0 on Success, 1 on Failure
472 * Flow : Ask card to send it's relative card address (RCA).
473 * This RCA number is shorter than CID and is used by
474 * the host to address the card in future (CMD3)
475 */
476static uint32_t mmc_send_relative_address(struct sdhci_host *host,
477 struct mmc_card *card)
478{
479 struct mmc_command cmd;
480 uint32_t mmc_ret = 0;
481
482 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
483
484 /* CMD3 Format:
485 * [31:0] stuff bits
486 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700487 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700488 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
489 cmd.argument = 0;
490 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
491 cmd.resp_type = SDHCI_CMD_RESP_R6;
492
493 /* send command */
494 mmc_ret = sdhci_send_command(host, &cmd);
495 if (mmc_ret)
496 return mmc_ret;
497
498 /* For sD, card will send RCA. Store it */
499 card->rca = (cmd.resp[0] >> 16);
500 } else {
501 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
502 cmd.argument = (MMC_RCA << 16);
503 card->rca = (cmd.argument >> 16);
504 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
505 cmd.resp_type = SDHCI_CMD_RESP_R6;
506
507 /* send command */
508 mmc_ret = sdhci_send_command(host, &cmd);
509 if (mmc_ret)
510 return mmc_ret;
511 }
512
513 return 0;
514}
515
516/*
517 * Function: mmc send csd
518 * Arg : host, card structure & o/p arg to store csd
519 * Return : 0 on Success, 1 on Failure
520 * Flow : Requests card to send it's CSD register's contents. (CMD9)
521 */
522static uint32_t mmc_send_csd(struct sdhci_host *host, struct mmc_card *card)
523{
524 struct mmc_command cmd;
525 uint32_t mmc_arg = 0;
526 uint32_t mmc_ret = 0;
527
528 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
529
530 /* CMD9 Format:
531 * [31:16] RCA
532 * [15:0] stuff bits
533 */
534 mmc_arg |= card->rca << 16;
535
536 cmd.cmd_index = CMD9_SEND_CSD;
537 cmd.argument = mmc_arg;
538 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
539 cmd.resp_type = SDHCI_CMD_RESP_R2;
540
541 /* send command */
542 mmc_ret = sdhci_send_command(host, &cmd);
543 if (mmc_ret)
544 return mmc_ret;
545
546 /* response contains the card csd */
547 memcpy(card->raw_csd, cmd.resp, sizeof(cmd.resp));
548
549 return 0;
550}
551
552/*
553 * Function: mmc select card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700554 * Arg : host, card structure
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700555 * Return : 0 on Success, 1 on Failure
556 * Flow : Selects a card by sending CMD7 to the card with its RCA.
557 * If RCA field is set as 0 ( or any other address ),
558 * the card will be de-selected. (CMD7)
559 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700560static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700561{
562 struct mmc_command cmd;
563 uint32_t mmc_arg = 0;
564 uint32_t mmc_ret = 0;
565
566 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
567
568 /* CMD7 Format:
569 * [31:16] RCA
570 * [15:0] stuff bits
571 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700572 mmc_arg |= card->rca << 16;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700573
574 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
575 cmd.argument = mmc_arg;
576 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
577
578 /* If we are deselecting card, we do not get response */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700579 if (card->rca) {
580 if (MMC_CARD_SD(card))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700581 cmd.resp_type = SDHCI_CMD_RESP_R1B;
582 else
583 cmd.resp_type = SDHCI_CMD_RESP_R1;
584 } else
585 cmd.resp_type = SDHCI_CMD_RESP_NONE;
586
587 /* send command */
588 mmc_ret = sdhci_send_command(host, &cmd);
589 if (mmc_ret)
590 return mmc_ret;
591
592 return 0;
593}
594
595/*
596 * Function: mmc set block len
597 * Arg : host, card structure & block length
598 * Return : 0 on Success, 1 on Failure
599 * Flow : Send command to set block length.
600 */
601static uint32_t mmc_set_block_len(struct sdhci_host *host,
602 struct mmc_card *card,
603 uint32_t block_len)
604{
605 struct mmc_command cmd;
606 uint32_t mmc_ret = 0;
607
608 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
609
610 /* CMD16 Format:
611 * [31:0] block length
612 */
613
614 cmd.cmd_index = CMD16_SET_BLOCKLEN;
615 cmd.argument = block_len;
616 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
617 cmd.resp_type = SDHCI_CMD_RESP_R1;
618
619 /* send command */
620 mmc_ret = sdhci_send_command(host, &cmd);
621 if (mmc_ret)
622 return mmc_ret;
623
624 /*
625 * If blocklength is larger than 512 bytes,
626 * the card sets BLOCK_LEN_ERROR bit.
627 */
628 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
629 dprintf(CRITICAL, "The block length is not supported by the card\n");
630 return 1;
631 }
632
633 return 0;
634}
635
636/*
637 * Function: mmc get card status
638 * Arg : host, card structure & o/p argument card status
639 * Return : 0 on Success, 1 on Failure
640 * Flow : Get the current status of the card
641 */
642static uint32_t mmc_get_card_status(struct sdhci_host *host,
643 struct mmc_card *card, uint32_t *status)
644{
645 struct mmc_command cmd;
646 uint32_t mmc_ret = 0;
647
648 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
649
650 /* CMD13 Format:
651 * [31:16] RCA
652 * [15:0] stuff bits
653 */
654 cmd.cmd_index = CMD13_SEND_STATUS;
655 cmd.argument = card->rca << 16;
656 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
657 cmd.resp_type = SDHCI_CMD_RESP_R1;
658
659 /* send command */
660 mmc_ret = sdhci_send_command(host, &cmd);
661 if (mmc_ret)
662 return mmc_ret;
663
664 /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
665 if ((cmd.resp[0] >> 31) & 0x01)
666 return 1;
667
668 *status = cmd.resp[0];
669 return 0;
670}
671
672/*
673 * Function: mmc get ext csd
674 * Arg : host, card structure & array to hold ext attributes
675 * Return : 0 on Success, 1 on Failure
676 * Flow : Send ext csd command & get the card attributes
677 */
678static uint32_t mmc_get_ext_csd(struct sdhci_host *host, struct mmc_card *card)
679{
680 struct mmc_command cmd;
681 uint32_t mmc_ret = 0;
682
683 card->ext_csd = memalign(CACHE_LINE, ROUNDUP(512, CACHE_LINE));
684
685 ASSERT(card->ext_csd);
686
687 memset(card->ext_csd, 0, sizeof(card->ext_csd));
688
Mayank Grovereed5c062016-12-02 18:19:49 +0530689 /* invalidate any cached buf data (controller updates main memory) */
690 arch_invalidate_cache_range((addr_t) card->ext_csd, 512);
691
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700692 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
693
694 /* CMD8 */
695 cmd.cmd_index = CMD8_SEND_EXT_CSD;
696 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
697 cmd.resp_type = SDHCI_CMD_RESP_R1;
698 cmd.data.data_ptr = card->ext_csd;
699 cmd.data.num_blocks = 1;
700 cmd.data_present = 0x1;
701 cmd.trans_mode = SDHCI_MMC_READ;
702
703 /* send command */
704 mmc_ret = sdhci_send_command(host, &cmd);
705 if (mmc_ret)
706 return mmc_ret;
707
708 return mmc_ret;
709}
710
711/*
712 * Function: mmc switch command
713 * Arg : Host, card structure, access mode, index & value to be set
714 * Return : 0 on Success, 1 on Failure
715 * Flow : Send switch command to the card to set the ext attribute @ index
716 */
717static uint32_t mmc_switch_cmd(struct sdhci_host *host, struct mmc_card *card,
718 uint32_t access, uint32_t index, uint32_t value)
719{
720
721 struct mmc_command cmd;
722 uint32_t mmc_ret = 0;
723 uint32_t mmc_status;
724
725 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
726
727 /* CMD6 Format:
728 * [31:26] set to 0
729 * [25:24] access
730 * [23:16] index
731 * [15:8] value
732 * [7:3] set to 0
733 * [2:0] cmd set
734 */
735 cmd.cmd_index = CMD6_SWITCH_FUNC;
736 cmd.argument |= (access << 24);
737 cmd.argument |= (index << 16);
738 cmd.argument |= (value << 8);
739 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
740 cmd.resp_type = SDHCI_CMD_RESP_R1B;
741
742 mmc_ret = sdhci_send_command(host, &cmd);
743 if (mmc_ret) {
744 dprintf(CRITICAL, "CMD6 send failed\n");
745 return mmc_ret;
746 }
747
748 /* Check if the card completed the switch command processing */
749 mmc_ret = mmc_get_card_status(host, card, &mmc_status);
750 if (mmc_ret) {
751 dprintf(CRITICAL, "Get card status failed\n");
752 return mmc_ret;
753 }
754
755 if (MMC_CARD_STATUS(mmc_status) != MMC_TRAN_STATE) {
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700756 dprintf(CRITICAL, "Switch cmd failed. Card not in tran state %x\n", mmc_status);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700757 mmc_ret = 1;
758 }
759
760 if (mmc_status & MMC_SWITCH_FUNC_ERR_FLAG) {
761 dprintf(CRITICAL, "Switch cmd failed. Switch Error.\n");
762 mmc_ret = 1;
763 }
764
765 return mmc_ret;
766}
767
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700768bool mmc_set_drv_type(struct sdhci_host *host, struct mmc_card *card, uint8_t drv_type)
769{
770 uint32_t ret = 0;
771 bool drv_type_changed = false;
772
773 uint32_t value = ((drv_type << 4) | MMC_HS200_TIMING);
774
vijay kumar488e4842015-08-21 20:37:29 +0530775 if (MMC_CARD_MMC(card)) {
Mayank Grover3e66b2b2016-12-07 15:16:29 +0530776 if (card->ext_csd[MMC_EXT_MMC_DRV_STRENGTH] & (1 << drv_type)){
vijay kumar488e4842015-08-21 20:37:29 +0530777 ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, value);
Mayank Grover3e66b2b2016-12-07 15:16:29 +0530778 if (!ret)
779 drv_type_changed = true;
780 }
vijay kumar488e4842015-08-21 20:37:29 +0530781 }
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700782 return drv_type_changed;
783}
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700784/*
785 * Function: mmc set bus width
786 * Arg : Host, card structure & width
787 * Return : 0 on Success, 1 on Failure
788 * Flow : Send switch command to set bus width
789 */
790static uint32_t mmc_set_bus_width(struct sdhci_host *host,
791 struct mmc_card *card,
792 uint32_t width)
793{
794 uint32_t mmc_ret = 0;
795
796 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
797 MMC_EXT_MMC_BUS_WIDTH, width);
798
799 if (mmc_ret) {
800 dprintf(CRITICAL, "Switch cmd failed\n");
801 return mmc_ret;
802 }
803
804 return 0;
805}
806
807
808/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700809 * Function: mmc card supports hs400 mode
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700810 * Arg : None
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700811 * Return : 1 if hs400 mode is supported, 0 otherwise
812 * Flow : Check the ext csd attributes of the card
813 */
814static uint8_t mmc_card_supports_hs400_mode(struct mmc_card *card)
815{
vijay kumar488e4842015-08-21 20:37:29 +0530816 if (MMC_CARD_MMC(card)) {
817 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS400_MODE)
818 return 1;
819 else
820 return 0;
821 }
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700822 else
823 return 0;
824}
825
826/*
827 * Function: mmc card supports hs200 mode
828 * Arg : None
829 * Return : 1 if HS200 mode is supported, 0 otherwise
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700830 * Flow : Check the ext csd attributes of the card
831 */
832static uint8_t mmc_card_supports_hs200_mode(struct mmc_card *card)
833{
vijay kumar488e4842015-08-21 20:37:29 +0530834 if (MMC_CARD_MMC(card)) {
835 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS200_MODE)
836 return 1;
837 else
838 return 0;
839 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700840 else
841 return 0;
842}
843
844/*
845 * Function: mmc card supports ddr mode
846 * Arg : None
847 * Return : 1 if DDR mode is supported, 0 otherwise
848 * Flow : Check the ext csd attributes of the card
849 */
850static uint8_t mmc_card_supports_ddr_mode(struct mmc_card *card)
851{
vijay kumar488e4842015-08-21 20:37:29 +0530852 if (MMC_CARD_MMC(card)) {
853 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_DDR_MODE)
854 return 1;
855 else
856 return 0;
857 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700858 else
859 return 0;
860}
861
862/*
863 * Function : Enable HS200 mode
864 * Arg : Host, card structure and bus width
865 * Return : 0 on Success, 1 on Failure
866 * Flow :
867 * - Set the bus width to 4/8 bit SDR as supported by the target & host
868 * - Set the HS_TIMING on ext_csd 185 for the card
869 */
870static uint32_t mmc_set_hs200_mode(struct sdhci_host *host,
871 struct mmc_card *card, uint32_t width)
872{
873 uint32_t mmc_ret = 0;
874
Channagoud Kadabie632e252014-03-31 15:26:00 -0700875 DBG("\n Enabling HS200 Mode Start\n");
876
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700877 /* Set 4/8 bit SDR bus width */
878 mmc_ret = mmc_set_bus_width(host, card, width);
879 if (mmc_ret) {
880 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
881 card->rca);
882 return mmc_ret;
883 }
884
885 /* Setting HS200 in HS_TIMING using EXT_CSD (CMD6) */
886 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS200_TIMING);
887
888 if (mmc_ret) {
889 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
890 return mmc_ret;
891 }
892
Channagoud Kadabi1dc6aab2013-11-20 12:46:15 -0800893 /* Enable SDR104 mode in controller */
894 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
895
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700896 /* Run the clock @ 400 Mhz */
Channagoud Kadabie9168e82014-01-28 21:33:34 -0800897 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700898 {
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700899 /* Save the timing value, before changing the clock */
900 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
Channagoud Kadabi86756c12014-03-12 17:16:39 -0700901 /*
902 * Set the MCI_CLK divider before changing the sdcc core
903 * core clk to ensure card receives no more than 200 MHZ
904 * clock frequency
905 */
906 sdhci_msm_set_mci_clk(host);
907 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700908 }
Channagoud Kadabi642ff552014-08-12 21:40:59 -0700909
910 /* Execute Tuning for hs200 mode */
911 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
912 dprintf(CRITICAL, "Tuning for hs200 failed\n");
913
914 /* Once the tuning is executed revert back the clock to 200MHZ
915 * and disable the MCI_CLK divider so that we can use SDHC clock
916 * divider to supply clock to the card
917 */
918 if (host->timing == MMC_HS400_TIMING)
919 {
920 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
921 sdhci_msm_set_mci_clk(host);
922 clock_config_mmc(host->msm_host->slot, MMC_CLK_192MHZ);
923 }
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700924 else
925 {
926 /* Save the timing value, before changing the clock */
927 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
928 }
929
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700930
Channagoud Kadabie632e252014-03-31 15:26:00 -0700931 DBG("\n Enabling HS200 Mode Done\n");
932
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700933 return mmc_ret;
934}
935
936/*
937 * Function: mmc set ddr mode
938 * Arg : Host & card structure
939 * Return : 0 on Success, 1 on Failure
940 * Flow : Set bus width for ddr mode & set controller in DDR mode
941*/
942static uint8_t mmc_set_ddr_mode(struct sdhci_host *host, struct mmc_card *card)
943{
944 uint8_t mmc_ret = 0;
945
Channagoud Kadabie632e252014-03-31 15:26:00 -0700946 DBG("\n Enabling DDR Mode Start\n");
947
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700948 /* Set width for 8 bit DDR mode by default */
949 mmc_ret = mmc_set_bus_width(host, card, DATA_DDR_BUS_WIDTH_8BIT);
950
951 if (mmc_ret) {
952 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
953 card->rca);
954 return mmc_ret;
955 }
956
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700957 /* Save the timing value, before changing the clock */
958 MMC_SAVE_TIMING(host, SDHCI_DDR50_MODE);
959
960 /* Set the DDR mode in controller */
961 sdhci_set_uhs_mode(host, SDHCI_DDR50_MODE);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700962
Channagoud Kadabie632e252014-03-31 15:26:00 -0700963 DBG("\n Enabling DDR Mode Done\n");
964
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700965 return 0;
966}
967
968/*
969 * Function: mmc set high speed interface
970 * Arg : Host & card structure
971 * Return : None
972 * Flow : Sets the sdcc clock & clock divider in the host controller
973 * Adjust the interface speed to optimal speed
974 */
975static uint32_t mmc_set_hs_interface(struct sdhci_host *host,
976 struct mmc_card *card)
977{
978 uint32_t mmc_ret = 0;
979
980 /* Setting HS_TIMING in EXT_CSD (CMD6) */
981 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
982 MMC_EXT_MMC_HS_TIMING, MMC_HS_TIMING);
983
984 if (mmc_ret) {
985 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
986 return mmc_ret;
987 }
988
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700989 /* Save the timing value, before changing the clock */
990 MMC_SAVE_TIMING(host, SDHCI_SDR25_MODE);
991
992 /* Set the SDR25 mode in controller */
993 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
994
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700995 return 0;
996}
997
998/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700999 * Function : Enable HS400 mode
1000 * Arg : Host, card structure and bus width
1001 * Return : 0 on Success, 1 on Failure
1002 * Flow :
1003 * - Set the bus width to 8 bit DDR
1004 * - Set the HS_TIMING on ext_csd 185 for the card
1005 */
1006uint32_t mmc_set_hs400_mode(struct sdhci_host *host,
1007 struct mmc_card *card, uint32_t width)
1008{
1009 uint32_t mmc_ret = 0;
1010
1011 /*
1012 * Emmc 5.0 spec does not allow changing to hs400 mode directly
1013 * Need to follow the sequence to change to hs400 mode
1014 * 1. Enable HS200 mode, perform tuning
1015 * 2. Change to high speed mode
1016 * 3. Enable DDR mode
1017 * 4. Enable HS400 mode & execute tuning
1018 */
1019
Channagoud Kadabie632e252014-03-31 15:26:00 -07001020 DBG("\n Enabling HS400 Mode Start\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001021 /* HS400 mode is supported only in DDR 8-bit */
1022 if (width != DATA_BUS_WIDTH_8BIT)
1023 {
1024 dprintf(CRITICAL, "Bus width is not 8-bit, cannot switch to hs400: %u\n", width);
1025 return 1;
1026 }
1027
1028 /* 1.Enable HS200 mode */
1029 mmc_ret = mmc_set_hs200_mode(host, card, width);
1030
1031 if (mmc_ret)
1032 {
1033 dprintf(CRITICAL, "Failure Setting HS200 mode %s\t%d\n",__func__, __LINE__);
1034 return mmc_ret;
1035 }
1036
1037 /* 2. Enable High speed mode */
1038 /* This is needed to set the clock to a low value &
1039 * so that we can switch to hs_timing --> 0x1 */
1040 /* Save the timing value, before changing the clock */
1041 MMC_SAVE_TIMING(host, SDHCI_SDR12_MODE);
1042 sdhci_set_uhs_mode(host, SDHCI_SDR12_MODE);
1043
1044 /* 3. Set HS_TIMING to 0x1 */
1045 mmc_ret = mmc_set_hs_interface(host, card);
1046 if (mmc_ret)
1047 {
1048 dprintf(CRITICAL, "Error adjusting interface speed!:%s\t%d\n", __func__, __LINE__);
1049 return mmc_ret;
1050 }
1051
1052 /*4. Enable DDR mode */
1053 mmc_ret = mmc_set_ddr_mode(host, card);
1054 if (mmc_ret)
1055 {
1056 dprintf(CRITICAL, "Failure setting DDR mode:%s\t%d\n", __func__, __LINE__);
1057 return mmc_ret;
1058 }
1059
1060 /*5. Set hs400 timing */
1061 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS400_TIMING);
1062
1063 if (mmc_ret)
1064 {
1065 dprintf(CRITICAL, "Switch cmd returned failure %s\t%d\n",__func__, __LINE__);
1066 return mmc_ret;
1067 }
1068
1069 /* 6. Enable SDR104 mode in controller */
1070 /* Save the timing value, before changing the clock */
1071 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
1072 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
Channagoud Kadabi86756c12014-03-12 17:16:39 -07001073 /*
1074 * Enable HS400 mode
1075 */
1076 sdhci_msm_set_mci_clk(host);
Channagoud Kadabi642ff552014-08-12 21:40:59 -07001077 /* Set the clock back to 400 MHZ */
1078 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001079
1080 /* 7. Execute Tuning for hs400 mode */
Channagoud Kadabie106d1f2014-04-25 18:26:26 -07001081 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001082 dprintf(CRITICAL, "Tuning for hs400 failed\n");
1083
Channagoud Kadabie632e252014-03-31 15:26:00 -07001084 DBG("\n Enabling HS400 Mode Done\n");
1085
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001086 return mmc_ret;
1087}
1088
1089/*
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001090 * Function: mmc_host_init
1091 * Arg : mmc device structure
1092 * Return : 0 on success, 1 on Failure
1093 * Flow : Initialize the host contoller
1094 * Set the clock rate to 400 KHZ for init
1095 */
1096static uint8_t mmc_host_init(struct mmc_device *dev)
1097{
1098 uint8_t mmc_ret = 0;
1099
1100 struct sdhci_host *host;
1101 struct mmc_config_data *cfg;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001102 struct sdhci_msm_data *data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001103
1104 event_t sdhc_event;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001105
1106 host = &dev->host;
1107 cfg = &dev->config;
1108
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001109 event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
1110
1111 host->base = cfg->sdhc_base;
1112 host->sdhc_event = &sdhc_event;
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001113 host->caps.hs200_support = cfg->hs200_support;
Aparna Mallavarapue1cdd302014-03-07 07:12:44 +05301114 host->caps.hs400_support = cfg->hs400_support;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001115
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001116 data = (struct sdhci_msm_data *) malloc(sizeof(struct sdhci_msm_data));
1117 ASSERT(data);
1118
1119 data->sdhc_event = &sdhc_event;
1120 data->pwrctl_base = cfg->pwrctl_base;
1121 data->pwr_irq = cfg->pwr_irq;
1122 data->slot = cfg->slot;
Channagoud Kadabi17e69972014-10-13 11:42:24 -07001123 data->use_io_switch = cfg->use_io_switch;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001124
1125 host->msm_host = data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001126
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -07001127 /* Initialize any clocks needed for SDC controller */
1128 clock_init_mmc(cfg->slot);
1129
1130 clock_config_mmc(cfg->slot, cfg->max_clk_rate);
1131
Channagoud Kadabie632e252014-03-31 15:26:00 -07001132 /* Configure the CDC clocks needed for emmc storage
1133 * we use slot '1' for emmc
1134 */
1135 if (cfg->slot == 1)
1136 clock_config_cdc(cfg->slot);
1137
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001138 /*
1139 * MSM specific sdhc init
1140 */
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001141 sdhci_msm_init(host, data);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001142
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001143 /*
1144 * Initialize the controller, read the host capabilities
1145 * set power on mode
1146 */
1147 sdhci_init(host);
1148
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001149 /* Setup initial freq to 400KHz */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001150 mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
1151
1152 return mmc_ret;
1153}
1154
1155/*
1156 * Function: mmc identify card
1157 * Arg : host & card structure
1158 * Return : 0 on Success, 1 on Failure
1159 * Flow : Performs card identification process:
1160 * 1. Get card's unique identification number (CID)
1161 * 2. Get(for sd)/set (for mmc) relative card address (RCA)
1162 * 3. Select the card to put it in TRAN state
1163 */
1164static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
1165{
1166 uint32_t mmc_return = 0;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001167
1168 /* Ask card to send its unique card identification (CID) number (CMD2) */
1169 mmc_return = mmc_all_send_cid(host, card);
1170 if (mmc_return) {
1171 dprintf(CRITICAL,"Failure getting card's CID number!\n");
1172 return mmc_return;
1173 }
1174
1175 /* Ask card to send a relative card address (RCA) (CMD3) */
1176 mmc_return = mmc_send_relative_address(host, card);
1177 if (mmc_return) {
1178 dprintf(CRITICAL, "Failure getting card's RCA!\n");
1179 return mmc_return;
1180 }
1181
1182 /* Get card's CSD register (CMD9) */
1183 mmc_return = mmc_send_csd(host, card);
1184 if (mmc_return) {
1185 dprintf(CRITICAL,"Failure getting card's CSD information!\n");
1186 return mmc_return;
1187 }
1188
1189 /* Select the card (CMD7) */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001190 mmc_return = mmc_select_card(host, card);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001191 if (mmc_return) {
1192 dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
1193 return mmc_return;
1194 }
1195
1196 /* Set the card status as active */
1197 card->status = MMC_STATUS_ACTIVE;
1198
1199 return 0;
1200}
1201
1202/*
1203 * Function: mmc_reset_card_and_send_op
1204 * Arg : Host & Card structure
1205 * Return : 0 on Success, 1 on Failure
1206 * Flow : Routine to initialize MMC card. It resets a card to idle state,
1207 * verify operating voltage and set the card in ready state.
1208 */
1209static uint32_t mmc_reset_card_and_send_op(struct sdhci_host *host, struct mmc_card *card)
1210{
1211 uint32_t mmc_return = 0;
1212
1213 /* 1. Card Reset - CMD0 */
1214 mmc_return = mmc_reset_card(host);
1215 if (mmc_return) {
1216 dprintf(CRITICAL, "Failure resetting MMC cards!\n");
1217 return mmc_return;
1218 }
1219
1220 /* 2. Card Initialization process */
1221
1222 /*
1223 * Send CMD1 to identify and reject cards that do not match host's VDD range
1224 * profile. Cards sends its OCR register in response.
1225 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001226
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001227 mmc_return = mmc_send_op_cond(host, card);
1228
1229 /* OCR is not received, init could not complete */
1230 if (mmc_return) {
1231 dprintf(CRITICAL, "Failure getting OCR response from MMC Card\n");
1232 return mmc_return;
1233 }
1234
1235 return 0;
1236}
1237
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001238static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
1239{
1240 struct mmc_command cmd = {0};
1241
1242 cmd.cmd_index = CMD55_APP_CMD;
1243 cmd.argument = (card->rca << 16);
1244 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1245 cmd.resp_type = SDHCI_CMD_RESP_R1;
1246
1247 if (sdhci_send_command(host, &cmd))
1248 {
1249 dprintf(CRITICAL, "Failed Sending CMD55\n");
1250 return 1;
1251 }
1252 return 0;
1253}
1254
1255uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
1256{
1257 uint8_t i;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001258 struct mmc_command cmd;
1259
1260 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1261
1262 /* Use the SD card RCA 0x0 during init */
1263 card->rca = SD_CARD_RCA;
1264
1265 /* Send CMD8 for voltage check*/
1266 for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
1267 {
1268 cmd.cmd_index = CMD8_SEND_IF_COND;
1269 cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
1270 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1271 cmd.resp_type = SDHCI_CMD_RESP_R7;
1272
1273 if (sdhci_send_command(host, &cmd))
1274 {
1275 dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
1276 return 1;
1277 }
1278 else
1279 {
1280 /* If the command response echos the voltage back */
1281 if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
1282 break;
1283 }
1284 /* As per SDCC the spec try for max three times with
1285 * 1 ms delay
1286 */
1287 mdelay(1);
1288 }
1289
1290 if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
1291 {
1292 dprintf(CRITICAL, "Error: CMD8 response timed out\n");
1293 return 1;
1294 }
1295
1296 /* Send ACMD41 for OCR */
1297 for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
1298 {
1299 /* Send APP_CMD before ACMD41*/
1300 if (mmc_send_app_cmd(host, card))
1301 {
1302 dprintf(CRITICAL, "Failed sending App command\n");
1303 return 1;
1304 }
1305
1306 /* APP_CMD is successful, send ACMD41 now */
1307 cmd.cmd_index = ACMD41_SEND_OP_COND;
1308 cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
1309 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1310 cmd.resp_type = SDHCI_CMD_RESP_R3;
1311
1312 if (sdhci_send_command(host, &cmd))
1313 {
1314 dprintf(CRITICAL, "Failure sending ACMD41\n");
1315 return 1;
1316 }
1317 else
1318 {
1319 if (cmd.resp[0] & MMC_SD_DEV_READY)
1320 {
1321 if (cmd.resp[0] & (1 << 30))
1322 card->type = MMC_CARD_TYPE_SDHC;
1323 else
1324 card->type = MMC_CARD_TYPE_STD_SD;
1325
1326 break;
1327 }
1328 }
1329 /*
1330 * As per SDCC spec try for max 1 second
1331 */
1332 mdelay(50);
1333 }
1334
1335 if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
1336 {
1337 dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
1338 return 1;
1339 }
1340
1341 return 0;
1342}
1343
1344/*
1345 * Function to read SD card information from SD status
1346 */
1347static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
1348{
1349 BUF_DMA_ALIGN(raw_sd_status, 64);
1350 struct mmc_command cmd = {0};
1351 uint32_t sd_status[16];
1352 uint32_t *status = sd_status;
1353 uint32_t au_size;
1354 int i;
1355 int j;
1356
1357 if (mmc_send_app_cmd(host, card))
1358 {
1359 dprintf(CRITICAL, "Failed sending App command\n");
1360 return 1;
1361 }
1362
1363 cmd.cmd_index = ACMD13_SEND_SD_STATUS;
1364 cmd.argument = 0x0;
1365 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
Channagoud Kadabi57f37a82014-08-25 13:33:49 -07001366 cmd.resp_type = SDHCI_CMD_RESP_R1;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001367 cmd.trans_mode = SDHCI_MMC_READ;
1368 cmd.data_present = 0x1;
1369 cmd.data.data_ptr = raw_sd_status;
1370 cmd.data.num_blocks = 0x1;
1371 cmd.data.blk_sz = 0x40;
1372
1373 /* send command */
1374 if (sdhci_send_command(host, &cmd))
1375 return 1;
1376
1377 memcpy(sd_status, raw_sd_status, sizeof(sd_status));
1378
1379 for (i = 15, j = 0; i >=0 ; i--, j++)
1380 sd_status[i] = swap_endian32(sd_status[j]);
1381
1382 au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
1383 /* Card AU size in sectors */
1384 card->ssr.au_size = 1 << (au_size + 4);
1385 card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
vijay kumarb01d64c2015-08-21 20:37:29 +05301386 /*if num_aus is 0 then host should assign number of AU erased at a time*/
1387 if (!card->ssr.num_aus)
1388 card->ssr.num_aus = 0x10;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001389 return 0;
1390}
1391
1392/*
1393 * Function to read the SD CARD configuration register
1394 */
1395static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
1396{
1397 BUF_DMA_ALIGN(scr_resp, 8);
1398 struct mmc_command cmd = {0};
1399 uint32_t raw_scr[2];
1400
1401 /* Now read the SCR register */
1402 /* Send APP_CMD before ACMD51*/
1403 if (mmc_send_app_cmd(host, card))
1404 {
1405 dprintf(CRITICAL, "Failed sending App command\n");
1406 return 1;
1407 }
1408
1409 cmd.cmd_index = ACMD51_READ_CARD_SCR;
1410 cmd.argument = 0x0;
1411 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1412 cmd.resp_type = SDHCI_CMD_RESP_R1;
1413 cmd.trans_mode = SDHCI_MMC_READ;
1414 cmd.data_present = 0x1;
1415 cmd.data.data_ptr = scr_resp;
1416 cmd.data.num_blocks = 0x1;
1417 cmd.data.blk_sz = 0x8;
1418
1419 /* send command */
1420 if (sdhci_send_command(host, &cmd))
1421 return 1;
1422
1423 memcpy(raw_scr, scr_resp, sizeof(raw_scr));
1424
1425 card->raw_scr[0] = swap_endian32(raw_scr[0]);
1426 card->raw_scr[1] = swap_endian32(raw_scr[1]);
1427
1428 /*
1429 * Parse & Populate the SCR data as per sdcc spec
1430 */
1431 card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
1432 card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
1433 card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
1434 card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
1435
1436 return 0;
1437}
1438
1439/*
1440 * Function: mmc_set_sd_bus_width
1441 * Arg : host, device structure & width
1442 * Return : 0 on Success, 1 on Failure
1443 * Flow : Set the bus width for the card
1444 */
1445uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
1446{
1447 struct mmc_command cmd = {0};
1448
1449 /* Send APP_CMD before ACMD6*/
1450 if (mmc_send_app_cmd(host, card))
1451 {
1452 dprintf(CRITICAL, "Failed sending App command\n");
1453 return 1;
1454 }
1455
1456 cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
1457 cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
1458 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1459 cmd.resp_type = SDHCI_CMD_RESP_R1;
1460
1461 /* send command */
1462 if (sdhci_send_command(host, &cmd))
1463 return 1;
1464
1465 return 0;
1466}
1467
1468uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
1469{
1470 struct mmc_command cmd = {0};
1471 BUF_DMA_ALIGN(switch_resp, 64);
1472
1473 cmd.cmd_index = CMD6_SWITCH_FUNC;
1474 cmd.argument = MMC_SD_SWITCH_HS;
1475 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1476 cmd.resp_type = SDHCI_CMD_RESP_R1;
1477 cmd.trans_mode = SDHCI_MMC_READ;
1478 cmd.data_present = 0x1;
1479 cmd.data.data_ptr = switch_resp;
1480 cmd.data.num_blocks = 0x1;
1481 cmd.data.blk_sz = 0x40;
1482
1483 /* send command */
1484 if (sdhci_send_command(host, &cmd))
1485 return 1;
1486
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001487 /* Set the SDR25 mode in controller*/
1488 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
1489
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001490 return 0;
1491}
1492
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001493/*
1494 * Function: mmc_init_card
1495 * Arg : mmc device structure
1496 * Return : 0 on Success, 1 on Failure
1497 * Flow : Performs initialization and identification of eMMC cards connected
1498 * to the host.
1499 */
1500
1501static uint32_t mmc_card_init(struct mmc_device *dev)
1502{
1503 uint32_t mmc_return = 0;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001504 uint8_t bus_width = 0;
1505
1506 struct sdhci_host *host;
1507 struct mmc_card *card;
1508 struct mmc_config_data *cfg;
1509
1510 host = &dev->host;
1511 card = &dev->card;
1512 cfg = &dev->config;
1513
1514 /* Initialize MMC card structure */
1515 card->status = MMC_STATUS_INACTIVE;
1516
1517 /* TODO: Get the OCR params from target */
1518 card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
1519
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001520 /* Initialize the internal MMC */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001521 mmc_return = mmc_reset_card_and_send_op(host, card);
1522 if (mmc_return)
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001523 {
1524 dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
1525 /* Reset the card & get the OCR */
1526 mmc_return = mmc_sd_card_init(host, card);
1527 if (mmc_return)
1528 {
1529 dprintf(CRITICAL, "Failed to initialize SD card\n");
1530 return mmc_return;
1531 }
1532 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001533
1534 /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
1535 mmc_return = mmc_identify_card(host, card);
1536 if (mmc_return)
1537 return mmc_return;
1538
1539 /* set interface speed */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001540 if (MMC_CARD_SD(card))
1541 {
1542 mmc_return = mmc_sd_set_hs(host, card);
1543 if (mmc_return)
1544 {
1545 dprintf(CRITICAL, "Failed to set HS for SD card\n");
1546 return mmc_return;
1547 }
1548 }
1549 else
1550 {
1551 mmc_return = mmc_set_hs_interface(host, card);
1552 if (mmc_return) {
1553 dprintf(CRITICAL, "Error adjusting interface speed!\n");
1554 return mmc_return;
1555 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001556 }
1557
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001558 /* Now get the extended CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001559 if (MMC_CARD_MMC(card))
1560 {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001561 /* For MMC cards, also get the extended csd */
1562 mmc_return = mmc_get_ext_csd(host, card);
1563
1564 if (mmc_return) {
1565 dprintf(CRITICAL, "Failure getting card's ExtCSD information!\n");
1566 return mmc_return;
1567 }
1568 }
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001569 else
1570 {
1571 /*Read SCR for sd card */
1572 if (mmc_sd_get_card_scr(host, card))
1573 {
1574 dprintf(CRITICAL, "Failure getting card's SCR register\n");
1575 return 1;
1576 }
1577 /* Read SSR for the SD card */
1578 if (mmc_sd_get_card_ssr(host, card))
1579 {
1580 dprintf(CRITICAL, "Failed to get SSR from the card\n");
1581 return 1;
1582 }
1583 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001584
1585 /* Decode and save the CSD register */
1586 mmc_return = mmc_decode_and_save_csd(card);
1587 if (mmc_return) {
1588 dprintf(CRITICAL, "Failure decoding card's CSD information!\n");
1589 return mmc_return;
1590 }
1591
1592
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001593 if (MMC_CARD_MMC(card))
1594 {
1595 /* Set the bus width based on host, target capbilities */
1596 if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
1597 bus_width = DATA_BUS_WIDTH_8BIT;
1598 /*
1599 * Host contoller by default supports 4 bit & 1 bit mode.
1600 * No need to check for host support here
1601 */
1602 else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
1603 bus_width = DATA_BUS_WIDTH_4BIT;
1604 else
1605 bus_width = DATA_BUS_WIDTH_1BIT;
1606
1607 /* Set 4/8 bit SDR bus width in controller */
1608 mmc_return = sdhci_set_bus_width(host, bus_width);
1609
1610 if (mmc_return) {
1611 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
1612 return 1;
1613 }
1614
1615 /* Enable high speed mode in the follwing order:
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001616 * 1. HS400 mode if supported by host & card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001617 * 1. HS200 mode if supported by host & card
1618 * 2. DDR mode host, if supported by host & card
1619 * 3. Use normal speed mode with supported bus width
1620 */
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001621 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001622 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001623 dprintf(INFO, "SDHC Running in HS400 mode\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001624 mmc_return = mmc_set_hs400_mode(host, card, bus_width);
1625 if (mmc_return)
1626 {
1627 dprintf(CRITICAL, "Failure to set HS400 mode for Card(RCA:%x)\n",
1628 card->rca);
1629 return mmc_return;
1630 }
1631 }
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001632#if USE_TARGET_HS200_CAPS
1633 else if (host->caps.hs200_support && host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
1634#else
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001635 else if (host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001636#endif
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001637 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001638 dprintf(INFO, "SDHC Running in HS200 mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001639 mmc_return = mmc_set_hs200_mode(host, card, bus_width);
1640
1641 if (mmc_return) {
1642 dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
1643 card->rca);
1644 return mmc_return;
1645 }
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001646 } else if (host->caps.ddr_support && mmc_card_supports_ddr_mode(card)) {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001647 dprintf(INFO, "SDHC Running in DDR mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001648 mmc_return = mmc_set_ddr_mode(host, card);
1649
1650 if (mmc_return) {
1651 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
1652 card->rca);
1653 return mmc_return;
1654 }
1655 } else {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001656 dprintf(INFO, "SDHC Running in High Speed mode\n");
1657 /* Set HS_TIMING mode */
1658 mmc_return = mmc_set_hs_interface(host, card);
1659 if (mmc_return) {
1660 dprintf(CRITICAL, "Failure to enalbe HS mode for Card(RCA:%x)\n",
1661 card->rca);
1662 return mmc_return;
1663 }
1664 /* Set wide bus mode */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001665 mmc_return = mmc_set_bus_width(host, card, bus_width);
1666 if (mmc_return) {
1667 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
1668 card->rca);
1669 return mmc_return;
1670 }
1671 }
1672 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001673 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001674 {
1675 /* Check the supported bus width for the card from SCR register */
1676 if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
1677 bus_width = DATA_BUS_WIDTH_4BIT;
1678 else
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001679 bus_width = DATA_BUS_WIDTH_1BIT;
1680
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001681 mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
1682 if (mmc_return)
1683 {
1684 dprintf(CRITICAL, "Failed to set bus width for the card\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001685 return mmc_return;
1686 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001687
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001688 /* Set bit SDR bus width in controller */
1689 mmc_return = sdhci_set_bus_width(host, bus_width);
1690 if (mmc_return)
1691 {
1692 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001693 return mmc_return;
1694 }
1695 }
1696
1697
Channagoud Kadabi96c629e2013-09-10 14:21:30 -07001698 card->block_size = MMC_BLK_SZ;
1699
vijay kumar488e4842015-08-21 20:37:29 +05301700 if (MMC_CARD_MMC(card)) {
1701 /* Enable RST_n_FUNCTION */
1702 if (!card->ext_csd[MMC_EXT_CSD_RST_N_FUNC])
Channagoud Kadabifaf20f62014-10-21 22:22:37 -07001703 {
vijay kumar488e4842015-08-21 20:37:29 +05301704 mmc_return = mmc_switch_cmd(host, card, MMC_SET_BIT, MMC_EXT_CSD_RST_N_FUNC, RST_N_FUNC_ENABLE);
Channagoud Kadabifaf20f62014-10-21 22:22:37 -07001705
vijay kumar488e4842015-08-21 20:37:29 +05301706 if (mmc_return)
1707 {
1708 dprintf(CRITICAL, "Failed to enable RST_n_FUNCTION\n");
1709 return mmc_return;
1710 }
1711 }
1712
1713 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001714 return mmc_return;
1715}
1716
1717/*
1718 * Function: mmc display csd
1719 * Arg : None
1720 * Return : None
1721 * Flow : Displays the csd information
1722 */
1723static void mmc_display_csd(struct mmc_card *card)
1724{
1725 dprintf(SPEW, "erase_grpsize: %d\n", card->csd.erase_grp_size);
1726 dprintf(SPEW, "erase_grpmult: %d\n", card->csd.erase_grp_mult);
1727 dprintf(SPEW, "wp_grpsize: %d\n", card->csd.wp_grp_size);
1728 dprintf(SPEW, "wp_grpen: %d\n", card->csd.wp_grp_enable);
1729 dprintf(SPEW, "perm_wp: %d\n", card->csd.perm_wp);
1730 dprintf(SPEW, "temp_wp: %d\n", card->csd.temp_wp);
1731}
1732
1733/*
1734 * Function: mmc_init
1735 * Arg : MMC configuration data
1736 * Return : Pointer to mmc device
1737 * Flow : Entry point to MMC boot process
1738 * Initialize the sd host controller
1739 * Initialize the mmc card
1740 * Set the clock & high speed mode
1741 */
1742struct mmc_device *mmc_init(struct mmc_config_data *data)
1743{
1744 uint8_t mmc_ret = 0;
1745 struct mmc_device *dev;
1746
1747 dev = (struct mmc_device *) malloc (sizeof(struct mmc_device));
1748
1749 if (!dev) {
1750 dprintf(CRITICAL, "Error allocating mmc device\n");
1751 return NULL;
1752 }
1753
1754 ASSERT(data);
1755
1756 memcpy((void*)&dev->config, (void*)data, sizeof(struct mmc_config_data));
1757
1758 memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
1759
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001760 /* Initialize the host & clock */
1761 dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
1762
1763 mmc_ret = mmc_host_init(dev);
1764 if (mmc_ret) {
1765 dprintf(CRITICAL, "Error Initializing MMC host : %u\n", mmc_ret);
1766 return NULL;
1767 }
1768
1769 /* Initialize and identify cards connected to host */
1770 mmc_ret = mmc_card_init(dev);
1771 if (mmc_ret) {
1772 dprintf(CRITICAL, "Failed detecting MMC/SDC @ slot%d\n",
1773 dev->config.slot);
1774 return NULL;
1775 }
1776
1777 dprintf(INFO, "Done initialization of the card\n");
1778
1779 mmc_display_csd(&dev->card);
1780
1781 return dev;
1782}
1783
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001784static uint32_t mmc_parse_response(uint32_t resp)
1785{
1786 /* Trying to write beyond card capacity */
1787 if (resp & MMC_R1_ADDR_OUT_OF_RANGE) {
1788 dprintf(CRITICAL, "Attempting to read or write beyond the Device capacity\n");
1789 return 1;
1790 }
1791
1792 /* Misaligned address not matching block length */
1793 if (resp & MMC_R1_ADDR_ERR) {
1794 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1795 return 1;
1796 }
1797
1798 /* Invalid block length */
1799 if (resp & MMC_R1_BLOCK_LEN_ERR) {
1800 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1801 return 1;
1802 }
1803
1804 /* Tried to program write protected block */
1805 if (resp & MMC_R1_WP_VIOLATION) {
1806 dprintf(CRITICAL, "Attempt to program a write protected block\n");
1807 return 1;
1808 }
1809
1810 /* card controller error */
1811 if (resp & MMC_R1_CC_ERROR) {
1812 dprintf(CRITICAL, "Device error occurred, which is not related to the host command\n");
1813 return 1;
1814 }
1815
1816 /* Generic error */
1817 if (resp & MMC_R1_GENERIC_ERR) {
1818 dprintf(CRITICAL, "A generic Device error\n");
1819 return 1;
1820 }
1821
1822 /* Finally check for card in TRAN state */
1823 if (MMC_CARD_STATUS(resp) != MMC_TRAN_STATE) {
1824 dprintf(CRITICAL, "MMC card is not in TRAN state\n");
1825 return 1;
1826 }
1827
1828 return 0;
1829}
1830
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001831static uint32_t mmc_stop_command(struct mmc_device *dev)
1832{
1833 struct mmc_command cmd;
1834 uint32_t mmc_ret = 0;
1835
1836 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1837
1838 cmd.cmd_index = CMD12_STOP_TRANSMISSION;
1839 cmd.argument = (dev->card.rca << 16);
1840 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1841 cmd.resp_type = SDHCI_CMD_RESP_R1;
1842
1843 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1844 if(mmc_ret)
1845 {
1846 dprintf(CRITICAL, "Failed to send stop command\n");
1847 return mmc_ret;
1848 }
1849
1850 /* Response contains 32 bit Card status.
1851 * Parse the errors & provide relevant information */
1852
1853 return mmc_parse_response(cmd.resp[0]);
1854}
1855
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001856/*
1857 * Function: mmc sdhci read
1858 * Arg : mmc device structure, block address, number of blocks & destination
1859 * Return : 0 on Success, non zero on success
1860 * Flow : Fill in the command structure & send the command
1861 */
1862uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest,
1863 uint64_t blk_addr, uint32_t num_blocks)
1864{
1865 uint32_t mmc_ret = 0;
1866 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001867 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001868
1869 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1870
1871 /* CMD17/18 Format:
1872 * [31:0] Data Address
1873 */
1874 if (num_blocks == 1)
1875 cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
1876 else
1877 cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
1878
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001879 /*
1880 * Standard emmc cards use byte mode addressing
1881 * convert the block address to byte address before
1882 * sending the command
1883 */
1884 if (card->type == MMC_TYPE_STD_MMC)
1885 cmd.argument = blk_addr * card->block_size;
1886 else
1887 cmd.argument = blk_addr;
1888
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001889 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1890 cmd.resp_type = SDHCI_CMD_RESP_R1;
1891 cmd.trans_mode = SDHCI_MMC_READ;
1892 cmd.data_present = 0x1;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001893
1894 /* Use CMD23 If card supports CMD23:
1895 * For SD card use the value read from SCR register
1896 * For emmc by default use CMD23.
1897 * Also as per SDCC spec always use CMD23 to stop
1898 * multiblock read/write if UHS (Ultra High Speed) is
1899 * enabled
1900 */
1901 if (MMC_CARD_SD(card))
1902 cmd.cmd23_support = dev->card.scr.cmd23_support;
1903 else
1904 cmd.cmd23_support = 0x1;
1905
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001906 cmd.data.data_ptr = dest;
1907 cmd.data.num_blocks = num_blocks;
1908
1909 /* send command */
1910 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001911
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001912 /* For multi block read failures send stop command */
1913 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001914 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001915 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001916 }
1917
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001918 /*
1919 * Response contains 32 bit Card status.
1920 * Parse the errors & provide relevant information
1921 */
1922 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001923}
1924
1925/*
1926 * Function: mmc sdhci write
1927 * Arg : mmc device structure, block address, number of blocks & source
1928 * Return : 0 on Success, non zero on success
1929 * Flow : Fill in the command structure & send the command
1930 */
1931uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src,
1932 uint64_t blk_addr, uint32_t num_blocks)
1933{
1934 uint32_t mmc_ret = 0;
1935 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001936 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001937
1938 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1939
1940 /* CMD24/25 Format:
1941 * [31:0] Data Address
1942 */
1943
1944 if (num_blocks == 1)
1945 cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
1946 else
1947 cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
1948
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001949 /*
1950 * Standard emmc cards use byte mode addressing
1951 * convert the block address to byte address before
1952 * sending the command
1953 */
1954 if (card->type == MMC_TYPE_STD_MMC)
1955 cmd.argument = blk_addr * card->block_size;
1956 else
1957 cmd.argument = blk_addr;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001958 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1959 cmd.resp_type = SDHCI_CMD_RESP_R1;
1960 cmd.trans_mode = SDHCI_MMC_WRITE;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001961
1962 /* Use CMD23 If card supports CMD23:
1963 * For SD card use the value read from SCR register
1964 * For emmc by default use CMD23.
1965 * Also as per SDCC spec always use CMD23 to stop
1966 * multiblock read/write if UHS (Ultra High Speed) is
1967 * enabled
1968 */
1969 if (MMC_CARD_SD(card))
1970 cmd.cmd23_support = dev->card.scr.cmd23_support;
1971 else
1972 cmd.cmd23_support = 0x1;
1973
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001974 cmd.data_present = 0x1;
1975 cmd.data.data_ptr = src;
1976 cmd.data.num_blocks = num_blocks;
1977
1978 /* send command */
1979 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001980
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001981 /* For multi block write failures send stop command */
1982 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001983 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001984 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001985 }
1986
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001987 /*
1988 * Response contains 32 bit Card status.
1989 * Parse the errors & provide relevant information
1990 */
1991 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001992}
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001993
1994/*
1995 * Send the erase group start address using CMD35
1996 */
1997static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
1998{
1999 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002000 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002001
2002 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2003
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002004 if (MMC_CARD_MMC(card))
2005 cmd.cmd_index = CMD35_ERASE_GROUP_START;
2006 else
2007 cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
2008
vijay kumar1129e4e2014-03-28 11:24:48 +05302009 /*
2010 * Standard emmc cards use byte mode addressing
2011 * convert the block address to byte address before
2012 * sending the command
2013 */
2014 if (card->type == MMC_TYPE_STD_MMC)
2015 cmd.argument = erase_start * card->block_size;
2016 else
2017 cmd.argument = erase_start;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002018 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2019 cmd.resp_type = SDHCI_CMD_RESP_R1;
2020
2021 /* send command */
2022 if (sdhci_send_command(&dev->host, &cmd))
2023 return 1;
2024
2025 /*
2026 * CMD35 on failure returns address out of range error
2027 */
2028 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2029 {
2030 dprintf(CRITICAL, "Address for CMD35 is out of range\n");
2031 return 1;
2032 }
2033
2034 return 0;
2035}
2036
2037/*
2038 * Send the erase group end address using CMD36
2039 */
2040static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
2041{
2042 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002043 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002044
2045 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2046
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002047 if (MMC_CARD_MMC(card))
2048 cmd.cmd_index = CMD36_ERASE_GROUP_END;
2049 else
2050 cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
2051
vijay kumar1129e4e2014-03-28 11:24:48 +05302052 /*
2053 * Standard emmc cards use byte mode addressing
2054 * convert the block address to byte address before
2055 * sending the command
2056 */
2057 if (card->type == MMC_TYPE_STD_MMC)
2058 cmd.argument = erase_end * card->block_size;
2059 else
2060 cmd.argument = erase_end;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002061 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2062 cmd.resp_type = SDHCI_CMD_RESP_R1;
2063
2064 /* send command */
2065 if (sdhci_send_command(&dev->host, &cmd))
2066 return 1;
2067
2068 /*
2069 * CMD3 on failure returns address out of range error
2070 */
2071 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2072 {
2073 dprintf(CRITICAL, "Address for CMD36 is out of range\n");
2074 return 1;
2075 }
2076
2077 return 0;
2078}
2079
2080/*
2081 * Send the erase CMD38, to erase the selected erase groups
2082 */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002083static uint32_t mmc_send_erase(struct mmc_device *dev, uint64_t erase_timeout)
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002084{
2085 struct mmc_command cmd;
2086 uint32_t status;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002087 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002088
2089 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2090
2091 cmd.cmd_index = CMD38_ERASE;
2092 cmd.argument = 0x00000000;
2093 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2094 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002095 cmd.cmd_timeout = erase_timeout;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002096
2097 /* send command */
2098 if (sdhci_send_command(&dev->host, &cmd))
2099 return 1;
2100
2101 do
2102 {
2103 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2104 {
2105 dprintf(CRITICAL, "Failed to get card status after erase\n");
2106 return 1;
2107 }
2108 /* Check if the response of erase command has eras skip status set */
2109 if (status & MMC_R1_WP_ERASE_SKIP)
2110 dprintf(CRITICAL, "Write Protect set for the region, only partial space was erased\n");
2111
2112 retry++;
2113 udelay(1000);
2114 if (retry == MMC_MAX_CARD_STAT_RETRY)
2115 {
2116 dprintf(CRITICAL, "Card status check timed out after sending erase command\n");
2117 return 1;
2118 }
2119 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2120
2121
2122 return 0;
2123}
2124
2125
2126/*
2127 * Function: mmc sdhci erase
2128 * Arg : mmc device structure, block address and length
2129 * Return : 0 on Success, non zero on failure
2130 * Flow : Fill in the command structure & send the command
2131 */
2132uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len)
2133{
2134 uint32_t erase_unit_sz = 0;
2135 uint32_t erase_start;
2136 uint32_t erase_end;
2137 uint32_t blk_end;
2138 uint32_t num_erase_grps;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002139 uint64_t erase_timeout = 0;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002140 struct mmc_card *card;
2141
2142
2143 card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002144
2145 /*
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002146 * Calculate the erase unit size,
2147 * 1. Based on emmc 4.5 spec for emmc card
2148 * 2. Use SD Card Status info for SD cards
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002149 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002150 if (MMC_CARD_MMC(card))
2151 {
2152 /*
2153 * Calculate the erase unit size as per the emmc specification v4.5
2154 */
2155 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2156 erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
2157 else
2158 erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
2159 }
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002160 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002161 erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
2162
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002163
2164 /* Convert length in blocks */
2165 len = len / MMC_BLK_SZ;
2166
2167 if (len < erase_unit_sz)
2168 {
2169 dprintf(CRITICAL, "Requested length is less than min erase group size\n");
2170 return 1;
2171 }
2172
2173 /* Calculate erase groups based on the length in blocks */
2174 num_erase_grps = len / erase_unit_sz;
2175
2176 /* Start address of the erase range */
2177 erase_start = blk_addr;
2178
2179 /* Last address of the erase range */
2180 erase_end = blk_addr + ((num_erase_grps - 1) * erase_unit_sz);
2181
2182 /* Boundary check for overlap */
2183 blk_end = blk_addr + len;
2184
2185 if (erase_end > blk_end)
2186 {
2187 dprintf(CRITICAL, "The erase group overlaps the max requested for erase\n");
2188 erase_end -= erase_unit_sz;
2189 }
2190
2191 /* Send CMD35 for erase group start */
2192 if (mmc_send_erase_grp_start(dev, erase_start))
2193 {
2194 dprintf(CRITICAL, "Failed to send erase grp start address\n");
2195 return 1;
2196 }
2197
2198 /* Send CMD36 for erase group end */
2199 if (mmc_send_erase_grp_end(dev, erase_end))
2200 {
2201 dprintf(CRITICAL, "Failed to send erase grp end address\n");
2202 return 1;
2203 }
2204
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002205 /*
2206 * As per emmc 4.5 spec section 7.4.27, calculate the erase timeout
Channagoud Kadabi7491e6c2014-12-02 15:42:11 -08002207 * erase_timeout = 300ms * ERASE_TIMEOUT_MULT * num_erase_grps
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002208 */
vijay kumar488e4842015-08-21 20:37:29 +05302209 if (MMC_CARD_MMC(card))
2210 erase_timeout = (300 * 1000 * card->ext_csd[MMC_ERASE_TIMEOUT_MULT] * num_erase_grps);
2211 else
2212 erase_timeout = (300 * 1000 * num_erase_grps);
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002213
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002214 /* Send CMD38 to perform erase */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002215 if (mmc_send_erase(dev, erase_timeout))
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002216 {
2217 dprintf(CRITICAL, "Failed to erase the specified partition\n");
2218 return 1;
2219 }
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002220
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002221 return 0;
2222}
2223
2224/*
2225 * Function: mmc get wp status
2226 * Arg : mmc device structure, block address and buffer for getting wp status
2227 * Return : 0 on Success, 1 on Failure
2228 * Flow : Get the WP group status by sending CMD31
2229 */
2230uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status)
2231{
2232 struct mmc_command cmd;
2233
2234 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2235
2236 cmd.cmd_index = CMD31_SEND_WRITE_PROT_TYPE;
2237 cmd.argument = addr;
2238 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2239 cmd.resp_type = SDHCI_CMD_RESP_R1;
2240 cmd.trans_mode = SDHCI_MMC_READ;
2241 cmd.data_present = 0x1;
2242 cmd.data.data_ptr = wp_status;
2243 cmd.data.num_blocks = 0x1;
2244 cmd.data.blk_sz = 0x8;
2245
2246 if (sdhci_send_command(&dev->host, &cmd))
2247 {
2248 dprintf(CRITICAL, "Failed to get status of write protect bits\n");
2249 return 1;
2250 }
2251
2252 return 0;
2253}
2254
2255/*
2256 * Function: mmc set/clear WP on user area
2257 * Arg : mmc device structure, block address,len, & flag to set or clear
2258 * Return : 0 on success, 1 on failure
2259 * Flow : Function to set/clear power on write protect on user area
2260 */
2261
2262uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr)
2263{
2264 struct mmc_command cmd;
vijay kumar7420baa2014-05-02 12:01:49 +05302265 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002266 uint32_t wp_grp_size;
2267 uint32_t status;
2268 uint32_t num_wp_grps;
2269 uint32_t ret;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002270 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002271 uint32_t i;
2272
2273 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2274
2275 /* Convert len into blocks */
2276 len = len / MMC_BLK_SZ;
vijay kumar697dbfd2014-04-24 17:12:49 +05302277 wp_grp_size = dev->card.wp_grp_size;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002278
2279 /* Disable PERM WP */
2280 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PERM_WP_DIS);
2281
2282 if (ret)
2283 {
2284 dprintf(CRITICAL, "Failed to Disable PERM WP\n");
2285 return ret;
2286 }
2287
2288 /* Read the default values for user WP */
2289 ret = mmc_get_ext_csd(&dev->host, &dev->card);
2290
2291 if (ret)
2292 {
2293 dprintf(CRITICAL, "Failed to read ext csd for the card\n");
2294 return ret;
2295 }
2296
2297 /* Check if user power on WP is disabled or perm WP is enabled */
2298 if ((dev->card.ext_csd[MMC_USR_WP] & MMC_US_PWR_WP_DIS)
2299 || (dev->card.ext_csd[MMC_USR_WP] & MMC_US_PERM_WP_EN))
2300 {
2301 dprintf(CRITICAL, "Power on protection is disabled, cannot be set\n");
2302 return 1;
2303 }
2304
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002305 if (len < wp_grp_size)
2306 {
2307 dprintf(CRITICAL, "Length is less than min WP size, WP was not set\n");
2308 return 1;
2309 }
2310
2311 /* Set power on USER WP */
2312 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PWR_WP_EN);
2313
2314 if (ret)
2315 {
2316 dprintf(CRITICAL, "Failed to set power on WP for user\n");
2317 return ret;
2318 }
2319
2320 num_wp_grps = ROUNDUP(len, wp_grp_size) / wp_grp_size;
2321
2322 if (set_clr)
2323 cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
2324 else
2325 cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
2326
2327 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2328 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2329
2330 for(i = 0; i < num_wp_grps; i++)
2331 {
vijay kumar7420baa2014-05-02 12:01:49 +05302332 /*
2333 * Standard emmc cards use byte mode addressing
2334 * convert the block address to byte address before
2335 * sending the command
2336 */
2337 if (card->type == MMC_TYPE_STD_MMC)
2338 cmd.argument = (addr + (i * wp_grp_size)) * card->block_size;
2339 else
2340 cmd.argument = addr + (i * wp_grp_size);
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002341
2342 if (sdhci_send_command(&dev->host, &cmd))
2343 return 1;
2344
2345 /* CMD28/CMD29 On failure returns address out of range error */
2346 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2347 {
2348 dprintf(CRITICAL, "Address for CMD28/29 is out of range\n");
2349 return 1;
2350 }
2351
2352 /* Check the card status */
2353 do
2354 {
2355 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2356 {
2357 dprintf(CRITICAL, "Failed to get card status afterapplying write protect\n");
2358 return 1;
2359 }
2360
2361 /* Time out for WP command */
2362 retry++;
2363 udelay(1000);
2364 if (retry == MMC_MAX_CARD_STAT_RETRY)
2365 {
2366 dprintf(CRITICAL, "Card status timed out after sending write protect command\n");
2367 return 1;
2368 }
2369 } while (!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2370
2371 }
2372
2373 return 0;
2374}
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002375
2376/* Function to put the mmc card to sleep */
2377void mmc_put_card_to_sleep(struct mmc_device *dev)
2378{
2379 struct mmc_command cmd = {0};
2380 struct mmc_card *card = &dev->card;
2381
2382 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
2383 cmd.argument = 0x00000000;
2384 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2385 cmd.resp_type = SDHCI_CMD_RESP_NONE;
2386
2387 /* send command */
2388 if(sdhci_send_command(&dev->host, &cmd))
2389 {
2390 dprintf(CRITICAL, "card deselect error: %s\n", __func__);
2391 return;
2392 }
vijay kumarb01d64c2015-08-21 20:37:29 +05302393 if(MMC_CARD_MMC(card)){
2394 /*CMD5 is reserved in SD card */
2395 cmd.cmd_index = CMD5_SLEEP_AWAKE;
2396 cmd.argument = (card->rca << MMC_CARD_RCA_BIT) | MMC_CARD_SLEEP;
2397 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2398 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002399
vijay kumarb01d64c2015-08-21 20:37:29 +05302400 /* send command */
2401 if(sdhci_send_command(&dev->host, &cmd))
2402 dprintf(CRITICAL, "card sleep error: %s\n", __func__);
2403 }
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002404}
Channagoud Kadabi31d648c2015-01-29 12:59:00 -08002405
2406/*
2407 * Switch the partition access type to rpmb or default
2408 */
2409static uint32_t mmc_sdhci_switch_part(struct mmc_device *dev, uint32_t type)
2410{
2411 uint32_t part_access;
2412 uint32_t ret;
2413
2414 /* Clear the partition access */
2415 part_access = dev->card.ext_csd[MMC_PARTITION_CONFIG] & ~PARTITION_ACCESS_MASK;
2416 part_access |= type;
2417
2418 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_ACCESS_WRITE, MMC_PARTITION_CONFIG, part_access);
2419
2420 if (ret)
2421 {
2422 dprintf(CRITICAL, "Failed to switch partition to type: %u\n", type);
2423 return 1;
2424 }
2425
2426 dev->card.ext_csd[MMC_PARTITION_CONFIG] = part_access;
2427 return 0;
2428}
2429
2430static uint32_t mmc_sdhci_set_blk_cnt(struct mmc_device *dev, uint32_t blk_cnt, uint32_t rel_write)
2431{
2432 struct mmc_command cmd = {0};
2433
2434 cmd.cmd_index = CMD23_SET_BLOCK_COUNT;
2435 cmd.argument = blk_cnt & 0x0000ffff;
2436 cmd.argument |= rel_write;
2437 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2438 cmd.resp_type = SDHCI_CMD_RESP_R1;
2439
2440 if (sdhci_send_command(&dev->host, &cmd))
2441 {
2442 dprintf(CRITICAL, "Set block count failed: %s\n", __func__);
2443 return 1;
2444 }
2445
2446 return 0;
2447}
2448
2449uint32_t mmc_sdhci_rpmb_send(struct mmc_device *dev, struct mmc_command *cmd)
2450{
2451 int i;
2452 uint32_t retry = 5;
2453 uint32_t status;
2454 uint32_t rel_write = 0;
2455 uint32_t ret = 1;
2456
2457 ASSERT(cmd);
2458
2459 /* 1. Set the partition type to rpmb */
2460 if (mmc_sdhci_switch_part(dev, PART_ACCESS_RPMB))
2461 return 1;
2462
2463 for (i = 0; i < MAX_RPMB_CMDS; i++)
2464 {
2465 if (!cmd[i].cmd_index)
2466 break;
2467
2468 if (cmd[i].write_flag == true)
2469 rel_write = BIT(31);
2470 else
2471 rel_write = 0;
2472
2473 /* 2. Set the block count using cmd23 */
2474 if (mmc_sdhci_set_blk_cnt(dev, cmd[i].data.num_blocks, rel_write))
2475 goto err;
2476
2477 /* 3. Send the command */
2478 if (sdhci_send_command(&dev->host, &cmd[i]))
2479 goto err;
2480 do
2481 {
2482 /* 4. Poll for card status to ensure rpmb operation completeness */
2483 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2484 {
2485 dprintf(CRITICAL, "Failed to get card status after rpmb operations\n");
2486 goto err;
2487 }
2488
2489 retry--;
2490 udelay(500);
2491 if (!retry)
2492 {
2493 dprintf(CRITICAL, "Card status check timed out after rpmb operations\n");
2494 goto err;
2495 }
2496 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2497 }
2498
2499 /* If we reach here, that means success */
2500 ret = 0;
2501
2502err:
2503 /* 5. Switch the partition back to default type */
2504 if (mmc_sdhci_switch_part(dev, PART_ACCESS_DEFAULT))
2505 ret = 1;
2506
2507 return ret;
2508}