Channagoud Kadabi | a7ab931 | 2014-01-08 12:11:23 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
Deepa Dinamani | 1e09494 | 2012-10-30 15:49:02 -0700 | [diff] [blame] | 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 15 | * |
Deepa Dinamani | 1e09494 | 2012-10-30 15:49:02 -0700 | [diff] [blame] | 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 27 | */ |
| 28 | |
| 29 | #include <debug.h> |
| 30 | #include <platform/iomap.h> |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 31 | #include <platform/irqs.h> |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 32 | #include <platform/gpio.h> |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 33 | #include <reg.h> |
| 34 | #include <target.h> |
| 35 | #include <platform.h> |
Pavel Nedev | 0351149 | 2013-03-08 19:05:32 -0800 | [diff] [blame] | 36 | #include <dload_util.h> |
Deepa Dinamani | 26e9326 | 2012-05-21 17:35:14 -0700 | [diff] [blame] | 37 | #include <uart_dm.h> |
Amol Jadi | 29f9503 | 2012-06-22 12:52:54 -0700 | [diff] [blame] | 38 | #include <mmc.h> |
Deepa Dinamani | c2a9b36 | 2012-02-23 15:15:54 -0800 | [diff] [blame] | 39 | #include <spmi.h> |
Neeti Desai | 465491e | 2012-07-31 12:53:35 -0700 | [diff] [blame] | 40 | #include <board.h> |
| 41 | #include <smem.h> |
| 42 | #include <baseband.h> |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 43 | #include <dev/keys.h> |
| 44 | #include <pm8x41.h> |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 45 | #include <crypto5_wrapper.h> |
Eugene Yasman | a0d1812 | 2013-02-26 13:23:05 +0200 | [diff] [blame] | 46 | #include <hsusb.h> |
| 47 | #include <clock.h> |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 48 | #include <partition_parser.h> |
| 49 | #include <scm.h> |
| 50 | #include <platform/clock.h> |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 51 | #include <platform/gpio.h> |
Channagoud Kadabi | f84830c | 2013-04-19 14:35:47 -0700 | [diff] [blame] | 52 | #include <stdlib.h> |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 53 | |
| 54 | extern bool target_use_signed_kernel(void); |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 55 | static void set_sdc_power_ctrl(); |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 56 | |
| 57 | static unsigned int target_id; |
Deepa Dinamani | 07f1571 | 2013-03-08 17:02:13 -0800 | [diff] [blame] | 58 | static uint32_t pmic_ver; |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 59 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 60 | #if MMC_SDHCI_SUPPORT |
| 61 | struct mmc_device *dev; |
| 62 | #endif |
| 63 | |
Deepa Dinamani | c2a9b36 | 2012-02-23 15:15:54 -0800 | [diff] [blame] | 64 | #define PMIC_ARB_CHANNEL_NUM 0 |
| 65 | #define PMIC_ARB_OWNER_ID 0 |
| 66 | |
Deepa Dinamani | 1e09494 | 2012-10-30 15:49:02 -0700 | [diff] [blame] | 67 | #define WDOG_DEBUG_DISABLE_BIT 17 |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 68 | |
Channagoud Kadabi | a1ef809 | 2014-01-08 12:11:58 -0800 | [diff] [blame] | 69 | #define CE_INSTANCE 2 |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 70 | #define CE_EE 1 |
| 71 | #define CE_FIFO_SIZE 64 |
| 72 | #define CE_READ_PIPE 3 |
| 73 | #define CE_WRITE_PIPE 2 |
Deepa Dinamani | 809c428 | 2013-07-09 14:06:02 -0700 | [diff] [blame] | 74 | #define CE_READ_PIPE_LOCK_GRP 0 |
| 75 | #define CE_WRITE_PIPE_LOCK_GRP 0 |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 76 | #define CE_ARRAY_SIZE 20 |
| 77 | |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 78 | #ifdef SSD_ENABLE |
| 79 | #define SSD_CE_INSTANCE_1 1 |
| 80 | #define SSD_PARTITION_SIZE 8192 |
| 81 | #endif |
| 82 | |
Sundarajan Srinivasan | d00f31d | 2013-07-19 12:09:15 -0700 | [diff] [blame] | 83 | #define FASTBOOT_MODE 0x77665500 |
| 84 | |
Channagoud Kadabi | c48b3e9 | 2013-06-23 16:19:10 -0700 | [diff] [blame] | 85 | #define BOARD_SOC_VERSION1(soc_rev) (soc_rev >= 0x10000 && soc_rev < 0x20000) |
| 86 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 87 | #if MMC_SDHCI_SUPPORT |
| 88 | static uint32_t mmc_sdhci_base[] = |
| 89 | { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE, MSM_SDC3_SDHCI_BASE, MSM_SDC4_SDHCI_BASE }; |
| 90 | #endif |
| 91 | |
Deepa Dinamani | ca5ad85 | 2012-05-07 18:19:47 -0700 | [diff] [blame] | 92 | static uint32_t mmc_sdc_base[] = |
| 93 | { MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE, MSM_SDC4_BASE }; |
| 94 | |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 95 | static uint32_t mmc_sdc_pwrctl_irq[] = |
| 96 | { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ, SDCC3_PWRCTL_IRQ, SDCC4_PWRCTL_IRQ }; |
| 97 | |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 98 | void target_early_init(void) |
| 99 | { |
Deepa Dinamani | b073ba2 | 2012-08-10 11:06:41 -0700 | [diff] [blame] | 100 | #if WITH_DEBUG_UART |
Neeti Desai | ac01127 | 2012-08-29 18:24:54 -0700 | [diff] [blame] | 101 | uart_dm_init(1, 0, BLSP1_UART1_BASE); |
Deepa Dinamani | b073ba2 | 2012-08-10 11:06:41 -0700 | [diff] [blame] | 102 | #endif |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 103 | } |
| 104 | |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 105 | /* Return 1 if vol_up pressed */ |
| 106 | static int target_volume_up() |
| 107 | { |
| 108 | uint8_t status = 0; |
| 109 | struct pm8x41_gpio gpio; |
| 110 | |
| 111 | /* CDP vol_up seems to be always grounded. So gpio status is read as 0, |
| 112 | * whether key is pressed or not. |
| 113 | * Ignore volume_up key on CDP for now. |
| 114 | */ |
| 115 | if (board_hardware_id() == HW_PLATFORM_SURF) |
| 116 | return 0; |
| 117 | |
| 118 | /* Configure the GPIO */ |
| 119 | gpio.direction = PM_GPIO_DIR_IN; |
| 120 | gpio.function = 0; |
| 121 | gpio.pull = PM_GPIO_PULL_UP_30; |
Eugene Yasman | 6382ee0 | 2013-01-16 13:00:56 +0200 | [diff] [blame] | 122 | gpio.vin_sel = 2; |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 123 | |
| 124 | pm8x41_gpio_config(5, &gpio); |
| 125 | |
Channagoud Kadabi | 4d7b530 | 2013-08-07 16:34:08 -0700 | [diff] [blame] | 126 | /* Wait for the pmic gpio config to take effect */ |
| 127 | thread_sleep(1); |
| 128 | |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 129 | /* Get status of P_GPIO_5 */ |
| 130 | pm8x41_gpio_get(5, &status); |
| 131 | |
| 132 | return !status; /* active low */ |
| 133 | } |
| 134 | |
| 135 | /* Return 1 if vol_down pressed */ |
Deepa Dinamani | 66a8796 | 2013-02-04 10:39:30 -0800 | [diff] [blame] | 136 | uint32_t target_volume_down() |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 137 | { |
Deepa Dinamani | 66a8796 | 2013-02-04 10:39:30 -0800 | [diff] [blame] | 138 | /* Volume down button is tied in with RESIN on MSM8974. */ |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 139 | if (platform_is_8974() && (pmic_ver == PM8X41_VERSION_V2)) |
Channagoud Kadabi | 84dcd91 | 2013-07-03 15:33:15 -0700 | [diff] [blame] | 140 | return pm8x41_v2_resin_status(); |
Deepa Dinamani | 13bfc85 | 2013-02-05 17:56:47 -0800 | [diff] [blame] | 141 | else |
| 142 | return pm8x41_resin_status(); |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 143 | } |
| 144 | |
| 145 | static void target_keystatus() |
| 146 | { |
| 147 | keys_init(); |
| 148 | |
| 149 | if(target_volume_down()) |
| 150 | keys_post_event(KEY_VOLUMEDOWN, 1); |
| 151 | |
| 152 | if(target_volume_up()) |
| 153 | keys_post_event(KEY_VOLUMEUP, 1); |
| 154 | } |
| 155 | |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 156 | /* Set up params for h/w CE. */ |
| 157 | void target_crypto_init_params() |
| 158 | { |
| 159 | struct crypto_init_params ce_params; |
| 160 | |
| 161 | /* Set up base addresses and instance. */ |
Channagoud Kadabi | a1ef809 | 2014-01-08 12:11:58 -0800 | [diff] [blame] | 162 | ce_params.crypto_instance = CE_INSTANCE; |
| 163 | ce_params.crypto_base = MSM_CE2_BASE; |
| 164 | ce_params.bam_base = MSM_CE2_BAM_BASE; |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 165 | |
| 166 | /* Set up BAM config. */ |
Deepa Dinamani | 809c428 | 2013-07-09 14:06:02 -0700 | [diff] [blame] | 167 | ce_params.bam_ee = CE_EE; |
| 168 | ce_params.pipes.read_pipe = CE_READ_PIPE; |
| 169 | ce_params.pipes.write_pipe = CE_WRITE_PIPE; |
| 170 | ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP; |
| 171 | ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP; |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 172 | |
| 173 | /* Assign buffer sizes. */ |
| 174 | ce_params.num_ce = CE_ARRAY_SIZE; |
| 175 | ce_params.read_fifo_size = CE_FIFO_SIZE; |
| 176 | ce_params.write_fifo_size = CE_FIFO_SIZE; |
| 177 | |
Deepa Dinamani | e505d3d | 2013-05-14 16:55:38 -0700 | [diff] [blame] | 178 | /* BAM is initialized by TZ for this platform. |
| 179 | * Do not do it again as the initialization address space |
| 180 | * is locked. |
| 181 | */ |
| 182 | ce_params.do_bam_init = 0; |
| 183 | |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 184 | crypto_init_params(&ce_params); |
| 185 | } |
| 186 | |
| 187 | crypto_engine_type board_ce_type(void) |
| 188 | { |
| 189 | return CRYPTO_ENGINE_TYPE_HW; |
| 190 | } |
| 191 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 192 | #if MMC_SDHCI_SUPPORT |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 193 | static void target_mmc_sdhci_init() |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 194 | { |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 195 | struct mmc_config_data config = {0}; |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 196 | uint32_t soc_ver = 0; |
| 197 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 198 | soc_ver = board_soc_version(); |
| 199 | |
| 200 | /* |
| 201 | * 8974 v1 fluid devices, have a hardware bug |
| 202 | * which limits the bus width to 4 bit. |
| 203 | */ |
| 204 | switch(board_hardware_id()) |
| 205 | { |
| 206 | case HW_PLATFORM_FLUID: |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 207 | if (platform_is_8974() && BOARD_SOC_VERSION1(soc_ver)) |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 208 | config.bus_width = DATA_BUS_WIDTH_4BIT; |
Channagoud Kadabi | c48b3e9 | 2013-06-23 16:19:10 -0700 | [diff] [blame] | 209 | else |
| 210 | config.bus_width = DATA_BUS_WIDTH_8BIT; |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 211 | break; |
| 212 | default: |
| 213 | config.bus_width = DATA_BUS_WIDTH_8BIT; |
| 214 | }; |
| 215 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 216 | /* Trying Slot 1*/ |
| 217 | config.slot = 1; |
Channagoud Kadabi | bdac709 | 2013-08-20 15:28:07 -0700 | [diff] [blame] | 218 | /* |
| 219 | * For 8974 AC & 8x62 platforms the software clock |
| 220 | * plan recommends to use the following frequencies: |
| 221 | * 200 MHz --> 192 MHZ |
| 222 | * 400 MHZ --> 384 MHZ |
| 223 | * only for emmc slot |
| 224 | */ |
| 225 | if (platform_is_8974ac() || platform_is_8x62()) |
| 226 | config.max_clk_rate = MMC_CLK_192MHZ; |
| 227 | else |
| 228 | config.max_clk_rate = MMC_CLK_200MHZ; |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 229 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 230 | config.pwrctl_base = mmc_sdc_base[config.slot - 1]; |
| 231 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 232 | |
| 233 | if (!(dev = mmc_init(&config))) { |
| 234 | /* Trying Slot 2 next */ |
| 235 | config.slot = 2; |
Channagoud Kadabi | bdac709 | 2013-08-20 15:28:07 -0700 | [diff] [blame] | 236 | config.max_clk_rate = MMC_CLK_200MHZ; |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 237 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 238 | config.pwrctl_base = mmc_sdc_base[config.slot - 1]; |
| 239 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 240 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 241 | if (!(dev = mmc_init(&config))) { |
| 242 | dprintf(CRITICAL, "mmc init failed!"); |
| 243 | ASSERT(0); |
| 244 | } |
| 245 | } |
Channagoud Kadabi | ef5332f | 2013-05-16 15:23:43 -0700 | [diff] [blame] | 246 | |
| 247 | /* |
| 248 | * MMC initialization is complete, read the partition table info |
| 249 | */ |
| 250 | if (partition_read_table()) { |
| 251 | dprintf(CRITICAL, "Error reading the partition table info\n"); |
| 252 | ASSERT(0); |
| 253 | } |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 254 | } |
| 255 | |
Channagoud Kadabi | 6faaf70 | 2013-09-10 15:00:51 -0700 | [diff] [blame] | 256 | void *target_mmc_device() |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 257 | { |
Channagoud Kadabi | 6faaf70 | 2013-09-10 15:00:51 -0700 | [diff] [blame] | 258 | return (void *) dev; |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 259 | } |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 260 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 261 | #else |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 262 | static void target_mmc_mci_init() |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 263 | { |
Deepa Dinamani | ca5ad85 | 2012-05-07 18:19:47 -0700 | [diff] [blame] | 264 | uint32_t base_addr; |
| 265 | uint8_t slot; |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 266 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 267 | /* Trying Slot 1 */ |
| 268 | slot = 1; |
| 269 | base_addr = mmc_sdc_base[slot - 1]; |
| 270 | |
| 271 | if (mmc_boot_main(slot, base_addr)) |
| 272 | { |
| 273 | /* Trying Slot 2 next */ |
| 274 | slot = 2; |
| 275 | base_addr = mmc_sdc_base[slot - 1]; |
| 276 | if (mmc_boot_main(slot, base_addr)) { |
| 277 | dprintf(CRITICAL, "mmc init failed!"); |
| 278 | ASSERT(0); |
| 279 | } |
| 280 | } |
| 281 | } |
| 282 | |
| 283 | /* |
| 284 | * Function to set the capabilities for the host |
| 285 | */ |
| 286 | void target_mmc_caps(struct mmc_host *host) |
| 287 | { |
| 288 | uint32_t soc_ver = 0; |
| 289 | |
| 290 | soc_ver = board_soc_version(); |
| 291 | |
| 292 | /* |
| 293 | * 8974 v1 fluid devices, have a hardware bug |
| 294 | * which limits the bus width to 4 bit. |
| 295 | */ |
| 296 | switch(board_hardware_id()) |
| 297 | { |
| 298 | case HW_PLATFORM_FLUID: |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 299 | if (platform_is_8974() && BOARD_SOC_VERSION1(soc_ver)) |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 300 | host->caps.bus_width = MMC_BOOT_BUS_WIDTH_4_BIT; |
Channagoud Kadabi | c48b3e9 | 2013-06-23 16:19:10 -0700 | [diff] [blame] | 301 | else |
| 302 | host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT; |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 303 | break; |
| 304 | default: |
| 305 | host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT; |
| 306 | }; |
| 307 | |
| 308 | host->caps.ddr_mode = 1; |
| 309 | host->caps.hs200_mode = 1; |
| 310 | host->caps.hs_clk_rate = MMC_CLK_96MHZ; |
| 311 | } |
| 312 | #endif |
| 313 | |
| 314 | |
| 315 | void target_init(void) |
| 316 | { |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 317 | dprintf(INFO, "target_init()\n"); |
| 318 | |
Deepa Dinamani | c2a9b36 | 2012-02-23 15:15:54 -0800 | [diff] [blame] | 319 | spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID); |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 320 | |
Deepa Dinamani | 07f1571 | 2013-03-08 17:02:13 -0800 | [diff] [blame] | 321 | /* Save PM8941 version info. */ |
| 322 | pmic_ver = pm8x41_get_pmic_rev(); |
| 323 | |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 324 | target_keystatus(); |
| 325 | |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 326 | if (target_use_signed_kernel()) |
| 327 | target_crypto_init_params(); |
| 328 | |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 329 | /* |
| 330 | * Set drive strength & pull ctrl for |
| 331 | * emmc |
| 332 | */ |
| 333 | set_sdc_power_ctrl(); |
| 334 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 335 | #if MMC_SDHCI_SUPPORT |
| 336 | target_mmc_sdhci_init(); |
| 337 | #else |
| 338 | target_mmc_mci_init(); |
| 339 | #endif |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 340 | } |
| 341 | |
| 342 | unsigned board_machtype(void) |
| 343 | { |
| 344 | return target_id; |
| 345 | } |
| 346 | |
| 347 | /* Do any target specific intialization needed before entering fastboot mode */ |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 348 | #ifdef SSD_ENABLE |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 349 | static void ssd_load_keystore_from_emmc() |
| 350 | { |
| 351 | uint64_t ptn = 0; |
| 352 | int index = -1; |
| 353 | uint32_t size = SSD_PARTITION_SIZE; |
| 354 | int ret = -1; |
| 355 | |
Channagoud Kadabi | f84830c | 2013-04-19 14:35:47 -0700 | [diff] [blame] | 356 | uint32_t *buffer = (uint32_t *)memalign(CACHE_LINE, |
| 357 | ROUNDUP(SSD_PARTITION_SIZE, CACHE_LINE)); |
| 358 | |
| 359 | if (!buffer) { |
| 360 | dprintf(CRITICAL, "Error Allocating memory for SSD buffer\n"); |
| 361 | ASSERT(0); |
| 362 | } |
| 363 | |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 364 | index = partition_get_index("ssd"); |
| 365 | |
| 366 | ptn = partition_get_offset(index); |
| 367 | if(ptn == 0){ |
| 368 | dprintf(CRITICAL,"ERROR: ssd parition not found"); |
| 369 | return; |
| 370 | } |
| 371 | |
| 372 | if(mmc_read(ptn, buffer, size)){ |
| 373 | dprintf(CRITICAL,"ERROR:Cannot read data\n"); |
| 374 | return; |
| 375 | } |
| 376 | |
| 377 | ret = scm_protect_keystore((uint32_t *)&buffer[0],size); |
| 378 | if(ret != 0) |
| 379 | dprintf(CRITICAL,"ERROR: scm_protect_keystore Failed"); |
Channagoud Kadabi | f84830c | 2013-04-19 14:35:47 -0700 | [diff] [blame] | 380 | |
| 381 | free(buffer); |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 382 | } |
| 383 | #endif |
| 384 | |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 385 | void target_fastboot_init(void) |
| 386 | { |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 387 | /* Set the BOOT_DONE flag in PM8921 */ |
Channagoud Kadabi | a7ab931 | 2014-01-08 12:11:23 -0800 | [diff] [blame] | 388 | pm8x41_set_boot_done(); |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 389 | |
| 390 | #ifdef SSD_ENABLE |
| 391 | clock_ce_enable(SSD_CE_INSTANCE_1); |
| 392 | ssd_load_keystore_from_emmc(); |
| 393 | #endif |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 394 | } |
Neeti Desai | 465491e | 2012-07-31 12:53:35 -0700 | [diff] [blame] | 395 | |
| 396 | /* Detect the target type */ |
| 397 | void target_detect(struct board_data *board) |
| 398 | { |
Channagoud Kadabi | 2018bd1 | 2014-02-11 15:37:05 -0800 | [diff] [blame] | 399 | /* This property is filled in board.c */ |
Neeti Desai | 465491e | 2012-07-31 12:53:35 -0700 | [diff] [blame] | 400 | } |
| 401 | |
| 402 | /* Detect the modem type */ |
| 403 | void target_baseband_detect(struct board_data *board) |
| 404 | { |
Channagoud Kadabi | f1d4442 | 2013-02-21 22:59:35 -0800 | [diff] [blame] | 405 | uint32_t platform; |
Channagoud Kadabi | a7ab931 | 2014-01-08 12:11:23 -0800 | [diff] [blame] | 406 | uint32_t platform_subtype; |
Channagoud Kadabi | f1d4442 | 2013-02-21 22:59:35 -0800 | [diff] [blame] | 407 | |
| 408 | platform = board->platform; |
Channagoud Kadabi | 051f6b9 | 2014-01-08 12:16:16 -0800 | [diff] [blame] | 409 | platform_subtype = board->platform_subtype; |
| 410 | |
| 411 | /* |
| 412 | * Look for platform subtype if present, else |
| 413 | * check for platform type to decide on the |
| 414 | * baseband type |
| 415 | */ |
| 416 | switch(platform_subtype) { |
| 417 | case HW_PLATFORM_SUBTYPE_UNKNOWN: |
| 418 | case HW_PLATFORM_SUBTYPE_8974PRO_PM8084: |
| 419 | break; |
| 420 | default: |
| 421 | dprintf(CRITICAL, "Platform Subtype : %u is not supported\n",platform_subtype); |
| 422 | ASSERT(0); |
| 423 | }; |
Channagoud Kadabi | f1d4442 | 2013-02-21 22:59:35 -0800 | [diff] [blame] | 424 | |
| 425 | switch(platform) { |
| 426 | case MSM8974: |
Deepa Dinamani | 713a76f | 2013-05-03 13:17:24 -0700 | [diff] [blame] | 427 | case MSM8274: |
| 428 | case MSM8674: |
Deepa Dinamani | caf9e77 | 2013-06-14 12:39:41 -0700 | [diff] [blame] | 429 | case MSM8274AA: |
| 430 | case MSM8274AB: |
| 431 | case MSM8274AC: |
| 432 | case MSM8674AA: |
| 433 | case MSM8674AB: |
| 434 | case MSM8674AC: |
| 435 | case MSM8974AA: |
| 436 | case MSM8974AB: |
| 437 | case MSM8974AC: |
Neeti Desai | 465491e | 2012-07-31 12:53:35 -0700 | [diff] [blame] | 438 | board->baseband = BASEBAND_MSM; |
Channagoud Kadabi | f1d4442 | 2013-02-21 22:59:35 -0800 | [diff] [blame] | 439 | break; |
| 440 | case APQ8074: |
Deepa Dinamani | caf9e77 | 2013-06-14 12:39:41 -0700 | [diff] [blame] | 441 | case APQ8074AA: |
| 442 | case APQ8074AB: |
| 443 | case APQ8074AC: |
Channagoud Kadabi | f1d4442 | 2013-02-21 22:59:35 -0800 | [diff] [blame] | 444 | board->baseband = BASEBAND_APQ; |
| 445 | break; |
| 446 | default: |
| 447 | dprintf(CRITICAL, "Platform type: %u is not supported\n",platform); |
| 448 | ASSERT(0); |
| 449 | }; |
Neeti Desai | 465491e | 2012-07-31 12:53:35 -0700 | [diff] [blame] | 450 | } |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 451 | |
Deepa Dinamani | 927a6b6 | 2013-03-28 17:05:32 -0700 | [diff] [blame] | 452 | unsigned target_baseband() |
| 453 | { |
| 454 | return board_baseband(); |
| 455 | } |
| 456 | |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 457 | void target_serialno(unsigned char *buf) |
| 458 | { |
| 459 | unsigned int serialno; |
| 460 | if (target_is_emmc_boot()) { |
| 461 | serialno = mmc_get_psn(); |
| 462 | snprintf((char *)buf, 13, "%x", serialno); |
| 463 | } |
| 464 | } |
Amol Jadi | 6639d45 | 2012-08-16 14:51:19 -0700 | [diff] [blame] | 465 | |
| 466 | unsigned check_reboot_mode(void) |
| 467 | { |
| 468 | uint32_t restart_reason = 0; |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 469 | uint32_t soc_ver = 0; |
| 470 | uint32_t restart_reason_addr; |
| 471 | |
| 472 | soc_ver = board_soc_version(); |
| 473 | |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 474 | if (platform_is_8974() && BOARD_SOC_VERSION1(soc_ver)) |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 475 | restart_reason_addr = RESTART_REASON_ADDR; |
Channagoud Kadabi | c48b3e9 | 2013-06-23 16:19:10 -0700 | [diff] [blame] | 476 | else |
| 477 | restart_reason_addr = RESTART_REASON_ADDR_V2; |
Amol Jadi | 6639d45 | 2012-08-16 14:51:19 -0700 | [diff] [blame] | 478 | |
| 479 | /* Read reboot reason and scrub it */ |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 480 | restart_reason = readl(restart_reason_addr); |
| 481 | writel(0x00, restart_reason_addr); |
Amol Jadi | 6639d45 | 2012-08-16 14:51:19 -0700 | [diff] [blame] | 482 | |
| 483 | return restart_reason; |
| 484 | } |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 485 | |
| 486 | void reboot_device(unsigned reboot_reason) |
| 487 | { |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 488 | uint32_t soc_ver = 0; |
Sundarajan Srinivasan | d00f31d | 2013-07-19 12:09:15 -0700 | [diff] [blame] | 489 | uint8_t reset_type = 0; |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 490 | |
| 491 | soc_ver = board_soc_version(); |
| 492 | |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 493 | /* Write the reboot reason */ |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 494 | if (platform_is_8974() && BOARD_SOC_VERSION1(soc_ver)) |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 495 | writel(reboot_reason, RESTART_REASON_ADDR); |
Channagoud Kadabi | c48b3e9 | 2013-06-23 16:19:10 -0700 | [diff] [blame] | 496 | else |
| 497 | writel(reboot_reason, RESTART_REASON_ADDR_V2); |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 498 | |
Sundarajan Srinivasan | d00f31d | 2013-07-19 12:09:15 -0700 | [diff] [blame] | 499 | if(reboot_reason == FASTBOOT_MODE) |
| 500 | reset_type = PON_PSHOLD_WARM_RESET; |
| 501 | else |
| 502 | reset_type = PON_PSHOLD_HARD_RESET; |
| 503 | |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 504 | /* Configure PMIC for warm reset */ |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 505 | if (platform_is_8974() && (pmic_ver == PM8X41_VERSION_V2)) |
Sundarajan Srinivasan | d00f31d | 2013-07-19 12:09:15 -0700 | [diff] [blame] | 506 | pm8x41_v2_reset_configure(reset_type); |
Deepa Dinamani | 07f1571 | 2013-03-08 17:02:13 -0800 | [diff] [blame] | 507 | else |
Sundarajan Srinivasan | d00f31d | 2013-07-19 12:09:15 -0700 | [diff] [blame] | 508 | pm8x41_reset_configure(reset_type); |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 509 | |
Deepa Dinamani | 1e09494 | 2012-10-30 15:49:02 -0700 | [diff] [blame] | 510 | /* Disable Watchdog Debug. |
| 511 | * Required becuase of a H/W bug which causes the system to |
| 512 | * reset partially even for non watchdog resets. |
| 513 | */ |
| 514 | writel(readl(GCC_WDOG_DEBUG) & ~(1 << WDOG_DEBUG_DISABLE_BIT), GCC_WDOG_DEBUG); |
| 515 | |
Deepa Dinamani | e0808e5 | 2012-11-26 15:22:46 -0800 | [diff] [blame] | 516 | dsb(); |
| 517 | |
| 518 | /* Wait until the write takes effect. */ |
| 519 | while(readl(GCC_WDOG_DEBUG) & (1 << WDOG_DEBUG_DISABLE_BIT)); |
| 520 | |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 521 | /* Drop PS_HOLD for MSM */ |
| 522 | writel(0x00, MPM2_MPM_PS_HOLD); |
| 523 | |
| 524 | mdelay(5000); |
| 525 | |
| 526 | dprintf(CRITICAL, "Rebooting failed\n"); |
| 527 | } |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 528 | |
Pavel Nedev | a4c9d3a | 2013-05-15 14:42:34 +0300 | [diff] [blame] | 529 | int set_download_mode(enum dload_mode mode) |
Pavel Nedev | 0351149 | 2013-03-08 19:05:32 -0800 | [diff] [blame] | 530 | { |
Pavel Nedev | a4c9d3a | 2013-05-15 14:42:34 +0300 | [diff] [blame] | 531 | dload_util_write_cookie(mode == NORMAL_DLOAD ? |
| 532 | DLOAD_MODE_ADDR_V2 : EMERGENCY_DLOAD_MODE_ADDR_V2, mode); |
Pavel Nedev | 0351149 | 2013-03-08 19:05:32 -0800 | [diff] [blame] | 533 | |
| 534 | return 0; |
| 535 | } |
| 536 | |
Channagoud Kadabi | 6d215b9 | 2013-06-23 16:47:07 -0700 | [diff] [blame] | 537 | /* Check if MSM needs VBUS mimic for USB */ |
| 538 | static int target_needs_vbus_mimic() |
| 539 | { |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 540 | if (platform_is_8974()) |
Channagoud Kadabi | 6d215b9 | 2013-06-23 16:47:07 -0700 | [diff] [blame] | 541 | return 0; |
| 542 | |
| 543 | return 1; |
| 544 | } |
| 545 | |
Eugene Yasman | a0d1812 | 2013-02-26 13:23:05 +0200 | [diff] [blame] | 546 | /* Do target specific usb initialization */ |
| 547 | void target_usb_init(void) |
| 548 | { |
Channagoud Kadabi | 6d215b9 | 2013-06-23 16:47:07 -0700 | [diff] [blame] | 549 | uint32_t val; |
| 550 | |
Eugene Yasman | a0d1812 | 2013-02-26 13:23:05 +0200 | [diff] [blame] | 551 | /* Enable secondary USB PHY on DragonBoard8074 */ |
| 552 | if (board_hardware_id() == HW_PLATFORM_DRAGON) { |
| 553 | /* Route ChipIDea to use secondary USB HS port2 */ |
| 554 | writel_relaxed(1, USB2_PHY_SEL); |
| 555 | |
| 556 | /* Enable access to secondary PHY by clamping the low |
| 557 | * voltage interface between DVDD of the PHY and Vddcx |
| 558 | * (set bit16 (USB2_PHY_HS2_DIG_CLAMP_N_2) = 1) */ |
| 559 | writel_relaxed(readl_relaxed(USB_OTG_HS_PHY_SEC_CTRL) |
| 560 | | 0x00010000, USB_OTG_HS_PHY_SEC_CTRL); |
| 561 | |
| 562 | /* Perform power-on-reset of the PHY. |
| 563 | * Delay values are arbitrary */ |
| 564 | writel_relaxed(readl_relaxed(USB_OTG_HS_PHY_CTRL)|1, |
| 565 | USB_OTG_HS_PHY_CTRL); |
| 566 | thread_sleep(10); |
| 567 | writel_relaxed(readl_relaxed(USB_OTG_HS_PHY_CTRL) & 0xFFFFFFFE, |
| 568 | USB_OTG_HS_PHY_CTRL); |
| 569 | thread_sleep(10); |
| 570 | |
| 571 | /* Enable HSUSB PHY port for ULPI interface, |
| 572 | * then configure related parameters within the PHY */ |
| 573 | writel_relaxed(((readl_relaxed(USB_PORTSC) & 0xC0000000) |
| 574 | | 0x8c000004), USB_PORTSC); |
| 575 | } |
Channagoud Kadabi | 6d215b9 | 2013-06-23 16:47:07 -0700 | [diff] [blame] | 576 | |
| 577 | if (target_needs_vbus_mimic()) |
| 578 | { |
| 579 | /* Select and enable external configuration with USB PHY */ |
| 580 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET); |
| 581 | |
| 582 | /* Enable sess_vld */ |
| 583 | val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN; |
| 584 | writel(val, USB_GENCONFIG_2); |
| 585 | |
| 586 | /* Enable external vbus configuration in the LINK */ |
| 587 | val = readl(USB_USBCMD); |
| 588 | val |= SESS_VLD_CTRL; |
| 589 | writel(val, USB_USBCMD); |
| 590 | } |
Eugene Yasman | a0d1812 | 2013-02-26 13:23:05 +0200 | [diff] [blame] | 591 | } |
| 592 | |
Casey Piper | 74f8e5c | 2013-09-05 15:00:30 -0700 | [diff] [blame] | 593 | uint8_t target_panel_auto_detect_enabled() |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 594 | { |
Siddhartha Agrawal | 17a6b83 | 2013-02-17 18:36:25 -0800 | [diff] [blame] | 595 | switch(board_hardware_id()) |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 596 | { |
Siddhartha Agrawal | 17a6b83 | 2013-02-17 18:36:25 -0800 | [diff] [blame] | 597 | case HW_PLATFORM_SURF: |
| 598 | case HW_PLATFORM_MTP: |
| 599 | case HW_PLATFORM_FLUID: |
Siddhartha Agrawal | 17a6b83 | 2013-02-17 18:36:25 -0800 | [diff] [blame] | 600 | return 1; |
| 601 | break; |
| 602 | default: |
Siddhartha Agrawal | 17a6b83 | 2013-02-17 18:36:25 -0800 | [diff] [blame] | 603 | return 0; |
Casey Piper | 74f8e5c | 2013-09-05 15:00:30 -0700 | [diff] [blame] | 604 | break; |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 605 | } |
Casey Piper | 74f8e5c | 2013-09-05 15:00:30 -0700 | [diff] [blame] | 606 | return 0; |
| 607 | } |
| 608 | |
Casey Piper | 74f67a3 | 2013-11-18 13:26:18 -0800 | [diff] [blame] | 609 | uint8_t target_is_edp() |
| 610 | { |
| 611 | switch(board_hardware_id()) |
| 612 | { |
| 613 | case HW_PLATFORM_LIQUID: |
| 614 | return 1; |
| 615 | break; |
| 616 | default: |
| 617 | return 0; |
| 618 | break; |
| 619 | } |
| 620 | return 0; |
| 621 | } |
| 622 | |
Casey Piper | 74f8e5c | 2013-09-05 15:00:30 -0700 | [diff] [blame] | 623 | static uint8_t splash_override; |
| 624 | /* Returns 1 if target supports continuous splash screen. */ |
| 625 | int target_cont_splash_screen() |
| 626 | { |
| 627 | uint8_t splash_screen = 0; |
| 628 | if(!splash_override) { |
| 629 | switch(board_hardware_id()) |
| 630 | { |
| 631 | case HW_PLATFORM_SURF: |
| 632 | case HW_PLATFORM_MTP: |
| 633 | case HW_PLATFORM_FLUID: |
| 634 | case HW_PLATFORM_DRAGON: |
| 635 | case HW_PLATFORM_LIQUID: |
| 636 | dprintf(SPEW, "Target_cont_splash=1\n"); |
| 637 | splash_screen = 1; |
| 638 | break; |
| 639 | default: |
| 640 | dprintf(SPEW, "Target_cont_splash=0\n"); |
| 641 | splash_screen = 0; |
| 642 | } |
| 643 | } |
| 644 | return splash_screen; |
| 645 | } |
| 646 | |
| 647 | void target_force_cont_splash_disable(uint8_t override) |
| 648 | { |
| 649 | splash_override = override; |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 650 | } |
sundarajan srinivasan | b5db0a9 | 2013-02-12 19:19:27 -0800 | [diff] [blame] | 651 | |
| 652 | unsigned target_pause_for_battery_charge(void) |
| 653 | { |
| 654 | uint8_t pon_reason = pm8x41_get_pon_reason(); |
| 655 | |
| 656 | /* This function will always return 0 to facilitate |
| 657 | * automated testing/reboot with usb connected. |
| 658 | * uncomment if this feature is needed */ |
| 659 | /* if ((pon_reason == USB_CHG) || (pon_reason == DC_CHG)) |
| 660 | return 1;*/ |
| 661 | |
| 662 | return 0; |
| 663 | } |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 664 | |
Channagoud Kadabi | 9faa45b | 2013-06-18 18:33:02 -0700 | [diff] [blame] | 665 | void target_uninit(void) |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 666 | { |
Channagoud Kadabi | 9faa45b | 2013-06-18 18:33:02 -0700 | [diff] [blame] | 667 | #if MMC_SDHCI_SUPPORT |
| 668 | mmc_put_card_to_sleep(dev); |
| 669 | #else |
| 670 | mmc_put_card_to_sleep(); |
| 671 | #endif |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 672 | #ifdef SSD_ENABLE |
| 673 | clock_ce_disable(SSD_CE_INSTANCE_1); |
| 674 | #endif |
Channagoud Kadabi | 2095a41 | 2013-12-04 12:37:06 -0800 | [diff] [blame] | 675 | if (crypto_initialized()) |
| 676 | crypto_eng_cleanup(); |
Channagoud Kadabi | d0115f9 | 2014-01-24 17:25:34 -0800 | [diff] [blame] | 677 | |
| 678 | /* Disable HC mode before jumping to kernel */ |
| 679 | sdhci_mode_disable(&dev->host); |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 680 | } |
Deepa Dinamani | 65df982 | 2013-03-08 13:38:34 -0800 | [diff] [blame] | 681 | |
| 682 | void shutdown_device() |
| 683 | { |
| 684 | dprintf(CRITICAL, "Going down for shutdown.\n"); |
| 685 | |
| 686 | /* Configure PMIC for shutdown. */ |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 687 | if (platform_is_8974() && (pmic_ver == PM8X41_VERSION_V2)) |
Deepa Dinamani | 65df982 | 2013-03-08 13:38:34 -0800 | [diff] [blame] | 688 | pm8x41_v2_reset_configure(PON_PSHOLD_SHUTDOWN); |
| 689 | else |
| 690 | pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN); |
| 691 | |
| 692 | /* Drop PS_HOLD for MSM */ |
| 693 | writel(0x00, MPM2_MPM_PS_HOLD); |
| 694 | |
| 695 | mdelay(5000); |
| 696 | |
| 697 | dprintf(CRITICAL, "Shutdown failed\n"); |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 698 | } |
| 699 | |
| 700 | static void set_sdc_power_ctrl() |
| 701 | { |
Channagoud Kadabi | 224d832 | 2013-09-27 14:25:22 -0700 | [diff] [blame] | 702 | uint8_t tlmm_hdrv_clk = 0; |
| 703 | uint32_t platform_id = 0; |
| 704 | |
| 705 | platform_id = board_platform_id(); |
| 706 | |
| 707 | switch(platform_id) |
| 708 | { |
| 709 | case MSM8274AA: |
| 710 | case MSM8274AB: |
| 711 | case MSM8674AA: |
| 712 | case MSM8674AB: |
| 713 | case MSM8974AA: |
| 714 | case MSM8974AB: |
| 715 | if (board_hardware_id() == HW_PLATFORM_MTP) |
| 716 | tlmm_hdrv_clk = TLMM_CUR_VAL_10MA; |
| 717 | else |
| 718 | tlmm_hdrv_clk = TLMM_CUR_VAL_16MA; |
| 719 | break; |
| 720 | default: |
| 721 | tlmm_hdrv_clk = TLMM_CUR_VAL_16MA; |
| 722 | }; |
| 723 | |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 724 | /* Drive strength configs for sdc pins */ |
| 725 | struct tlmm_cfgs sdc1_hdrv_cfg[] = |
| 726 | { |
Channagoud Kadabi | 224d832 | 2013-09-27 14:25:22 -0700 | [diff] [blame] | 727 | { SDC1_CLK_HDRV_CTL_OFF, tlmm_hdrv_clk, TLMM_HDRV_MASK }, |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 728 | { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK }, |
| 729 | { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK }, |
| 730 | }; |
| 731 | |
| 732 | /* Pull configs for sdc pins */ |
| 733 | struct tlmm_cfgs sdc1_pull_cfg[] = |
| 734 | { |
| 735 | { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK }, |
| 736 | { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK }, |
| 737 | { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK }, |
| 738 | }; |
| 739 | |
Channagoud Kadabi | 389cab2 | 2013-08-20 15:29:15 -0700 | [diff] [blame] | 740 | struct tlmm_cfgs sdc1_rclk_cfg[] = |
| 741 | { |
| 742 | { SDC1_RCLK_PULL_CTL_OFF, TLMM_PULL_DOWN, TLMM_PULL_MASK }, |
| 743 | }; |
| 744 | |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 745 | /* Set the drive strength & pull control values */ |
| 746 | tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg)); |
| 747 | tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg)); |
Channagoud Kadabi | 389cab2 | 2013-08-20 15:29:15 -0700 | [diff] [blame] | 748 | |
| 749 | /* RCLK is supported only with 8974 pro, set rclk to pull down |
| 750 | * only for 8974 pro targets |
| 751 | */ |
| 752 | if (!platform_is_8974()) |
| 753 | tlmm_set_pull_ctrl(sdc1_rclk_cfg, ARRAY_SIZE(sdc1_rclk_cfg)); |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 754 | } |
Stanimir Varbanov | f64a029 | 2013-04-29 11:58:27 +0300 | [diff] [blame] | 755 | |
| 756 | int emmc_recovery_init(void) |
| 757 | { |
| 758 | return _emmc_recovery_init(); |
| 759 | } |
Channagoud Kadabi | 6d215b9 | 2013-06-23 16:47:07 -0700 | [diff] [blame] | 760 | |
| 761 | void target_usb_stop(void) |
| 762 | { |
| 763 | uint32_t platform = board_platform_id(); |
| 764 | |
| 765 | /* Disable VBUS mimicing in the controller. */ |
| 766 | if (target_needs_vbus_mimic()) |
| 767 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR); |
| 768 | } |
Amol Jadi | 4c3229f | 2013-10-07 14:38:06 -0700 | [diff] [blame] | 769 | |
| 770 | /* identify the usb controller to be used for the target */ |
| 771 | const char * target_usb_controller() |
| 772 | { |
| 773 | switch(board_platform_id()) |
| 774 | { |
| 775 | /* use dwc controller for PRO chips (with some exceptions) */ |
| 776 | case MSM8974AA: |
| 777 | case MSM8974AB: |
| 778 | case MSM8974AC: |
| 779 | /* exceptions based on hardware id */ |
| 780 | if (board_hardware_id() != HW_PLATFORM_DRAGON) |
| 781 | return "dwc"; |
| 782 | /* fall through to default "ci" for anything that did'nt select "dwc" */ |
| 783 | default: |
| 784 | return "ci"; |
| 785 | } |
| 786 | } |
Amol Jadi | 28864bb | 2013-10-11 14:12:59 -0700 | [diff] [blame] | 787 | |
| 788 | /* UTMI MUX configuration to connect PHY to SNPS controller: |
| 789 | * Configure primary HS phy mux to use UTMI interface |
| 790 | * (connected to usb30 controller). |
| 791 | */ |
| 792 | static void tcsr_hs_phy_mux_configure(void) |
| 793 | { |
| 794 | uint32_t reg; |
| 795 | |
| 796 | reg = readl(USB2_PHY_SEL); |
| 797 | |
| 798 | writel(reg | 0x1, USB2_PHY_SEL); |
| 799 | } |
| 800 | |
| 801 | /* configure hs phy mux if using dwc controller */ |
| 802 | void target_usb_phy_mux_configure(void) |
| 803 | { |
| 804 | if(!strcmp(target_usb_controller(), "dwc")) |
| 805 | { |
| 806 | tcsr_hs_phy_mux_configure(); |
| 807 | } |
| 808 | } |